diff options
Diffstat (limited to 'drivers/scsi/mpt2sas/mpi')
| -rw-r--r-- | drivers/scsi/mpt2sas/mpi/mpi2.h | 1067 | ||||
| -rw-r--r-- | drivers/scsi/mpt2sas/mpi/mpi2_cnfg.h | 2151 | ||||
| -rw-r--r-- | drivers/scsi/mpt2sas/mpi/mpi2_init.h | 420 | ||||
| -rw-r--r-- | drivers/scsi/mpt2sas/mpi/mpi2_ioc.h | 1295 | ||||
| -rw-r--r-- | drivers/scsi/mpt2sas/mpi/mpi2_raid.h | 295 | ||||
| -rw-r--r-- | drivers/scsi/mpt2sas/mpi/mpi2_sas.h | 282 | ||||
| -rw-r--r-- | drivers/scsi/mpt2sas/mpi/mpi2_tool.h | 249 | ||||
| -rw-r--r-- | drivers/scsi/mpt2sas/mpi/mpi2_type.h | 61 |
8 files changed, 5820 insertions, 0 deletions
diff --git a/drivers/scsi/mpt2sas/mpi/mpi2.h b/drivers/scsi/mpt2sas/mpi/mpi2.h new file mode 100644 index 000000000000..7bb2ece8b2e4 --- /dev/null +++ b/drivers/scsi/mpt2sas/mpi/mpi2.h | |||
| @@ -0,0 +1,1067 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (c) 2000-2009 LSI Corporation. | ||
| 3 | * | ||
| 4 | * | ||
| 5 | * Name: mpi2.h | ||
| 6 | * Title: MPI Message independent structures and definitions | ||
| 7 | * including System Interface Register Set and | ||
| 8 | * scatter/gather formats. | ||
| 9 | * Creation Date: June 21, 2006 | ||
| 10 | * | ||
| 11 | * mpi2.h Version: 02.00.11 | ||
| 12 | * | ||
| 13 | * Version History | ||
| 14 | * --------------- | ||
| 15 | * | ||
| 16 | * Date Version Description | ||
| 17 | * -------- -------- ------------------------------------------------------ | ||
| 18 | * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. | ||
| 19 | * 06-04-07 02.00.01 Bumped MPI2_HEADER_VERSION_UNIT. | ||
| 20 | * 06-26-07 02.00.02 Bumped MPI2_HEADER_VERSION_UNIT. | ||
| 21 | * 08-31-07 02.00.03 Bumped MPI2_HEADER_VERSION_UNIT. | ||
| 22 | * Moved ReplyPostHostIndex register to offset 0x6C of the | ||
| 23 | * MPI2_SYSTEM_INTERFACE_REGS and modified the define for | ||
| 24 | * MPI2_REPLY_POST_HOST_INDEX_OFFSET. | ||
| 25 | * Added union of request descriptors. | ||
| 26 | * Added union of reply descriptors. | ||
| 27 | * 10-31-07 02.00.04 Bumped MPI2_HEADER_VERSION_UNIT. | ||
| 28 | * Added define for MPI2_VERSION_02_00. | ||
| 29 | * Fixed the size of the FunctionDependent5 field in the | ||
| 30 | * MPI2_DEFAULT_REPLY structure. | ||
| 31 | * 12-18-07 02.00.05 Bumped MPI2_HEADER_VERSION_UNIT. | ||
| 32 | * Removed the MPI-defined Fault Codes and extended the | ||
| 33 | * product specific codes up to 0xEFFF. | ||
| 34 | * Added a sixth key value for the WriteSequence register | ||
| 35 | * and changed the flush value to 0x0. | ||
| 36 | * Added message function codes for Diagnostic Buffer Post | ||
| 37 | * and Diagnsotic Release. | ||
| 38 | * New IOCStatus define: MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED | ||
| 39 | * Moved MPI2_VERSION_UNION from mpi2_ioc.h. | ||
| 40 | * 02-29-08 02.00.06 Bumped MPI2_HEADER_VERSION_UNIT. | ||
| 41 | * 03-03-08 02.00.07 Bumped MPI2_HEADER_VERSION_UNIT. | ||
| 42 | * 05-21-08 02.00.08 Bumped MPI2_HEADER_VERSION_UNIT. | ||
| 43 | * Added #defines for marking a reply descriptor as unused. | ||
| 44 | * 06-27-08 02.00.09 Bumped MPI2_HEADER_VERSION_UNIT. | ||
| 45 | * 10-02-08 02.00.10 Bumped MPI2_HEADER_VERSION_UNIT. | ||
| 46 | * Moved LUN field defines from mpi2_init.h. | ||
| 47 | * 01-19-09 02.00.11 Bumped MPI2_HEADER_VERSION_UNIT. | ||
| 48 | * -------------------------------------------------------------------------- | ||
| 49 | */ | ||
| 50 | |||
| 51 | #ifndef MPI2_H | ||
| 52 | #define MPI2_H | ||
| 53 | |||
| 54 | |||
| 55 | /***************************************************************************** | ||
| 56 | * | ||
| 57 | * MPI Version Definitions | ||
| 58 | * | ||
| 59 | *****************************************************************************/ | ||
| 60 | |||
| 61 | #define MPI2_VERSION_MAJOR (0x02) | ||
| 62 | #define MPI2_VERSION_MINOR (0x00) | ||
| 63 | #define MPI2_VERSION_MAJOR_MASK (0xFF00) | ||
| 64 | #define MPI2_VERSION_MAJOR_SHIFT (8) | ||
| 65 | #define MPI2_VERSION_MINOR_MASK (0x00FF) | ||
| 66 | #define MPI2_VERSION_MINOR_SHIFT (0) | ||
| 67 | #define MPI2_VERSION ((MPI2_VERSION_MAJOR << MPI2_VERSION_MAJOR_SHIFT) | \ | ||
| 68 | MPI2_VERSION_MINOR) | ||
| 69 | |||
| 70 | #define MPI2_VERSION_02_00 (0x0200) | ||
| 71 | |||
| 72 | /* versioning for this MPI header set */ | ||
| 73 | #define MPI2_HEADER_VERSION_UNIT (0x0B) | ||
| 74 | #define MPI2_HEADER_VERSION_DEV (0x00) | ||
| 75 | #define MPI2_HEADER_VERSION_UNIT_MASK (0xFF00) | ||
| 76 | #define MPI2_HEADER_VERSION_UNIT_SHIFT (8) | ||
| 77 | #define MPI2_HEADER_VERSION_DEV_MASK (0x00FF) | ||
| 78 | #define MPI2_HEADER_VERSION_DEV_SHIFT (0) | ||
| 79 | #define MPI2_HEADER_VERSION ((MPI2_HEADER_VERSION_UNIT << 8) | MPI2_HEADER_VERSION_DEV) | ||
| 80 | |||
| 81 | |||
| 82 | /***************************************************************************** | ||
| 83 | * | ||
| 84 | * IOC State Definitions | ||
| 85 | * | ||
| 86 | *****************************************************************************/ | ||
| 87 | |||
| 88 | #define MPI2_IOC_STATE_RESET (0x00000000) | ||
| 89 | #define MPI2_IOC_STATE_READY (0x10000000) | ||
| 90 | #define MPI2_IOC_STATE_OPERATIONAL (0x20000000) | ||
| 91 | #define MPI2_IOC_STATE_FAULT (0x40000000) | ||
| 92 | |||
| 93 | #define MPI2_IOC_STATE_MASK (0xF0000000) | ||
| 94 | #define MPI2_IOC_STATE_SHIFT (28) | ||
| 95 | |||
| 96 | /* Fault state range for prodcut specific codes */ | ||
| 97 | #define MPI2_FAULT_PRODUCT_SPECIFIC_MIN (0x0000) | ||
| 98 | #define MPI2_FAULT_PRODUCT_SPECIFIC_MAX (0xEFFF) | ||
| 99 | |||
| 100 | |||
| 101 | /***************************************************************************** | ||
| 102 | * | ||
| 103 | * System Interface Register Definitions | ||
| 104 | * | ||
| 105 | *****************************************************************************/ | ||
| 106 | |||
| 107 | typedef volatile struct _MPI2_SYSTEM_INTERFACE_REGS | ||
| 108 | { | ||
| 109 | U32 Doorbell; /* 0x00 */ | ||
| 110 | U32 WriteSequence; /* 0x04 */ | ||
| 111 | U32 HostDiagnostic; /* 0x08 */ | ||
| 112 | U32 Reserved1; /* 0x0C */ | ||
| 113 | U32 DiagRWData; /* 0x10 */ | ||
| 114 | U32 DiagRWAddressLow; /* 0x14 */ | ||
| 115 | U32 DiagRWAddressHigh; /* 0x18 */ | ||
| 116 | U32 Reserved2[5]; /* 0x1C */ | ||
| 117 | U32 HostInterruptStatus; /* 0x30 */ | ||
| 118 | U32 HostInterruptMask; /* 0x34 */ | ||
| 119 | U32 DCRData; /* 0x38 */ | ||
| 120 | U32 DCRAddress; /* 0x3C */ | ||
| 121 | U32 Reserved3[2]; /* 0x40 */ | ||
| 122 | U32 ReplyFreeHostIndex; /* 0x48 */ | ||
| 123 | U32 Reserved4[8]; /* 0x4C */ | ||
| 124 | U32 ReplyPostHostIndex; /* 0x6C */ | ||
| 125 | U32 Reserved5; /* 0x70 */ | ||
| 126 | U32 HCBSize; /* 0x74 */ | ||
| 127 | U32 HCBAddressLow; /* 0x78 */ | ||
| 128 | U32 HCBAddressHigh; /* 0x7C */ | ||
| 129 | U32 Reserved6[16]; /* 0x80 */ | ||
| 130 | U32 RequestDescriptorPostLow; /* 0xC0 */ | ||
| 131 | U32 RequestDescriptorPostHigh; /* 0xC4 */ | ||
| 132 | U32 Reserved7[14]; /* 0xC8 */ | ||
| 133 | } MPI2_SYSTEM_INTERFACE_REGS, MPI2_POINTER PTR_MPI2_SYSTEM_INTERFACE_REGS, | ||
| 134 | Mpi2SystemInterfaceRegs_t, MPI2_POINTER pMpi2SystemInterfaceRegs_t; | ||
| 135 | |||
| 136 | /* | ||
| 137 | * Defines for working with the Doorbell register. | ||
| 138 | */ | ||
| 139 | #define MPI2_DOORBELL_OFFSET (0x00000000) | ||
| 140 | |||
| 141 | /* IOC --> System values */ | ||
| 142 | #define MPI2_DOORBELL_USED (0x08000000) | ||
| 143 | #define MPI2_DOORBELL_WHO_INIT_MASK (0x07000000) | ||
| 144 | #define MPI2_DOORBELL_WHO_INIT_SHIFT (24) | ||
| 145 | #define MPI2_DOORBELL_FAULT_CODE_MASK (0x0000FFFF) | ||
| 146 | #define MPI2_DOORBELL_DATA_MASK (0x0000FFFF) | ||
| 147 | |||
| 148 | /* System --> IOC values */ | ||
| 149 | #define MPI2_DOORBELL_FUNCTION_MASK (0xFF000000) | ||
| 150 | #define MPI2_DOORBELL_FUNCTION_SHIFT (24) | ||
| 151 | #define MPI2_DOORBELL_ADD_DWORDS_MASK (0x00FF0000) | ||
| 152 | #define MPI2_DOORBELL_ADD_DWORDS_SHIFT (16) | ||
| 153 | |||
| 154 | |||
| 155 | /* | ||
| 156 | * Defines for the WriteSequence register | ||
| 157 | */ | ||
| 158 | #define MPI2_WRITE_SEQUENCE_OFFSET (0x00000004) | ||
| 159 | #define MPI2_WRSEQ_KEY_VALUE_MASK (0x0000000F) | ||
| 160 | #define MPI2_WRSEQ_FLUSH_KEY_VALUE (0x0) | ||
| 161 | #define MPI2_WRSEQ_1ST_KEY_VALUE (0xF) | ||
| 162 | #define MPI2_WRSEQ_2ND_KEY_VALUE (0x4) | ||
| 163 | #define MPI2_WRSEQ_3RD_KEY_VALUE (0xB) | ||
| 164 | #define MPI2_WRSEQ_4TH_KEY_VALUE (0x2) | ||
| 165 | #define MPI2_WRSEQ_5TH_KEY_VALUE (0x7) | ||
| 166 | #define MPI2_WRSEQ_6TH_KEY_VALUE (0xD) | ||
| 167 | |||
| 168 | /* | ||
| 169 | * Defines for the HostDiagnostic register | ||
| 170 | */ | ||
| 171 | #define MPI2_HOST_DIAGNOSTIC_OFFSET (0x00000008) | ||
| 172 | |||
| 173 | #define MPI2_DIAG_BOOT_DEVICE_SELECT_MASK (0x00001800) | ||
| 174 | #define MPI2_DIAG_BOOT_DEVICE_SELECT_DEFAULT (0x00000000) | ||
| 175 | #define MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW (0x00000800) | ||
| 176 | |||
| 177 | #define MPI2_DIAG_CLEAR_FLASH_BAD_SIG (0x00000400) | ||
| 178 | #define MPI2_DIAG_FORCE_HCB_ON_RESET (0x00000200) | ||
| 179 | #define MPI2_DIAG_HCB_MODE (0x00000100) | ||
| 180 | #define MPI2_DIAG_DIAG_WRITE_ENABLE (0x00000080) | ||
| 181 | #define MPI2_DIAG_FLASH_BAD_SIG (0x00000040) | ||
| 182 | #define MPI2_DIAG_RESET_HISTORY (0x00000020) | ||
| 183 | #define MPI2_DIAG_DIAG_RW_ENABLE (0x00000010) | ||
| 184 | #define MPI2_DIAG_RESET_ADAPTER (0x00000004) | ||
| 185 | #define MPI2_DIAG_HOLD_IOC_RESET (0x00000002) | ||
| 186 | |||
| 187 | /* | ||
| 188 | * Offsets for DiagRWData and address | ||
| 189 | */ | ||
| 190 | #define MPI2_DIAG_RW_DATA_OFFSET (0x00000010) | ||
| 191 | #define MPI2_DIAG_RW_ADDRESS_LOW_OFFSET (0x00000014) | ||
| 192 | #define MPI2_DIAG_RW_ADDRESS_HIGH_OFFSET (0x00000018) | ||
| 193 | |||
| 194 | /* | ||
| 195 | * Defines for the HostInterruptStatus register | ||
| 196 | */ | ||
| 197 | #define MPI2_HOST_INTERRUPT_STATUS_OFFSET (0x00000030) | ||
| 198 | #define MPI2_HIS_SYS2IOC_DB_STATUS (0x80000000) | ||
| 199 | #define MPI2_HIS_IOP_DOORBELL_STATUS MPI2_HIS_SYS2IOC_DB_STATUS | ||
| 200 | #define MPI2_HIS_RESET_IRQ_STATUS (0x40000000) | ||
| 201 | #define MPI2_HIS_REPLY_DESCRIPTOR_INTERRUPT (0x00000008) | ||
| 202 | #define MPI2_HIS_IOC2SYS_DB_STATUS (0x00000001) | ||
| 203 | #define MPI2_HIS_DOORBELL_INTERRUPT MPI2_HIS_IOC2SYS_DB_STATUS | ||
| 204 | |||
| 205 | /* | ||
| 206 | * Defines for the HostInterruptMask register | ||
| 207 | */ | ||
| 208 | #define MPI2_HOST_INTERRUPT_MASK_OFFSET (0x00000034) | ||
| 209 | #define MPI2_HIM_RESET_IRQ_MASK (0x40000000) | ||
| 210 | #define MPI2_HIM_REPLY_INT_MASK (0x00000008) | ||
| 211 | #define MPI2_HIM_RIM MPI2_HIM_REPLY_INT_MASK | ||
| 212 | #define MPI2_HIM_IOC2SYS_DB_MASK (0x00000001) | ||
| 213 | #define MPI2_HIM_DIM MPI2_HIM_IOC2SYS_DB_MASK | ||
| 214 | |||
| 215 | /* | ||
| 216 | * Offsets for DCRData and address | ||
| 217 | */ | ||
| 218 | #define MPI2_DCR_DATA_OFFSET (0x00000038) | ||
| 219 | #define MPI2_DCR_ADDRESS_OFFSET (0x0000003C) | ||
| 220 | |||
| 221 | /* | ||
| 222 | * Offset for the Reply Free Queue | ||
| 223 | */ | ||
| 224 | #define MPI2_REPLY_FREE_HOST_INDEX_OFFSET (0x00000048) | ||
| 225 | |||
| 226 | /* | ||
| 227 | * Offset for the Reply Descriptor Post Queue | ||
| 228 | */ | ||
| 229 | #define MPI2_REPLY_POST_HOST_INDEX_OFFSET (0x0000006C) | ||
| 230 | |||
| 231 | /* | ||
| 232 | * Defines for the HCBSize and address | ||
| 233 | */ | ||
| 234 | #define MPI2_HCB_SIZE_OFFSET (0x00000074) | ||
| 235 | #define MPI2_HCB_SIZE_SIZE_MASK (0xFFFFF000) | ||
| 236 | #define MPI2_HCB_SIZE_HCB_ENABLE (0x00000001) | ||
| 237 | |||
| 238 | #define MPI2_HCB_ADDRESS_LOW_OFFSET (0x00000078) | ||
| 239 | #define MPI2_HCB_ADDRESS_HIGH_OFFSET (0x0000007C) | ||
| 240 | |||
| 241 | /* | ||
| 242 | * Offsets for the Request Queue | ||
| 243 | */ | ||
| 244 | #define MPI2_REQUEST_DESCRIPTOR_POST_LOW_OFFSET (0x000000C0) | ||
| 245 | #define MPI2_REQUEST_DESCRIPTOR_POST_HIGH_OFFSET (0x000000C4) | ||
| 246 | |||
| 247 | |||
| 248 | /***************************************************************************** | ||
| 249 | * | ||
| 250 | * Message Descriptors | ||
| 251 | * | ||
| 252 | *****************************************************************************/ | ||
| 253 | |||
| 254 | /* Request Descriptors */ | ||
| 255 | |||
| 256 | /* Default Request Descriptor */ | ||
| 257 | typedef struct _MPI2_DEFAULT_REQUEST_DESCRIPTOR | ||
| 258 | { | ||
| 259 | U8 RequestFlags; /* 0x00 */ | ||
| 260 | U8 VF_ID; /* 0x01 */ | ||
| 261 | U16 SMID; /* 0x02 */ | ||
| 262 | U16 LMID; /* 0x04 */ | ||
| 263 | U16 DescriptorTypeDependent; /* 0x06 */ | ||
| 264 | } MPI2_DEFAULT_REQUEST_DESCRIPTOR, | ||
| 265 | MPI2_POINTER PTR_MPI2_DEFAULT_REQUEST_DESCRIPTOR, | ||
| 266 | Mpi2DefaultRequestDescriptor_t, MPI2_POINTER pMpi2DefaultRequestDescriptor_t; | ||
| 267 | |||
| 268 | /* defines for the RequestFlags field */ | ||
| 269 | #define MPI2_REQ_DESCRIPT_FLAGS_TYPE_MASK (0x0E) | ||
| 270 | #define MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO (0x00) | ||
| 271 | #define MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET (0x02) | ||
| 272 | #define MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY (0x06) | ||
| 273 | #define MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE (0x08) | ||
| 274 | |||
| 275 | #define MPI2_REQ_DESCRIPT_FLAGS_IOC_FIFO_MARKER (0x01) | ||
| 276 | |||
| 277 | |||
| 278 | /* High Priority Request Descriptor */ | ||
| 279 | typedef struct _MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR | ||
| 280 | { | ||
| 281 | U8 RequestFlags; /* 0x00 */ | ||
| 282 | U8 VF_ID; /* 0x01 */ | ||
| 283 | U16 SMID; /* 0x02 */ | ||
| 284 | U16 LMID; /* 0x04 */ | ||
| 285 | U16 Reserved1; /* 0x06 */ | ||
| 286 | } MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR, | ||
| 287 | MPI2_POINTER PTR_MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR, | ||
| 288 | Mpi2HighPriorityRequestDescriptor_t, | ||
| 289 | MPI2_POINTER pMpi2HighPriorityRequestDescriptor_t; | ||
| 290 | |||
| 291 | |||
| 292 | /* SCSI IO Request Descriptor */ | ||
| 293 | typedef struct _MPI2_SCSI_IO_REQUEST_DESCRIPTOR | ||
| 294 | { | ||
| 295 | U8 RequestFlags; /* 0x00 */ | ||
| 296 | U8 VF_ID; /* 0x01 */ | ||
| 297 | U16 SMID; /* 0x02 */ | ||
| 298 | U16 LMID; /* 0x04 */ | ||
| 299 | U16 DevHandle; /* 0x06 */ | ||
| 300 | } MPI2_SCSI_IO_REQUEST_DESCRIPTOR, | ||
| 301 | MPI2_POINTER PTR_MPI2_SCSI_IO_REQUEST_DESCRIPTOR, | ||
| 302 | Mpi2SCSIIORequestDescriptor_t, MPI2_POINTER pMpi2SCSIIORequestDescriptor_t; | ||
| 303 | |||
| 304 | |||
| 305 | /* SCSI Target Request Descriptor */ | ||
| 306 | typedef struct _MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR | ||
| 307 | { | ||
| 308 | U8 RequestFlags; /* 0x00 */ | ||
| 309 | U8 VF_ID; /* 0x01 */ | ||
| 310 | U16 SMID; /* 0x02 */ | ||
| 311 | U16 LMID; /* 0x04 */ | ||
| 312 | U16 IoIndex; /* 0x06 */ | ||
| 313 | } MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR, | ||
| 314 | MPI2_POINTER PTR_MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR, | ||
| 315 | Mpi2SCSITargetRequestDescriptor_t, | ||
| 316 | MPI2_POINTER pMpi2SCSITargetRequestDescriptor_t; | ||
| 317 | |||
| 318 | /* union of Request Descriptors */ | ||
| 319 | typedef union _MPI2_REQUEST_DESCRIPTOR_UNION | ||
| 320 | { | ||
| 321 | MPI2_DEFAULT_REQUEST_DESCRIPTOR Default; | ||
| 322 | MPI2_HIGH_PRIORITY_REQUEST_DESCRIPTOR HighPriority; | ||
| 323 | MPI2_SCSI_IO_REQUEST_DESCRIPTOR SCSIIO; | ||
| 324 | MPI2_SCSI_TARGET_REQUEST_DESCRIPTOR SCSITarget; | ||
| 325 | U64 Words; | ||
| 326 | } MPI2_REQUEST_DESCRIPTOR_UNION, MPI2_POINTER PTR_MPI2_REQUEST_DESCRIPTOR_UNION, | ||
| 327 | Mpi2RequestDescriptorUnion_t, MPI2_POINTER pMpi2RequestDescriptorUnion_t; | ||
| 328 | |||
| 329 | |||
| 330 | /* Reply Descriptors */ | ||
| 331 | |||
| 332 | /* Default Reply Descriptor */ | ||
| 333 | typedef struct _MPI2_DEFAULT_REPLY_DESCRIPTOR | ||
| 334 | { | ||
| 335 | U8 ReplyFlags; /* 0x00 */ | ||
| 336 | U8 VF_ID; /* 0x01 */ | ||
| 337 | U16 DescriptorTypeDependent1; /* 0x02 */ | ||
| 338 | U32 DescriptorTypeDependent2; /* 0x04 */ | ||
| 339 | } MPI2_DEFAULT_REPLY_DESCRIPTOR, MPI2_POINTER PTR_MPI2_DEFAULT_REPLY_DESCRIPTOR, | ||
| 340 | Mpi2DefaultReplyDescriptor_t, MPI2_POINTER pMpi2DefaultReplyDescriptor_t; | ||
| 341 | |||
| 342 | /* defines for the ReplyFlags field */ | ||
| 343 | #define MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK (0x0F) | ||
| 344 | #define MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS (0x00) | ||
| 345 | #define MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY (0x01) | ||
| 346 | #define MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS (0x02) | ||
| 347 | #define MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER (0x03) | ||
| 348 | #define MPI2_RPY_DESCRIPT_FLAGS_UNUSED (0x0F) | ||
| 349 | |||
| 350 | /* values for marking a reply descriptor as unused */ | ||
| 351 | #define MPI2_RPY_DESCRIPT_UNUSED_WORD0_MARK (0xFFFFFFFF) | ||
| 352 | #define MPI2_RPY_DESCRIPT_UNUSED_WORD1_MARK (0xFFFFFFFF) | ||
| 353 | |||
| 354 | /* Address Reply Descriptor */ | ||
| 355 | typedef struct _MPI2_ADDRESS_REPLY_DESCRIPTOR | ||
| 356 | { | ||
| 357 | U8 ReplyFlags; /* 0x00 */ | ||
| 358 | U8 VF_ID; /* 0x01 */ | ||
| 359 | U16 SMID; /* 0x02 */ | ||
| 360 | U32 ReplyFrameAddress; /* 0x04 */ | ||
| 361 | } MPI2_ADDRESS_REPLY_DESCRIPTOR, MPI2_POINTER PTR_MPI2_ADDRESS_REPLY_DESCRIPTOR, | ||
| 362 | Mpi2AddressReplyDescriptor_t, MPI2_POINTER pMpi2AddressReplyDescriptor_t; | ||
| 363 | |||
| 364 | #define MPI2_ADDRESS_REPLY_SMID_INVALID (0x00) | ||
| 365 | |||
| 366 | |||
| 367 | /* SCSI IO Success Reply Descriptor */ | ||
| 368 | typedef struct _MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR | ||
| 369 | { | ||
| 370 | U8 ReplyFlags; /* 0x00 */ | ||
| 371 | U8 VF_ID; /* 0x01 */ | ||
| 372 | U16 SMID; /* 0x02 */ | ||
| 373 | U16 TaskTag; /* 0x04 */ | ||
| 374 | U16 DevHandle; /* 0x06 */ | ||
| 375 | } MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR, | ||
| 376 | MPI2_POINTER PTR_MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR, | ||
| 377 | Mpi2SCSIIOSuccessReplyDescriptor_t, | ||
| 378 | MPI2_POINTER pMpi2SCSIIOSuccessReplyDescriptor_t; | ||
| 379 | |||
| 380 | |||
| 381 | /* TargetAssist Success Reply Descriptor */ | ||
| 382 | typedef struct _MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR | ||
| 383 | { | ||
| 384 | U8 ReplyFlags; /* 0x00 */ | ||
| 385 | U8 VF_ID; /* 0x01 */ | ||
| 386 | U16 SMID; /* 0x02 */ | ||
| 387 | U8 SequenceNumber; /* 0x04 */ | ||
| 388 | U8 Reserved1; /* 0x05 */ | ||
| 389 | U16 IoIndex; /* 0x06 */ | ||
| 390 | } MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR, | ||
| 391 | MPI2_POINTER PTR_MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR, | ||
| 392 | Mpi2TargetAssistSuccessReplyDescriptor_t, | ||
| 393 | MPI2_POINTER pMpi2TargetAssistSuccessReplyDescriptor_t; | ||
| 394 | |||
| 395 | |||
| 396 | /* Target Command Buffer Reply Descriptor */ | ||
| 397 | typedef struct _MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR | ||
| 398 | { | ||
| 399 | U8 ReplyFlags; /* 0x00 */ | ||
| 400 | U8 VF_ID; /* 0x01 */ | ||
| 401 | U8 VP_ID; /* 0x02 */ | ||
| 402 | U8 Flags; /* 0x03 */ | ||
| 403 | U16 InitiatorDevHandle; /* 0x04 */ | ||
| 404 | U16 IoIndex; /* 0x06 */ | ||
| 405 | } MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR, | ||
| 406 | MPI2_POINTER PTR_MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR, | ||
| 407 | Mpi2TargetCommandBufferReplyDescriptor_t, | ||
| 408 | MPI2_POINTER pMpi2TargetCommandBufferReplyDescriptor_t; | ||
| 409 | |||
| 410 | /* defines for Flags field */ | ||
| 411 | #define MPI2_RPY_DESCRIPT_TCB_FLAGS_PHYNUM_MASK (0x3F) | ||
| 412 | |||
| 413 | |||
| 414 | /* union of Reply Descriptors */ | ||
| 415 | typedef union _MPI2_REPLY_DESCRIPTORS_UNION | ||
| 416 | { | ||
| 417 | MPI2_DEFAULT_REPLY_DESCRIPTOR Default; | ||
| 418 | MPI2_ADDRESS_REPLY_DESCRIPTOR AddressReply; | ||
| 419 | MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR SCSIIOSuccess; | ||
| 420 | MPI2_TARGETASSIST_SUCCESS_REPLY_DESCRIPTOR TargetAssistSuccess; | ||
| 421 | MPI2_TARGET_COMMAND_BUFFER_REPLY_DESCRIPTOR TargetCommandBuffer; | ||
| 422 | U64 Words; | ||
| 423 | } MPI2_REPLY_DESCRIPTORS_UNION, MPI2_POINTER PTR_MPI2_REPLY_DESCRIPTORS_UNION, | ||
| 424 | Mpi2ReplyDescriptorsUnion_t, MPI2_POINTER pMpi2ReplyDescriptorsUnion_t; | ||
| 425 | |||
| 426 | |||
| 427 | |||
| 428 | /***************************************************************************** | ||
| 429 | * | ||
| 430 | * Message Functions | ||
| 431 | * 0x80 -> 0x8F reserved for private message use per product | ||
| 432 | * | ||
| 433 | * | ||
| 434 | *****************************************************************************/ | ||
| 435 | |||
| 436 | #define MPI2_FUNCTION_SCSI_IO_REQUEST (0x00) /* SCSI IO */ | ||
| 437 | #define MPI2_FUNCTION_SCSI_TASK_MGMT (0x01) /* SCSI Task Management */ | ||
| 438 | #define MPI2_FUNCTION_IOC_INIT (0x02) /* IOC Init */ | ||
| 439 | #define MPI2_FUNCTION_IOC_FACTS (0x03) /* IOC Facts */ | ||
| 440 | #define MPI2_FUNCTION_CONFIG (0x04) /* Configuration */ | ||
| 441 | #define MPI2_FUNCTION_PORT_FACTS (0x05) /* Port Facts */ | ||
| 442 | #define MPI2_FUNCTION_PORT_ENABLE (0x06) /* Port Enable */ | ||
| 443 | #define MPI2_FUNCTION_EVENT_NOTIFICATION (0x07) /* Event Notification */ | ||
| 444 | #define MPI2_FUNCTION_EVENT_ACK (0x08) /* Event Acknowledge */ | ||
| 445 | #define MPI2_FUNCTION_FW_DOWNLOAD (0x09) /* FW Download */ | ||
| 446 | #define MPI2_FUNCTION_TARGET_ASSIST (0x0B) /* Target Assist */ | ||
| 447 | #define MPI2_FUNCTION_TARGET_STATUS_SEND (0x0C) /* Target Status Send */ | ||
| 448 | #define MPI2_FUNCTION_TARGET_MODE_ABORT (0x0D) /* Target Mode Abort */ | ||
| 449 | #define MPI2_FUNCTION_FW_UPLOAD (0x12) /* FW Upload */ | ||
| 450 | #define MPI2_FUNCTION_RAID_ACTION (0x15) /* RAID Action */ | ||
| 451 | #define MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH (0x16) /* SCSI IO RAID Passthrough */ | ||
| 452 | #define MPI2_FUNCTION_TOOLBOX (0x17) /* Toolbox */ | ||
| 453 | #define MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR (0x18) /* SCSI Enclosure Processor */ | ||
| 454 | #define MPI2_FUNCTION_SMP_PASSTHROUGH (0x1A) /* SMP Passthrough */ | ||
| 455 | #define MPI2_FUNCTION_SAS_IO_UNIT_CONTROL (0x1B) /* SAS IO Unit Control */ | ||
| 456 | #define MPI2_FUNCTION_SATA_PASSTHROUGH (0x1C) /* SATA Passthrough */ | ||
| 457 | #define MPI2_FUNCTION_DIAG_BUFFER_POST (0x1D) /* Diagnostic Buffer Post */ | ||
| 458 | #define MPI2_FUNCTION_DIAG_RELEASE (0x1E) /* Diagnostic Release */ | ||
| 459 | #define MPI2_FUNCTION_TARGET_CMD_BUF_BASE_POST (0x24) /* Target Command Buffer Post Base */ | ||
| 460 | #define MPI2_FUNCTION_TARGET_CMD_BUF_LIST_POST (0x25) /* Target Command Buffer Post List */ | ||
| 461 | |||
| 462 | |||
| 463 | |||
| 464 | /* Doorbell functions */ | ||
| 465 | #define MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET (0x40) | ||
| 466 | /* #define MPI2_FUNCTION_IO_UNIT_RESET (0x41) */ | ||
| 467 | #define MPI2_FUNCTION_HANDSHAKE (0x42) | ||
| 468 | |||
| 469 | |||
| 470 | /***************************************************************************** | ||
| 471 | * | ||
| 472 | * IOC Status Values | ||
| 473 | * | ||
| 474 | *****************************************************************************/ | ||
| 475 | |||
| 476 | /* mask for IOCStatus status value */ | ||
| 477 | #define MPI2_IOCSTATUS_MASK (0x7FFF) | ||
| 478 | |||
| 479 | /**************************************************************************** | ||
| 480 | * Common IOCStatus values for all replies | ||
| 481 | ****************************************************************************/ | ||
| 482 | |||
| 483 | #define MPI2_IOCSTATUS_SUCCESS (0x0000) | ||
| 484 | #define MPI2_IOCSTATUS_INVALID_FUNCTION (0x0001) | ||
| 485 | #define MPI2_IOCSTATUS_BUSY (0x0002) | ||
| 486 | #define MPI2_IOCSTATUS_INVALID_SGL (0x0003) | ||
| 487 | #define MPI2_IOCSTATUS_INTERNAL_ERROR (0x0004) | ||
| 488 | #define MPI2_IOCSTATUS_INVALID_VPID (0x0005) | ||
| 489 | #define MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES (0x0006) | ||
| 490 | #define MPI2_IOCSTATUS_INVALID_FIELD (0x0007) | ||
| 491 | #define MPI2_IOCSTATUS_INVALID_STATE (0x0008) | ||
| 492 | #define MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED (0x0009) | ||
| 493 | |||
| 494 | /**************************************************************************** | ||
| 495 | * Config IOCStatus values | ||
| 496 | ****************************************************************************/ | ||
| 497 | |||
| 498 | #define MPI2_IOCSTATUS_CONFIG_INVALID_ACTION (0x0020) | ||
| 499 | #define MPI2_IOCSTATUS_CONFIG_INVALID_TYPE (0x0021) | ||
| 500 | #define MPI2_IOCSTATUS_CONFIG_INVALID_PAGE (0x0022) | ||
| 501 | #define MPI2_IOCSTATUS_CONFIG_INVALID_DATA (0x0023) | ||
| 502 | #define MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS (0x0024) | ||
| 503 | #define MPI2_IOCSTATUS_CONFIG_CANT_COMMIT (0x0025) | ||
| 504 | |||
| 505 | /**************************************************************************** | ||
| 506 | * SCSI IO Reply | ||
| 507 | ****************************************************************************/ | ||
| 508 | |||
| 509 | #define MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR (0x0040) | ||
| 510 | #define MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE (0x0042) | ||
| 511 | #define MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE (0x0043) | ||
| 512 | #define MPI2_IOCSTATUS_SCSI_DATA_OVERRUN (0x0044) | ||
| 513 | #define MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN (0x0045) | ||
| 514 | #define MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR (0x0046) | ||
| 515 | #define MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR (0x0047) | ||
| 516 | #define MPI2_IOCSTATUS_SCSI_TASK_TERMINATED (0x0048) | ||
| 517 | #define MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH (0x0049) | ||
| 518 | #define MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED (0x004A) | ||
| 519 | #define MPI2_IOCSTATUS_SCSI_IOC_TERMINATED (0x004B) | ||
| 520 | #define MPI2_IOCSTATUS_SCSI_EXT_TERMINATED (0x004C) | ||
| 521 | |||
| 522 | /**************************************************************************** | ||
| 523 | * For use by SCSI Initiator and SCSI Target end-to-end data protection | ||
| 524 | ****************************************************************************/ | ||
| 525 | |||
| 526 | #define MPI2_IOCSTATUS_EEDP_GUARD_ERROR (0x004D) | ||
| 527 | #define MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR (0x004E) | ||
| 528 | #define MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR (0x004F) | ||
| 529 | |||
| 530 | /**************************************************************************** | ||
| 531 | * SCSI Target values | ||
| 532 | ****************************************************************************/ | ||
| 533 | |||
| 534 | #define MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX (0x0062) | ||
| 535 | #define MPI2_IOCSTATUS_TARGET_ABORTED (0x0063) | ||
| 536 | #define MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE (0x0064) | ||
| 537 | #define MPI2_IOCSTATUS_TARGET_NO_CONNECTION (0x0065) | ||
| 538 | #define MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH (0x006A) | ||
| 539 | #define MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR (0x006D) | ||
| 540 | #define MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA (0x006E) | ||
| 541 | #define MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT (0x006F) | ||
| 542 | #define MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT (0x0070) | ||
| 543 | #define MPI2_IOCSTATUS_TARGET_NAK_RECEIVED (0x0071) | ||
| 544 | |||
| 545 | /**************************************************************************** | ||
| 546 | * Serial Attached SCSI values | ||
| 547 | ****************************************************************************/ | ||
| 548 | |||
| 549 | #define MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED (0x0090) | ||
| 550 | #define MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN (0x0091) | ||
| 551 | |||
| 552 | /**************************************************************************** | ||
| 553 | * Diagnostic Buffer Post / Diagnostic Release values | ||
| 554 | ****************************************************************************/ | ||
| 555 | |||
| 556 | #define MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED (0x00A0) | ||
| 557 | |||
| 558 | |||
| 559 | /**************************************************************************** | ||
| 560 | * IOCStatus flag to indicate that log info is available | ||
| 561 | ****************************************************************************/ | ||
| 562 | |||
| 563 | #define MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE (0x8000) | ||
| 564 | |||
| 565 | /**************************************************************************** | ||
| 566 | * IOCLogInfo Types | ||
| 567 | ****************************************************************************/ | ||
| 568 | |||
| 569 | #define MPI2_IOCLOGINFO_TYPE_MASK (0xF0000000) | ||
| 570 | #define MPI2_IOCLOGINFO_TYPE_SHIFT (28) | ||
| 571 | #define MPI2_IOCLOGINFO_TYPE_NONE (0x0) | ||
| 572 | #define MPI2_IOCLOGINFO_TYPE_SCSI (0x1) | ||
| 573 | #define MPI2_IOCLOGINFO_TYPE_FC (0x2) | ||
| 574 | #define MPI2_IOCLOGINFO_TYPE_SAS (0x3) | ||
| 575 | #define MPI2_IOCLOGINFO_TYPE_ISCSI (0x4) | ||
| 576 | #define MPI2_IOCLOGINFO_LOG_DATA_MASK (0x0FFFFFFF) | ||
| 577 | |||
| 578 | |||
| 579 | /***************************************************************************** | ||
| 580 | * | ||
| 581 | * Standard Message Structures | ||
| 582 | * | ||
| 583 | *****************************************************************************/ | ||
| 584 | |||
| 585 | /**************************************************************************** | ||
| 586 | * Request Message Header for all request messages | ||
| 587 | ****************************************************************************/ | ||
| 588 | |||
| 589 | typedef struct _MPI2_REQUEST_HEADER | ||
| 590 | { | ||
| 591 | U16 FunctionDependent1; /* 0x00 */ | ||
| 592 | U8 ChainOffset; /* 0x02 */ | ||
| 593 | U8 Function; /* 0x03 */ | ||
| 594 | U16 FunctionDependent2; /* 0x04 */ | ||
| 595 | U8 FunctionDependent3; /* 0x06 */ | ||
| 596 | U8 MsgFlags; /* 0x07 */ | ||
| 597 | U8 VP_ID; /* 0x08 */ | ||
| 598 | U8 VF_ID; /* 0x09 */ | ||
| 599 | U16 Reserved1; /* 0x0A */ | ||
| 600 | } MPI2_REQUEST_HEADER, MPI2_POINTER PTR_MPI2_REQUEST_HEADER, | ||
| 601 | MPI2RequestHeader_t, MPI2_POINTER pMPI2RequestHeader_t; | ||
| 602 | |||
| 603 | |||
| 604 | /**************************************************************************** | ||
| 605 | * Default Reply | ||
| 606 | ****************************************************************************/ | ||
| 607 | |||
| 608 | typedef struct _MPI2_DEFAULT_REPLY | ||
| 609 | { | ||
| 610 | U16 FunctionDependent1; /* 0x00 */ | ||
| 611 | U8 MsgLength; /* 0x02 */ | ||
| 612 | U8 Function; /* 0x03 */ | ||
| 613 | U16 FunctionDependent2; /* 0x04 */ | ||
| 614 | U8 FunctionDependent3; /* 0x06 */ | ||
| 615 | U8 MsgFlags; /* 0x07 */ | ||
| 616 | U8 VP_ID; /* 0x08 */ | ||
| 617 | U8 VF_ID; /* 0x09 */ | ||
| 618 | U16 Reserved1; /* 0x0A */ | ||
| 619 | U16 FunctionDependent5; /* 0x0C */ | ||
| 620 | U16 IOCStatus; /* 0x0E */ | ||
| 621 | U32 IOCLogInfo; /* 0x10 */ | ||
| 622 | } MPI2_DEFAULT_REPLY, MPI2_POINTER PTR_MPI2_DEFAULT_REPLY, | ||
| 623 | MPI2DefaultReply_t, MPI2_POINTER pMPI2DefaultReply_t; | ||
| 624 | |||
| 625 | |||
| 626 | /* common version structure/union used in messages and configuration pages */ | ||
| 627 | |||
| 628 | typedef struct _MPI2_VERSION_STRUCT | ||
| 629 | { | ||
| 630 | U8 Dev; /* 0x00 */ | ||
| 631 | U8 Unit; /* 0x01 */ | ||
| 632 | U8 Minor; /* 0x02 */ | ||
| 633 | U8 Major; /* 0x03 */ | ||
| 634 | } MPI2_VERSION_STRUCT; | ||
| 635 | |||
| 636 | typedef union _MPI2_VERSION_UNION | ||
| 637 | { | ||
| 638 | MPI2_VERSION_STRUCT Struct; | ||
| 639 | U32 Word; | ||
| 640 | } MPI2_VERSION_UNION; | ||
| 641 | |||
| 642 | |||
| 643 | /* LUN field defines, common to many structures */ | ||
| 644 | #define MPI2_LUN_FIRST_LEVEL_ADDRESSING (0x0000FFFF) | ||
| 645 | #define MPI2_LUN_SECOND_LEVEL_ADDRESSING (0xFFFF0000) | ||
| 646 | #define MPI2_LUN_THIRD_LEVEL_ADDRESSING (0x0000FFFF) | ||
| 647 | #define MPI2_LUN_FOURTH_LEVEL_ADDRESSING (0xFFFF0000) | ||
| 648 | #define MPI2_LUN_LEVEL_1_WORD (0xFF00) | ||
| 649 | #define MPI2_LUN_LEVEL_1_DWORD (0x0000FF00) | ||
| 650 | |||
| 651 | |||
| 652 | /***************************************************************************** | ||
| 653 | * | ||
| 654 | * Fusion-MPT MPI Scatter Gather Elements | ||
| 655 | * | ||
| 656 | *****************************************************************************/ | ||
| 657 | |||
| 658 | /**************************************************************************** | ||
| 659 | * MPI Simple Element structures | ||
| 660 | ****************************************************************************/ | ||
| 661 | |||
| 662 | typedef struct _MPI2_SGE_SIMPLE32 | ||
| 663 | { | ||
| 664 | U32 FlagsLength; | ||
| 665 | U32 Address; | ||
| 666 | } MPI2_SGE_SIMPLE32, MPI2_POINTER PTR_MPI2_SGE_SIMPLE32, | ||
| 667 | Mpi2SGESimple32_t, MPI2_POINTER pMpi2SGESimple32_t; | ||
| 668 | |||
| 669 | typedef struct _MPI2_SGE_SIMPLE64 | ||
| 670 | { | ||
| 671 | U32 FlagsLength; | ||
| 672 | U64 Address; | ||
| 673 | } MPI2_SGE_SIMPLE64, MPI2_POINTER PTR_MPI2_SGE_SIMPLE64, | ||
| 674 | Mpi2SGESimple64_t, MPI2_POINTER pMpi2SGESimple64_t; | ||
| 675 | |||
| 676 | typedef struct _MPI2_SGE_SIMPLE_UNION | ||
| 677 | { | ||
| 678 | U32 FlagsLength; | ||
| 679 | union | ||
| 680 | { | ||
| 681 | U32 Address32; | ||
| 682 | U64 Address64; | ||
| 683 | } u; | ||
| 684 | } MPI2_SGE_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_SGE_SIMPLE_UNION, | ||
| 685 | Mpi2SGESimpleUnion_t, MPI2_POINTER pMpi2SGESimpleUnion_t; | ||
| 686 | |||
| 687 | |||
| 688 | /**************************************************************************** | ||
| 689 | * MPI Chain Element structures | ||
| 690 | ****************************************************************************/ | ||
| 691 | |||
| 692 | typedef struct _MPI2_SGE_CHAIN32 | ||
| 693 | { | ||
| 694 | U16 Length; | ||
| 695 | U8 NextChainOffset; | ||
| 696 | U8 Flags; | ||
| 697 | U32 Address; | ||
| 698 | } MPI2_SGE_CHAIN32, MPI2_POINTER PTR_MPI2_SGE_CHAIN32, | ||
| 699 | Mpi2SGEChain32_t, MPI2_POINTER pMpi2SGEChain32_t; | ||
| 700 | |||
| 701 | typedef struct _MPI2_SGE_CHAIN64 | ||
| 702 | { | ||
| 703 | U16 Length; | ||
| 704 | U8 NextChainOffset; | ||
| 705 | U8 Flags; | ||
| 706 | U64 Address; | ||
| 707 | } MPI2_SGE_CHAIN64, MPI2_POINTER PTR_MPI2_SGE_CHAIN64, | ||
| 708 | Mpi2SGEChain64_t, MPI2_POINTER pMpi2SGEChain64_t; | ||
| 709 | |||
| 710 | typedef struct _MPI2_SGE_CHAIN_UNION | ||
| 711 | { | ||
| 712 | U16 Length; | ||
| 713 | U8 NextChainOffset; | ||
| 714 | U8 Flags; | ||
| 715 | union | ||
| 716 | { | ||
| 717 | U32 Address32; | ||
| 718 | U64 Address64; | ||
| 719 | } u; | ||
| 720 | } MPI2_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_SGE_CHAIN_UNION, | ||
| 721 | Mpi2SGEChainUnion_t, MPI2_POINTER pMpi2SGEChainUnion_t; | ||
| 722 | |||
| 723 | |||
| 724 | /**************************************************************************** | ||
| 725 | * MPI Transaction Context Element structures | ||
| 726 | ****************************************************************************/ | ||
| 727 | |||
| 728 | typedef struct _MPI2_SGE_TRANSACTION32 | ||
| 729 | { | ||
| 730 | U8 Reserved; | ||
| 731 | U8 ContextSize; | ||
| 732 | U8 DetailsLength; | ||
| 733 | U8 Flags; | ||
| 734 | U32 TransactionContext[1]; | ||
| 735 | U32 TransactionDetails[1]; | ||
| 736 | } MPI2_SGE_TRANSACTION32, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION32, | ||
| 737 | Mpi2SGETransaction32_t, MPI2_POINTER pMpi2SGETransaction32_t; | ||
| 738 | |||
| 739 | typedef struct _MPI2_SGE_TRANSACTION64 | ||
| 740 | { | ||
| 741 | U8 Reserved; | ||
| 742 | U8 ContextSize; | ||
| 743 | U8 DetailsLength; | ||
| 744 | U8 Flags; | ||
| 745 | U32 TransactionContext[2]; | ||
| 746 | U32 TransactionDetails[1]; | ||
| 747 | } MPI2_SGE_TRANSACTION64, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION64, | ||
| 748 | Mpi2SGETransaction64_t, MPI2_POINTER pMpi2SGETransaction64_t; | ||
| 749 | |||
| 750 | typedef struct _MPI2_SGE_TRANSACTION96 | ||
| 751 | { | ||
| 752 | U8 Reserved; | ||
| 753 | U8 ContextSize; | ||
| 754 | U8 DetailsLength; | ||
| 755 | U8 Flags; | ||
| 756 | U32 TransactionContext[3]; | ||
| 757 | U32 TransactionDetails[1]; | ||
| 758 | } MPI2_SGE_TRANSACTION96, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION96, | ||
| 759 | Mpi2SGETransaction96_t, MPI2_POINTER pMpi2SGETransaction96_t; | ||
| 760 | |||
| 761 | typedef struct _MPI2_SGE_TRANSACTION128 | ||
| 762 | { | ||
| 763 | U8 Reserved; | ||
| 764 | U8 ContextSize; | ||
| 765 | U8 DetailsLength; | ||
| 766 | U8 Flags; | ||
| 767 | U32 TransactionContext[4]; | ||
| 768 | U32 TransactionDetails[1]; | ||
| 769 | } MPI2_SGE_TRANSACTION128, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION128, | ||
| 770 | Mpi2SGETransaction_t128, MPI2_POINTER pMpi2SGETransaction_t128; | ||
| 771 | |||
| 772 | typedef struct _MPI2_SGE_TRANSACTION_UNION | ||
| 773 | { | ||
| 774 | U8 Reserved; | ||
| 775 | U8 ContextSize; | ||
| 776 | U8 DetailsLength; | ||
| 777 | U8 Flags; | ||
| 778 | union | ||
| 779 | { | ||
| 780 | U32 TransactionContext32[1]; | ||
| 781 | U32 TransactionContext64[2]; | ||
| 782 | U32 TransactionContext96[3]; | ||
| 783 | U32 TransactionContext128[4]; | ||
| 784 | } u; | ||
| 785 | U32 TransactionDetails[1]; | ||
| 786 | } MPI2_SGE_TRANSACTION_UNION, MPI2_POINTER PTR_MPI2_SGE_TRANSACTION_UNION, | ||
| 787 | Mpi2SGETransactionUnion_t, MPI2_POINTER pMpi2SGETransactionUnion_t; | ||
| 788 | |||
| 789 | |||
| 790 | /**************************************************************************** | ||
| 791 | * MPI SGE union for IO SGL's | ||
| 792 | ****************************************************************************/ | ||
| 793 | |||
| 794 | typedef struct _MPI2_MPI_SGE_IO_UNION | ||
| 795 | { | ||
| 796 | union | ||
| 797 | { | ||
| 798 | MPI2_SGE_SIMPLE_UNION Simple; | ||
| 799 | MPI2_SGE_CHAIN_UNION Chain; | ||
| 800 | } u; | ||
| 801 | } MPI2_MPI_SGE_IO_UNION, MPI2_POINTER PTR_MPI2_MPI_SGE_IO_UNION, | ||
| 802 | Mpi2MpiSGEIOUnion_t, MPI2_POINTER pMpi2MpiSGEIOUnion_t; | ||
| 803 | |||
| 804 | |||
| 805 | /**************************************************************************** | ||
| 806 | * MPI SGE union for SGL's with Simple and Transaction elements | ||
| 807 | ****************************************************************************/ | ||
| 808 | |||
| 809 | typedef struct _MPI2_SGE_TRANS_SIMPLE_UNION | ||
| 810 | { | ||
| 811 | union | ||
| 812 | { | ||
| 813 | MPI2_SGE_SIMPLE_UNION Simple; | ||
| 814 | MPI2_SGE_TRANSACTION_UNION Transaction; | ||
| 815 | } u; | ||
| 816 | } MPI2_SGE_TRANS_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_SGE_TRANS_SIMPLE_UNION, | ||
| 817 | Mpi2SGETransSimpleUnion_t, MPI2_POINTER pMpi2SGETransSimpleUnion_t; | ||
| 818 | |||
| 819 | |||
| 820 | /**************************************************************************** | ||
| 821 | * All MPI SGE types union | ||
| 822 | ****************************************************************************/ | ||
| 823 | |||
| 824 | typedef struct _MPI2_MPI_SGE_UNION | ||
| 825 | { | ||
| 826 | union | ||
| 827 | { | ||
| 828 | MPI2_SGE_SIMPLE_UNION Simple; | ||
| 829 | MPI2_SGE_CHAIN_UNION Chain; | ||
| 830 | MPI2_SGE_TRANSACTION_UNION Transaction; | ||
| 831 | } u; | ||
| 832 | } MPI2_MPI_SGE_UNION, MPI2_POINTER PTR_MPI2_MPI_SGE_UNION, | ||
| 833 | Mpi2MpiSgeUnion_t, MPI2_POINTER pMpi2MpiSgeUnion_t; | ||
| 834 | |||
| 835 | |||
| 836 | /**************************************************************************** | ||
| 837 | * MPI SGE field definition and masks | ||
| 838 | ****************************************************************************/ | ||
| 839 | |||
| 840 | /* Flags field bit definitions */ | ||
| 841 | |||
| 842 | #define MPI2_SGE_FLAGS_LAST_ELEMENT (0x80) | ||
| 843 | #define MPI2_SGE_FLAGS_END_OF_BUFFER (0x40) | ||
| 844 | #define MPI2_SGE_FLAGS_ELEMENT_TYPE_MASK (0x30) | ||
| 845 | #define MPI2_SGE_FLAGS_LOCAL_ADDRESS (0x08) | ||
| 846 | #define MPI2_SGE_FLAGS_DIRECTION (0x04) | ||
| 847 | #define MPI2_SGE_FLAGS_ADDRESS_SIZE (0x02) | ||
| 848 | #define MPI2_SGE_FLAGS_END_OF_LIST (0x01) | ||
| 849 | |||
| 850 | #define MPI2_SGE_FLAGS_SHIFT (24) | ||
| 851 | |||
| 852 | #define MPI2_SGE_LENGTH_MASK (0x00FFFFFF) | ||
| 853 | #define MPI2_SGE_CHAIN_LENGTH_MASK (0x0000FFFF) | ||
| 854 | |||
| 855 | /* Element Type */ | ||
| 856 | |||
| 857 | #define MPI2_SGE_FLAGS_TRANSACTION_ELEMENT (0x00) | ||
| 858 | #define MPI2_SGE_FLAGS_SIMPLE_ELEMENT (0x10) | ||
| 859 | #define MPI2_SGE_FLAGS_CHAIN_ELEMENT (0x30) | ||
| 860 | #define MPI2_SGE_FLAGS_ELEMENT_MASK (0x30) | ||
| 861 | |||
| 862 | /* Address location */ | ||
| 863 | |||
| 864 | #define MPI2_SGE_FLAGS_SYSTEM_ADDRESS (0x00) | ||
| 865 | |||
| 866 | /* Direction */ | ||
| 867 | |||
| 868 | #define MPI2_SGE_FLAGS_IOC_TO_HOST (0x00) | ||
| 869 | #define MPI2_SGE_FLAGS_HOST_TO_IOC (0x04) | ||
| 870 | |||
| 871 | /* Address Size */ | ||
| 872 | |||
| 873 | #define MPI2_SGE_FLAGS_32_BIT_ADDRESSING (0x00) | ||
| 874 | #define MPI2_SGE_FLAGS_64_BIT_ADDRESSING (0x02) | ||
| 875 | |||
| 876 | /* Context Size */ | ||
| 877 | |||
| 878 | #define MPI2_SGE_FLAGS_32_BIT_CONTEXT (0x00) | ||
| 879 | #define MPI2_SGE_FLAGS_64_BIT_CONTEXT (0x02) | ||
| 880 | #define MPI2_SGE_FLAGS_96_BIT_CONTEXT (0x04) | ||
| 881 | #define MPI2_SGE_FLAGS_128_BIT_CONTEXT (0x06) | ||
| 882 | |||
| 883 | #define MPI2_SGE_CHAIN_OFFSET_MASK (0x00FF0000) | ||
| 884 | #define MPI2_SGE_CHAIN_OFFSET_SHIFT (16) | ||
| 885 | |||
| 886 | /**************************************************************************** | ||
| 887 | * MPI SGE operation Macros | ||
| 888 | ****************************************************************************/ | ||
| 889 | |||
| 890 | /* SIMPLE FlagsLength manipulations... */ | ||
| 891 | #define MPI2_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_SGE_FLAGS_SHIFT) | ||
| 892 | #define MPI2_SGE_GET_FLAGS(f) (((f) & ~MPI2_SGE_LENGTH_MASK) >> MPI2_SGE_FLAGS_SHIFT) | ||
| 893 | #define MPI2_SGE_LENGTH(f) ((f) & MPI2_SGE_LENGTH_MASK) | ||
| 894 | #define MPI2_SGE_CHAIN_LENGTH(f) ((f) & MPI2_SGE_CHAIN_LENGTH_MASK) | ||
| 895 | |||
| 896 | #define MPI2_SGE_SET_FLAGS_LENGTH(f,l) (MPI2_SGE_SET_FLAGS(f) | MPI2_SGE_LENGTH(l)) | ||
| 897 | |||
| 898 | #define MPI2_pSGE_GET_FLAGS(psg) MPI2_SGE_GET_FLAGS((psg)->FlagsLength) | ||
| 899 | #define MPI2_pSGE_GET_LENGTH(psg) MPI2_SGE_LENGTH((psg)->FlagsLength) | ||
| 900 | #define MPI2_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI2_SGE_SET_FLAGS_LENGTH(f,l) | ||
| 901 | |||
| 902 | /* CAUTION - The following are READ-MODIFY-WRITE! */ | ||
| 903 | #define MPI2_pSGE_SET_FLAGS(psg,f) (psg)->FlagsLength |= MPI2_SGE_SET_FLAGS(f) | ||
| 904 | #define MPI2_pSGE_SET_LENGTH(psg,l) (psg)->FlagsLength |= MPI2_SGE_LENGTH(l) | ||
| 905 | |||
| 906 | #define MPI2_GET_CHAIN_OFFSET(x) ((x & MPI2_SGE_CHAIN_OFFSET_MASK) >> MPI2_SGE_CHAIN_OFFSET_SHIFT) | ||
| 907 | |||
| 908 | |||
| 909 | /***************************************************************************** | ||
| 910 | * | ||
| 911 | * Fusion-MPT IEEE Scatter Gather Elements | ||
| 912 | * | ||
| 913 | *****************************************************************************/ | ||
| 914 | |||
| 915 | /**************************************************************************** | ||
| 916 | * IEEE Simple Element structures | ||
| 917 | ****************************************************************************/ | ||
| 918 | |||
| 919 | typedef struct _MPI2_IEEE_SGE_SIMPLE32 | ||
| 920 | { | ||
| 921 | U32 Address; | ||
| 922 | U32 FlagsLength; | ||
| 923 | } MPI2_IEEE_SGE_SIMPLE32, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE32, | ||
| 924 | Mpi2IeeeSgeSimple32_t, MPI2_POINTER pMpi2IeeeSgeSimple32_t; | ||
| 925 | |||
| 926 | typedef struct _MPI2_IEEE_SGE_SIMPLE64 | ||
| 927 | { | ||
| 928 | U64 Address; | ||
| 929 | U32 Length; | ||
| 930 | U16 Reserved1; | ||
| 931 | U8 Reserved2; | ||
| 932 | U8 Flags; | ||
| 933 | } MPI2_IEEE_SGE_SIMPLE64, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE64, | ||
| 934 | Mpi2IeeeSgeSimple64_t, MPI2_POINTER pMpi2IeeeSgeSimple64_t; | ||
| 935 | |||
| 936 | typedef union _MPI2_IEEE_SGE_SIMPLE_UNION | ||
| 937 | { | ||
| 938 | MPI2_IEEE_SGE_SIMPLE32 Simple32; | ||
| 939 | MPI2_IEEE_SGE_SIMPLE64 Simple64; | ||
| 940 | } MPI2_IEEE_SGE_SIMPLE_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_SIMPLE_UNION, | ||
| 941 | Mpi2IeeeSgeSimpleUnion_t, MPI2_POINTER pMpi2IeeeSgeSimpleUnion_t; | ||
| 942 | |||
| 943 | |||
| 944 | /**************************************************************************** | ||
| 945 | * IEEE Chain Element structures | ||
| 946 | ****************************************************************************/ | ||
| 947 | |||
| 948 | typedef MPI2_IEEE_SGE_SIMPLE32 MPI2_IEEE_SGE_CHAIN32; | ||
| 949 | |||
| 950 | typedef MPI2_IEEE_SGE_SIMPLE64 MPI2_IEEE_SGE_CHAIN64; | ||
| 951 | |||
| 952 | typedef union _MPI2_IEEE_SGE_CHAIN_UNION | ||
| 953 | { | ||
| 954 | MPI2_IEEE_SGE_CHAIN32 Chain32; | ||
| 955 | MPI2_IEEE_SGE_CHAIN64 Chain64; | ||
| 956 | } MPI2_IEEE_SGE_CHAIN_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_CHAIN_UNION, | ||
| 957 | Mpi2IeeeSgeChainUnion_t, MPI2_POINTER pMpi2IeeeSgeChainUnion_t; | ||
| 958 | |||
| 959 | |||
| 960 | /**************************************************************************** | ||
| 961 | * All IEEE SGE types union | ||
| 962 | ****************************************************************************/ | ||
| 963 | |||
| 964 | typedef struct _MPI2_IEEE_SGE_UNION | ||
| 965 | { | ||
| 966 | union | ||
| 967 | { | ||
| 968 | MPI2_IEEE_SGE_SIMPLE_UNION Simple; | ||
| 969 | MPI2_IEEE_SGE_CHAIN_UNION Chain; | ||
| 970 | } u; | ||
| 971 | } MPI2_IEEE_SGE_UNION, MPI2_POINTER PTR_MPI2_IEEE_SGE_UNION, | ||
| 972 | Mpi2IeeeSgeUnion_t, MPI2_POINTER pMpi2IeeeSgeUnion_t; | ||
| 973 | |||
| 974 | |||
| 975 | /**************************************************************************** | ||
| 976 | * IEEE SGE field definitions and masks | ||
| 977 | ****************************************************************************/ | ||
| 978 | |||
| 979 | /* Flags field bit definitions */ | ||
| 980 | |||
| 981 | #define MPI2_IEEE_SGE_FLAGS_ELEMENT_TYPE_MASK (0x80) | ||
| 982 | |||
| 983 | #define MPI2_IEEE32_SGE_FLAGS_SHIFT (24) | ||
| 984 | |||
| 985 | #define MPI2_IEEE32_SGE_LENGTH_MASK (0x00FFFFFF) | ||
| 986 | |||
| 987 | /* Element Type */ | ||
| 988 | |||
| 989 | #define MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT (0x00) | ||
| 990 | #define MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT (0x80) | ||
| 991 | |||
| 992 | /* Data Location Address Space */ | ||
| 993 | |||
| 994 | #define MPI2_IEEE_SGE_FLAGS_ADDR_MASK (0x03) | ||
| 995 | #define MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR (0x00) | ||
| 996 | #define MPI2_IEEE_SGE_FLAGS_IOCDDR_ADDR (0x01) | ||
| 997 | #define MPI2_IEEE_SGE_FLAGS_IOCPLB_ADDR (0x02) | ||
| 998 | #define MPI2_IEEE_SGE_FLAGS_IOCPLBNTA_ADDR (0x03) | ||
| 999 | |||
| 1000 | |||
| 1001 | /**************************************************************************** | ||
| 1002 | * IEEE SGE operation Macros | ||
| 1003 | ****************************************************************************/ | ||
| 1004 | |||
| 1005 | /* SIMPLE FlagsLength manipulations... */ | ||
| 1006 | #define MPI2_IEEE32_SGE_SET_FLAGS(f) ((U32)(f) << MPI2_IEEE32_SGE_FLAGS_SHIFT) | ||
| 1007 | #define MPI2_IEEE32_SGE_GET_FLAGS(f) (((f) & ~MPI2_IEEE32_SGE_LENGTH_MASK) >> MPI2_IEEE32_SGE_FLAGS_SHIFT) | ||
| 1008 | #define MPI2_IEEE32_SGE_LENGTH(f) ((f) & MPI2_IEEE32_SGE_LENGTH_MASK) | ||
| 1009 | |||
| 1010 | #define MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f, l) (MPI2_IEEE32_SGE_SET_FLAGS(f) | MPI2_IEEE32_SGE_LENGTH(l)) | ||
| 1011 | |||
| 1012 | #define MPI2_IEEE32_pSGE_GET_FLAGS(psg) MPI2_IEEE32_SGE_GET_FLAGS((psg)->FlagsLength) | ||
| 1013 | #define MPI2_IEEE32_pSGE_GET_LENGTH(psg) MPI2_IEEE32_SGE_LENGTH((psg)->FlagsLength) | ||
| 1014 | #define MPI2_IEEE32_pSGE_SET_FLAGS_LENGTH(psg,f,l) (psg)->FlagsLength = MPI2_IEEE32_SGE_SET_FLAGS_LENGTH(f,l) | ||
| 1015 | |||
| 1016 | /* CAUTION - The following are READ-MODIFY-WRITE! */ | ||
| 1017 | #define MPI2_IEEE32_pSGE_SET_FLAGS(psg,f) (psg)->FlagsLength |= MPI2_IEEE32_SGE_SET_FLAGS(f) | ||
| 1018 | #define MPI2_IEEE32_pSGE_SET_LENGTH(psg,l) (psg)->FlagsLength |= MPI2_IEEE32_SGE_LENGTH(l) | ||
| 1019 | |||
| 1020 | |||
| 1021 | |||
| 1022 | |||
| 1023 | /***************************************************************************** | ||
| 1024 | * | ||
| 1025 | * Fusion-MPT MPI/IEEE Scatter Gather Unions | ||
| 1026 | * | ||
| 1027 | *****************************************************************************/ | ||
| 1028 | |||
| 1029 | typedef union _MPI2_SIMPLE_SGE_UNION | ||
| 1030 | { | ||
| 1031 | MPI2_SGE_SIMPLE_UNION MpiSimple; | ||
| 1032 | MPI2_IEEE_SGE_SIMPLE_UNION IeeeSimple; | ||
| 1033 | } MPI2_SIMPLE_SGE_UNION, MPI2_POINTER PTR_MPI2_SIMPLE_SGE_UNION, | ||
| 1034 | Mpi2SimpleSgeUntion_t, MPI2_POINTER pMpi2SimpleSgeUntion_t; | ||
| 1035 | |||
| 1036 | |||
| 1037 | typedef union _MPI2_SGE_IO_UNION | ||
| 1038 | { | ||
| 1039 | MPI2_SGE_SIMPLE_UNION MpiSimple; | ||
| 1040 | MPI2_SGE_CHAIN_UNION MpiChain; | ||
| 1041 | MPI2_IEEE_SGE_SIMPLE_UNION IeeeSimple; | ||
| 1042 | MPI2_IEEE_SGE_CHAIN_UNION IeeeChain; | ||
| 1043 | } MPI2_SGE_IO_UNION, MPI2_POINTER PTR_MPI2_SGE_IO_UNION, | ||
| 1044 | Mpi2SGEIOUnion_t, MPI2_POINTER pMpi2SGEIOUnion_t; | ||
| 1045 | |||
| 1046 | |||
| 1047 | /**************************************************************************** | ||
| 1048 | * | ||
| 1049 | * Values for SGLFlags field, used in many request messages with an SGL | ||
| 1050 | * | ||
| 1051 | ****************************************************************************/ | ||
| 1052 | |||
| 1053 | /* values for MPI SGL Data Location Address Space subfield */ | ||
| 1054 | #define MPI2_SGLFLAGS_ADDRESS_SPACE_MASK (0x0C) | ||
| 1055 | #define MPI2_SGLFLAGS_SYSTEM_ADDRESS_SPACE (0x00) | ||
| 1056 | #define MPI2_SGLFLAGS_IOCDDR_ADDRESS_SPACE (0x04) | ||
| 1057 | #define MPI2_SGLFLAGS_IOCPLB_ADDRESS_SPACE (0x08) | ||
| 1058 | #define MPI2_SGLFLAGS_IOCPLBNTA_ADDRESS_SPACE (0x0C) | ||
| 1059 | /* values for SGL Type subfield */ | ||
| 1060 | #define MPI2_SGLFLAGS_SGL_TYPE_MASK (0x03) | ||
| 1061 | #define MPI2_SGLFLAGS_SGL_TYPE_MPI (0x00) | ||
| 1062 | #define MPI2_SGLFLAGS_SGL_TYPE_IEEE32 (0x01) | ||
| 1063 | #define MPI2_SGLFLAGS_SGL_TYPE_IEEE64 (0x02) | ||
| 1064 | |||
| 1065 | |||
| 1066 | #endif | ||
| 1067 | |||
diff --git a/drivers/scsi/mpt2sas/mpi/mpi2_cnfg.h b/drivers/scsi/mpt2sas/mpi/mpi2_cnfg.h new file mode 100644 index 000000000000..2f27cf6d6c65 --- /dev/null +++ b/drivers/scsi/mpt2sas/mpi/mpi2_cnfg.h | |||
| @@ -0,0 +1,2151 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (c) 2000-2009 LSI Corporation. | ||
| 3 | * | ||
| 4 | * | ||
| 5 | * Name: mpi2_cnfg.h | ||
| 6 | * Title: MPI Configuration messages and pages | ||
| 7 | * Creation Date: November 10, 2006 | ||
| 8 | * | ||
| 9 | * mpi2_cnfg.h Version: 02.00.10 | ||
| 10 | * | ||
| 11 | * Version History | ||
| 12 | * --------------- | ||
| 13 | * | ||
| 14 | * Date Version Description | ||
| 15 | * -------- -------- ------------------------------------------------------ | ||
| 16 | * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. | ||
| 17 | * 06-04-07 02.00.01 Added defines for SAS IO Unit Page 2 PhyFlags. | ||
| 18 | * Added Manufacturing Page 11. | ||
| 19 | * Added MPI2_SAS_EXPANDER0_FLAGS_CONNECTOR_END_DEVICE | ||
| 20 | * define. | ||
| 21 | * 06-26-07 02.00.02 Adding generic structure for product-specific | ||
| 22 | * Manufacturing pages: MPI2_CONFIG_PAGE_MANUFACTURING_PS. | ||
| 23 | * Rework of BIOS Page 2 configuration page. | ||
| 24 | * Fixed MPI2_BIOSPAGE2_BOOT_DEVICE to be a union of the | ||
| 25 | * forms. | ||
| 26 | * Added configuration pages IOC Page 8 and Driver | ||
| 27 | * Persistent Mapping Page 0. | ||
| 28 | * 08-31-07 02.00.03 Modified configuration pages dealing with Integrated | ||
| 29 | * RAID (Manufacturing Page 4, RAID Volume Pages 0 and 1, | ||
| 30 | * RAID Physical Disk Pages 0 and 1, RAID Configuration | ||
| 31 | * Page 0). | ||
| 32 | * Added new value for AccessStatus field of SAS Device | ||
| 33 | * Page 0 (_SATA_NEEDS_INITIALIZATION). | ||
| 34 | * 10-31-07 02.00.04 Added missing SEPDevHandle field to | ||
| 35 | * MPI2_CONFIG_PAGE_SAS_ENCLOSURE_0. | ||
| 36 | * 12-18-07 02.00.05 Modified IO Unit Page 0 to use 32-bit version fields for | ||
| 37 | * NVDATA. | ||
| 38 | * Modified IOC Page 7 to use masks and added field for | ||
| 39 | * SASBroadcastPrimitiveMasks. | ||
| 40 | * Added MPI2_CONFIG_PAGE_BIOS_4. | ||
| 41 | * Added MPI2_CONFIG_PAGE_LOG_0. | ||
| 42 | * 02-29-08 02.00.06 Modified various names to make them 32-character unique. | ||
| 43 | * Added SAS Device IDs. | ||
| 44 | * Updated Integrated RAID configuration pages including | ||
| 45 | * Manufacturing Page 4, IOC Page 6, and RAID Configuration | ||
| 46 | * Page 0. | ||
| 47 | * 05-21-08 02.00.07 Added define MPI2_MANPAGE4_MIX_SSD_SAS_SATA. | ||
| 48 | * Added define MPI2_MANPAGE4_PHYSDISK_128MB_COERCION. | ||
| 49 | * Fixed define MPI2_IOCPAGE8_FLAGS_ENCLOSURE_SLOT_MAPPING. | ||
| 50 | * Added missing MaxNumRoutedSasAddresses field to | ||
| 51 | * MPI2_CONFIG_PAGE_EXPANDER_0. | ||
| 52 | * Added SAS Port Page 0. | ||
| 53 | * Modified structure layout for | ||
| 54 | * MPI2_CONFIG_PAGE_DRIVER_MAPPING_0. | ||
| 55 | * 06-27-08 02.00.08 Changed MPI2_CONFIG_PAGE_RD_PDISK_1 to use | ||
| 56 | * MPI2_RAID_PHYS_DISK1_PATH_MAX to size the array. | ||
| 57 | * 10-02-08 02.00.09 Changed MPI2_RAID_PGAD_CONFIGNUM_MASK from 0x0000FFFF | ||
| 58 | * to 0x000000FF. | ||
| 59 | * Added two new values for the Physical Disk Coercion Size | ||
| 60 | * bits in the Flags field of Manufacturing Page 4. | ||
| 61 | * Added product-specific Manufacturing pages 16 to 31. | ||
| 62 | * Modified Flags bits for controlling write cache on SATA | ||
| 63 | * drives in IO Unit Page 1. | ||
| 64 | * Added new bit to AdditionalControlFlags of SAS IO Unit | ||
| 65 | * Page 1 to control Invalid Topology Correction. | ||
| 66 | * Added additional defines for RAID Volume Page 0 | ||
| 67 | * VolumeStatusFlags field. | ||
| 68 | * Modified meaning of RAID Volume Page 0 VolumeSettings | ||
| 69 | * define for auto-configure of hot-swap drives. | ||
| 70 | * Added SupportedPhysDisks field to RAID Volume Page 1 and | ||
| 71 | * added related defines. | ||
| 72 | * Added PhysDiskAttributes field (and related defines) to | ||
| 73 | * RAID Physical Disk Page 0. | ||
| 74 | * Added MPI2_SAS_PHYINFO_PHY_VACANT define. | ||
| 75 | * Added three new DiscoveryStatus bits for SAS IO Unit | ||
| 76 | * Page 0 and SAS Expander Page 0. | ||
| 77 | * Removed multiplexing information from SAS IO Unit pages. | ||
| 78 | * Added BootDeviceWaitTime field to SAS IO Unit Page 4. | ||
| 79 | * Removed Zone Address Resolved bit from PhyInfo and from | ||
| 80 | * Expander Page 0 Flags field. | ||
| 81 | * Added two new AccessStatus values to SAS Device Page 0 | ||
| 82 | * for indicating routing problems. Added 3 reserved words | ||
| 83 | * to this page. | ||
| 84 | * 01-19-09 02.00.10 Fixed defines for GPIOVal field of IO Unit Page 3. | ||
| 85 | * Inserted missing reserved field into structure for IOC | ||
| 86 | * Page 6. | ||
| 87 | * Added more pending task bits to RAID Volume Page 0 | ||
| 88 | * VolumeStatusFlags defines. | ||
| 89 | * Added MPI2_PHYSDISK0_STATUS_FLAG_NOT_CERTIFIED define. | ||
| 90 | * Added a new DiscoveryStatus bit for SAS IO Unit Page 0 | ||
| 91 | * and SAS Expander Page 0 to flag a downstream initiator | ||
| 92 | * when in simplified routing mode. | ||
| 93 | * Removed SATA Init Failure defines for DiscoveryStatus | ||
| 94 | * fields of SAS IO Unit Page 0 and SAS Expander Page 0. | ||
| 95 | * Added MPI2_SAS_DEVICE0_ASTATUS_DEVICE_BLOCKED define. | ||
| 96 | * Added PortGroups, DmaGroup, and ControlGroup fields to | ||
| 97 | * SAS Device Page 0. | ||
| 98 | * -------------------------------------------------------------------------- | ||
| 99 | */ | ||
| 100 | |||
| 101 | #ifndef MPI2_CNFG_H | ||
| 102 | #define MPI2_CNFG_H | ||
| 103 | |||
| 104 | /***************************************************************************** | ||
| 105 | * Configuration Page Header and defines | ||
| 106 | *****************************************************************************/ | ||
| 107 | |||
| 108 | /* Config Page Header */ | ||
| 109 | typedef struct _MPI2_CONFIG_PAGE_HEADER | ||
| 110 | { | ||
| 111 | U8 PageVersion; /* 0x00 */ | ||
| 112 | U8 PageLength; /* 0x01 */ | ||
| 113 | U8 PageNumber; /* 0x02 */ | ||
| 114 | U8 PageType; /* 0x03 */ | ||
| 115 | } MPI2_CONFIG_PAGE_HEADER, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_HEADER, | ||
| 116 | Mpi2ConfigPageHeader_t, MPI2_POINTER pMpi2ConfigPageHeader_t; | ||
| 117 | |||
| 118 | typedef union _MPI2_CONFIG_PAGE_HEADER_UNION | ||
| 119 | { | ||
| 120 | MPI2_CONFIG_PAGE_HEADER Struct; | ||
| 121 | U8 Bytes[4]; | ||
| 122 | U16 Word16[2]; | ||
| 123 | U32 Word32; | ||
| 124 | } MPI2_CONFIG_PAGE_HEADER_UNION, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_HEADER_UNION, | ||
| 125 | Mpi2ConfigPageHeaderUnion, MPI2_POINTER pMpi2ConfigPageHeaderUnion; | ||
| 126 | |||
| 127 | /* Extended Config Page Header */ | ||
| 128 | typedef struct _MPI2_CONFIG_EXTENDED_PAGE_HEADER | ||
| 129 | { | ||
| 130 | U8 PageVersion; /* 0x00 */ | ||
| 131 | U8 Reserved1; /* 0x01 */ | ||
| 132 | U8 PageNumber; /* 0x02 */ | ||
| 133 | U8 PageType; /* 0x03 */ | ||
| 134 | U16 ExtPageLength; /* 0x04 */ | ||
| 135 | U8 ExtPageType; /* 0x06 */ | ||
| 136 | U8 Reserved2; /* 0x07 */ | ||
| 137 | } MPI2_CONFIG_EXTENDED_PAGE_HEADER, | ||
| 138 | MPI2_POINTER PTR_MPI2_CONFIG_EXTENDED_PAGE_HEADER, | ||
| 139 | Mpi2ConfigExtendedPageHeader_t, MPI2_POINTER pMpi2ConfigExtendedPageHeader_t; | ||
| 140 | |||
| 141 | typedef union _MPI2_CONFIG_EXT_PAGE_HEADER_UNION | ||
| 142 | { | ||
| 143 | MPI2_CONFIG_PAGE_HEADER Struct; | ||
| 144 | MPI2_CONFIG_EXTENDED_PAGE_HEADER Ext; | ||
| 145 | U8 Bytes[8]; | ||
| 146 | U16 Word16[4]; | ||
| 147 | U32 Word32[2]; | ||
| 148 | } MPI2_CONFIG_EXT_PAGE_HEADER_UNION, MPI2_POINTER PTR_MPI2_CONFIG_EXT_PAGE_HEADER_UNION, | ||
| 149 | Mpi2ConfigPageExtendedHeaderUnion, MPI2_POINTER pMpi2ConfigPageExtendedHeaderUnion; | ||
| 150 | |||
| 151 | |||
| 152 | /* PageType field values */ | ||
| 153 | #define MPI2_CONFIG_PAGEATTR_READ_ONLY (0x00) | ||
| 154 | #define MPI2_CONFIG_PAGEATTR_CHANGEABLE (0x10) | ||
| 155 | #define MPI2_CONFIG_PAGEATTR_PERSISTENT (0x20) | ||
| 156 | #define MPI2_CONFIG_PAGEATTR_MASK (0xF0) | ||
| 157 | |||
| 158 | #define MPI2_CONFIG_PAGETYPE_IO_UNIT (0x00) | ||
| 159 | #define MPI2_CONFIG_PAGETYPE_IOC (0x01) | ||
| 160 | #define MPI2_CONFIG_PAGETYPE_BIOS (0x02) | ||
| 161 | #define MPI2_CONFIG_PAGETYPE_RAID_VOLUME (0x08) | ||
| 162 | #define MPI2_CONFIG_PAGETYPE_MANUFACTURING (0x09) | ||
| 163 | #define MPI2_CONFIG_PAGETYPE_RAID_PHYSDISK (0x0A) | ||
| 164 | #define MPI2_CONFIG_PAGETYPE_EXTENDED (0x0F) | ||
| 165 | #define MPI2_CONFIG_PAGETYPE_MASK (0x0F) | ||
| 166 | |||
| 167 | #define MPI2_CONFIG_TYPENUM_MASK (0x0FFF) | ||
| 168 | |||
| 169 | |||
| 170 | /* ExtPageType field values */ | ||
| 171 | #define MPI2_CONFIG_EXTPAGETYPE_SAS_IO_UNIT (0x10) | ||
| 172 | #define MPI2_CONFIG_EXTPAGETYPE_SAS_EXPANDER (0x11) | ||
| 173 | #define MPI2_CONFIG_EXTPAGETYPE_SAS_DEVICE (0x12) | ||
| 174 | #define MPI2_CONFIG_EXTPAGETYPE_SAS_PHY (0x13) | ||
| 175 | #define MPI2_CONFIG_EXTPAGETYPE_LOG (0x14) | ||
| 176 | #define MPI2_CONFIG_EXTPAGETYPE_ENCLOSURE (0x15) | ||
| 177 | #define MPI2_CONFIG_EXTPAGETYPE_RAID_CONFIG (0x16) | ||
| 178 | #define MPI2_CONFIG_EXTPAGETYPE_DRIVER_MAPPING (0x17) | ||
| 179 | #define MPI2_CONFIG_EXTPAGETYPE_SAS_PORT (0x18) | ||
| 180 | |||
| 181 | |||
| 182 | /***************************************************************************** | ||
| 183 | * PageAddress defines | ||
| 184 | *****************************************************************************/ | ||
| 185 | |||
| 186 | /* RAID Volume PageAddress format */ | ||
| 187 | #define MPI2_RAID_VOLUME_PGAD_FORM_MASK (0xF0000000) | ||
| 188 | #define MPI2_RAID_VOLUME_PGAD_FORM_GET_NEXT_HANDLE (0x00000000) | ||
| 189 | #define MPI2_RAID_VOLUME_PGAD_FORM_HANDLE (0x10000000) | ||
| 190 | |||
| 191 | #define MPI2_RAID_VOLUME_PGAD_HANDLE_MASK (0x0000FFFF) | ||
| 192 | |||
| 193 | |||
| 194 | /* RAID Physical Disk PageAddress format */ | ||
| 195 | #define MPI2_PHYSDISK_PGAD_FORM_MASK (0xF0000000) | ||
| 196 | #define MPI2_PHYSDISK_PGAD_FORM_GET_NEXT_PHYSDISKNUM (0x00000000) | ||
| 197 | #define MPI2_PHYSDISK_PGAD_FORM_PHYSDISKNUM (0x10000000) | ||
| 198 | #define MPI2_PHYSDISK_PGAD_FORM_DEVHANDLE (0x20000000) | ||
| 199 | |||
| 200 | #define MPI2_PHYSDISK_PGAD_PHYSDISKNUM_MASK (0x000000FF) | ||
| 201 | #define MPI2_PHYSDISK_PGAD_DEVHANDLE_MASK (0x0000FFFF) | ||
| 202 | |||
| 203 | |||
| 204 | /* SAS Expander PageAddress format */ | ||
| 205 | #define MPI2_SAS_EXPAND_PGAD_FORM_MASK (0xF0000000) | ||
| 206 | #define MPI2_SAS_EXPAND_PGAD_FORM_GET_NEXT_HNDL (0x00000000) | ||
| 207 | #define MPI2_SAS_EXPAND_PGAD_FORM_HNDL_PHY_NUM (0x10000000) | ||
| 208 | #define MPI2_SAS_EXPAND_PGAD_FORM_HNDL (0x20000000) | ||
| 209 | |||
| 210 | #define MPI2_SAS_EXPAND_PGAD_HANDLE_MASK (0x0000FFFF) | ||
| 211 | #define MPI2_SAS_EXPAND_PGAD_PHYNUM_MASK (0x00FF0000) | ||
| 212 | #define MPI2_SAS_EXPAND_PGAD_PHYNUM_SHIFT (16) | ||
| 213 | |||
| 214 | |||
| 215 | /* SAS Device PageAddress format */ | ||
| 216 | #define MPI2_SAS_DEVICE_PGAD_FORM_MASK (0xF0000000) | ||
| 217 | #define MPI2_SAS_DEVICE_PGAD_FORM_GET_NEXT_HANDLE (0x00000000) | ||
| 218 | #define MPI2_SAS_DEVICE_PGAD_FORM_HANDLE (0x20000000) | ||
| 219 | |||
| 220 | #define MPI2_SAS_DEVICE_PGAD_HANDLE_MASK (0x0000FFFF) | ||
| 221 | |||
| 222 | |||
| 223 | /* SAS PHY PageAddress format */ | ||
| 224 | #define MPI2_SAS_PHY_PGAD_FORM_MASK (0xF0000000) | ||
| 225 | #define MPI2_SAS_PHY_PGAD_FORM_PHY_NUMBER (0x00000000) | ||
| 226 | #define MPI2_SAS_PHY_PGAD_FORM_PHY_TBL_INDEX (0x10000000) | ||
| 227 | |||
| 228 | #define MPI2_SAS_PHY_PGAD_PHY_NUMBER_MASK (0x000000FF) | ||
| 229 | #define MPI2_SAS_PHY_PGAD_PHY_TBL_INDEX_MASK (0x0000FFFF) | ||
| 230 | |||
| 231 | |||
| 232 | /* SAS Port PageAddress format */ | ||
| 233 | #define MPI2_SASPORT_PGAD_FORM_MASK (0xF0000000) | ||
| 234 | #define MPI2_SASPORT_PGAD_FORM_GET_NEXT_PORT (0x00000000) | ||
| 235 | #define MPI2_SASPORT_PGAD_FORM_PORT_NUM (0x10000000) | ||
| 236 | |||
| 237 | #define MPI2_SASPORT_PGAD_PORTNUMBER_MASK (0x00000FFF) | ||
| 238 | |||
| 239 | |||
| 240 | /* SAS Enclosure PageAddress format */ | ||
| 241 | #define MPI2_SAS_ENCLOS_PGAD_FORM_MASK (0xF0000000) | ||
| 242 | #define MPI2_SAS_ENCLOS_PGAD_FORM_GET_NEXT_HANDLE (0x00000000) | ||
| 243 | #define MPI2_SAS_ENCLOS_PGAD_FORM_HANDLE (0x10000000) | ||
| 244 | |||
| 245 | #define MPI2_SAS_ENCLOS_PGAD_HANDLE_MASK (0x0000FFFF) | ||
| 246 | |||
| 247 | |||
| 248 | /* RAID Configuration PageAddress format */ | ||
| 249 | #define MPI2_RAID_PGAD_FORM_MASK (0xF0000000) | ||
| 250 | #define MPI2_RAID_PGAD_FORM_GET_NEXT_CONFIGNUM (0x00000000) | ||
| 251 | #define MPI2_RAID_PGAD_FORM_CONFIGNUM (0x10000000) | ||
| 252 | #define MPI2_RAID_PGAD_FORM_ACTIVE_CONFIG (0x20000000) | ||
| 253 | |||
| 254 | #define MPI2_RAID_PGAD_CONFIGNUM_MASK (0x000000FF) | ||
| 255 | |||
| 256 | |||
| 257 | /* Driver Persistent Mapping PageAddress format */ | ||
| 258 | #define MPI2_DPM_PGAD_FORM_MASK (0xF0000000) | ||
| 259 | #define MPI2_DPM_PGAD_FORM_ENTRY_RANGE (0x00000000) | ||
| 260 | |||
| 261 | #define MPI2_DPM_PGAD_ENTRY_COUNT_MASK (0x0FFF0000) | ||
| 262 | #define MPI2_DPM_PGAD_ENTRY_COUNT_SHIFT (16) | ||
| 263 | #define MPI2_DPM_PGAD_START_ENTRY_MASK (0x0000FFFF) | ||
| 264 | |||
| 265 | |||
| 266 | /**************************************************************************** | ||
| 267 | * Configuration messages | ||
| 268 | ****************************************************************************/ | ||
| 269 | |||
| 270 | /* Configuration Request Message */ | ||
| 271 | typedef struct _MPI2_CONFIG_REQUEST | ||
| 272 | { | ||
| 273 | U8 Action; /* 0x00 */ | ||
| 274 | U8 SGLFlags; /* 0x01 */ | ||
| 275 | U8 ChainOffset; /* 0x02 */ | ||
| 276 | U8 Function; /* 0x03 */ | ||
| 277 | U16 ExtPageLength; /* 0x04 */ | ||
| 278 | U8 ExtPageType; /* 0x06 */ | ||
| 279 | U8 MsgFlags; /* 0x07 */ | ||
| 280 | U8 VP_ID; /* 0x08 */ | ||
| 281 | U8 VF_ID; /* 0x09 */ | ||
| 282 | U16 Reserved1; /* 0x0A */ | ||
| 283 | U32 Reserved2; /* 0x0C */ | ||
| 284 | U32 Reserved3; /* 0x10 */ | ||
| 285 | MPI2_CONFIG_PAGE_HEADER Header; /* 0x14 */ | ||
| 286 | U32 PageAddress; /* 0x18 */ | ||
| 287 | MPI2_SGE_IO_UNION PageBufferSGE; /* 0x1C */ | ||
| 288 | } MPI2_CONFIG_REQUEST, MPI2_POINTER PTR_MPI2_CONFIG_REQUEST, | ||
| 289 | Mpi2ConfigRequest_t, MPI2_POINTER pMpi2ConfigRequest_t; | ||
| 290 | |||
| 291 | /* values for the Action field */ | ||
| 292 | #define MPI2_CONFIG_ACTION_PAGE_HEADER (0x00) | ||
| 293 | #define MPI2_CONFIG_ACTION_PAGE_READ_CURRENT (0x01) | ||
| 294 | #define MPI2_CONFIG_ACTION_PAGE_WRITE_CURRENT (0x02) | ||
| 295 | #define MPI2_CONFIG_ACTION_PAGE_DEFAULT (0x03) | ||
| 296 | #define MPI2_CONFIG_ACTION_PAGE_WRITE_NVRAM (0x04) | ||
| 297 | #define MPI2_CONFIG_ACTION_PAGE_READ_DEFAULT (0x05) | ||
| 298 | #define MPI2_CONFIG_ACTION_PAGE_READ_NVRAM (0x06) | ||
| 299 | #define MPI2_CONFIG_ACTION_PAGE_GET_CHANGEABLE (0x07) | ||
| 300 | |||
| 301 | /* values for SGLFlags field are in the SGL section of mpi2.h */ | ||
| 302 | |||
| 303 | |||
| 304 | /* Config Reply Message */ | ||
| 305 | typedef struct _MPI2_CONFIG_REPLY | ||
| 306 | { | ||
| 307 | U8 Action; /* 0x00 */ | ||
| 308 | U8 SGLFlags; /* 0x01 */ | ||
| 309 | U8 MsgLength; /* 0x02 */ | ||
| 310 | U8 Function; /* 0x03 */ | ||
| 311 | U16 ExtPageLength; /* 0x04 */ | ||
| 312 | U8 ExtPageType; /* 0x06 */ | ||
| 313 | U8 MsgFlags; /* 0x07 */ | ||
| 314 | U8 VP_ID; /* 0x08 */ | ||
| 315 | U8 VF_ID; /* 0x09 */ | ||
| 316 | U16 Reserved1; /* 0x0A */ | ||
| 317 | U16 Reserved2; /* 0x0C */ | ||
| 318 | U16 IOCStatus; /* 0x0E */ | ||
| 319 | U32 IOCLogInfo; /* 0x10 */ | ||
| 320 | MPI2_CONFIG_PAGE_HEADER Header; /* 0x14 */ | ||
| 321 | } MPI2_CONFIG_REPLY, MPI2_POINTER PTR_MPI2_CONFIG_REPLY, | ||
| 322 | Mpi2ConfigReply_t, MPI2_POINTER pMpi2ConfigReply_t; | ||
| 323 | |||
| 324 | |||
| 325 | |||
| 326 | /***************************************************************************** | ||
| 327 | * | ||
| 328 | * C o n f i g u r a t i o n P a g e s | ||
| 329 | * | ||
| 330 | *****************************************************************************/ | ||
| 331 | |||
| 332 | /**************************************************************************** | ||
| 333 | * Manufacturing Config pages | ||
| 334 | ****************************************************************************/ | ||
| 335 | |||
| 336 | #define MPI2_MFGPAGE_VENDORID_LSI (0x1000) | ||
| 337 | |||
| 338 | /* SAS */ | ||
| 339 | #define MPI2_MFGPAGE_DEVID_SAS2004 (0x0070) | ||
| 340 | #define MPI2_MFGPAGE_DEVID_SAS2008 (0x0072) | ||
| 341 | #define MPI2_MFGPAGE_DEVID_SAS2108_1 (0x0074) | ||
| 342 | #define MPI2_MFGPAGE_DEVID_SAS2108_2 (0x0076) | ||
| 343 | #define MPI2_MFGPAGE_DEVID_SAS2108_3 (0x0077) | ||
| 344 | #define MPI2_MFGPAGE_DEVID_SAS2116_1 (0x0064) | ||
| 345 | #define MPI2_MFGPAGE_DEVID_SAS2116_2 (0x0065) | ||
| 346 | |||
| 347 | |||
| 348 | /* Manufacturing Page 0 */ | ||
| 349 | |||
| 350 | typedef struct _MPI2_CONFIG_PAGE_MAN_0 | ||
| 351 | { | ||
| 352 | MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ | ||
| 353 | U8 ChipName[16]; /* 0x04 */ | ||
| 354 | U8 ChipRevision[8]; /* 0x14 */ | ||
| 355 | U8 BoardName[16]; /* 0x1C */ | ||
| 356 | U8 BoardAssembly[16]; /* 0x2C */ | ||
| 357 | U8 BoardTracerNumber[16]; /* 0x3C */ | ||
| 358 | } MPI2_CONFIG_PAGE_MAN_0, | ||
| 359 | MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_0, | ||
| 360 | Mpi2ManufacturingPage0_t, MPI2_POINTER pMpi2ManufacturingPage0_t; | ||
| 361 | |||
| 362 | #define MPI2_MANUFACTURING0_PAGEVERSION (0x00) | ||
| 363 | |||
| 364 | |||
| 365 | /* Manufacturing Page 1 */ | ||
| 366 | |||
| 367 | typedef struct _MPI2_CONFIG_PAGE_MAN_1 | ||
| 368 | { | ||
| 369 | MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ | ||
| 370 | U8 VPD[256]; /* 0x04 */ | ||
| 371 | } MPI2_CONFIG_PAGE_MAN_1, | ||
| 372 | MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_1, | ||
| 373 | Mpi2ManufacturingPage1_t, MPI2_POINTER pMpi2ManufacturingPage1_t; | ||
| 374 | |||
| 375 | #define MPI2_MANUFACTURING1_PAGEVERSION (0x00) | ||
| 376 | |||
| 377 | |||
| 378 | typedef struct _MPI2_CHIP_REVISION_ID | ||
| 379 | { | ||
| 380 | U16 DeviceID; /* 0x00 */ | ||
| 381 | U8 PCIRevisionID; /* 0x02 */ | ||
| 382 | U8 Reserved; /* 0x03 */ | ||
| 383 | } MPI2_CHIP_REVISION_ID, MPI2_POINTER PTR_MPI2_CHIP_REVISION_ID, | ||
| 384 | Mpi2ChipRevisionId_t, MPI2_POINTER pMpi2ChipRevisionId_t; | ||
| 385 | |||
| 386 | |||
| 387 | /* Manufacturing Page 2 */ | ||
| 388 | |||
| 389 | /* | ||
| 390 | * Host code (drivers, BIOS, utilities, etc.) should leave this define set to | ||
| 391 | * one and check Header.PageLength at runtime. | ||
| 392 | */ | ||
| 393 | #ifndef MPI2_MAN_PAGE_2_HW_SETTINGS_WORDS | ||
| 394 | #define MPI2_MAN_PAGE_2_HW_SETTINGS_WORDS (1) | ||
| 395 | #endif | ||
| 396 | |||
| 397 | typedef struct _MPI2_CONFIG_PAGE_MAN_2 | ||
| 398 | { | ||
| 399 | MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ | ||
| 400 | MPI2_CHIP_REVISION_ID ChipId; /* 0x04 */ | ||
| 401 | U32 HwSettings[MPI2_MAN_PAGE_2_HW_SETTINGS_WORDS];/* 0x08 */ | ||
| 402 | } MPI2_CONFIG_PAGE_MAN_2, | ||
| 403 | MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_2, | ||
| 404 | Mpi2ManufacturingPage2_t, MPI2_POINTER pMpi2ManufacturingPage2_t; | ||
| 405 | |||
| 406 | #define MPI2_MANUFACTURING2_PAGEVERSION (0x00) | ||
| 407 | |||
| 408 | |||
| 409 | /* Manufacturing Page 3 */ | ||
| 410 | |||
| 411 | /* | ||
| 412 | * Host code (drivers, BIOS, utilities, etc.) should leave this define set to | ||
| 413 | * one and check Header.PageLength at runtime. | ||
| 414 | */ | ||
| 415 | #ifndef MPI2_MAN_PAGE_3_INFO_WORDS | ||
| 416 | #define MPI2_MAN_PAGE_3_INFO_WORDS (1) | ||
| 417 | #endif | ||
| 418 | |||
| 419 | typedef struct _MPI2_CONFIG_PAGE_MAN_3 | ||
| 420 | { | ||
| 421 | MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ | ||
| 422 | MPI2_CHIP_REVISION_ID ChipId; /* 0x04 */ | ||
| 423 | U32 Info[MPI2_MAN_PAGE_3_INFO_WORDS];/* 0x08 */ | ||
| 424 | } MPI2_CONFIG_PAGE_MAN_3, | ||
| 425 | MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_3, | ||
| 426 | Mpi2ManufacturingPage3_t, MPI2_POINTER pMpi2ManufacturingPage3_t; | ||
| 427 | |||
| 428 | #define MPI2_MANUFACTURING3_PAGEVERSION (0x00) | ||
| 429 | |||
| 430 | |||
| 431 | /* Manufacturing Page 4 */ | ||
| 432 | |||
| 433 | typedef struct _MPI2_MANPAGE4_PWR_SAVE_SETTINGS | ||
| 434 | { | ||
| 435 | U8 PowerSaveFlags; /* 0x00 */ | ||
| 436 | U8 InternalOperationsSleepTime; /* 0x01 */ | ||
| 437 | U8 InternalOperationsRunTime; /* 0x02 */ | ||
| 438 | U8 HostIdleTime; /* 0x03 */ | ||
| 439 | } MPI2_MANPAGE4_PWR_SAVE_SETTINGS, | ||
| 440 | MPI2_POINTER PTR_MPI2_MANPAGE4_PWR_SAVE_SETTINGS, | ||
| 441 | Mpi2ManPage4PwrSaveSettings_t, MPI2_POINTER pMpi2ManPage4PwrSaveSettings_t; | ||
| 442 | |||
| 443 | /* defines for the PowerSaveFlags field */ | ||
| 444 | #define MPI2_MANPAGE4_MASK_POWERSAVE_MODE (0x03) | ||
| 445 | #define MPI2_MANPAGE4_POWERSAVE_MODE_DISABLED (0x00) | ||
| 446 | #define MPI2_MANPAGE4_CUSTOM_POWERSAVE_MODE (0x01) | ||
| 447 | #define MPI2_MANPAGE4_FULL_POWERSAVE_MODE (0x02) | ||
| 448 | |||
| 449 | typedef struct _MPI2_CONFIG_PAGE_MAN_4 | ||
| 450 | { | ||
| 451 | MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ | ||
| 452 | U32 Reserved1; /* 0x04 */ | ||
| 453 | U32 Flags; /* 0x08 */ | ||
| 454 | U8 InquirySize; /* 0x0C */ | ||
| 455 | U8 Reserved2; /* 0x0D */ | ||
| 456 | U16 Reserved3; /* 0x0E */ | ||
| 457 | U8 InquiryData[56]; /* 0x10 */ | ||
| 458 | U32 RAID0VolumeSettings; /* 0x48 */ | ||
| 459 | U32 RAID1EVolumeSettings; /* 0x4C */ | ||
| 460 | U32 RAID1VolumeSettings; /* 0x50 */ | ||
| 461 | U32 RAID10VolumeSettings; /* 0x54 */ | ||
| 462 | U32 Reserved4; /* 0x58 */ | ||
| 463 | U32 Reserved5; /* 0x5C */ | ||
| 464 | MPI2_MANPAGE4_PWR_SAVE_SETTINGS PowerSaveSettings; /* 0x60 */ | ||
| 465 | U8 MaxOCEDisks; /* 0x64 */ | ||
| 466 | U8 ResyncRate; /* 0x65 */ | ||
| 467 | U16 DataScrubDuration; /* 0x66 */ | ||
| 468 | U8 MaxHotSpares; /* 0x68 */ | ||
| 469 | U8 MaxPhysDisksPerVol; /* 0x69 */ | ||
| 470 | U8 MaxPhysDisks; /* 0x6A */ | ||
| 471 | U8 MaxVolumes; /* 0x6B */ | ||
| 472 | } MPI2_CONFIG_PAGE_MAN_4, | ||
| 473 | MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_4, | ||
| 474 | Mpi2ManufacturingPage4_t, MPI2_POINTER pMpi2ManufacturingPage4_t; | ||
| 475 | |||
| 476 | #define MPI2_MANUFACTURING4_PAGEVERSION (0x0A) | ||
| 477 | |||
| 478 | /* Manufacturing Page 4 Flags field */ | ||
| 479 | #define MPI2_MANPAGE4_METADATA_SIZE_MASK (0x00030000) | ||
| 480 | #define MPI2_MANPAGE4_METADATA_512MB (0x00000000) | ||
| 481 | |||
| 482 | #define MPI2_MANPAGE4_MIX_SSD_SAS_SATA (0x00008000) | ||
| 483 | #define MPI2_MANPAGE4_MIX_SSD_AND_NON_SSD (0x00004000) | ||
| 484 | #define MPI2_MANPAGE4_HIDE_PHYSDISK_NON_IR (0x00002000) | ||
| 485 | |||
| 486 | #define MPI2_MANPAGE4_MASK_PHYSDISK_COERCION (0x00001C00) | ||
| 487 | #define MPI2_MANPAGE4_PHYSDISK_COERCION_1GB (0x00000000) | ||
| 488 | #define MPI2_MANPAGE4_PHYSDISK_128MB_COERCION (0x00000400) | ||
| 489 | #define MPI2_MANPAGE4_PHYSDISK_ADAPTIVE_COERCION (0x00000800) | ||
| 490 | #define MPI2_MANPAGE4_PHYSDISK_ZERO_COERCION (0x00000C00) | ||
| 491 | |||
| 492 | #define MPI2_MANPAGE4_MASK_BAD_BLOCK_MARKING (0x00000300) | ||
| 493 | #define MPI2_MANPAGE4_DEFAULT_BAD_BLOCK_MARKING (0x00000000) | ||
| 494 | #define MPI2_MANPAGE4_TABLE_BAD_BLOCK_MARKING (0x00000100) | ||
| 495 | #define MPI2_MANPAGE4_WRITE_LONG_BAD_BLOCK_MARKING (0x00000200) | ||
| 496 | |||
| 497 | #define MPI2_MANPAGE4_FORCE_OFFLINE_FAILOVER (0x00000080) | ||
| 498 | #define MPI2_MANPAGE4_RAID10_DISABLE (0x00000040) | ||
| 499 | #define MPI2_MANPAGE4_RAID1E_DISABLE (0x00000020) | ||
| 500 | #define MPI2_MANPAGE4_RAID1_DISABLE (0x00000010) | ||
| 501 | #define MPI2_MANPAGE4_RAID0_DISABLE (0x00000008) | ||
| 502 | #define MPI2_MANPAGE4_IR_MODEPAGE8_DISABLE (0x00000004) | ||
| 503 | #define MPI2_MANPAGE4_IM_RESYNC_CACHE_ENABLE (0x00000002) | ||
| 504 | #define MPI2_MANPAGE4_IR_NO_MIX_SAS_SATA (0x00000001) | ||
| 505 | |||
| 506 | |||
| 507 | /* Manufacturing Page 5 */ | ||
| 508 | |||
| 509 | /* | ||
| 510 | * Host code (drivers, BIOS, utilities, etc.) should leave this define set to | ||
| 511 | * one and check Header.PageLength or NumPhys at runtime. | ||
| 512 | */ | ||
| 513 | #ifndef MPI2_MAN_PAGE_5_PHY_ENTRIES | ||
| 514 | #define MPI2_MAN_PAGE_5_PHY_ENTRIES (1) | ||
| 515 | #endif | ||
| 516 | |||
| 517 | typedef struct _MPI2_MANUFACTURING5_ENTRY | ||
| 518 | { | ||
| 519 | U64 WWID; /* 0x00 */ | ||
| 520 | U64 DeviceName; /* 0x08 */ | ||
| 521 | } MPI2_MANUFACTURING5_ENTRY, MPI2_POINTER PTR_MPI2_MANUFACTURING5_ENTRY, | ||
| 522 | Mpi2Manufacturing5Entry_t, MPI2_POINTER pMpi2Manufacturing5Entry_t; | ||
| 523 | |||
| 524 | typedef struct _MPI2_CONFIG_PAGE_MAN_5 | ||
| 525 | { | ||
| 526 | MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ | ||
| 527 | U8 NumPhys; /* 0x04 */ | ||
| 528 | U8 Reserved1; /* 0x05 */ | ||
| 529 | U16 Reserved2; /* 0x06 */ | ||
| 530 | U32 Reserved3; /* 0x08 */ | ||
| 531 | U32 Reserved4; /* 0x0C */ | ||
| 532 | MPI2_MANUFACTURING5_ENTRY Phy[MPI2_MAN_PAGE_5_PHY_ENTRIES];/* 0x08 */ | ||
| 533 | } MPI2_CONFIG_PAGE_MAN_5, | ||
| 534 | MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_5, | ||
| 535 | Mpi2ManufacturingPage5_t, MPI2_POINTER pMpi2ManufacturingPage5_t; | ||
| 536 | |||
| 537 | #define MPI2_MANUFACTURING5_PAGEVERSION (0x03) | ||
| 538 | |||
| 539 | |||
| 540 | /* Manufacturing Page 6 */ | ||
| 541 | |||
| 542 | typedef struct _MPI2_CONFIG_PAGE_MAN_6 | ||
| 543 | { | ||
| 544 | MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ | ||
| 545 | U32 ProductSpecificInfo;/* 0x04 */ | ||
| 546 | } MPI2_CONFIG_PAGE_MAN_6, | ||
| 547 | MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_6, | ||
| 548 | Mpi2ManufacturingPage6_t, MPI2_POINTER pMpi2ManufacturingPage6_t; | ||
| 549 | |||
| 550 | #define MPI2_MANUFACTURING6_PAGEVERSION (0x00) | ||
| 551 | |||
| 552 | |||
| 553 | /* Manufacturing Page 7 */ | ||
| 554 | |||
| 555 | typedef struct _MPI2_MANPAGE7_CONNECTOR_INFO | ||
| 556 | { | ||
| 557 | U32 Pinout; /* 0x00 */ | ||
| 558 | U8 Connector[16]; /* 0x04 */ | ||
| 559 | U8 Location; /* 0x14 */ | ||
| 560 | U8 Reserved1; /* 0x15 */ | ||
| 561 | U16 Slot; /* 0x16 */ | ||
| 562 | U32 Reserved2; /* 0x18 */ | ||
| 563 | } MPI2_MANPAGE7_CONNECTOR_INFO, MPI2_POINTER PTR_MPI2_MANPAGE7_CONNECTOR_INFO, | ||
| 564 | Mpi2ManPage7ConnectorInfo_t, MPI2_POINTER pMpi2ManPage7ConnectorInfo_t; | ||
| 565 | |||
| 566 | /* defines for the Pinout field */ | ||
| 567 | #define MPI2_MANPAGE7_PINOUT_SFF_8484_L4 (0x00080000) | ||
| 568 | #define MPI2_MANPAGE7_PINOUT_SFF_8484_L3 (0x00040000) | ||
| 569 | #define MPI2_MANPAGE7_PINOUT_SFF_8484_L2 (0x00020000) | ||
| 570 | #define MPI2_MANPAGE7_PINOUT_SFF_8484_L1 (0x00010000) | ||
| 571 | #define MPI2_MANPAGE7_PINOUT_SFF_8470_L4 (0x00000800) | ||
| 572 | #define MPI2_MANPAGE7_PINOUT_SFF_8470_L3 (0x00000400) | ||
| 573 | #define MPI2_MANPAGE7_PINOUT_SFF_8470_L2 (0x00000200) | ||
| 574 | #define MPI2_MANPAGE7_PINOUT_SFF_8470_L1 (0x00000100) | ||
| 575 | #define MPI2_MANPAGE7_PINOUT_SFF_8482 (0x00000002) | ||
| 576 | #define MPI2_MANPAGE7_PINOUT_CONNECTION_UNKNOWN (0x00000001) | ||
| 577 | |||
| 578 | /* defines for the Location field */ | ||
| 579 | #define MPI2_MANPAGE7_LOCATION_UNKNOWN (0x01) | ||
| 580 | #define MPI2_MANPAGE7_LOCATION_INTERNAL (0x02) | ||
| 581 | #define MPI2_MANPAGE7_LOCATION_EXTERNAL (0x04) | ||
| 582 | #define MPI2_MANPAGE7_LOCATION_SWITCHABLE (0x08) | ||
| 583 | #define MPI2_MANPAGE7_LOCATION_AUTO (0x10) | ||
| 584 | #define MPI2_MANPAGE7_LOCATION_NOT_PRESENT (0x20) | ||
| 585 | #define MPI2_MANPAGE7_LOCATION_NOT_CONNECTED (0x80) | ||
| 586 | |||
| 587 | /* | ||
| 588 | * Host code (drivers, BIOS, utilities, etc.) should leave this define set to | ||
| 589 | * one and check NumPhys at runtime. | ||
| 590 | */ | ||
| 591 | #ifndef MPI2_MANPAGE7_CONNECTOR_INFO_MAX | ||
| 592 | #define MPI2_MANPAGE7_CONNECTOR_INFO_MAX (1) | ||
| 593 | #endif | ||
| 594 | |||
| 595 | typedef struct _MPI2_CONFIG_PAGE_MAN_7 | ||
| 596 | { | ||
| 597 | MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ | ||
| 598 | U32 Reserved1; /* 0x04 */ | ||
| 599 | U32 Reserved2; /* 0x08 */ | ||
| 600 | U32 Flags; /* 0x0C */ | ||
| 601 | U8 EnclosureName[16]; /* 0x10 */ | ||
| 602 | U8 NumPhys; /* 0x20 */ | ||
| 603 | U8 Reserved3; /* 0x21 */ | ||
| 604 | U16 Reserved4; /* 0x22 */ | ||
| 605 | MPI2_MANPAGE7_CONNECTOR_INFO ConnectorInfo[MPI2_MANPAGE7_CONNECTOR_INFO_MAX]; /* 0x24 */ | ||
| 606 | } MPI2_CONFIG_PAGE_MAN_7, | ||
| 607 | MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_7, | ||
| 608 | Mpi2ManufacturingPage7_t, MPI2_POINTER pMpi2ManufacturingPage7_t; | ||
| 609 | |||
| 610 | #define MPI2_MANUFACTURING7_PAGEVERSION (0x00) | ||
| 611 | |||
| 612 | /* defines for the Flags field */ | ||
| 613 | #define MPI2_MANPAGE7_FLAG_USE_SLOT_INFO (0x00000001) | ||
| 614 | |||
| 615 | |||
| 616 | /* | ||
| 617 | * Generic structure to use for product-specific manufacturing pages | ||
| 618 | * (currently Manufacturing Page 8 through Manufacturing Page 31). | ||
| 619 | */ | ||
| 620 | |||
| 621 | typedef struct _MPI2_CONFIG_PAGE_MAN_PS | ||
| 622 | { | ||
| 623 | MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ | ||
| 624 | U32 ProductSpecificInfo;/* 0x04 */ | ||
| 625 | } MPI2_CONFIG_PAGE_MAN_PS, | ||
| 626 | MPI2_POINTER PTR_MPI2_CONFIG_PAGE_MAN_PS, | ||
| 627 | Mpi2ManufacturingPagePS_t, MPI2_POINTER pMpi2ManufacturingPagePS_t; | ||
| 628 | |||
| 629 | #define MPI2_MANUFACTURING8_PAGEVERSION (0x00) | ||
| 630 | #define MPI2_MANUFACTURING9_PAGEVERSION (0x00) | ||
| 631 | #define MPI2_MANUFACTURING10_PAGEVERSION (0x00) | ||
| 632 | #define MPI2_MANUFACTURING11_PAGEVERSION (0x00) | ||
| 633 | #define MPI2_MANUFACTURING12_PAGEVERSION (0x00) | ||
| 634 | #define MPI2_MANUFACTURING13_PAGEVERSION (0x00) | ||
| 635 | #define MPI2_MANUFACTURING14_PAGEVERSION (0x00) | ||
| 636 | #define MPI2_MANUFACTURING15_PAGEVERSION (0x00) | ||
| 637 | #define MPI2_MANUFACTURING16_PAGEVERSION (0x00) | ||
| 638 | #define MPI2_MANUFACTURING17_PAGEVERSION (0x00) | ||
| 639 | #define MPI2_MANUFACTURING18_PAGEVERSION (0x00) | ||
| 640 | #define MPI2_MANUFACTURING19_PAGEVERSION (0x00) | ||
| 641 | #define MPI2_MANUFACTURING20_PAGEVERSION (0x00) | ||
| 642 | #define MPI2_MANUFACTURING21_PAGEVERSION (0x00) | ||
| 643 | #define MPI2_MANUFACTURING22_PAGEVERSION (0x00) | ||
| 644 | #define MPI2_MANUFACTURING23_PAGEVERSION (0x00) | ||
| 645 | #define MPI2_MANUFACTURING24_PAGEVERSION (0x00) | ||
| 646 | #define MPI2_MANUFACTURING25_PAGEVERSION (0x00) | ||
| 647 | #define MPI2_MANUFACTURING26_PAGEVERSION (0x00) | ||
| 648 | #define MPI2_MANUFACTURING27_PAGEVERSION (0x00) | ||
| 649 | #define MPI2_MANUFACTURING28_PAGEVERSION (0x00) | ||
| 650 | #define MPI2_MANUFACTURING29_PAGEVERSION (0x00) | ||
| 651 | #define MPI2_MANUFACTURING30_PAGEVERSION (0x00) | ||
| 652 | #define MPI2_MANUFACTURING31_PAGEVERSION (0x00) | ||
| 653 | |||
| 654 | |||
| 655 | /**************************************************************************** | ||
| 656 | * IO Unit Config Pages | ||
| 657 | ****************************************************************************/ | ||
| 658 | |||
| 659 | /* IO Unit Page 0 */ | ||
| 660 | |||
| 661 | typedef struct _MPI2_CONFIG_PAGE_IO_UNIT_0 | ||
| 662 | { | ||
| 663 | MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ | ||
| 664 | U64 UniqueValue; /* 0x04 */ | ||
| 665 | MPI2_VERSION_UNION NvdataVersionDefault; /* 0x08 */ | ||
| 666 | MPI2_VERSION_UNION NvdataVersionPersistent; /* 0x0A */ | ||
| 667 | } MPI2_CONFIG_PAGE_IO_UNIT_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IO_UNIT_0, | ||
| 668 | Mpi2IOUnitPage0_t, MPI2_POINTER pMpi2IOUnitPage0_t; | ||
| 669 | |||
| 670 | #define MPI2_IOUNITPAGE0_PAGEVERSION (0x02) | ||
| 671 | |||
| 672 | |||
| 673 | /* IO Unit Page 1 */ | ||
| 674 | |||
| 675 | typedef struct _MPI2_CONFIG_PAGE_IO_UNIT_1 | ||
| 676 | { | ||
| 677 | MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ | ||
| 678 | U32 Flags; /* 0x04 */ | ||
| 679 | } MPI2_CONFIG_PAGE_IO_UNIT_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IO_UNIT_1, | ||
| 680 | Mpi2IOUnitPage1_t, MPI2_POINTER pMpi2IOUnitPage1_t; | ||
| 681 | |||
| 682 | #define MPI2_IOUNITPAGE1_PAGEVERSION (0x04) | ||
| 683 | |||
| 684 | /* IO Unit Page 1 Flags defines */ | ||
| 685 | #define MPI2_IOUNITPAGE1_MASK_SATA_WRITE_CACHE (0x00000600) | ||
| 686 | #define MPI2_IOUNITPAGE1_ENABLE_SATA_WRITE_CACHE (0x00000000) | ||
| 687 | #define MPI2_IOUNITPAGE1_DISABLE_SATA_WRITE_CACHE (0x00000200) | ||
| 688 | #define MPI2_IOUNITPAGE1_UNCHANGED_SATA_WRITE_CACHE (0x00000400) | ||
| 689 | #define MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE (0x00000100) | ||
| 690 | #define MPI2_IOUNITPAGE1_DISABLE_IR (0x00000040) | ||
| 691 | #define MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING (0x00000020) | ||
| 692 | #define MPI2_IOUNITPAGE1_IR_USE_STATIC_VOLUME_ID (0x00000004) | ||
| 693 | #define MPI2_IOUNITPAGE1_MULTI_PATHING (0x00000002) | ||
| 694 | #define MPI2_IOUNITPAGE1_SINGLE_PATHING (0x00000000) | ||
| 695 | |||
| 696 | |||
| 697 | /* IO Unit Page 3 */ | ||
| 698 | |||
| 699 | /* | ||
| 700 | * Host code (drivers, BIOS, utilities, etc.) should leave this define set to | ||
| 701 | * one and check Header.PageLength at runtime. | ||
| 702 | */ | ||
| 703 | #ifndef MPI2_IO_UNIT_PAGE_3_GPIO_VAL_MAX | ||
| 704 | #define MPI2_IO_UNIT_PAGE_3_GPIO_VAL_MAX (1) | ||
| 705 | #endif | ||
| 706 | |||
| 707 | typedef struct _MPI2_CONFIG_PAGE_IO_UNIT_3 | ||
| 708 | { | ||
| 709 | MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ | ||
| 710 | U8 GPIOCount; /* 0x04 */ | ||
| 711 | U8 Reserved1; /* 0x05 */ | ||
| 712 | U16 Reserved2; /* 0x06 */ | ||
| 713 | U16 GPIOVal[MPI2_IO_UNIT_PAGE_3_GPIO_VAL_MAX];/* 0x08 */ | ||
| 714 | } MPI2_CONFIG_PAGE_IO_UNIT_3, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IO_UNIT_3, | ||
| 715 | Mpi2IOUnitPage3_t, MPI2_POINTER pMpi2IOUnitPage3_t; | ||
| 716 | |||
| 717 | #define MPI2_IOUNITPAGE3_PAGEVERSION (0x01) | ||
| 718 | |||
| 719 | /* defines for IO Unit Page 3 GPIOVal field */ | ||
| 720 | #define MPI2_IOUNITPAGE3_GPIO_FUNCTION_MASK (0xFFFC) | ||
| 721 | #define MPI2_IOUNITPAGE3_GPIO_FUNCTION_SHIFT (2) | ||
| 722 | #define MPI2_IOUNITPAGE3_GPIO_SETTING_OFF (0x0000) | ||
| 723 | #define MPI2_IOUNITPAGE3_GPIO_SETTING_ON (0x0001) | ||
| 724 | |||
| 725 | |||
| 726 | /**************************************************************************** | ||
| 727 | * IOC Config Pages | ||
| 728 | ****************************************************************************/ | ||
| 729 | |||
| 730 | /* IOC Page 0 */ | ||
| 731 | |||
| 732 | typedef struct _MPI2_CONFIG_PAGE_IOC_0 | ||
| 733 | { | ||
| 734 | MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ | ||
| 735 | U32 Reserved1; /* 0x04 */ | ||
| 736 | U32 Reserved2; /* 0x08 */ | ||
| 737 | U16 VendorID; /* 0x0C */ | ||
| 738 | U16 DeviceID; /* 0x0E */ | ||
| 739 | U8 RevisionID; /* 0x10 */ | ||
| 740 | U8 Reserved3; /* 0x11 */ | ||
| 741 | U16 Reserved4; /* 0x12 */ | ||
| 742 | U32 ClassCode; /* 0x14 */ | ||
| 743 | U16 SubsystemVendorID; /* 0x18 */ | ||
| 744 | U16 SubsystemID; /* 0x1A */ | ||
| 745 | } MPI2_CONFIG_PAGE_IOC_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IOC_0, | ||
| 746 | Mpi2IOCPage0_t, MPI2_POINTER pMpi2IOCPage0_t; | ||
| 747 | |||
| 748 | #define MPI2_IOCPAGE0_PAGEVERSION (0x02) | ||
| 749 | |||
| 750 | |||
| 751 | /* IOC Page 1 */ | ||
| 752 | |||
| 753 | typedef struct _MPI2_CONFIG_PAGE_IOC_1 | ||
| 754 | { | ||
| 755 | MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ | ||
| 756 | U32 Flags; /* 0x04 */ | ||
| 757 | U32 CoalescingTimeout; /* 0x08 */ | ||
| 758 | U8 CoalescingDepth; /* 0x0C */ | ||
| 759 | U8 PCISlotNum; /* 0x0D */ | ||
| 760 | U8 PCIBusNum; /* 0x0E */ | ||
| 761 | U8 PCIDomainSegment; /* 0x0F */ | ||
| 762 | U32 Reserved1; /* 0x10 */ | ||
| 763 | U32 Reserved2; /* 0x14 */ | ||
| 764 | } MPI2_CONFIG_PAGE_IOC_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IOC_1, | ||
| 765 | Mpi2IOCPage1_t, MPI2_POINTER pMpi2IOCPage1_t; | ||
| 766 | |||
| 767 | #define MPI2_IOCPAGE1_PAGEVERSION (0x05) | ||
| 768 | |||
| 769 | /* defines for IOC Page 1 Flags field */ | ||
| 770 | #define MPI2_IOCPAGE1_REPLY_COALESCING (0x00000001) | ||
| 771 | |||
| 772 | #define MPI2_IOCPAGE1_PCISLOTNUM_UNKNOWN (0xFF) | ||
| 773 | #define MPI2_IOCPAGE1_PCIBUSNUM_UNKNOWN (0xFF) | ||
| 774 | #define MPI2_IOCPAGE1_PCIDOMAIN_UNKNOWN (0xFF) | ||
| 775 | |||
| 776 | /* IOC Page 6 */ | ||
| 777 | |||
| 778 | typedef struct _MPI2_CONFIG_PAGE_IOC_6 | ||
| 779 | { | ||
| 780 | MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ | ||
| 781 | U32 CapabilitiesFlags; /* 0x04 */ | ||
| 782 | U8 MaxDrivesRAID0; /* 0x08 */ | ||
| 783 | U8 MaxDrivesRAID1; /* 0x09 */ | ||
| 784 | U8 MaxDrivesRAID1E; /* 0x0A */ | ||
| 785 | U8 MaxDrivesRAID10; /* 0x0B */ | ||
| 786 | U8 MinDrivesRAID0; /* 0x0C */ | ||
| 787 | U8 MinDrivesRAID1; /* 0x0D */ | ||
| 788 | U8 MinDrivesRAID1E; /* 0x0E */ | ||
| 789 | U8 MinDrivesRAID10; /* 0x0F */ | ||
| 790 | U32 Reserved1; /* 0x10 */ | ||
| 791 | U8 MaxGlobalHotSpares; /* 0x14 */ | ||
| 792 | U8 MaxPhysDisks; /* 0x15 */ | ||
| 793 | U8 MaxVolumes; /* 0x16 */ | ||
| 794 | U8 MaxConfigs; /* 0x17 */ | ||
| 795 | U8 MaxOCEDisks; /* 0x18 */ | ||
| 796 | U8 Reserved2; /* 0x19 */ | ||
| 797 | U16 Reserved3; /* 0x1A */ | ||
| 798 | U32 SupportedStripeSizeMapRAID0; /* 0x1C */ | ||
| 799 | U32 SupportedStripeSizeMapRAID1E; /* 0x20 */ | ||
| 800 | U32 SupportedStripeSizeMapRAID10; /* 0x24 */ | ||
| 801 | U32 Reserved4; /* 0x28 */ | ||
| 802 | U32 Reserved5; /* 0x2C */ | ||
| 803 | U16 DefaultMetadataSize; /* 0x30 */ | ||
| 804 | U16 Reserved6; /* 0x32 */ | ||
| 805 | U16 MaxBadBlockTableEntries; /* 0x34 */ | ||
| 806 | U16 Reserved7; /* 0x36 */ | ||
| 807 | U32 IRNvsramVersion; /* 0x38 */ | ||
| 808 | } MPI2_CONFIG_PAGE_IOC_6, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IOC_6, | ||
| 809 | Mpi2IOCPage6_t, MPI2_POINTER pMpi2IOCPage6_t; | ||
| 810 | |||
| 811 | #define MPI2_IOCPAGE6_PAGEVERSION (0x04) | ||
| 812 | |||
| 813 | /* defines for IOC Page 6 CapabilitiesFlags */ | ||
| 814 | #define MPI2_IOCPAGE6_CAP_FLAGS_RAID10_SUPPORT (0x00000010) | ||
| 815 | #define MPI2_IOCPAGE6_CAP_FLAGS_RAID1_SUPPORT (0x00000008) | ||
| 816 | #define MPI2_IOCPAGE6_CAP_FLAGS_RAID1E_SUPPORT (0x00000004) | ||
| 817 | #define MPI2_IOCPAGE6_CAP_FLAGS_RAID0_SUPPORT (0x00000002) | ||
| 818 | #define MPI2_IOCPAGE6_CAP_FLAGS_GLOBAL_HOT_SPARE (0x00000001) | ||
| 819 | |||
| 820 | |||
| 821 | /* IOC Page 7 */ | ||
| 822 | |||
| 823 | #define MPI2_IOCPAGE7_EVENTMASK_WORDS (4) | ||
| 824 | |||
| 825 | typedef struct _MPI2_CONFIG_PAGE_IOC_7 | ||
| 826 | { | ||
| 827 | MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ | ||
| 828 | U32 Reserved1; /* 0x04 */ | ||
| 829 | U32 EventMasks[MPI2_IOCPAGE7_EVENTMASK_WORDS];/* 0x08 */ | ||
| 830 | U16 SASBroadcastPrimitiveMasks; /* 0x18 */ | ||
| 831 | U16 Reserved2; /* 0x1A */ | ||
| 832 | U32 Reserved3; /* 0x1C */ | ||
| 833 | } MPI2_CONFIG_PAGE_IOC_7, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IOC_7, | ||
| 834 | Mpi2IOCPage7_t, MPI2_POINTER pMpi2IOCPage7_t; | ||
| 835 | |||
| 836 | #define MPI2_IOCPAGE7_PAGEVERSION (0x01) | ||
| 837 | |||
| 838 | |||
| 839 | /* IOC Page 8 */ | ||
| 840 | |||
| 841 | typedef struct _MPI2_CONFIG_PAGE_IOC_8 | ||
| 842 | { | ||
| 843 | MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ | ||
| 844 | U8 NumDevsPerEnclosure; /* 0x04 */ | ||
| 845 | U8 Reserved1; /* 0x05 */ | ||
| 846 | U16 Reserved2; /* 0x06 */ | ||
| 847 | U16 MaxPersistentEntries; /* 0x08 */ | ||
| 848 | U16 MaxNumPhysicalMappedIDs; /* 0x0A */ | ||
| 849 | U16 Flags; /* 0x0C */ | ||
| 850 | U16 Reserved3; /* 0x0E */ | ||
| 851 | U16 IRVolumeMappingFlags; /* 0x10 */ | ||
| 852 | U16 Reserved4; /* 0x12 */ | ||
| 853 | U32 Reserved5; /* 0x14 */ | ||
| 854 | } MPI2_CONFIG_PAGE_IOC_8, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_IOC_8, | ||
| 855 | Mpi2IOCPage8_t, MPI2_POINTER pMpi2IOCPage8_t; | ||
| 856 | |||
| 857 | #define MPI2_IOCPAGE8_PAGEVERSION (0x00) | ||
| 858 | |||
| 859 | /* defines for IOC Page 8 Flags field */ | ||
| 860 | #define MPI2_IOCPAGE8_FLAGS_DA_START_SLOT_1 (0x00000020) | ||
| 861 | #define MPI2_IOCPAGE8_FLAGS_RESERVED_TARGETID_0 (0x00000010) | ||
| 862 | |||
| 863 | #define MPI2_IOCPAGE8_FLAGS_MASK_MAPPING_MODE (0x0000000E) | ||
| 864 | #define MPI2_IOCPAGE8_FLAGS_DEVICE_PERSISTENCE_MAPPING (0x00000000) | ||
| 865 | #define MPI2_IOCPAGE8_FLAGS_ENCLOSURE_SLOT_MAPPING (0x00000002) | ||
| 866 | |||
| 867 | #define MPI2_IOCPAGE8_FLAGS_DISABLE_PERSISTENT_MAPPING (0x00000001) | ||
| 868 | #define MPI2_IOCPAGE8_FLAGS_ENABLE_PERSISTENT_MAPPING (0x00000000) | ||
| 869 | |||
| 870 | /* defines for IOC Page 8 IRVolumeMappingFlags */ | ||
| 871 | #define MPI2_IOCPAGE8_IRFLAGS_MASK_VOLUME_MAPPING_MODE (0x00000003) | ||
| 872 | #define MPI2_IOCPAGE8_IRFLAGS_LOW_VOLUME_MAPPING (0x00000000) | ||
| 873 | #define MPI2_IOCPAGE8_IRFLAGS_HIGH_VOLUME_MAPPING (0x00000001) | ||
| 874 | |||
| 875 | |||
| 876 | /**************************************************************************** | ||
| 877 | * BIOS Config Pages | ||
| 878 | ****************************************************************************/ | ||
| 879 | |||
| 880 | /* BIOS Page 1 */ | ||
| 881 | |||
| 882 | typedef struct _MPI2_CONFIG_PAGE_BIOS_1 | ||
| 883 | { | ||
| 884 | MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ | ||
| 885 | U32 BiosOptions; /* 0x04 */ | ||
| 886 | U32 IOCSettings; /* 0x08 */ | ||
| 887 | U32 Reserved1; /* 0x0C */ | ||
| 888 | U32 DeviceSettings; /* 0x10 */ | ||
| 889 | U16 NumberOfDevices; /* 0x14 */ | ||
| 890 | U16 Reserved2; /* 0x16 */ | ||
| 891 | U16 IOTimeoutBlockDevicesNonRM; /* 0x18 */ | ||
| 892 | U16 IOTimeoutSequential; /* 0x1A */ | ||
| 893 | U16 IOTimeoutOther; /* 0x1C */ | ||
| 894 | U16 IOTimeoutBlockDevicesRM; /* 0x1E */ | ||
| 895 | } MPI2_CONFIG_PAGE_BIOS_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_BIOS_1, | ||
| 896 | Mpi2BiosPage1_t, MPI2_POINTER pMpi2BiosPage1_t; | ||
| 897 | |||
| 898 | #define MPI2_BIOSPAGE1_PAGEVERSION (0x04) | ||
| 899 | |||
| 900 | /* values for BIOS Page 1 BiosOptions field */ | ||
| 901 | #define MPI2_BIOSPAGE1_OPTIONS_DISABLE_BIOS (0x00000001) | ||
| 902 | |||
| 903 | /* values for BIOS Page 1 IOCSettings field */ | ||
| 904 | #define MPI2_BIOSPAGE1_IOCSET_MASK_BOOT_PREFERENCE (0x00030000) | ||
| 905 | #define MPI2_BIOSPAGE1_IOCSET_ENCLOSURE_SLOT_BOOT (0x00000000) | ||
| 906 | #define MPI2_BIOSPAGE1_IOCSET_SAS_ADDRESS_BOOT (0x00010000) | ||
| 907 | |||
| 908 | #define MPI2_BIOSPAGE1_IOCSET_MASK_RM_SETTING (0x000000C0) | ||
| 909 | #define MPI2_BIOSPAGE1_IOCSET_NONE_RM_SETTING (0x00000000) | ||
| 910 | #define MPI2_BIOSPAGE1_IOCSET_BOOT_RM_SETTING (0x00000040) | ||
| 911 | #define MPI2_BIOSPAGE1_IOCSET_MEDIA_RM_SETTING (0x00000080) | ||
| 912 | |||
| 913 | #define MPI2_BIOSPAGE1_IOCSET_MASK_ADAPTER_SUPPORT (0x00000030) | ||
| 914 | #define MPI2_BIOSPAGE1_IOCSET_NO_SUPPORT (0x00000000) | ||
| 915 | #define MPI2_BIOSPAGE1_IOCSET_BIOS_SUPPORT (0x00000010) | ||
| 916 | #define MPI2_BIOSPAGE1_IOCSET_OS_SUPPORT (0x00000020) | ||
| 917 | #define MPI2_BIOSPAGE1_IOCSET_ALL_SUPPORT (0x00000030) | ||
| 918 | |||
| 919 | #define MPI2_BIOSPAGE1_IOCSET_ALTERNATE_CHS (0x00000008) | ||
| 920 | |||
| 921 | /* values for BIOS Page 1 DeviceSettings field */ | ||
| 922 | #define MPI2_BIOSPAGE1_DEVSET_DISABLE_SMART_POLLING (0x00000010) | ||
| 923 | #define MPI2_BIOSPAGE1_DEVSET_DISABLE_SEQ_LUN (0x00000008) | ||
| 924 | #define MPI2_BIOSPAGE1_DEVSET_DISABLE_RM_LUN (0x00000004) | ||
| 925 | #define MPI2_BIOSPAGE1_DEVSET_DISABLE_NON_RM_LUN (0x00000002) | ||
| 926 | #define MPI2_BIOSPAGE1_DEVSET_DISABLE_OTHER_LUN (0x00000001) | ||
| 927 | |||
| 928 | |||
| 929 | /* BIOS Page 2 */ | ||
| 930 | |||
| 931 | typedef struct _MPI2_BOOT_DEVICE_ADAPTER_ORDER | ||
| 932 | { | ||
| 933 | U32 Reserved1; /* 0x00 */ | ||
| 934 | U32 Reserved2; /* 0x04 */ | ||
| 935 | U32 Reserved3; /* 0x08 */ | ||
| 936 | U32 Reserved4; /* 0x0C */ | ||
| 937 | U32 Reserved5; /* 0x10 */ | ||
| 938 | U32 Reserved6; /* 0x14 */ | ||
| 939 | } MPI2_BOOT_DEVICE_ADAPTER_ORDER, | ||
| 940 | MPI2_POINTER PTR_MPI2_BOOT_DEVICE_ADAPTER_ORDER, | ||
| 941 | Mpi2BootDeviceAdapterOrder_t, MPI2_POINTER pMpi2BootDeviceAdapterOrder_t; | ||
| 942 | |||
| 943 | typedef struct _MPI2_BOOT_DEVICE_SAS_WWID | ||
| 944 | { | ||
| 945 | U64 SASAddress; /* 0x00 */ | ||
| 946 | U8 LUN[8]; /* 0x08 */ | ||
| 947 | U32 Reserved1; /* 0x10 */ | ||
| 948 | U32 Reserved2; /* 0x14 */ | ||
| 949 | } MPI2_BOOT_DEVICE_SAS_WWID, MPI2_POINTER PTR_MPI2_BOOT_DEVICE_SAS_WWID, | ||
| 950 | Mpi2BootDeviceSasWwid_t, MPI2_POINTER pMpi2BootDeviceSasWwid_t; | ||
| 951 | |||
| 952 | typedef struct _MPI2_BOOT_DEVICE_ENCLOSURE_SLOT | ||
| 953 | { | ||
| 954 | U64 EnclosureLogicalID; /* 0x00 */ | ||
| 955 | U32 Reserved1; /* 0x08 */ | ||
| 956 | U32 Reserved2; /* 0x0C */ | ||
| 957 | U16 SlotNumber; /* 0x10 */ | ||
| 958 | U16 Reserved3; /* 0x12 */ | ||
| 959 | U32 Reserved4; /* 0x14 */ | ||
| 960 | } MPI2_BOOT_DEVICE_ENCLOSURE_SLOT, | ||
| 961 | MPI2_POINTER PTR_MPI2_BOOT_DEVICE_ENCLOSURE_SLOT, | ||
| 962 | Mpi2BootDeviceEnclosureSlot_t, MPI2_POINTER pMpi2BootDeviceEnclosureSlot_t; | ||
| 963 | |||
| 964 | typedef struct _MPI2_BOOT_DEVICE_DEVICE_NAME | ||
| 965 | { | ||
| 966 | U64 DeviceName; /* 0x00 */ | ||
| 967 | U8 LUN[8]; /* 0x08 */ | ||
| 968 | U32 Reserved1; /* 0x10 */ | ||
| 969 | U32 Reserved2; /* 0x14 */ | ||
| 970 | } MPI2_BOOT_DEVICE_DEVICE_NAME, MPI2_POINTER PTR_MPI2_BOOT_DEVICE_DEVICE_NAME, | ||
| 971 | Mpi2BootDeviceDeviceName_t, MPI2_POINTER pMpi2BootDeviceDeviceName_t; | ||
| 972 | |||
| 973 | typedef union _MPI2_MPI2_BIOSPAGE2_BOOT_DEVICE | ||
| 974 | { | ||
| 975 | MPI2_BOOT_DEVICE_ADAPTER_ORDER AdapterOrder; | ||
| 976 | MPI2_BOOT_DEVICE_SAS_WWID SasWwid; | ||
| 977 | MPI2_BOOT_DEVICE_ENCLOSURE_SLOT EnclosureSlot; | ||
| 978 | MPI2_BOOT_DEVICE_DEVICE_NAME DeviceName; | ||
| 979 | } MPI2_BIOSPAGE2_BOOT_DEVICE, MPI2_POINTER PTR_MPI2_BIOSPAGE2_BOOT_DEVICE, | ||
| 980 | Mpi2BiosPage2BootDevice_t, MPI2_POINTER pMpi2BiosPage2BootDevice_t; | ||
| 981 | |||
| 982 | typedef struct _MPI2_CONFIG_PAGE_BIOS_2 | ||
| 983 | { | ||
| 984 | MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ | ||
| 985 | U32 Reserved1; /* 0x04 */ | ||
| 986 | U32 Reserved2; /* 0x08 */ | ||
| 987 | U32 Reserved3; /* 0x0C */ | ||
| 988 | U32 Reserved4; /* 0x10 */ | ||
| 989 | U32 Reserved5; /* 0x14 */ | ||
| 990 | U32 Reserved6; /* 0x18 */ | ||
| 991 | U8 ReqBootDeviceForm; /* 0x1C */ | ||
| 992 | U8 Reserved7; /* 0x1D */ | ||
| 993 | U16 Reserved8; /* 0x1E */ | ||
| 994 | MPI2_BIOSPAGE2_BOOT_DEVICE RequestedBootDevice; /* 0x20 */ | ||
| 995 | U8 ReqAltBootDeviceForm; /* 0x38 */ | ||
| 996 | U8 Reserved9; /* 0x39 */ | ||
| 997 | U16 Reserved10; /* 0x3A */ | ||
| 998 | MPI2_BIOSPAGE2_BOOT_DEVICE RequestedAltBootDevice; /* 0x3C */ | ||
| 999 | U8 CurrentBootDeviceForm; /* 0x58 */ | ||
| 1000 | U8 Reserved11; /* 0x59 */ | ||
| 1001 | U16 Reserved12; /* 0x5A */ | ||
| 1002 | MPI2_BIOSPAGE2_BOOT_DEVICE CurrentBootDevice; /* 0x58 */ | ||
| 1003 | } MPI2_CONFIG_PAGE_BIOS_2, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_BIOS_2, | ||
| 1004 | Mpi2BiosPage2_t, MPI2_POINTER pMpi2BiosPage2_t; | ||
| 1005 | |||
| 1006 | #define MPI2_BIOSPAGE2_PAGEVERSION (0x04) | ||
| 1007 | |||
| 1008 | /* values for BIOS Page 2 BootDeviceForm fields */ | ||
| 1009 | #define MPI2_BIOSPAGE2_FORM_MASK (0x0F) | ||
| 1010 | #define MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED (0x00) | ||
| 1011 | #define MPI2_BIOSPAGE2_FORM_SAS_WWID (0x05) | ||
| 1012 | #define MPI2_BIOSPAGE2_FORM_ENCLOSURE_SLOT (0x06) | ||
| 1013 | #define MPI2_BIOSPAGE2_FORM_DEVICE_NAME (0x07) | ||
| 1014 | |||
| 1015 | |||
| 1016 | /* BIOS Page 3 */ | ||
| 1017 | |||
| 1018 | typedef struct _MPI2_ADAPTER_INFO | ||
| 1019 | { | ||
| 1020 | U8 PciBusNumber; /* 0x00 */ | ||
| 1021 | U8 PciDeviceAndFunctionNumber; /* 0x01 */ | ||
| 1022 | U16 AdapterFlags; /* 0x02 */ | ||
| 1023 | } MPI2_ADAPTER_INFO, MPI2_POINTER PTR_MPI2_ADAPTER_INFO, | ||
| 1024 | Mpi2AdapterInfo_t, MPI2_POINTER pMpi2AdapterInfo_t; | ||
| 1025 | |||
| 1026 | #define MPI2_ADAPTER_INFO_FLAGS_EMBEDDED (0x0001) | ||
| 1027 | #define MPI2_ADAPTER_INFO_FLAGS_INIT_STATUS (0x0002) | ||
| 1028 | |||
| 1029 | typedef struct _MPI2_CONFIG_PAGE_BIOS_3 | ||
| 1030 | { | ||
| 1031 | MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ | ||
| 1032 | U32 GlobalFlags; /* 0x04 */ | ||
| 1033 | U32 BiosVersion; /* 0x08 */ | ||
| 1034 | MPI2_ADAPTER_INFO AdapterOrder[4]; /* 0x0C */ | ||
| 1035 | U32 Reserved1; /* 0x1C */ | ||
| 1036 | } MPI2_CONFIG_PAGE_BIOS_3, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_BIOS_3, | ||
| 1037 | Mpi2BiosPage3_t, MPI2_POINTER pMpi2BiosPage3_t; | ||
| 1038 | |||
| 1039 | #define MPI2_BIOSPAGE3_PAGEVERSION (0x00) | ||
| 1040 | |||
| 1041 | /* values for BIOS Page 3 GlobalFlags */ | ||
| 1042 | #define MPI2_BIOSPAGE3_FLAGS_PAUSE_ON_ERROR (0x00000002) | ||
| 1043 | #define MPI2_BIOSPAGE3_FLAGS_VERBOSE_ENABLE (0x00000004) | ||
| 1044 | #define MPI2_BIOSPAGE3_FLAGS_HOOK_INT_40_DISABLE (0x00000010) | ||
| 1045 | |||
| 1046 | #define MPI2_BIOSPAGE3_FLAGS_DEV_LIST_DISPLAY_MASK (0x000000E0) | ||
| 1047 | #define MPI2_BIOSPAGE3_FLAGS_INSTALLED_DEV_DISPLAY (0x00000000) | ||
| 1048 | #define MPI2_BIOSPAGE3_FLAGS_ADAPTER_DISPLAY (0x00000020) | ||
| 1049 | #define MPI2_BIOSPAGE3_FLAGS_ADAPTER_DEV_DISPLAY (0x00000040) | ||
| 1050 | |||
| 1051 | |||
| 1052 | /* BIOS Page 4 */ | ||
| 1053 | |||
| 1054 | /* | ||
| 1055 | * Host code (drivers, BIOS, utilities, etc.) should leave this define set to | ||
| 1056 | * one and check Header.PageLength or NumPhys at runtime. | ||
| 1057 | */ | ||
| 1058 | #ifndef MPI2_BIOS_PAGE_4_PHY_ENTRIES | ||
| 1059 | #define MPI2_BIOS_PAGE_4_PHY_ENTRIES (1) | ||
| 1060 | #endif | ||
| 1061 | |||
| 1062 | typedef struct _MPI2_BIOS4_ENTRY | ||
| 1063 | { | ||
| 1064 | U64 ReassignmentWWID; /* 0x00 */ | ||
| 1065 | U64 ReassignmentDeviceName; /* 0x08 */ | ||
| 1066 | } MPI2_BIOS4_ENTRY, MPI2_POINTER PTR_MPI2_BIOS4_ENTRY, | ||
| 1067 | Mpi2MBios4Entry_t, MPI2_POINTER pMpi2Bios4Entry_t; | ||
| 1068 | |||
| 1069 | typedef struct _MPI2_CONFIG_PAGE_BIOS_4 | ||
| 1070 | { | ||
| 1071 | MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ | ||
| 1072 | U8 NumPhys; /* 0x04 */ | ||
| 1073 | U8 Reserved1; /* 0x05 */ | ||
| 1074 | U16 Reserved2; /* 0x06 */ | ||
| 1075 | MPI2_BIOS4_ENTRY Phy[MPI2_BIOS_PAGE_4_PHY_ENTRIES]; /* 0x08 */ | ||
| 1076 | } MPI2_CONFIG_PAGE_BIOS_4, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_BIOS_4, | ||
| 1077 | Mpi2BiosPage4_t, MPI2_POINTER pMpi2BiosPage4_t; | ||
| 1078 | |||
| 1079 | #define MPI2_BIOSPAGE4_PAGEVERSION (0x01) | ||
| 1080 | |||
| 1081 | |||
| 1082 | /**************************************************************************** | ||
| 1083 | * RAID Volume Config Pages | ||
| 1084 | ****************************************************************************/ | ||
| 1085 | |||
| 1086 | /* RAID Volume Page 0 */ | ||
| 1087 | |||
| 1088 | typedef struct _MPI2_RAIDVOL0_PHYS_DISK | ||
| 1089 | { | ||
| 1090 | U8 RAIDSetNum; /* 0x00 */ | ||
| 1091 | U8 PhysDiskMap; /* 0x01 */ | ||
| 1092 | U8 PhysDiskNum; /* 0x02 */ | ||
| 1093 | U8 Reserved; /* 0x03 */ | ||
| 1094 | } MPI2_RAIDVOL0_PHYS_DISK, MPI2_POINTER PTR_MPI2_RAIDVOL0_PHYS_DISK, | ||
| 1095 | Mpi2RaidVol0PhysDisk_t, MPI2_POINTER pMpi2RaidVol0PhysDisk_t; | ||
| 1096 | |||
| 1097 | /* defines for the PhysDiskMap field */ | ||
| 1098 | #define MPI2_RAIDVOL0_PHYSDISK_PRIMARY (0x01) | ||
| 1099 | #define MPI2_RAIDVOL0_PHYSDISK_SECONDARY (0x02) | ||
| 1100 | |||
| 1101 | typedef struct _MPI2_RAIDVOL0_SETTINGS | ||
| 1102 | { | ||
| 1103 | U16 Settings; /* 0x00 */ | ||
| 1104 | U8 HotSparePool; /* 0x01 */ | ||
| 1105 | U8 Reserved; /* 0x02 */ | ||
| 1106 | } MPI2_RAIDVOL0_SETTINGS, MPI2_POINTER PTR_MPI2_RAIDVOL0_SETTINGS, | ||
| 1107 | Mpi2RaidVol0Settings_t, MPI2_POINTER pMpi2RaidVol0Settings_t; | ||
| 1108 | |||
| 1109 | /* RAID Volume Page 0 HotSparePool defines, also used in RAID Physical Disk */ | ||
| 1110 | #define MPI2_RAID_HOT_SPARE_POOL_0 (0x01) | ||
| 1111 | #define MPI2_RAID_HOT_SPARE_POOL_1 (0x02) | ||
| 1112 | #define MPI2_RAID_HOT_SPARE_POOL_2 (0x04) | ||
| 1113 | #define MPI2_RAID_HOT_SPARE_POOL_3 (0x08) | ||
| 1114 | #define MPI2_RAID_HOT_SPARE_POOL_4 (0x10) | ||
| 1115 | #define MPI2_RAID_HOT_SPARE_POOL_5 (0x20) | ||
| 1116 | #define MPI2_RAID_HOT_SPARE_POOL_6 (0x40) | ||
| 1117 | #define MPI2_RAID_HOT_SPARE_POOL_7 (0x80) | ||
| 1118 | |||
| 1119 | /* RAID Volume Page 0 VolumeSettings defines */ | ||
| 1120 | #define MPI2_RAIDVOL0_SETTING_USE_PRODUCT_ID_SUFFIX (0x0008) | ||
| 1121 | #define MPI2_RAIDVOL0_SETTING_AUTO_CONFIG_HSWAP_DISABLE (0x0004) | ||
| 1122 | |||
| 1123 | #define MPI2_RAIDVOL0_SETTING_MASK_WRITE_CACHING (0x0003) | ||
| 1124 | #define MPI2_RAIDVOL0_SETTING_UNCHANGED (0x0000) | ||
| 1125 | #define MPI2_RAIDVOL0_SETTING_DISABLE_WRITE_CACHING (0x0001) | ||
| 1126 | #define MPI2_RAIDVOL0_SETTING_ENABLE_WRITE_CACHING (0x0002) | ||
| 1127 | |||
| 1128 | /* | ||
| 1129 | * Host code (drivers, BIOS, utilities, etc.) should leave this define set to | ||
| 1130 | * one and check Header.PageLength at runtime. | ||
| 1131 | */ | ||
| 1132 | #ifndef MPI2_RAID_VOL_PAGE_0_PHYSDISK_MAX | ||
| 1133 | #define MPI2_RAID_VOL_PAGE_0_PHYSDISK_MAX (1) | ||
| 1134 | #endif | ||
| 1135 | |||
| 1136 | typedef struct _MPI2_CONFIG_PAGE_RAID_VOL_0 | ||
| 1137 | { | ||
| 1138 | MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ | ||
| 1139 | U16 DevHandle; /* 0x04 */ | ||
| 1140 | U8 VolumeState; /* 0x06 */ | ||
| 1141 | U8 VolumeType; /* 0x07 */ | ||
| 1142 | U32 VolumeStatusFlags; /* 0x08 */ | ||
| 1143 | MPI2_RAIDVOL0_SETTINGS VolumeSettings; /* 0x0C */ | ||
| 1144 | U64 MaxLBA; /* 0x10 */ | ||
| 1145 | U32 StripeSize; /* 0x18 */ | ||
| 1146 | U16 BlockSize; /* 0x1C */ | ||
| 1147 | U16 Reserved1; /* 0x1E */ | ||
| 1148 | U8 SupportedPhysDisks; /* 0x20 */ | ||
| 1149 | U8 ResyncRate; /* 0x21 */ | ||
| 1150 | U16 DataScrubDuration; /* 0x22 */ | ||
| 1151 | U8 NumPhysDisks; /* 0x24 */ | ||
| 1152 | U8 Reserved2; /* 0x25 */ | ||
| 1153 | U8 Reserved3; /* 0x26 */ | ||
| 1154 | U8 InactiveStatus; /* 0x27 */ | ||
| 1155 | MPI2_RAIDVOL0_PHYS_DISK PhysDisk[MPI2_RAID_VOL_PAGE_0_PHYSDISK_MAX]; /* 0x28 */ | ||
| 1156 | } MPI2_CONFIG_PAGE_RAID_VOL_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_RAID_VOL_0, | ||
| 1157 | Mpi2RaidVolPage0_t, MPI2_POINTER pMpi2RaidVolPage0_t; | ||
| 1158 | |||
| 1159 | #define MPI2_RAIDVOLPAGE0_PAGEVERSION (0x0A) | ||
| 1160 | |||
| 1161 | /* values for RAID VolumeState */ | ||
| 1162 | #define MPI2_RAID_VOL_STATE_MISSING (0x00) | ||
| 1163 | #define MPI2_RAID_VOL_STATE_FAILED (0x01) | ||
| 1164 | #define MPI2_RAID_VOL_STATE_INITIALIZING (0x02) | ||
| 1165 | #define MPI2_RAID_VOL_STATE_ONLINE (0x03) | ||
| 1166 | #define MPI2_RAID_VOL_STATE_DEGRADED (0x04) | ||
| 1167 | #define MPI2_RAID_VOL_STATE_OPTIMAL (0x05) | ||
| 1168 | |||
| 1169 | /* values for RAID VolumeType */ | ||
| 1170 | #define MPI2_RAID_VOL_TYPE_RAID0 (0x00) | ||
| 1171 | #define MPI2_RAID_VOL_TYPE_RAID1E (0x01) | ||
| 1172 | #define MPI2_RAID_VOL_TYPE_RAID1 (0x02) | ||
| 1173 | #define MPI2_RAID_VOL_TYPE_RAID10 (0x05) | ||
| 1174 | #define MPI2_RAID_VOL_TYPE_UNKNOWN (0xFF) | ||
| 1175 | |||
| 1176 | /* values for RAID Volume Page 0 VolumeStatusFlags field */ | ||
| 1177 | #define MPI2_RAIDVOL0_STATUS_FLAG_PENDING_RESYNC (0x02000000) | ||
| 1178 | #define MPI2_RAIDVOL0_STATUS_FLAG_BACKG_INIT_PENDING (0x01000000) | ||
| 1179 | #define MPI2_RAIDVOL0_STATUS_FLAG_MDC_PENDING (0x00800000) | ||
| 1180 | #define MPI2_RAIDVOL0_STATUS_FLAG_USER_CONSIST_PENDING (0x00400000) | ||
| 1181 | #define MPI2_RAIDVOL0_STATUS_FLAG_MAKE_DATA_CONSISTENT (0x00200000) | ||
| 1182 | #define MPI2_RAIDVOL0_STATUS_FLAG_DATA_SCRUB (0x00100000) | ||
| 1183 | #define MPI2_RAIDVOL0_STATUS_FLAG_CONSISTENCY_CHECK (0x00080000) | ||
| 1184 | #define MPI2_RAIDVOL0_STATUS_FLAG_CAPACITY_EXPANSION (0x00040000) | ||
| 1185 | #define MPI2_RAIDVOL0_STATUS_FLAG_BACKGROUND_INIT (0x00020000) | ||
| 1186 | #define MPI2_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS (0x00010000) | ||
| 1187 | #define MPI2_RAIDVOL0_STATUS_FLAG_OCE_ALLOWED (0x00000040) | ||
| 1188 | #define MPI2_RAIDVOL0_STATUS_FLAG_BGI_COMPLETE (0x00000020) | ||
| 1189 | #define MPI2_RAIDVOL0_STATUS_FLAG_1E_OFFSET_MIRROR (0x00000000) | ||
| 1190 | #define MPI2_RAIDVOL0_STATUS_FLAG_1E_ADJACENT_MIRROR (0x00000010) | ||
| 1191 | #define MPI2_RAIDVOL0_STATUS_FLAG_BAD_BLOCK_TABLE_FULL (0x00000008) | ||
| 1192 | #define MPI2_RAIDVOL0_STATUS_FLAG_VOLUME_INACTIVE (0x00000004) | ||
| 1193 | #define MPI2_RAIDVOL0_STATUS_FLAG_QUIESCED (0x00000002) | ||
| 1194 | #define MPI2_RAIDVOL0_STATUS_FLAG_ENABLED (0x00000001) | ||
| 1195 | |||
| 1196 | /* values for RAID Volume Page 0 SupportedPhysDisks field */ | ||
| 1197 | #define MPI2_RAIDVOL0_SUPPORT_SOLID_STATE_DISKS (0x08) | ||
| 1198 | #define MPI2_RAIDVOL0_SUPPORT_HARD_DISKS (0x04) | ||
| 1199 | #define MPI2_RAIDVOL0_SUPPORT_SAS_PROTOCOL (0x02) | ||
| 1200 | #define MPI2_RAIDVOL0_SUPPORT_SATA_PROTOCOL (0x01) | ||
| 1201 | |||
| 1202 | /* values for RAID Volume Page 0 InactiveStatus field */ | ||
| 1203 | #define MPI2_RAIDVOLPAGE0_UNKNOWN_INACTIVE (0x00) | ||
| 1204 | #define MPI2_RAIDVOLPAGE0_STALE_METADATA_INACTIVE (0x01) | ||
| 1205 | #define MPI2_RAIDVOLPAGE0_FOREIGN_VOLUME_INACTIVE (0x02) | ||
| 1206 | #define MPI2_RAIDVOLPAGE0_INSUFFICIENT_RESOURCE_INACTIVE (0x03) | ||
| 1207 | #define MPI2_RAIDVOLPAGE0_CLONE_VOLUME_INACTIVE (0x04) | ||
| 1208 | #define MPI2_RAIDVOLPAGE0_INSUFFICIENT_METADATA_INACTIVE (0x05) | ||
| 1209 | #define MPI2_RAIDVOLPAGE0_PREVIOUSLY_DELETED (0x06) | ||
| 1210 | |||
| 1211 | |||
| 1212 | /* RAID Volume Page 1 */ | ||
| 1213 | |||
| 1214 | typedef struct _MPI2_CONFIG_PAGE_RAID_VOL_1 | ||
| 1215 | { | ||
| 1216 | MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ | ||
| 1217 | U16 DevHandle; /* 0x04 */ | ||
| 1218 | U16 Reserved0; /* 0x06 */ | ||
| 1219 | U8 GUID[24]; /* 0x08 */ | ||
| 1220 | U8 Name[16]; /* 0x20 */ | ||
| 1221 | U64 WWID; /* 0x30 */ | ||
| 1222 | U32 Reserved1; /* 0x38 */ | ||
| 1223 | U32 Reserved2; /* 0x3C */ | ||
| 1224 | } MPI2_CONFIG_PAGE_RAID_VOL_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_RAID_VOL_1, | ||
| 1225 | Mpi2RaidVolPage1_t, MPI2_POINTER pMpi2RaidVolPage1_t; | ||
| 1226 | |||
| 1227 | #define MPI2_RAIDVOLPAGE1_PAGEVERSION (0x03) | ||
| 1228 | |||
| 1229 | |||
| 1230 | /**************************************************************************** | ||
| 1231 | * RAID Physical Disk Config Pages | ||
| 1232 | ****************************************************************************/ | ||
| 1233 | |||
| 1234 | /* RAID Physical Disk Page 0 */ | ||
| 1235 | |||
| 1236 | typedef struct _MPI2_RAIDPHYSDISK0_SETTINGS | ||
| 1237 | { | ||
| 1238 | U16 Reserved1; /* 0x00 */ | ||
| 1239 | U8 HotSparePool; /* 0x02 */ | ||
| 1240 | U8 Reserved2; /* 0x03 */ | ||
| 1241 | } MPI2_RAIDPHYSDISK0_SETTINGS, MPI2_POINTER PTR_MPI2_RAIDPHYSDISK0_SETTINGS, | ||
| 1242 | Mpi2RaidPhysDisk0Settings_t, MPI2_POINTER pMpi2RaidPhysDisk0Settings_t; | ||
| 1243 | |||
| 1244 | /* use MPI2_RAID_HOT_SPARE_POOL_ defines for the HotSparePool field */ | ||
| 1245 | |||
| 1246 | typedef struct _MPI2_RAIDPHYSDISK0_INQUIRY_DATA | ||
| 1247 | { | ||
| 1248 | U8 VendorID[8]; /* 0x00 */ | ||
| 1249 | U8 ProductID[16]; /* 0x08 */ | ||
| 1250 | U8 ProductRevLevel[4]; /* 0x18 */ | ||
| 1251 | U8 SerialNum[32]; /* 0x1C */ | ||
| 1252 | } MPI2_RAIDPHYSDISK0_INQUIRY_DATA, | ||
| 1253 | MPI2_POINTER PTR_MPI2_RAIDPHYSDISK0_INQUIRY_DATA, | ||
| 1254 | Mpi2RaidPhysDisk0InquiryData_t, MPI2_POINTER pMpi2RaidPhysDisk0InquiryData_t; | ||
| 1255 | |||
| 1256 | typedef struct _MPI2_CONFIG_PAGE_RD_PDISK_0 | ||
| 1257 | { | ||
| 1258 | MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ | ||
| 1259 | U16 DevHandle; /* 0x04 */ | ||
| 1260 | U8 Reserved1; /* 0x06 */ | ||
| 1261 | U8 PhysDiskNum; /* 0x07 */ | ||
| 1262 | MPI2_RAIDPHYSDISK0_SETTINGS PhysDiskSettings; /* 0x08 */ | ||
| 1263 | U32 Reserved2; /* 0x0C */ | ||
| 1264 | MPI2_RAIDPHYSDISK0_INQUIRY_DATA InquiryData; /* 0x10 */ | ||
| 1265 | U32 Reserved3; /* 0x4C */ | ||
| 1266 | U8 PhysDiskState; /* 0x50 */ | ||
| 1267 | U8 OfflineReason; /* 0x51 */ | ||
| 1268 | U8 IncompatibleReason; /* 0x52 */ | ||
| 1269 | U8 PhysDiskAttributes; /* 0x53 */ | ||
| 1270 | U32 PhysDiskStatusFlags; /* 0x54 */ | ||
| 1271 | U64 DeviceMaxLBA; /* 0x58 */ | ||
| 1272 | U64 HostMaxLBA; /* 0x60 */ | ||
| 1273 | U64 CoercedMaxLBA; /* 0x68 */ | ||
| 1274 | U16 BlockSize; /* 0x70 */ | ||
| 1275 | U16 Reserved5; /* 0x72 */ | ||
| 1276 | U32 Reserved6; /* 0x74 */ | ||
| 1277 | } MPI2_CONFIG_PAGE_RD_PDISK_0, | ||
| 1278 | MPI2_POINTER PTR_MPI2_CONFIG_PAGE_RD_PDISK_0, | ||
| 1279 | Mpi2RaidPhysDiskPage0_t, MPI2_POINTER pMpi2RaidPhysDiskPage0_t; | ||
| 1280 | |||
| 1281 | #define MPI2_RAIDPHYSDISKPAGE0_PAGEVERSION (0x05) | ||
| 1282 | |||
| 1283 | /* PhysDiskState defines */ | ||
| 1284 | #define MPI2_RAID_PD_STATE_NOT_CONFIGURED (0x00) | ||
| 1285 | #define MPI2_RAID_PD_STATE_NOT_COMPATIBLE (0x01) | ||
| 1286 | #define MPI2_RAID_PD_STATE_OFFLINE (0x02) | ||
| 1287 | #define MPI2_RAID_PD_STATE_ONLINE (0x03) | ||
| 1288 | #define MPI2_RAID_PD_STATE_HOT_SPARE (0x04) | ||
| 1289 | #define MPI2_RAID_PD_STATE_DEGRADED (0x05) | ||
| 1290 | #define MPI2_RAID_PD_STATE_REBUILDING (0x06) | ||
| 1291 | #define MPI2_RAID_PD_STATE_OPTIMAL (0x07) | ||
| 1292 | |||
| 1293 | /* OfflineReason defines */ | ||
| 1294 | #define MPI2_PHYSDISK0_ONLINE (0x00) | ||
| 1295 | #define MPI2_PHYSDISK0_OFFLINE_MISSING (0x01) | ||
| 1296 | #define MPI2_PHYSDISK0_OFFLINE_FAILED (0x03) | ||
| 1297 | #define MPI2_PHYSDISK0_OFFLINE_INITIALIZING (0x04) | ||
| 1298 | #define MPI2_PHYSDISK0_OFFLINE_REQUESTED (0x05) | ||
| 1299 | #define MPI2_PHYSDISK0_OFFLINE_FAILED_REQUESTED (0x06) | ||
| 1300 | #define MPI2_PHYSDISK0_OFFLINE_OTHER (0xFF) | ||
| 1301 | |||
| 1302 | /* IncompatibleReason defines */ | ||
| 1303 | #define MPI2_PHYSDISK0_COMPATIBLE (0x00) | ||
| 1304 | #define MPI2_PHYSDISK0_INCOMPATIBLE_PROTOCOL (0x01) | ||
| 1305 | #define MPI2_PHYSDISK0_INCOMPATIBLE_BLOCKSIZE (0x02) | ||
| 1306 | #define MPI2_PHYSDISK0_INCOMPATIBLE_MAX_LBA (0x03) | ||
| 1307 | #define MPI2_PHYSDISK0_INCOMPATIBLE_SATA_EXTENDED_CMD (0x04) | ||
| 1308 | #define MPI2_PHYSDISK0_INCOMPATIBLE_REMOVEABLE_MEDIA (0x05) | ||
| 1309 | #define MPI2_PHYSDISK0_INCOMPATIBLE_UNKNOWN (0xFF) | ||
| 1310 | |||
| 1311 | /* PhysDiskAttributes defines */ | ||
| 1312 | #define MPI2_PHYSDISK0_ATTRIB_SOLID_STATE_DRIVE (0x08) | ||
| 1313 | #define MPI2_PHYSDISK0_ATTRIB_HARD_DISK_DRIVE (0x04) | ||
| 1314 | #define MPI2_PHYSDISK0_ATTRIB_SAS_PROTOCOL (0x02) | ||
| 1315 | #define MPI2_PHYSDISK0_ATTRIB_SATA_PROTOCOL (0x01) | ||
| 1316 | |||
| 1317 | /* PhysDiskStatusFlags defines */ | ||
| 1318 | #define MPI2_PHYSDISK0_STATUS_FLAG_NOT_CERTIFIED (0x00000040) | ||
| 1319 | #define MPI2_PHYSDISK0_STATUS_FLAG_OCE_TARGET (0x00000020) | ||
| 1320 | #define MPI2_PHYSDISK0_STATUS_FLAG_WRITE_CACHE_ENABLED (0x00000010) | ||
| 1321 | #define MPI2_PHYSDISK0_STATUS_FLAG_OPTIMAL_PREVIOUS (0x00000000) | ||
| 1322 | #define MPI2_PHYSDISK0_STATUS_FLAG_NOT_OPTIMAL_PREVIOUS (0x00000008) | ||
| 1323 | #define MPI2_PHYSDISK0_STATUS_FLAG_INACTIVE_VOLUME (0x00000004) | ||
| 1324 | #define MPI2_PHYSDISK0_STATUS_FLAG_QUIESCED (0x00000002) | ||
| 1325 | #define MPI2_PHYSDISK0_STATUS_FLAG_OUT_OF_SYNC (0x00000001) | ||
| 1326 | |||
| 1327 | |||
| 1328 | /* RAID Physical Disk Page 1 */ | ||
| 1329 | |||
| 1330 | /* | ||
| 1331 | * Host code (drivers, BIOS, utilities, etc.) should leave this define set to | ||
| 1332 | * one and check Header.PageLength or NumPhysDiskPaths at runtime. | ||
| 1333 | */ | ||
| 1334 | #ifndef MPI2_RAID_PHYS_DISK1_PATH_MAX | ||
| 1335 | #define MPI2_RAID_PHYS_DISK1_PATH_MAX (1) | ||
| 1336 | #endif | ||
| 1337 | |||
| 1338 | typedef struct _MPI2_RAIDPHYSDISK1_PATH | ||
| 1339 | { | ||
| 1340 | U16 DevHandle; /* 0x00 */ | ||
| 1341 | U16 Reserved1; /* 0x02 */ | ||
| 1342 | U64 WWID; /* 0x04 */ | ||
| 1343 | U64 OwnerWWID; /* 0x0C */ | ||
| 1344 | U8 OwnerIdentifier; /* 0x14 */ | ||
| 1345 | U8 Reserved2; /* 0x15 */ | ||
| 1346 | U16 Flags; /* 0x16 */ | ||
| 1347 | } MPI2_RAIDPHYSDISK1_PATH, MPI2_POINTER PTR_MPI2_RAIDPHYSDISK1_PATH, | ||
| 1348 | Mpi2RaidPhysDisk1Path_t, MPI2_POINTER pMpi2RaidPhysDisk1Path_t; | ||
| 1349 | |||
| 1350 | /* RAID Physical Disk Page 1 Physical Disk Path Flags field defines */ | ||
| 1351 | #define MPI2_RAID_PHYSDISK1_FLAG_PRIMARY (0x0004) | ||
| 1352 | #define MPI2_RAID_PHYSDISK1_FLAG_BROKEN (0x0002) | ||
| 1353 | #define MPI2_RAID_PHYSDISK1_FLAG_INVALID (0x0001) | ||
| 1354 | |||
| 1355 | typedef struct _MPI2_CONFIG_PAGE_RD_PDISK_1 | ||
| 1356 | { | ||
| 1357 | MPI2_CONFIG_PAGE_HEADER Header; /* 0x00 */ | ||
| 1358 | U8 NumPhysDiskPaths; /* 0x04 */ | ||
| 1359 | U8 PhysDiskNum; /* 0x05 */ | ||
| 1360 | U16 Reserved1; /* 0x06 */ | ||
| 1361 | U32 Reserved2; /* 0x08 */ | ||
| 1362 | MPI2_RAIDPHYSDISK1_PATH PhysicalDiskPath[MPI2_RAID_PHYS_DISK1_PATH_MAX];/* 0x0C */ | ||
| 1363 | } MPI2_CONFIG_PAGE_RD_PDISK_1, | ||
| 1364 | MPI2_POINTER PTR_MPI2_CONFIG_PAGE_RD_PDISK_1, | ||
| 1365 | Mpi2RaidPhysDiskPage1_t, MPI2_POINTER pMpi2RaidPhysDiskPage1_t; | ||
| 1366 | |||
| 1367 | #define MPI2_RAIDPHYSDISKPAGE1_PAGEVERSION (0x02) | ||
| 1368 | |||
| 1369 | |||
| 1370 | /**************************************************************************** | ||
| 1371 | * values for fields used by several types of SAS Config Pages | ||
| 1372 | ****************************************************************************/ | ||
| 1373 | |||
| 1374 | /* values for NegotiatedLinkRates fields */ | ||
| 1375 | #define MPI2_SAS_NEG_LINK_RATE_MASK_LOGICAL (0xF0) | ||
| 1376 | #define MPI2_SAS_NEG_LINK_RATE_SHIFT_LOGICAL (4) | ||
| 1377 | #define MPI2_SAS_NEG_LINK_RATE_MASK_PHYSICAL (0x0F) | ||
| 1378 | /* link rates used for Negotiated Physical and Logical Link Rate */ | ||
| 1379 | #define MPI2_SAS_NEG_LINK_RATE_UNKNOWN_LINK_RATE (0x00) | ||
| 1380 | #define MPI2_SAS_NEG_LINK_RATE_PHY_DISABLED (0x01) | ||
| 1381 | #define MPI2_SAS_NEG_LINK_RATE_NEGOTIATION_FAILED (0x02) | ||
| 1382 | #define MPI2_SAS_NEG_LINK_RATE_SATA_OOB_COMPLETE (0x03) | ||
| 1383 | #define MPI2_SAS_NEG_LINK_RATE_PORT_SELECTOR (0x04) | ||
| 1384 | #define MPI2_SAS_NEG_LINK_RATE_SMP_RESET_IN_PROGRESS (0x05) | ||
| 1385 | #define MPI2_SAS_NEG_LINK_RATE_1_5 (0x08) | ||
| 1386 | #define MPI2_SAS_NEG_LINK_RATE_3_0 (0x09) | ||
| 1387 | #define MPI2_SAS_NEG_LINK_RATE_6_0 (0x0A) | ||
| 1388 | |||
| 1389 | |||
| 1390 | /* values for AttachedPhyInfo fields */ | ||
| 1391 | #define MPI2_SAS_APHYINFO_INSIDE_ZPSDS_PERSISTENT (0x00000040) | ||
| 1392 | #define MPI2_SAS_APHYINFO_REQUESTED_INSIDE_ZPSDS (0x00000020) | ||
| 1393 | #define MPI2_SAS_APHYINFO_BREAK_REPLY_CAPABLE (0x00000010) | ||
| 1394 | |||
| 1395 | #define MPI2_SAS_APHYINFO_REASON_MASK (0x0000000F) | ||
| 1396 | #define MPI2_SAS_APHYINFO_REASON_UNKNOWN (0x00000000) | ||
| 1397 | #define MPI2_SAS_APHYINFO_REASON_POWER_ON (0x00000001) | ||
| 1398 | #define MPI2_SAS_APHYINFO_REASON_HARD_RESET (0x00000002) | ||
| 1399 | #define MPI2_SAS_APHYINFO_REASON_SMP_PHY_CONTROL (0x00000003) | ||
| 1400 | #define MPI2_SAS_APHYINFO_REASON_LOSS_OF_SYNC (0x00000004) | ||
| 1401 | #define MPI2_SAS_APHYINFO_REASON_MULTIPLEXING_SEQ (0x00000005) | ||
| 1402 | #define MPI2_SAS_APHYINFO_REASON_IT_NEXUS_LOSS_TIMER (0x00000006) | ||
| 1403 | #define MPI2_SAS_APHYINFO_REASON_BREAK_TIMEOUT (0x00000007) | ||
| 1404 | #define MPI2_SAS_APHYINFO_REASON_PHY_TEST_STOPPED (0x00000008) | ||
| 1405 | |||
| 1406 | |||
| 1407 | /* values for PhyInfo fields */ | ||
| 1408 | #define MPI2_SAS_PHYINFO_PHY_VACANT (0x80000000) | ||
| 1409 | #define MPI2_SAS_PHYINFO_CHANGED_REQ_INSIDE_ZPSDS (0x04000000) | ||
| 1410 | #define MPI2_SAS_PHYINFO_INSIDE_ZPSDS_PERSISTENT (0x02000000) | ||
| 1411 | #define MPI2_SAS_PHYINFO_REQ_INSIDE_ZPSDS (0x01000000) | ||
| 1412 | #define MPI2_SAS_PHYINFO_ZONE_GROUP_PERSISTENT (0x00400000) | ||
| 1413 | #define MPI2_SAS_PHYINFO_INSIDE_ZPSDS (0x00200000) | ||
| 1414 | #define MPI2_SAS_PHYINFO_ZONING_ENABLED (0x00100000) | ||
| 1415 | |||
| 1416 | #define MPI2_SAS_PHYINFO_REASON_MASK (0x000F0000) | ||
| 1417 | #define MPI2_SAS_PHYINFO_REASON_UNKNOWN (0x00000000) | ||
| 1418 | #define MPI2_SAS_PHYINFO_REASON_POWER_ON (0x00010000) | ||
| 1419 | #define MPI2_SAS_PHYINFO_REASON_HARD_RESET (0x00020000) | ||
| 1420 | #define MPI2_SAS_PHYINFO_REASON_SMP_PHY_CONTROL (0x00030000) | ||
| 1421 | #define MPI2_SAS_PHYINFO_REASON_LOSS_OF_SYNC (0x00040000) | ||
| 1422 | #define MPI2_SAS_PHYINFO_REASON_MULTIPLEXING_SEQ (0x00050000) | ||
| 1423 | #define MPI2_SAS_PHYINFO_REASON_IT_NEXUS_LOSS_TIMER (0x00060000) | ||
| 1424 | #define MPI2_SAS_PHYINFO_REASON_BREAK_TIMEOUT (0x00070000) | ||
| 1425 | #define MPI2_SAS_PHYINFO_REASON_PHY_TEST_STOPPED (0x00080000) | ||
| 1426 | |||
| 1427 | #define MPI2_SAS_PHYINFO_MULTIPLEXING_SUPPORTED (0x00008000) | ||
| 1428 | #define MPI2_SAS_PHYINFO_SATA_PORT_ACTIVE (0x00004000) | ||
| 1429 | #define MPI2_SAS_PHYINFO_SATA_PORT_SELECTOR_PRESENT (0x00002000) | ||
| 1430 | #define MPI2_SAS_PHYINFO_VIRTUAL_PHY (0x00001000) | ||
| 1431 | |||
| 1432 | #define MPI2_SAS_PHYINFO_MASK_PARTIAL_PATHWAY_TIME (0x00000F00) | ||
| 1433 | #define MPI2_SAS_PHYINFO_SHIFT_PARTIAL_PATHWAY_TIME (8) | ||
| 1434 | |||
| 1435 | #define MPI2_SAS_PHYINFO_MASK_ROUTING_ATTRIBUTE (0x000000F0) | ||
| 1436 | #define MPI2_SAS_PHYINFO_DIRECT_ROUTING (0x00000000) | ||
| 1437 | #define MPI2_SAS_PHYINFO_SUBTRACTIVE_ROUTING (0x00000010) | ||
| 1438 | #define MPI2_SAS_PHYINFO_TABLE_ROUTING (0x00000020) | ||
| 1439 | |||
| 1440 | |||
| 1441 | /* values for SAS ProgrammedLinkRate fields */ | ||
| 1442 | #define MPI2_SAS_PRATE_MAX_RATE_MASK (0xF0) | ||
| 1443 | #define MPI2_SAS_PRATE_MAX_RATE_NOT_PROGRAMMABLE (0x00) | ||
| 1444 | #define MPI2_SAS_PRATE_MAX_RATE_1_5 (0x80) | ||
| 1445 | #define MPI2_SAS_PRATE_MAX_RATE_3_0 (0x90) | ||
| 1446 | #define MPI2_SAS_PRATE_MAX_RATE_6_0 (0xA0) | ||
| 1447 | #define MPI2_SAS_PRATE_MIN_RATE_MASK (0x0F) | ||
| 1448 | #define MPI2_SAS_PRATE_MIN_RATE_NOT_PROGRAMMABLE (0x00) | ||
| 1449 | #define MPI2_SAS_PRATE_MIN_RATE_1_5 (0x08) | ||
| 1450 | #define MPI2_SAS_PRATE_MIN_RATE_3_0 (0x09) | ||
| 1451 | #define MPI2_SAS_PRATE_MIN_RATE_6_0 (0x0A) | ||
| 1452 | |||
| 1453 | |||
| 1454 | /* values for SAS HwLinkRate fields */ | ||
| 1455 | #define MPI2_SAS_HWRATE_MAX_RATE_MASK (0xF0) | ||
| 1456 | #define MPI2_SAS_HWRATE_MAX_RATE_1_5 (0x80) | ||
| 1457 | #define MPI2_SAS_HWRATE_MAX_RATE_3_0 (0x90) | ||
| 1458 | #define MPI2_SAS_HWRATE_MAX_RATE_6_0 (0xA0) | ||
| 1459 | #define MPI2_SAS_HWRATE_MIN_RATE_MASK (0x0F) | ||
| 1460 | #define MPI2_SAS_HWRATE_MIN_RATE_1_5 (0x08) | ||
| 1461 | #define MPI2_SAS_HWRATE_MIN_RATE_3_0 (0x09) | ||
| 1462 | #define MPI2_SAS_HWRATE_MIN_RATE_6_0 (0x0A) | ||
| 1463 | |||
| 1464 | |||
| 1465 | |||
| 1466 | /**************************************************************************** | ||
| 1467 | * SAS IO Unit Config Pages | ||
| 1468 | ****************************************************************************/ | ||
| 1469 | |||
| 1470 | /* SAS IO Unit Page 0 */ | ||
| 1471 | |||
| 1472 | typedef struct _MPI2_SAS_IO_UNIT0_PHY_DATA | ||
| 1473 | { | ||
| 1474 | U8 Port; /* 0x00 */ | ||
| 1475 | U8 PortFlags; /* 0x01 */ | ||
| 1476 | U8 PhyFlags; /* 0x02 */ | ||
| 1477 | U8 NegotiatedLinkRate; /* 0x03 */ | ||
| 1478 | U32 ControllerPhyDeviceInfo;/* 0x04 */ | ||
| 1479 | U16 AttachedDevHandle; /* 0x08 */ | ||
| 1480 | U16 ControllerDevHandle; /* 0x0A */ | ||
| 1481 | U32 DiscoveryStatus; /* 0x0C */ | ||
| 1482 | U32 Reserved; /* 0x10 */ | ||
| 1483 | } MPI2_SAS_IO_UNIT0_PHY_DATA, MPI2_POINTER PTR_MPI2_SAS_IO_UNIT0_PHY_DATA, | ||
| 1484 | Mpi2SasIOUnit0PhyData_t, MPI2_POINTER pMpi2SasIOUnit0PhyData_t; | ||
| 1485 | |||
| 1486 | /* | ||
| 1487 | * Host code (drivers, BIOS, utilities, etc.) should leave this define set to | ||
| 1488 | * one and check Header.ExtPageLength or NumPhys at runtime. | ||
| 1489 | */ | ||
| 1490 | #ifndef MPI2_SAS_IOUNIT0_PHY_MAX | ||
| 1491 | #define MPI2_SAS_IOUNIT0_PHY_MAX (1) | ||
| 1492 | #endif | ||
| 1493 | |||
| 1494 | typedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_0 | ||
| 1495 | { | ||
| 1496 | MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ | ||
| 1497 | U32 Reserved1; /* 0x08 */ | ||
| 1498 | U8 NumPhys; /* 0x0C */ | ||
| 1499 | U8 Reserved2; /* 0x0D */ | ||
| 1500 | U16 Reserved3; /* 0x0E */ | ||
| 1501 | MPI2_SAS_IO_UNIT0_PHY_DATA PhyData[MPI2_SAS_IOUNIT0_PHY_MAX]; /* 0x10 */ | ||
| 1502 | } MPI2_CONFIG_PAGE_SASIOUNIT_0, | ||
| 1503 | MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SASIOUNIT_0, | ||
| 1504 | Mpi2SasIOUnitPage0_t, MPI2_POINTER pMpi2SasIOUnitPage0_t; | ||
| 1505 | |||
| 1506 | #define MPI2_SASIOUNITPAGE0_PAGEVERSION (0x05) | ||
| 1507 | |||
| 1508 | /* values for SAS IO Unit Page 0 PortFlags */ | ||
| 1509 | #define MPI2_SASIOUNIT0_PORTFLAGS_DISCOVERY_IN_PROGRESS (0x08) | ||
| 1510 | #define MPI2_SASIOUNIT0_PORTFLAGS_AUTO_PORT_CONFIG (0x01) | ||
| 1511 | |||
| 1512 | /* values for SAS IO Unit Page 0 PhyFlags */ | ||
| 1513 | #define MPI2_SASIOUNIT0_PHYFLAGS_ZONING_ENABLED (0x10) | ||
| 1514 | #define MPI2_SASIOUNIT0_PHYFLAGS_PHY_DISABLED (0x08) | ||
| 1515 | |||
| 1516 | /* use MPI2_SAS_NEG_LINK_RATE_ defines for the NegotiatedLinkRate field */ | ||
| 1517 | |||
| 1518 | /* see mpi2_sas.h for values for SAS IO Unit Page 0 ControllerPhyDeviceInfo values */ | ||
| 1519 | |||
| 1520 | /* values for SAS IO Unit Page 0 DiscoveryStatus */ | ||
| 1521 | #define MPI2_SASIOUNIT0_DS_MAX_ENCLOSURES_EXCEED (0x80000000) | ||
| 1522 | #define MPI2_SASIOUNIT0_DS_MAX_EXPANDERS_EXCEED (0x40000000) | ||
| 1523 | #define MPI2_SASIOUNIT0_DS_MAX_DEVICES_EXCEED (0x20000000) | ||
| 1524 | #define MPI2_SASIOUNIT0_DS_MAX_TOPO_PHYS_EXCEED (0x10000000) | ||
| 1525 | #define MPI2_SASIOUNIT0_DS_DOWNSTREAM_INITIATOR (0x08000000) | ||
| 1526 | #define MPI2_SASIOUNIT0_DS_MULTI_SUBTRACTIVE_SUBTRACTIVE (0x00008000) | ||
| 1527 | #define MPI2_SASIOUNIT0_DS_EXP_MULTI_SUBTRACTIVE (0x00004000) | ||
| 1528 | #define MPI2_SASIOUNIT0_DS_MULTI_PORT_DOMAIN (0x00002000) | ||
| 1529 | #define MPI2_SASIOUNIT0_DS_TABLE_TO_SUBTRACTIVE_LINK (0x00001000) | ||
| 1530 | #define MPI2_SASIOUNIT0_DS_UNSUPPORTED_DEVICE (0x00000800) | ||
| 1531 | #define MPI2_SASIOUNIT0_DS_TABLE_LINK (0x00000400) | ||
| 1532 | #define MPI2_SASIOUNIT0_DS_SUBTRACTIVE_LINK (0x00000200) | ||
| 1533 | #define MPI2_SASIOUNIT0_DS_SMP_CRC_ERROR (0x00000100) | ||
| 1534 | #define MPI2_SASIOUNIT0_DS_SMP_FUNCTION_FAILED (0x00000080) | ||
| 1535 | #define MPI2_SASIOUNIT0_DS_INDEX_NOT_EXIST (0x00000040) | ||
| 1536 | #define MPI2_SASIOUNIT0_DS_OUT_ROUTE_ENTRIES (0x00000020) | ||
| 1537 | #define MPI2_SASIOUNIT0_DS_SMP_TIMEOUT (0x00000010) | ||
| 1538 | #define MPI2_SASIOUNIT0_DS_MULTIPLE_PORTS (0x00000004) | ||
| 1539 | #define MPI2_SASIOUNIT0_DS_UNADDRESSABLE_DEVICE (0x00000002) | ||
| 1540 | #define MPI2_SASIOUNIT0_DS_LOOP_DETECTED (0x00000001) | ||
| 1541 | |||
| 1542 | |||
| 1543 | /* SAS IO Unit Page 1 */ | ||
| 1544 | |||
| 1545 | typedef struct _MPI2_SAS_IO_UNIT1_PHY_DATA | ||
| 1546 | { | ||
| 1547 | U8 Port; /* 0x00 */ | ||
| 1548 | U8 PortFlags; /* 0x01 */ | ||
| 1549 | U8 PhyFlags; /* 0x02 */ | ||
| 1550 | U8 MaxMinLinkRate; /* 0x03 */ | ||
| 1551 | U32 ControllerPhyDeviceInfo; /* 0x04 */ | ||
| 1552 | U16 MaxTargetPortConnectTime; /* 0x08 */ | ||
| 1553 | U16 Reserved1; /* 0x0A */ | ||
| 1554 | } MPI2_SAS_IO_UNIT1_PHY_DATA, MPI2_POINTER PTR_MPI2_SAS_IO_UNIT1_PHY_DATA, | ||
| 1555 | Mpi2SasIOUnit1PhyData_t, MPI2_POINTER pMpi2SasIOUnit1PhyData_t; | ||
| 1556 | |||
| 1557 | /* | ||
| 1558 | * Host code (drivers, BIOS, utilities, etc.) should leave this define set to | ||
| 1559 | * one and check Header.ExtPageLength or NumPhys at runtime. | ||
| 1560 | */ | ||
| 1561 | #ifndef MPI2_SAS_IOUNIT1_PHY_MAX | ||
| 1562 | #define MPI2_SAS_IOUNIT1_PHY_MAX (1) | ||
| 1563 | #endif | ||
| 1564 | |||
| 1565 | typedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_1 | ||
| 1566 | { | ||
| 1567 | MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ | ||
| 1568 | U16 ControlFlags; /* 0x08 */ | ||
| 1569 | U16 SASNarrowMaxQueueDepth; /* 0x0A */ | ||
| 1570 | U16 AdditionalControlFlags; /* 0x0C */ | ||
| 1571 | U16 SASWideMaxQueueDepth; /* 0x0E */ | ||
| 1572 | U8 NumPhys; /* 0x10 */ | ||
| 1573 | U8 SATAMaxQDepth; /* 0x11 */ | ||
| 1574 | U8 ReportDeviceMissingDelay; /* 0x12 */ | ||
| 1575 | U8 IODeviceMissingDelay; /* 0x13 */ | ||
| 1576 | MPI2_SAS_IO_UNIT1_PHY_DATA PhyData[MPI2_SAS_IOUNIT1_PHY_MAX]; /* 0x14 */ | ||
| 1577 | } MPI2_CONFIG_PAGE_SASIOUNIT_1, | ||
| 1578 | MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SASIOUNIT_1, | ||
| 1579 | Mpi2SasIOUnitPage1_t, MPI2_POINTER pMpi2SasIOUnitPage1_t; | ||
| 1580 | |||
| 1581 | #define MPI2_SASIOUNITPAGE1_PAGEVERSION (0x09) | ||
| 1582 | |||
| 1583 | /* values for SAS IO Unit Page 1 ControlFlags */ | ||
| 1584 | #define MPI2_SASIOUNIT1_CONTROL_DEVICE_SELF_TEST (0x8000) | ||
| 1585 | #define MPI2_SASIOUNIT1_CONTROL_SATA_3_0_MAX (0x4000) | ||
| 1586 | #define MPI2_SASIOUNIT1_CONTROL_SATA_1_5_MAX (0x2000) | ||
| 1587 | #define MPI2_SASIOUNIT1_CONTROL_SATA_SW_PRESERVE (0x1000) | ||
| 1588 | |||
| 1589 | #define MPI2_SASIOUNIT1_CONTROL_MASK_DEV_SUPPORT (0x0600) | ||
| 1590 | #define MPI2_SASIOUNIT1_CONTROL_SHIFT_DEV_SUPPORT (9) | ||
| 1591 | #define MPI2_SASIOUNIT1_CONTROL_DEV_SUPPORT_BOTH (0x0) | ||
| 1592 | #define MPI2_SASIOUNIT1_CONTROL_DEV_SAS_SUPPORT (0x1) | ||
| 1593 | #define MPI2_SASIOUNIT1_CONTROL_DEV_SATA_SUPPORT (0x2) | ||
| 1594 | |||
| 1595 | #define MPI2_SASIOUNIT1_CONTROL_SATA_48BIT_LBA_REQUIRED (0x0080) | ||
| 1596 | #define MPI2_SASIOUNIT1_CONTROL_SATA_SMART_REQUIRED (0x0040) | ||
| 1597 | #define MPI2_SASIOUNIT1_CONTROL_SATA_NCQ_REQUIRED (0x0020) | ||
| 1598 | #define MPI2_SASIOUNIT1_CONTROL_SATA_FUA_REQUIRED (0x0010) | ||
| 1599 | #define MPI2_SASIOUNIT1_CONTROL_TABLE_SUBTRACTIVE_ILLEGAL (0x0008) | ||
| 1600 | #define MPI2_SASIOUNIT1_CONTROL_SUBTRACTIVE_ILLEGAL (0x0004) | ||
| 1601 | #define MPI2_SASIOUNIT1_CONTROL_FIRST_LVL_DISC_ONLY (0x0002) | ||
| 1602 | #define MPI2_SASIOUNIT1_CONTROL_CLEAR_AFFILIATION (0x0001) | ||
| 1603 | |||
| 1604 | /* values for SAS IO Unit Page 1 AdditionalControlFlags */ | ||
| 1605 | #define MPI2_SASIOUNIT1_ACONTROL_MULTI_PORT_DOMAIN_ILLEGAL (0x0080) | ||
| 1606 | #define MPI2_SASIOUNIT1_ACONTROL_SATA_ASYNCHROUNOUS_NOTIFICATION (0x0040) | ||
| 1607 | #define MPI2_SASIOUNIT1_ACONTROL_INVALID_TOPOLOGY_CORRECTION (0x0020) | ||
| 1608 | #define MPI2_SASIOUNIT1_ACONTROL_PORT_ENABLE_ONLY_SATA_LINK_RESET (0x0010) | ||
| 1609 | #define MPI2_SASIOUNIT1_ACONTROL_OTHER_AFFILIATION_SATA_LINK_RESET (0x0008) | ||
| 1610 | #define MPI2_SASIOUNIT1_ACONTROL_SELF_AFFILIATION_SATA_LINK_RESET (0x0004) | ||
| 1611 | #define MPI2_SASIOUNIT1_ACONTROL_NO_AFFILIATION_SATA_LINK_RESET (0x0002) | ||
| 1612 | #define MPI2_SASIOUNIT1_ACONTROL_ALLOW_TABLE_TO_TABLE (0x0001) | ||
| 1613 | |||
| 1614 | /* defines for SAS IO Unit Page 1 ReportDeviceMissingDelay */ | ||
| 1615 | #define MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK (0x7F) | ||
| 1616 | #define MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16 (0x80) | ||
| 1617 | |||
| 1618 | /* values for SAS IO Unit Page 1 PortFlags */ | ||
| 1619 | #define MPI2_SASIOUNIT1_PORT_FLAGS_AUTO_PORT_CONFIG (0x01) | ||
| 1620 | |||
| 1621 | /* values for SAS IO Unit Page 2 PhyFlags */ | ||
| 1622 | #define MPI2_SASIOUNIT1_PHYFLAGS_ZONING_ENABLE (0x10) | ||
| 1623 | #define MPI2_SASIOUNIT1_PHYFLAGS_PHY_DISABLE (0x08) | ||
| 1624 | |||
| 1625 | /* values for SAS IO Unit Page 0 MaxMinLinkRate */ | ||
| 1626 | #define MPI2_SASIOUNIT1_MAX_RATE_MASK (0xF0) | ||
| 1627 | #define MPI2_SASIOUNIT1_MAX_RATE_1_5 (0x80) | ||
| 1628 | #define MPI2_SASIOUNIT1_MAX_RATE_3_0 (0x90) | ||
| 1629 | #define MPI2_SASIOUNIT1_MAX_RATE_6_0 (0xA0) | ||
| 1630 | #define MPI2_SASIOUNIT1_MIN_RATE_MASK (0x0F) | ||
| 1631 | #define MPI2_SASIOUNIT1_MIN_RATE_1_5 (0x08) | ||
| 1632 | #define MPI2_SASIOUNIT1_MIN_RATE_3_0 (0x09) | ||
| 1633 | #define MPI2_SASIOUNIT1_MIN_RATE_6_0 (0x0A) | ||
| 1634 | |||
| 1635 | /* see mpi2_sas.h for values for SAS IO Unit Page 1 ControllerPhyDeviceInfo values */ | ||
| 1636 | |||
| 1637 | |||
| 1638 | /* SAS IO Unit Page 4 */ | ||
| 1639 | |||
| 1640 | typedef struct _MPI2_SAS_IOUNIT4_SPINUP_GROUP | ||
| 1641 | { | ||
| 1642 | U8 MaxTargetSpinup; /* 0x00 */ | ||
| 1643 | U8 SpinupDelay; /* 0x01 */ | ||
| 1644 | U16 Reserved1; /* 0x02 */ | ||
| 1645 | } MPI2_SAS_IOUNIT4_SPINUP_GROUP, MPI2_POINTER PTR_MPI2_SAS_IOUNIT4_SPINUP_GROUP, | ||
| 1646 | Mpi2SasIOUnit4SpinupGroup_t, MPI2_POINTER pMpi2SasIOUnit4SpinupGroup_t; | ||
| 1647 | |||
| 1648 | /* | ||
| 1649 | * Host code (drivers, BIOS, utilities, etc.) should leave this define set to | ||
| 1650 | * four and check Header.ExtPageLength or NumPhys at runtime. | ||
| 1651 | */ | ||
| 1652 | #ifndef MPI2_SAS_IOUNIT4_PHY_MAX | ||
| 1653 | #define MPI2_SAS_IOUNIT4_PHY_MAX (4) | ||
| 1654 | #endif | ||
| 1655 | |||
| 1656 | typedef struct _MPI2_CONFIG_PAGE_SASIOUNIT_4 | ||
| 1657 | { | ||
| 1658 | MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ | ||
| 1659 | MPI2_SAS_IOUNIT4_SPINUP_GROUP SpinupGroupParameters[4]; /* 0x08 */ | ||
| 1660 | U32 Reserved1; /* 0x18 */ | ||
| 1661 | U32 Reserved2; /* 0x1C */ | ||
| 1662 | U32 Reserved3; /* 0x20 */ | ||
| 1663 | U8 BootDeviceWaitTime; /* 0x24 */ | ||
| 1664 | U8 Reserved4; /* 0x25 */ | ||
| 1665 | U16 Reserved5; /* 0x26 */ | ||
| 1666 | U8 NumPhys; /* 0x28 */ | ||
| 1667 | U8 PEInitialSpinupDelay; /* 0x29 */ | ||
| 1668 | U8 PEReplyDelay; /* 0x2A */ | ||
| 1669 | U8 Flags; /* 0x2B */ | ||
| 1670 | U8 PHY[MPI2_SAS_IOUNIT4_PHY_MAX]; /* 0x2C */ | ||
| 1671 | } MPI2_CONFIG_PAGE_SASIOUNIT_4, | ||
| 1672 | MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SASIOUNIT_4, | ||
| 1673 | Mpi2SasIOUnitPage4_t, MPI2_POINTER pMpi2SasIOUnitPage4_t; | ||
| 1674 | |||
| 1675 | #define MPI2_SASIOUNITPAGE4_PAGEVERSION (0x02) | ||
| 1676 | |||
| 1677 | /* defines for Flags field */ | ||
| 1678 | #define MPI2_SASIOUNIT4_FLAGS_AUTO_PORTENABLE (0x01) | ||
| 1679 | |||
| 1680 | /* defines for PHY field */ | ||
| 1681 | #define MPI2_SASIOUNIT4_PHY_SPINUP_GROUP_MASK (0x03) | ||
| 1682 | |||
| 1683 | |||
| 1684 | /**************************************************************************** | ||
| 1685 | * SAS Expander Config Pages | ||
| 1686 | ****************************************************************************/ | ||
| 1687 | |||
| 1688 | /* SAS Expander Page 0 */ | ||
| 1689 | |||
| 1690 | typedef struct _MPI2_CONFIG_PAGE_EXPANDER_0 | ||
| 1691 | { | ||
| 1692 | MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ | ||
| 1693 | U8 PhysicalPort; /* 0x08 */ | ||
| 1694 | U8 ReportGenLength; /* 0x09 */ | ||
| 1695 | U16 EnclosureHandle; /* 0x0A */ | ||
| 1696 | U64 SASAddress; /* 0x0C */ | ||
| 1697 | U32 DiscoveryStatus; /* 0x14 */ | ||
| 1698 | U16 DevHandle; /* 0x18 */ | ||
| 1699 | U16 ParentDevHandle; /* 0x1A */ | ||
| 1700 | U16 ExpanderChangeCount; /* 0x1C */ | ||
| 1701 | U16 ExpanderRouteIndexes; /* 0x1E */ | ||
| 1702 | U8 NumPhys; /* 0x20 */ | ||
| 1703 | U8 SASLevel; /* 0x21 */ | ||
| 1704 | U16 Flags; /* 0x22 */ | ||
| 1705 | U16 STPBusInactivityTimeLimit; /* 0x24 */ | ||
| 1706 | U16 STPMaxConnectTimeLimit; /* 0x26 */ | ||
| 1707 | U16 STP_SMP_NexusLossTime; /* 0x28 */ | ||
| 1708 | U16 MaxNumRoutedSasAddresses; /* 0x2A */ | ||
| 1709 | U64 ActiveZoneManagerSASAddress;/* 0x2C */ | ||
| 1710 | U16 ZoneLockInactivityLimit; /* 0x34 */ | ||
| 1711 | U16 Reserved1; /* 0x36 */ | ||
| 1712 | } MPI2_CONFIG_PAGE_EXPANDER_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_EXPANDER_0, | ||
| 1713 | Mpi2ExpanderPage0_t, MPI2_POINTER pMpi2ExpanderPage0_t; | ||
| 1714 | |||
| 1715 | #define MPI2_SASEXPANDER0_PAGEVERSION (0x05) | ||
| 1716 | |||
| 1717 | /* values for SAS Expander Page 0 DiscoveryStatus field */ | ||
| 1718 | #define MPI2_SAS_EXPANDER0_DS_MAX_ENCLOSURES_EXCEED (0x80000000) | ||
| 1719 | #define MPI2_SAS_EXPANDER0_DS_MAX_EXPANDERS_EXCEED (0x40000000) | ||
| 1720 | #define MPI2_SAS_EXPANDER0_DS_MAX_DEVICES_EXCEED (0x20000000) | ||
| 1721 | #define MPI2_SAS_EXPANDER0_DS_MAX_TOPO_PHYS_EXCEED (0x10000000) | ||
| 1722 | #define MPI2_SAS_EXPANDER0_DS_DOWNSTREAM_INITIATOR (0x08000000) | ||
| 1723 | #define MPI2_SAS_EXPANDER0_DS_MULTI_SUBTRACTIVE_SUBTRACTIVE (0x00008000) | ||
| 1724 | #define MPI2_SAS_EXPANDER0_DS_EXP_MULTI_SUBTRACTIVE (0x00004000) | ||
| 1725 | #define MPI2_SAS_EXPANDER0_DS_MULTI_PORT_DOMAIN (0x00002000) | ||
| 1726 | #define MPI2_SAS_EXPANDER0_DS_TABLE_TO_SUBTRACTIVE_LINK (0x00001000) | ||
| 1727 | #define MPI2_SAS_EXPANDER0_DS_UNSUPPORTED_DEVICE (0x00000800) | ||
| 1728 | #define MPI2_SAS_EXPANDER0_DS_TABLE_LINK (0x00000400) | ||
| 1729 | #define MPI2_SAS_EXPANDER0_DS_SUBTRACTIVE_LINK (0x00000200) | ||
| 1730 | #define MPI2_SAS_EXPANDER0_DS_SMP_CRC_ERROR (0x00000100) | ||
| 1731 | #define MPI2_SAS_EXPANDER0_DS_SMP_FUNCTION_FAILED (0x00000080) | ||
| 1732 | #define MPI2_SAS_EXPANDER0_DS_INDEX_NOT_EXIST (0x00000040) | ||
| 1733 | #define MPI2_SAS_EXPANDER0_DS_OUT_ROUTE_ENTRIES (0x00000020) | ||
| 1734 | #define MPI2_SAS_EXPANDER0_DS_SMP_TIMEOUT (0x00000010) | ||
| 1735 | #define MPI2_SAS_EXPANDER0_DS_MULTIPLE_PORTS (0x00000004) | ||
| 1736 | #define MPI2_SAS_EXPANDER0_DS_UNADDRESSABLE_DEVICE (0x00000002) | ||
| 1737 | #define MPI2_SAS_EXPANDER0_DS_LOOP_DETECTED (0x00000001) | ||
| 1738 | |||
| 1739 | /* values for SAS Expander Page 0 Flags field */ | ||
| 1740 | #define MPI2_SAS_EXPANDER0_FLAGS_ZONE_LOCKED (0x1000) | ||
| 1741 | #define MPI2_SAS_EXPANDER0_FLAGS_SUPPORTED_PHYSICAL_PRES (0x0800) | ||
| 1742 | #define MPI2_SAS_EXPANDER0_FLAGS_ASSERTED_PHYSICAL_PRES (0x0400) | ||
| 1743 | #define MPI2_SAS_EXPANDER0_FLAGS_ZONING_SUPPORT (0x0200) | ||
| 1744 | #define MPI2_SAS_EXPANDER0_FLAGS_ENABLED_ZONING (0x0100) | ||
| 1745 | #define MPI2_SAS_EXPANDER0_FLAGS_TABLE_TO_TABLE_SUPPORT (0x0080) | ||
| 1746 | #define MPI2_SAS_EXPANDER0_FLAGS_CONNECTOR_END_DEVICE (0x0010) | ||
| 1747 | #define MPI2_SAS_EXPANDER0_FLAGS_OTHERS_CONFIG (0x0004) | ||
| 1748 | #define MPI2_SAS_EXPANDER0_FLAGS_CONFIG_IN_PROGRESS (0x0002) | ||
| 1749 | #define MPI2_SAS_EXPANDER0_FLAGS_ROUTE_TABLE_CONFIG (0x0001) | ||
| 1750 | |||
| 1751 | |||
| 1752 | /* SAS Expander Page 1 */ | ||
| 1753 | |||
| 1754 | typedef struct _MPI2_CONFIG_PAGE_EXPANDER_1 | ||
| 1755 | { | ||
| 1756 | MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ | ||
| 1757 | U8 PhysicalPort; /* 0x08 */ | ||
| 1758 | U8 Reserved1; /* 0x09 */ | ||
| 1759 | U16 Reserved2; /* 0x0A */ | ||
| 1760 | U8 NumPhys; /* 0x0C */ | ||
| 1761 | U8 Phy; /* 0x0D */ | ||
| 1762 | U16 NumTableEntriesProgrammed; /* 0x0E */ | ||
| 1763 | U8 ProgrammedLinkRate; /* 0x10 */ | ||
| 1764 | U8 HwLinkRate; /* 0x11 */ | ||
| 1765 | U16 AttachedDevHandle; /* 0x12 */ | ||
| 1766 | U32 PhyInfo; /* 0x14 */ | ||
| 1767 | U32 AttachedDeviceInfo; /* 0x18 */ | ||
| 1768 | U16 ExpanderDevHandle; /* 0x1C */ | ||
| 1769 | U8 ChangeCount; /* 0x1E */ | ||
| 1770 | U8 NegotiatedLinkRate; /* 0x1F */ | ||
| 1771 | U8 PhyIdentifier; /* 0x20 */ | ||
| 1772 | U8 AttachedPhyIdentifier; /* 0x21 */ | ||
| 1773 | U8 Reserved3; /* 0x22 */ | ||
| 1774 | U8 DiscoveryInfo; /* 0x23 */ | ||
| 1775 | U32 AttachedPhyInfo; /* 0x24 */ | ||
| 1776 | U8 ZoneGroup; /* 0x28 */ | ||
| 1777 | U8 SelfConfigStatus; /* 0x29 */ | ||
| 1778 | U16 Reserved4; /* 0x2A */ | ||
| 1779 | } MPI2_CONFIG_PAGE_EXPANDER_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_EXPANDER_1, | ||
| 1780 | Mpi2ExpanderPage1_t, MPI2_POINTER pMpi2ExpanderPage1_t; | ||
| 1781 | |||
| 1782 | #define MPI2_SASEXPANDER1_PAGEVERSION (0x02) | ||
| 1783 | |||
| 1784 | /* use MPI2_SAS_PRATE_ defines for the ProgrammedLinkRate field */ | ||
| 1785 | |||
| 1786 | /* use MPI2_SAS_HWRATE_ defines for the HwLinkRate field */ | ||
| 1787 | |||
| 1788 | /* use MPI2_SAS_PHYINFO_ for the PhyInfo field */ | ||
| 1789 | |||
| 1790 | /* see mpi2_sas.h for the MPI2_SAS_DEVICE_INFO_ defines used for the AttachedDeviceInfo field */ | ||
| 1791 | |||
| 1792 | /* use MPI2_SAS_NEG_LINK_RATE_ defines for the NegotiatedLinkRate field */ | ||
| 1793 | |||
| 1794 | /* use MPI2_SAS_APHYINFO_ defines for AttachedPhyInfo field */ | ||
| 1795 | |||
| 1796 | /* values for SAS Expander Page 1 DiscoveryInfo field */ | ||
| 1797 | #define MPI2_SAS_EXPANDER1_DISCINFO_BAD_PHY_DISABLED (0x04) | ||
| 1798 | #define MPI2_SAS_EXPANDER1_DISCINFO_LINK_STATUS_CHANGE (0x02) | ||
| 1799 | #define MPI2_SAS_EXPANDER1_DISCINFO_NO_ROUTING_ENTRIES (0x01) | ||
| 1800 | |||
| 1801 | |||
| 1802 | /**************************************************************************** | ||
| 1803 | * SAS Device Config Pages | ||
| 1804 | ****************************************************************************/ | ||
| 1805 | |||
| 1806 | /* SAS Device Page 0 */ | ||
| 1807 | |||
| 1808 | typedef struct _MPI2_CONFIG_PAGE_SAS_DEV_0 | ||
| 1809 | { | ||
| 1810 | MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ | ||
| 1811 | U16 Slot; /* 0x08 */ | ||
| 1812 | U16 EnclosureHandle; /* 0x0A */ | ||
| 1813 | U64 SASAddress; /* 0x0C */ | ||
| 1814 | U16 ParentDevHandle; /* 0x14 */ | ||
| 1815 | U8 PhyNum; /* 0x16 */ | ||
| 1816 | U8 AccessStatus; /* 0x17 */ | ||
| 1817 | U16 DevHandle; /* 0x18 */ | ||
| 1818 | U8 AttachedPhyIdentifier; /* 0x1A */ | ||
| 1819 | U8 ZoneGroup; /* 0x1B */ | ||
| 1820 | U32 DeviceInfo; /* 0x1C */ | ||
| 1821 | U16 Flags; /* 0x20 */ | ||
| 1822 | U8 PhysicalPort; /* 0x22 */ | ||
| 1823 | U8 MaxPortConnections; /* 0x23 */ | ||
| 1824 | U64 DeviceName; /* 0x24 */ | ||
| 1825 | U8 PortGroups; /* 0x2C */ | ||
| 1826 | U8 DmaGroup; /* 0x2D */ | ||
| 1827 | U8 ControlGroup; /* 0x2E */ | ||
| 1828 | U8 Reserved1; /* 0x2F */ | ||
| 1829 | U32 Reserved2; /* 0x30 */ | ||
| 1830 | U32 Reserved3; /* 0x34 */ | ||
| 1831 | } MPI2_CONFIG_PAGE_SAS_DEV_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_DEV_0, | ||
| 1832 | Mpi2SasDevicePage0_t, MPI2_POINTER pMpi2SasDevicePage0_t; | ||
| 1833 | |||
| 1834 | #define MPI2_SASDEVICE0_PAGEVERSION (0x08) | ||
| 1835 | |||
| 1836 | /* values for SAS Device Page 0 AccessStatus field */ | ||
| 1837 | #define MPI2_SAS_DEVICE0_ASTATUS_NO_ERRORS (0x00) | ||
| 1838 | #define MPI2_SAS_DEVICE0_ASTATUS_SATA_INIT_FAILED (0x01) | ||
| 1839 | #define MPI2_SAS_DEVICE0_ASTATUS_SATA_CAPABILITY_FAILED (0x02) | ||
| 1840 | #define MPI2_SAS_DEVICE0_ASTATUS_SATA_AFFILIATION_CONFLICT (0x03) | ||
| 1841 | #define MPI2_SAS_DEVICE0_ASTATUS_SATA_NEEDS_INITIALIZATION (0x04) | ||
| 1842 | #define MPI2_SAS_DEVICE0_ASTATUS_ROUTE_NOT_ADDRESSABLE (0x05) | ||
| 1843 | #define MPI2_SAS_DEVICE0_ASTATUS_SMP_ERROR_NOT_ADDRESSABLE (0x06) | ||
| 1844 | #define MPI2_SAS_DEVICE0_ASTATUS_DEVICE_BLOCKED (0x07) | ||
| 1845 | /* specific values for SATA Init failures */ | ||
| 1846 | #define MPI2_SAS_DEVICE0_ASTATUS_SIF_UNKNOWN (0x10) | ||
| 1847 | #define MPI2_SAS_DEVICE0_ASTATUS_SIF_AFFILIATION_CONFLICT (0x11) | ||
| 1848 | #define MPI2_SAS_DEVICE0_ASTATUS_SIF_DIAG (0x12) | ||
| 1849 | #define MPI2_SAS_DEVICE0_ASTATUS_SIF_IDENTIFICATION (0x13) | ||
| 1850 | #define MPI2_SAS_DEVICE0_ASTATUS_SIF_CHECK_POWER (0x14) | ||
| 1851 | #define MPI2_SAS_DEVICE0_ASTATUS_SIF_PIO_SN (0x15) | ||
| 1852 | #define MPI2_SAS_DEVICE0_ASTATUS_SIF_MDMA_SN (0x16) | ||
| 1853 | #define MPI2_SAS_DEVICE0_ASTATUS_SIF_UDMA_SN (0x17) | ||
| 1854 | #define MPI2_SAS_DEVICE0_ASTATUS_SIF_ZONING_VIOLATION (0x18) | ||
| 1855 | #define MPI2_SAS_DEVICE0_ASTATUS_SIF_NOT_ADDRESSABLE (0x19) | ||
| 1856 | #define MPI2_SAS_DEVICE0_ASTATUS_SIF_MAX (0x1F) | ||
| 1857 | |||
| 1858 | /* see mpi2_sas.h for values for SAS Device Page 0 DeviceInfo values */ | ||
| 1859 | |||
| 1860 | /* values for SAS Device Page 0 Flags field */ | ||
| 1861 | #define MPI2_SAS_DEVICE0_FLAGS_SATA_ASYNCHRONOUS_NOTIFY (0x0400) | ||
| 1862 | #define MPI2_SAS_DEVICE0_FLAGS_SATA_SW_PRESERVE (0x0200) | ||
| 1863 | #define MPI2_SAS_DEVICE0_FLAGS_UNSUPPORTED_DEVICE (0x0100) | ||
| 1864 | #define MPI2_SAS_DEVICE0_FLAGS_SATA_48BIT_LBA_SUPPORTED (0x0080) | ||
| 1865 | #define MPI2_SAS_DEVICE0_FLAGS_SATA_SMART_SUPPORTED (0x0040) | ||
| 1866 | #define MPI2_SAS_DEVICE0_FLAGS_SATA_NCQ_SUPPORTED (0x0020) | ||
| 1867 | #define MPI2_SAS_DEVICE0_FLAGS_SATA_FUA_SUPPORTED (0x0010) | ||
| 1868 | #define MPI2_SAS_DEVICE0_FLAGS_PORT_SELECTOR_ATTACH (0x0008) | ||
| 1869 | #define MPI2_SAS_DEVICE0_FLAGS_DEVICE_PRESENT (0x0001) | ||
| 1870 | |||
| 1871 | |||
| 1872 | /* SAS Device Page 1 */ | ||
| 1873 | |||
| 1874 | typedef struct _MPI2_CONFIG_PAGE_SAS_DEV_1 | ||
| 1875 | { | ||
| 1876 | MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ | ||
| 1877 | U32 Reserved1; /* 0x08 */ | ||
| 1878 | U64 SASAddress; /* 0x0C */ | ||
| 1879 | U32 Reserved2; /* 0x14 */ | ||
| 1880 | U16 DevHandle; /* 0x18 */ | ||
| 1881 | U16 Reserved3; /* 0x1A */ | ||
| 1882 | U8 InitialRegDeviceFIS[20];/* 0x1C */ | ||
| 1883 | } MPI2_CONFIG_PAGE_SAS_DEV_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_DEV_1, | ||
| 1884 | Mpi2SasDevicePage1_t, MPI2_POINTER pMpi2SasDevicePage1_t; | ||
| 1885 | |||
| 1886 | #define MPI2_SASDEVICE1_PAGEVERSION (0x01) | ||
| 1887 | |||
| 1888 | |||
| 1889 | /**************************************************************************** | ||
| 1890 | * SAS PHY Config Pages | ||
| 1891 | ****************************************************************************/ | ||
| 1892 | |||
| 1893 | /* SAS PHY Page 0 */ | ||
| 1894 | |||
| 1895 | typedef struct _MPI2_CONFIG_PAGE_SAS_PHY_0 | ||
| 1896 | { | ||
| 1897 | MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ | ||
| 1898 | U16 OwnerDevHandle; /* 0x08 */ | ||
| 1899 | U16 Reserved1; /* 0x0A */ | ||
| 1900 | U16 AttachedDevHandle; /* 0x0C */ | ||
| 1901 | U8 AttachedPhyIdentifier; /* 0x0E */ | ||
| 1902 | U8 Reserved2; /* 0x0F */ | ||
| 1903 | U32 AttachedPhyInfo; /* 0x10 */ | ||
| 1904 | U8 ProgrammedLinkRate; /* 0x14 */ | ||
| 1905 | U8 HwLinkRate; /* 0x15 */ | ||
| 1906 | U8 ChangeCount; /* 0x16 */ | ||
| 1907 | U8 Flags; /* 0x17 */ | ||
| 1908 | U32 PhyInfo; /* 0x18 */ | ||
| 1909 | U8 NegotiatedLinkRate; /* 0x1C */ | ||
| 1910 | U8 Reserved3; /* 0x1D */ | ||
| 1911 | U16 Reserved4; /* 0x1E */ | ||
| 1912 | } MPI2_CONFIG_PAGE_SAS_PHY_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_PHY_0, | ||
| 1913 | Mpi2SasPhyPage0_t, MPI2_POINTER pMpi2SasPhyPage0_t; | ||
| 1914 | |||
| 1915 | #define MPI2_SASPHY0_PAGEVERSION (0x03) | ||
| 1916 | |||
| 1917 | /* use MPI2_SAS_PRATE_ defines for the ProgrammedLinkRate field */ | ||
| 1918 | |||
| 1919 | /* use MPI2_SAS_HWRATE_ defines for the HwLinkRate field */ | ||
| 1920 | |||
| 1921 | /* values for SAS PHY Page 0 Flags field */ | ||
| 1922 | #define MPI2_SAS_PHY0_FLAGS_SGPIO_DIRECT_ATTACH_ENC (0x01) | ||
| 1923 | |||
| 1924 | /* use MPI2_SAS_APHYINFO_ defines for AttachedPhyInfo field */ | ||
| 1925 | |||
| 1926 | /* use MPI2_SAS_NEG_LINK_RATE_ defines for the NegotiatedLinkRate field */ | ||
| 1927 | |||
| 1928 | /* use MPI2_SAS_PHYINFO_ for the PhyInfo field */ | ||
| 1929 | |||
| 1930 | |||
| 1931 | /* SAS PHY Page 1 */ | ||
| 1932 | |||
| 1933 | typedef struct _MPI2_CONFIG_PAGE_SAS_PHY_1 | ||
| 1934 | { | ||
| 1935 | MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ | ||
| 1936 | U32 Reserved1; /* 0x08 */ | ||
| 1937 | U32 InvalidDwordCount; /* 0x0C */ | ||
| 1938 | U32 RunningDisparityErrorCount; /* 0x10 */ | ||
| 1939 | U32 LossDwordSynchCount; /* 0x14 */ | ||
| 1940 | U32 PhyResetProblemCount; /* 0x18 */ | ||
| 1941 | } MPI2_CONFIG_PAGE_SAS_PHY_1, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_PHY_1, | ||
| 1942 | Mpi2SasPhyPage1_t, MPI2_POINTER pMpi2SasPhyPage1_t; | ||
| 1943 | |||
| 1944 | #define MPI2_SASPHY1_PAGEVERSION (0x01) | ||
| 1945 | |||
| 1946 | |||
| 1947 | /**************************************************************************** | ||
| 1948 | * SAS Port Config Pages | ||
| 1949 | ****************************************************************************/ | ||
| 1950 | |||
| 1951 | /* SAS Port Page 0 */ | ||
| 1952 | |||
| 1953 | typedef struct _MPI2_CONFIG_PAGE_SAS_PORT_0 | ||
| 1954 | { | ||
| 1955 | MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ | ||
| 1956 | U8 PortNumber; /* 0x08 */ | ||
| 1957 | U8 PhysicalPort; /* 0x09 */ | ||
| 1958 | U8 PortWidth; /* 0x0A */ | ||
| 1959 | U8 PhysicalPortWidth; /* 0x0B */ | ||
| 1960 | U8 ZoneGroup; /* 0x0C */ | ||
| 1961 | U8 Reserved1; /* 0x0D */ | ||
| 1962 | U16 Reserved2; /* 0x0E */ | ||
| 1963 | U64 SASAddress; /* 0x10 */ | ||
| 1964 | U32 DeviceInfo; /* 0x18 */ | ||
| 1965 | U32 Reserved3; /* 0x1C */ | ||
| 1966 | U32 Reserved4; /* 0x20 */ | ||
| 1967 | } MPI2_CONFIG_PAGE_SAS_PORT_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_PORT_0, | ||
| 1968 | Mpi2SasPortPage0_t, MPI2_POINTER pMpi2SasPortPage0_t; | ||
| 1969 | |||
| 1970 | #define MPI2_SASPORT0_PAGEVERSION (0x00) | ||
| 1971 | |||
| 1972 | /* see mpi2_sas.h for values for SAS Port Page 0 DeviceInfo values */ | ||
| 1973 | |||
| 1974 | |||
| 1975 | /**************************************************************************** | ||
| 1976 | * SAS Enclosure Config Pages | ||
| 1977 | ****************************************************************************/ | ||
| 1978 | |||
| 1979 | /* SAS Enclosure Page 0 */ | ||
| 1980 | |||
| 1981 | typedef struct _MPI2_CONFIG_PAGE_SAS_ENCLOSURE_0 | ||
| 1982 | { | ||
| 1983 | MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ | ||
| 1984 | U32 Reserved1; /* 0x08 */ | ||
| 1985 | U64 EnclosureLogicalID; /* 0x0C */ | ||
| 1986 | U16 Flags; /* 0x14 */ | ||
| 1987 | U16 EnclosureHandle; /* 0x16 */ | ||
| 1988 | U16 NumSlots; /* 0x18 */ | ||
| 1989 | U16 StartSlot; /* 0x1A */ | ||
| 1990 | U16 Reserved2; /* 0x1C */ | ||
| 1991 | U16 SEPDevHandle; /* 0x1E */ | ||
| 1992 | U32 Reserved3; /* 0x20 */ | ||
| 1993 | U32 Reserved4; /* 0x24 */ | ||
| 1994 | } MPI2_CONFIG_PAGE_SAS_ENCLOSURE_0, | ||
| 1995 | MPI2_POINTER PTR_MPI2_CONFIG_PAGE_SAS_ENCLOSURE_0, | ||
| 1996 | Mpi2SasEnclosurePage0_t, MPI2_POINTER pMpi2SasEnclosurePage0_t; | ||
| 1997 | |||
| 1998 | #define MPI2_SASENCLOSURE0_PAGEVERSION (0x03) | ||
| 1999 | |||
| 2000 | /* values for SAS Enclosure Page 0 Flags field */ | ||
| 2001 | #define MPI2_SAS_ENCLS0_FLAGS_MNG_MASK (0x000F) | ||
| 2002 | #define MPI2_SAS_ENCLS0_FLAGS_MNG_UNKNOWN (0x0000) | ||
| 2003 | #define MPI2_SAS_ENCLS0_FLAGS_MNG_IOC_SES (0x0001) | ||
| 2004 | #define MPI2_SAS_ENCLS0_FLAGS_MNG_IOC_SGPIO (0x0002) | ||
| 2005 | #define MPI2_SAS_ENCLS0_FLAGS_MNG_EXP_SGPIO (0x0003) | ||
| 2006 | #define MPI2_SAS_ENCLS0_FLAGS_MNG_SES_ENCLOSURE (0x0004) | ||
| 2007 | #define MPI2_SAS_ENCLS0_FLAGS_MNG_IOC_GPIO (0x0005) | ||
| 2008 | |||
| 2009 | |||
| 2010 | /**************************************************************************** | ||
| 2011 | * Log Config Page | ||
| 2012 | ****************************************************************************/ | ||
| 2013 | |||
| 2014 | /* Log Page 0 */ | ||
| 2015 | |||
| 2016 | /* | ||
| 2017 | * Host code (drivers, BIOS, utilities, etc.) should leave this define set to | ||
| 2018 | * one and check Header.ExtPageLength or NumPhys at runtime. | ||
| 2019 | */ | ||
| 2020 | #ifndef MPI2_LOG_0_NUM_LOG_ENTRIES | ||
| 2021 | #define MPI2_LOG_0_NUM_LOG_ENTRIES (1) | ||
| 2022 | #endif | ||
| 2023 | |||
| 2024 | #define MPI2_LOG_0_LOG_DATA_LENGTH (0x1C) | ||
| 2025 | |||
| 2026 | typedef struct _MPI2_LOG_0_ENTRY | ||
| 2027 | { | ||
| 2028 | U64 TimeStamp; /* 0x00 */ | ||
| 2029 | U32 Reserved1; /* 0x08 */ | ||
| 2030 | U16 LogSequence; /* 0x0C */ | ||
| 2031 | U16 LogEntryQualifier; /* 0x0E */ | ||
| 2032 | U8 VP_ID; /* 0x10 */ | ||
| 2033 | U8 VF_ID; /* 0x11 */ | ||
| 2034 | U16 Reserved2; /* 0x12 */ | ||
| 2035 | U8 LogData[MPI2_LOG_0_LOG_DATA_LENGTH];/* 0x14 */ | ||
| 2036 | } MPI2_LOG_0_ENTRY, MPI2_POINTER PTR_MPI2_LOG_0_ENTRY, | ||
| 2037 | Mpi2Log0Entry_t, MPI2_POINTER pMpi2Log0Entry_t; | ||
| 2038 | |||
| 2039 | /* values for Log Page 0 LogEntry LogEntryQualifier field */ | ||
| 2040 | #define MPI2_LOG_0_ENTRY_QUAL_ENTRY_UNUSED (0x0000) | ||
| 2041 | #define MPI2_LOG_0_ENTRY_QUAL_POWER_ON_RESET (0x0001) | ||
| 2042 | #define MPI2_LOG_0_ENTRY_QUAL_TIMESTAMP_UPDATE (0x0002) | ||
| 2043 | #define MPI2_LOG_0_ENTRY_QUAL_MIN_IMPLEMENT_SPEC (0x8000) | ||
| 2044 | #define MPI2_LOG_0_ENTRY_QUAL_MAX_IMPLEMENT_SPEC (0xFFFF) | ||
| 2045 | |||
| 2046 | typedef struct _MPI2_CONFIG_PAGE_LOG_0 | ||
| 2047 | { | ||
| 2048 | MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ | ||
| 2049 | U32 Reserved1; /* 0x08 */ | ||
| 2050 | U32 Reserved2; /* 0x0C */ | ||
| 2051 | U16 NumLogEntries; /* 0x10 */ | ||
| 2052 | U16 Reserved3; /* 0x12 */ | ||
| 2053 | MPI2_LOG_0_ENTRY LogEntry[MPI2_LOG_0_NUM_LOG_ENTRIES]; /* 0x14 */ | ||
| 2054 | } MPI2_CONFIG_PAGE_LOG_0, MPI2_POINTER PTR_MPI2_CONFIG_PAGE_LOG_0, | ||
| 2055 | Mpi2LogPage0_t, MPI2_POINTER pMpi2LogPage0_t; | ||
| 2056 | |||
| 2057 | #define MPI2_LOG_0_PAGEVERSION (0x02) | ||
| 2058 | |||
| 2059 | |||
| 2060 | /**************************************************************************** | ||
| 2061 | * RAID Config Page | ||
| 2062 | ****************************************************************************/ | ||
| 2063 | |||
| 2064 | /* RAID Page 0 */ | ||
| 2065 | |||
| 2066 | /* | ||
| 2067 | * Host code (drivers, BIOS, utilities, etc.) should leave this define set to | ||
| 2068 | * one and check Header.ExtPageLength or NumPhys at runtime. | ||
| 2069 | */ | ||
| 2070 | #ifndef MPI2_RAIDCONFIG0_MAX_ELEMENTS | ||
| 2071 | #define MPI2_RAIDCONFIG0_MAX_ELEMENTS (1) | ||
| 2072 | #endif | ||
| 2073 | |||
| 2074 | typedef struct _MPI2_RAIDCONFIG0_CONFIG_ELEMENT | ||
| 2075 | { | ||
| 2076 | U16 ElementFlags; /* 0x00 */ | ||
| 2077 | U16 VolDevHandle; /* 0x02 */ | ||
| 2078 | U8 HotSparePool; /* 0x04 */ | ||
| 2079 | U8 PhysDiskNum; /* 0x05 */ | ||
| 2080 | U16 PhysDiskDevHandle; /* 0x06 */ | ||
| 2081 | } MPI2_RAIDCONFIG0_CONFIG_ELEMENT, | ||
| 2082 | MPI2_POINTER PTR_MPI2_RAIDCONFIG0_CONFIG_ELEMENT, | ||
| 2083 | Mpi2RaidConfig0ConfigElement_t, MPI2_POINTER pMpi2RaidConfig0ConfigElement_t; | ||
| 2084 | |||
| 2085 | /* values for the ElementFlags field */ | ||
| 2086 | #define MPI2_RAIDCONFIG0_EFLAGS_MASK_ELEMENT_TYPE (0x000F) | ||
| 2087 | #define MPI2_RAIDCONFIG0_EFLAGS_VOLUME_ELEMENT (0x0000) | ||
| 2088 | #define MPI2_RAIDCONFIG0_EFLAGS_VOL_PHYS_DISK_ELEMENT (0x0001) | ||
| 2089 | #define MPI2_RAIDCONFIG0_EFLAGS_HOT_SPARE_ELEMENT (0x0002) | ||
| 2090 | #define MPI2_RAIDCONFIG0_EFLAGS_OCE_ELEMENT (0x0003) | ||
| 2091 | |||
| 2092 | |||
| 2093 | typedef struct _MPI2_CONFIG_PAGE_RAID_CONFIGURATION_0 | ||
| 2094 | { | ||
| 2095 | MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ | ||
| 2096 | U8 NumHotSpares; /* 0x08 */ | ||
| 2097 | U8 NumPhysDisks; /* 0x09 */ | ||
| 2098 | U8 NumVolumes; /* 0x0A */ | ||
| 2099 | U8 ConfigNum; /* 0x0B */ | ||
| 2100 | U32 Flags; /* 0x0C */ | ||
| 2101 | U8 ConfigGUID[24]; /* 0x10 */ | ||
| 2102 | U32 Reserved1; /* 0x28 */ | ||
| 2103 | U8 NumElements; /* 0x2C */ | ||
| 2104 | U8 Reserved2; /* 0x2D */ | ||
| 2105 | U16 Reserved3; /* 0x2E */ | ||
| 2106 | MPI2_RAIDCONFIG0_CONFIG_ELEMENT ConfigElement[MPI2_RAIDCONFIG0_MAX_ELEMENTS]; /* 0x30 */ | ||
| 2107 | } MPI2_CONFIG_PAGE_RAID_CONFIGURATION_0, | ||
| 2108 | MPI2_POINTER PTR_MPI2_CONFIG_PAGE_RAID_CONFIGURATION_0, | ||
| 2109 | Mpi2RaidConfigurationPage0_t, MPI2_POINTER pMpi2RaidConfigurationPage0_t; | ||
| 2110 | |||
| 2111 | #define MPI2_RAIDCONFIG0_PAGEVERSION (0x00) | ||
| 2112 | |||
| 2113 | /* values for RAID Configuration Page 0 Flags field */ | ||
| 2114 | #define MPI2_RAIDCONFIG0_FLAG_FOREIGN_CONFIG (0x00000001) | ||
| 2115 | |||
| 2116 | |||
| 2117 | /**************************************************************************** | ||
| 2118 | * Driver Persistent Mapping Config Pages | ||
| 2119 | ****************************************************************************/ | ||
| 2120 | |||
| 2121 | /* Driver Persistent Mapping Page 0 */ | ||
| 2122 | |||
| 2123 | typedef struct _MPI2_CONFIG_PAGE_DRIVER_MAP0_ENTRY | ||
| 2124 | { | ||
| 2125 | U64 PhysicalIdentifier; /* 0x00 */ | ||
| 2126 | U16 MappingInformation; /* 0x08 */ | ||
| 2127 | U16 DeviceIndex; /* 0x0A */ | ||
| 2128 | U32 PhysicalBitsMapping; /* 0x0C */ | ||
| 2129 | U32 Reserved1; /* 0x10 */ | ||
| 2130 | } MPI2_CONFIG_PAGE_DRIVER_MAP0_ENTRY, | ||
| 2131 | MPI2_POINTER PTR_MPI2_CONFIG_PAGE_DRIVER_MAP0_ENTRY, | ||
| 2132 | Mpi2DriverMap0Entry_t, MPI2_POINTER pMpi2DriverMap0Entry_t; | ||
| 2133 | |||
| 2134 | typedef struct _MPI2_CONFIG_PAGE_DRIVER_MAPPING_0 | ||
| 2135 | { | ||
| 2136 | MPI2_CONFIG_EXTENDED_PAGE_HEADER Header; /* 0x00 */ | ||
| 2137 | MPI2_CONFIG_PAGE_DRIVER_MAP0_ENTRY Entry; /* 0x08 */ | ||
| 2138 | } MPI2_CONFIG_PAGE_DRIVER_MAPPING_0, | ||
| 2139 | MPI2_POINTER PTR_MPI2_CONFIG_PAGE_DRIVER_MAPPING_0, | ||
| 2140 | Mpi2DriverMappingPage0_t, MPI2_POINTER pMpi2DriverMappingPage0_t; | ||
| 2141 | |||
| 2142 | #define MPI2_DRIVERMAPPING0_PAGEVERSION (0x00) | ||
| 2143 | |||
| 2144 | /* values for Driver Persistent Mapping Page 0 MappingInformation field */ | ||
| 2145 | #define MPI2_DRVMAP0_MAPINFO_SLOT_MASK (0x07F0) | ||
| 2146 | #define MPI2_DRVMAP0_MAPINFO_SLOT_SHIFT (4) | ||
| 2147 | #define MPI2_DRVMAP0_MAPINFO_MISSING_MASK (0x000F) | ||
| 2148 | |||
| 2149 | |||
| 2150 | #endif | ||
| 2151 | |||
diff --git a/drivers/scsi/mpt2sas/mpi/mpi2_init.h b/drivers/scsi/mpt2sas/mpi/mpi2_init.h new file mode 100644 index 000000000000..f1115f0f0eb2 --- /dev/null +++ b/drivers/scsi/mpt2sas/mpi/mpi2_init.h | |||
| @@ -0,0 +1,420 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (c) 2000-2008 LSI Corporation. | ||
| 3 | * | ||
| 4 | * | ||
| 5 | * Name: mpi2_init.h | ||
| 6 | * Title: MPI SCSI initiator mode messages and structures | ||
| 7 | * Creation Date: June 23, 2006 | ||
| 8 | * | ||
| 9 | * mpi2_init.h Version: 02.00.06 | ||
| 10 | * | ||
| 11 | * Version History | ||
| 12 | * --------------- | ||
| 13 | * | ||
| 14 | * Date Version Description | ||
| 15 | * -------- -------- ------------------------------------------------------ | ||
| 16 | * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. | ||
| 17 | * 10-31-07 02.00.01 Fixed name for pMpi2SCSITaskManagementRequest_t. | ||
| 18 | * 12-18-07 02.00.02 Modified Task Management Target Reset Method defines. | ||
| 19 | * 02-29-08 02.00.03 Added Query Task Set and Query Unit Attention. | ||
| 20 | * 03-03-08 02.00.04 Fixed name of struct _MPI2_SCSI_TASK_MANAGE_REPLY. | ||
| 21 | * 05-21-08 02.00.05 Fixed typo in name of Mpi2SepRequest_t. | ||
| 22 | * 10-02-08 02.00.06 Removed Untagged and No Disconnect values from SCSI IO | ||
| 23 | * Control field Task Attribute flags. | ||
| 24 | * Moved LUN field defines to mpi2.h becasue they are | ||
| 25 | * common to many structures. | ||
| 26 | * -------------------------------------------------------------------------- | ||
| 27 | */ | ||
| 28 | |||
| 29 | #ifndef MPI2_INIT_H | ||
| 30 | #define MPI2_INIT_H | ||
| 31 | |||
| 32 | /***************************************************************************** | ||
| 33 | * | ||
| 34 | * SCSI Initiator Messages | ||
| 35 | * | ||
| 36 | *****************************************************************************/ | ||
| 37 | |||
| 38 | /**************************************************************************** | ||
| 39 | * SCSI IO messages and associated structures | ||
| 40 | ****************************************************************************/ | ||
| 41 | |||
| 42 | typedef struct | ||
| 43 | { | ||
| 44 | U8 CDB[20]; /* 0x00 */ | ||
| 45 | U32 PrimaryReferenceTag; /* 0x14 */ | ||
| 46 | U16 PrimaryApplicationTag; /* 0x18 */ | ||
| 47 | U16 PrimaryApplicationTagMask; /* 0x1A */ | ||
| 48 | U32 TransferLength; /* 0x1C */ | ||
| 49 | } MPI2_SCSI_IO_CDB_EEDP32, MPI2_POINTER PTR_MPI2_SCSI_IO_CDB_EEDP32, | ||
| 50 | Mpi2ScsiIoCdbEedp32_t, MPI2_POINTER pMpi2ScsiIoCdbEedp32_t; | ||
| 51 | |||
| 52 | /* TBD: I don't think this is needed for MPI2/Gen2 */ | ||
| 53 | #if 0 | ||
| 54 | typedef struct | ||
| 55 | { | ||
| 56 | U8 CDB[16]; /* 0x00 */ | ||
| 57 | U32 DataLength; /* 0x10 */ | ||
| 58 | U32 PrimaryReferenceTag; /* 0x14 */ | ||
| 59 | U16 PrimaryApplicationTag; /* 0x18 */ | ||
| 60 | U16 PrimaryApplicationTagMask; /* 0x1A */ | ||
| 61 | U32 TransferLength; /* 0x1C */ | ||
| 62 | } MPI2_SCSI_IO32_CDB_EEDP16, MPI2_POINTER PTR_MPI2_SCSI_IO32_CDB_EEDP16, | ||
| 63 | Mpi2ScsiIo32CdbEedp16_t, MPI2_POINTER pMpi2ScsiIo32CdbEedp16_t; | ||
| 64 | #endif | ||
| 65 | |||
| 66 | typedef union | ||
| 67 | { | ||
| 68 | U8 CDB32[32]; | ||
| 69 | MPI2_SCSI_IO_CDB_EEDP32 EEDP32; | ||
| 70 | MPI2_SGE_SIMPLE_UNION SGE; | ||
| 71 | } MPI2_SCSI_IO_CDB_UNION, MPI2_POINTER PTR_MPI2_SCSI_IO_CDB_UNION, | ||
| 72 | Mpi2ScsiIoCdb_t, MPI2_POINTER pMpi2ScsiIoCdb_t; | ||
| 73 | |||
| 74 | /* SCSI IO Request Message */ | ||
| 75 | typedef struct _MPI2_SCSI_IO_REQUEST | ||
| 76 | { | ||
| 77 | U16 DevHandle; /* 0x00 */ | ||
| 78 | U8 ChainOffset; /* 0x02 */ | ||
| 79 | U8 Function; /* 0x03 */ | ||
| 80 | U16 Reserved1; /* 0x04 */ | ||
| 81 | U8 Reserved2; /* 0x06 */ | ||
| 82 | U8 MsgFlags; /* 0x07 */ | ||
| 83 | U8 VP_ID; /* 0x08 */ | ||
| 84 | U8 VF_ID; /* 0x09 */ | ||
| 85 | U16 Reserved3; /* 0x0A */ | ||
| 86 | U32 SenseBufferLowAddress; /* 0x0C */ | ||
| 87 | U16 SGLFlags; /* 0x10 */ | ||
| 88 | U8 SenseBufferLength; /* 0x12 */ | ||
| 89 | U8 Reserved4; /* 0x13 */ | ||
| 90 | U8 SGLOffset0; /* 0x14 */ | ||
| 91 | U8 SGLOffset1; /* 0x15 */ | ||
| 92 | U8 SGLOffset2; /* 0x16 */ | ||
| 93 | U8 SGLOffset3; /* 0x17 */ | ||
| 94 | U32 SkipCount; /* 0x18 */ | ||
| 95 | U32 DataLength; /* 0x1C */ | ||
| 96 | U32 BidirectionalDataLength; /* 0x20 */ | ||
| 97 | U16 IoFlags; /* 0x24 */ | ||
| 98 | U16 EEDPFlags; /* 0x26 */ | ||
| 99 | U32 EEDPBlockSize; /* 0x28 */ | ||
| 100 | U32 SecondaryReferenceTag; /* 0x2C */ | ||
| 101 | U16 SecondaryApplicationTag; /* 0x30 */ | ||
| 102 | U16 ApplicationTagTranslationMask; /* 0x32 */ | ||
| 103 | U8 LUN[8]; /* 0x34 */ | ||
| 104 | U32 Control; /* 0x3C */ | ||
| 105 | MPI2_SCSI_IO_CDB_UNION CDB; /* 0x40 */ | ||
| 106 | MPI2_SGE_IO_UNION SGL; /* 0x60 */ | ||
| 107 | } MPI2_SCSI_IO_REQUEST, MPI2_POINTER PTR_MPI2_SCSI_IO_REQUEST, | ||
| 108 | Mpi2SCSIIORequest_t, MPI2_POINTER pMpi2SCSIIORequest_t; | ||
| 109 | |||
| 110 | /* SCSI IO MsgFlags bits */ | ||
| 111 | |||
| 112 | /* MsgFlags for SenseBufferAddressSpace */ | ||
| 113 | #define MPI2_SCSIIO_MSGFLAGS_MASK_SENSE_ADDR (0x0C) | ||
| 114 | #define MPI2_SCSIIO_MSGFLAGS_SYSTEM_SENSE_ADDR (0x00) | ||
| 115 | #define MPI2_SCSIIO_MSGFLAGS_IOCDDR_SENSE_ADDR (0x04) | ||
| 116 | #define MPI2_SCSIIO_MSGFLAGS_IOCPLB_SENSE_ADDR (0x08) | ||
| 117 | #define MPI2_SCSIIO_MSGFLAGS_IOCPLBNTA_SENSE_ADDR (0x0C) | ||
| 118 | |||
| 119 | /* SCSI IO SGLFlags bits */ | ||
| 120 | |||
| 121 | /* base values for Data Location Address Space */ | ||
| 122 | #define MPI2_SCSIIO_SGLFLAGS_ADDR_MASK (0x0C) | ||
| 123 | #define MPI2_SCSIIO_SGLFLAGS_SYSTEM_ADDR (0x00) | ||
| 124 | #define MPI2_SCSIIO_SGLFLAGS_IOCDDR_ADDR (0x04) | ||
| 125 | #define MPI2_SCSIIO_SGLFLAGS_IOCPLB_ADDR (0x08) | ||
| 126 | #define MPI2_SCSIIO_SGLFLAGS_IOCPLBNTA_ADDR (0x0C) | ||
| 127 | |||
| 128 | /* base values for Type */ | ||
| 129 | #define MPI2_SCSIIO_SGLFLAGS_TYPE_MASK (0x03) | ||
| 130 | #define MPI2_SCSIIO_SGLFLAGS_TYPE_MPI (0x00) | ||
| 131 | #define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE32 (0x01) | ||
| 132 | #define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE64 (0x02) | ||
| 133 | |||
| 134 | /* shift values for each sub-field */ | ||
| 135 | #define MPI2_SCSIIO_SGLFLAGS_SGL3_SHIFT (12) | ||
| 136 | #define MPI2_SCSIIO_SGLFLAGS_SGL2_SHIFT (8) | ||
| 137 | #define MPI2_SCSIIO_SGLFLAGS_SGL1_SHIFT (4) | ||
| 138 | #define MPI2_SCSIIO_SGLFLAGS_SGL0_SHIFT (0) | ||
| 139 | |||
| 140 | /* SCSI IO IoFlags bits */ | ||
| 141 | |||
| 142 | /* Large CDB Address Space */ | ||
| 143 | #define MPI2_SCSIIO_CDB_ADDR_MASK (0x6000) | ||
| 144 | #define MPI2_SCSIIO_CDB_ADDR_SYSTEM (0x0000) | ||
| 145 | #define MPI2_SCSIIO_CDB_ADDR_IOCDDR (0x2000) | ||
| 146 | #define MPI2_SCSIIO_CDB_ADDR_IOCPLB (0x4000) | ||
| 147 | #define MPI2_SCSIIO_CDB_ADDR_IOCPLBNTA (0x6000) | ||
| 148 | |||
| 149 | #define MPI2_SCSIIO_IOFLAGS_LARGE_CDB (0x1000) | ||
| 150 | #define MPI2_SCSIIO_IOFLAGS_BIDIRECTIONAL (0x0800) | ||
| 151 | #define MPI2_SCSIIO_IOFLAGS_MULTICAST (0x0400) | ||
| 152 | #define MPI2_SCSIIO_IOFLAGS_CMD_DETERMINES_DATA_DIR (0x0200) | ||
| 153 | #define MPI2_SCSIIO_IOFLAGS_CDBLENGTH_MASK (0x01FF) | ||
| 154 | |||
| 155 | /* SCSI IO EEDPFlags bits */ | ||
| 156 | |||
| 157 | #define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_REFTAG (0x8000) | ||
| 158 | #define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_REFTAG (0x4000) | ||
| 159 | #define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_APPTAG (0x2000) | ||
| 160 | #define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_APPTAG (0x1000) | ||
| 161 | |||
| 162 | #define MPI2_SCSIIO_EEDPFLAGS_CHECK_REFTAG (0x0400) | ||
| 163 | #define MPI2_SCSIIO_EEDPFLAGS_CHECK_APPTAG (0x0200) | ||
| 164 | #define MPI2_SCSIIO_EEDPFLAGS_CHECK_GUARD (0x0100) | ||
| 165 | |||
| 166 | #define MPI2_SCSIIO_EEDPFLAGS_PASSTHRU_REFTAG (0x0008) | ||
| 167 | |||
| 168 | #define MPI2_SCSIIO_EEDPFLAGS_MASK_OP (0x0007) | ||
| 169 | #define MPI2_SCSIIO_EEDPFLAGS_NOOP_OP (0x0000) | ||
| 170 | #define MPI2_SCSIIO_EEDPFLAGS_CHECK_OP (0x0001) | ||
| 171 | #define MPI2_SCSIIO_EEDPFLAGS_STRIP_OP (0x0002) | ||
| 172 | #define MPI2_SCSIIO_EEDPFLAGS_CHECK_REMOVE_OP (0x0003) | ||
| 173 | #define MPI2_SCSIIO_EEDPFLAGS_INSERT_OP (0x0004) | ||
| 174 | #define MPI2_SCSIIO_EEDPFLAGS_REPLACE_OP (0x0006) | ||
| 175 | #define MPI2_SCSIIO_EEDPFLAGS_CHECK_REGEN_OP (0x0007) | ||
| 176 | |||
| 177 | /* SCSI IO LUN fields: use MPI2_LUN_ from mpi2.h */ | ||
| 178 | |||
| 179 | /* SCSI IO Control bits */ | ||
| 180 | #define MPI2_SCSIIO_CONTROL_ADDCDBLEN_MASK (0xFC000000) | ||
| 181 | #define MPI2_SCSIIO_CONTROL_ADDCDBLEN_SHIFT (26) | ||
| 182 | |||
| 183 | #define MPI2_SCSIIO_CONTROL_DATADIRECTION_MASK (0x03000000) | ||
| 184 | #define MPI2_SCSIIO_CONTROL_NODATATRANSFER (0x00000000) | ||
| 185 | #define MPI2_SCSIIO_CONTROL_WRITE (0x01000000) | ||
| 186 | #define MPI2_SCSIIO_CONTROL_READ (0x02000000) | ||
| 187 | #define MPI2_SCSIIO_CONTROL_BIDIRECTIONAL (0x03000000) | ||
| 188 | |||
| 189 | #define MPI2_SCSIIO_CONTROL_TASKPRI_MASK (0x00007800) | ||
| 190 | #define MPI2_SCSIIO_CONTROL_TASKPRI_SHIFT (11) | ||
| 191 | |||
| 192 | #define MPI2_SCSIIO_CONTROL_TASKATTRIBUTE_MASK (0x00000700) | ||
| 193 | #define MPI2_SCSIIO_CONTROL_SIMPLEQ (0x00000000) | ||
| 194 | #define MPI2_SCSIIO_CONTROL_HEADOFQ (0x00000100) | ||
| 195 | #define MPI2_SCSIIO_CONTROL_ORDEREDQ (0x00000200) | ||
| 196 | #define MPI2_SCSIIO_CONTROL_ACAQ (0x00000400) | ||
| 197 | |||
| 198 | #define MPI2_SCSIIO_CONTROL_TLR_MASK (0x000000C0) | ||
| 199 | #define MPI2_SCSIIO_CONTROL_NO_TLR (0x00000000) | ||
| 200 | #define MPI2_SCSIIO_CONTROL_TLR_ON (0x00000040) | ||
| 201 | #define MPI2_SCSIIO_CONTROL_TLR_OFF (0x00000080) | ||
| 202 | |||
| 203 | |||
| 204 | /* SCSI IO Error Reply Message */ | ||
| 205 | typedef struct _MPI2_SCSI_IO_REPLY | ||
| 206 | { | ||
| 207 | U16 DevHandle; /* 0x00 */ | ||
| 208 | U8 MsgLength; /* 0x02 */ | ||
| 209 | U8 Function; /* 0x03 */ | ||
| 210 | U16 Reserved1; /* 0x04 */ | ||
| 211 | U8 Reserved2; /* 0x06 */ | ||
| 212 | U8 MsgFlags; /* 0x07 */ | ||
| 213 | U8 VP_ID; /* 0x08 */ | ||
| 214 | U8 VF_ID; /* 0x09 */ | ||
| 215 | U16 Reserved3; /* 0x0A */ | ||
| 216 | U8 SCSIStatus; /* 0x0C */ | ||
| 217 | U8 SCSIState; /* 0x0D */ | ||
| 218 | U16 IOCStatus; /* 0x0E */ | ||
| 219 | U32 IOCLogInfo; /* 0x10 */ | ||
| 220 | U32 TransferCount; /* 0x14 */ | ||
| 221 | U32 SenseCount; /* 0x18 */ | ||
| 222 | U32 ResponseInfo; /* 0x1C */ | ||
| 223 | U16 TaskTag; /* 0x20 */ | ||
| 224 | U16 Reserved4; /* 0x22 */ | ||
| 225 | U32 BidirectionalTransferCount; /* 0x24 */ | ||
| 226 | U32 Reserved5; /* 0x28 */ | ||
| 227 | U32 Reserved6; /* 0x2C */ | ||
| 228 | } MPI2_SCSI_IO_REPLY, MPI2_POINTER PTR_MPI2_SCSI_IO_REPLY, | ||
| 229 | Mpi2SCSIIOReply_t, MPI2_POINTER pMpi2SCSIIOReply_t; | ||
| 230 | |||
| 231 | /* SCSI IO Reply SCSIStatus values (SAM-4 status codes) */ | ||
| 232 | |||
| 233 | #define MPI2_SCSI_STATUS_GOOD (0x00) | ||
| 234 | #define MPI2_SCSI_STATUS_CHECK_CONDITION (0x02) | ||
| 235 | #define MPI2_SCSI_STATUS_CONDITION_MET (0x04) | ||
| 236 | #define MPI2_SCSI_STATUS_BUSY (0x08) | ||
| 237 | #define MPI2_SCSI_STATUS_INTERMEDIATE (0x10) | ||
| 238 | #define MPI2_SCSI_STATUS_INTERMEDIATE_CONDMET (0x14) | ||
| 239 | #define MPI2_SCSI_STATUS_RESERVATION_CONFLICT (0x18) | ||
| 240 | #define MPI2_SCSI_STATUS_COMMAND_TERMINATED (0x22) /* obsolete */ | ||
| 241 | #define MPI2_SCSI_STATUS_TASK_SET_FULL (0x28) | ||
| 242 | #define MPI2_SCSI_STATUS_ACA_ACTIVE (0x30) | ||
| 243 | #define MPI2_SCSI_STATUS_TASK_ABORTED (0x40) | ||
| 244 | |||
| 245 | /* SCSI IO Reply SCSIState flags */ | ||
| 246 | |||
| 247 | #define MPI2_SCSI_STATE_RESPONSE_INFO_VALID (0x10) | ||
| 248 | #define MPI2_SCSI_STATE_TERMINATED (0x08) | ||
| 249 | #define MPI2_SCSI_STATE_NO_SCSI_STATUS (0x04) | ||
| 250 | #define MPI2_SCSI_STATE_AUTOSENSE_FAILED (0x02) | ||
| 251 | #define MPI2_SCSI_STATE_AUTOSENSE_VALID (0x01) | ||
| 252 | |||
| 253 | #define MPI2_SCSI_TASKTAG_UNKNOWN (0xFFFF) | ||
| 254 | |||
| 255 | |||
| 256 | /**************************************************************************** | ||
| 257 | * SCSI Task Management messages | ||
| 258 | ****************************************************************************/ | ||
| 259 | |||
| 260 | /* SCSI Task Management Request Message */ | ||
| 261 | typedef struct _MPI2_SCSI_TASK_MANAGE_REQUEST | ||
| 262 | { | ||
| 263 | U16 DevHandle; /* 0x00 */ | ||
| 264 | U8 ChainOffset; /* 0x02 */ | ||
| 265 | U8 Function; /* 0x03 */ | ||
| 266 | U8 Reserved1; /* 0x04 */ | ||
| 267 | U8 TaskType; /* 0x05 */ | ||
| 268 | U8 Reserved2; /* 0x06 */ | ||
| 269 | U8 MsgFlags; /* 0x07 */ | ||
| 270 | U8 VP_ID; /* 0x08 */ | ||
| 271 | U8 VF_ID; /* 0x09 */ | ||
| 272 | U16 Reserved3; /* 0x0A */ | ||
| 273 | U8 LUN[8]; /* 0x0C */ | ||
| 274 | U32 Reserved4[7]; /* 0x14 */ | ||
| 275 | U16 TaskMID; /* 0x30 */ | ||
| 276 | U16 Reserved5; /* 0x32 */ | ||
| 277 | } MPI2_SCSI_TASK_MANAGE_REQUEST, | ||
| 278 | MPI2_POINTER PTR_MPI2_SCSI_TASK_MANAGE_REQUEST, | ||
| 279 | Mpi2SCSITaskManagementRequest_t, | ||
| 280 | MPI2_POINTER pMpi2SCSITaskManagementRequest_t; | ||
| 281 | |||
| 282 | /* TaskType values */ | ||
| 283 | |||
| 284 | #define MPI2_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01) | ||
| 285 | #define MPI2_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET (0x02) | ||
| 286 | #define MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03) | ||
| 287 | #define MPI2_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05) | ||
| 288 | #define MPI2_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET (0x06) | ||
| 289 | #define MPI2_SCSITASKMGMT_TASKTYPE_QUERY_TASK (0x07) | ||
| 290 | #define MPI2_SCSITASKMGMT_TASKTYPE_CLR_ACA (0x08) | ||
| 291 | #define MPI2_SCSITASKMGMT_TASKTYPE_QRY_TASK_SET (0x09) | ||
| 292 | #define MPI2_SCSITASKMGMT_TASKTYPE_QRY_UNIT_ATTENTION (0x0A) | ||
| 293 | |||
| 294 | /* MsgFlags bits */ | ||
| 295 | |||
| 296 | #define MPI2_SCSITASKMGMT_MSGFLAGS_MASK_TARGET_RESET (0x18) | ||
| 297 | #define MPI2_SCSITASKMGMT_MSGFLAGS_LINK_RESET (0x00) | ||
| 298 | #define MPI2_SCSITASKMGMT_MSGFLAGS_NEXUS_RESET_SRST (0x08) | ||
| 299 | #define MPI2_SCSITASKMGMT_MSGFLAGS_SAS_HARD_LINK_RESET (0x10) | ||
| 300 | |||
| 301 | #define MPI2_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU (0x01) | ||
| 302 | |||
| 303 | |||
| 304 | |||
| 305 | /* SCSI Task Management Reply Message */ | ||
| 306 | typedef struct _MPI2_SCSI_TASK_MANAGE_REPLY | ||
| 307 | { | ||
| 308 | U16 DevHandle; /* 0x00 */ | ||
| 309 | U8 MsgLength; /* 0x02 */ | ||
| 310 | U8 Function; /* 0x03 */ | ||
| 311 | U8 ResponseCode; /* 0x04 */ | ||
| 312 | U8 TaskType; /* 0x05 */ | ||
| 313 | U8 Reserved1; /* 0x06 */ | ||
| 314 | U8 MsgFlags; /* 0x07 */ | ||
| 315 | U8 VP_ID; /* 0x08 */ | ||
| 316 | U8 VF_ID; /* 0x09 */ | ||
| 317 | U16 Reserved2; /* 0x0A */ | ||
| 318 | U16 Reserved3; /* 0x0C */ | ||
| 319 | U16 IOCStatus; /* 0x0E */ | ||
| 320 | U32 IOCLogInfo; /* 0x10 */ | ||
| 321 | U32 TerminationCount; /* 0x14 */ | ||
| 322 | } MPI2_SCSI_TASK_MANAGE_REPLY, | ||
| 323 | MPI2_POINTER PTR_MPI2_SCSI_TASK_MANAGE_REPLY, | ||
| 324 | Mpi2SCSITaskManagementReply_t, MPI2_POINTER pMpi2SCSIManagementReply_t; | ||
| 325 | |||
| 326 | /* ResponseCode values */ | ||
| 327 | |||
| 328 | #define MPI2_SCSITASKMGMT_RSP_TM_COMPLETE (0x00) | ||
| 329 | #define MPI2_SCSITASKMGMT_RSP_INVALID_FRAME (0x02) | ||
| 330 | #define MPI2_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED (0x04) | ||
| 331 | #define MPI2_SCSITASKMGMT_RSP_TM_FAILED (0x05) | ||
| 332 | #define MPI2_SCSITASKMGMT_RSP_TM_SUCCEEDED (0x08) | ||
| 333 | #define MPI2_SCSITASKMGMT_RSP_TM_INVALID_LUN (0x09) | ||
| 334 | #define MPI2_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC (0x80) | ||
| 335 | |||
| 336 | |||
| 337 | /**************************************************************************** | ||
| 338 | * SCSI Enclosure Processor messages | ||
| 339 | ****************************************************************************/ | ||
| 340 | |||
| 341 | /* SCSI Enclosure Processor Request Message */ | ||
| 342 | typedef struct _MPI2_SEP_REQUEST | ||
| 343 | { | ||
| 344 | U16 DevHandle; /* 0x00 */ | ||
| 345 | U8 ChainOffset; /* 0x02 */ | ||
| 346 | U8 Function; /* 0x03 */ | ||
| 347 | U8 Action; /* 0x04 */ | ||
| 348 | U8 Flags; /* 0x05 */ | ||
| 349 | U8 Reserved1; /* 0x06 */ | ||
| 350 | U8 MsgFlags; /* 0x07 */ | ||
| 351 | U8 VP_ID; /* 0x08 */ | ||
| 352 | U8 VF_ID; /* 0x09 */ | ||
| 353 | U16 Reserved2; /* 0x0A */ | ||
| 354 | U32 SlotStatus; /* 0x0C */ | ||
| 355 | U32 Reserved3; /* 0x10 */ | ||
| 356 | U32 Reserved4; /* 0x14 */ | ||
| 357 | U32 Reserved5; /* 0x18 */ | ||
| 358 | U16 Slot; /* 0x1C */ | ||
| 359 | U16 EnclosureHandle; /* 0x1E */ | ||
| 360 | } MPI2_SEP_REQUEST, MPI2_POINTER PTR_MPI2_SEP_REQUEST, | ||
| 361 | Mpi2SepRequest_t, MPI2_POINTER pMpi2SepRequest_t; | ||
| 362 | |||
| 363 | /* Action defines */ | ||
| 364 | #define MPI2_SEP_REQ_ACTION_WRITE_STATUS (0x00) | ||
| 365 | #define MPI2_SEP_REQ_ACTION_READ_STATUS (0x01) | ||
| 366 | |||
| 367 | /* Flags defines */ | ||
| 368 | #define MPI2_SEP_REQ_FLAGS_DEVHANDLE_ADDRESS (0x00) | ||
| 369 | #define MPI2_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS (0x01) | ||
| 370 | |||
| 371 | /* SlotStatus defines */ | ||
| 372 | #define MPI2_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000) | ||
| 373 | #define MPI2_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000) | ||
| 374 | #define MPI2_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200) | ||
| 375 | #define MPI2_SEP_REQ_SLOTSTATUS_HOT_SPARE (0x00000100) | ||
| 376 | #define MPI2_SEP_REQ_SLOTSTATUS_UNCONFIGURED (0x00000080) | ||
| 377 | #define MPI2_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT (0x00000040) | ||
| 378 | #define MPI2_SEP_REQ_SLOTSTATUS_DEV_REBUILDING (0x00000004) | ||
| 379 | #define MPI2_SEP_REQ_SLOTSTATUS_DEV_FAULTY (0x00000002) | ||
| 380 | #define MPI2_SEP_REQ_SLOTSTATUS_NO_ERROR (0x00000001) | ||
| 381 | |||
| 382 | |||
| 383 | /* SCSI Enclosure Processor Reply Message */ | ||
| 384 | typedef struct _MPI2_SEP_REPLY | ||
| 385 | { | ||
| 386 | U16 DevHandle; /* 0x00 */ | ||
| 387 | U8 MsgLength; /* 0x02 */ | ||
| 388 | U8 Function; /* 0x03 */ | ||
| 389 | U8 Action; /* 0x04 */ | ||
| 390 | U8 Flags; /* 0x05 */ | ||
| 391 | U8 Reserved1; /* 0x06 */ | ||
| 392 | U8 MsgFlags; /* 0x07 */ | ||
| 393 | U8 VP_ID; /* 0x08 */ | ||
| 394 | U8 VF_ID; /* 0x09 */ | ||
| 395 | U16 Reserved2; /* 0x0A */ | ||
| 396 | U16 Reserved3; /* 0x0C */ | ||
| 397 | U16 IOCStatus; /* 0x0E */ | ||
| 398 | U32 IOCLogInfo; /* 0x10 */ | ||
| 399 | U32 SlotStatus; /* 0x14 */ | ||
| 400 | U32 Reserved4; /* 0x18 */ | ||
| 401 | U16 Slot; /* 0x1C */ | ||
| 402 | U16 EnclosureHandle; /* 0x1E */ | ||
| 403 | } MPI2_SEP_REPLY, MPI2_POINTER PTR_MPI2_SEP_REPLY, | ||
| 404 | Mpi2SepReply_t, MPI2_POINTER pMpi2SepReply_t; | ||
| 405 | |||
| 406 | /* SlotStatus defines */ | ||
| 407 | #define MPI2_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000) | ||
| 408 | #define MPI2_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000) | ||
| 409 | #define MPI2_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200) | ||
| 410 | #define MPI2_SEP_REPLY_SLOTSTATUS_HOT_SPARE (0x00000100) | ||
| 411 | #define MPI2_SEP_REPLY_SLOTSTATUS_UNCONFIGURED (0x00000080) | ||
| 412 | #define MPI2_SEP_REPLY_SLOTSTATUS_PREDICTED_FAULT (0x00000040) | ||
| 413 | #define MPI2_SEP_REPLY_SLOTSTATUS_DEV_REBUILDING (0x00000004) | ||
| 414 | #define MPI2_SEP_REPLY_SLOTSTATUS_DEV_FAULTY (0x00000002) | ||
| 415 | #define MPI2_SEP_REPLY_SLOTSTATUS_NO_ERROR (0x00000001) | ||
| 416 | |||
| 417 | |||
| 418 | #endif | ||
| 419 | |||
| 420 | |||
diff --git a/drivers/scsi/mpt2sas/mpi/mpi2_ioc.h b/drivers/scsi/mpt2sas/mpi/mpi2_ioc.h new file mode 100644 index 000000000000..8c5d81870c03 --- /dev/null +++ b/drivers/scsi/mpt2sas/mpi/mpi2_ioc.h | |||
| @@ -0,0 +1,1295 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (c) 2000-2009 LSI Corporation. | ||
| 3 | * | ||
| 4 | * | ||
| 5 | * Name: mpi2_ioc.h | ||
| 6 | * Title: MPI IOC, Port, Event, FW Download, and FW Upload messages | ||
| 7 | * Creation Date: October 11, 2006 | ||
| 8 | * | ||
| 9 | * mpi2_ioc.h Version: 02.00.10 | ||
| 10 | * | ||
| 11 | * Version History | ||
| 12 | * --------------- | ||
| 13 | * | ||
| 14 | * Date Version Description | ||
| 15 | * -------- -------- ------------------------------------------------------ | ||
| 16 | * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. | ||
| 17 | * 06-04-07 02.00.01 In IOCFacts Reply structure, renamed MaxDevices to | ||
| 18 | * MaxTargets. | ||
| 19 | * Added TotalImageSize field to FWDownload Request. | ||
| 20 | * Added reserved words to FWUpload Request. | ||
| 21 | * 06-26-07 02.00.02 Added IR Configuration Change List Event. | ||
| 22 | * 08-31-07 02.00.03 Removed SystemReplyQueueDepth field from the IOCInit | ||
| 23 | * request and replaced it with | ||
| 24 | * ReplyDescriptorPostQueueDepth and ReplyFreeQueueDepth. | ||
| 25 | * Replaced the MinReplyQueueDepth field of the IOCFacts | ||
| 26 | * reply with MaxReplyDescriptorPostQueueDepth. | ||
| 27 | * Added MPI2_RDPQ_DEPTH_MIN define to specify the minimum | ||
| 28 | * depth for the Reply Descriptor Post Queue. | ||
| 29 | * Added SASAddress field to Initiator Device Table | ||
| 30 | * Overflow Event data. | ||
| 31 | * 10-31-07 02.00.04 Added ReasonCode MPI2_EVENT_SAS_INIT_RC_NOT_RESPONDING | ||
| 32 | * for SAS Initiator Device Status Change Event data. | ||
| 33 | * Modified Reason Code defines for SAS Topology Change | ||
| 34 | * List Event data, including adding a bit for PHY Vacant | ||
| 35 | * status, and adding a mask for the Reason Code. | ||
| 36 | * Added define for | ||
| 37 | * MPI2_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING. | ||
| 38 | * Added define for MPI2_EXT_IMAGE_TYPE_MEGARAID. | ||
| 39 | * 12-18-07 02.00.05 Added Boot Status defines for the IOCExceptions field of | ||
| 40 | * the IOCFacts Reply. | ||
| 41 | * Removed MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER define. | ||
| 42 | * Moved MPI2_VERSION_UNION to mpi2.h. | ||
| 43 | * Changed MPI2_EVENT_NOTIFICATION_REQUEST to use masks | ||
| 44 | * instead of enables, and added SASBroadcastPrimitiveMasks | ||
| 45 | * field. | ||
| 46 | * Added Log Entry Added Event and related structure. | ||
| 47 | * 02-29-08 02.00.06 Added define MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID. | ||
| 48 | * Removed define MPI2_IOCFACTS_PROTOCOL_SMP_TARGET. | ||
| 49 | * Added MaxVolumes and MaxPersistentEntries fields to | ||
| 50 | * IOCFacts reply. | ||
| 51 | * Added ProtocalFlags and IOCCapabilities fields to | ||
| 52 | * MPI2_FW_IMAGE_HEADER. | ||
| 53 | * Removed MPI2_PORTENABLE_FLAGS_ENABLE_SINGLE_PORT. | ||
| 54 | * 03-03-08 02.00.07 Fixed MPI2_FW_IMAGE_HEADER by changing Reserved26 to | ||
| 55 | * a U16 (from a U32). | ||
| 56 | * Removed extra 's' from EventMasks name. | ||
| 57 | * 06-27-08 02.00.08 Fixed an offset in a comment. | ||
| 58 | * 10-02-08 02.00.09 Removed SystemReplyFrameSize from MPI2_IOC_INIT_REQUEST. | ||
| 59 | * Removed CurReplyFrameSize from MPI2_IOC_FACTS_REPLY and | ||
| 60 | * renamed MinReplyFrameSize to ReplyFrameSize. | ||
| 61 | * Added MPI2_IOCFACTS_EXCEPT_IR_FOREIGN_CONFIG_MAX. | ||
| 62 | * Added two new RAIDOperation values for Integrated RAID | ||
| 63 | * Operations Status Event data. | ||
| 64 | * Added four new IR Configuration Change List Event data | ||
| 65 | * ReasonCode values. | ||
| 66 | * Added two new ReasonCode defines for SAS Device Status | ||
| 67 | * Change Event data. | ||
| 68 | * Added three new DiscoveryStatus bits for the SAS | ||
| 69 | * Discovery event data. | ||
| 70 | * Added Multiplexing Status Change bit to the PhyStatus | ||
| 71 | * field of the SAS Topology Change List event data. | ||
| 72 | * Removed define for MPI2_INIT_IMAGE_BOOTFLAGS_XMEMCOPY. | ||
| 73 | * BootFlags are now product-specific. | ||
| 74 | * Added defines for the indivdual signature bytes | ||
| 75 | * for MPI2_INIT_IMAGE_FOOTER. | ||
| 76 | * 01-19-09 02.00.10 Added MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY define. | ||
| 77 | * Added MPI2_EVENT_SAS_DISC_DS_DOWNSTREAM_INITIATOR | ||
| 78 | * define. | ||
| 79 | * Added MPI2_EVENT_SAS_DEV_STAT_RC_SATA_INIT_FAILURE | ||
| 80 | * define. | ||
| 81 | * Removed MPI2_EVENT_SAS_DISC_DS_SATA_INIT_FAILURE define. | ||
| 82 | * -------------------------------------------------------------------------- | ||
| 83 | */ | ||
| 84 | |||
| 85 | #ifndef MPI2_IOC_H | ||
| 86 | #define MPI2_IOC_H | ||
| 87 | |||
| 88 | /***************************************************************************** | ||
| 89 | * | ||
| 90 | * IOC Messages | ||
| 91 | * | ||
| 92 | *****************************************************************************/ | ||
| 93 | |||
| 94 | /**************************************************************************** | ||
| 95 | * IOCInit message | ||
| 96 | ****************************************************************************/ | ||
| 97 | |||
| 98 | /* IOCInit Request message */ | ||
| 99 | typedef struct _MPI2_IOC_INIT_REQUEST | ||
| 100 | { | ||
| 101 | U8 WhoInit; /* 0x00 */ | ||
| 102 | U8 Reserved1; /* 0x01 */ | ||
| 103 | U8 ChainOffset; /* 0x02 */ | ||
| 104 | U8 Function; /* 0x03 */ | ||
| 105 | U16 Reserved2; /* 0x04 */ | ||
| 106 | U8 Reserved3; /* 0x06 */ | ||
| 107 | U8 MsgFlags; /* 0x07 */ | ||
| 108 | U8 VP_ID; /* 0x08 */ | ||
| 109 | U8 VF_ID; /* 0x09 */ | ||
| 110 | U16 Reserved4; /* 0x0A */ | ||
| 111 | U16 MsgVersion; /* 0x0C */ | ||
| 112 | U16 HeaderVersion; /* 0x0E */ | ||
| 113 | U32 Reserved5; /* 0x10 */ | ||
| 114 | U32 Reserved6; /* 0x14 */ | ||
| 115 | U16 Reserved7; /* 0x18 */ | ||
| 116 | U16 SystemRequestFrameSize; /* 0x1A */ | ||
| 117 | U16 ReplyDescriptorPostQueueDepth; /* 0x1C */ | ||
| 118 | U16 ReplyFreeQueueDepth; /* 0x1E */ | ||
| 119 | U32 SenseBufferAddressHigh; /* 0x20 */ | ||
| 120 | U32 SystemReplyAddressHigh; /* 0x24 */ | ||
| 121 | U64 SystemRequestFrameBaseAddress; /* 0x28 */ | ||
| 122 | U64 ReplyDescriptorPostQueueAddress;/* 0x30 */ | ||
| 123 | U64 ReplyFreeQueueAddress; /* 0x38 */ | ||
| 124 | U64 TimeStamp; /* 0x40 */ | ||
| 125 | } MPI2_IOC_INIT_REQUEST, MPI2_POINTER PTR_MPI2_IOC_INIT_REQUEST, | ||
| 126 | Mpi2IOCInitRequest_t, MPI2_POINTER pMpi2IOCInitRequest_t; | ||
| 127 | |||
| 128 | /* WhoInit values */ | ||
| 129 | #define MPI2_WHOINIT_NOT_INITIALIZED (0x00) | ||
| 130 | #define MPI2_WHOINIT_SYSTEM_BIOS (0x01) | ||
| 131 | #define MPI2_WHOINIT_ROM_BIOS (0x02) | ||
| 132 | #define MPI2_WHOINIT_PCI_PEER (0x03) | ||
| 133 | #define MPI2_WHOINIT_HOST_DRIVER (0x04) | ||
| 134 | #define MPI2_WHOINIT_MANUFACTURER (0x05) | ||
| 135 | |||
| 136 | /* MsgVersion */ | ||
| 137 | #define MPI2_IOCINIT_MSGVERSION_MAJOR_MASK (0xFF00) | ||
| 138 | #define MPI2_IOCINIT_MSGVERSION_MAJOR_SHIFT (8) | ||
| 139 | #define MPI2_IOCINIT_MSGVERSION_MINOR_MASK (0x00FF) | ||
| 140 | #define MPI2_IOCINIT_MSGVERSION_MINOR_SHIFT (0) | ||
| 141 | |||
| 142 | /* HeaderVersion */ | ||
| 143 | #define MPI2_IOCINIT_HDRVERSION_UNIT_MASK (0xFF00) | ||
| 144 | #define MPI2_IOCINIT_HDRVERSION_UNIT_SHIFT (8) | ||
| 145 | #define MPI2_IOCINIT_HDRVERSION_DEV_MASK (0x00FF) | ||
| 146 | #define MPI2_IOCINIT_HDRVERSION_DEV_SHIFT (0) | ||
| 147 | |||
| 148 | /* minimum depth for the Reply Descriptor Post Queue */ | ||
| 149 | #define MPI2_RDPQ_DEPTH_MIN (16) | ||
| 150 | |||
| 151 | |||
| 152 | /* IOCInit Reply message */ | ||
| 153 | typedef struct _MPI2_IOC_INIT_REPLY | ||
| 154 | { | ||
| 155 | U8 WhoInit; /* 0x00 */ | ||
| 156 | U8 Reserved1; /* 0x01 */ | ||
| 157 | U8 MsgLength; /* 0x02 */ | ||
| 158 | U8 Function; /* 0x03 */ | ||
| 159 | U16 Reserved2; /* 0x04 */ | ||
| 160 | U8 Reserved3; /* 0x06 */ | ||
| 161 | U8 MsgFlags; /* 0x07 */ | ||
| 162 | U8 VP_ID; /* 0x08 */ | ||
| 163 | U8 VF_ID; /* 0x09 */ | ||
| 164 | U16 Reserved4; /* 0x0A */ | ||
| 165 | U16 Reserved5; /* 0x0C */ | ||
| 166 | U16 IOCStatus; /* 0x0E */ | ||
| 167 | U32 IOCLogInfo; /* 0x10 */ | ||
| 168 | } MPI2_IOC_INIT_REPLY, MPI2_POINTER PTR_MPI2_IOC_INIT_REPLY, | ||
| 169 | Mpi2IOCInitReply_t, MPI2_POINTER pMpi2IOCInitReply_t; | ||
| 170 | |||
| 171 | |||
| 172 | /**************************************************************************** | ||
| 173 | * IOCFacts message | ||
| 174 | ****************************************************************************/ | ||
| 175 | |||
| 176 | /* IOCFacts Request message */ | ||
| 177 | typedef struct _MPI2_IOC_FACTS_REQUEST | ||
| 178 | { | ||
| 179 | U16 Reserved1; /* 0x00 */ | ||
| 180 | U8 ChainOffset; /* 0x02 */ | ||
| 181 | U8 Function; /* 0x03 */ | ||
| 182 | U16 Reserved2; /* 0x04 */ | ||
| 183 | U8 Reserved3; /* 0x06 */ | ||
| 184 | U8 MsgFlags; /* 0x07 */ | ||
| 185 | U8 VP_ID; /* 0x08 */ | ||
| 186 | U8 VF_ID; /* 0x09 */ | ||
| 187 | U16 Reserved4; /* 0x0A */ | ||
| 188 | } MPI2_IOC_FACTS_REQUEST, MPI2_POINTER PTR_MPI2_IOC_FACTS_REQUEST, | ||
| 189 | Mpi2IOCFactsRequest_t, MPI2_POINTER pMpi2IOCFactsRequest_t; | ||
| 190 | |||
| 191 | |||
| 192 | /* IOCFacts Reply message */ | ||
| 193 | typedef struct _MPI2_IOC_FACTS_REPLY | ||
| 194 | { | ||
| 195 | U16 MsgVersion; /* 0x00 */ | ||
| 196 | U8 MsgLength; /* 0x02 */ | ||
| 197 | U8 Function; /* 0x03 */ | ||
| 198 | U16 HeaderVersion; /* 0x04 */ | ||
| 199 | U8 IOCNumber; /* 0x06 */ | ||
| 200 | U8 MsgFlags; /* 0x07 */ | ||
| 201 | U8 VP_ID; /* 0x08 */ | ||
| 202 | U8 VF_ID; /* 0x09 */ | ||
| 203 | U16 Reserved1; /* 0x0A */ | ||
| 204 | U16 IOCExceptions; /* 0x0C */ | ||
| 205 | U16 IOCStatus; /* 0x0E */ | ||
| 206 | U32 IOCLogInfo; /* 0x10 */ | ||
| 207 | U8 MaxChainDepth; /* 0x14 */ | ||
| 208 | U8 WhoInit; /* 0x15 */ | ||
| 209 | U8 NumberOfPorts; /* 0x16 */ | ||
| 210 | U8 Reserved2; /* 0x17 */ | ||
| 211 | U16 RequestCredit; /* 0x18 */ | ||
| 212 | U16 ProductID; /* 0x1A */ | ||
| 213 | U32 IOCCapabilities; /* 0x1C */ | ||
| 214 | MPI2_VERSION_UNION FWVersion; /* 0x20 */ | ||
| 215 | U16 IOCRequestFrameSize; /* 0x24 */ | ||
| 216 | U16 Reserved3; /* 0x26 */ | ||
| 217 | U16 MaxInitiators; /* 0x28 */ | ||
| 218 | U16 MaxTargets; /* 0x2A */ | ||
| 219 | U16 MaxSasExpanders; /* 0x2C */ | ||
| 220 | U16 MaxEnclosures; /* 0x2E */ | ||
| 221 | U16 ProtocolFlags; /* 0x30 */ | ||
| 222 | U16 HighPriorityCredit; /* 0x32 */ | ||
| 223 | U16 MaxReplyDescriptorPostQueueDepth; /* 0x34 */ | ||
| 224 | U8 ReplyFrameSize; /* 0x36 */ | ||
| 225 | U8 MaxVolumes; /* 0x37 */ | ||
| 226 | U16 MaxDevHandle; /* 0x38 */ | ||
| 227 | U16 MaxPersistentEntries; /* 0x3A */ | ||
| 228 | U32 Reserved4; /* 0x3C */ | ||
| 229 | } MPI2_IOC_FACTS_REPLY, MPI2_POINTER PTR_MPI2_IOC_FACTS_REPLY, | ||
| 230 | Mpi2IOCFactsReply_t, MPI2_POINTER pMpi2IOCFactsReply_t; | ||
| 231 | |||
| 232 | /* MsgVersion */ | ||
| 233 | #define MPI2_IOCFACTS_MSGVERSION_MAJOR_MASK (0xFF00) | ||
| 234 | #define MPI2_IOCFACTS_MSGVERSION_MAJOR_SHIFT (8) | ||
| 235 | #define MPI2_IOCFACTS_MSGVERSION_MINOR_MASK (0x00FF) | ||
| 236 | #define MPI2_IOCFACTS_MSGVERSION_MINOR_SHIFT (0) | ||
| 237 | |||
| 238 | /* HeaderVersion */ | ||
| 239 | #define MPI2_IOCFACTS_HDRVERSION_UNIT_MASK (0xFF00) | ||
| 240 | #define MPI2_IOCFACTS_HDRVERSION_UNIT_SHIFT (8) | ||
| 241 | #define MPI2_IOCFACTS_HDRVERSION_DEV_MASK (0x00FF) | ||
| 242 | #define MPI2_IOCFACTS_HDRVERSION_DEV_SHIFT (0) | ||
| 243 | |||
| 244 | /* IOCExceptions */ | ||
| 245 | #define MPI2_IOCFACTS_EXCEPT_IR_FOREIGN_CONFIG_MAX (0x0100) | ||
| 246 | |||
| 247 | #define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_MASK (0x00E0) | ||
| 248 | #define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_GOOD (0x0000) | ||
| 249 | #define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_BACKUP (0x0020) | ||
| 250 | #define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_RESTORED (0x0040) | ||
| 251 | #define MPI2_IOCFACTS_EXCEPT_BOOTSTAT_CORRUPT_BACKUP (0x0060) | ||
| 252 | |||
| 253 | #define MPI2_IOCFACTS_EXCEPT_METADATA_UNSUPPORTED (0x0010) | ||
| 254 | #define MPI2_IOCFACTS_EXCEPT_MANUFACT_CHECKSUM_FAIL (0x0008) | ||
| 255 | #define MPI2_IOCFACTS_EXCEPT_FW_CHECKSUM_FAIL (0x0004) | ||
| 256 | #define MPI2_IOCFACTS_EXCEPT_RAID_CONFIG_INVALID (0x0002) | ||
| 257 | #define MPI2_IOCFACTS_EXCEPT_CONFIG_CHECKSUM_FAIL (0x0001) | ||
| 258 | |||
| 259 | /* defines for WhoInit field are after the IOCInit Request */ | ||
| 260 | |||
| 261 | /* ProductID field uses MPI2_FW_HEADER_PID_ */ | ||
| 262 | |||
| 263 | /* IOCCapabilities */ | ||
| 264 | #define MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY (0x00002000) | ||
| 265 | #define MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID (0x00001000) | ||
| 266 | #define MPI2_IOCFACTS_CAPABILITY_TLR (0x00000800) | ||
| 267 | #define MPI2_IOCFACTS_CAPABILITY_MULTICAST (0x00000100) | ||
| 268 | #define MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET (0x00000080) | ||
| 269 | #define MPI2_IOCFACTS_CAPABILITY_EEDP (0x00000040) | ||
| 270 | #define MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER (0x00000010) | ||
| 271 | #define MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER (0x00000008) | ||
| 272 | #define MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING (0x00000004) | ||
| 273 | |||
| 274 | /* ProtocolFlags */ | ||
| 275 | #define MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET (0x0001) | ||
| 276 | #define MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR (0x0002) | ||
| 277 | |||
| 278 | |||
| 279 | /**************************************************************************** | ||
| 280 | * PortFacts message | ||
| 281 | ****************************************************************************/ | ||
| 282 | |||
| 283 | /* PortFacts Request message */ | ||
| 284 | typedef struct _MPI2_PORT_FACTS_REQUEST | ||
| 285 | { | ||
| 286 | U16 Reserved1; /* 0x00 */ | ||
| 287 | U8 ChainOffset; /* 0x02 */ | ||
| 288 | U8 Function; /* 0x03 */ | ||
| 289 | U16 Reserved2; /* 0x04 */ | ||
| 290 | U8 PortNumber; /* 0x06 */ | ||
| 291 | U8 MsgFlags; /* 0x07 */ | ||
| 292 | U8 VP_ID; /* 0x08 */ | ||
| 293 | U8 VF_ID; /* 0x09 */ | ||
| 294 | U16 Reserved3; /* 0x0A */ | ||
| 295 | } MPI2_PORT_FACTS_REQUEST, MPI2_POINTER PTR_MPI2_PORT_FACTS_REQUEST, | ||
| 296 | Mpi2PortFactsRequest_t, MPI2_POINTER pMpi2PortFactsRequest_t; | ||
| 297 | |||
| 298 | /* PortFacts Reply message */ | ||
| 299 | typedef struct _MPI2_PORT_FACTS_REPLY | ||
| 300 | { | ||
| 301 | U16 Reserved1; /* 0x00 */ | ||
| 302 | U8 MsgLength; /* 0x02 */ | ||
| 303 | U8 Function; /* 0x03 */ | ||
| 304 | U16 Reserved2; /* 0x04 */ | ||
| 305 | U8 PortNumber; /* 0x06 */ | ||
| 306 | U8 MsgFlags; /* 0x07 */ | ||
| 307 | U8 VP_ID; /* 0x08 */ | ||
| 308 | U8 VF_ID; /* 0x09 */ | ||
| 309 | U16 Reserved3; /* 0x0A */ | ||
| 310 | U16 Reserved4; /* 0x0C */ | ||
| 311 | U16 IOCStatus; /* 0x0E */ | ||
| 312 | U32 IOCLogInfo; /* 0x10 */ | ||
| 313 | U8 Reserved5; /* 0x14 */ | ||
| 314 | U8 PortType; /* 0x15 */ | ||
| 315 | U16 Reserved6; /* 0x16 */ | ||
| 316 | U16 MaxPostedCmdBuffers; /* 0x18 */ | ||
| 317 | U16 Reserved7; /* 0x1A */ | ||
| 318 | } MPI2_PORT_FACTS_REPLY, MPI2_POINTER PTR_MPI2_PORT_FACTS_REPLY, | ||
| 319 | Mpi2PortFactsReply_t, MPI2_POINTER pMpi2PortFactsReply_t; | ||
| 320 | |||
| 321 | /* PortType values */ | ||
| 322 | #define MPI2_PORTFACTS_PORTTYPE_INACTIVE (0x00) | ||
| 323 | #define MPI2_PORTFACTS_PORTTYPE_FC (0x10) | ||
| 324 | #define MPI2_PORTFACTS_PORTTYPE_ISCSI (0x20) | ||
| 325 | #define MPI2_PORTFACTS_PORTTYPE_SAS_PHYSICAL (0x30) | ||
| 326 | #define MPI2_PORTFACTS_PORTTYPE_SAS_VIRTUAL (0x31) | ||
| 327 | |||
| 328 | |||
| 329 | /**************************************************************************** | ||
| 330 | * PortEnable message | ||
| 331 | ****************************************************************************/ | ||
| 332 | |||
| 333 | /* PortEnable Request message */ | ||
| 334 | typedef struct _MPI2_PORT_ENABLE_REQUEST | ||
| 335 | { | ||
| 336 | U16 Reserved1; /* 0x00 */ | ||
| 337 | U8 ChainOffset; /* 0x02 */ | ||
| 338 | U8 Function; /* 0x03 */ | ||
| 339 | U8 Reserved2; /* 0x04 */ | ||
| 340 | U8 PortFlags; /* 0x05 */ | ||
| 341 | U8 Reserved3; /* 0x06 */ | ||
| 342 | U8 MsgFlags; /* 0x07 */ | ||
| 343 | U8 VP_ID; /* 0x08 */ | ||
| 344 | U8 VF_ID; /* 0x09 */ | ||
| 345 | U16 Reserved4; /* 0x0A */ | ||
| 346 | } MPI2_PORT_ENABLE_REQUEST, MPI2_POINTER PTR_MPI2_PORT_ENABLE_REQUEST, | ||
| 347 | Mpi2PortEnableRequest_t, MPI2_POINTER pMpi2PortEnableRequest_t; | ||
| 348 | |||
| 349 | |||
| 350 | /* PortEnable Reply message */ | ||
| 351 | typedef struct _MPI2_PORT_ENABLE_REPLY | ||
| 352 | { | ||
| 353 | U16 Reserved1; /* 0x00 */ | ||
| 354 | U8 MsgLength; /* 0x02 */ | ||
| 355 | U8 Function; /* 0x03 */ | ||
| 356 | U8 Reserved2; /* 0x04 */ | ||
| 357 | U8 PortFlags; /* 0x05 */ | ||
| 358 | U8 Reserved3; /* 0x06 */ | ||
| 359 | U8 MsgFlags; /* 0x07 */ | ||
| 360 | U8 VP_ID; /* 0x08 */ | ||
| 361 | U8 VF_ID; /* 0x09 */ | ||
| 362 | U16 Reserved4; /* 0x0A */ | ||
| 363 | U16 Reserved5; /* 0x0C */ | ||
| 364 | U16 IOCStatus; /* 0x0E */ | ||
| 365 | U32 IOCLogInfo; /* 0x10 */ | ||
| 366 | } MPI2_PORT_ENABLE_REPLY, MPI2_POINTER PTR_MPI2_PORT_ENABLE_REPLY, | ||
| 367 | Mpi2PortEnableReply_t, MPI2_POINTER pMpi2PortEnableReply_t; | ||
| 368 | |||
| 369 | |||
| 370 | /**************************************************************************** | ||
| 371 | * EventNotification message | ||
| 372 | ****************************************************************************/ | ||
| 373 | |||
| 374 | /* EventNotification Request message */ | ||
| 375 | #define MPI2_EVENT_NOTIFY_EVENTMASK_WORDS (4) | ||
| 376 | |||
| 377 | typedef struct _MPI2_EVENT_NOTIFICATION_REQUEST | ||
| 378 | { | ||
| 379 | U16 Reserved1; /* 0x00 */ | ||
| 380 | U8 ChainOffset; /* 0x02 */ | ||
| 381 | U8 Function; /* 0x03 */ | ||
| 382 | U16 Reserved2; /* 0x04 */ | ||
| 383 | U8 Reserved3; /* 0x06 */ | ||
| 384 | U8 MsgFlags; /* 0x07 */ | ||
| 385 | U8 VP_ID; /* 0x08 */ | ||
| 386 | U8 VF_ID; /* 0x09 */ | ||
| 387 | U16 Reserved4; /* 0x0A */ | ||
| 388 | U32 Reserved5; /* 0x0C */ | ||
| 389 | U32 Reserved6; /* 0x10 */ | ||
| 390 | U32 EventMasks[MPI2_EVENT_NOTIFY_EVENTMASK_WORDS];/* 0x14 */ | ||
| 391 | U16 SASBroadcastPrimitiveMasks; /* 0x24 */ | ||
| 392 | U16 Reserved7; /* 0x26 */ | ||
| 393 | U32 Reserved8; /* 0x28 */ | ||
| 394 | } MPI2_EVENT_NOTIFICATION_REQUEST, | ||
| 395 | MPI2_POINTER PTR_MPI2_EVENT_NOTIFICATION_REQUEST, | ||
| 396 | Mpi2EventNotificationRequest_t, MPI2_POINTER pMpi2EventNotificationRequest_t; | ||
| 397 | |||
| 398 | |||
| 399 | /* EventNotification Reply message */ | ||
| 400 | typedef struct _MPI2_EVENT_NOTIFICATION_REPLY | ||
| 401 | { | ||
| 402 | U16 EventDataLength; /* 0x00 */ | ||
| 403 | U8 MsgLength; /* 0x02 */ | ||
| 404 | U8 Function; /* 0x03 */ | ||
| 405 | U16 Reserved1; /* 0x04 */ | ||
| 406 | U8 AckRequired; /* 0x06 */ | ||
| 407 | U8 MsgFlags; /* 0x07 */ | ||
| 408 | U8 VP_ID; /* 0x08 */ | ||
| 409 | U8 VF_ID; /* 0x09 */ | ||
| 410 | U16 Reserved2; /* 0x0A */ | ||
| 411 | U16 Reserved3; /* 0x0C */ | ||
| 412 | U16 IOCStatus; /* 0x0E */ | ||
| 413 | U32 IOCLogInfo; /* 0x10 */ | ||
| 414 | U16 Event; /* 0x14 */ | ||
| 415 | U16 Reserved4; /* 0x16 */ | ||
| 416 | U32 EventContext; /* 0x18 */ | ||
| 417 | U32 EventData[1]; /* 0x1C */ | ||
| 418 | } MPI2_EVENT_NOTIFICATION_REPLY, MPI2_POINTER PTR_MPI2_EVENT_NOTIFICATION_REPLY, | ||
| 419 | Mpi2EventNotificationReply_t, MPI2_POINTER pMpi2EventNotificationReply_t; | ||
| 420 | |||
| 421 | /* AckRequired */ | ||
| 422 | #define MPI2_EVENT_NOTIFICATION_ACK_NOT_REQUIRED (0x00) | ||
| 423 | #define MPI2_EVENT_NOTIFICATION_ACK_REQUIRED (0x01) | ||
| 424 | |||
| 425 | /* Event */ | ||
| 426 | #define MPI2_EVENT_LOG_DATA (0x0001) | ||
| 427 | #define MPI2_EVENT_STATE_CHANGE (0x0002) | ||
| 428 | #define MPI2_EVENT_HARD_RESET_RECEIVED (0x0005) | ||
| 429 | #define MPI2_EVENT_EVENT_CHANGE (0x000A) | ||
| 430 | #define MPI2_EVENT_TASK_SET_FULL (0x000E) | ||
| 431 | #define MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE (0x000F) | ||
| 432 | #define MPI2_EVENT_IR_OPERATION_STATUS (0x0014) | ||
| 433 | #define MPI2_EVENT_SAS_DISCOVERY (0x0016) | ||
| 434 | #define MPI2_EVENT_SAS_BROADCAST_PRIMITIVE (0x0017) | ||
| 435 | #define MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE (0x0018) | ||
| 436 | #define MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW (0x0019) | ||
| 437 | #define MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST (0x001C) | ||
| 438 | #define MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE (0x001D) | ||
| 439 | #define MPI2_EVENT_IR_VOLUME (0x001E) | ||
| 440 | #define MPI2_EVENT_IR_PHYSICAL_DISK (0x001F) | ||
| 441 | #define MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST (0x0020) | ||
| 442 | #define MPI2_EVENT_LOG_ENTRY_ADDED (0x0021) | ||
| 443 | |||
| 444 | |||
| 445 | /* Log Entry Added Event data */ | ||
| 446 | |||
| 447 | /* the following structure matches MPI2_LOG_0_ENTRY in mpi2_cnfg.h */ | ||
| 448 | #define MPI2_EVENT_DATA_LOG_DATA_LENGTH (0x1C) | ||
| 449 | |||
| 450 | typedef struct _MPI2_EVENT_DATA_LOG_ENTRY_ADDED | ||
| 451 | { | ||
| 452 | U64 TimeStamp; /* 0x00 */ | ||
| 453 | U32 Reserved1; /* 0x08 */ | ||
| 454 | U16 LogSequence; /* 0x0C */ | ||
| 455 | U16 LogEntryQualifier; /* 0x0E */ | ||
| 456 | U8 VP_ID; /* 0x10 */ | ||
| 457 | U8 VF_ID; /* 0x11 */ | ||
| 458 | U16 Reserved2; /* 0x12 */ | ||
| 459 | U8 LogData[MPI2_EVENT_DATA_LOG_DATA_LENGTH];/* 0x14 */ | ||
| 460 | } MPI2_EVENT_DATA_LOG_ENTRY_ADDED, | ||
| 461 | MPI2_POINTER PTR_MPI2_EVENT_DATA_LOG_ENTRY_ADDED, | ||
| 462 | Mpi2EventDataLogEntryAdded_t, MPI2_POINTER pMpi2EventDataLogEntryAdded_t; | ||
| 463 | |||
| 464 | /* Hard Reset Received Event data */ | ||
| 465 | |||
| 466 | typedef struct _MPI2_EVENT_DATA_HARD_RESET_RECEIVED | ||
| 467 | { | ||
| 468 | U8 Reserved1; /* 0x00 */ | ||
| 469 | U8 Port; /* 0x01 */ | ||
| 470 | U16 Reserved2; /* 0x02 */ | ||
| 471 | } MPI2_EVENT_DATA_HARD_RESET_RECEIVED, | ||
| 472 | MPI2_POINTER PTR_MPI2_EVENT_DATA_HARD_RESET_RECEIVED, | ||
| 473 | Mpi2EventDataHardResetReceived_t, | ||
| 474 | MPI2_POINTER pMpi2EventDataHardResetReceived_t; | ||
| 475 | |||
| 476 | /* Task Set Full Event data */ | ||
| 477 | |||
| 478 | typedef struct _MPI2_EVENT_DATA_TASK_SET_FULL | ||
| 479 | { | ||
| 480 | U16 DevHandle; /* 0x00 */ | ||
| 481 | U16 CurrentDepth; /* 0x02 */ | ||
| 482 | } MPI2_EVENT_DATA_TASK_SET_FULL, MPI2_POINTER PTR_MPI2_EVENT_DATA_TASK_SET_FULL, | ||
| 483 | Mpi2EventDataTaskSetFull_t, MPI2_POINTER pMpi2EventDataTaskSetFull_t; | ||
| 484 | |||
| 485 | |||
| 486 | /* SAS Device Status Change Event data */ | ||
| 487 | |||
| 488 | typedef struct _MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE | ||
| 489 | { | ||
| 490 | U16 TaskTag; /* 0x00 */ | ||
| 491 | U8 ReasonCode; /* 0x02 */ | ||
| 492 | U8 Reserved1; /* 0x03 */ | ||
| 493 | U8 ASC; /* 0x04 */ | ||
| 494 | U8 ASCQ; /* 0x05 */ | ||
| 495 | U16 DevHandle; /* 0x06 */ | ||
| 496 | U32 Reserved2; /* 0x08 */ | ||
| 497 | U64 SASAddress; /* 0x0C */ | ||
| 498 | U8 LUN[8]; /* 0x14 */ | ||
| 499 | } MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE, | ||
| 500 | MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE, | ||
| 501 | Mpi2EventDataSasDeviceStatusChange_t, | ||
| 502 | MPI2_POINTER pMpi2EventDataSasDeviceStatusChange_t; | ||
| 503 | |||
| 504 | /* SAS Device Status Change Event data ReasonCode values */ | ||
| 505 | #define MPI2_EVENT_SAS_DEV_STAT_RC_SMART_DATA (0x05) | ||
| 506 | #define MPI2_EVENT_SAS_DEV_STAT_RC_UNSUPPORTED (0x07) | ||
| 507 | #define MPI2_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET (0x08) | ||
| 508 | #define MPI2_EVENT_SAS_DEV_STAT_RC_TASK_ABORT_INTERNAL (0x09) | ||
| 509 | #define MPI2_EVENT_SAS_DEV_STAT_RC_ABORT_TASK_SET_INTERNAL (0x0A) | ||
| 510 | #define MPI2_EVENT_SAS_DEV_STAT_RC_CLEAR_TASK_SET_INTERNAL (0x0B) | ||
| 511 | #define MPI2_EVENT_SAS_DEV_STAT_RC_QUERY_TASK_INTERNAL (0x0C) | ||
| 512 | #define MPI2_EVENT_SAS_DEV_STAT_RC_ASYNC_NOTIFICATION (0x0D) | ||
| 513 | #define MPI2_EVENT_SAS_DEV_STAT_RC_CMP_INTERNAL_DEV_RESET (0x0E) | ||
| 514 | #define MPI2_EVENT_SAS_DEV_STAT_RC_CMP_TASK_ABORT_INTERNAL (0x0F) | ||
| 515 | #define MPI2_EVENT_SAS_DEV_STAT_RC_SATA_INIT_FAILURE (0x10) | ||
| 516 | |||
| 517 | |||
| 518 | /* Integrated RAID Operation Status Event data */ | ||
| 519 | |||
| 520 | typedef struct _MPI2_EVENT_DATA_IR_OPERATION_STATUS | ||
| 521 | { | ||
| 522 | U16 VolDevHandle; /* 0x00 */ | ||
| 523 | U16 Reserved1; /* 0x02 */ | ||
| 524 | U8 RAIDOperation; /* 0x04 */ | ||
| 525 | U8 PercentComplete; /* 0x05 */ | ||
| 526 | U16 Reserved2; /* 0x06 */ | ||
| 527 | U32 Resereved3; /* 0x08 */ | ||
| 528 | } MPI2_EVENT_DATA_IR_OPERATION_STATUS, | ||
| 529 | MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_OPERATION_STATUS, | ||
| 530 | Mpi2EventDataIrOperationStatus_t, | ||
| 531 | MPI2_POINTER pMpi2EventDataIrOperationStatus_t; | ||
| 532 | |||
| 533 | /* Integrated RAID Operation Status Event data RAIDOperation values */ | ||
| 534 | #define MPI2_EVENT_IR_RAIDOP_RESYNC (0x00) | ||
| 535 | #define MPI2_EVENT_IR_RAIDOP_ONLINE_CAP_EXPANSION (0x01) | ||
| 536 | #define MPI2_EVENT_IR_RAIDOP_CONSISTENCY_CHECK (0x02) | ||
| 537 | #define MPI2_EVENT_IR_RAIDOP_BACKGROUND_INIT (0x03) | ||
| 538 | #define MPI2_EVENT_IR_RAIDOP_MAKE_DATA_CONSISTENT (0x04) | ||
| 539 | |||
| 540 | |||
| 541 | /* Integrated RAID Volume Event data */ | ||
| 542 | |||
| 543 | typedef struct _MPI2_EVENT_DATA_IR_VOLUME | ||
| 544 | { | ||
| 545 | U16 VolDevHandle; /* 0x00 */ | ||
| 546 | U8 ReasonCode; /* 0x02 */ | ||
| 547 | U8 Reserved1; /* 0x03 */ | ||
| 548 | U32 NewValue; /* 0x04 */ | ||
| 549 | U32 PreviousValue; /* 0x08 */ | ||
| 550 | } MPI2_EVENT_DATA_IR_VOLUME, MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_VOLUME, | ||
| 551 | Mpi2EventDataIrVolume_t, MPI2_POINTER pMpi2EventDataIrVolume_t; | ||
| 552 | |||
| 553 | /* Integrated RAID Volume Event data ReasonCode values */ | ||
| 554 | #define MPI2_EVENT_IR_VOLUME_RC_SETTINGS_CHANGED (0x01) | ||
| 555 | #define MPI2_EVENT_IR_VOLUME_RC_STATUS_FLAGS_CHANGED (0x02) | ||
| 556 | #define MPI2_EVENT_IR_VOLUME_RC_STATE_CHANGED (0x03) | ||
| 557 | |||
| 558 | |||
| 559 | /* Integrated RAID Physical Disk Event data */ | ||
| 560 | |||
| 561 | typedef struct _MPI2_EVENT_DATA_IR_PHYSICAL_DISK | ||
| 562 | { | ||
| 563 | U16 Reserved1; /* 0x00 */ | ||
| 564 | U8 ReasonCode; /* 0x02 */ | ||
| 565 | U8 PhysDiskNum; /* 0x03 */ | ||
| 566 | U16 PhysDiskDevHandle; /* 0x04 */ | ||
| 567 | U16 Reserved2; /* 0x06 */ | ||
| 568 | U16 Slot; /* 0x08 */ | ||
| 569 | U16 EnclosureHandle; /* 0x0A */ | ||
| 570 | U32 NewValue; /* 0x0C */ | ||
| 571 | U32 PreviousValue; /* 0x10 */ | ||
| 572 | } MPI2_EVENT_DATA_IR_PHYSICAL_DISK, | ||
| 573 | MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_PHYSICAL_DISK, | ||
| 574 | Mpi2EventDataIrPhysicalDisk_t, MPI2_POINTER pMpi2EventDataIrPhysicalDisk_t; | ||
| 575 | |||
| 576 | /* Integrated RAID Physical Disk Event data ReasonCode values */ | ||
| 577 | #define MPI2_EVENT_IR_PHYSDISK_RC_SETTINGS_CHANGED (0x01) | ||
| 578 | #define MPI2_EVENT_IR_PHYSDISK_RC_STATUS_FLAGS_CHANGED (0x02) | ||
| 579 | #define MPI2_EVENT_IR_PHYSDISK_RC_STATE_CHANGED (0x03) | ||
| 580 | |||
| 581 | |||
| 582 | /* Integrated RAID Configuration Change List Event data */ | ||
| 583 | |||
| 584 | /* | ||
| 585 | * Host code (drivers, BIOS, utilities, etc.) should leave this define set to | ||
| 586 | * one and check NumElements at runtime. | ||
| 587 | */ | ||
| 588 | #ifndef MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT | ||
| 589 | #define MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT (1) | ||
| 590 | #endif | ||
| 591 | |||
| 592 | typedef struct _MPI2_EVENT_IR_CONFIG_ELEMENT | ||
| 593 | { | ||
| 594 | U16 ElementFlags; /* 0x00 */ | ||
| 595 | U16 VolDevHandle; /* 0x02 */ | ||
| 596 | U8 ReasonCode; /* 0x04 */ | ||
| 597 | U8 PhysDiskNum; /* 0x05 */ | ||
| 598 | U16 PhysDiskDevHandle; /* 0x06 */ | ||
| 599 | } MPI2_EVENT_IR_CONFIG_ELEMENT, MPI2_POINTER PTR_MPI2_EVENT_IR_CONFIG_ELEMENT, | ||
| 600 | Mpi2EventIrConfigElement_t, MPI2_POINTER pMpi2EventIrConfigElement_t; | ||
| 601 | |||
| 602 | /* IR Configuration Change List Event data ElementFlags values */ | ||
| 603 | #define MPI2_EVENT_IR_CHANGE_EFLAGS_ELEMENT_TYPE_MASK (0x000F) | ||
| 604 | #define MPI2_EVENT_IR_CHANGE_EFLAGS_VOLUME_ELEMENT (0x0000) | ||
| 605 | #define MPI2_EVENT_IR_CHANGE_EFLAGS_VOLPHYSDISK_ELEMENT (0x0001) | ||
| 606 | #define MPI2_EVENT_IR_CHANGE_EFLAGS_HOTSPARE_ELEMENT (0x0002) | ||
| 607 | |||
| 608 | /* IR Configuration Change List Event data ReasonCode values */ | ||
| 609 | #define MPI2_EVENT_IR_CHANGE_RC_ADDED (0x01) | ||
| 610 | #define MPI2_EVENT_IR_CHANGE_RC_REMOVED (0x02) | ||
| 611 | #define MPI2_EVENT_IR_CHANGE_RC_NO_CHANGE (0x03) | ||
| 612 | #define MPI2_EVENT_IR_CHANGE_RC_HIDE (0x04) | ||
| 613 | #define MPI2_EVENT_IR_CHANGE_RC_UNHIDE (0x05) | ||
| 614 | #define MPI2_EVENT_IR_CHANGE_RC_VOLUME_CREATED (0x06) | ||
| 615 | #define MPI2_EVENT_IR_CHANGE_RC_VOLUME_DELETED (0x07) | ||
| 616 | #define MPI2_EVENT_IR_CHANGE_RC_PD_CREATED (0x08) | ||
| 617 | #define MPI2_EVENT_IR_CHANGE_RC_PD_DELETED (0x09) | ||
| 618 | |||
| 619 | typedef struct _MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST | ||
| 620 | { | ||
| 621 | U8 NumElements; /* 0x00 */ | ||
| 622 | U8 Reserved1; /* 0x01 */ | ||
| 623 | U8 Reserved2; /* 0x02 */ | ||
| 624 | U8 ConfigNum; /* 0x03 */ | ||
| 625 | U32 Flags; /* 0x04 */ | ||
| 626 | MPI2_EVENT_IR_CONFIG_ELEMENT ConfigElement[MPI2_EVENT_IR_CONFIG_ELEMENT_COUNT]; /* 0x08 */ | ||
| 627 | } MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST, | ||
| 628 | MPI2_POINTER PTR_MPI2_EVENT_DATA_IR_CONFIG_CHANGE_LIST, | ||
| 629 | Mpi2EventDataIrConfigChangeList_t, | ||
| 630 | MPI2_POINTER pMpi2EventDataIrConfigChangeList_t; | ||
| 631 | |||
| 632 | /* IR Configuration Change List Event data Flags values */ | ||
| 633 | #define MPI2_EVENT_IR_CHANGE_FLAGS_FOREIGN_CONFIG (0x00000001) | ||
| 634 | |||
| 635 | |||
| 636 | /* SAS Discovery Event data */ | ||
| 637 | |||
| 638 | typedef struct _MPI2_EVENT_DATA_SAS_DISCOVERY | ||
| 639 | { | ||
| 640 | U8 Flags; /* 0x00 */ | ||
| 641 | U8 ReasonCode; /* 0x01 */ | ||
| 642 | U8 PhysicalPort; /* 0x02 */ | ||
| 643 | U8 Reserved1; /* 0x03 */ | ||
| 644 | U32 DiscoveryStatus; /* 0x04 */ | ||
| 645 | } MPI2_EVENT_DATA_SAS_DISCOVERY, | ||
| 646 | MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_DISCOVERY, | ||
| 647 | Mpi2EventDataSasDiscovery_t, MPI2_POINTER pMpi2EventDataSasDiscovery_t; | ||
| 648 | |||
| 649 | /* SAS Discovery Event data Flags values */ | ||
| 650 | #define MPI2_EVENT_SAS_DISC_DEVICE_CHANGE (0x02) | ||
| 651 | #define MPI2_EVENT_SAS_DISC_IN_PROGRESS (0x01) | ||
| 652 | |||
| 653 | /* SAS Discovery Event data ReasonCode values */ | ||
| 654 | #define MPI2_EVENT_SAS_DISC_RC_STARTED (0x01) | ||
| 655 | #define MPI2_EVENT_SAS_DISC_RC_COMPLETED (0x02) | ||
| 656 | |||
| 657 | /* SAS Discovery Event data DiscoveryStatus values */ | ||
| 658 | #define MPI2_EVENT_SAS_DISC_DS_MAX_ENCLOSURES_EXCEED (0x80000000) | ||
| 659 | #define MPI2_EVENT_SAS_DISC_DS_MAX_EXPANDERS_EXCEED (0x40000000) | ||
| 660 | #define MPI2_EVENT_SAS_DISC_DS_MAX_DEVICES_EXCEED (0x20000000) | ||
| 661 | #define MPI2_EVENT_SAS_DISC_DS_MAX_TOPO_PHYS_EXCEED (0x10000000) | ||
| 662 | #define MPI2_EVENT_SAS_DISC_DS_DOWNSTREAM_INITIATOR (0x08000000) | ||
| 663 | #define MPI2_EVENT_SAS_DISC_DS_MULTI_SUBTRACTIVE_SUBTRACTIVE (0x00008000) | ||
| 664 | #define MPI2_EVENT_SAS_DISC_DS_EXP_MULTI_SUBTRACTIVE (0x00004000) | ||
| 665 | #define MPI2_EVENT_SAS_DISC_DS_MULTI_PORT_DOMAIN (0x00002000) | ||
| 666 | #define MPI2_EVENT_SAS_DISC_DS_TABLE_TO_SUBTRACTIVE_LINK (0x00001000) | ||
| 667 | #define MPI2_EVENT_SAS_DISC_DS_UNSUPPORTED_DEVICE (0x00000800) | ||
| 668 | #define MPI2_EVENT_SAS_DISC_DS_TABLE_LINK (0x00000400) | ||
| 669 | #define MPI2_EVENT_SAS_DISC_DS_SUBTRACTIVE_LINK (0x00000200) | ||
| 670 | #define MPI2_EVENT_SAS_DISC_DS_SMP_CRC_ERROR (0x00000100) | ||
| 671 | #define MPI2_EVENT_SAS_DISC_DS_SMP_FUNCTION_FAILED (0x00000080) | ||
| 672 | #define MPI2_EVENT_SAS_DISC_DS_INDEX_NOT_EXIST (0x00000040) | ||
| 673 | #define MPI2_EVENT_SAS_DISC_DS_OUT_ROUTE_ENTRIES (0x00000020) | ||
| 674 | #define MPI2_EVENT_SAS_DISC_DS_SMP_TIMEOUT (0x00000010) | ||
| 675 | #define MPI2_EVENT_SAS_DISC_DS_MULTIPLE_PORTS (0x00000004) | ||
| 676 | #define MPI2_EVENT_SAS_DISC_DS_UNADDRESSABLE_DEVICE (0x00000002) | ||
| 677 | #define MPI2_EVENT_SAS_DISC_DS_LOOP_DETECTED (0x00000001) | ||
| 678 | |||
| 679 | |||
| 680 | /* SAS Broadcast Primitive Event data */ | ||
| 681 | |||
| 682 | typedef struct _MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE | ||
| 683 | { | ||
| 684 | U8 PhyNum; /* 0x00 */ | ||
| 685 | U8 Port; /* 0x01 */ | ||
| 686 | U8 PortWidth; /* 0x02 */ | ||
| 687 | U8 Primitive; /* 0x03 */ | ||
| 688 | } MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE, | ||
| 689 | MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_BROADCAST_PRIMITIVE, | ||
| 690 | Mpi2EventDataSasBroadcastPrimitive_t, | ||
| 691 | MPI2_POINTER pMpi2EventDataSasBroadcastPrimitive_t; | ||
| 692 | |||
| 693 | /* defines for the Primitive field */ | ||
| 694 | #define MPI2_EVENT_PRIMITIVE_CHANGE (0x01) | ||
| 695 | #define MPI2_EVENT_PRIMITIVE_SES (0x02) | ||
| 696 | #define MPI2_EVENT_PRIMITIVE_EXPANDER (0x03) | ||
| 697 | #define MPI2_EVENT_PRIMITIVE_ASYNCHRONOUS_EVENT (0x04) | ||
| 698 | #define MPI2_EVENT_PRIMITIVE_RESERVED3 (0x05) | ||
| 699 | #define MPI2_EVENT_PRIMITIVE_RESERVED4 (0x06) | ||
| 700 | #define MPI2_EVENT_PRIMITIVE_CHANGE0_RESERVED (0x07) | ||
| 701 | #define MPI2_EVENT_PRIMITIVE_CHANGE1_RESERVED (0x08) | ||
| 702 | |||
| 703 | |||
| 704 | /* SAS Initiator Device Status Change Event data */ | ||
| 705 | |||
| 706 | typedef struct _MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE | ||
| 707 | { | ||
| 708 | U8 ReasonCode; /* 0x00 */ | ||
| 709 | U8 PhysicalPort; /* 0x01 */ | ||
| 710 | U16 DevHandle; /* 0x02 */ | ||
| 711 | U64 SASAddress; /* 0x04 */ | ||
| 712 | } MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE, | ||
| 713 | MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_INIT_DEV_STATUS_CHANGE, | ||
| 714 | Mpi2EventDataSasInitDevStatusChange_t, | ||
| 715 | MPI2_POINTER pMpi2EventDataSasInitDevStatusChange_t; | ||
| 716 | |||
| 717 | /* SAS Initiator Device Status Change event ReasonCode values */ | ||
| 718 | #define MPI2_EVENT_SAS_INIT_RC_ADDED (0x01) | ||
| 719 | #define MPI2_EVENT_SAS_INIT_RC_NOT_RESPONDING (0x02) | ||
| 720 | |||
| 721 | |||
| 722 | /* SAS Initiator Device Table Overflow Event data */ | ||
| 723 | |||
| 724 | typedef struct _MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW | ||
| 725 | { | ||
| 726 | U16 MaxInit; /* 0x00 */ | ||
| 727 | U16 CurrentInit; /* 0x02 */ | ||
| 728 | U64 SASAddress; /* 0x04 */ | ||
| 729 | } MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW, | ||
| 730 | MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_INIT_TABLE_OVERFLOW, | ||
| 731 | Mpi2EventDataSasInitTableOverflow_t, | ||
| 732 | MPI2_POINTER pMpi2EventDataSasInitTableOverflow_t; | ||
| 733 | |||
| 734 | |||
| 735 | /* SAS Topology Change List Event data */ | ||
| 736 | |||
| 737 | /* | ||
| 738 | * Host code (drivers, BIOS, utilities, etc.) should leave this define set to | ||
| 739 | * one and check NumEntries at runtime. | ||
| 740 | */ | ||
| 741 | #ifndef MPI2_EVENT_SAS_TOPO_PHY_COUNT | ||
| 742 | #define MPI2_EVENT_SAS_TOPO_PHY_COUNT (1) | ||
| 743 | #endif | ||
| 744 | |||
| 745 | typedef struct _MPI2_EVENT_SAS_TOPO_PHY_ENTRY | ||
| 746 | { | ||
| 747 | U16 AttachedDevHandle; /* 0x00 */ | ||
| 748 | U8 LinkRate; /* 0x02 */ | ||
| 749 | U8 PhyStatus; /* 0x03 */ | ||
| 750 | } MPI2_EVENT_SAS_TOPO_PHY_ENTRY, MPI2_POINTER PTR_MPI2_EVENT_SAS_TOPO_PHY_ENTRY, | ||
| 751 | Mpi2EventSasTopoPhyEntry_t, MPI2_POINTER pMpi2EventSasTopoPhyEntry_t; | ||
| 752 | |||
| 753 | typedef struct _MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST | ||
| 754 | { | ||
| 755 | U16 EnclosureHandle; /* 0x00 */ | ||
| 756 | U16 ExpanderDevHandle; /* 0x02 */ | ||
| 757 | U8 NumPhys; /* 0x04 */ | ||
| 758 | U8 Reserved1; /* 0x05 */ | ||
| 759 | U16 Reserved2; /* 0x06 */ | ||
| 760 | U8 NumEntries; /* 0x08 */ | ||
| 761 | U8 StartPhyNum; /* 0x09 */ | ||
| 762 | U8 ExpStatus; /* 0x0A */ | ||
| 763 | U8 PhysicalPort; /* 0x0B */ | ||
| 764 | MPI2_EVENT_SAS_TOPO_PHY_ENTRY PHY[MPI2_EVENT_SAS_TOPO_PHY_COUNT]; /* 0x0C*/ | ||
| 765 | } MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST, | ||
| 766 | MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST, | ||
| 767 | Mpi2EventDataSasTopologyChangeList_t, | ||
| 768 | MPI2_POINTER pMpi2EventDataSasTopologyChangeList_t; | ||
| 769 | |||
| 770 | /* values for the ExpStatus field */ | ||
| 771 | #define MPI2_EVENT_SAS_TOPO_ES_ADDED (0x01) | ||
| 772 | #define MPI2_EVENT_SAS_TOPO_ES_NOT_RESPONDING (0x02) | ||
| 773 | #define MPI2_EVENT_SAS_TOPO_ES_RESPONDING (0x03) | ||
| 774 | #define MPI2_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING (0x04) | ||
| 775 | |||
| 776 | /* defines for the LinkRate field */ | ||
| 777 | #define MPI2_EVENT_SAS_TOPO_LR_CURRENT_MASK (0xF0) | ||
| 778 | #define MPI2_EVENT_SAS_TOPO_LR_CURRENT_SHIFT (4) | ||
| 779 | #define MPI2_EVENT_SAS_TOPO_LR_PREV_MASK (0x0F) | ||
| 780 | #define MPI2_EVENT_SAS_TOPO_LR_PREV_SHIFT (0) | ||
| 781 | |||
| 782 | #define MPI2_EVENT_SAS_TOPO_LR_UNKNOWN_LINK_RATE (0x00) | ||
| 783 | #define MPI2_EVENT_SAS_TOPO_LR_PHY_DISABLED (0x01) | ||
| 784 | #define MPI2_EVENT_SAS_TOPO_LR_NEGOTIATION_FAILED (0x02) | ||
| 785 | #define MPI2_EVENT_SAS_TOPO_LR_SATA_OOB_COMPLETE (0x03) | ||
| 786 | #define MPI2_EVENT_SAS_TOPO_LR_PORT_SELECTOR (0x04) | ||
| 787 | #define MPI2_EVENT_SAS_TOPO_LR_SMP_RESET_IN_PROGRESS (0x05) | ||
| 788 | #define MPI2_EVENT_SAS_TOPO_LR_RATE_1_5 (0x08) | ||
| 789 | #define MPI2_EVENT_SAS_TOPO_LR_RATE_3_0 (0x09) | ||
| 790 | #define MPI2_EVENT_SAS_TOPO_LR_RATE_6_0 (0x0A) | ||
| 791 | |||
| 792 | /* values for the PhyStatus field */ | ||
| 793 | #define MPI2_EVENT_SAS_TOPO_PHYSTATUS_VACANT (0x80) | ||
| 794 | #define MPI2_EVENT_SAS_TOPO_PS_MULTIPLEX_CHANGE (0x10) | ||
| 795 | /* values for the PhyStatus ReasonCode sub-field */ | ||
| 796 | #define MPI2_EVENT_SAS_TOPO_RC_MASK (0x0F) | ||
| 797 | #define MPI2_EVENT_SAS_TOPO_RC_TARG_ADDED (0x01) | ||
| 798 | #define MPI2_EVENT_SAS_TOPO_RC_TARG_NOT_RESPONDING (0x02) | ||
| 799 | #define MPI2_EVENT_SAS_TOPO_RC_PHY_CHANGED (0x03) | ||
| 800 | #define MPI2_EVENT_SAS_TOPO_RC_NO_CHANGE (0x04) | ||
| 801 | #define MPI2_EVENT_SAS_TOPO_RC_DELAY_NOT_RESPONDING (0x05) | ||
| 802 | |||
| 803 | |||
| 804 | /* SAS Enclosure Device Status Change Event data */ | ||
| 805 | |||
| 806 | typedef struct _MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE | ||
| 807 | { | ||
| 808 | U16 EnclosureHandle; /* 0x00 */ | ||
| 809 | U8 ReasonCode; /* 0x02 */ | ||
| 810 | U8 PhysicalPort; /* 0x03 */ | ||
| 811 | U64 EnclosureLogicalID; /* 0x04 */ | ||
| 812 | U16 NumSlots; /* 0x0C */ | ||
| 813 | U16 StartSlot; /* 0x0E */ | ||
| 814 | U32 PhyBits; /* 0x10 */ | ||
| 815 | } MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE, | ||
| 816 | MPI2_POINTER PTR_MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE, | ||
| 817 | Mpi2EventDataSasEnclDevStatusChange_t, | ||
| 818 | MPI2_POINTER pMpi2EventDataSasEnclDevStatusChange_t; | ||
| 819 | |||
| 820 | /* SAS Enclosure Device Status Change event ReasonCode values */ | ||
| 821 | #define MPI2_EVENT_SAS_ENCL_RC_ADDED (0x01) | ||
| 822 | #define MPI2_EVENT_SAS_ENCL_RC_NOT_RESPONDING (0x02) | ||
| 823 | |||
| 824 | |||
| 825 | /**************************************************************************** | ||
| 826 | * EventAck message | ||
| 827 | ****************************************************************************/ | ||
| 828 | |||
| 829 | /* EventAck Request message */ | ||
| 830 | typedef struct _MPI2_EVENT_ACK_REQUEST | ||
| 831 | { | ||
| 832 | U16 Reserved1; /* 0x00 */ | ||
| 833 | U8 ChainOffset; /* 0x02 */ | ||
| 834 | U8 Function; /* 0x03 */ | ||
| 835 | U16 Reserved2; /* 0x04 */ | ||
| 836 | U8 Reserved3; /* 0x06 */ | ||
| 837 | U8 MsgFlags; /* 0x07 */ | ||
| 838 | U8 VP_ID; /* 0x08 */ | ||
| 839 | U8 VF_ID; /* 0x09 */ | ||
| 840 | U16 Reserved4; /* 0x0A */ | ||
| 841 | U16 Event; /* 0x0C */ | ||
| 842 | U16 Reserved5; /* 0x0E */ | ||
| 843 | U32 EventContext; /* 0x10 */ | ||
| 844 | } MPI2_EVENT_ACK_REQUEST, MPI2_POINTER PTR_MPI2_EVENT_ACK_REQUEST, | ||
| 845 | Mpi2EventAckRequest_t, MPI2_POINTER pMpi2EventAckRequest_t; | ||
| 846 | |||
| 847 | |||
| 848 | /* EventAck Reply message */ | ||
| 849 | typedef struct _MPI2_EVENT_ACK_REPLY | ||
| 850 | { | ||
| 851 | U16 Reserved1; /* 0x00 */ | ||
| 852 | U8 MsgLength; /* 0x02 */ | ||
| 853 | U8 Function; /* 0x03 */ | ||
| 854 | U16 Reserved2; /* 0x04 */ | ||
| 855 | U8 Reserved3; /* 0x06 */ | ||
| 856 | U8 MsgFlags; /* 0x07 */ | ||
| 857 | U8 VP_ID; /* 0x08 */ | ||
| 858 | U8 VF_ID; /* 0x09 */ | ||
| 859 | U16 Reserved4; /* 0x0A */ | ||
| 860 | U16 Reserved5; /* 0x0C */ | ||
| 861 | U16 IOCStatus; /* 0x0E */ | ||
| 862 | U32 IOCLogInfo; /* 0x10 */ | ||
| 863 | } MPI2_EVENT_ACK_REPLY, MPI2_POINTER PTR_MPI2_EVENT_ACK_REPLY, | ||
| 864 | Mpi2EventAckReply_t, MPI2_POINTER pMpi2EventAckReply_t; | ||
| 865 | |||
| 866 | |||
| 867 | /**************************************************************************** | ||
| 868 | * FWDownload message | ||
| 869 | ****************************************************************************/ | ||
| 870 | |||
| 871 | /* FWDownload Request message */ | ||
| 872 | typedef struct _MPI2_FW_DOWNLOAD_REQUEST | ||
| 873 | { | ||
| 874 | U8 ImageType; /* 0x00 */ | ||
| 875 | U8 Reserved1; /* 0x01 */ | ||
| 876 | U8 ChainOffset; /* 0x02 */ | ||
| 877 | U8 Function; /* 0x03 */ | ||
| 878 | U16 Reserved2; /* 0x04 */ | ||
| 879 | U8 Reserved3; /* 0x06 */ | ||
| 880 | U8 MsgFlags; /* 0x07 */ | ||
| 881 | U8 VP_ID; /* 0x08 */ | ||
| 882 | U8 VF_ID; /* 0x09 */ | ||
| 883 | U16 Reserved4; /* 0x0A */ | ||
| 884 | U32 TotalImageSize; /* 0x0C */ | ||
| 885 | U32 Reserved5; /* 0x10 */ | ||
| 886 | MPI2_MPI_SGE_UNION SGL; /* 0x14 */ | ||
| 887 | } MPI2_FW_DOWNLOAD_REQUEST, MPI2_POINTER PTR_MPI2_FW_DOWNLOAD_REQUEST, | ||
| 888 | Mpi2FWDownloadRequest, MPI2_POINTER pMpi2FWDownloadRequest; | ||
| 889 | |||
| 890 | #define MPI2_FW_DOWNLOAD_MSGFLGS_LAST_SEGMENT (0x01) | ||
| 891 | |||
| 892 | #define MPI2_FW_DOWNLOAD_ITYPE_FW (0x01) | ||
| 893 | #define MPI2_FW_DOWNLOAD_ITYPE_BIOS (0x02) | ||
| 894 | #define MPI2_FW_DOWNLOAD_ITYPE_MANUFACTURING (0x06) | ||
| 895 | #define MPI2_FW_DOWNLOAD_ITYPE_CONFIG_1 (0x07) | ||
| 896 | #define MPI2_FW_DOWNLOAD_ITYPE_CONFIG_2 (0x08) | ||
| 897 | #define MPI2_FW_DOWNLOAD_ITYPE_MEGARAID (0x09) | ||
| 898 | #define MPI2_FW_DOWNLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B) | ||
| 899 | |||
| 900 | /* FWDownload TransactionContext Element */ | ||
| 901 | typedef struct _MPI2_FW_DOWNLOAD_TCSGE | ||
| 902 | { | ||
| 903 | U8 Reserved1; /* 0x00 */ | ||
| 904 | U8 ContextSize; /* 0x01 */ | ||
| 905 | U8 DetailsLength; /* 0x02 */ | ||
| 906 | U8 Flags; /* 0x03 */ | ||
| 907 | U32 Reserved2; /* 0x04 */ | ||
| 908 | U32 ImageOffset; /* 0x08 */ | ||
| 909 | U32 ImageSize; /* 0x0C */ | ||
| 910 | } MPI2_FW_DOWNLOAD_TCSGE, MPI2_POINTER PTR_MPI2_FW_DOWNLOAD_TCSGE, | ||
| 911 | Mpi2FWDownloadTCSGE_t, MPI2_POINTER pMpi2FWDownloadTCSGE_t; | ||
| 912 | |||
| 913 | /* FWDownload Reply message */ | ||
| 914 | typedef struct _MPI2_FW_DOWNLOAD_REPLY | ||
| 915 | { | ||
| 916 | U8 ImageType; /* 0x00 */ | ||
| 917 | U8 Reserved1; /* 0x01 */ | ||
| 918 | U8 MsgLength; /* 0x02 */ | ||
| 919 | U8 Function; /* 0x03 */ | ||
| 920 | U16 Reserved2; /* 0x04 */ | ||
| 921 | U8 Reserved3; /* 0x06 */ | ||
| 922 | U8 MsgFlags; /* 0x07 */ | ||
| 923 | U8 VP_ID; /* 0x08 */ | ||
| 924 | U8 VF_ID; /* 0x09 */ | ||
| 925 | U16 Reserved4; /* 0x0A */ | ||
| 926 | U16 Reserved5; /* 0x0C */ | ||
| 927 | U16 IOCStatus; /* 0x0E */ | ||
| 928 | U32 IOCLogInfo; /* 0x10 */ | ||
| 929 | } MPI2_FW_DOWNLOAD_REPLY, MPI2_POINTER PTR_MPI2_FW_DOWNLOAD_REPLY, | ||
| 930 | Mpi2FWDownloadReply_t, MPI2_POINTER pMpi2FWDownloadReply_t; | ||
| 931 | |||
| 932 | |||
| 933 | /**************************************************************************** | ||
| 934 | * FWUpload message | ||
| 935 | ****************************************************************************/ | ||
| 936 | |||
| 937 | /* FWUpload Request message */ | ||
| 938 | typedef struct _MPI2_FW_UPLOAD_REQUEST | ||
| 939 | { | ||
| 940 | U8 ImageType; /* 0x00 */ | ||
| 941 | U8 Reserved1; /* 0x01 */ | ||
| 942 | U8 ChainOffset; /* 0x02 */ | ||
| 943 | U8 Function; /* 0x03 */ | ||
| 944 | U16 Reserved2; /* 0x04 */ | ||
| 945 | U8 Reserved3; /* 0x06 */ | ||
| 946 | U8 MsgFlags; /* 0x07 */ | ||
| 947 | U8 VP_ID; /* 0x08 */ | ||
| 948 | U8 VF_ID; /* 0x09 */ | ||
| 949 | U16 Reserved4; /* 0x0A */ | ||
| 950 | U32 Reserved5; /* 0x0C */ | ||
| 951 | U32 Reserved6; /* 0x10 */ | ||
| 952 | MPI2_MPI_SGE_UNION SGL; /* 0x14 */ | ||
| 953 | } MPI2_FW_UPLOAD_REQUEST, MPI2_POINTER PTR_MPI2_FW_UPLOAD_REQUEST, | ||
| 954 | Mpi2FWUploadRequest_t, MPI2_POINTER pMpi2FWUploadRequest_t; | ||
| 955 | |||
| 956 | #define MPI2_FW_UPLOAD_ITYPE_FW_CURRENT (0x00) | ||
| 957 | #define MPI2_FW_UPLOAD_ITYPE_FW_FLASH (0x01) | ||
| 958 | #define MPI2_FW_UPLOAD_ITYPE_BIOS_FLASH (0x02) | ||
| 959 | #define MPI2_FW_UPLOAD_ITYPE_FW_BACKUP (0x05) | ||
| 960 | #define MPI2_FW_UPLOAD_ITYPE_MANUFACTURING (0x06) | ||
| 961 | #define MPI2_FW_UPLOAD_ITYPE_CONFIG_1 (0x07) | ||
| 962 | #define MPI2_FW_UPLOAD_ITYPE_CONFIG_2 (0x08) | ||
| 963 | #define MPI2_FW_UPLOAD_ITYPE_MEGARAID (0x09) | ||
| 964 | #define MPI2_FW_UPLOAD_ITYPE_COMPLETE (0x0A) | ||
| 965 | #define MPI2_FW_UPLOAD_ITYPE_COMMON_BOOT_BLOCK (0x0B) | ||
| 966 | |||
| 967 | typedef struct _MPI2_FW_UPLOAD_TCSGE | ||
| 968 | { | ||
| 969 | U8 Reserved1; /* 0x00 */ | ||
| 970 | U8 ContextSize; /* 0x01 */ | ||
| 971 | U8 DetailsLength; /* 0x02 */ | ||
| 972 | U8 Flags; /* 0x03 */ | ||
| 973 | U32 Reserved2; /* 0x04 */ | ||
| 974 | U32 ImageOffset; /* 0x08 */ | ||
| 975 | U32 ImageSize; /* 0x0C */ | ||
| 976 | } MPI2_FW_UPLOAD_TCSGE, MPI2_POINTER PTR_MPI2_FW_UPLOAD_TCSGE, | ||
| 977 | Mpi2FWUploadTCSGE_t, MPI2_POINTER pMpi2FWUploadTCSGE_t; | ||
| 978 | |||
| 979 | /* FWUpload Reply message */ | ||
| 980 | typedef struct _MPI2_FW_UPLOAD_REPLY | ||
| 981 | { | ||
| 982 | U8 ImageType; /* 0x00 */ | ||
| 983 | U8 Reserved1; /* 0x01 */ | ||
| 984 | U8 MsgLength; /* 0x02 */ | ||
| 985 | U8 Function; /* 0x03 */ | ||
| 986 | U16 Reserved2; /* 0x04 */ | ||
| 987 | U8 Reserved3; /* 0x06 */ | ||
| 988 | U8 MsgFlags; /* 0x07 */ | ||
| 989 | U8 VP_ID; /* 0x08 */ | ||
| 990 | U8 VF_ID; /* 0x09 */ | ||
| 991 | U16 Reserved4; /* 0x0A */ | ||
| 992 | U16 Reserved5; /* 0x0C */ | ||
| 993 | U16 IOCStatus; /* 0x0E */ | ||
| 994 | U32 IOCLogInfo; /* 0x10 */ | ||
| 995 | U32 ActualImageSize; /* 0x14 */ | ||
| 996 | } MPI2_FW_UPLOAD_REPLY, MPI2_POINTER PTR_MPI2_FW_UPLOAD_REPLY, | ||
| 997 | Mpi2FWUploadReply_t, MPI2_POINTER pMPi2FWUploadReply_t; | ||
| 998 | |||
| 999 | |||
| 1000 | /* FW Image Header */ | ||
| 1001 | typedef struct _MPI2_FW_IMAGE_HEADER | ||
| 1002 | { | ||
| 1003 | U32 Signature; /* 0x00 */ | ||
| 1004 | U32 Signature0; /* 0x04 */ | ||
| 1005 | U32 Signature1; /* 0x08 */ | ||
| 1006 | U32 Signature2; /* 0x0C */ | ||
| 1007 | MPI2_VERSION_UNION MPIVersion; /* 0x10 */ | ||
| 1008 | MPI2_VERSION_UNION FWVersion; /* 0x14 */ | ||
| 1009 | MPI2_VERSION_UNION NVDATAVersion; /* 0x18 */ | ||
| 1010 | MPI2_VERSION_UNION PackageVersion; /* 0x1C */ | ||
| 1011 | U16 VendorID; /* 0x20 */ | ||
| 1012 | U16 ProductID; /* 0x22 */ | ||
| 1013 | U16 ProtocolFlags; /* 0x24 */ | ||
| 1014 | U16 Reserved26; /* 0x26 */ | ||
| 1015 | U32 IOCCapabilities; /* 0x28 */ | ||
| 1016 | U32 ImageSize; /* 0x2C */ | ||
| 1017 | U32 NextImageHeaderOffset; /* 0x30 */ | ||
| 1018 | U32 Checksum; /* 0x34 */ | ||
| 1019 | U32 Reserved38; /* 0x38 */ | ||
| 1020 | U32 Reserved3C; /* 0x3C */ | ||
| 1021 | U32 Reserved40; /* 0x40 */ | ||
| 1022 | U32 Reserved44; /* 0x44 */ | ||
| 1023 | U32 Reserved48; /* 0x48 */ | ||
| 1024 | U32 Reserved4C; /* 0x4C */ | ||
| 1025 | U32 Reserved50; /* 0x50 */ | ||
| 1026 | U32 Reserved54; /* 0x54 */ | ||
| 1027 | U32 Reserved58; /* 0x58 */ | ||
| 1028 | U32 Reserved5C; /* 0x5C */ | ||
| 1029 | U32 Reserved60; /* 0x60 */ | ||
| 1030 | U32 FirmwareVersionNameWhat; /* 0x64 */ | ||
| 1031 | U8 FirmwareVersionName[32]; /* 0x68 */ | ||
| 1032 | U32 VendorNameWhat; /* 0x88 */ | ||
| 1033 | U8 VendorName[32]; /* 0x8C */ | ||
| 1034 | U32 PackageNameWhat; /* 0x88 */ | ||
| 1035 | U8 PackageName[32]; /* 0x8C */ | ||
| 1036 | U32 ReservedD0; /* 0xD0 */ | ||
| 1037 | U32 ReservedD4; /* 0xD4 */ | ||
| 1038 | U32 ReservedD8; /* 0xD8 */ | ||
| 1039 | U32 ReservedDC; /* 0xDC */ | ||
| 1040 | U32 ReservedE0; /* 0xE0 */ | ||
| 1041 | U32 ReservedE4; /* 0xE4 */ | ||
| 1042 | U32 ReservedE8; /* 0xE8 */ | ||
| 1043 | U32 ReservedEC; /* 0xEC */ | ||
| 1044 | U32 ReservedF0; /* 0xF0 */ | ||
| 1045 | U32 ReservedF4; /* 0xF4 */ | ||
| 1046 | U32 ReservedF8; /* 0xF8 */ | ||
| 1047 | U32 ReservedFC; /* 0xFC */ | ||
| 1048 | } MPI2_FW_IMAGE_HEADER, MPI2_POINTER PTR_MPI2_FW_IMAGE_HEADER, | ||
| 1049 | Mpi2FWImageHeader_t, MPI2_POINTER pMpi2FWImageHeader_t; | ||
| 1050 | |||
| 1051 | /* Signature field */ | ||
| 1052 | #define MPI2_FW_HEADER_SIGNATURE_OFFSET (0x00) | ||
| 1053 | #define MPI2_FW_HEADER_SIGNATURE_MASK (0xFF000000) | ||
| 1054 | #define MPI2_FW_HEADER_SIGNATURE (0xEA000000) | ||
| 1055 | |||
| 1056 | /* Signature0 field */ | ||
| 1057 | #define MPI2_FW_HEADER_SIGNATURE0_OFFSET (0x04) | ||
| 1058 | #define MPI2_FW_HEADER_SIGNATURE0 (0x5AFAA55A) | ||
| 1059 | |||
| 1060 | /* Signature1 field */ | ||
| 1061 | #define MPI2_FW_HEADER_SIGNATURE1_OFFSET (0x08) | ||
| 1062 | #define MPI2_FW_HEADER_SIGNATURE1 (0xA55AFAA5) | ||
| 1063 | |||
| 1064 | /* Signature2 field */ | ||
| 1065 | #define MPI2_FW_HEADER_SIGNATURE2_OFFSET (0x0C) | ||
| 1066 | #define MPI2_FW_HEADER_SIGNATURE2 (0x5AA55AFA) | ||
| 1067 | |||
| 1068 | |||
| 1069 | /* defines for using the ProductID field */ | ||
| 1070 | #define MPI2_FW_HEADER_PID_TYPE_MASK (0xF000) | ||
| 1071 | #define MPI2_FW_HEADER_PID_TYPE_SAS (0x2000) | ||
| 1072 | |||
| 1073 | #define MPI2_FW_HEADER_PID_PROD_MASK (0x0F00) | ||
| 1074 | #define MPI2_FW_HEADER_PID_PROD_A (0x0000) | ||
| 1075 | |||
| 1076 | #define MPI2_FW_HEADER_PID_FAMILY_MASK (0x00FF) | ||
| 1077 | /* SAS */ | ||
| 1078 | #define MPI2_FW_HEADER_PID_FAMILY_2108_SAS (0x0010) | ||
| 1079 | |||
| 1080 | /* use MPI2_IOCFACTS_PROTOCOL_ defines for ProtocolFlags field */ | ||
| 1081 | |||
| 1082 | /* use MPI2_IOCFACTS_CAPABILITY_ defines for IOCCapabilities field */ | ||
| 1083 | |||
| 1084 | |||
| 1085 | #define MPI2_FW_HEADER_IMAGESIZE_OFFSET (0x2C) | ||
| 1086 | #define MPI2_FW_HEADER_NEXTIMAGE_OFFSET (0x30) | ||
| 1087 | #define MPI2_FW_HEADER_VERNMHWAT_OFFSET (0x64) | ||
| 1088 | |||
| 1089 | #define MPI2_FW_HEADER_WHAT_SIGNATURE (0x29232840) | ||
| 1090 | |||
| 1091 | #define MPI2_FW_HEADER_SIZE (0x100) | ||
| 1092 | |||
| 1093 | |||
| 1094 | /* Extended Image Header */ | ||
| 1095 | typedef struct _MPI2_EXT_IMAGE_HEADER | ||
| 1096 | |||
| 1097 | { | ||
| 1098 | U8 ImageType; /* 0x00 */ | ||
| 1099 | U8 Reserved1; /* 0x01 */ | ||
| 1100 | U16 Reserved2; /* 0x02 */ | ||
| 1101 | U32 Checksum; /* 0x04 */ | ||
| 1102 | U32 ImageSize; /* 0x08 */ | ||
| 1103 | U32 NextImageHeaderOffset; /* 0x0C */ | ||
| 1104 | U32 PackageVersion; /* 0x10 */ | ||
| 1105 | U32 Reserved3; /* 0x14 */ | ||
| 1106 | U32 Reserved4; /* 0x18 */ | ||
| 1107 | U32 Reserved5; /* 0x1C */ | ||
| 1108 | U8 IdentifyString[32]; /* 0x20 */ | ||
| 1109 | } MPI2_EXT_IMAGE_HEADER, MPI2_POINTER PTR_MPI2_EXT_IMAGE_HEADER, | ||
| 1110 | Mpi2ExtImageHeader_t, MPI2_POINTER pMpi2ExtImageHeader_t; | ||
| 1111 | |||
| 1112 | /* useful offsets */ | ||
| 1113 | #define MPI2_EXT_IMAGE_IMAGETYPE_OFFSET (0x00) | ||
| 1114 | #define MPI2_EXT_IMAGE_IMAGESIZE_OFFSET (0x08) | ||
| 1115 | #define MPI2_EXT_IMAGE_NEXTIMAGE_OFFSET (0x0C) | ||
| 1116 | |||
| 1117 | #define MPI2_EXT_IMAGE_HEADER_SIZE (0x40) | ||
| 1118 | |||
| 1119 | /* defines for the ImageType field */ | ||
| 1120 | #define MPI2_EXT_IMAGE_TYPE_UNSPECIFIED (0x00) | ||
| 1121 | #define MPI2_EXT_IMAGE_TYPE_FW (0x01) | ||
| 1122 | #define MPI2_EXT_IMAGE_TYPE_NVDATA (0x03) | ||
| 1123 | #define MPI2_EXT_IMAGE_TYPE_BOOTLOADER (0x04) | ||
| 1124 | #define MPI2_EXT_IMAGE_TYPE_INITIALIZATION (0x05) | ||
| 1125 | #define MPI2_EXT_IMAGE_TYPE_FLASH_LAYOUT (0x06) | ||
| 1126 | #define MPI2_EXT_IMAGE_TYPE_SUPPORTED_DEVICES (0x07) | ||
| 1127 | #define MPI2_EXT_IMAGE_TYPE_MEGARAID (0x08) | ||
| 1128 | |||
| 1129 | #define MPI2_EXT_IMAGE_TYPE_MAX (MPI2_EXT_IMAGE_TYPE_MEGARAID) | ||
| 1130 | |||
| 1131 | |||
| 1132 | |||
| 1133 | /* FLASH Layout Extended Image Data */ | ||
| 1134 | |||
| 1135 | /* | ||
| 1136 | * Host code (drivers, BIOS, utilities, etc.) should leave this define set to | ||
| 1137 | * one and check RegionsPerLayout at runtime. | ||
| 1138 | */ | ||
| 1139 | #ifndef MPI2_FLASH_NUMBER_OF_REGIONS | ||
| 1140 | #define MPI2_FLASH_NUMBER_OF_REGIONS (1) | ||
| 1141 | #endif | ||
| 1142 | |||
| 1143 | /* | ||
| 1144 | * Host code (drivers, BIOS, utilities, etc.) should leave this define set to | ||
| 1145 | * one and check NumberOfLayouts at runtime. | ||
| 1146 | */ | ||
| 1147 | #ifndef MPI2_FLASH_NUMBER_OF_LAYOUTS | ||
| 1148 | #define MPI2_FLASH_NUMBER_OF_LAYOUTS (1) | ||
| 1149 | #endif | ||
| 1150 | |||
| 1151 | typedef struct _MPI2_FLASH_REGION | ||
| 1152 | { | ||
| 1153 | U8 RegionType; /* 0x00 */ | ||
| 1154 | U8 Reserved1; /* 0x01 */ | ||
| 1155 | U16 Reserved2; /* 0x02 */ | ||
| 1156 | U32 RegionOffset; /* 0x04 */ | ||
| 1157 | U32 RegionSize; /* 0x08 */ | ||
| 1158 | U32 Reserved3; /* 0x0C */ | ||
| 1159 | } MPI2_FLASH_REGION, MPI2_POINTER PTR_MPI2_FLASH_REGION, | ||
| 1160 | Mpi2FlashRegion_t, MPI2_POINTER pMpi2FlashRegion_t; | ||
| 1161 | |||
| 1162 | typedef struct _MPI2_FLASH_LAYOUT | ||
| 1163 | { | ||
| 1164 | U32 FlashSize; /* 0x00 */ | ||
| 1165 | U32 Reserved1; /* 0x04 */ | ||
| 1166 | U32 Reserved2; /* 0x08 */ | ||
| 1167 | U32 Reserved3; /* 0x0C */ | ||
| 1168 | MPI2_FLASH_REGION Region[MPI2_FLASH_NUMBER_OF_REGIONS];/* 0x10 */ | ||
| 1169 | } MPI2_FLASH_LAYOUT, MPI2_POINTER PTR_MPI2_FLASH_LAYOUT, | ||
| 1170 | Mpi2FlashLayout_t, MPI2_POINTER pMpi2FlashLayout_t; | ||
| 1171 | |||
| 1172 | typedef struct _MPI2_FLASH_LAYOUT_DATA | ||
| 1173 | { | ||
| 1174 | U8 ImageRevision; /* 0x00 */ | ||
| 1175 | U8 Reserved1; /* 0x01 */ | ||
| 1176 | U8 SizeOfRegion; /* 0x02 */ | ||
| 1177 | U8 Reserved2; /* 0x03 */ | ||
| 1178 | U16 NumberOfLayouts; /* 0x04 */ | ||
| 1179 | U16 RegionsPerLayout; /* 0x06 */ | ||
| 1180 | U16 MinimumSectorAlignment; /* 0x08 */ | ||
| 1181 | U16 Reserved3; /* 0x0A */ | ||
| 1182 | U32 Reserved4; /* 0x0C */ | ||
| 1183 | MPI2_FLASH_LAYOUT Layout[MPI2_FLASH_NUMBER_OF_LAYOUTS];/* 0x10 */ | ||
| 1184 | } MPI2_FLASH_LAYOUT_DATA, MPI2_POINTER PTR_MPI2_FLASH_LAYOUT_DATA, | ||
| 1185 | Mpi2FlashLayoutData_t, MPI2_POINTER pMpi2FlashLayoutData_t; | ||
| 1186 | |||
| 1187 | /* defines for the RegionType field */ | ||
| 1188 | #define MPI2_FLASH_REGION_UNUSED (0x00) | ||
| 1189 | #define MPI2_FLASH_REGION_FIRMWARE (0x01) | ||
| 1190 | #define MPI2_FLASH_REGION_BIOS (0x02) | ||
| 1191 | #define MPI2_FLASH_REGION_NVDATA (0x03) | ||
| 1192 | #define MPI2_FLASH_REGION_FIRMWARE_BACKUP (0x05) | ||
| 1193 | #define MPI2_FLASH_REGION_MFG_INFORMATION (0x06) | ||
| 1194 | #define MPI2_FLASH_REGION_CONFIG_1 (0x07) | ||
| 1195 | #define MPI2_FLASH_REGION_CONFIG_2 (0x08) | ||
| 1196 | #define MPI2_FLASH_REGION_MEGARAID (0x09) | ||
| 1197 | #define MPI2_FLASH_REGION_INIT (0x0A) | ||
| 1198 | |||
| 1199 | /* ImageRevision */ | ||
| 1200 | #define MPI2_FLASH_LAYOUT_IMAGE_REVISION (0x00) | ||
| 1201 | |||
| 1202 | |||
| 1203 | |||
| 1204 | /* Supported Devices Extended Image Data */ | ||
| 1205 | |||
| 1206 | /* | ||
| 1207 | * Host code (drivers, BIOS, utilities, etc.) should leave this define set to | ||
| 1208 | * one and check NumberOfDevices at runtime. | ||
| 1209 | */ | ||
| 1210 | #ifndef MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES | ||
| 1211 | #define MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES (1) | ||
| 1212 | #endif | ||
| 1213 | |||
| 1214 | typedef struct _MPI2_SUPPORTED_DEVICE | ||
| 1215 | { | ||
| 1216 | U16 DeviceID; /* 0x00 */ | ||
| 1217 | U16 VendorID; /* 0x02 */ | ||
| 1218 | U16 DeviceIDMask; /* 0x04 */ | ||
| 1219 | U16 Reserved1; /* 0x06 */ | ||
| 1220 | U8 LowPCIRev; /* 0x08 */ | ||
| 1221 | U8 HighPCIRev; /* 0x09 */ | ||
| 1222 | U16 Reserved2; /* 0x0A */ | ||
| 1223 | U32 Reserved3; /* 0x0C */ | ||
| 1224 | } MPI2_SUPPORTED_DEVICE, MPI2_POINTER PTR_MPI2_SUPPORTED_DEVICE, | ||
| 1225 | Mpi2SupportedDevice_t, MPI2_POINTER pMpi2SupportedDevice_t; | ||
| 1226 | |||
| 1227 | typedef struct _MPI2_SUPPORTED_DEVICES_DATA | ||
| 1228 | { | ||
| 1229 | U8 ImageRevision; /* 0x00 */ | ||
| 1230 | U8 Reserved1; /* 0x01 */ | ||
| 1231 | U8 NumberOfDevices; /* 0x02 */ | ||
| 1232 | U8 Reserved2; /* 0x03 */ | ||
| 1233 | U32 Reserved3; /* 0x04 */ | ||
| 1234 | MPI2_SUPPORTED_DEVICE SupportedDevice[MPI2_SUPPORTED_DEVICES_IMAGE_NUM_DEVICES]; /* 0x08 */ | ||
| 1235 | } MPI2_SUPPORTED_DEVICES_DATA, MPI2_POINTER PTR_MPI2_SUPPORTED_DEVICES_DATA, | ||
| 1236 | Mpi2SupportedDevicesData_t, MPI2_POINTER pMpi2SupportedDevicesData_t; | ||
| 1237 | |||
| 1238 | /* ImageRevision */ | ||
| 1239 | #define MPI2_SUPPORTED_DEVICES_IMAGE_REVISION (0x00) | ||
| 1240 | |||
| 1241 | |||
| 1242 | /* Init Extended Image Data */ | ||
| 1243 | |||
| 1244 | typedef struct _MPI2_INIT_IMAGE_FOOTER | ||
| 1245 | |||
| 1246 | { | ||
| 1247 | U32 BootFlags; /* 0x00 */ | ||
| 1248 | U32 ImageSize; /* 0x04 */ | ||
| 1249 | U32 Signature0; /* 0x08 */ | ||
| 1250 | U32 Signature1; /* 0x0C */ | ||
| 1251 | U32 Signature2; /* 0x10 */ | ||
| 1252 | U32 ResetVector; /* 0x14 */ | ||
| 1253 | } MPI2_INIT_IMAGE_FOOTER, MPI2_POINTER PTR_MPI2_INIT_IMAGE_FOOTER, | ||
| 1254 | Mpi2InitImageFooter_t, MPI2_POINTER pMpi2InitImageFooter_t; | ||
| 1255 | |||
| 1256 | /* defines for the BootFlags field */ | ||
| 1257 | #define MPI2_INIT_IMAGE_BOOTFLAGS_OFFSET (0x00) | ||
| 1258 | |||
| 1259 | /* defines for the ImageSize field */ | ||
| 1260 | #define MPI2_INIT_IMAGE_IMAGESIZE_OFFSET (0x04) | ||
| 1261 | |||
| 1262 | /* defines for the Signature0 field */ | ||
| 1263 | #define MPI2_INIT_IMAGE_SIGNATURE0_OFFSET (0x08) | ||
| 1264 | #define MPI2_INIT_IMAGE_SIGNATURE0 (0x5AA55AEA) | ||
| 1265 | |||
| 1266 | /* defines for the Signature1 field */ | ||
| 1267 | #define MPI2_INIT_IMAGE_SIGNATURE1_OFFSET (0x0C) | ||
| 1268 | #define MPI2_INIT_IMAGE_SIGNATURE1 (0xA55AEAA5) | ||
| 1269 | |||
| 1270 | /* defines for the Signature2 field */ | ||
| 1271 | #define MPI2_INIT_IMAGE_SIGNATURE2_OFFSET (0x10) | ||
| 1272 | #define MPI2_INIT_IMAGE_SIGNATURE2 (0x5AEAA55A) | ||
| 1273 | |||
| 1274 | /* Signature fields as individual bytes */ | ||
| 1275 | #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_0 (0xEA) | ||
| 1276 | #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_1 (0x5A) | ||
| 1277 | #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_2 (0xA5) | ||
| 1278 | #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_3 (0x5A) | ||
| 1279 | |||
| 1280 | #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_4 (0xA5) | ||
| 1281 | #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_5 (0xEA) | ||
| 1282 | #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_6 (0x5A) | ||
| 1283 | #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_7 (0xA5) | ||
| 1284 | |||
| 1285 | #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_8 (0x5A) | ||
| 1286 | #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_9 (0xA5) | ||
| 1287 | #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_A (0xEA) | ||
| 1288 | #define MPI2_INIT_IMAGE_SIGNATURE_BYTE_B (0x5A) | ||
| 1289 | |||
| 1290 | /* defines for the ResetVector field */ | ||
| 1291 | #define MPI2_INIT_IMAGE_RESETVECTOR_OFFSET (0x14) | ||
| 1292 | |||
| 1293 | |||
| 1294 | #endif | ||
| 1295 | |||
diff --git a/drivers/scsi/mpt2sas/mpi/mpi2_raid.h b/drivers/scsi/mpt2sas/mpi/mpi2_raid.h new file mode 100644 index 000000000000..7134816d9046 --- /dev/null +++ b/drivers/scsi/mpt2sas/mpi/mpi2_raid.h | |||
| @@ -0,0 +1,295 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (c) 2000-2008 LSI Corporation. | ||
| 3 | * | ||
| 4 | * | ||
| 5 | * Name: mpi2_raid.h | ||
| 6 | * Title: MPI Integrated RAID messages and structures | ||
| 7 | * Creation Date: April 26, 2007 | ||
| 8 | * | ||
| 9 | * mpi2_raid.h Version: 02.00.03 | ||
| 10 | * | ||
| 11 | * Version History | ||
| 12 | * --------------- | ||
| 13 | * | ||
| 14 | * Date Version Description | ||
| 15 | * -------- -------- ------------------------------------------------------ | ||
| 16 | * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. | ||
| 17 | * 08-31-07 02.00.01 Modifications to RAID Action request and reply, | ||
| 18 | * including the Actions and ActionData. | ||
| 19 | * 02-29-08 02.00.02 Added MPI2_RAID_ACTION_ADATA_DISABL_FULL_REBUILD. | ||
| 20 | * 05-21-08 02.00.03 Added MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS so that | ||
| 21 | * the PhysDisk array in MPI2_RAID_VOLUME_CREATION_STRUCT | ||
| 22 | * can be sized by the build environment. | ||
| 23 | * -------------------------------------------------------------------------- | ||
| 24 | */ | ||
| 25 | |||
| 26 | #ifndef MPI2_RAID_H | ||
| 27 | #define MPI2_RAID_H | ||
| 28 | |||
| 29 | /***************************************************************************** | ||
| 30 | * | ||
| 31 | * Integrated RAID Messages | ||
| 32 | * | ||
| 33 | *****************************************************************************/ | ||
| 34 | |||
| 35 | /**************************************************************************** | ||
| 36 | * RAID Action messages | ||
| 37 | ****************************************************************************/ | ||
| 38 | |||
| 39 | /* ActionDataWord defines for use with MPI2_RAID_ACTION_DELETE_VOLUME action */ | ||
| 40 | #define MPI2_RAID_ACTION_ADATA_KEEP_LBA0 (0x00000000) | ||
| 41 | #define MPI2_RAID_ACTION_ADATA_ZERO_LBA0 (0x00000001) | ||
| 42 | |||
| 43 | /* use MPI2_RAIDVOL0_SETTING_ defines from mpi2_cnfg.h for MPI2_RAID_ACTION_CHANGE_VOL_WRITE_CACHE action */ | ||
| 44 | |||
| 45 | /* ActionDataWord defines for use with MPI2_RAID_ACTION_DISABLE_ALL_VOLUMES action */ | ||
| 46 | #define MPI2_RAID_ACTION_ADATA_DISABL_FULL_REBUILD (0x00000001) | ||
| 47 | |||
| 48 | /* ActionDataWord for MPI2_RAID_ACTION_SET_RAID_FUNCTION_RATE Action */ | ||
| 49 | typedef struct _MPI2_RAID_ACTION_RATE_DATA | ||
| 50 | { | ||
| 51 | U8 RateToChange; /* 0x00 */ | ||
| 52 | U8 RateOrMode; /* 0x01 */ | ||
| 53 | U16 DataScrubDuration; /* 0x02 */ | ||
| 54 | } MPI2_RAID_ACTION_RATE_DATA, MPI2_POINTER PTR_MPI2_RAID_ACTION_RATE_DATA, | ||
| 55 | Mpi2RaidActionRateData_t, MPI2_POINTER pMpi2RaidActionRateData_t; | ||
| 56 | |||
| 57 | #define MPI2_RAID_ACTION_SET_RATE_RESYNC (0x00) | ||
| 58 | #define MPI2_RAID_ACTION_SET_RATE_DATA_SCRUB (0x01) | ||
| 59 | #define MPI2_RAID_ACTION_SET_RATE_POWERSAVE_MODE (0x02) | ||
| 60 | |||
| 61 | /* ActionDataWord for MPI2_RAID_ACTION_START_RAID_FUNCTION Action */ | ||
| 62 | typedef struct _MPI2_RAID_ACTION_START_RAID_FUNCTION | ||
| 63 | { | ||
| 64 | U8 RAIDFunction; /* 0x00 */ | ||
| 65 | U8 Flags; /* 0x01 */ | ||
| 66 | U16 Reserved1; /* 0x02 */ | ||
| 67 | } MPI2_RAID_ACTION_START_RAID_FUNCTION, | ||
| 68 | MPI2_POINTER PTR_MPI2_RAID_ACTION_START_RAID_FUNCTION, | ||
| 69 | Mpi2RaidActionStartRaidFunction_t, | ||
| 70 | MPI2_POINTER pMpi2RaidActionStartRaidFunction_t; | ||
| 71 | |||
| 72 | /* defines for the RAIDFunction field */ | ||
| 73 | #define MPI2_RAID_ACTION_START_BACKGROUND_INIT (0x00) | ||
| 74 | #define MPI2_RAID_ACTION_START_ONLINE_CAP_EXPANSION (0x01) | ||
| 75 | #define MPI2_RAID_ACTION_START_CONSISTENCY_CHECK (0x02) | ||
| 76 | |||
| 77 | /* defines for the Flags field */ | ||
| 78 | #define MPI2_RAID_ACTION_START_NEW (0x00) | ||
| 79 | #define MPI2_RAID_ACTION_START_RESUME (0x01) | ||
| 80 | |||
| 81 | /* ActionDataWord for MPI2_RAID_ACTION_STOP_RAID_FUNCTION Action */ | ||
| 82 | typedef struct _MPI2_RAID_ACTION_STOP_RAID_FUNCTION | ||
| 83 | { | ||
| 84 | U8 RAIDFunction; /* 0x00 */ | ||
| 85 | U8 Flags; /* 0x01 */ | ||
| 86 | U16 Reserved1; /* 0x02 */ | ||
| 87 | } MPI2_RAID_ACTION_STOP_RAID_FUNCTION, | ||
| 88 | MPI2_POINTER PTR_MPI2_RAID_ACTION_STOP_RAID_FUNCTION, | ||
| 89 | Mpi2RaidActionStopRaidFunction_t, | ||
| 90 | MPI2_POINTER pMpi2RaidActionStopRaidFunction_t; | ||
| 91 | |||
| 92 | /* defines for the RAIDFunction field */ | ||
| 93 | #define MPI2_RAID_ACTION_STOP_BACKGROUND_INIT (0x00) | ||
| 94 | #define MPI2_RAID_ACTION_STOP_ONLINE_CAP_EXPANSION (0x01) | ||
| 95 | #define MPI2_RAID_ACTION_STOP_CONSISTENCY_CHECK (0x02) | ||
| 96 | |||
| 97 | /* defines for the Flags field */ | ||
| 98 | #define MPI2_RAID_ACTION_STOP_ABORT (0x00) | ||
| 99 | #define MPI2_RAID_ACTION_STOP_PAUSE (0x01) | ||
| 100 | |||
| 101 | /* ActionDataWord for MPI2_RAID_ACTION_CREATE_HOT_SPARE Action */ | ||
| 102 | typedef struct _MPI2_RAID_ACTION_HOT_SPARE | ||
| 103 | { | ||
| 104 | U8 HotSparePool; /* 0x00 */ | ||
| 105 | U8 Reserved1; /* 0x01 */ | ||
| 106 | U16 DevHandle; /* 0x02 */ | ||
| 107 | } MPI2_RAID_ACTION_HOT_SPARE, MPI2_POINTER PTR_MPI2_RAID_ACTION_HOT_SPARE, | ||
| 108 | Mpi2RaidActionHotSpare_t, MPI2_POINTER pMpi2RaidActionHotSpare_t; | ||
| 109 | |||
| 110 | /* ActionDataWord for MPI2_RAID_ACTION_DEVICE_FW_UPDATE_MODE Action */ | ||
| 111 | typedef struct _MPI2_RAID_ACTION_FW_UPDATE_MODE | ||
| 112 | { | ||
| 113 | U8 Flags; /* 0x00 */ | ||
| 114 | U8 DeviceFirmwareUpdateModeTimeout; /* 0x01 */ | ||
| 115 | U16 Reserved1; /* 0x02 */ | ||
| 116 | } MPI2_RAID_ACTION_FW_UPDATE_MODE, | ||
| 117 | MPI2_POINTER PTR_MPI2_RAID_ACTION_FW_UPDATE_MODE, | ||
| 118 | Mpi2RaidActionFwUpdateMode_t, MPI2_POINTER pMpi2RaidActionFwUpdateMode_t; | ||
| 119 | |||
| 120 | /* ActionDataWord defines for use with MPI2_RAID_ACTION_DEVICE_FW_UPDATE_MODE action */ | ||
| 121 | #define MPI2_RAID_ACTION_ADATA_DISABLE_FW_UPDATE (0x00) | ||
| 122 | #define MPI2_RAID_ACTION_ADATA_ENABLE_FW_UPDATE (0x01) | ||
| 123 | |||
| 124 | typedef union _MPI2_RAID_ACTION_DATA | ||
| 125 | { | ||
| 126 | U32 Word; | ||
| 127 | MPI2_RAID_ACTION_RATE_DATA Rates; | ||
| 128 | MPI2_RAID_ACTION_START_RAID_FUNCTION StartRaidFunction; | ||
| 129 | MPI2_RAID_ACTION_STOP_RAID_FUNCTION StopRaidFunction; | ||
| 130 | MPI2_RAID_ACTION_HOT_SPARE HotSpare; | ||
| 131 | MPI2_RAID_ACTION_FW_UPDATE_MODE FwUpdateMode; | ||
| 132 | } MPI2_RAID_ACTION_DATA, MPI2_POINTER PTR_MPI2_RAID_ACTION_DATA, | ||
| 133 | Mpi2RaidActionData_t, MPI2_POINTER pMpi2RaidActionData_t; | ||
| 134 | |||
| 135 | |||
| 136 | /* RAID Action Request Message */ | ||
| 137 | typedef struct _MPI2_RAID_ACTION_REQUEST | ||
| 138 | { | ||
| 139 | U8 Action; /* 0x00 */ | ||
| 140 | U8 Reserved1; /* 0x01 */ | ||
| 141 | U8 ChainOffset; /* 0x02 */ | ||
| 142 | U8 Function; /* 0x03 */ | ||
| 143 | U16 VolDevHandle; /* 0x04 */ | ||
| 144 | U8 PhysDiskNum; /* 0x06 */ | ||
| 145 | U8 MsgFlags; /* 0x07 */ | ||
| 146 | U8 VP_ID; /* 0x08 */ | ||
| 147 | U8 VF_ID; /* 0x09 */ | ||
| 148 | U16 Reserved2; /* 0x0A */ | ||
| 149 | U32 Reserved3; /* 0x0C */ | ||
| 150 | MPI2_RAID_ACTION_DATA ActionDataWord; /* 0x10 */ | ||
| 151 | MPI2_SGE_SIMPLE_UNION ActionDataSGE; /* 0x14 */ | ||
| 152 | } MPI2_RAID_ACTION_REQUEST, MPI2_POINTER PTR_MPI2_RAID_ACTION_REQUEST, | ||
| 153 | Mpi2RaidActionRequest_t, MPI2_POINTER pMpi2RaidActionRequest_t; | ||
| 154 | |||
| 155 | /* RAID Action request Action values */ | ||
| 156 | |||
| 157 | #define MPI2_RAID_ACTION_INDICATOR_STRUCT (0x01) | ||
| 158 | #define MPI2_RAID_ACTION_CREATE_VOLUME (0x02) | ||
| 159 | #define MPI2_RAID_ACTION_DELETE_VOLUME (0x03) | ||
| 160 | #define MPI2_RAID_ACTION_DISABLE_ALL_VOLUMES (0x04) | ||
| 161 | #define MPI2_RAID_ACTION_ENABLE_ALL_VOLUMES (0x05) | ||
| 162 | #define MPI2_RAID_ACTION_PHYSDISK_OFFLINE (0x0A) | ||
| 163 | #define MPI2_RAID_ACTION_PHYSDISK_ONLINE (0x0B) | ||
| 164 | #define MPI2_RAID_ACTION_FAIL_PHYSDISK (0x0F) | ||
| 165 | #define MPI2_RAID_ACTION_ACTIVATE_VOLUME (0x11) | ||
| 166 | #define MPI2_RAID_ACTION_DEVICE_FW_UPDATE_MODE (0x15) | ||
| 167 | #define MPI2_RAID_ACTION_CHANGE_VOL_WRITE_CACHE (0x17) | ||
| 168 | #define MPI2_RAID_ACTION_SET_VOLUME_NAME (0x18) | ||
| 169 | #define MPI2_RAID_ACTION_SET_RAID_FUNCTION_RATE (0x19) | ||
| 170 | #define MPI2_RAID_ACTION_ENABLE_FAILED_VOLUME (0x1C) | ||
| 171 | #define MPI2_RAID_ACTION_CREATE_HOT_SPARE (0x1D) | ||
| 172 | #define MPI2_RAID_ACTION_DELETE_HOT_SPARE (0x1E) | ||
| 173 | #define MPI2_RAID_ACTION_SYSTEM_SHUTDOWN_INITIATED (0x20) | ||
| 174 | #define MPI2_RAID_ACTION_START_RAID_FUNCTION (0x21) | ||
| 175 | #define MPI2_RAID_ACTION_STOP_RAID_FUNCTION (0x22) | ||
| 176 | |||
| 177 | |||
| 178 | /* RAID Volume Creation Structure */ | ||
| 179 | |||
| 180 | /* | ||
| 181 | * The following define can be customized for the targeted product. | ||
| 182 | */ | ||
| 183 | #ifndef MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS | ||
| 184 | #define MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS (1) | ||
| 185 | #endif | ||
| 186 | |||
| 187 | typedef struct _MPI2_RAID_VOLUME_PHYSDISK | ||
| 188 | { | ||
| 189 | U8 RAIDSetNum; /* 0x00 */ | ||
| 190 | U8 PhysDiskMap; /* 0x01 */ | ||
| 191 | U16 PhysDiskDevHandle; /* 0x02 */ | ||
| 192 | } MPI2_RAID_VOLUME_PHYSDISK, MPI2_POINTER PTR_MPI2_RAID_VOLUME_PHYSDISK, | ||
| 193 | Mpi2RaidVolumePhysDisk_t, MPI2_POINTER pMpi2RaidVolumePhysDisk_t; | ||
| 194 | |||
| 195 | /* defines for the PhysDiskMap field */ | ||
| 196 | #define MPI2_RAIDACTION_PHYSDISK_PRIMARY (0x01) | ||
| 197 | #define MPI2_RAIDACTION_PHYSDISK_SECONDARY (0x02) | ||
| 198 | |||
| 199 | typedef struct _MPI2_RAID_VOLUME_CREATION_STRUCT | ||
| 200 | { | ||
| 201 | U8 NumPhysDisks; /* 0x00 */ | ||
| 202 | U8 VolumeType; /* 0x01 */ | ||
| 203 | U16 Reserved1; /* 0x02 */ | ||
| 204 | U32 VolumeCreationFlags; /* 0x04 */ | ||
| 205 | U32 VolumeSettings; /* 0x08 */ | ||
| 206 | U8 Reserved2; /* 0x0C */ | ||
| 207 | U8 ResyncRate; /* 0x0D */ | ||
| 208 | U16 DataScrubDuration; /* 0x0E */ | ||
| 209 | U64 VolumeMaxLBA; /* 0x10 */ | ||
| 210 | U32 StripeSize; /* 0x18 */ | ||
| 211 | U8 Name[16]; /* 0x1C */ | ||
| 212 | MPI2_RAID_VOLUME_PHYSDISK PhysDisk[MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS];/* 0x2C */ | ||
| 213 | } MPI2_RAID_VOLUME_CREATION_STRUCT, | ||
| 214 | MPI2_POINTER PTR_MPI2_RAID_VOLUME_CREATION_STRUCT, | ||
| 215 | Mpi2RaidVolumeCreationStruct_t, MPI2_POINTER pMpi2RaidVolumeCreationStruct_t; | ||
| 216 | |||
| 217 | /* use MPI2_RAID_VOL_TYPE_ defines from mpi2_cnfg.h for VolumeType */ | ||
| 218 | |||
| 219 | /* defines for the VolumeCreationFlags field */ | ||
| 220 | #define MPI2_RAID_VOL_CREATION_USE_DEFAULT_SETTINGS (0x80) | ||
| 221 | #define MPI2_RAID_VOL_CREATION_BACKGROUND_INIT (0x04) | ||
| 222 | #define MPI2_RAID_VOL_CREATION_LOW_LEVEL_INIT (0x02) | ||
| 223 | #define MPI2_RAID_VOL_CREATION_MIGRATE_DATA (0x01) | ||
| 224 | |||
| 225 | |||
| 226 | /* RAID Online Capacity Expansion Structure */ | ||
| 227 | |||
| 228 | typedef struct _MPI2_RAID_ONLINE_CAPACITY_EXPANSION | ||
| 229 | { | ||
| 230 | U32 Flags; /* 0x00 */ | ||
| 231 | U16 DevHandle0; /* 0x04 */ | ||
| 232 | U16 Reserved1; /* 0x06 */ | ||
| 233 | U16 DevHandle1; /* 0x08 */ | ||
| 234 | U16 Reserved2; /* 0x0A */ | ||
| 235 | } MPI2_RAID_ONLINE_CAPACITY_EXPANSION, | ||
| 236 | MPI2_POINTER PTR_MPI2_RAID_ONLINE_CAPACITY_EXPANSION, | ||
| 237 | Mpi2RaidOnlineCapacityExpansion_t, | ||
| 238 | MPI2_POINTER pMpi2RaidOnlineCapacityExpansion_t; | ||
| 239 | |||
| 240 | |||
| 241 | /* RAID Volume Indicator Structure */ | ||
| 242 | |||
| 243 | typedef struct _MPI2_RAID_VOL_INDICATOR | ||
| 244 | { | ||
| 245 | U64 TotalBlocks; /* 0x00 */ | ||
| 246 | U64 BlocksRemaining; /* 0x08 */ | ||
| 247 | U32 Flags; /* 0x10 */ | ||
| 248 | } MPI2_RAID_VOL_INDICATOR, MPI2_POINTER PTR_MPI2_RAID_VOL_INDICATOR, | ||
| 249 | Mpi2RaidVolIndicator_t, MPI2_POINTER pMpi2RaidVolIndicator_t; | ||
| 250 | |||
| 251 | /* defines for RAID Volume Indicator Flags field */ | ||
| 252 | #define MPI2_RAID_VOL_FLAGS_OP_MASK (0x0000000F) | ||
| 253 | #define MPI2_RAID_VOL_FLAGS_OP_BACKGROUND_INIT (0x00000000) | ||
| 254 | #define MPI2_RAID_VOL_FLAGS_OP_ONLINE_CAP_EXPANSION (0x00000001) | ||
| 255 | #define MPI2_RAID_VOL_FLAGS_OP_CONSISTENCY_CHECK (0x00000002) | ||
| 256 | #define MPI2_RAID_VOL_FLAGS_OP_RESYNC (0x00000003) | ||
| 257 | |||
| 258 | |||
| 259 | /* RAID Action Reply ActionData union */ | ||
| 260 | typedef union _MPI2_RAID_ACTION_REPLY_DATA | ||
| 261 | { | ||
| 262 | U32 Word[5]; | ||
| 263 | MPI2_RAID_VOL_INDICATOR RaidVolumeIndicator; | ||
| 264 | U16 VolDevHandle; | ||
| 265 | U8 VolumeState; | ||
| 266 | U8 PhysDiskNum; | ||
| 267 | } MPI2_RAID_ACTION_REPLY_DATA, MPI2_POINTER PTR_MPI2_RAID_ACTION_REPLY_DATA, | ||
| 268 | Mpi2RaidActionReplyData_t, MPI2_POINTER pMpi2RaidActionReplyData_t; | ||
| 269 | |||
| 270 | /* use MPI2_RAIDVOL0_SETTING_ defines from mpi2_cnfg.h for MPI2_RAID_ACTION_CHANGE_VOL_WRITE_CACHE action */ | ||
| 271 | |||
| 272 | |||
| 273 | /* RAID Action Reply Message */ | ||
| 274 | typedef struct _MPI2_RAID_ACTION_REPLY | ||
| 275 | { | ||
| 276 | U8 Action; /* 0x00 */ | ||
| 277 | U8 Reserved1; /* 0x01 */ | ||
| 278 | U8 MsgLength; /* 0x02 */ | ||
| 279 | U8 Function; /* 0x03 */ | ||
| 280 | U16 VolDevHandle; /* 0x04 */ | ||
| 281 | U8 PhysDiskNum; /* 0x06 */ | ||
| 282 | U8 MsgFlags; /* 0x07 */ | ||
| 283 | U8 VP_ID; /* 0x08 */ | ||
| 284 | U8 VF_ID; /* 0x09 */ | ||
| 285 | U16 Reserved2; /* 0x0A */ | ||
| 286 | U16 Reserved3; /* 0x0C */ | ||
| 287 | U16 IOCStatus; /* 0x0E */ | ||
| 288 | U32 IOCLogInfo; /* 0x10 */ | ||
| 289 | MPI2_RAID_ACTION_REPLY_DATA ActionData; /* 0x14 */ | ||
| 290 | } MPI2_RAID_ACTION_REPLY, MPI2_POINTER PTR_MPI2_RAID_ACTION_REPLY, | ||
| 291 | Mpi2RaidActionReply_t, MPI2_POINTER pMpi2RaidActionReply_t; | ||
| 292 | |||
| 293 | |||
| 294 | #endif | ||
| 295 | |||
diff --git a/drivers/scsi/mpt2sas/mpi/mpi2_sas.h b/drivers/scsi/mpt2sas/mpi/mpi2_sas.h new file mode 100644 index 000000000000..8a42b136cf53 --- /dev/null +++ b/drivers/scsi/mpt2sas/mpi/mpi2_sas.h | |||
| @@ -0,0 +1,282 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (c) 2000-2007 LSI Corporation. | ||
| 3 | * | ||
| 4 | * | ||
| 5 | * Name: mpi2_sas.h | ||
| 6 | * Title: MPI Serial Attached SCSI structures and definitions | ||
| 7 | * Creation Date: February 9, 2007 | ||
| 8 | * | ||
| 9 | * mpi2.h Version: 02.00.02 | ||
| 10 | * | ||
| 11 | * Version History | ||
| 12 | * --------------- | ||
| 13 | * | ||
| 14 | * Date Version Description | ||
| 15 | * -------- -------- ------------------------------------------------------ | ||
| 16 | * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. | ||
| 17 | * 06-26-07 02.00.01 Added Clear All Persistent Operation to SAS IO Unit | ||
| 18 | * Control Request. | ||
| 19 | * 10-02-08 02.00.02 Added Set IOC Parameter Operation to SAS IO Unit Control | ||
| 20 | * Request. | ||
| 21 | * -------------------------------------------------------------------------- | ||
| 22 | */ | ||
| 23 | |||
| 24 | #ifndef MPI2_SAS_H | ||
| 25 | #define MPI2_SAS_H | ||
| 26 | |||
| 27 | /* | ||
| 28 | * Values for SASStatus. | ||
| 29 | */ | ||
| 30 | #define MPI2_SASSTATUS_SUCCESS (0x00) | ||
| 31 | #define MPI2_SASSTATUS_UNKNOWN_ERROR (0x01) | ||
| 32 | #define MPI2_SASSTATUS_INVALID_FRAME (0x02) | ||
| 33 | #define MPI2_SASSTATUS_UTC_BAD_DEST (0x03) | ||
| 34 | #define MPI2_SASSTATUS_UTC_BREAK_RECEIVED (0x04) | ||
| 35 | #define MPI2_SASSTATUS_UTC_CONNECT_RATE_NOT_SUPPORTED (0x05) | ||
| 36 | #define MPI2_SASSTATUS_UTC_PORT_LAYER_REQUEST (0x06) | ||
| 37 | #define MPI2_SASSTATUS_UTC_PROTOCOL_NOT_SUPPORTED (0x07) | ||
| 38 | #define MPI2_SASSTATUS_UTC_STP_RESOURCES_BUSY (0x08) | ||
| 39 | #define MPI2_SASSTATUS_UTC_WRONG_DESTINATION (0x09) | ||
| 40 | #define MPI2_SASSTATUS_SHORT_INFORMATION_UNIT (0x0A) | ||
| 41 | #define MPI2_SASSTATUS_LONG_INFORMATION_UNIT (0x0B) | ||
| 42 | #define MPI2_SASSTATUS_XFER_RDY_INCORRECT_WRITE_DATA (0x0C) | ||
| 43 | #define MPI2_SASSTATUS_XFER_RDY_REQUEST_OFFSET_ERROR (0x0D) | ||
| 44 | #define MPI2_SASSTATUS_XFER_RDY_NOT_EXPECTED (0x0E) | ||
| 45 | #define MPI2_SASSTATUS_DATA_INCORRECT_DATA_LENGTH (0x0F) | ||
| 46 | #define MPI2_SASSTATUS_DATA_TOO_MUCH_READ_DATA (0x10) | ||
| 47 | #define MPI2_SASSTATUS_DATA_OFFSET_ERROR (0x11) | ||
| 48 | #define MPI2_SASSTATUS_SDSF_NAK_RECEIVED (0x12) | ||
| 49 | #define MPI2_SASSTATUS_SDSF_CONNECTION_FAILED (0x13) | ||
| 50 | #define MPI2_SASSTATUS_INITIATOR_RESPONSE_TIMEOUT (0x14) | ||
| 51 | |||
| 52 | |||
| 53 | /* | ||
| 54 | * Values for the SAS DeviceInfo field used in SAS Device Status Change Event | ||
| 55 | * data and SAS Configuration pages. | ||
| 56 | */ | ||
| 57 | #define MPI2_SAS_DEVICE_INFO_SEP (0x00004000) | ||
| 58 | #define MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE (0x00002000) | ||
| 59 | #define MPI2_SAS_DEVICE_INFO_LSI_DEVICE (0x00001000) | ||
| 60 | #define MPI2_SAS_DEVICE_INFO_DIRECT_ATTACH (0x00000800) | ||
| 61 | #define MPI2_SAS_DEVICE_INFO_SSP_TARGET (0x00000400) | ||
| 62 | #define MPI2_SAS_DEVICE_INFO_STP_TARGET (0x00000200) | ||
| 63 | #define MPI2_SAS_DEVICE_INFO_SMP_TARGET (0x00000100) | ||
| 64 | #define MPI2_SAS_DEVICE_INFO_SATA_DEVICE (0x00000080) | ||
| 65 | #define MPI2_SAS_DEVICE_INFO_SSP_INITIATOR (0x00000040) | ||
| 66 | #define MPI2_SAS_DEVICE_INFO_STP_INITIATOR (0x00000020) | ||
| 67 | #define MPI2_SAS_DEVICE_INFO_SMP_INITIATOR (0x00000010) | ||
| 68 | #define MPI2_SAS_DEVICE_INFO_SATA_HOST (0x00000008) | ||
| 69 | |||
| 70 | #define MPI2_SAS_DEVICE_INFO_MASK_DEVICE_TYPE (0x00000007) | ||
| 71 | #define MPI2_SAS_DEVICE_INFO_NO_DEVICE (0x00000000) | ||
| 72 | #define MPI2_SAS_DEVICE_INFO_END_DEVICE (0x00000001) | ||
| 73 | #define MPI2_SAS_DEVICE_INFO_EDGE_EXPANDER (0x00000002) | ||
| 74 | #define MPI2_SAS_DEVICE_INFO_FANOUT_EXPANDER (0x00000003) | ||
| 75 | |||
| 76 | |||
| 77 | /***************************************************************************** | ||
| 78 | * | ||
| 79 | * SAS Messages | ||
| 80 | * | ||
| 81 | *****************************************************************************/ | ||
| 82 | |||
| 83 | /**************************************************************************** | ||
| 84 | * SMP Passthrough messages | ||
| 85 | ****************************************************************************/ | ||
| 86 | |||
| 87 | /* SMP Passthrough Request Message */ | ||
| 88 | typedef struct _MPI2_SMP_PASSTHROUGH_REQUEST | ||
| 89 | { | ||
| 90 | U8 PassthroughFlags; /* 0x00 */ | ||
| 91 | U8 PhysicalPort; /* 0x01 */ | ||
| 92 | U8 ChainOffset; /* 0x02 */ | ||
| 93 | U8 Function; /* 0x03 */ | ||
| 94 | U16 RequestDataLength; /* 0x04 */ | ||
| 95 | U8 SGLFlags; /* 0x06 */ | ||
| 96 | U8 MsgFlags; /* 0x07 */ | ||
| 97 | U8 VP_ID; /* 0x08 */ | ||
| 98 | U8 VF_ID; /* 0x09 */ | ||
| 99 | U16 Reserved1; /* 0x0A */ | ||
| 100 | U32 Reserved2; /* 0x0C */ | ||
| 101 | U64 SASAddress; /* 0x10 */ | ||
| 102 | U32 Reserved3; /* 0x18 */ | ||
| 103 | U32 Reserved4; /* 0x1C */ | ||
| 104 | MPI2_SIMPLE_SGE_UNION SGL; /* 0x20 */ | ||
| 105 | } MPI2_SMP_PASSTHROUGH_REQUEST, MPI2_POINTER PTR_MPI2_SMP_PASSTHROUGH_REQUEST, | ||
| 106 | Mpi2SmpPassthroughRequest_t, MPI2_POINTER pMpi2SmpPassthroughRequest_t; | ||
| 107 | |||
| 108 | /* values for PassthroughFlags field */ | ||
| 109 | #define MPI2_SMP_PT_REQ_PT_FLAGS_IMMEDIATE (0x80) | ||
| 110 | |||
| 111 | /* values for SGLFlags field are in the SGL section of mpi2.h */ | ||
| 112 | |||
| 113 | |||
| 114 | /* SMP Passthrough Reply Message */ | ||
| 115 | typedef struct _MPI2_SMP_PASSTHROUGH_REPLY | ||
| 116 | { | ||
| 117 | U8 PassthroughFlags; /* 0x00 */ | ||
| 118 | U8 PhysicalPort; /* 0x01 */ | ||
| 119 | U8 MsgLength; /* 0x02 */ | ||
| 120 | U8 Function; /* 0x03 */ | ||
| 121 | U16 ResponseDataLength; /* 0x04 */ | ||
| 122 | U8 SGLFlags; /* 0x06 */ | ||
| 123 | U8 MsgFlags; /* 0x07 */ | ||
| 124 | U8 VP_ID; /* 0x08 */ | ||
| 125 | U8 VF_ID; /* 0x09 */ | ||
| 126 | U16 Reserved1; /* 0x0A */ | ||
| 127 | U8 Reserved2; /* 0x0C */ | ||
| 128 | U8 SASStatus; /* 0x0D */ | ||
| 129 | U16 IOCStatus; /* 0x0E */ | ||
| 130 | U32 IOCLogInfo; /* 0x10 */ | ||
| 131 | U32 Reserved3; /* 0x14 */ | ||
| 132 | U8 ResponseData[4]; /* 0x18 */ | ||
| 133 | } MPI2_SMP_PASSTHROUGH_REPLY, MPI2_POINTER PTR_MPI2_SMP_PASSTHROUGH_REPLY, | ||
| 134 | Mpi2SmpPassthroughReply_t, MPI2_POINTER pMpi2SmpPassthroughReply_t; | ||
| 135 | |||
| 136 | /* values for PassthroughFlags field */ | ||
| 137 | #define MPI2_SMP_PT_REPLY_PT_FLAGS_IMMEDIATE (0x80) | ||
| 138 | |||
| 139 | /* values for SASStatus field are at the top of this file */ | ||
| 140 | |||
| 141 | |||
| 142 | /**************************************************************************** | ||
| 143 | * SATA Passthrough messages | ||
| 144 | ****************************************************************************/ | ||
| 145 | |||
| 146 | /* SATA Passthrough Request Message */ | ||
| 147 | typedef struct _MPI2_SATA_PASSTHROUGH_REQUEST | ||
| 148 | { | ||
| 149 | U16 DevHandle; /* 0x00 */ | ||
| 150 | U8 ChainOffset; /* 0x02 */ | ||
| 151 | U8 Function; /* 0x03 */ | ||
| 152 | U16 PassthroughFlags; /* 0x04 */ | ||
| 153 | U8 SGLFlags; /* 0x06 */ | ||
| 154 | U8 MsgFlags; /* 0x07 */ | ||
| 155 | U8 VP_ID; /* 0x08 */ | ||
| 156 | U8 VF_ID; /* 0x09 */ | ||
| 157 | U16 Reserved1; /* 0x0A */ | ||
| 158 | U32 Reserved2; /* 0x0C */ | ||
| 159 | U32 Reserved3; /* 0x10 */ | ||
| 160 | U32 Reserved4; /* 0x14 */ | ||
| 161 | U32 DataLength; /* 0x18 */ | ||
| 162 | U8 CommandFIS[20]; /* 0x1C */ | ||
| 163 | MPI2_SIMPLE_SGE_UNION SGL; /* 0x20 */ | ||
| 164 | } MPI2_SATA_PASSTHROUGH_REQUEST, MPI2_POINTER PTR_MPI2_SATA_PASSTHROUGH_REQUEST, | ||
| 165 | Mpi2SataPassthroughRequest_t, MPI2_POINTER pMpi2SataPassthroughRequest_t; | ||
| 166 | |||
| 167 | /* values for PassthroughFlags field */ | ||
| 168 | #define MPI2_SATA_PT_REQ_PT_FLAGS_EXECUTE_DIAG (0x0100) | ||
| 169 | #define MPI2_SATA_PT_REQ_PT_FLAGS_DMA (0x0020) | ||
| 170 | #define MPI2_SATA_PT_REQ_PT_FLAGS_PIO (0x0010) | ||
| 171 | #define MPI2_SATA_PT_REQ_PT_FLAGS_UNSPECIFIED_VU (0x0004) | ||
| 172 | #define MPI2_SATA_PT_REQ_PT_FLAGS_WRITE (0x0002) | ||
| 173 | #define MPI2_SATA_PT_REQ_PT_FLAGS_READ (0x0001) | ||
| 174 | |||
| 175 | /* values for SGLFlags field are in the SGL section of mpi2.h */ | ||
| 176 | |||
| 177 | |||
| 178 | /* SATA Passthrough Reply Message */ | ||
| 179 | typedef struct _MPI2_SATA_PASSTHROUGH_REPLY | ||
| 180 | { | ||
| 181 | U16 DevHandle; /* 0x00 */ | ||
| 182 | U8 MsgLength; /* 0x02 */ | ||
| 183 | U8 Function; /* 0x03 */ | ||
| 184 | U16 PassthroughFlags; /* 0x04 */ | ||
| 185 | U8 SGLFlags; /* 0x06 */ | ||
| 186 | U8 MsgFlags; /* 0x07 */ | ||
| 187 | U8 VP_ID; /* 0x08 */ | ||
| 188 | U8 VF_ID; /* 0x09 */ | ||
| 189 | U16 Reserved1; /* 0x0A */ | ||
| 190 | U8 Reserved2; /* 0x0C */ | ||
| 191 | U8 SASStatus; /* 0x0D */ | ||
| 192 | U16 IOCStatus; /* 0x0E */ | ||
| 193 | U32 IOCLogInfo; /* 0x10 */ | ||
| 194 | U8 StatusFIS[20]; /* 0x14 */ | ||
| 195 | U32 StatusControlRegisters; /* 0x28 */ | ||
| 196 | U32 TransferCount; /* 0x2C */ | ||
| 197 | } MPI2_SATA_PASSTHROUGH_REPLY, MPI2_POINTER PTR_MPI2_SATA_PASSTHROUGH_REPLY, | ||
| 198 | Mpi2SataPassthroughReply_t, MPI2_POINTER pMpi2SataPassthroughReply_t; | ||
| 199 | |||
| 200 | /* values for SASStatus field are at the top of this file */ | ||
| 201 | |||
| 202 | |||
| 203 | /**************************************************************************** | ||
| 204 | * SAS IO Unit Control messages | ||
| 205 | ****************************************************************************/ | ||
| 206 | |||
| 207 | /* SAS IO Unit Control Request Message */ | ||
| 208 | typedef struct _MPI2_SAS_IOUNIT_CONTROL_REQUEST | ||
| 209 | { | ||
| 210 | U8 Operation; /* 0x00 */ | ||
| 211 | U8 Reserved1; /* 0x01 */ | ||
| 212 | U8 ChainOffset; /* 0x02 */ | ||
| 213 | U8 Function; /* 0x03 */ | ||
| 214 | U16 DevHandle; /* 0x04 */ | ||
| 215 | U8 IOCParameter; /* 0x06 */ | ||
| 216 | U8 MsgFlags; /* 0x07 */ | ||
| 217 | U8 VP_ID; /* 0x08 */ | ||
| 218 | U8 VF_ID; /* 0x09 */ | ||
| 219 | U16 Reserved3; /* 0x0A */ | ||
| 220 | U16 Reserved4; /* 0x0C */ | ||
| 221 | U8 PhyNum; /* 0x0E */ | ||
| 222 | U8 PrimFlags; /* 0x0F */ | ||
| 223 | U32 Primitive; /* 0x10 */ | ||
| 224 | U8 LookupMethod; /* 0x14 */ | ||
| 225 | U8 Reserved5; /* 0x15 */ | ||
| 226 | U16 SlotNumber; /* 0x16 */ | ||
| 227 | U64 LookupAddress; /* 0x18 */ | ||
| 228 | U32 IOCParameterValue; /* 0x20 */ | ||
| 229 | U32 Reserved7; /* 0x24 */ | ||
| 230 | U32 Reserved8; /* 0x28 */ | ||
| 231 | } MPI2_SAS_IOUNIT_CONTROL_REQUEST, | ||
| 232 | MPI2_POINTER PTR_MPI2_SAS_IOUNIT_CONTROL_REQUEST, | ||
| 233 | Mpi2SasIoUnitControlRequest_t, MPI2_POINTER pMpi2SasIoUnitControlRequest_t; | ||
| 234 | |||
| 235 | /* values for the Operation field */ | ||
| 236 | #define MPI2_SAS_OP_CLEAR_ALL_PERSISTENT (0x02) | ||
| 237 | #define MPI2_SAS_OP_PHY_LINK_RESET (0x06) | ||
| 238 | #define MPI2_SAS_OP_PHY_HARD_RESET (0x07) | ||
| 239 | #define MPI2_SAS_OP_PHY_CLEAR_ERROR_LOG (0x08) | ||
| 240 | #define MPI2_SAS_OP_SEND_PRIMITIVE (0x0A) | ||
| 241 | #define MPI2_SAS_OP_FORCE_FULL_DISCOVERY (0x0B) | ||
| 242 | #define MPI2_SAS_OP_TRANSMIT_PORT_SELECT_SIGNAL (0x0C) | ||
| 243 | #define MPI2_SAS_OP_REMOVE_DEVICE (0x0D) | ||
| 244 | #define MPI2_SAS_OP_LOOKUP_MAPPING (0x0E) | ||
| 245 | #define MPI2_SAS_OP_SET_IOC_PARAMETER (0x0F) | ||
| 246 | #define MPI2_SAS_OP_PRODUCT_SPECIFIC_MIN (0x80) | ||
| 247 | |||
| 248 | /* values for the PrimFlags field */ | ||
| 249 | #define MPI2_SAS_PRIMFLAGS_SINGLE (0x08) | ||
| 250 | #define MPI2_SAS_PRIMFLAGS_TRIPLE (0x02) | ||
| 251 | #define MPI2_SAS_PRIMFLAGS_REDUNDANT (0x01) | ||
| 252 | |||
| 253 | /* values for the LookupMethod field */ | ||
| 254 | #define MPI2_SAS_LOOKUP_METHOD_SAS_ADDRESS (0x01) | ||
| 255 | #define MPI2_SAS_LOOKUP_METHOD_SAS_ENCLOSURE_SLOT (0x02) | ||
| 256 | #define MPI2_SAS_LOOKUP_METHOD_SAS_DEVICE_NAME (0x03) | ||
| 257 | |||
| 258 | |||
| 259 | /* SAS IO Unit Control Reply Message */ | ||
| 260 | typedef struct _MPI2_SAS_IOUNIT_CONTROL_REPLY | ||
| 261 | { | ||
| 262 | U8 Operation; /* 0x00 */ | ||
| 263 | U8 Reserved1; /* 0x01 */ | ||
| 264 | U8 MsgLength; /* 0x02 */ | ||
| 265 | U8 Function; /* 0x03 */ | ||
| 266 | U16 DevHandle; /* 0x04 */ | ||
| 267 | U8 IOCParameter; /* 0x06 */ | ||
| 268 | U8 MsgFlags; /* 0x07 */ | ||
| 269 | U8 VP_ID; /* 0x08 */ | ||
| 270 | U8 VF_ID; /* 0x09 */ | ||
| 271 | U16 Reserved3; /* 0x0A */ | ||
| 272 | U16 Reserved4; /* 0x0C */ | ||
| 273 | U16 IOCStatus; /* 0x0E */ | ||
| 274 | U32 IOCLogInfo; /* 0x10 */ | ||
| 275 | } MPI2_SAS_IOUNIT_CONTROL_REPLY, | ||
| 276 | MPI2_POINTER PTR_MPI2_SAS_IOUNIT_CONTROL_REPLY, | ||
| 277 | Mpi2SasIoUnitControlReply_t, MPI2_POINTER pMpi2SasIoUnitControlReply_t; | ||
| 278 | |||
| 279 | |||
| 280 | #endif | ||
| 281 | |||
| 282 | |||
diff --git a/drivers/scsi/mpt2sas/mpi/mpi2_tool.h b/drivers/scsi/mpt2sas/mpi/mpi2_tool.h new file mode 100644 index 000000000000..2ff4e936bd39 --- /dev/null +++ b/drivers/scsi/mpt2sas/mpi/mpi2_tool.h | |||
| @@ -0,0 +1,249 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (c) 2000-2008 LSI Corporation. | ||
| 3 | * | ||
| 4 | * | ||
| 5 | * Name: mpi2_tool.h | ||
| 6 | * Title: MPI diagnostic tool structures and definitions | ||
| 7 | * Creation Date: March 26, 2007 | ||
| 8 | * | ||
| 9 | * mpi2_tool.h Version: 02.00.02 | ||
| 10 | * | ||
| 11 | * Version History | ||
| 12 | * --------------- | ||
| 13 | * | ||
| 14 | * Date Version Description | ||
| 15 | * -------- -------- ------------------------------------------------------ | ||
| 16 | * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. | ||
| 17 | * 12-18-07 02.00.01 Added Diagnostic Buffer Post and Diagnostic Release | ||
| 18 | * structures and defines. | ||
| 19 | * 02-29-08 02.00.02 Modified various names to make them 32-character unique. | ||
| 20 | * -------------------------------------------------------------------------- | ||
| 21 | */ | ||
| 22 | |||
| 23 | #ifndef MPI2_TOOL_H | ||
| 24 | #define MPI2_TOOL_H | ||
| 25 | |||
| 26 | /***************************************************************************** | ||
| 27 | * | ||
| 28 | * Toolbox Messages | ||
| 29 | * | ||
| 30 | *****************************************************************************/ | ||
| 31 | |||
| 32 | /* defines for the Tools */ | ||
| 33 | #define MPI2_TOOLBOX_CLEAN_TOOL (0x00) | ||
| 34 | #define MPI2_TOOLBOX_MEMORY_MOVE_TOOL (0x01) | ||
| 35 | #define MPI2_TOOLBOX_BEACON_TOOL (0x05) | ||
| 36 | |||
| 37 | /**************************************************************************** | ||
| 38 | * Toolbox reply | ||
| 39 | ****************************************************************************/ | ||
| 40 | |||
| 41 | typedef struct _MPI2_TOOLBOX_REPLY | ||
| 42 | { | ||
| 43 | U8 Tool; /* 0x00 */ | ||
| 44 | U8 Reserved1; /* 0x01 */ | ||
| 45 | U8 MsgLength; /* 0x02 */ | ||
| 46 | U8 Function; /* 0x03 */ | ||
| 47 | U16 Reserved2; /* 0x04 */ | ||
| 48 | U8 Reserved3; /* 0x06 */ | ||
| 49 | U8 MsgFlags; /* 0x07 */ | ||
| 50 | U8 VP_ID; /* 0x08 */ | ||
| 51 | U8 VF_ID; /* 0x09 */ | ||
| 52 | U16 Reserved4; /* 0x0A */ | ||
| 53 | U16 Reserved5; /* 0x0C */ | ||
| 54 | U16 IOCStatus; /* 0x0E */ | ||
| 55 | U32 IOCLogInfo; /* 0x10 */ | ||
| 56 | } MPI2_TOOLBOX_REPLY, MPI2_POINTER PTR_MPI2_TOOLBOX_REPLY, | ||
| 57 | Mpi2ToolboxReply_t, MPI2_POINTER pMpi2ToolboxReply_t; | ||
| 58 | |||
| 59 | |||
| 60 | /**************************************************************************** | ||
| 61 | * Toolbox Clean Tool request | ||
| 62 | ****************************************************************************/ | ||
| 63 | |||
| 64 | typedef struct _MPI2_TOOLBOX_CLEAN_REQUEST | ||
| 65 | { | ||
| 66 | U8 Tool; /* 0x00 */ | ||
| 67 | U8 Reserved1; /* 0x01 */ | ||
| 68 | U8 ChainOffset; /* 0x02 */ | ||
| 69 | U8 Function; /* 0x03 */ | ||
| 70 | U16 Reserved2; /* 0x04 */ | ||
| 71 | U8 Reserved3; /* 0x06 */ | ||
| 72 | U8 MsgFlags; /* 0x07 */ | ||
| 73 | U8 VP_ID; /* 0x08 */ | ||
| 74 | U8 VF_ID; /* 0x09 */ | ||
| 75 | U16 Reserved4; /* 0x0A */ | ||
| 76 | U32 Flags; /* 0x0C */ | ||
| 77 | } MPI2_TOOLBOX_CLEAN_REQUEST, MPI2_POINTER PTR_MPI2_TOOLBOX_CLEAN_REQUEST, | ||
| 78 | Mpi2ToolboxCleanRequest_t, MPI2_POINTER pMpi2ToolboxCleanRequest_t; | ||
| 79 | |||
| 80 | /* values for the Flags field */ | ||
| 81 | #define MPI2_TOOLBOX_CLEAN_BOOT_SERVICES (0x80000000) | ||
| 82 | #define MPI2_TOOLBOX_CLEAN_PERSIST_MANUFACT_PAGES (0x40000000) | ||
| 83 | #define MPI2_TOOLBOX_CLEAN_OTHER_PERSIST_PAGES (0x20000000) | ||
| 84 | #define MPI2_TOOLBOX_CLEAN_FW_CURRENT (0x10000000) | ||
| 85 | #define MPI2_TOOLBOX_CLEAN_FW_BACKUP (0x08000000) | ||
| 86 | #define MPI2_TOOLBOX_CLEAN_MEGARAID (0x02000000) | ||
| 87 | #define MPI2_TOOLBOX_CLEAN_INITIALIZATION (0x01000000) | ||
| 88 | #define MPI2_TOOLBOX_CLEAN_FLASH (0x00000004) | ||
| 89 | #define MPI2_TOOLBOX_CLEAN_SEEPROM (0x00000002) | ||
| 90 | #define MPI2_TOOLBOX_CLEAN_NVSRAM (0x00000001) | ||
| 91 | |||
| 92 | |||
| 93 | /**************************************************************************** | ||
| 94 | * Toolbox Memory Move request | ||
| 95 | ****************************************************************************/ | ||
| 96 | |||
| 97 | typedef struct _MPI2_TOOLBOX_MEM_MOVE_REQUEST | ||
| 98 | { | ||
| 99 | U8 Tool; /* 0x00 */ | ||
| 100 | U8 Reserved1; /* 0x01 */ | ||
| 101 | U8 ChainOffset; /* 0x02 */ | ||
| 102 | U8 Function; /* 0x03 */ | ||
| 103 | U16 Reserved2; /* 0x04 */ | ||
| 104 | U8 Reserved3; /* 0x06 */ | ||
| 105 | U8 MsgFlags; /* 0x07 */ | ||
| 106 | U8 VP_ID; /* 0x08 */ | ||
| 107 | U8 VF_ID; /* 0x09 */ | ||
| 108 | U16 Reserved4; /* 0x0A */ | ||
| 109 | MPI2_SGE_SIMPLE_UNION SGL; /* 0x0C */ | ||
| 110 | } MPI2_TOOLBOX_MEM_MOVE_REQUEST, MPI2_POINTER PTR_MPI2_TOOLBOX_MEM_MOVE_REQUEST, | ||
| 111 | Mpi2ToolboxMemMoveRequest_t, MPI2_POINTER pMpi2ToolboxMemMoveRequest_t; | ||
| 112 | |||
| 113 | |||
| 114 | /**************************************************************************** | ||
| 115 | * Toolbox Beacon Tool request | ||
| 116 | ****************************************************************************/ | ||
| 117 | |||
| 118 | typedef struct _MPI2_TOOLBOX_BEACON_REQUEST | ||
| 119 | { | ||
| 120 | U8 Tool; /* 0x00 */ | ||
| 121 | U8 Reserved1; /* 0x01 */ | ||
| 122 | U8 ChainOffset; /* 0x02 */ | ||
| 123 | U8 Function; /* 0x03 */ | ||
| 124 | U16 Reserved2; /* 0x04 */ | ||
| 125 | U8 Reserved3; /* 0x06 */ | ||
| 126 | U8 MsgFlags; /* 0x07 */ | ||
| 127 | U8 VP_ID; /* 0x08 */ | ||
| 128 | U8 VF_ID; /* 0x09 */ | ||
| 129 | U16 Reserved4; /* 0x0A */ | ||
| 130 | U8 Reserved5; /* 0x0C */ | ||
| 131 | U8 PhysicalPort; /* 0x0D */ | ||
| 132 | U8 Reserved6; /* 0x0E */ | ||
| 133 | U8 Flags; /* 0x0F */ | ||
| 134 | } MPI2_TOOLBOX_BEACON_REQUEST, MPI2_POINTER PTR_MPI2_TOOLBOX_BEACON_REQUEST, | ||
| 135 | Mpi2ToolboxBeaconRequest_t, MPI2_POINTER pMpi2ToolboxBeaconRequest_t; | ||
| 136 | |||
| 137 | /* values for the Flags field */ | ||
| 138 | #define MPI2_TOOLBOX_FLAGS_BEACONMODE_OFF (0x00) | ||
| 139 | #define MPI2_TOOLBOX_FLAGS_BEACONMODE_ON (0x01) | ||
| 140 | |||
| 141 | |||
| 142 | /***************************************************************************** | ||
| 143 | * | ||
| 144 | * Diagnostic Buffer Messages | ||
| 145 | * | ||
| 146 | *****************************************************************************/ | ||
| 147 | |||
| 148 | |||
| 149 | /**************************************************************************** | ||
| 150 | * Diagnostic Buffer Post request | ||
| 151 | ****************************************************************************/ | ||
| 152 | |||
| 153 | typedef struct _MPI2_DIAG_BUFFER_POST_REQUEST | ||
| 154 | { | ||
| 155 | U8 Reserved1; /* 0x00 */ | ||
| 156 | U8 BufferType; /* 0x01 */ | ||
| 157 | U8 ChainOffset; /* 0x02 */ | ||
| 158 | U8 Function; /* 0x03 */ | ||
| 159 | U16 Reserved2; /* 0x04 */ | ||
| 160 | U8 Reserved3; /* 0x06 */ | ||
| 161 | U8 MsgFlags; /* 0x07 */ | ||
| 162 | U8 VP_ID; /* 0x08 */ | ||
| 163 | U8 VF_ID; /* 0x09 */ | ||
| 164 | U16 Reserved4; /* 0x0A */ | ||
| 165 | U64 BufferAddress; /* 0x0C */ | ||
| 166 | U32 BufferLength; /* 0x14 */ | ||
| 167 | U32 Reserved5; /* 0x18 */ | ||
| 168 | U32 Reserved6; /* 0x1C */ | ||
| 169 | U32 Flags; /* 0x20 */ | ||
| 170 | U32 ProductSpecific[23]; /* 0x24 */ | ||
| 171 | } MPI2_DIAG_BUFFER_POST_REQUEST, MPI2_POINTER PTR_MPI2_DIAG_BUFFER_POST_REQUEST, | ||
| 172 | Mpi2DiagBufferPostRequest_t, MPI2_POINTER pMpi2DiagBufferPostRequest_t; | ||
| 173 | |||
| 174 | /* values for the BufferType field */ | ||
| 175 | #define MPI2_DIAG_BUF_TYPE_TRACE (0x00) | ||
| 176 | #define MPI2_DIAG_BUF_TYPE_SNAPSHOT (0x01) | ||
| 177 | /* count of the number of buffer types */ | ||
| 178 | #define MPI2_DIAG_BUF_TYPE_COUNT (0x02) | ||
| 179 | |||
| 180 | |||
| 181 | /**************************************************************************** | ||
| 182 | * Diagnostic Buffer Post reply | ||
| 183 | ****************************************************************************/ | ||
| 184 | |||
| 185 | typedef struct _MPI2_DIAG_BUFFER_POST_REPLY | ||
| 186 | { | ||
| 187 | U8 Reserved1; /* 0x00 */ | ||
| 188 | U8 BufferType; /* 0x01 */ | ||
| 189 | U8 MsgLength; /* 0x02 */ | ||
| 190 | U8 Function; /* 0x03 */ | ||
| 191 | U16 Reserved2; /* 0x04 */ | ||
| 192 | U8 Reserved3; /* 0x06 */ | ||
| 193 | U8 MsgFlags; /* 0x07 */ | ||
| 194 | U8 VP_ID; /* 0x08 */ | ||
| 195 | U8 VF_ID; /* 0x09 */ | ||
| 196 | U16 Reserved4; /* 0x0A */ | ||
| 197 | U16 Reserved5; /* 0x0C */ | ||
| 198 | U16 IOCStatus; /* 0x0E */ | ||
| 199 | U32 IOCLogInfo; /* 0x10 */ | ||
| 200 | U32 TransferLength; /* 0x14 */ | ||
| 201 | } MPI2_DIAG_BUFFER_POST_REPLY, MPI2_POINTER PTR_MPI2_DIAG_BUFFER_POST_REPLY, | ||
| 202 | Mpi2DiagBufferPostReply_t, MPI2_POINTER pMpi2DiagBufferPostReply_t; | ||
| 203 | |||
| 204 | |||
| 205 | /**************************************************************************** | ||
| 206 | * Diagnostic Release request | ||
| 207 | ****************************************************************************/ | ||
| 208 | |||
| 209 | typedef struct _MPI2_DIAG_RELEASE_REQUEST | ||
| 210 | { | ||
| 211 | U8 Reserved1; /* 0x00 */ | ||
| 212 | U8 BufferType; /* 0x01 */ | ||
| 213 | U8 ChainOffset; /* 0x02 */ | ||
| 214 | U8 Function; /* 0x03 */ | ||
| 215 | U16 Reserved2; /* 0x04 */ | ||
| 216 | U8 Reserved3; /* 0x06 */ | ||
| 217 | U8 MsgFlags; /* 0x07 */ | ||
| 218 | U8 VP_ID; /* 0x08 */ | ||
| 219 | U8 VF_ID; /* 0x09 */ | ||
| 220 | U16 Reserved4; /* 0x0A */ | ||
| 221 | } MPI2_DIAG_RELEASE_REQUEST, MPI2_POINTER PTR_MPI2_DIAG_RELEASE_REQUEST, | ||
| 222 | Mpi2DiagReleaseRequest_t, MPI2_POINTER pMpi2DiagReleaseRequest_t; | ||
| 223 | |||
| 224 | |||
| 225 | /**************************************************************************** | ||
| 226 | * Diagnostic Buffer Post reply | ||
| 227 | ****************************************************************************/ | ||
| 228 | |||
| 229 | typedef struct _MPI2_DIAG_RELEASE_REPLY | ||
| 230 | { | ||
| 231 | U8 Reserved1; /* 0x00 */ | ||
| 232 | U8 BufferType; /* 0x01 */ | ||
| 233 | U8 MsgLength; /* 0x02 */ | ||
| 234 | U8 Function; /* 0x03 */ | ||
| 235 | U16 Reserved2; /* 0x04 */ | ||
| 236 | U8 Reserved3; /* 0x06 */ | ||
| 237 | U8 MsgFlags; /* 0x07 */ | ||
| 238 | U8 VP_ID; /* 0x08 */ | ||
| 239 | U8 VF_ID; /* 0x09 */ | ||
| 240 | U16 Reserved4; /* 0x0A */ | ||
| 241 | U16 Reserved5; /* 0x0C */ | ||
| 242 | U16 IOCStatus; /* 0x0E */ | ||
| 243 | U32 IOCLogInfo; /* 0x10 */ | ||
| 244 | } MPI2_DIAG_RELEASE_REPLY, MPI2_POINTER PTR_MPI2_DIAG_RELEASE_REPLY, | ||
| 245 | Mpi2DiagReleaseReply_t, MPI2_POINTER pMpi2DiagReleaseReply_t; | ||
| 246 | |||
| 247 | |||
| 248 | #endif | ||
| 249 | |||
diff --git a/drivers/scsi/mpt2sas/mpi/mpi2_type.h b/drivers/scsi/mpt2sas/mpi/mpi2_type.h new file mode 100644 index 000000000000..cfde017bf16e --- /dev/null +++ b/drivers/scsi/mpt2sas/mpi/mpi2_type.h | |||
| @@ -0,0 +1,61 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (c) 2000-2007 LSI Corporation. | ||
| 3 | * | ||
| 4 | * | ||
| 5 | * Name: mpi2_type.h | ||
| 6 | * Title: MPI basic type definitions | ||
| 7 | * Creation Date: August 16, 2006 | ||
| 8 | * | ||
| 9 | * mpi2_type.h Version: 02.00.00 | ||
| 10 | * | ||
| 11 | * Version History | ||
| 12 | * --------------- | ||
| 13 | * | ||
| 14 | * Date Version Description | ||
| 15 | * -------- -------- ------------------------------------------------------ | ||
| 16 | * 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A. | ||
| 17 | * -------------------------------------------------------------------------- | ||
| 18 | */ | ||
| 19 | |||
| 20 | #ifndef MPI2_TYPE_H | ||
| 21 | #define MPI2_TYPE_H | ||
| 22 | |||
| 23 | |||
| 24 | /******************************************************************************* | ||
| 25 | * Define MPI2_POINTER if it hasn't already been defined. By default | ||
| 26 | * MPI2_POINTER is defined to be a near pointer. MPI2_POINTER can be defined as | ||
| 27 | * a far pointer by defining MPI2_POINTER as "far *" before this header file is | ||
| 28 | * included. | ||
| 29 | */ | ||
| 30 | #ifndef MPI2_POINTER | ||
| 31 | #define MPI2_POINTER * | ||
| 32 | #endif | ||
| 33 | |||
| 34 | /* the basic types may have already been included by mpi_type.h */ | ||
| 35 | #ifndef MPI_TYPE_H | ||
| 36 | /***************************************************************************** | ||
| 37 | * | ||
| 38 | * Basic Types | ||
| 39 | * | ||
| 40 | *****************************************************************************/ | ||
| 41 | |||
| 42 | typedef u8 U8; | ||
| 43 | typedef __le16 U16; | ||
| 44 | typedef __le32 U32; | ||
| 45 | typedef __le64 U64 __attribute__((aligned(4))); | ||
| 46 | |||
| 47 | /***************************************************************************** | ||
| 48 | * | ||
| 49 | * Pointer Types | ||
| 50 | * | ||
| 51 | *****************************************************************************/ | ||
| 52 | |||
| 53 | typedef U8 *PU8; | ||
| 54 | typedef U16 *PU16; | ||
| 55 | typedef U32 *PU32; | ||
| 56 | typedef U64 *PU64; | ||
| 57 | |||
| 58 | #endif | ||
| 59 | |||
| 60 | #endif | ||
| 61 | |||