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Diffstat (limited to 'drivers/scsi/be2iscsi/be_main.h')
-rw-r--r--drivers/scsi/be2iscsi/be_main.h29
1 files changed, 19 insertions, 10 deletions
diff --git a/drivers/scsi/be2iscsi/be_main.h b/drivers/scsi/be2iscsi/be_main.h
index 87ec21280a37..c643bb3736fc 100644
--- a/drivers/scsi/be2iscsi/be_main.h
+++ b/drivers/scsi/be2iscsi/be_main.h
@@ -23,6 +23,7 @@
23 23
24#include <linux/kernel.h> 24#include <linux/kernel.h>
25#include <linux/pci.h> 25#include <linux/pci.h>
26#include <linux/if_ether.h>
26#include <linux/in.h> 27#include <linux/in.h>
27#include <scsi/scsi.h> 28#include <scsi/scsi.h>
28#include <scsi/scsi_cmnd.h> 29#include <scsi/scsi_cmnd.h>
@@ -39,7 +40,7 @@
39 "Linux iSCSI Driver version" BUILD_STR 40 "Linux iSCSI Driver version" BUILD_STR
40#define DRV_DESC BE_NAME " " "Driver" 41#define DRV_DESC BE_NAME " " "Driver"
41 42
42#define BE_VENDOR_ID 0x19A2 43#define BE_VENDOR_ID 0x19A2
43/* DEVICE ID's for BE2 */ 44/* DEVICE ID's for BE2 */
44#define BE_DEVICE_ID1 0x212 45#define BE_DEVICE_ID1 0x212
45#define OC_DEVICE_ID1 0x702 46#define OC_DEVICE_ID1 0x702
@@ -68,8 +69,15 @@
68#define BEISCSI_NUM_MAX_LUN 256 /* scsi_host->max_lun */ 69#define BEISCSI_NUM_MAX_LUN 256 /* scsi_host->max_lun */
69#define BEISCSI_NUM_DEVICES_SUPPORTED 0x01 70#define BEISCSI_NUM_DEVICES_SUPPORTED 0x01
70#define BEISCSI_MAX_FRAGS_INIT 192 71#define BEISCSI_MAX_FRAGS_INIT 192
71#define BE_NUM_MSIX_ENTRIES 1 72#define BE_NUM_MSIX_ENTRIES 1
72#define MPU_EP_SEMAPHORE 0xac 73
74#define MPU_EP_CONTROL 0
75#define MPU_EP_SEMAPHORE 0xac
76#define BE2_SOFT_RESET 0x5c
77#define BE2_PCI_ONLINE0 0xb0
78#define BE2_PCI_ONLINE1 0xb4
79#define BE2_SET_RESET 0x80
80#define BE2_MPU_IRAM_ONLINE 0x00000080
73 81
74#define BE_SENSE_INFO_SIZE 258 82#define BE_SENSE_INFO_SIZE 258
75#define BE_ISCSI_PDU_HEADER_SIZE 64 83#define BE_ISCSI_PDU_HEADER_SIZE 64
@@ -105,7 +113,7 @@ do { \
105#define HWI_GET_ASYNC_PDU_CTX(phwi) (phwi->phwi_ctxt->pasync_ctx) 113#define HWI_GET_ASYNC_PDU_CTX(phwi) (phwi->phwi_ctxt->pasync_ctx)
106 114
107/********* Memory BAR register ************/ 115/********* Memory BAR register ************/
108#define PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET 0xfc 116#define PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET 0xfc
109/** 117/**
110 * Host Interrupt Enable, if set interrupts are enabled although "PCI Interrupt 118 * Host Interrupt Enable, if set interrupts are enabled although "PCI Interrupt
111 * Disable" may still globally block interrupts in addition to individual 119 * Disable" may still globally block interrupts in addition to individual
@@ -116,7 +124,7 @@ do { \
116#define MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK (1 << 29) /* bit 29 */ 124#define MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK (1 << 29) /* bit 29 */
117 125
118/********* ISR0 Register offset **********/ 126/********* ISR0 Register offset **********/
119#define CEV_ISR0_OFFSET 0xC18 127#define CEV_ISR0_OFFSET 0xC18
120#define CEV_ISR_SIZE 4 128#define CEV_ISR_SIZE 4
121 129
122/** 130/**
@@ -139,12 +147,12 @@ do { \
139#define DB_EQ_REARM_SHIFT (29) /* bit 29 */ 147#define DB_EQ_REARM_SHIFT (29) /* bit 29 */
140 148
141/********* Compl Q door bell *************/ 149/********* Compl Q door bell *************/
142#define DB_CQ_OFFSET 0x120 150#define DB_CQ_OFFSET 0x120
143#define DB_CQ_RING_ID_MASK 0x3FF /* bits 0 - 9 */ 151#define DB_CQ_RING_ID_MASK 0x3FF /* bits 0 - 9 */
144/* Number of event entries processed */ 152/* Number of event entries processed */
145#define DB_CQ_NUM_POPPED_SHIFT (16) /* bits 16 - 28 */ 153#define DB_CQ_NUM_POPPED_SHIFT (16) /* bits 16 - 28 */
146/* Rearm bit */ 154/* Rearm bit */
147#define DB_CQ_REARM_SHIFT (29) /* bit 29 */ 155#define DB_CQ_REARM_SHIFT (29) /* bit 29 */
148 156
149#define GET_HWI_CONTROLLER_WS(pc) (pc->phwi_ctrlr) 157#define GET_HWI_CONTROLLER_WS(pc) (pc->phwi_ctrlr)
150#define HWI_GET_DEF_BUFQ_ID(pc) (((struct hwi_controller *)\ 158#define HWI_GET_DEF_BUFQ_ID(pc) (((struct hwi_controller *)\
@@ -161,12 +169,12 @@ enum be_mem_enum {
161 HWI_MEM_WRBH, 169 HWI_MEM_WRBH,
162 HWI_MEM_SGLH, 170 HWI_MEM_SGLH,
163 HWI_MEM_SGE, 171 HWI_MEM_SGE,
164 HWI_MEM_ASYNC_HEADER_BUF, /* 5 */ 172 HWI_MEM_ASYNC_HEADER_BUF, /* 5 */
165 HWI_MEM_ASYNC_DATA_BUF, 173 HWI_MEM_ASYNC_DATA_BUF,
166 HWI_MEM_ASYNC_HEADER_RING, 174 HWI_MEM_ASYNC_HEADER_RING,
167 HWI_MEM_ASYNC_DATA_RING, 175 HWI_MEM_ASYNC_DATA_RING,
168 HWI_MEM_ASYNC_HEADER_HANDLE, 176 HWI_MEM_ASYNC_HEADER_HANDLE,
169 HWI_MEM_ASYNC_DATA_HANDLE, /* 10 */ 177 HWI_MEM_ASYNC_DATA_HANDLE, /* 10 */
170 HWI_MEM_ASYNC_PDU_CONTEXT, 178 HWI_MEM_ASYNC_PDU_CONTEXT,
171 ISCSI_MEM_GLOBAL_HEADER, 179 ISCSI_MEM_GLOBAL_HEADER,
172 SE_MEM_MAX 180 SE_MEM_MAX
@@ -352,6 +360,7 @@ struct beiscsi_conn {
352 u32 beiscsi_conn_cid; 360 u32 beiscsi_conn_cid;
353 struct beiscsi_endpoint *ep; 361 struct beiscsi_endpoint *ep;
354 unsigned short login_in_progress; 362 unsigned short login_in_progress;
363 struct wrb_handle *plogin_wrb_handle;
355 struct sgl_handle *plogin_sgl_handle; 364 struct sgl_handle *plogin_sgl_handle;
356 struct beiscsi_session *beiscsi_sess; 365 struct beiscsi_session *beiscsi_sess;
357 struct iscsi_task *task; 366 struct iscsi_task *task;