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-rw-r--r--drivers/s390/cio/qdio.c3468
1 files changed, 3468 insertions, 0 deletions
diff --git a/drivers/s390/cio/qdio.c b/drivers/s390/cio/qdio.c
new file mode 100644
index 000000000000..bbe9f45d1438
--- /dev/null
+++ b/drivers/s390/cio/qdio.c
@@ -0,0 +1,3468 @@
1/*
2 *
3 * linux/drivers/s390/cio/qdio.c
4 *
5 * Linux for S/390 QDIO base support, Hipersocket base support
6 * version 2
7 *
8 * Copyright 2000,2002 IBM Corporation
9 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
10 * 2.6 cio integration by Cornelia Huck <cohuck@de.ibm.com>
11 *
12 * Restriction: only 63 iqdio subchannels would have its own indicator,
13 * after that, subsequent subchannels share one indicator
14 *
15 *
16 *
17 *
18 * This program is free software; you can redistribute it and/or modify
19 * it under the terms of the GNU General Public License as published by
20 * the Free Software Foundation; either version 2, or (at your option)
21 * any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31 */
32
33#include <linux/config.h>
34#include <linux/module.h>
35#include <linux/init.h>
36
37#include <linux/slab.h>
38#include <linux/kernel.h>
39#include <linux/proc_fs.h>
40#include <linux/timer.h>
41
42#include <asm/ccwdev.h>
43#include <asm/io.h>
44#include <asm/atomic.h>
45#include <asm/semaphore.h>
46#include <asm/timex.h>
47
48#include <asm/debug.h>
49#include <asm/qdio.h>
50
51#include "cio.h"
52#include "css.h"
53#include "device.h"
54#include "airq.h"
55#include "qdio.h"
56#include "ioasm.h"
57#include "chsc.h"
58
59#define VERSION_QDIO_C "$Revision: 1.98 $"
60
61/****************** MODULE PARAMETER VARIABLES ********************/
62MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>");
63MODULE_DESCRIPTION("QDIO base support version 2, " \
64 "Copyright 2000 IBM Corporation");
65MODULE_LICENSE("GPL");
66
67/******************** HERE WE GO ***********************************/
68
69static const char version[] = "QDIO base support version 2 ("
70 VERSION_QDIO_C "/" VERSION_QDIO_H "/" VERSION_CIO_QDIO_H ")";
71
72#ifdef QDIO_PERFORMANCE_STATS
73static int proc_perf_file_registration;
74static unsigned long i_p_c, i_p_nc, o_p_c, o_p_nc, ii_p_c, ii_p_nc;
75static struct qdio_perf_stats perf_stats;
76#endif /* QDIO_PERFORMANCE_STATS */
77
78static int hydra_thinints;
79static int omit_svs;
80
81static int indicator_used[INDICATORS_PER_CACHELINE];
82static __u32 * volatile indicators;
83static __u32 volatile spare_indicator;
84static atomic_t spare_indicator_usecount;
85
86static debug_info_t *qdio_dbf_setup;
87static debug_info_t *qdio_dbf_sbal;
88static debug_info_t *qdio_dbf_trace;
89static debug_info_t *qdio_dbf_sense;
90#ifdef CONFIG_QDIO_DEBUG
91static debug_info_t *qdio_dbf_slsb_out;
92static debug_info_t *qdio_dbf_slsb_in;
93#endif /* CONFIG_QDIO_DEBUG */
94
95/* iQDIO stuff: */
96static volatile struct qdio_q *tiq_list=NULL; /* volatile as it could change
97 during a while loop */
98static DEFINE_SPINLOCK(ttiq_list_lock);
99static int register_thinint_result;
100static void tiqdio_tl(unsigned long);
101static DECLARE_TASKLET(tiqdio_tasklet,tiqdio_tl,0);
102
103/* not a macro, as one of the arguments is atomic_read */
104static inline int
105qdio_min(int a,int b)
106{
107 if (a<b)
108 return a;
109 else
110 return b;
111}
112
113/***************** SCRUBBER HELPER ROUTINES **********************/
114
115static inline volatile __u64
116qdio_get_micros(void)
117{
118 return (get_clock() >> 10); /* time>>12 is microseconds */
119}
120
121/*
122 * unfortunately, we can't just xchg the values; in do_QDIO we want to reserve
123 * the q in any case, so that we'll not be interrupted when we are in
124 * qdio_mark_tiq... shouldn't have a really bad impact, as reserving almost
125 * ever works (last famous words)
126 */
127static inline int
128qdio_reserve_q(struct qdio_q *q)
129{
130 return atomic_add_return(1,&q->use_count) - 1;
131}
132
133static inline void
134qdio_release_q(struct qdio_q *q)
135{
136 atomic_dec(&q->use_count);
137}
138
139static volatile inline void
140qdio_set_slsb(volatile char *slsb, unsigned char value)
141{
142 xchg((char*)slsb,value);
143}
144
145static inline int
146qdio_siga_sync(struct qdio_q *q, unsigned int gpr2,
147 unsigned int gpr3)
148{
149 int cc;
150
151 QDIO_DBF_TEXT4(0,trace,"sigasync");
152 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
153
154#ifdef QDIO_PERFORMANCE_STATS
155 perf_stats.siga_syncs++;
156#endif /* QDIO_PERFORMANCE_STATS */
157
158 cc = do_siga_sync(q->irq, gpr2, gpr3);
159 if (cc)
160 QDIO_DBF_HEX3(0,trace,&cc,sizeof(int*));
161
162 return cc;
163}
164
165static inline int
166qdio_siga_sync_q(struct qdio_q *q)
167{
168 if (q->is_input_q)
169 return qdio_siga_sync(q, 0, q->mask);
170 return qdio_siga_sync(q, q->mask, 0);
171}
172
173/*
174 * returns QDIO_SIGA_ERROR_ACCESS_EXCEPTION as cc, when SIGA returns
175 * an access exception
176 */
177static inline int
178qdio_siga_output(struct qdio_q *q)
179{
180 int cc;
181 __u32 busy_bit;
182 __u64 start_time=0;
183
184#ifdef QDIO_PERFORMANCE_STATS
185 perf_stats.siga_outs++;
186#endif /* QDIO_PERFORMANCE_STATS */
187
188 QDIO_DBF_TEXT4(0,trace,"sigaout");
189 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
190
191 for (;;) {
192 cc = do_siga_output(q->irq, q->mask, &busy_bit);
193//QDIO_PRINT_ERR("cc=%x, busy=%x\n",cc,busy_bit);
194 if ((cc==2) && (busy_bit) && (q->is_iqdio_q)) {
195 if (!start_time)
196 start_time=NOW;
197 if ((NOW-start_time)>QDIO_BUSY_BIT_PATIENCE)
198 break;
199 } else
200 break;
201 }
202
203 if ((cc==2) && (busy_bit))
204 cc |= QDIO_SIGA_ERROR_B_BIT_SET;
205
206 if (cc)
207 QDIO_DBF_HEX3(0,trace,&cc,sizeof(int*));
208
209 return cc;
210}
211
212static inline int
213qdio_siga_input(struct qdio_q *q)
214{
215 int cc;
216
217 QDIO_DBF_TEXT4(0,trace,"sigain");
218 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
219
220#ifdef QDIO_PERFORMANCE_STATS
221 perf_stats.siga_ins++;
222#endif /* QDIO_PERFORMANCE_STATS */
223
224 cc = do_siga_input(q->irq, q->mask);
225
226 if (cc)
227 QDIO_DBF_HEX3(0,trace,&cc,sizeof(int*));
228
229 return cc;
230}
231
232/* locked by the locks in qdio_activate and qdio_cleanup */
233static __u32 * volatile
234qdio_get_indicator(void)
235{
236 int i;
237
238 for (i=1;i<INDICATORS_PER_CACHELINE;i++)
239 if (!indicator_used[i]) {
240 indicator_used[i]=1;
241 return indicators+i;
242 }
243 atomic_inc(&spare_indicator_usecount);
244 return (__u32 * volatile) &spare_indicator;
245}
246
247/* locked by the locks in qdio_activate and qdio_cleanup */
248static void
249qdio_put_indicator(__u32 *addr)
250{
251 int i;
252
253 if ( (addr) && (addr!=&spare_indicator) ) {
254 i=addr-indicators;
255 indicator_used[i]=0;
256 }
257 if (addr == &spare_indicator)
258 atomic_dec(&spare_indicator_usecount);
259}
260
261static inline volatile void
262tiqdio_clear_summary_bit(__u32 *location)
263{
264 QDIO_DBF_TEXT5(0,trace,"clrsummb");
265 QDIO_DBF_HEX5(0,trace,&location,sizeof(void*));
266
267 xchg(location,0);
268}
269
270static inline volatile void
271tiqdio_set_summary_bit(__u32 *location)
272{
273 QDIO_DBF_TEXT5(0,trace,"setsummb");
274 QDIO_DBF_HEX5(0,trace,&location,sizeof(void*));
275
276 xchg(location,-1);
277}
278
279static inline void
280tiqdio_sched_tl(void)
281{
282 tasklet_hi_schedule(&tiqdio_tasklet);
283}
284
285static inline void
286qdio_mark_tiq(struct qdio_q *q)
287{
288 unsigned long flags;
289
290 QDIO_DBF_TEXT4(0,trace,"mark iq");
291 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
292
293 spin_lock_irqsave(&ttiq_list_lock,flags);
294 if (unlikely(atomic_read(&q->is_in_shutdown)))
295 goto out_unlock;
296
297 if (!q->is_input_q)
298 goto out_unlock;
299
300 if ((q->list_prev) || (q->list_next))
301 goto out_unlock;
302
303 if (!tiq_list) {
304 tiq_list=q;
305 q->list_prev=q;
306 q->list_next=q;
307 } else {
308 q->list_next=tiq_list;
309 q->list_prev=tiq_list->list_prev;
310 tiq_list->list_prev->list_next=q;
311 tiq_list->list_prev=q;
312 }
313 spin_unlock_irqrestore(&ttiq_list_lock,flags);
314
315 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
316 tiqdio_sched_tl();
317 return;
318out_unlock:
319 spin_unlock_irqrestore(&ttiq_list_lock,flags);
320 return;
321}
322
323static inline void
324qdio_mark_q(struct qdio_q *q)
325{
326 QDIO_DBF_TEXT4(0,trace,"mark q");
327 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
328
329 if (unlikely(atomic_read(&q->is_in_shutdown)))
330 return;
331
332 tasklet_schedule(&q->tasklet);
333}
334
335static inline int
336qdio_stop_polling(struct qdio_q *q)
337{
338#ifdef QDIO_USE_PROCESSING_STATE
339 int gsf;
340
341 if (!atomic_swap(&q->polling,0))
342 return 1;
343
344 QDIO_DBF_TEXT4(0,trace,"stoppoll");
345 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
346
347 /* show the card that we are not polling anymore */
348 if (!q->is_input_q)
349 return 1;
350
351 gsf=GET_SAVED_FRONTIER(q);
352 set_slsb(&q->slsb.acc.val[(gsf+QDIO_MAX_BUFFERS_PER_Q-1)&
353 (QDIO_MAX_BUFFERS_PER_Q-1)],
354 SLSB_P_INPUT_NOT_INIT);
355 /*
356 * we don't issue this SYNC_MEMORY, as we trust Rick T and
357 * moreover will not use the PROCESSING state under VM, so
358 * q->polling was 0 anyway
359 */
360 /*SYNC_MEMORY;*/
361 if (q->slsb.acc.val[gsf]!=SLSB_P_INPUT_PRIMED)
362 return 1;
363 /*
364 * set our summary bit again, as otherwise there is a
365 * small window we can miss between resetting it and
366 * checking for PRIMED state
367 */
368 if (q->is_thinint_q)
369 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
370 return 0;
371
372#else /* QDIO_USE_PROCESSING_STATE */
373 return 1;
374#endif /* QDIO_USE_PROCESSING_STATE */
375}
376
377/*
378 * see the comment in do_QDIO and before qdio_reserve_q about the
379 * sophisticated locking outside of unmark_q, so that we don't need to
380 * disable the interrupts :-)
381*/
382static inline void
383qdio_unmark_q(struct qdio_q *q)
384{
385 unsigned long flags;
386
387 QDIO_DBF_TEXT4(0,trace,"unmark q");
388 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
389
390 if ((!q->list_prev)||(!q->list_next))
391 return;
392
393 if ((q->is_thinint_q)&&(q->is_input_q)) {
394 /* iQDIO */
395 spin_lock_irqsave(&ttiq_list_lock,flags);
396 /* in case cleanup has done this already and simultanously
397 * qdio_unmark_q is called from the interrupt handler, we've
398 * got to check this in this specific case again */
399 if ((!q->list_prev)||(!q->list_next))
400 goto out;
401 if (q->list_next==q) {
402 /* q was the only interesting q */
403 tiq_list=NULL;
404 q->list_next=NULL;
405 q->list_prev=NULL;
406 } else {
407 q->list_next->list_prev=q->list_prev;
408 q->list_prev->list_next=q->list_next;
409 tiq_list=q->list_next;
410 q->list_next=NULL;
411 q->list_prev=NULL;
412 }
413out:
414 spin_unlock_irqrestore(&ttiq_list_lock,flags);
415 }
416}
417
418static inline unsigned long
419tiqdio_clear_global_summary(void)
420{
421 unsigned long time;
422
423 QDIO_DBF_TEXT5(0,trace,"clrglobl");
424
425 time = do_clear_global_summary();
426
427 QDIO_DBF_HEX5(0,trace,&time,sizeof(unsigned long));
428
429 return time;
430}
431
432
433/************************* OUTBOUND ROUTINES *******************************/
434
435inline static int
436qdio_get_outbound_buffer_frontier(struct qdio_q *q)
437{
438 int f,f_mod_no;
439 volatile char *slsb;
440 int first_not_to_check;
441 char dbf_text[15];
442
443 QDIO_DBF_TEXT4(0,trace,"getobfro");
444 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
445
446 slsb=&q->slsb.acc.val[0];
447 f_mod_no=f=q->first_to_check;
448 /*
449 * f points to already processed elements, so f+no_used is correct...
450 * ... but: we don't check 128 buffers, as otherwise
451 * qdio_has_outbound_q_moved would return 0
452 */
453 first_not_to_check=f+qdio_min(atomic_read(&q->number_of_buffers_used),
454 (QDIO_MAX_BUFFERS_PER_Q-1));
455
456 if ((!q->is_iqdio_q)&&(!q->hydra_gives_outbound_pcis))
457 SYNC_MEMORY;
458
459check_next:
460 if (f==first_not_to_check)
461 goto out;
462
463 switch(slsb[f_mod_no]) {
464
465 /* the adapter has not fetched the output yet */
466 case SLSB_CU_OUTPUT_PRIMED:
467 QDIO_DBF_TEXT5(0,trace,"outpprim");
468 break;
469
470 /* the adapter got it */
471 case SLSB_P_OUTPUT_EMPTY:
472 atomic_dec(&q->number_of_buffers_used);
473 f++;
474 f_mod_no=f&(QDIO_MAX_BUFFERS_PER_Q-1);
475 QDIO_DBF_TEXT5(0,trace,"outpempt");
476 goto check_next;
477
478 case SLSB_P_OUTPUT_ERROR:
479 QDIO_DBF_TEXT3(0,trace,"outperr");
480 sprintf(dbf_text,"%x-%x-%x",f_mod_no,
481 q->sbal[f_mod_no]->element[14].sbalf.value,
482 q->sbal[f_mod_no]->element[15].sbalf.value);
483 QDIO_DBF_TEXT3(1,trace,dbf_text);
484 QDIO_DBF_HEX2(1,sbal,q->sbal[f_mod_no],256);
485
486 /* kind of process the buffer */
487 set_slsb(&q->slsb.acc.val[f_mod_no], SLSB_P_OUTPUT_NOT_INIT);
488
489 /*
490 * we increment the frontier, as this buffer
491 * was processed obviously
492 */
493 atomic_dec(&q->number_of_buffers_used);
494 f_mod_no=(f_mod_no+1)&(QDIO_MAX_BUFFERS_PER_Q-1);
495
496 if (q->qdio_error)
497 q->error_status_flags|=
498 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
499 q->qdio_error=SLSB_P_OUTPUT_ERROR;
500 q->error_status_flags|=QDIO_STATUS_LOOK_FOR_ERROR;
501
502 break;
503
504 /* no new buffers */
505 default:
506 QDIO_DBF_TEXT5(0,trace,"outpni");
507 }
508out:
509 return (q->first_to_check=f_mod_no);
510}
511
512/* all buffers are processed */
513inline static int
514qdio_is_outbound_q_done(struct qdio_q *q)
515{
516 int no_used;
517#ifdef CONFIG_QDIO_DEBUG
518 char dbf_text[15];
519#endif
520
521 no_used=atomic_read(&q->number_of_buffers_used);
522
523#ifdef CONFIG_QDIO_DEBUG
524 if (no_used) {
525 sprintf(dbf_text,"oqisnt%02x",no_used);
526 QDIO_DBF_TEXT4(0,trace,dbf_text);
527 } else {
528 QDIO_DBF_TEXT4(0,trace,"oqisdone");
529 }
530 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
531#endif /* CONFIG_QDIO_DEBUG */
532 return (no_used==0);
533}
534
535inline static int
536qdio_has_outbound_q_moved(struct qdio_q *q)
537{
538 int i;
539
540 i=qdio_get_outbound_buffer_frontier(q);
541
542 if ( (i!=GET_SAVED_FRONTIER(q)) ||
543 (q->error_status_flags&QDIO_STATUS_LOOK_FOR_ERROR) ) {
544 SAVE_FRONTIER(q,i);
545 QDIO_DBF_TEXT4(0,trace,"oqhasmvd");
546 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
547 return 1;
548 } else {
549 QDIO_DBF_TEXT4(0,trace,"oqhsntmv");
550 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
551 return 0;
552 }
553}
554
555inline static void
556qdio_kick_outbound_q(struct qdio_q *q)
557{
558 int result;
559#ifdef CONFIG_QDIO_DEBUG
560 char dbf_text[15];
561
562 QDIO_DBF_TEXT4(0,trace,"kickoutq");
563 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
564#endif /* CONFIG_QDIO_DEBUG */
565
566 if (!q->siga_out)
567 return;
568
569 /* here's the story with cc=2 and busy bit set (thanks, Rick):
570 * VM's CP could present us cc=2 and busy bit set on SIGA-write
571 * during reconfiguration of their Guest LAN (only in HIPERS mode,
572 * QDIO mode is asynchronous -- cc=2 and busy bit there will take
573 * the queues down immediately; and not being under VM we have a
574 * problem on cc=2 and busy bit set right away).
575 *
576 * Therefore qdio_siga_output will try for a short time constantly,
577 * if such a condition occurs. If it doesn't change, it will
578 * increase the busy_siga_counter and save the timestamp, and
579 * schedule the queue for later processing (via mark_q, using the
580 * queue tasklet). __qdio_outbound_processing will check out the
581 * counter. If non-zero, it will call qdio_kick_outbound_q as often
582 * as the value of the counter. This will attempt further SIGA
583 * instructions. For each successful SIGA, the counter is
584 * decreased, for failing SIGAs the counter remains the same, after
585 * all.
586 * After some time of no movement, qdio_kick_outbound_q will
587 * finally fail and reflect corresponding error codes to call
588 * the upper layer module and have it take the queues down.
589 *
590 * Note that this is a change from the original HiperSockets design
591 * (saying cc=2 and busy bit means take the queues down), but in
592 * these days Guest LAN didn't exist... excessive cc=2 with busy bit
593 * conditions will still take the queues down, but the threshold is
594 * higher due to the Guest LAN environment.
595 */
596
597
598 result=qdio_siga_output(q);
599
600 switch (result) {
601 case 0:
602 /* went smooth this time, reset timestamp */
603#ifdef CONFIG_QDIO_DEBUG
604 QDIO_DBF_TEXT3(0,trace,"cc2reslv");
605 sprintf(dbf_text,"%4x%2x%2x",q->irq,q->q_no,
606 atomic_read(&q->busy_siga_counter));
607 QDIO_DBF_TEXT3(0,trace,dbf_text);
608#endif /* CONFIG_QDIO_DEBUG */
609 q->timing.busy_start=0;
610 break;
611 case (2|QDIO_SIGA_ERROR_B_BIT_SET):
612 /* cc=2 and busy bit: */
613 atomic_inc(&q->busy_siga_counter);
614
615 /* if the last siga was successful, save
616 * timestamp here */
617 if (!q->timing.busy_start)
618 q->timing.busy_start=NOW;
619
620 /* if we're in time, don't touch error_status_flags
621 * and siga_error */
622 if (NOW-q->timing.busy_start<QDIO_BUSY_BIT_GIVE_UP) {
623 qdio_mark_q(q);
624 break;
625 }
626 QDIO_DBF_TEXT2(0,trace,"cc2REPRT");
627#ifdef CONFIG_QDIO_DEBUG
628 sprintf(dbf_text,"%4x%2x%2x",q->irq,q->q_no,
629 atomic_read(&q->busy_siga_counter));
630 QDIO_DBF_TEXT3(0,trace,dbf_text);
631#endif /* CONFIG_QDIO_DEBUG */
632 /* else fallthrough and report error */
633 default:
634 /* for plain cc=1, 2 or 3: */
635 if (q->siga_error)
636 q->error_status_flags|=
637 QDIO_STATUS_MORE_THAN_ONE_SIGA_ERROR;
638 q->error_status_flags|=
639 QDIO_STATUS_LOOK_FOR_ERROR;
640 q->siga_error=result;
641 }
642}
643
644inline static void
645qdio_kick_outbound_handler(struct qdio_q *q)
646{
647 int start, end, real_end, count;
648#ifdef CONFIG_QDIO_DEBUG
649 char dbf_text[15];
650#endif
651
652 start = q->first_element_to_kick;
653 /* last_move_ftc was just updated */
654 real_end = GET_SAVED_FRONTIER(q);
655 end = (real_end+QDIO_MAX_BUFFERS_PER_Q-1)&
656 (QDIO_MAX_BUFFERS_PER_Q-1);
657 count = (end+QDIO_MAX_BUFFERS_PER_Q+1-start)&
658 (QDIO_MAX_BUFFERS_PER_Q-1);
659
660#ifdef CONFIG_QDIO_DEBUG
661 QDIO_DBF_TEXT4(0,trace,"kickouth");
662 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
663
664 sprintf(dbf_text,"s=%2xc=%2x",start,count);
665 QDIO_DBF_TEXT4(0,trace,dbf_text);
666#endif /* CONFIG_QDIO_DEBUG */
667
668 if (q->state==QDIO_IRQ_STATE_ACTIVE)
669 q->handler(q->cdev,QDIO_STATUS_OUTBOUND_INT|
670 q->error_status_flags,
671 q->qdio_error,q->siga_error,q->q_no,start,count,
672 q->int_parm);
673
674 /* for the next time: */
675 q->first_element_to_kick=real_end;
676 q->qdio_error=0;
677 q->siga_error=0;
678 q->error_status_flags=0;
679}
680
681static inline void
682__qdio_outbound_processing(struct qdio_q *q)
683{
684 int siga_attempts;
685
686 QDIO_DBF_TEXT4(0,trace,"qoutproc");
687 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
688
689 if (unlikely(qdio_reserve_q(q))) {
690 qdio_release_q(q);
691#ifdef QDIO_PERFORMANCE_STATS
692 o_p_c++;
693#endif /* QDIO_PERFORMANCE_STATS */
694 /* as we're sissies, we'll check next time */
695 if (likely(!atomic_read(&q->is_in_shutdown))) {
696 qdio_mark_q(q);
697 QDIO_DBF_TEXT4(0,trace,"busy,agn");
698 }
699 return;
700 }
701#ifdef QDIO_PERFORMANCE_STATS
702 o_p_nc++;
703 perf_stats.tl_runs++;
704#endif /* QDIO_PERFORMANCE_STATS */
705
706 /* see comment in qdio_kick_outbound_q */
707 siga_attempts=atomic_read(&q->busy_siga_counter);
708 while (siga_attempts) {
709 atomic_dec(&q->busy_siga_counter);
710 qdio_kick_outbound_q(q);
711 siga_attempts--;
712 }
713
714 if (qdio_has_outbound_q_moved(q))
715 qdio_kick_outbound_handler(q);
716
717 if (q->is_iqdio_q) {
718 /*
719 * for asynchronous queues, we better check, if the fill
720 * level is too high. for synchronous queues, the fill
721 * level will never be that high.
722 */
723 if (atomic_read(&q->number_of_buffers_used)>
724 IQDIO_FILL_LEVEL_TO_POLL)
725 qdio_mark_q(q);
726
727 } else if (!q->hydra_gives_outbound_pcis)
728 if (!qdio_is_outbound_q_done(q))
729 qdio_mark_q(q);
730
731 qdio_release_q(q);
732}
733
734static void
735qdio_outbound_processing(struct qdio_q *q)
736{
737 __qdio_outbound_processing(q);
738}
739
740/************************* INBOUND ROUTINES *******************************/
741
742
743inline static int
744qdio_get_inbound_buffer_frontier(struct qdio_q *q)
745{
746 int f,f_mod_no;
747 volatile char *slsb;
748 int first_not_to_check;
749#ifdef CONFIG_QDIO_DEBUG
750 char dbf_text[15];
751#endif /* CONFIG_QDIO_DEBUG */
752#ifdef QDIO_USE_PROCESSING_STATE
753 int last_position=-1;
754#endif /* QDIO_USE_PROCESSING_STATE */
755
756 QDIO_DBF_TEXT4(0,trace,"getibfro");
757 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
758
759 slsb=&q->slsb.acc.val[0];
760 f_mod_no=f=q->first_to_check;
761 /*
762 * we don't check 128 buffers, as otherwise qdio_has_inbound_q_moved
763 * would return 0
764 */
765 first_not_to_check=f+qdio_min(atomic_read(&q->number_of_buffers_used),
766 (QDIO_MAX_BUFFERS_PER_Q-1));
767
768 /*
769 * we don't use this one, as a PCI or we after a thin interrupt
770 * will sync the queues
771 */
772 /* SYNC_MEMORY;*/
773
774check_next:
775 f_mod_no=f&(QDIO_MAX_BUFFERS_PER_Q-1);
776 if (f==first_not_to_check)
777 goto out;
778 switch (slsb[f_mod_no]) {
779
780 /* CU_EMPTY means frontier is reached */
781 case SLSB_CU_INPUT_EMPTY:
782 QDIO_DBF_TEXT5(0,trace,"inptempt");
783 break;
784
785 /* P_PRIMED means set slsb to P_PROCESSING and move on */
786 case SLSB_P_INPUT_PRIMED:
787 QDIO_DBF_TEXT5(0,trace,"inptprim");
788
789#ifdef QDIO_USE_PROCESSING_STATE
790 /*
791 * as soon as running under VM, polling the input queues will
792 * kill VM in terms of CP overhead
793 */
794 if (q->siga_sync) {
795 set_slsb(&slsb[f_mod_no],SLSB_P_INPUT_NOT_INIT);
796 } else {
797 /* set the previous buffer to NOT_INIT. The current
798 * buffer will be set to PROCESSING at the end of
799 * this function to avoid further interrupts. */
800 if (last_position>=0)
801 set_slsb(&slsb[last_position],
802 SLSB_P_INPUT_NOT_INIT);
803 atomic_set(&q->polling,1);
804 last_position=f_mod_no;
805 }
806#else /* QDIO_USE_PROCESSING_STATE */
807 set_slsb(&slsb[f_mod_no],SLSB_P_INPUT_NOT_INIT);
808#endif /* QDIO_USE_PROCESSING_STATE */
809 /*
810 * not needed, as the inbound queue will be synced on the next
811 * siga-r, resp. tiqdio_is_inbound_q_done will do the siga-s
812 */
813 /*SYNC_MEMORY;*/
814 f++;
815 atomic_dec(&q->number_of_buffers_used);
816 goto check_next;
817
818 case SLSB_P_INPUT_NOT_INIT:
819 case SLSB_P_INPUT_PROCESSING:
820 QDIO_DBF_TEXT5(0,trace,"inpnipro");
821 break;
822
823 /* P_ERROR means frontier is reached, break and report error */
824 case SLSB_P_INPUT_ERROR:
825#ifdef CONFIG_QDIO_DEBUG
826 sprintf(dbf_text,"inperr%2x",f_mod_no);
827 QDIO_DBF_TEXT3(1,trace,dbf_text);
828#endif /* CONFIG_QDIO_DEBUG */
829 QDIO_DBF_HEX2(1,sbal,q->sbal[f_mod_no],256);
830
831 /* kind of process the buffer */
832 set_slsb(&slsb[f_mod_no],SLSB_P_INPUT_NOT_INIT);
833
834 if (q->qdio_error)
835 q->error_status_flags|=
836 QDIO_STATUS_MORE_THAN_ONE_QDIO_ERROR;
837 q->qdio_error=SLSB_P_INPUT_ERROR;
838 q->error_status_flags|=QDIO_STATUS_LOOK_FOR_ERROR;
839
840 /* we increment the frontier, as this buffer
841 * was processed obviously */
842 f_mod_no=(f_mod_no+1)&(QDIO_MAX_BUFFERS_PER_Q-1);
843 atomic_dec(&q->number_of_buffers_used);
844
845#ifdef QDIO_USE_PROCESSING_STATE
846 last_position=-1;
847#endif /* QDIO_USE_PROCESSING_STATE */
848
849 break;
850
851 /* everything else means frontier not changed (HALTED or so) */
852 default:
853 break;
854 }
855out:
856 q->first_to_check=f_mod_no;
857
858#ifdef QDIO_USE_PROCESSING_STATE
859 if (last_position>=0)
860 set_slsb(&slsb[last_position],SLSB_P_INPUT_PROCESSING);
861#endif /* QDIO_USE_PROCESSING_STATE */
862
863 QDIO_DBF_HEX4(0,trace,&q->first_to_check,sizeof(int));
864
865 return q->first_to_check;
866}
867
868inline static int
869qdio_has_inbound_q_moved(struct qdio_q *q)
870{
871 int i;
872
873#ifdef QDIO_PERFORMANCE_STATS
874 static int old_pcis=0;
875 static int old_thinints=0;
876
877 if ((old_pcis==perf_stats.pcis)&&(old_thinints==perf_stats.thinints))
878 perf_stats.start_time_inbound=NOW;
879 else
880 old_pcis=perf_stats.pcis;
881#endif /* QDIO_PERFORMANCE_STATS */
882
883 i=qdio_get_inbound_buffer_frontier(q);
884 if ( (i!=GET_SAVED_FRONTIER(q)) ||
885 (q->error_status_flags&QDIO_STATUS_LOOK_FOR_ERROR) ) {
886 SAVE_FRONTIER(q,i);
887 if ((!q->siga_sync)&&(!q->hydra_gives_outbound_pcis))
888 SAVE_TIMESTAMP(q);
889
890 QDIO_DBF_TEXT4(0,trace,"inhasmvd");
891 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
892 return 1;
893 } else {
894 QDIO_DBF_TEXT4(0,trace,"inhsntmv");
895 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
896 return 0;
897 }
898}
899
900/* means, no more buffers to be filled */
901inline static int
902tiqdio_is_inbound_q_done(struct qdio_q *q)
903{
904 int no_used;
905#ifdef CONFIG_QDIO_DEBUG
906 char dbf_text[15];
907#endif
908
909 no_used=atomic_read(&q->number_of_buffers_used);
910
911 /* propagate the change from 82 to 80 through VM */
912 SYNC_MEMORY;
913
914#ifdef CONFIG_QDIO_DEBUG
915 if (no_used) {
916 sprintf(dbf_text,"iqisnt%02x",no_used);
917 QDIO_DBF_TEXT4(0,trace,dbf_text);
918 } else {
919 QDIO_DBF_TEXT4(0,trace,"iniqisdo");
920 }
921 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
922#endif /* CONFIG_QDIO_DEBUG */
923
924 if (!no_used)
925 return 1;
926
927 if (!q->siga_sync)
928 /* we'll check for more primed buffers in qeth_stop_polling */
929 return 0;
930
931 if (q->slsb.acc.val[q->first_to_check]!=SLSB_P_INPUT_PRIMED)
932 /*
933 * nothing more to do, if next buffer is not PRIMED.
934 * note that we did a SYNC_MEMORY before, that there
935 * has been a sychnronization.
936 * we will return 0 below, as there is nothing to do
937 * (stop_polling not necessary, as we have not been
938 * using the PROCESSING state
939 */
940 return 0;
941
942 /*
943 * ok, the next input buffer is primed. that means, that device state
944 * change indicator and adapter local summary are set, so we will find
945 * it next time.
946 * we will return 0 below, as there is nothing to do, except scheduling
947 * ourselves for the next time.
948 */
949 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
950 tiqdio_sched_tl();
951 return 0;
952}
953
954inline static int
955qdio_is_inbound_q_done(struct qdio_q *q)
956{
957 int no_used;
958#ifdef CONFIG_QDIO_DEBUG
959 char dbf_text[15];
960#endif
961
962 no_used=atomic_read(&q->number_of_buffers_used);
963
964 /*
965 * we need that one for synchronization with the adapter, as it
966 * does a kind of PCI avoidance
967 */
968 SYNC_MEMORY;
969
970 if (!no_used) {
971 QDIO_DBF_TEXT4(0,trace,"inqisdnA");
972 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
973 QDIO_DBF_TEXT4(0,trace,dbf_text);
974 return 1;
975 }
976
977 if (q->slsb.acc.val[q->first_to_check]==SLSB_P_INPUT_PRIMED) {
978 /* we got something to do */
979 QDIO_DBF_TEXT4(0,trace,"inqisntA");
980 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
981 return 0;
982 }
983
984 /* on VM, we don't poll, so the q is always done here */
985 if (q->siga_sync)
986 return 1;
987 if (q->hydra_gives_outbound_pcis)
988 return 1;
989
990 /*
991 * at this point we know, that inbound first_to_check
992 * has (probably) not moved (see qdio_inbound_processing)
993 */
994 if (NOW>GET_SAVED_TIMESTAMP(q)+q->timing.threshold) {
995#ifdef CONFIG_QDIO_DEBUG
996 QDIO_DBF_TEXT4(0,trace,"inqisdon");
997 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
998 sprintf(dbf_text,"pf%02xcn%02x",q->first_to_check,no_used);
999 QDIO_DBF_TEXT4(0,trace,dbf_text);
1000#endif /* CONFIG_QDIO_DEBUG */
1001 return 1;
1002 } else {
1003#ifdef CONFIG_QDIO_DEBUG
1004 QDIO_DBF_TEXT4(0,trace,"inqisntd");
1005 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1006 sprintf(dbf_text,"pf%02xcn%02x",q->first_to_check,no_used);
1007 QDIO_DBF_TEXT4(0,trace,dbf_text);
1008#endif /* CONFIG_QDIO_DEBUG */
1009 return 0;
1010 }
1011}
1012
1013inline static void
1014qdio_kick_inbound_handler(struct qdio_q *q)
1015{
1016 int count, start, end, real_end, i;
1017#ifdef CONFIG_QDIO_DEBUG
1018 char dbf_text[15];
1019#endif
1020
1021 QDIO_DBF_TEXT4(0,trace,"kickinh");
1022 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1023
1024 start=q->first_element_to_kick;
1025 real_end=q->first_to_check;
1026 end=(real_end+QDIO_MAX_BUFFERS_PER_Q-1)&(QDIO_MAX_BUFFERS_PER_Q-1);
1027
1028 i=start;
1029 count=0;
1030 while (1) {
1031 count++;
1032 if (i==end)
1033 break;
1034 i=(i+1)&(QDIO_MAX_BUFFERS_PER_Q-1);
1035 }
1036
1037#ifdef CONFIG_QDIO_DEBUG
1038 sprintf(dbf_text,"s=%2xc=%2x",start,count);
1039 QDIO_DBF_TEXT4(0,trace,dbf_text);
1040#endif /* CONFIG_QDIO_DEBUG */
1041
1042 if (likely(q->state==QDIO_IRQ_STATE_ACTIVE))
1043 q->handler(q->cdev,
1044 QDIO_STATUS_INBOUND_INT|q->error_status_flags,
1045 q->qdio_error,q->siga_error,q->q_no,start,count,
1046 q->int_parm);
1047
1048 /* for the next time: */
1049 q->first_element_to_kick=real_end;
1050 q->qdio_error=0;
1051 q->siga_error=0;
1052 q->error_status_flags=0;
1053
1054#ifdef QDIO_PERFORMANCE_STATS
1055 perf_stats.inbound_time+=NOW-perf_stats.start_time_inbound;
1056 perf_stats.inbound_cnt++;
1057#endif /* QDIO_PERFORMANCE_STATS */
1058}
1059
1060static inline void
1061__tiqdio_inbound_processing(struct qdio_q *q, int spare_ind_was_set)
1062{
1063 struct qdio_irq *irq_ptr;
1064 struct qdio_q *oq;
1065 int i;
1066
1067 QDIO_DBF_TEXT4(0,trace,"iqinproc");
1068 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1069
1070 /*
1071 * we first want to reserve the q, so that we know, that we don't
1072 * interrupt ourselves and call qdio_unmark_q, as is_in_shutdown might
1073 * be set
1074 */
1075 if (unlikely(qdio_reserve_q(q))) {
1076 qdio_release_q(q);
1077#ifdef QDIO_PERFORMANCE_STATS
1078 ii_p_c++;
1079#endif /* QDIO_PERFORMANCE_STATS */
1080 /*
1081 * as we might just be about to stop polling, we make
1082 * sure that we check again at least once more
1083 */
1084 tiqdio_sched_tl();
1085 return;
1086 }
1087#ifdef QDIO_PERFORMANCE_STATS
1088 ii_p_nc++;
1089#endif /* QDIO_PERFORMANCE_STATS */
1090 if (unlikely(atomic_read(&q->is_in_shutdown))) {
1091 qdio_unmark_q(q);
1092 goto out;
1093 }
1094
1095 /*
1096 * we reset spare_ind_was_set, when the queue does not use the
1097 * spare indicator
1098 */
1099 if (spare_ind_was_set)
1100 spare_ind_was_set = (q->dev_st_chg_ind == &spare_indicator);
1101
1102 if (!(*(q->dev_st_chg_ind)) && !spare_ind_was_set)
1103 goto out;
1104 /*
1105 * q->dev_st_chg_ind is the indicator, be it shared or not.
1106 * only clear it, if indicator is non-shared
1107 */
1108 if (!spare_ind_was_set)
1109 tiqdio_clear_summary_bit((__u32*)q->dev_st_chg_ind);
1110
1111 if (q->hydra_gives_outbound_pcis) {
1112 if (!q->siga_sync_done_on_thinints) {
1113 SYNC_MEMORY_ALL;
1114 } else if ((!q->siga_sync_done_on_outb_tis)&&
1115 (q->hydra_gives_outbound_pcis)) {
1116 SYNC_MEMORY_ALL_OUTB;
1117 }
1118 } else {
1119 SYNC_MEMORY;
1120 }
1121 /*
1122 * maybe we have to do work on our outbound queues... at least
1123 * we have to check the outbound-int-capable thinint-capable
1124 * queues
1125 */
1126 if (q->hydra_gives_outbound_pcis) {
1127 irq_ptr = (struct qdio_irq*)q->irq_ptr;
1128 for (i=0;i<irq_ptr->no_output_qs;i++) {
1129 oq = irq_ptr->output_qs[i];
1130#ifdef QDIO_PERFORMANCE_STATS
1131 perf_stats.tl_runs--;
1132#endif /* QDIO_PERFORMANCE_STATS */
1133 if (!qdio_is_outbound_q_done(oq))
1134 __qdio_outbound_processing(oq);
1135 }
1136 }
1137
1138 if (!qdio_has_inbound_q_moved(q))
1139 goto out;
1140
1141 qdio_kick_inbound_handler(q);
1142 if (tiqdio_is_inbound_q_done(q))
1143 if (!qdio_stop_polling(q)) {
1144 /*
1145 * we set the flags to get into the stuff next time,
1146 * see also comment in qdio_stop_polling
1147 */
1148 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1149 tiqdio_sched_tl();
1150 }
1151out:
1152 qdio_release_q(q);
1153}
1154
1155static void
1156tiqdio_inbound_processing(struct qdio_q *q)
1157{
1158 __tiqdio_inbound_processing(q, atomic_read(&spare_indicator_usecount));
1159}
1160
1161static inline void
1162__qdio_inbound_processing(struct qdio_q *q)
1163{
1164 int q_laps=0;
1165
1166 QDIO_DBF_TEXT4(0,trace,"qinproc");
1167 QDIO_DBF_HEX4(0,trace,&q,sizeof(void*));
1168
1169 if (unlikely(qdio_reserve_q(q))) {
1170 qdio_release_q(q);
1171#ifdef QDIO_PERFORMANCE_STATS
1172 i_p_c++;
1173#endif /* QDIO_PERFORMANCE_STATS */
1174 /* as we're sissies, we'll check next time */
1175 if (likely(!atomic_read(&q->is_in_shutdown))) {
1176 qdio_mark_q(q);
1177 QDIO_DBF_TEXT4(0,trace,"busy,agn");
1178 }
1179 return;
1180 }
1181#ifdef QDIO_PERFORMANCE_STATS
1182 i_p_nc++;
1183 perf_stats.tl_runs++;
1184#endif /* QDIO_PERFORMANCE_STATS */
1185
1186again:
1187 if (qdio_has_inbound_q_moved(q)) {
1188 qdio_kick_inbound_handler(q);
1189 if (!qdio_stop_polling(q)) {
1190 q_laps++;
1191 if (q_laps<QDIO_Q_LAPS)
1192 goto again;
1193 }
1194 qdio_mark_q(q);
1195 } else {
1196 if (!qdio_is_inbound_q_done(q))
1197 /* means poll time is not yet over */
1198 qdio_mark_q(q);
1199 }
1200
1201 qdio_release_q(q);
1202}
1203
1204static void
1205qdio_inbound_processing(struct qdio_q *q)
1206{
1207 __qdio_inbound_processing(q);
1208}
1209
1210/************************* MAIN ROUTINES *******************************/
1211
1212#ifdef QDIO_USE_PROCESSING_STATE
1213static inline int
1214tiqdio_reset_processing_state(struct qdio_q *q, int q_laps)
1215{
1216 if (!q) {
1217 tiqdio_sched_tl();
1218 return 0;
1219 }
1220
1221 /*
1222 * under VM, we have not used the PROCESSING state, so no
1223 * need to stop polling
1224 */
1225 if (q->siga_sync)
1226 return 2;
1227
1228 if (unlikely(qdio_reserve_q(q))) {
1229 qdio_release_q(q);
1230#ifdef QDIO_PERFORMANCE_STATS
1231 ii_p_c++;
1232#endif /* QDIO_PERFORMANCE_STATS */
1233 /*
1234 * as we might just be about to stop polling, we make
1235 * sure that we check again at least once more
1236 */
1237
1238 /*
1239 * sanity -- we'd get here without setting the
1240 * dev st chg ind
1241 */
1242 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1243 tiqdio_sched_tl();
1244 return 0;
1245 }
1246 if (qdio_stop_polling(q)) {
1247 qdio_release_q(q);
1248 return 2;
1249 }
1250 if (q_laps<QDIO_Q_LAPS-1) {
1251 qdio_release_q(q);
1252 return 3;
1253 }
1254 /*
1255 * we set the flags to get into the stuff
1256 * next time, see also comment in qdio_stop_polling
1257 */
1258 tiqdio_set_summary_bit((__u32*)q->dev_st_chg_ind);
1259 tiqdio_sched_tl();
1260 qdio_release_q(q);
1261 return 1;
1262
1263}
1264#endif /* QDIO_USE_PROCESSING_STATE */
1265
1266static inline void
1267tiqdio_inbound_checks(void)
1268{
1269 struct qdio_q *q;
1270 int spare_ind_was_set=0;
1271#ifdef QDIO_USE_PROCESSING_STATE
1272 int q_laps=0;
1273#endif /* QDIO_USE_PROCESSING_STATE */
1274
1275 QDIO_DBF_TEXT4(0,trace,"iqdinbck");
1276 QDIO_DBF_TEXT5(0,trace,"iqlocsum");
1277
1278#ifdef QDIO_USE_PROCESSING_STATE
1279again:
1280#endif /* QDIO_USE_PROCESSING_STATE */
1281
1282 /* when the spare indicator is used and set, save that and clear it */
1283 if ((atomic_read(&spare_indicator_usecount)) && spare_indicator) {
1284 spare_ind_was_set = 1;
1285 tiqdio_clear_summary_bit((__u32*)&spare_indicator);
1286 }
1287
1288 q=(struct qdio_q*)tiq_list;
1289 do {
1290 if (!q)
1291 break;
1292 __tiqdio_inbound_processing(q, spare_ind_was_set);
1293 q=(struct qdio_q*)q->list_next;
1294 } while (q!=(struct qdio_q*)tiq_list);
1295
1296#ifdef QDIO_USE_PROCESSING_STATE
1297 q=(struct qdio_q*)tiq_list;
1298 do {
1299 int ret;
1300
1301 ret = tiqdio_reset_processing_state(q, q_laps);
1302 switch (ret) {
1303 case 0:
1304 return;
1305 case 1:
1306 q_laps++;
1307 case 2:
1308 q = (struct qdio_q*)q->list_next;
1309 break;
1310 default:
1311 q_laps++;
1312 goto again;
1313 }
1314 } while (q!=(struct qdio_q*)tiq_list);
1315#endif /* QDIO_USE_PROCESSING_STATE */
1316}
1317
1318static void
1319tiqdio_tl(unsigned long data)
1320{
1321 QDIO_DBF_TEXT4(0,trace,"iqdio_tl");
1322
1323#ifdef QDIO_PERFORMANCE_STATS
1324 perf_stats.tl_runs++;
1325#endif /* QDIO_PERFORMANCE_STATS */
1326
1327 tiqdio_inbound_checks();
1328}
1329
1330/********************* GENERAL HELPER_ROUTINES ***********************/
1331
1332static void
1333qdio_release_irq_memory(struct qdio_irq *irq_ptr)
1334{
1335 int i;
1336
1337 for (i=0;i<QDIO_MAX_QUEUES_PER_IRQ;i++) {
1338 if (!irq_ptr->input_qs[i])
1339 goto next;
1340
1341 if (irq_ptr->input_qs[i]->slib)
1342 kfree(irq_ptr->input_qs[i]->slib);
1343 kfree(irq_ptr->input_qs[i]);
1344
1345next:
1346 if (!irq_ptr->output_qs[i])
1347 continue;
1348
1349 if (irq_ptr->output_qs[i]->slib)
1350 kfree(irq_ptr->output_qs[i]->slib);
1351 kfree(irq_ptr->output_qs[i]);
1352
1353 }
1354 kfree(irq_ptr->qdr);
1355 kfree(irq_ptr);
1356}
1357
1358static void
1359qdio_set_impl_params(struct qdio_irq *irq_ptr,
1360 unsigned int qib_param_field_format,
1361 /* pointer to 128 bytes or NULL, if no param field */
1362 unsigned char *qib_param_field,
1363 /* pointer to no_queues*128 words of data or NULL */
1364 unsigned int no_input_qs,
1365 unsigned int no_output_qs,
1366 unsigned long *input_slib_elements,
1367 unsigned long *output_slib_elements)
1368{
1369 int i,j;
1370
1371 if (!irq_ptr)
1372 return;
1373
1374 irq_ptr->qib.pfmt=qib_param_field_format;
1375 if (qib_param_field)
1376 memcpy(irq_ptr->qib.parm,qib_param_field,
1377 QDIO_MAX_BUFFERS_PER_Q);
1378
1379 if (input_slib_elements)
1380 for (i=0;i<no_input_qs;i++) {
1381 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1382 irq_ptr->input_qs[i]->slib->slibe[j].parms=
1383 input_slib_elements[
1384 i*QDIO_MAX_BUFFERS_PER_Q+j];
1385 }
1386 if (output_slib_elements)
1387 for (i=0;i<no_output_qs;i++) {
1388 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1389 irq_ptr->output_qs[i]->slib->slibe[j].parms=
1390 output_slib_elements[
1391 i*QDIO_MAX_BUFFERS_PER_Q+j];
1392 }
1393}
1394
1395static int
1396qdio_alloc_qs(struct qdio_irq *irq_ptr,
1397 int no_input_qs, int no_output_qs)
1398{
1399 int i;
1400 struct qdio_q *q;
1401 int result=-ENOMEM;
1402
1403 for (i=0;i<no_input_qs;i++) {
1404 q=kmalloc(sizeof(struct qdio_q),GFP_KERNEL);
1405
1406 if (!q) {
1407 QDIO_PRINT_ERR("kmalloc of q failed!\n");
1408 goto out;
1409 }
1410
1411 memset(q,0,sizeof(struct qdio_q));
1412
1413 q->slib=kmalloc(PAGE_SIZE,GFP_KERNEL);
1414 if (!q->slib) {
1415 QDIO_PRINT_ERR("kmalloc of slib failed!\n");
1416 goto out;
1417 }
1418
1419 irq_ptr->input_qs[i]=q;
1420 }
1421
1422 for (i=0;i<no_output_qs;i++) {
1423 q=kmalloc(sizeof(struct qdio_q),GFP_KERNEL);
1424
1425 if (!q) {
1426 goto out;
1427 }
1428
1429 memset(q,0,sizeof(struct qdio_q));
1430
1431 q->slib=kmalloc(PAGE_SIZE,GFP_KERNEL);
1432 if (!q->slib) {
1433 QDIO_PRINT_ERR("kmalloc of slib failed!\n");
1434 goto out;
1435 }
1436
1437 irq_ptr->output_qs[i]=q;
1438 }
1439
1440 result=0;
1441out:
1442 return result;
1443}
1444
1445static void
1446qdio_fill_qs(struct qdio_irq *irq_ptr, struct ccw_device *cdev,
1447 int no_input_qs, int no_output_qs,
1448 qdio_handler_t *input_handler,
1449 qdio_handler_t *output_handler,
1450 unsigned long int_parm,int q_format,
1451 unsigned long flags,
1452 void **inbound_sbals_array,
1453 void **outbound_sbals_array)
1454{
1455 struct qdio_q *q;
1456 int i,j;
1457 char dbf_text[20]; /* see qdio_initialize */
1458 void *ptr;
1459 int available;
1460
1461 sprintf(dbf_text,"qfqs%4x",cdev->private->irq);
1462 QDIO_DBF_TEXT0(0,setup,dbf_text);
1463 for (i=0;i<no_input_qs;i++) {
1464 q=irq_ptr->input_qs[i];
1465
1466 memset(q,0,((char*)&q->slib)-((char*)q));
1467 sprintf(dbf_text,"in-q%4x",i);
1468 QDIO_DBF_TEXT0(0,setup,dbf_text);
1469 QDIO_DBF_HEX0(0,setup,&q,sizeof(void*));
1470
1471 memset(q->slib,0,PAGE_SIZE);
1472 q->sl=(struct sl*)(((char*)q->slib)+PAGE_SIZE/2);
1473
1474 available=0;
1475
1476 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1477 q->sbal[j]=*(inbound_sbals_array++);
1478
1479 q->queue_type=q_format;
1480 q->int_parm=int_parm;
1481 q->irq=irq_ptr->irq;
1482 q->irq_ptr = irq_ptr;
1483 q->cdev = cdev;
1484 q->mask=1<<(31-i);
1485 q->q_no=i;
1486 q->is_input_q=1;
1487 q->first_to_check=0;
1488 q->last_move_ftc=0;
1489 q->handler=input_handler;
1490 q->dev_st_chg_ind=irq_ptr->dev_st_chg_ind;
1491
1492 q->tasklet.data=(unsigned long)q;
1493 /* q->is_thinint_q isn't valid at this time, but
1494 * irq_ptr->is_thinint_irq is */
1495 q->tasklet.func=(void(*)(unsigned long))
1496 ((irq_ptr->is_thinint_irq)?&tiqdio_inbound_processing:
1497 &qdio_inbound_processing);
1498
1499 /* actually this is not used for inbound queues. yet. */
1500 atomic_set(&q->busy_siga_counter,0);
1501 q->timing.busy_start=0;
1502
1503/* for (j=0;j<QDIO_STATS_NUMBER;j++)
1504 q->timing.last_transfer_times[j]=(qdio_get_micros()/
1505 QDIO_STATS_NUMBER)*j;
1506 q->timing.last_transfer_index=QDIO_STATS_NUMBER-1;
1507*/
1508
1509 /* fill in slib */
1510 if (i>0) irq_ptr->input_qs[i-1]->slib->nsliba=
1511 (unsigned long)(q->slib);
1512 q->slib->sla=(unsigned long)(q->sl);
1513 q->slib->slsba=(unsigned long)(&q->slsb.acc.val[0]);
1514
1515 /* fill in sl */
1516 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1517 q->sl->element[j].sbal=(unsigned long)(q->sbal[j]);
1518
1519 QDIO_DBF_TEXT2(0,setup,"sl-sb-b0");
1520 ptr=(void*)q->sl;
1521 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1522 ptr=(void*)&q->slsb;
1523 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1524 ptr=(void*)q->sbal[0];
1525 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1526
1527 /* fill in slsb */
1528 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++) {
1529 set_slsb(&q->slsb.acc.val[j],
1530 SLSB_P_INPUT_NOT_INIT);
1531/* q->sbal[j]->element[1].sbalf.i1.key=QDIO_STORAGE_KEY;*/
1532 }
1533 }
1534
1535 for (i=0;i<no_output_qs;i++) {
1536 q=irq_ptr->output_qs[i];
1537 memset(q,0,((char*)&q->slib)-((char*)q));
1538
1539 sprintf(dbf_text,"outq%4x",i);
1540 QDIO_DBF_TEXT0(0,setup,dbf_text);
1541 QDIO_DBF_HEX0(0,setup,&q,sizeof(void*));
1542
1543 memset(q->slib,0,PAGE_SIZE);
1544 q->sl=(struct sl*)(((char*)q->slib)+PAGE_SIZE/2);
1545
1546 available=0;
1547
1548 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1549 q->sbal[j]=*(outbound_sbals_array++);
1550
1551 q->queue_type=q_format;
1552 q->int_parm=int_parm;
1553 q->is_input_q=0;
1554 q->irq=irq_ptr->irq;
1555 q->cdev = cdev;
1556 q->irq_ptr = irq_ptr;
1557 q->mask=1<<(31-i);
1558 q->q_no=i;
1559 q->first_to_check=0;
1560 q->last_move_ftc=0;
1561 q->handler=output_handler;
1562
1563 q->tasklet.data=(unsigned long)q;
1564 q->tasklet.func=(void(*)(unsigned long))
1565 &qdio_outbound_processing;
1566
1567 atomic_set(&q->busy_siga_counter,0);
1568 q->timing.busy_start=0;
1569
1570 /* fill in slib */
1571 if (i>0) irq_ptr->output_qs[i-1]->slib->nsliba=
1572 (unsigned long)(q->slib);
1573 q->slib->sla=(unsigned long)(q->sl);
1574 q->slib->slsba=(unsigned long)(&q->slsb.acc.val[0]);
1575
1576 /* fill in sl */
1577 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++)
1578 q->sl->element[j].sbal=(unsigned long)(q->sbal[j]);
1579
1580 QDIO_DBF_TEXT2(0,setup,"sl-sb-b0");
1581 ptr=(void*)q->sl;
1582 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1583 ptr=(void*)&q->slsb;
1584 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1585 ptr=(void*)q->sbal[0];
1586 QDIO_DBF_HEX2(0,setup,&ptr,sizeof(void*));
1587
1588 /* fill in slsb */
1589 for (j=0;j<QDIO_MAX_BUFFERS_PER_Q;j++) {
1590 set_slsb(&q->slsb.acc.val[j],
1591 SLSB_P_OUTPUT_NOT_INIT);
1592/* q->sbal[j]->element[1].sbalf.i1.key=QDIO_STORAGE_KEY;*/
1593 }
1594 }
1595}
1596
1597static void
1598qdio_fill_thresholds(struct qdio_irq *irq_ptr,
1599 unsigned int no_input_qs,
1600 unsigned int no_output_qs,
1601 unsigned int min_input_threshold,
1602 unsigned int max_input_threshold,
1603 unsigned int min_output_threshold,
1604 unsigned int max_output_threshold)
1605{
1606 int i;
1607 struct qdio_q *q;
1608
1609 for (i=0;i<no_input_qs;i++) {
1610 q=irq_ptr->input_qs[i];
1611 q->timing.threshold=max_input_threshold;
1612/* for (j=0;j<QDIO_STATS_CLASSES;j++) {
1613 q->threshold_classes[j].threshold=
1614 min_input_threshold+
1615 (max_input_threshold-min_input_threshold)/
1616 QDIO_STATS_CLASSES;
1617 }
1618 qdio_use_thresholds(q,QDIO_STATS_CLASSES/2);*/
1619 }
1620 for (i=0;i<no_output_qs;i++) {
1621 q=irq_ptr->output_qs[i];
1622 q->timing.threshold=max_output_threshold;
1623/* for (j=0;j<QDIO_STATS_CLASSES;j++) {
1624 q->threshold_classes[j].threshold=
1625 min_output_threshold+
1626 (max_output_threshold-min_output_threshold)/
1627 QDIO_STATS_CLASSES;
1628 }
1629 qdio_use_thresholds(q,QDIO_STATS_CLASSES/2);*/
1630 }
1631}
1632
1633static int
1634tiqdio_thinint_handler(void)
1635{
1636 QDIO_DBF_TEXT4(0,trace,"thin_int");
1637
1638#ifdef QDIO_PERFORMANCE_STATS
1639 perf_stats.thinints++;
1640 perf_stats.start_time_inbound=NOW;
1641#endif /* QDIO_PERFORMANCE_STATS */
1642
1643 /* SVS only when needed:
1644 * issue SVS to benefit from iqdio interrupt avoidance
1645 * (SVS clears AISOI)*/
1646 if (!omit_svs)
1647 tiqdio_clear_global_summary();
1648
1649 tiqdio_inbound_checks();
1650 return 0;
1651}
1652
1653static void
1654qdio_set_state(struct qdio_irq *irq_ptr, enum qdio_irq_states state)
1655{
1656 int i;
1657#ifdef CONFIG_QDIO_DEBUG
1658 char dbf_text[15];
1659
1660 QDIO_DBF_TEXT5(0,trace,"newstate");
1661 sprintf(dbf_text,"%4x%4x",irq_ptr->irq,state);
1662 QDIO_DBF_TEXT5(0,trace,dbf_text);
1663#endif /* CONFIG_QDIO_DEBUG */
1664
1665 irq_ptr->state=state;
1666 for (i=0;i<irq_ptr->no_input_qs;i++)
1667 irq_ptr->input_qs[i]->state=state;
1668 for (i=0;i<irq_ptr->no_output_qs;i++)
1669 irq_ptr->output_qs[i]->state=state;
1670 mb();
1671}
1672
1673static inline void
1674qdio_irq_check_sense(int irq, struct irb *irb)
1675{
1676 char dbf_text[15];
1677
1678 if (irb->esw.esw0.erw.cons) {
1679 sprintf(dbf_text,"sens%4x",irq);
1680 QDIO_DBF_TEXT2(1,trace,dbf_text);
1681 QDIO_DBF_HEX0(0,sense,irb,QDIO_DBF_SENSE_LEN);
1682
1683 QDIO_PRINT_WARN("sense data available on qdio channel.\n");
1684 HEXDUMP16(WARN,"irb: ",irb);
1685 HEXDUMP16(WARN,"sense data: ",irb->ecw);
1686 }
1687
1688}
1689
1690static inline void
1691qdio_handle_pci(struct qdio_irq *irq_ptr)
1692{
1693 int i;
1694 struct qdio_q *q;
1695
1696#ifdef QDIO_PERFORMANCE_STATS
1697 perf_stats.pcis++;
1698 perf_stats.start_time_inbound=NOW;
1699#endif /* QDIO_PERFORMANCE_STATS */
1700 for (i=0;i<irq_ptr->no_input_qs;i++) {
1701 q=irq_ptr->input_qs[i];
1702 if (q->is_input_q&QDIO_FLAG_NO_INPUT_INTERRUPT_CONTEXT)
1703 qdio_mark_q(q);
1704 else {
1705#ifdef QDIO_PERFORMANCE_STATS
1706 perf_stats.tl_runs--;
1707#endif /* QDIO_PERFORMANCE_STATS */
1708 __qdio_inbound_processing(q);
1709 }
1710 }
1711 if (!irq_ptr->hydra_gives_outbound_pcis)
1712 return;
1713 for (i=0;i<irq_ptr->no_output_qs;i++) {
1714 q=irq_ptr->output_qs[i];
1715#ifdef QDIO_PERFORMANCE_STATS
1716 perf_stats.tl_runs--;
1717#endif /* QDIO_PERFORMANCE_STATS */
1718 if (qdio_is_outbound_q_done(q))
1719 continue;
1720 if (!irq_ptr->sync_done_on_outb_pcis)
1721 SYNC_MEMORY;
1722 __qdio_outbound_processing(q);
1723 }
1724}
1725
1726static void qdio_establish_handle_irq(struct ccw_device*, int, int);
1727
1728static inline void
1729qdio_handle_activate_check(struct ccw_device *cdev, unsigned long intparm,
1730 int cstat, int dstat)
1731{
1732 struct qdio_irq *irq_ptr;
1733 struct qdio_q *q;
1734 char dbf_text[15];
1735
1736 irq_ptr = cdev->private->qdio_data;
1737
1738 QDIO_DBF_TEXT2(1, trace, "ick2");
1739 sprintf(dbf_text,"%s", cdev->dev.bus_id);
1740 QDIO_DBF_TEXT2(1,trace,dbf_text);
1741 QDIO_DBF_HEX2(0,trace,&intparm,sizeof(int));
1742 QDIO_DBF_HEX2(0,trace,&dstat,sizeof(int));
1743 QDIO_DBF_HEX2(0,trace,&cstat,sizeof(int));
1744 QDIO_PRINT_ERR("received check condition on activate " \
1745 "queues on device %s (cs=x%x, ds=x%x).\n",
1746 cdev->dev.bus_id, cstat, dstat);
1747 if (irq_ptr->no_input_qs) {
1748 q=irq_ptr->input_qs[0];
1749 } else if (irq_ptr->no_output_qs) {
1750 q=irq_ptr->output_qs[0];
1751 } else {
1752 QDIO_PRINT_ERR("oops... no queue registered for device %s!?\n",
1753 cdev->dev.bus_id);
1754 goto omit_handler_call;
1755 }
1756 q->handler(q->cdev,QDIO_STATUS_ACTIVATE_CHECK_CONDITION|
1757 QDIO_STATUS_LOOK_FOR_ERROR,
1758 0,0,0,-1,-1,q->int_parm);
1759omit_handler_call:
1760 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_STOPPED);
1761
1762}
1763
1764static void
1765qdio_call_shutdown(void *data)
1766{
1767 struct ccw_device *cdev;
1768
1769 cdev = (struct ccw_device *)data;
1770 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
1771 put_device(&cdev->dev);
1772}
1773
1774static void
1775qdio_timeout_handler(struct ccw_device *cdev)
1776{
1777 struct qdio_irq *irq_ptr;
1778 char dbf_text[15];
1779
1780 QDIO_DBF_TEXT2(0, trace, "qtoh");
1781 sprintf(dbf_text, "%s", cdev->dev.bus_id);
1782 QDIO_DBF_TEXT2(0, trace, dbf_text);
1783
1784 irq_ptr = cdev->private->qdio_data;
1785 sprintf(dbf_text, "state:%d", irq_ptr->state);
1786 QDIO_DBF_TEXT2(0, trace, dbf_text);
1787
1788 switch (irq_ptr->state) {
1789 case QDIO_IRQ_STATE_INACTIVE:
1790 QDIO_PRINT_ERR("establish queues on irq %04x: timed out\n",
1791 irq_ptr->irq);
1792 QDIO_DBF_TEXT2(1,setup,"eq:timeo");
1793 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
1794 break;
1795 case QDIO_IRQ_STATE_CLEANUP:
1796 QDIO_PRINT_INFO("Did not get interrupt on cleanup, irq=0x%x.\n",
1797 irq_ptr->irq);
1798 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
1799 break;
1800 case QDIO_IRQ_STATE_ESTABLISHED:
1801 case QDIO_IRQ_STATE_ACTIVE:
1802 /* I/O has been terminated by common I/O layer. */
1803 QDIO_PRINT_INFO("Queues on irq %04x killed by cio.\n",
1804 irq_ptr->irq);
1805 QDIO_DBF_TEXT2(1, trace, "cio:term");
1806 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
1807 if (get_device(&cdev->dev)) {
1808 /* Can't call shutdown from interrupt context. */
1809 PREPARE_WORK(&cdev->private->kick_work,
1810 qdio_call_shutdown, (void *)cdev);
1811 queue_work(ccw_device_work, &cdev->private->kick_work);
1812 }
1813 break;
1814 default:
1815 BUG();
1816 }
1817 ccw_device_set_timeout(cdev, 0);
1818 wake_up(&cdev->private->wait_q);
1819}
1820
1821static void
1822qdio_handler(struct ccw_device *cdev, unsigned long intparm, struct irb *irb)
1823{
1824 struct qdio_irq *irq_ptr;
1825 int cstat,dstat;
1826 char dbf_text[15];
1827
1828#ifdef CONFIG_QDIO_DEBUG
1829 QDIO_DBF_TEXT4(0, trace, "qint");
1830 sprintf(dbf_text, "%s", cdev->dev.bus_id);
1831 QDIO_DBF_TEXT4(0, trace, dbf_text);
1832#endif /* CONFIG_QDIO_DEBUG */
1833
1834 if (!intparm) {
1835 QDIO_PRINT_ERR("got unsolicited interrupt in qdio " \
1836 "handler, device %s\n", cdev->dev.bus_id);
1837 return;
1838 }
1839
1840 irq_ptr = cdev->private->qdio_data;
1841 if (!irq_ptr) {
1842 QDIO_DBF_TEXT2(1, trace, "uint");
1843 sprintf(dbf_text,"%s", cdev->dev.bus_id);
1844 QDIO_DBF_TEXT2(1,trace,dbf_text);
1845 QDIO_PRINT_ERR("received interrupt on unused device %s!\n",
1846 cdev->dev.bus_id);
1847 return;
1848 }
1849
1850 if (IS_ERR(irb)) {
1851 /* Currently running i/o is in error. */
1852 switch (PTR_ERR(irb)) {
1853 case -EIO:
1854 QDIO_PRINT_ERR("i/o error on device %s\n",
1855 cdev->dev.bus_id);
1856 return;
1857 case -ETIMEDOUT:
1858 qdio_timeout_handler(cdev);
1859 return;
1860 default:
1861 QDIO_PRINT_ERR("unknown error state %ld on device %s\n",
1862 PTR_ERR(irb), cdev->dev.bus_id);
1863 return;
1864 }
1865 }
1866
1867 qdio_irq_check_sense(irq_ptr->irq, irb);
1868
1869#ifdef CONFIG_QDIO_DEBUG
1870 sprintf(dbf_text, "state:%d", irq_ptr->state);
1871 QDIO_DBF_TEXT4(0, trace, dbf_text);
1872#endif /* CONFIG_QDIO_DEBUG */
1873
1874 cstat = irb->scsw.cstat;
1875 dstat = irb->scsw.dstat;
1876
1877 switch (irq_ptr->state) {
1878 case QDIO_IRQ_STATE_INACTIVE:
1879 qdio_establish_handle_irq(cdev, cstat, dstat);
1880 break;
1881
1882 case QDIO_IRQ_STATE_CLEANUP:
1883 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
1884 break;
1885
1886 case QDIO_IRQ_STATE_ESTABLISHED:
1887 case QDIO_IRQ_STATE_ACTIVE:
1888 if (cstat & SCHN_STAT_PCI) {
1889 qdio_handle_pci(irq_ptr);
1890 break;
1891 }
1892
1893 if ((cstat&~SCHN_STAT_PCI)||dstat) {
1894 qdio_handle_activate_check(cdev, intparm, cstat, dstat);
1895 break;
1896 }
1897 default:
1898 QDIO_PRINT_ERR("got interrupt for queues in state %d on " \
1899 "device %s?!\n",
1900 irq_ptr->state, cdev->dev.bus_id);
1901 }
1902 wake_up(&cdev->private->wait_q);
1903
1904}
1905
1906int
1907qdio_synchronize(struct ccw_device *cdev, unsigned int flags,
1908 unsigned int queue_number)
1909{
1910 int cc;
1911 struct qdio_q *q;
1912 struct qdio_irq *irq_ptr;
1913 void *ptr;
1914#ifdef CONFIG_QDIO_DEBUG
1915 char dbf_text[15]="SyncXXXX";
1916#endif
1917
1918 irq_ptr = cdev->private->qdio_data;
1919 if (!irq_ptr)
1920 return -ENODEV;
1921
1922#ifdef CONFIG_QDIO_DEBUG
1923 *((int*)(&dbf_text[4])) = irq_ptr->irq;
1924 QDIO_DBF_HEX4(0,trace,dbf_text,QDIO_DBF_TRACE_LEN);
1925 *((int*)(&dbf_text[0]))=flags;
1926 *((int*)(&dbf_text[4]))=queue_number;
1927 QDIO_DBF_HEX4(0,trace,dbf_text,QDIO_DBF_TRACE_LEN);
1928#endif /* CONFIG_QDIO_DEBUG */
1929
1930 if (flags&QDIO_FLAG_SYNC_INPUT) {
1931 q=irq_ptr->input_qs[queue_number];
1932 if (!q)
1933 return -EINVAL;
1934 cc = do_siga_sync(q->irq, 0, q->mask);
1935 } else if (flags&QDIO_FLAG_SYNC_OUTPUT) {
1936 q=irq_ptr->output_qs[queue_number];
1937 if (!q)
1938 return -EINVAL;
1939 cc = do_siga_sync(q->irq, q->mask, 0);
1940 } else
1941 return -EINVAL;
1942
1943 ptr=&cc;
1944 if (cc)
1945 QDIO_DBF_HEX3(0,trace,&ptr,sizeof(int));
1946
1947 return cc;
1948}
1949
1950static unsigned char
1951qdio_check_siga_needs(int sch)
1952{
1953 int result;
1954 unsigned char qdioac;
1955
1956 struct {
1957 struct chsc_header request;
1958 u16 reserved1;
1959 u16 first_sch;
1960 u16 reserved2;
1961 u16 last_sch;
1962 u32 reserved3;
1963 struct chsc_header response;
1964 u32 reserved4;
1965 u8 flags;
1966 u8 reserved5;
1967 u16 sch;
1968 u8 qfmt;
1969 u8 reserved6;
1970 u8 qdioac;
1971 u8 sch_class;
1972 u8 reserved7;
1973 u8 icnt;
1974 u8 reserved8;
1975 u8 ocnt;
1976 } *ssqd_area;
1977
1978 ssqd_area = (void *)get_zeroed_page(GFP_KERNEL | GFP_DMA);
1979 if (!ssqd_area) {
1980 QDIO_PRINT_WARN("Could not get memory for chsc. Using all " \
1981 "SIGAs for sch x%x.\n", sch);
1982 return CHSC_FLAG_SIGA_INPUT_NECESSARY ||
1983 CHSC_FLAG_SIGA_OUTPUT_NECESSARY ||
1984 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* all flags set */
1985 }
1986 ssqd_area->request = (struct chsc_header) {
1987 .length = 0x0010,
1988 .code = 0x0024,
1989 };
1990
1991 ssqd_area->first_sch = sch;
1992 ssqd_area->last_sch = sch;
1993
1994 result=chsc(ssqd_area);
1995
1996 if (result) {
1997 QDIO_PRINT_WARN("CHSC returned cc %i. Using all " \
1998 "SIGAs for sch x%x.\n",
1999 result,sch);
2000 qdioac = CHSC_FLAG_SIGA_INPUT_NECESSARY ||
2001 CHSC_FLAG_SIGA_OUTPUT_NECESSARY ||
2002 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* all flags set */
2003 goto out;
2004 }
2005
2006 if (ssqd_area->response.code != QDIO_CHSC_RESPONSE_CODE_OK) {
2007 QDIO_PRINT_WARN("response upon checking SIGA needs " \
2008 "is 0x%x. Using all SIGAs for sch x%x.\n",
2009 ssqd_area->response.code, sch);
2010 qdioac = CHSC_FLAG_SIGA_INPUT_NECESSARY ||
2011 CHSC_FLAG_SIGA_OUTPUT_NECESSARY ||
2012 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* all flags set */
2013 goto out;
2014 }
2015 if (!(ssqd_area->flags & CHSC_FLAG_QDIO_CAPABILITY) ||
2016 !(ssqd_area->flags & CHSC_FLAG_VALIDITY) ||
2017 (ssqd_area->sch != sch)) {
2018 QDIO_PRINT_WARN("huh? problems checking out sch x%x... " \
2019 "using all SIGAs.\n",sch);
2020 qdioac = CHSC_FLAG_SIGA_INPUT_NECESSARY |
2021 CHSC_FLAG_SIGA_OUTPUT_NECESSARY |
2022 CHSC_FLAG_SIGA_SYNC_NECESSARY; /* worst case */
2023 goto out;
2024 }
2025
2026 qdioac = ssqd_area->qdioac;
2027out:
2028 free_page ((unsigned long) ssqd_area);
2029 return qdioac;
2030}
2031
2032static unsigned int
2033tiqdio_check_chsc_availability(void)
2034{
2035 char dbf_text[15];
2036
2037 if (!css_characteristics_avail)
2038 return -EIO;
2039
2040 /* Check for bit 41. */
2041 if (!css_general_characteristics.aif) {
2042 QDIO_PRINT_WARN("Adapter interruption facility not " \
2043 "installed.\n");
2044 return -ENOENT;
2045 }
2046
2047 /* Check for bits 107 and 108. */
2048 if (!css_chsc_characteristics.scssc ||
2049 !css_chsc_characteristics.scsscf) {
2050 QDIO_PRINT_WARN("Set Chan Subsys. Char. & Fast-CHSCs " \
2051 "not available.\n");
2052 return -ENOENT;
2053 }
2054
2055 /* Check for OSA/FCP thin interrupts (bit 67). */
2056 hydra_thinints = css_general_characteristics.aif_osa;
2057 sprintf(dbf_text,"hydrati%1x", hydra_thinints);
2058 QDIO_DBF_TEXT0(0,setup,dbf_text);
2059
2060 /* Check for aif time delay disablement fac (bit 56). If installed,
2061 * omit svs even under lpar (good point by rick again) */
2062 omit_svs = css_general_characteristics.aif_tdd;
2063 sprintf(dbf_text,"omitsvs%1x", omit_svs);
2064 QDIO_DBF_TEXT0(0,setup,dbf_text);
2065 return 0;
2066}
2067
2068
2069static unsigned int
2070tiqdio_set_subchannel_ind(struct qdio_irq *irq_ptr, int reset_to_zero)
2071{
2072 unsigned long real_addr_local_summary_bit;
2073 unsigned long real_addr_dev_st_chg_ind;
2074 void *ptr;
2075 char dbf_text[15];
2076
2077 unsigned int resp_code;
2078 int result;
2079
2080 struct {
2081 struct chsc_header request;
2082 u16 operation_code;
2083 u16 reserved1;
2084 u32 reserved2;
2085 u32 reserved3;
2086 u64 summary_indicator_addr;
2087 u64 subchannel_indicator_addr;
2088 u32 ks:4;
2089 u32 kc:4;
2090 u32 reserved4:21;
2091 u32 isc:3;
2092 u32 word_with_d_bit;
2093 /* set to 0x10000000 to enable
2094 * time delay disablement facility */
2095 u32 reserved5;
2096 u32 subsystem_id;
2097 u32 reserved6[1004];
2098 struct chsc_header response;
2099 u32 reserved7;
2100 } *scssc_area;
2101
2102 if (!irq_ptr->is_thinint_irq)
2103 return -ENODEV;
2104
2105 if (reset_to_zero) {
2106 real_addr_local_summary_bit=0;
2107 real_addr_dev_st_chg_ind=0;
2108 } else {
2109 real_addr_local_summary_bit=
2110 virt_to_phys((volatile void *)indicators);
2111 real_addr_dev_st_chg_ind=
2112 virt_to_phys((volatile void *)irq_ptr->dev_st_chg_ind);
2113 }
2114
2115 scssc_area = (void *)get_zeroed_page(GFP_KERNEL | GFP_DMA);
2116 if (!scssc_area) {
2117 QDIO_PRINT_WARN("No memory for setting indicators on " \
2118 "subchannel x%x.\n", irq_ptr->irq);
2119 return -ENOMEM;
2120 }
2121 scssc_area->request = (struct chsc_header) {
2122 .length = 0x0fe0,
2123 .code = 0x0021,
2124 };
2125 scssc_area->operation_code = 0;
2126
2127 scssc_area->summary_indicator_addr = real_addr_local_summary_bit;
2128 scssc_area->subchannel_indicator_addr = real_addr_dev_st_chg_ind;
2129 scssc_area->ks = QDIO_STORAGE_KEY;
2130 scssc_area->kc = QDIO_STORAGE_KEY;
2131 scssc_area->isc = TIQDIO_THININT_ISC;
2132 scssc_area->subsystem_id = (1<<16) + irq_ptr->irq;
2133 /* enables the time delay disablement facility. Don't care
2134 * whether it is really there (i.e. we haven't checked for
2135 * it) */
2136 if (css_general_characteristics.aif_tdd)
2137 scssc_area->word_with_d_bit = 0x10000000;
2138 else
2139 QDIO_PRINT_WARN("Time delay disablement facility " \
2140 "not available\n");
2141
2142
2143
2144 result = chsc(scssc_area);
2145 if (result) {
2146 QDIO_PRINT_WARN("could not set indicators on irq x%x, " \
2147 "cc=%i.\n",irq_ptr->irq,result);
2148 result = -EIO;
2149 goto out;
2150 }
2151
2152 resp_code = scssc_area->response.code;
2153 if (resp_code!=QDIO_CHSC_RESPONSE_CODE_OK) {
2154 QDIO_PRINT_WARN("response upon setting indicators " \
2155 "is 0x%x.\n",resp_code);
2156 sprintf(dbf_text,"sidR%4x",resp_code);
2157 QDIO_DBF_TEXT1(0,trace,dbf_text);
2158 QDIO_DBF_TEXT1(0,setup,dbf_text);
2159 ptr=&scssc_area->response;
2160 QDIO_DBF_HEX2(1,setup,&ptr,QDIO_DBF_SETUP_LEN);
2161 result = -EIO;
2162 goto out;
2163 }
2164
2165 QDIO_DBF_TEXT2(0,setup,"setscind");
2166 QDIO_DBF_HEX2(0,setup,&real_addr_local_summary_bit,
2167 sizeof(unsigned long));
2168 QDIO_DBF_HEX2(0,setup,&real_addr_dev_st_chg_ind,sizeof(unsigned long));
2169 result = 0;
2170out:
2171 free_page ((unsigned long) scssc_area);
2172 return result;
2173
2174}
2175
2176static unsigned int
2177tiqdio_set_delay_target(struct qdio_irq *irq_ptr, unsigned long delay_target)
2178{
2179 unsigned int resp_code;
2180 int result;
2181 void *ptr;
2182 char dbf_text[15];
2183
2184 struct {
2185 struct chsc_header request;
2186 u16 operation_code;
2187 u16 reserved1;
2188 u32 reserved2;
2189 u32 reserved3;
2190 u32 reserved4[2];
2191 u32 delay_target;
2192 u32 reserved5[1009];
2193 struct chsc_header response;
2194 u32 reserved6;
2195 } *scsscf_area;
2196
2197 if (!irq_ptr->is_thinint_irq)
2198 return -ENODEV;
2199
2200 scsscf_area = (void *)get_zeroed_page(GFP_KERNEL | GFP_DMA);
2201 if (!scsscf_area) {
2202 QDIO_PRINT_WARN("No memory for setting delay target on " \
2203 "subchannel x%x.\n", irq_ptr->irq);
2204 return -ENOMEM;
2205 }
2206 scsscf_area->request = (struct chsc_header) {
2207 .length = 0x0fe0,
2208 .code = 0x1027,
2209 };
2210
2211 scsscf_area->delay_target = delay_target<<16;
2212
2213 result=chsc(scsscf_area);
2214 if (result) {
2215 QDIO_PRINT_WARN("could not set delay target on irq x%x, " \
2216 "cc=%i. Continuing.\n",irq_ptr->irq,result);
2217 result = -EIO;
2218 goto out;
2219 }
2220
2221 resp_code = scsscf_area->response.code;
2222 if (resp_code!=QDIO_CHSC_RESPONSE_CODE_OK) {
2223 QDIO_PRINT_WARN("response upon setting delay target " \
2224 "is 0x%x. Continuing.\n",resp_code);
2225 sprintf(dbf_text,"sdtR%4x",resp_code);
2226 QDIO_DBF_TEXT1(0,trace,dbf_text);
2227 QDIO_DBF_TEXT1(0,setup,dbf_text);
2228 ptr=&scsscf_area->response;
2229 QDIO_DBF_HEX2(1,trace,&ptr,QDIO_DBF_TRACE_LEN);
2230 }
2231 QDIO_DBF_TEXT2(0,trace,"delytrgt");
2232 QDIO_DBF_HEX2(0,trace,&delay_target,sizeof(unsigned long));
2233 result = 0; /* not critical */
2234out:
2235 free_page ((unsigned long) scsscf_area);
2236 return result;
2237}
2238
2239int
2240qdio_cleanup(struct ccw_device *cdev, int how)
2241{
2242 struct qdio_irq *irq_ptr;
2243 char dbf_text[15];
2244 int rc;
2245
2246 irq_ptr = cdev->private->qdio_data;
2247 if (!irq_ptr)
2248 return -ENODEV;
2249
2250 sprintf(dbf_text,"qcln%4x",irq_ptr->irq);
2251 QDIO_DBF_TEXT1(0,trace,dbf_text);
2252 QDIO_DBF_TEXT0(0,setup,dbf_text);
2253
2254 rc = qdio_shutdown(cdev, how);
2255 if ((rc == 0) || (rc == -EINPROGRESS))
2256 rc = qdio_free(cdev);
2257 return rc;
2258}
2259
2260int
2261qdio_shutdown(struct ccw_device *cdev, int how)
2262{
2263 struct qdio_irq *irq_ptr;
2264 int i;
2265 int result = 0;
2266 int rc;
2267 unsigned long flags;
2268 int timeout;
2269 char dbf_text[15];
2270
2271 irq_ptr = cdev->private->qdio_data;
2272 if (!irq_ptr)
2273 return -ENODEV;
2274
2275 down(&irq_ptr->setting_up_sema);
2276
2277 sprintf(dbf_text,"qsqs%4x",irq_ptr->irq);
2278 QDIO_DBF_TEXT1(0,trace,dbf_text);
2279 QDIO_DBF_TEXT0(0,setup,dbf_text);
2280
2281 /* mark all qs as uninteresting */
2282 for (i=0;i<irq_ptr->no_input_qs;i++)
2283 atomic_set(&irq_ptr->input_qs[i]->is_in_shutdown,1);
2284
2285 for (i=0;i<irq_ptr->no_output_qs;i++)
2286 atomic_set(&irq_ptr->output_qs[i]->is_in_shutdown,1);
2287
2288 tasklet_kill(&tiqdio_tasklet);
2289
2290 for (i=0;i<irq_ptr->no_input_qs;i++) {
2291 qdio_unmark_q(irq_ptr->input_qs[i]);
2292 tasklet_kill(&irq_ptr->input_qs[i]->tasklet);
2293 wait_event_interruptible_timeout(cdev->private->wait_q,
2294 !atomic_read(&irq_ptr->
2295 input_qs[i]->
2296 use_count),
2297 QDIO_NO_USE_COUNT_TIMEOUT);
2298 if (atomic_read(&irq_ptr->input_qs[i]->use_count))
2299 result=-EINPROGRESS;
2300 }
2301
2302 for (i=0;i<irq_ptr->no_output_qs;i++) {
2303 tasklet_kill(&irq_ptr->output_qs[i]->tasklet);
2304 wait_event_interruptible_timeout(cdev->private->wait_q,
2305 !atomic_read(&irq_ptr->
2306 output_qs[i]->
2307 use_count),
2308 QDIO_NO_USE_COUNT_TIMEOUT);
2309 if (atomic_read(&irq_ptr->output_qs[i]->use_count))
2310 result=-EINPROGRESS;
2311 }
2312
2313 /* cleanup subchannel */
2314 spin_lock_irqsave(get_ccwdev_lock(cdev),flags);
2315 if (how&QDIO_FLAG_CLEANUP_USING_CLEAR) {
2316 rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
2317 timeout=QDIO_CLEANUP_CLEAR_TIMEOUT;
2318 } else if (how&QDIO_FLAG_CLEANUP_USING_HALT) {
2319 rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
2320 timeout=QDIO_CLEANUP_HALT_TIMEOUT;
2321 } else { /* default behaviour */
2322 rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
2323 timeout=QDIO_CLEANUP_HALT_TIMEOUT;
2324 }
2325 if (rc == -ENODEV) {
2326 /* No need to wait for device no longer present. */
2327 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2328 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
2329 } else if (((void *)cdev->handler != (void *)qdio_handler) && rc == 0) {
2330 /*
2331 * Whoever put another handler there, has to cope with the
2332 * interrupt theirself. Might happen if qdio_shutdown was
2333 * called on already shutdown queues, but this shouldn't have
2334 * bad side effects.
2335 */
2336 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2337 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
2338 } else if (rc == 0) {
2339 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
2340 ccw_device_set_timeout(cdev, timeout);
2341 spin_unlock_irqrestore(get_ccwdev_lock(cdev),flags);
2342
2343 wait_event(cdev->private->wait_q,
2344 irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
2345 irq_ptr->state == QDIO_IRQ_STATE_ERR);
2346 } else {
2347 QDIO_PRINT_INFO("ccw_device_{halt,clear} returned %d for "
2348 "device %s\n", result, cdev->dev.bus_id);
2349 spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
2350 result = rc;
2351 goto out;
2352 }
2353 if (irq_ptr->is_thinint_irq) {
2354 qdio_put_indicator((__u32*)irq_ptr->dev_st_chg_ind);
2355 tiqdio_set_subchannel_ind(irq_ptr,1);
2356 /* reset adapter interrupt indicators */
2357 }
2358
2359 /* exchange int handlers, if necessary */
2360 if ((void*)cdev->handler == (void*)qdio_handler)
2361 cdev->handler=irq_ptr->original_int_handler;
2362
2363 /* Ignore errors. */
2364 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
2365 ccw_device_set_timeout(cdev, 0);
2366out:
2367 up(&irq_ptr->setting_up_sema);
2368 return result;
2369}
2370
2371int
2372qdio_free(struct ccw_device *cdev)
2373{
2374 struct qdio_irq *irq_ptr;
2375 char dbf_text[15];
2376
2377 irq_ptr = cdev->private->qdio_data;
2378 if (!irq_ptr)
2379 return -ENODEV;
2380
2381 down(&irq_ptr->setting_up_sema);
2382
2383 sprintf(dbf_text,"qfqs%4x",irq_ptr->irq);
2384 QDIO_DBF_TEXT1(0,trace,dbf_text);
2385 QDIO_DBF_TEXT0(0,setup,dbf_text);
2386
2387 cdev->private->qdio_data = 0;
2388
2389 up(&irq_ptr->setting_up_sema);
2390
2391 qdio_release_irq_memory(irq_ptr);
2392 module_put(THIS_MODULE);
2393 return 0;
2394}
2395
2396static inline void
2397qdio_allocate_do_dbf(struct qdio_initialize *init_data)
2398{
2399 char dbf_text[20]; /* if a printf printed out more than 8 chars */
2400
2401 sprintf(dbf_text,"qfmt:%x",init_data->q_format);
2402 QDIO_DBF_TEXT0(0,setup,dbf_text);
2403 QDIO_DBF_HEX0(0,setup,init_data->adapter_name,8);
2404 sprintf(dbf_text,"qpff%4x",init_data->qib_param_field_format);
2405 QDIO_DBF_TEXT0(0,setup,dbf_text);
2406 QDIO_DBF_HEX0(0,setup,&init_data->qib_param_field,sizeof(char*));
2407 QDIO_DBF_HEX0(0,setup,&init_data->input_slib_elements,sizeof(long*));
2408 QDIO_DBF_HEX0(0,setup,&init_data->output_slib_elements,sizeof(long*));
2409 sprintf(dbf_text,"miit%4x",init_data->min_input_threshold);
2410 QDIO_DBF_TEXT0(0,setup,dbf_text);
2411 sprintf(dbf_text,"mait%4x",init_data->max_input_threshold);
2412 QDIO_DBF_TEXT0(0,setup,dbf_text);
2413 sprintf(dbf_text,"miot%4x",init_data->min_output_threshold);
2414 QDIO_DBF_TEXT0(0,setup,dbf_text);
2415 sprintf(dbf_text,"maot%4x",init_data->max_output_threshold);
2416 QDIO_DBF_TEXT0(0,setup,dbf_text);
2417 sprintf(dbf_text,"niq:%4x",init_data->no_input_qs);
2418 QDIO_DBF_TEXT0(0,setup,dbf_text);
2419 sprintf(dbf_text,"noq:%4x",init_data->no_output_qs);
2420 QDIO_DBF_TEXT0(0,setup,dbf_text);
2421 QDIO_DBF_HEX0(0,setup,&init_data->input_handler,sizeof(void*));
2422 QDIO_DBF_HEX0(0,setup,&init_data->output_handler,sizeof(void*));
2423 QDIO_DBF_HEX0(0,setup,&init_data->int_parm,sizeof(long));
2424 QDIO_DBF_HEX0(0,setup,&init_data->flags,sizeof(long));
2425 QDIO_DBF_HEX0(0,setup,&init_data->input_sbal_addr_array,sizeof(void*));
2426 QDIO_DBF_HEX0(0,setup,&init_data->output_sbal_addr_array,sizeof(void*));
2427}
2428
2429static inline void
2430qdio_allocate_fill_input_desc(struct qdio_irq *irq_ptr, int i, int iqfmt)
2431{
2432 irq_ptr->input_qs[i]->is_iqdio_q = iqfmt;
2433 irq_ptr->input_qs[i]->is_thinint_q = irq_ptr->is_thinint_irq;
2434
2435 irq_ptr->qdr->qdf0[i].sliba=(unsigned long)(irq_ptr->input_qs[i]->slib);
2436
2437 irq_ptr->qdr->qdf0[i].sla=(unsigned long)(irq_ptr->input_qs[i]->sl);
2438
2439 irq_ptr->qdr->qdf0[i].slsba=
2440 (unsigned long)(&irq_ptr->input_qs[i]->slsb.acc.val[0]);
2441
2442 irq_ptr->qdr->qdf0[i].akey=QDIO_STORAGE_KEY;
2443 irq_ptr->qdr->qdf0[i].bkey=QDIO_STORAGE_KEY;
2444 irq_ptr->qdr->qdf0[i].ckey=QDIO_STORAGE_KEY;
2445 irq_ptr->qdr->qdf0[i].dkey=QDIO_STORAGE_KEY;
2446}
2447
2448static inline void
2449qdio_allocate_fill_output_desc(struct qdio_irq *irq_ptr, int i,
2450 int j, int iqfmt)
2451{
2452 irq_ptr->output_qs[i]->is_iqdio_q = iqfmt;
2453 irq_ptr->output_qs[i]->is_thinint_q = irq_ptr->is_thinint_irq;
2454
2455 irq_ptr->qdr->qdf0[i+j].sliba=(unsigned long)(irq_ptr->output_qs[i]->slib);
2456
2457 irq_ptr->qdr->qdf0[i+j].sla=(unsigned long)(irq_ptr->output_qs[i]->sl);
2458
2459 irq_ptr->qdr->qdf0[i+j].slsba=
2460 (unsigned long)(&irq_ptr->output_qs[i]->slsb.acc.val[0]);
2461
2462 irq_ptr->qdr->qdf0[i+j].akey=QDIO_STORAGE_KEY;
2463 irq_ptr->qdr->qdf0[i+j].bkey=QDIO_STORAGE_KEY;
2464 irq_ptr->qdr->qdf0[i+j].ckey=QDIO_STORAGE_KEY;
2465 irq_ptr->qdr->qdf0[i+j].dkey=QDIO_STORAGE_KEY;
2466}
2467
2468
2469static inline void
2470qdio_initialize_set_siga_flags_input(struct qdio_irq *irq_ptr)
2471{
2472 int i;
2473
2474 for (i=0;i<irq_ptr->no_input_qs;i++) {
2475 irq_ptr->input_qs[i]->siga_sync=
2476 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_NECESSARY;
2477 irq_ptr->input_qs[i]->siga_in=
2478 irq_ptr->qdioac&CHSC_FLAG_SIGA_INPUT_NECESSARY;
2479 irq_ptr->input_qs[i]->siga_out=
2480 irq_ptr->qdioac&CHSC_FLAG_SIGA_OUTPUT_NECESSARY;
2481 irq_ptr->input_qs[i]->siga_sync_done_on_thinints=
2482 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS;
2483 irq_ptr->input_qs[i]->hydra_gives_outbound_pcis=
2484 irq_ptr->hydra_gives_outbound_pcis;
2485 irq_ptr->input_qs[i]->siga_sync_done_on_outb_tis=
2486 ((irq_ptr->qdioac&
2487 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2488 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS))==
2489 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2490 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS));
2491
2492 }
2493}
2494
2495static inline void
2496qdio_initialize_set_siga_flags_output(struct qdio_irq *irq_ptr)
2497{
2498 int i;
2499
2500 for (i=0;i<irq_ptr->no_output_qs;i++) {
2501 irq_ptr->output_qs[i]->siga_sync=
2502 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_NECESSARY;
2503 irq_ptr->output_qs[i]->siga_in=
2504 irq_ptr->qdioac&CHSC_FLAG_SIGA_INPUT_NECESSARY;
2505 irq_ptr->output_qs[i]->siga_out=
2506 irq_ptr->qdioac&CHSC_FLAG_SIGA_OUTPUT_NECESSARY;
2507 irq_ptr->output_qs[i]->siga_sync_done_on_thinints=
2508 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS;
2509 irq_ptr->output_qs[i]->hydra_gives_outbound_pcis=
2510 irq_ptr->hydra_gives_outbound_pcis;
2511 irq_ptr->output_qs[i]->siga_sync_done_on_outb_tis=
2512 ((irq_ptr->qdioac&
2513 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2514 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS))==
2515 (CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS|
2516 CHSC_FLAG_SIGA_SYNC_DONE_ON_THININTS));
2517
2518 }
2519}
2520
2521static inline int
2522qdio_establish_irq_check_for_errors(struct ccw_device *cdev, int cstat,
2523 int dstat)
2524{
2525 char dbf_text[15];
2526 struct qdio_irq *irq_ptr;
2527
2528 irq_ptr = cdev->private->qdio_data;
2529
2530 if (cstat || (dstat & ~(DEV_STAT_CHN_END|DEV_STAT_DEV_END))) {
2531 sprintf(dbf_text,"ick1%4x",irq_ptr->irq);
2532 QDIO_DBF_TEXT2(1,trace,dbf_text);
2533 QDIO_DBF_HEX2(0,trace,&dstat,sizeof(int));
2534 QDIO_DBF_HEX2(0,trace,&cstat,sizeof(int));
2535 QDIO_PRINT_ERR("received check condition on establish " \
2536 "queues on irq 0x%x (cs=x%x, ds=x%x).\n",
2537 irq_ptr->irq,cstat,dstat);
2538 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_ERR);
2539 }
2540
2541 if (!(dstat & DEV_STAT_DEV_END)) {
2542 QDIO_DBF_TEXT2(1,setup,"eq:no de");
2543 QDIO_DBF_HEX2(0,setup,&dstat, sizeof(dstat));
2544 QDIO_DBF_HEX2(0,setup,&cstat, sizeof(cstat));
2545 QDIO_PRINT_ERR("establish queues on irq %04x: didn't get "
2546 "device end: dstat=%02x, cstat=%02x\n",
2547 irq_ptr->irq, dstat, cstat);
2548 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2549 return 1;
2550 }
2551
2552 if (dstat & ~(DEV_STAT_CHN_END|DEV_STAT_DEV_END)) {
2553 QDIO_DBF_TEXT2(1,setup,"eq:badio");
2554 QDIO_DBF_HEX2(0,setup,&dstat, sizeof(dstat));
2555 QDIO_DBF_HEX2(0,setup,&cstat, sizeof(cstat));
2556 QDIO_PRINT_ERR("establish queues on irq %04x: got "
2557 "the following devstat: dstat=%02x, "
2558 "cstat=%02x\n",
2559 irq_ptr->irq, dstat, cstat);
2560 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
2561 return 1;
2562 }
2563 return 0;
2564}
2565
2566static void
2567qdio_establish_handle_irq(struct ccw_device *cdev, int cstat, int dstat)
2568{
2569 struct qdio_irq *irq_ptr;
2570 char dbf_text[15];
2571
2572 irq_ptr = cdev->private->qdio_data;
2573
2574 sprintf(dbf_text,"qehi%4x",cdev->private->irq);
2575 QDIO_DBF_TEXT0(0,setup,dbf_text);
2576 QDIO_DBF_TEXT0(0,trace,dbf_text);
2577
2578 if (qdio_establish_irq_check_for_errors(cdev, cstat, dstat)) {
2579 ccw_device_set_timeout(cdev, 0);
2580 return;
2581 }
2582
2583 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_ESTABLISHED);
2584 ccw_device_set_timeout(cdev, 0);
2585}
2586
2587int
2588qdio_initialize(struct qdio_initialize *init_data)
2589{
2590 int rc;
2591 char dbf_text[15];
2592
2593 sprintf(dbf_text,"qini%4x",init_data->cdev->private->irq);
2594 QDIO_DBF_TEXT0(0,setup,dbf_text);
2595 QDIO_DBF_TEXT0(0,trace,dbf_text);
2596
2597 rc = qdio_allocate(init_data);
2598 if (rc == 0) {
2599 rc = qdio_establish(init_data);
2600 if (rc != 0)
2601 qdio_free(init_data->cdev);
2602 }
2603
2604 return rc;
2605}
2606
2607
2608int
2609qdio_allocate(struct qdio_initialize *init_data)
2610{
2611 struct qdio_irq *irq_ptr;
2612 char dbf_text[15];
2613
2614 sprintf(dbf_text,"qalc%4x",init_data->cdev->private->irq);
2615 QDIO_DBF_TEXT0(0,setup,dbf_text);
2616 QDIO_DBF_TEXT0(0,trace,dbf_text);
2617 if ( (init_data->no_input_qs>QDIO_MAX_QUEUES_PER_IRQ) ||
2618 (init_data->no_output_qs>QDIO_MAX_QUEUES_PER_IRQ) ||
2619 ((init_data->no_input_qs) && (!init_data->input_handler)) ||
2620 ((init_data->no_output_qs) && (!init_data->output_handler)) )
2621 return -EINVAL;
2622
2623 if (!init_data->input_sbal_addr_array)
2624 return -EINVAL;
2625
2626 if (!init_data->output_sbal_addr_array)
2627 return -EINVAL;
2628
2629 qdio_allocate_do_dbf(init_data);
2630
2631 /* create irq */
2632 irq_ptr=kmalloc(sizeof(struct qdio_irq), GFP_KERNEL | GFP_DMA);
2633
2634 QDIO_DBF_TEXT0(0,setup,"irq_ptr:");
2635 QDIO_DBF_HEX0(0,setup,&irq_ptr,sizeof(void*));
2636
2637 if (!irq_ptr) {
2638 QDIO_PRINT_ERR("kmalloc of irq_ptr failed!\n");
2639 return -ENOMEM;
2640 }
2641
2642 memset(irq_ptr,0,sizeof(struct qdio_irq));
2643
2644 init_MUTEX(&irq_ptr->setting_up_sema);
2645
2646 /* QDR must be in DMA area since CCW data address is only 32 bit */
2647 irq_ptr->qdr=kmalloc(sizeof(struct qdr), GFP_KERNEL | GFP_DMA);
2648 if (!(irq_ptr->qdr)) {
2649 kfree(irq_ptr);
2650 QDIO_PRINT_ERR("kmalloc of irq_ptr->qdr failed!\n");
2651 return -ENOMEM;
2652 }
2653 QDIO_DBF_TEXT0(0,setup,"qdr:");
2654 QDIO_DBF_HEX0(0,setup,&irq_ptr->qdr,sizeof(void*));
2655
2656 if (qdio_alloc_qs(irq_ptr,
2657 init_data->no_input_qs,
2658 init_data->no_output_qs)) {
2659 qdio_release_irq_memory(irq_ptr);
2660 return -ENOMEM;
2661 }
2662
2663 init_data->cdev->private->qdio_data = irq_ptr;
2664
2665 qdio_set_state(irq_ptr,QDIO_IRQ_STATE_INACTIVE);
2666
2667 return 0;
2668}
2669
2670int qdio_fill_irq(struct qdio_initialize *init_data)
2671{
2672 int i;
2673 char dbf_text[15];
2674 struct ciw *ciw;
2675 int is_iqdio;
2676 struct qdio_irq *irq_ptr;
2677
2678 irq_ptr = init_data->cdev->private->qdio_data;
2679
2680 memset(irq_ptr,0,((char*)&irq_ptr->qdr)-((char*)irq_ptr));
2681
2682 /* wipes qib.ac, required by ar7063 */
2683 memset(irq_ptr->qdr,0,sizeof(struct qdr));
2684
2685 irq_ptr->int_parm=init_data->int_parm;
2686
2687 irq_ptr->irq = init_data->cdev->private->irq;
2688 irq_ptr->no_input_qs=init_data->no_input_qs;
2689 irq_ptr->no_output_qs=init_data->no_output_qs;
2690
2691 if (init_data->q_format==QDIO_IQDIO_QFMT) {
2692 irq_ptr->is_iqdio_irq=1;
2693 irq_ptr->is_thinint_irq=1;
2694 } else {
2695 irq_ptr->is_iqdio_irq=0;
2696 irq_ptr->is_thinint_irq=hydra_thinints;
2697 }
2698 sprintf(dbf_text,"is_i_t%1x%1x",
2699 irq_ptr->is_iqdio_irq,irq_ptr->is_thinint_irq);
2700 QDIO_DBF_TEXT2(0,setup,dbf_text);
2701
2702 if (irq_ptr->is_thinint_irq) {
2703 irq_ptr->dev_st_chg_ind=qdio_get_indicator();
2704 QDIO_DBF_HEX1(0,setup,&irq_ptr->dev_st_chg_ind,sizeof(void*));
2705 if (!irq_ptr->dev_st_chg_ind) {
2706 QDIO_PRINT_WARN("no indicator location available " \
2707 "for irq 0x%x\n",irq_ptr->irq);
2708 qdio_release_irq_memory(irq_ptr);
2709 return -ENOBUFS;
2710 }
2711 }
2712
2713 /* defaults */
2714 irq_ptr->equeue.cmd=DEFAULT_ESTABLISH_QS_CMD;
2715 irq_ptr->equeue.count=DEFAULT_ESTABLISH_QS_COUNT;
2716 irq_ptr->aqueue.cmd=DEFAULT_ACTIVATE_QS_CMD;
2717 irq_ptr->aqueue.count=DEFAULT_ACTIVATE_QS_COUNT;
2718
2719 qdio_fill_qs(irq_ptr, init_data->cdev,
2720 init_data->no_input_qs,
2721 init_data->no_output_qs,
2722 init_data->input_handler,
2723 init_data->output_handler,init_data->int_parm,
2724 init_data->q_format,init_data->flags,
2725 init_data->input_sbal_addr_array,
2726 init_data->output_sbal_addr_array);
2727
2728 if (!try_module_get(THIS_MODULE)) {
2729 QDIO_PRINT_CRIT("try_module_get() failed!\n");
2730 qdio_release_irq_memory(irq_ptr);
2731 return -EINVAL;
2732 }
2733
2734 qdio_fill_thresholds(irq_ptr,init_data->no_input_qs,
2735 init_data->no_output_qs,
2736 init_data->min_input_threshold,
2737 init_data->max_input_threshold,
2738 init_data->min_output_threshold,
2739 init_data->max_output_threshold);
2740
2741 /* fill in qdr */
2742 irq_ptr->qdr->qfmt=init_data->q_format;
2743 irq_ptr->qdr->iqdcnt=init_data->no_input_qs;
2744 irq_ptr->qdr->oqdcnt=init_data->no_output_qs;
2745 irq_ptr->qdr->iqdsz=sizeof(struct qdesfmt0)/4; /* size in words */
2746 irq_ptr->qdr->oqdsz=sizeof(struct qdesfmt0)/4;
2747
2748 irq_ptr->qdr->qiba=(unsigned long)&irq_ptr->qib;
2749 irq_ptr->qdr->qkey=QDIO_STORAGE_KEY;
2750
2751 /* fill in qib */
2752 irq_ptr->qib.qfmt=init_data->q_format;
2753 if (init_data->no_input_qs)
2754 irq_ptr->qib.isliba=(unsigned long)(irq_ptr->input_qs[0]->slib);
2755 if (init_data->no_output_qs)
2756 irq_ptr->qib.osliba=(unsigned long)(irq_ptr->output_qs[0]->slib);
2757 memcpy(irq_ptr->qib.ebcnam,init_data->adapter_name,8);
2758
2759 qdio_set_impl_params(irq_ptr,init_data->qib_param_field_format,
2760 init_data->qib_param_field,
2761 init_data->no_input_qs,
2762 init_data->no_output_qs,
2763 init_data->input_slib_elements,
2764 init_data->output_slib_elements);
2765
2766 /* first input descriptors, then output descriptors */
2767 is_iqdio = (init_data->q_format == QDIO_IQDIO_QFMT) ? 1 : 0;
2768 for (i=0;i<init_data->no_input_qs;i++)
2769 qdio_allocate_fill_input_desc(irq_ptr, i, is_iqdio);
2770
2771 for (i=0;i<init_data->no_output_qs;i++)
2772 qdio_allocate_fill_output_desc(irq_ptr, i,
2773 init_data->no_input_qs,
2774 is_iqdio);
2775
2776 /* qdr, qib, sls, slsbs, slibs, sbales filled. */
2777
2778 /* get qdio commands */
2779 ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_EQUEUE);
2780 if (!ciw) {
2781 QDIO_DBF_TEXT2(1,setup,"no eq");
2782 QDIO_PRINT_INFO("No equeue CIW found for QDIO commands. "
2783 "Trying to use default.\n");
2784 } else
2785 irq_ptr->equeue = *ciw;
2786 ciw = ccw_device_get_ciw(init_data->cdev, CIW_TYPE_AQUEUE);
2787 if (!ciw) {
2788 QDIO_DBF_TEXT2(1,setup,"no aq");
2789 QDIO_PRINT_INFO("No aqueue CIW found for QDIO commands. "
2790 "Trying to use default.\n");
2791 } else
2792 irq_ptr->aqueue = *ciw;
2793
2794 /* Set new interrupt handler. */
2795 irq_ptr->original_int_handler = init_data->cdev->handler;
2796 init_data->cdev->handler = qdio_handler;
2797
2798 return 0;
2799}
2800
2801int
2802qdio_establish(struct qdio_initialize *init_data)
2803{
2804 struct qdio_irq *irq_ptr;
2805 unsigned long saveflags;
2806 int result, result2;
2807 struct ccw_device *cdev;
2808 char dbf_text[20];
2809
2810 cdev=init_data->cdev;
2811 irq_ptr = cdev->private->qdio_data;
2812 if (!irq_ptr)
2813 return -EINVAL;
2814
2815 if (cdev->private->state != DEV_STATE_ONLINE)
2816 return -EINVAL;
2817
2818 down(&irq_ptr->setting_up_sema);
2819
2820 qdio_fill_irq(init_data);
2821
2822 /* the thinint CHSC stuff */
2823 if (irq_ptr->is_thinint_irq) {
2824
2825 result = tiqdio_set_subchannel_ind(irq_ptr,0);
2826 if (result) {
2827 up(&irq_ptr->setting_up_sema);
2828 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
2829 return result;
2830 }
2831 tiqdio_set_delay_target(irq_ptr,TIQDIO_DELAY_TARGET);
2832 }
2833
2834 sprintf(dbf_text,"qest%4x",cdev->private->irq);
2835 QDIO_DBF_TEXT0(0,setup,dbf_text);
2836 QDIO_DBF_TEXT0(0,trace,dbf_text);
2837
2838 /* establish q */
2839 irq_ptr->ccw.cmd_code=irq_ptr->equeue.cmd;
2840 irq_ptr->ccw.flags=CCW_FLAG_SLI;
2841 irq_ptr->ccw.count=irq_ptr->equeue.count;
2842 irq_ptr->ccw.cda=QDIO_GET_ADDR(irq_ptr->qdr);
2843
2844 spin_lock_irqsave(get_ccwdev_lock(cdev),saveflags);
2845
2846 ccw_device_set_options(cdev, 0);
2847 result=ccw_device_start_timeout(cdev,&irq_ptr->ccw,
2848 QDIO_DOING_ESTABLISH,0, 0,
2849 QDIO_ESTABLISH_TIMEOUT);
2850 if (result) {
2851 result2=ccw_device_start_timeout(cdev,&irq_ptr->ccw,
2852 QDIO_DOING_ESTABLISH,0,0,
2853 QDIO_ESTABLISH_TIMEOUT);
2854 sprintf(dbf_text,"eq:io%4x",result);
2855 QDIO_DBF_TEXT2(1,setup,dbf_text);
2856 if (result2) {
2857 sprintf(dbf_text,"eq:io%4x",result);
2858 QDIO_DBF_TEXT2(1,setup,dbf_text);
2859 }
2860 QDIO_PRINT_WARN("establish queues on irq %04x: do_IO " \
2861 "returned %i, next try returned %i\n",
2862 irq_ptr->irq,result,result2);
2863 result=result2;
2864 if (result)
2865 ccw_device_set_timeout(cdev, 0);
2866 }
2867
2868 spin_unlock_irqrestore(get_ccwdev_lock(cdev),saveflags);
2869
2870 if (result) {
2871 up(&irq_ptr->setting_up_sema);
2872 qdio_shutdown(cdev,QDIO_FLAG_CLEANUP_USING_CLEAR);
2873 return result;
2874 }
2875
2876 wait_event_interruptible_timeout(cdev->private->wait_q,
2877 irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
2878 irq_ptr->state == QDIO_IRQ_STATE_ERR,
2879 QDIO_ESTABLISH_TIMEOUT);
2880
2881 if (irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED)
2882 result = 0;
2883 else {
2884 up(&irq_ptr->setting_up_sema);
2885 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
2886 return -EIO;
2887 }
2888
2889 irq_ptr->qdioac=qdio_check_siga_needs(irq_ptr->irq);
2890 /* if this gets set once, we're running under VM and can omit SVSes */
2891 if (irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_NECESSARY)
2892 omit_svs=1;
2893
2894 sprintf(dbf_text,"qdioac%2x",irq_ptr->qdioac);
2895 QDIO_DBF_TEXT2(0,setup,dbf_text);
2896
2897 sprintf(dbf_text,"qib ac%2x",irq_ptr->qib.ac);
2898 QDIO_DBF_TEXT2(0,setup,dbf_text);
2899
2900 irq_ptr->hydra_gives_outbound_pcis=
2901 irq_ptr->qib.ac&QIB_AC_OUTBOUND_PCI_SUPPORTED;
2902 irq_ptr->sync_done_on_outb_pcis=
2903 irq_ptr->qdioac&CHSC_FLAG_SIGA_SYNC_DONE_ON_OUTB_PCIS;
2904
2905 qdio_initialize_set_siga_flags_input(irq_ptr);
2906 qdio_initialize_set_siga_flags_output(irq_ptr);
2907
2908 up(&irq_ptr->setting_up_sema);
2909
2910 return result;
2911
2912}
2913
2914int
2915qdio_activate(struct ccw_device *cdev, int flags)
2916{
2917 struct qdio_irq *irq_ptr;
2918 int i,result=0,result2;
2919 unsigned long saveflags;
2920 char dbf_text[20]; /* see qdio_initialize */
2921
2922 irq_ptr = cdev->private->qdio_data;
2923 if (!irq_ptr)
2924 return -ENODEV;
2925
2926 if (cdev->private->state != DEV_STATE_ONLINE)
2927 return -EINVAL;
2928
2929 down(&irq_ptr->setting_up_sema);
2930 if (irq_ptr->state==QDIO_IRQ_STATE_INACTIVE) {
2931 result=-EBUSY;
2932 goto out;
2933 }
2934
2935 sprintf(dbf_text,"qact%4x", irq_ptr->irq);
2936 QDIO_DBF_TEXT2(0,setup,dbf_text);
2937 QDIO_DBF_TEXT2(0,trace,dbf_text);
2938
2939 /* activate q */
2940 irq_ptr->ccw.cmd_code=irq_ptr->aqueue.cmd;
2941 irq_ptr->ccw.flags=CCW_FLAG_SLI;
2942 irq_ptr->ccw.count=irq_ptr->aqueue.count;
2943 irq_ptr->ccw.cda=QDIO_GET_ADDR(0);
2944
2945 spin_lock_irqsave(get_ccwdev_lock(cdev),saveflags);
2946
2947 ccw_device_set_timeout(cdev, 0);
2948 ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
2949 result=ccw_device_start(cdev,&irq_ptr->ccw,QDIO_DOING_ACTIVATE,
2950 0, DOIO_DENY_PREFETCH);
2951 if (result) {
2952 result2=ccw_device_start(cdev,&irq_ptr->ccw,
2953 QDIO_DOING_ACTIVATE,0,0);
2954 sprintf(dbf_text,"aq:io%4x",result);
2955 QDIO_DBF_TEXT2(1,setup,dbf_text);
2956 if (result2) {
2957 sprintf(dbf_text,"aq:io%4x",result);
2958 QDIO_DBF_TEXT2(1,setup,dbf_text);
2959 }
2960 QDIO_PRINT_WARN("activate queues on irq %04x: do_IO " \
2961 "returned %i, next try returned %i\n",
2962 irq_ptr->irq,result,result2);
2963 result=result2;
2964 }
2965
2966 spin_unlock_irqrestore(get_ccwdev_lock(cdev),saveflags);
2967 if (result)
2968 goto out;
2969
2970 for (i=0;i<irq_ptr->no_input_qs;i++) {
2971 if (irq_ptr->is_thinint_irq) {
2972 /*
2973 * that way we know, that, if we will get interrupted
2974 * by tiqdio_inbound_processing, qdio_unmark_q will
2975 * not be called
2976 */
2977 qdio_reserve_q(irq_ptr->input_qs[i]);
2978 qdio_mark_tiq(irq_ptr->input_qs[i]);
2979 qdio_release_q(irq_ptr->input_qs[i]);
2980 }
2981 }
2982
2983 if (flags&QDIO_FLAG_NO_INPUT_INTERRUPT_CONTEXT) {
2984 for (i=0;i<irq_ptr->no_input_qs;i++) {
2985 irq_ptr->input_qs[i]->is_input_q|=
2986 QDIO_FLAG_NO_INPUT_INTERRUPT_CONTEXT;
2987 }
2988 }
2989
2990 wait_event_interruptible_timeout(cdev->private->wait_q,
2991 ((irq_ptr->state ==
2992 QDIO_IRQ_STATE_STOPPED) ||
2993 (irq_ptr->state ==
2994 QDIO_IRQ_STATE_ERR)),
2995 QDIO_ACTIVATE_TIMEOUT);
2996
2997 switch (irq_ptr->state) {
2998 case QDIO_IRQ_STATE_STOPPED:
2999 case QDIO_IRQ_STATE_ERR:
3000 up(&irq_ptr->setting_up_sema);
3001 qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
3002 down(&irq_ptr->setting_up_sema);
3003 result = -EIO;
3004 break;
3005 default:
3006 qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
3007 result = 0;
3008 }
3009 out:
3010 up(&irq_ptr->setting_up_sema);
3011
3012 return result;
3013}
3014
3015/* buffers filled forwards again to make Rick happy */
3016static inline void
3017qdio_do_qdio_fill_input(struct qdio_q *q, unsigned int qidx,
3018 unsigned int count, struct qdio_buffer *buffers)
3019{
3020 for (;;) {
3021 set_slsb(&q->slsb.acc.val[qidx],SLSB_CU_INPUT_EMPTY);
3022 count--;
3023 if (!count) break;
3024 qidx=(qidx+1)&(QDIO_MAX_BUFFERS_PER_Q-1);
3025 }
3026
3027 /* not necessary, as the queues are synced during the SIGA read */
3028 /*SYNC_MEMORY;*/
3029}
3030
3031static inline void
3032qdio_do_qdio_fill_output(struct qdio_q *q, unsigned int qidx,
3033 unsigned int count, struct qdio_buffer *buffers)
3034{
3035 for (;;) {
3036 set_slsb(&q->slsb.acc.val[qidx],SLSB_CU_OUTPUT_PRIMED);
3037 count--;
3038 if (!count) break;
3039 qidx=(qidx+1)&(QDIO_MAX_BUFFERS_PER_Q-1);
3040 }
3041
3042 /* SIGA write will sync the queues */
3043 /*SYNC_MEMORY;*/
3044}
3045
3046static inline void
3047do_qdio_handle_inbound(struct qdio_q *q, unsigned int callflags,
3048 unsigned int qidx, unsigned int count,
3049 struct qdio_buffer *buffers)
3050{
3051 int used_elements;
3052
3053 /* This is the inbound handling of queues */
3054 used_elements=atomic_add_return(count, &q->number_of_buffers_used) - count;
3055
3056 qdio_do_qdio_fill_input(q,qidx,count,buffers);
3057
3058 if ((used_elements+count==QDIO_MAX_BUFFERS_PER_Q)&&
3059 (callflags&QDIO_FLAG_UNDER_INTERRUPT))
3060 atomic_swap(&q->polling,0);
3061
3062 if (used_elements)
3063 return;
3064 if (callflags&QDIO_FLAG_DONT_SIGA)
3065 return;
3066 if (q->siga_in) {
3067 int result;
3068
3069 result=qdio_siga_input(q);
3070 if (result) {
3071 if (q->siga_error)
3072 q->error_status_flags|=
3073 QDIO_STATUS_MORE_THAN_ONE_SIGA_ERROR;
3074 q->error_status_flags|=QDIO_STATUS_LOOK_FOR_ERROR;
3075 q->siga_error=result;
3076 }
3077 }
3078
3079 qdio_mark_q(q);
3080}
3081
3082static inline void
3083do_qdio_handle_outbound(struct qdio_q *q, unsigned int callflags,
3084 unsigned int qidx, unsigned int count,
3085 struct qdio_buffer *buffers)
3086{
3087 int used_elements;
3088
3089 /* This is the outbound handling of queues */
3090#ifdef QDIO_PERFORMANCE_STATS
3091 perf_stats.start_time_outbound=NOW;
3092#endif /* QDIO_PERFORMANCE_STATS */
3093
3094 qdio_do_qdio_fill_output(q,qidx,count,buffers);
3095
3096 used_elements=atomic_add_return(count, &q->number_of_buffers_used) - count;
3097
3098 if (callflags&QDIO_FLAG_DONT_SIGA) {
3099#ifdef QDIO_PERFORMANCE_STATS
3100 perf_stats.outbound_time+=NOW-perf_stats.start_time_outbound;
3101 perf_stats.outbound_cnt++;
3102#endif /* QDIO_PERFORMANCE_STATS */
3103 return;
3104 }
3105 if (q->is_iqdio_q) {
3106 /* one siga for every sbal */
3107 while (count--)
3108 qdio_kick_outbound_q(q);
3109
3110 __qdio_outbound_processing(q);
3111 } else {
3112 /* under VM, we do a SIGA sync unconditionally */
3113 SYNC_MEMORY;
3114 else {
3115 /*
3116 * w/o shadow queues (else branch of
3117 * SYNC_MEMORY :-/ ), we try to
3118 * fast-requeue buffers
3119 */
3120 if (q->slsb.acc.val[(qidx+QDIO_MAX_BUFFERS_PER_Q-1)
3121 &(QDIO_MAX_BUFFERS_PER_Q-1)]!=
3122 SLSB_CU_OUTPUT_PRIMED) {
3123 qdio_kick_outbound_q(q);
3124 } else {
3125 QDIO_DBF_TEXT3(0,trace, "fast-req");
3126#ifdef QDIO_PERFORMANCE_STATS
3127 perf_stats.fast_reqs++;
3128#endif /* QDIO_PERFORMANCE_STATS */
3129 }
3130 }
3131 /*
3132 * only marking the q could take too long,
3133 * the upper layer module could do a lot of
3134 * traffic in that time
3135 */
3136 __qdio_outbound_processing(q);
3137 }
3138
3139#ifdef QDIO_PERFORMANCE_STATS
3140 perf_stats.outbound_time+=NOW-perf_stats.start_time_outbound;
3141 perf_stats.outbound_cnt++;
3142#endif /* QDIO_PERFORMANCE_STATS */
3143}
3144
3145/* count must be 1 in iqdio */
3146int
3147do_QDIO(struct ccw_device *cdev,unsigned int callflags,
3148 unsigned int queue_number, unsigned int qidx,
3149 unsigned int count,struct qdio_buffer *buffers)
3150{
3151 struct qdio_irq *irq_ptr;
3152#ifdef CONFIG_QDIO_DEBUG
3153 char dbf_text[20];
3154
3155 sprintf(dbf_text,"doQD%04x",cdev->private->irq);
3156 QDIO_DBF_TEXT3(0,trace,dbf_text);
3157#endif /* CONFIG_QDIO_DEBUG */
3158
3159 if ( (qidx>QDIO_MAX_BUFFERS_PER_Q) ||
3160 (count>QDIO_MAX_BUFFERS_PER_Q) ||
3161 (queue_number>QDIO_MAX_QUEUES_PER_IRQ) )
3162 return -EINVAL;
3163
3164 if (count==0)
3165 return 0;
3166
3167 irq_ptr = cdev->private->qdio_data;
3168 if (!irq_ptr)
3169 return -ENODEV;
3170
3171#ifdef CONFIG_QDIO_DEBUG
3172 if (callflags&QDIO_FLAG_SYNC_INPUT)
3173 QDIO_DBF_HEX3(0,trace,&irq_ptr->input_qs[queue_number],
3174 sizeof(void*));
3175 else
3176 QDIO_DBF_HEX3(0,trace,&irq_ptr->output_qs[queue_number],
3177 sizeof(void*));
3178 sprintf(dbf_text,"flag%04x",callflags);
3179 QDIO_DBF_TEXT3(0,trace,dbf_text);
3180 sprintf(dbf_text,"qi%02xct%02x",qidx,count);
3181 QDIO_DBF_TEXT3(0,trace,dbf_text);
3182#endif /* CONFIG_QDIO_DEBUG */
3183
3184 if (irq_ptr->state!=QDIO_IRQ_STATE_ACTIVE)
3185 return -EBUSY;
3186
3187 if (callflags&QDIO_FLAG_SYNC_INPUT)
3188 do_qdio_handle_inbound(irq_ptr->input_qs[queue_number],
3189 callflags, qidx, count, buffers);
3190 else if (callflags&QDIO_FLAG_SYNC_OUTPUT)
3191 do_qdio_handle_outbound(irq_ptr->output_qs[queue_number],
3192 callflags, qidx, count, buffers);
3193 else {
3194 QDIO_DBF_TEXT3(1,trace,"doQD:inv");
3195 return -EINVAL;
3196 }
3197 return 0;
3198}
3199
3200#ifdef QDIO_PERFORMANCE_STATS
3201static int
3202qdio_perf_procfile_read(char *buffer, char **buffer_location, off_t offset,
3203 int buffer_length, int *eof, void *data)
3204{
3205 int c=0;
3206
3207 /* we are always called with buffer_length=4k, so we all
3208 deliver on the first read */
3209 if (offset>0)
3210 return 0;
3211
3212#define _OUTP_IT(x...) c+=sprintf(buffer+c,x)
3213 _OUTP_IT("i_p_nc/c=%lu/%lu\n",i_p_nc,i_p_c);
3214 _OUTP_IT("ii_p_nc/c=%lu/%lu\n",ii_p_nc,ii_p_c);
3215 _OUTP_IT("o_p_nc/c=%lu/%lu\n",o_p_nc,o_p_c);
3216 _OUTP_IT("Number of tasklet runs (total) : %u\n",
3217 perf_stats.tl_runs);
3218 _OUTP_IT("\n");
3219 _OUTP_IT("Number of SIGA sync's issued : %u\n",
3220 perf_stats.siga_syncs);
3221 _OUTP_IT("Number of SIGA in's issued : %u\n",
3222 perf_stats.siga_ins);
3223 _OUTP_IT("Number of SIGA out's issued : %u\n",
3224 perf_stats.siga_outs);
3225 _OUTP_IT("Number of PCIs caught : %u\n",
3226 perf_stats.pcis);
3227 _OUTP_IT("Number of adapter interrupts caught : %u\n",
3228 perf_stats.thinints);
3229 _OUTP_IT("Number of fast requeues (outg. SBALs w/o SIGA) : %u\n",
3230 perf_stats.fast_reqs);
3231 _OUTP_IT("\n");
3232 _OUTP_IT("Total time of all inbound actions (us) incl. UL : %u\n",
3233 perf_stats.inbound_time);
3234 _OUTP_IT("Number of inbound transfers : %u\n",
3235 perf_stats.inbound_cnt);
3236 _OUTP_IT("Total time of all outbound do_QDIOs (us) : %u\n",
3237 perf_stats.outbound_time);
3238 _OUTP_IT("Number of do_QDIOs outbound : %u\n",
3239 perf_stats.outbound_cnt);
3240 _OUTP_IT("\n");
3241
3242 return c;
3243}
3244
3245static struct proc_dir_entry *qdio_perf_proc_file;
3246#endif /* QDIO_PERFORMANCE_STATS */
3247
3248static void
3249qdio_add_procfs_entry(void)
3250{
3251#ifdef QDIO_PERFORMANCE_STATS
3252 proc_perf_file_registration=0;
3253 qdio_perf_proc_file=create_proc_entry(QDIO_PERF,
3254 S_IFREG|0444,&proc_root);
3255 if (qdio_perf_proc_file) {
3256 qdio_perf_proc_file->read_proc=&qdio_perf_procfile_read;
3257 } else proc_perf_file_registration=-1;
3258
3259 if (proc_perf_file_registration)
3260 QDIO_PRINT_WARN("was not able to register perf. " \
3261 "proc-file (%i).\n",
3262 proc_perf_file_registration);
3263#endif /* QDIO_PERFORMANCE_STATS */
3264}
3265
3266static void
3267qdio_remove_procfs_entry(void)
3268{
3269#ifdef QDIO_PERFORMANCE_STATS
3270 perf_stats.tl_runs=0;
3271
3272 if (!proc_perf_file_registration) /* means if it went ok earlier */
3273 remove_proc_entry(QDIO_PERF,&proc_root);
3274#endif /* QDIO_PERFORMANCE_STATS */
3275}
3276
3277static void
3278tiqdio_register_thinints(void)
3279{
3280 char dbf_text[20];
3281 register_thinint_result=
3282 s390_register_adapter_interrupt(&tiqdio_thinint_handler);
3283 if (register_thinint_result) {
3284 sprintf(dbf_text,"regthn%x",(register_thinint_result&0xff));
3285 QDIO_DBF_TEXT0(0,setup,dbf_text);
3286 QDIO_PRINT_ERR("failed to register adapter handler " \
3287 "(rc=%i).\nAdapter interrupts might " \
3288 "not work. Continuing.\n",
3289 register_thinint_result);
3290 }
3291}
3292
3293static void
3294tiqdio_unregister_thinints(void)
3295{
3296 if (!register_thinint_result)
3297 s390_unregister_adapter_interrupt(&tiqdio_thinint_handler);
3298}
3299
3300static int
3301qdio_get_qdio_memory(void)
3302{
3303 int i;
3304 indicator_used[0]=1;
3305
3306 for (i=1;i<INDICATORS_PER_CACHELINE;i++)
3307 indicator_used[i]=0;
3308 indicators=(__u32*)kmalloc(sizeof(__u32)*(INDICATORS_PER_CACHELINE),
3309 GFP_KERNEL);
3310 if (!indicators) return -ENOMEM;
3311 memset(indicators,0,sizeof(__u32)*(INDICATORS_PER_CACHELINE));
3312 return 0;
3313}
3314
3315static void
3316qdio_release_qdio_memory(void)
3317{
3318 if (indicators)
3319 kfree(indicators);
3320}
3321
3322static void
3323qdio_unregister_dbf_views(void)
3324{
3325 if (qdio_dbf_setup)
3326 debug_unregister(qdio_dbf_setup);
3327 if (qdio_dbf_sbal)
3328 debug_unregister(qdio_dbf_sbal);
3329 if (qdio_dbf_sense)
3330 debug_unregister(qdio_dbf_sense);
3331 if (qdio_dbf_trace)
3332 debug_unregister(qdio_dbf_trace);
3333#ifdef CONFIG_QDIO_DEBUG
3334 if (qdio_dbf_slsb_out)
3335 debug_unregister(qdio_dbf_slsb_out);
3336 if (qdio_dbf_slsb_in)
3337 debug_unregister(qdio_dbf_slsb_in);
3338#endif /* CONFIG_QDIO_DEBUG */
3339}
3340
3341static int
3342qdio_register_dbf_views(void)
3343{
3344 qdio_dbf_setup=debug_register(QDIO_DBF_SETUP_NAME,
3345 QDIO_DBF_SETUP_INDEX,
3346 QDIO_DBF_SETUP_NR_AREAS,
3347 QDIO_DBF_SETUP_LEN);
3348 if (!qdio_dbf_setup)
3349 goto oom;
3350 debug_register_view(qdio_dbf_setup,&debug_hex_ascii_view);
3351 debug_set_level(qdio_dbf_setup,QDIO_DBF_SETUP_LEVEL);
3352
3353 qdio_dbf_sbal=debug_register(QDIO_DBF_SBAL_NAME,
3354 QDIO_DBF_SBAL_INDEX,
3355 QDIO_DBF_SBAL_NR_AREAS,
3356 QDIO_DBF_SBAL_LEN);
3357 if (!qdio_dbf_sbal)
3358 goto oom;
3359
3360 debug_register_view(qdio_dbf_sbal,&debug_hex_ascii_view);
3361 debug_set_level(qdio_dbf_sbal,QDIO_DBF_SBAL_LEVEL);
3362
3363 qdio_dbf_sense=debug_register(QDIO_DBF_SENSE_NAME,
3364 QDIO_DBF_SENSE_INDEX,
3365 QDIO_DBF_SENSE_NR_AREAS,
3366 QDIO_DBF_SENSE_LEN);
3367 if (!qdio_dbf_sense)
3368 goto oom;
3369
3370 debug_register_view(qdio_dbf_sense,&debug_hex_ascii_view);
3371 debug_set_level(qdio_dbf_sense,QDIO_DBF_SENSE_LEVEL);
3372
3373 qdio_dbf_trace=debug_register(QDIO_DBF_TRACE_NAME,
3374 QDIO_DBF_TRACE_INDEX,
3375 QDIO_DBF_TRACE_NR_AREAS,
3376 QDIO_DBF_TRACE_LEN);
3377 if (!qdio_dbf_trace)
3378 goto oom;
3379
3380 debug_register_view(qdio_dbf_trace,&debug_hex_ascii_view);
3381 debug_set_level(qdio_dbf_trace,QDIO_DBF_TRACE_LEVEL);
3382
3383#ifdef CONFIG_QDIO_DEBUG
3384 qdio_dbf_slsb_out=debug_register(QDIO_DBF_SLSB_OUT_NAME,
3385 QDIO_DBF_SLSB_OUT_INDEX,
3386 QDIO_DBF_SLSB_OUT_NR_AREAS,
3387 QDIO_DBF_SLSB_OUT_LEN);
3388 if (!qdio_dbf_slsb_out)
3389 goto oom;
3390 debug_register_view(qdio_dbf_slsb_out,&debug_hex_ascii_view);
3391 debug_set_level(qdio_dbf_slsb_out,QDIO_DBF_SLSB_OUT_LEVEL);
3392
3393 qdio_dbf_slsb_in=debug_register(QDIO_DBF_SLSB_IN_NAME,
3394 QDIO_DBF_SLSB_IN_INDEX,
3395 QDIO_DBF_SLSB_IN_NR_AREAS,
3396 QDIO_DBF_SLSB_IN_LEN);
3397 if (!qdio_dbf_slsb_in)
3398 goto oom;
3399 debug_register_view(qdio_dbf_slsb_in,&debug_hex_ascii_view);
3400 debug_set_level(qdio_dbf_slsb_in,QDIO_DBF_SLSB_IN_LEVEL);
3401#endif /* CONFIG_QDIO_DEBUG */
3402 return 0;
3403oom:
3404 QDIO_PRINT_ERR("not enough memory for dbf.\n");
3405 qdio_unregister_dbf_views();
3406 return -ENOMEM;
3407}
3408
3409static int __init
3410init_QDIO(void)
3411{
3412 int res;
3413#ifdef QDIO_PERFORMANCE_STATS
3414 void *ptr;
3415#endif /* QDIO_PERFORMANCE_STATS */
3416
3417 printk("qdio: loading %s\n",version);
3418
3419 res=qdio_get_qdio_memory();
3420 if (res)
3421 return res;
3422
3423 res = qdio_register_dbf_views();
3424 if (res)
3425 return res;
3426
3427 QDIO_DBF_TEXT0(0,setup,"initQDIO");
3428
3429#ifdef QDIO_PERFORMANCE_STATS
3430 memset((void*)&perf_stats,0,sizeof(perf_stats));
3431 QDIO_DBF_TEXT0(0,setup,"perfstat");
3432 ptr=&perf_stats;
3433 QDIO_DBF_HEX0(0,setup,&ptr,sizeof(void*));
3434#endif /* QDIO_PERFORMANCE_STATS */
3435
3436 qdio_add_procfs_entry();
3437
3438 if (tiqdio_check_chsc_availability())
3439 QDIO_PRINT_ERR("Not all CHSCs supported. Continuing.\n");
3440
3441 tiqdio_register_thinints();
3442
3443 return 0;
3444 }
3445
3446static void __exit
3447cleanup_QDIO(void)
3448{
3449 tiqdio_unregister_thinints();
3450 qdio_remove_procfs_entry();
3451 qdio_release_qdio_memory();
3452 qdio_unregister_dbf_views();
3453
3454 printk("qdio: %s: module removed\n",version);
3455}
3456
3457module_init(init_QDIO);
3458module_exit(cleanup_QDIO);
3459
3460EXPORT_SYMBOL(qdio_allocate);
3461EXPORT_SYMBOL(qdio_establish);
3462EXPORT_SYMBOL(qdio_initialize);
3463EXPORT_SYMBOL(qdio_activate);
3464EXPORT_SYMBOL(do_QDIO);
3465EXPORT_SYMBOL(qdio_shutdown);
3466EXPORT_SYMBOL(qdio_free);
3467EXPORT_SYMBOL(qdio_cleanup);
3468EXPORT_SYMBOL(qdio_synchronize);