diff options
Diffstat (limited to 'drivers/power/avs')
-rw-r--r-- | drivers/power/avs/Kconfig | 12 | ||||
-rw-r--r-- | drivers/power/avs/Makefile | 1 | ||||
-rw-r--r-- | drivers/power/avs/smartreflex.c | 1126 |
3 files changed, 1139 insertions, 0 deletions
diff --git a/drivers/power/avs/Kconfig b/drivers/power/avs/Kconfig new file mode 100644 index 000000000000..2a1008b61121 --- /dev/null +++ b/drivers/power/avs/Kconfig | |||
@@ -0,0 +1,12 @@ | |||
1 | menuconfig POWER_AVS | ||
2 | bool "Adaptive Voltage Scaling class support" | ||
3 | help | ||
4 | AVS is a power management technique which finely controls the | ||
5 | operating voltage of a device in order to optimize (i.e. reduce) | ||
6 | its power consumption. | ||
7 | At a given operating point the voltage is adapted depending on | ||
8 | static factors (chip manufacturing process) and dynamic factors | ||
9 | (temperature depending performance). | ||
10 | AVS is also called SmartReflex on OMAP devices. | ||
11 | |||
12 | Say Y here to enable Adaptive Voltage Scaling class support. | ||
diff --git a/drivers/power/avs/Makefile b/drivers/power/avs/Makefile new file mode 100644 index 000000000000..0843386a6c19 --- /dev/null +++ b/drivers/power/avs/Makefile | |||
@@ -0,0 +1 @@ | |||
obj-$(CONFIG_POWER_AVS_OMAP) += smartreflex.o | |||
diff --git a/drivers/power/avs/smartreflex.c b/drivers/power/avs/smartreflex.c new file mode 100644 index 000000000000..44efc6e202af --- /dev/null +++ b/drivers/power/avs/smartreflex.c | |||
@@ -0,0 +1,1126 @@ | |||
1 | /* | ||
2 | * OMAP SmartReflex Voltage Control | ||
3 | * | ||
4 | * Author: Thara Gopinath <thara@ti.com> | ||
5 | * | ||
6 | * Copyright (C) 2012 Texas Instruments, Inc. | ||
7 | * Thara Gopinath <thara@ti.com> | ||
8 | * | ||
9 | * Copyright (C) 2008 Nokia Corporation | ||
10 | * Kalle Jokiniemi | ||
11 | * | ||
12 | * Copyright (C) 2007 Texas Instruments, Inc. | ||
13 | * Lesly A M <x0080970@ti.com> | ||
14 | * | ||
15 | * This program is free software; you can redistribute it and/or modify | ||
16 | * it under the terms of the GNU General Public License version 2 as | ||
17 | * published by the Free Software Foundation. | ||
18 | */ | ||
19 | |||
20 | #include <linux/module.h> | ||
21 | #include <linux/interrupt.h> | ||
22 | #include <linux/clk.h> | ||
23 | #include <linux/io.h> | ||
24 | #include <linux/debugfs.h> | ||
25 | #include <linux/delay.h> | ||
26 | #include <linux/slab.h> | ||
27 | #include <linux/pm_runtime.h> | ||
28 | #include <linux/power/smartreflex.h> | ||
29 | |||
30 | #define SMARTREFLEX_NAME_LEN 16 | ||
31 | #define NVALUE_NAME_LEN 40 | ||
32 | #define SR_DISABLE_TIMEOUT 200 | ||
33 | |||
34 | /* sr_list contains all the instances of smartreflex module */ | ||
35 | static LIST_HEAD(sr_list); | ||
36 | |||
37 | static struct omap_sr_class_data *sr_class; | ||
38 | static struct omap_sr_pmic_data *sr_pmic_data; | ||
39 | static struct dentry *sr_dbg_dir; | ||
40 | |||
41 | static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value) | ||
42 | { | ||
43 | __raw_writel(value, (sr->base + offset)); | ||
44 | } | ||
45 | |||
46 | static inline void sr_modify_reg(struct omap_sr *sr, unsigned offset, u32 mask, | ||
47 | u32 value) | ||
48 | { | ||
49 | u32 reg_val; | ||
50 | |||
51 | /* | ||
52 | * Smartreflex error config register is special as it contains | ||
53 | * certain status bits which if written a 1 into means a clear | ||
54 | * of those bits. So in order to make sure no accidental write of | ||
55 | * 1 happens to those status bits, do a clear of them in the read | ||
56 | * value. This mean this API doesn't rewrite values in these bits | ||
57 | * if they are currently set, but does allow the caller to write | ||
58 | * those bits. | ||
59 | */ | ||
60 | if (sr->ip_type == SR_TYPE_V1 && offset == ERRCONFIG_V1) | ||
61 | mask |= ERRCONFIG_STATUS_V1_MASK; | ||
62 | else if (sr->ip_type == SR_TYPE_V2 && offset == ERRCONFIG_V2) | ||
63 | mask |= ERRCONFIG_VPBOUNDINTST_V2; | ||
64 | |||
65 | reg_val = __raw_readl(sr->base + offset); | ||
66 | reg_val &= ~mask; | ||
67 | |||
68 | value &= mask; | ||
69 | |||
70 | reg_val |= value; | ||
71 | |||
72 | __raw_writel(reg_val, (sr->base + offset)); | ||
73 | } | ||
74 | |||
75 | static inline u32 sr_read_reg(struct omap_sr *sr, unsigned offset) | ||
76 | { | ||
77 | return __raw_readl(sr->base + offset); | ||
78 | } | ||
79 | |||
80 | static struct omap_sr *_sr_lookup(struct voltagedomain *voltdm) | ||
81 | { | ||
82 | struct omap_sr *sr_info; | ||
83 | |||
84 | if (!voltdm) { | ||
85 | pr_err("%s: Null voltage domain passed!\n", __func__); | ||
86 | return ERR_PTR(-EINVAL); | ||
87 | } | ||
88 | |||
89 | list_for_each_entry(sr_info, &sr_list, node) { | ||
90 | if (voltdm == sr_info->voltdm) | ||
91 | return sr_info; | ||
92 | } | ||
93 | |||
94 | return ERR_PTR(-ENODATA); | ||
95 | } | ||
96 | |||
97 | static irqreturn_t sr_interrupt(int irq, void *data) | ||
98 | { | ||
99 | struct omap_sr *sr_info = data; | ||
100 | u32 status = 0; | ||
101 | |||
102 | switch (sr_info->ip_type) { | ||
103 | case SR_TYPE_V1: | ||
104 | /* Read the status bits */ | ||
105 | status = sr_read_reg(sr_info, ERRCONFIG_V1); | ||
106 | |||
107 | /* Clear them by writing back */ | ||
108 | sr_write_reg(sr_info, ERRCONFIG_V1, status); | ||
109 | break; | ||
110 | case SR_TYPE_V2: | ||
111 | /* Read the status bits */ | ||
112 | status = sr_read_reg(sr_info, IRQSTATUS); | ||
113 | |||
114 | /* Clear them by writing back */ | ||
115 | sr_write_reg(sr_info, IRQSTATUS, status); | ||
116 | break; | ||
117 | default: | ||
118 | dev_err(&sr_info->pdev->dev, "UNKNOWN IP type %d\n", | ||
119 | sr_info->ip_type); | ||
120 | return IRQ_NONE; | ||
121 | } | ||
122 | |||
123 | if (sr_class->notify) | ||
124 | sr_class->notify(sr_info, status); | ||
125 | |||
126 | return IRQ_HANDLED; | ||
127 | } | ||
128 | |||
129 | static void sr_set_clk_length(struct omap_sr *sr) | ||
130 | { | ||
131 | struct clk *sys_ck; | ||
132 | u32 sys_clk_speed; | ||
133 | |||
134 | if (cpu_is_omap34xx()) | ||
135 | sys_ck = clk_get(NULL, "sys_ck"); | ||
136 | else | ||
137 | sys_ck = clk_get(NULL, "sys_clkin_ck"); | ||
138 | |||
139 | if (IS_ERR(sys_ck)) { | ||
140 | dev_err(&sr->pdev->dev, "%s: unable to get sys clk\n", | ||
141 | __func__); | ||
142 | return; | ||
143 | } | ||
144 | |||
145 | sys_clk_speed = clk_get_rate(sys_ck); | ||
146 | clk_put(sys_ck); | ||
147 | |||
148 | switch (sys_clk_speed) { | ||
149 | case 12000000: | ||
150 | sr->clk_length = SRCLKLENGTH_12MHZ_SYSCLK; | ||
151 | break; | ||
152 | case 13000000: | ||
153 | sr->clk_length = SRCLKLENGTH_13MHZ_SYSCLK; | ||
154 | break; | ||
155 | case 19200000: | ||
156 | sr->clk_length = SRCLKLENGTH_19MHZ_SYSCLK; | ||
157 | break; | ||
158 | case 26000000: | ||
159 | sr->clk_length = SRCLKLENGTH_26MHZ_SYSCLK; | ||
160 | break; | ||
161 | case 38400000: | ||
162 | sr->clk_length = SRCLKLENGTH_38MHZ_SYSCLK; | ||
163 | break; | ||
164 | default: | ||
165 | dev_err(&sr->pdev->dev, "%s: Invalid sysclk value: %d\n", | ||
166 | __func__, sys_clk_speed); | ||
167 | break; | ||
168 | } | ||
169 | } | ||
170 | |||
171 | static void sr_set_regfields(struct omap_sr *sr) | ||
172 | { | ||
173 | /* | ||
174 | * For time being these values are defined in smartreflex.h | ||
175 | * and populated during init. May be they can be moved to board | ||
176 | * file or pmic specific data structure. In that case these structure | ||
177 | * fields will have to be populated using the pdata or pmic structure. | ||
178 | */ | ||
179 | if (cpu_is_omap34xx() || cpu_is_omap44xx()) { | ||
180 | sr->err_weight = OMAP3430_SR_ERRWEIGHT; | ||
181 | sr->err_maxlimit = OMAP3430_SR_ERRMAXLIMIT; | ||
182 | sr->accum_data = OMAP3430_SR_ACCUMDATA; | ||
183 | if (!(strcmp(sr->name, "smartreflex_mpu_iva"))) { | ||
184 | sr->senn_avgweight = OMAP3430_SR1_SENNAVGWEIGHT; | ||
185 | sr->senp_avgweight = OMAP3430_SR1_SENPAVGWEIGHT; | ||
186 | } else { | ||
187 | sr->senn_avgweight = OMAP3430_SR2_SENNAVGWEIGHT; | ||
188 | sr->senp_avgweight = OMAP3430_SR2_SENPAVGWEIGHT; | ||
189 | } | ||
190 | } | ||
191 | } | ||
192 | |||
193 | static void sr_start_vddautocomp(struct omap_sr *sr) | ||
194 | { | ||
195 | if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) { | ||
196 | dev_warn(&sr->pdev->dev, | ||
197 | "%s: smartreflex class driver not registered\n", | ||
198 | __func__); | ||
199 | return; | ||
200 | } | ||
201 | |||
202 | if (!sr_class->enable(sr)) | ||
203 | sr->autocomp_active = true; | ||
204 | } | ||
205 | |||
206 | static void sr_stop_vddautocomp(struct omap_sr *sr) | ||
207 | { | ||
208 | if (!sr_class || !(sr_class->disable)) { | ||
209 | dev_warn(&sr->pdev->dev, | ||
210 | "%s: smartreflex class driver not registered\n", | ||
211 | __func__); | ||
212 | return; | ||
213 | } | ||
214 | |||
215 | if (sr->autocomp_active) { | ||
216 | sr_class->disable(sr, 1); | ||
217 | sr->autocomp_active = false; | ||
218 | } | ||
219 | } | ||
220 | |||
221 | /* | ||
222 | * This function handles the intializations which have to be done | ||
223 | * only when both sr device and class driver regiter has | ||
224 | * completed. This will be attempted to be called from both sr class | ||
225 | * driver register and sr device intializtion API's. Only one call | ||
226 | * will ultimately succeed. | ||
227 | * | ||
228 | * Currently this function registers interrupt handler for a particular SR | ||
229 | * if smartreflex class driver is already registered and has | ||
230 | * requested for interrupts and the SR interrupt line in present. | ||
231 | */ | ||
232 | static int sr_late_init(struct omap_sr *sr_info) | ||
233 | { | ||
234 | struct omap_sr_data *pdata = sr_info->pdev->dev.platform_data; | ||
235 | struct resource *mem; | ||
236 | int ret = 0; | ||
237 | |||
238 | if (sr_class->notify && sr_class->notify_flags && sr_info->irq) { | ||
239 | ret = request_irq(sr_info->irq, sr_interrupt, | ||
240 | 0, sr_info->name, sr_info); | ||
241 | if (ret) | ||
242 | goto error; | ||
243 | disable_irq(sr_info->irq); | ||
244 | } | ||
245 | |||
246 | if (pdata && pdata->enable_on_init) | ||
247 | sr_start_vddautocomp(sr_info); | ||
248 | |||
249 | return ret; | ||
250 | |||
251 | error: | ||
252 | iounmap(sr_info->base); | ||
253 | mem = platform_get_resource(sr_info->pdev, IORESOURCE_MEM, 0); | ||
254 | release_mem_region(mem->start, resource_size(mem)); | ||
255 | list_del(&sr_info->node); | ||
256 | dev_err(&sr_info->pdev->dev, "%s: ERROR in registering" | ||
257 | "interrupt handler. Smartreflex will" | ||
258 | "not function as desired\n", __func__); | ||
259 | kfree(sr_info); | ||
260 | |||
261 | return ret; | ||
262 | } | ||
263 | |||
264 | static void sr_v1_disable(struct omap_sr *sr) | ||
265 | { | ||
266 | int timeout = 0; | ||
267 | int errconf_val = ERRCONFIG_MCUACCUMINTST | ERRCONFIG_MCUVALIDINTST | | ||
268 | ERRCONFIG_MCUBOUNDINTST; | ||
269 | |||
270 | /* Enable MCUDisableAcknowledge interrupt */ | ||
271 | sr_modify_reg(sr, ERRCONFIG_V1, | ||
272 | ERRCONFIG_MCUDISACKINTEN, ERRCONFIG_MCUDISACKINTEN); | ||
273 | |||
274 | /* SRCONFIG - disable SR */ | ||
275 | sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0); | ||
276 | |||
277 | /* Disable all other SR interrupts and clear the status as needed */ | ||
278 | if (sr_read_reg(sr, ERRCONFIG_V1) & ERRCONFIG_VPBOUNDINTST_V1) | ||
279 | errconf_val |= ERRCONFIG_VPBOUNDINTST_V1; | ||
280 | sr_modify_reg(sr, ERRCONFIG_V1, | ||
281 | (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN | | ||
282 | ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_VPBOUNDINTEN_V1), | ||
283 | errconf_val); | ||
284 | |||
285 | /* | ||
286 | * Wait for SR to be disabled. | ||
287 | * wait until ERRCONFIG.MCUDISACKINTST = 1. Typical latency is 1us. | ||
288 | */ | ||
289 | sr_test_cond_timeout((sr_read_reg(sr, ERRCONFIG_V1) & | ||
290 | ERRCONFIG_MCUDISACKINTST), SR_DISABLE_TIMEOUT, | ||
291 | timeout); | ||
292 | |||
293 | if (timeout >= SR_DISABLE_TIMEOUT) | ||
294 | dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n", | ||
295 | __func__); | ||
296 | |||
297 | /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */ | ||
298 | sr_modify_reg(sr, ERRCONFIG_V1, ERRCONFIG_MCUDISACKINTEN, | ||
299 | ERRCONFIG_MCUDISACKINTST); | ||
300 | } | ||
301 | |||
302 | static void sr_v2_disable(struct omap_sr *sr) | ||
303 | { | ||
304 | int timeout = 0; | ||
305 | |||
306 | /* Enable MCUDisableAcknowledge interrupt */ | ||
307 | sr_write_reg(sr, IRQENABLE_SET, IRQENABLE_MCUDISABLEACKINT); | ||
308 | |||
309 | /* SRCONFIG - disable SR */ | ||
310 | sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, 0x0); | ||
311 | |||
312 | /* | ||
313 | * Disable all other SR interrupts and clear the status | ||
314 | * write to status register ONLY on need basis - only if status | ||
315 | * is set. | ||
316 | */ | ||
317 | if (sr_read_reg(sr, ERRCONFIG_V2) & ERRCONFIG_VPBOUNDINTST_V2) | ||
318 | sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2, | ||
319 | ERRCONFIG_VPBOUNDINTST_V2); | ||
320 | else | ||
321 | sr_modify_reg(sr, ERRCONFIG_V2, ERRCONFIG_VPBOUNDINTEN_V2, | ||
322 | 0x0); | ||
323 | sr_write_reg(sr, IRQENABLE_CLR, (IRQENABLE_MCUACCUMINT | | ||
324 | IRQENABLE_MCUVALIDINT | | ||
325 | IRQENABLE_MCUBOUNDSINT)); | ||
326 | sr_write_reg(sr, IRQSTATUS, (IRQSTATUS_MCUACCUMINT | | ||
327 | IRQSTATUS_MCVALIDINT | | ||
328 | IRQSTATUS_MCBOUNDSINT)); | ||
329 | |||
330 | /* | ||
331 | * Wait for SR to be disabled. | ||
332 | * wait until IRQSTATUS.MCUDISACKINTST = 1. Typical latency is 1us. | ||
333 | */ | ||
334 | sr_test_cond_timeout((sr_read_reg(sr, IRQSTATUS) & | ||
335 | IRQSTATUS_MCUDISABLEACKINT), SR_DISABLE_TIMEOUT, | ||
336 | timeout); | ||
337 | |||
338 | if (timeout >= SR_DISABLE_TIMEOUT) | ||
339 | dev_warn(&sr->pdev->dev, "%s: Smartreflex disable timedout\n", | ||
340 | __func__); | ||
341 | |||
342 | /* Disable MCUDisableAcknowledge interrupt & clear pending interrupt */ | ||
343 | sr_write_reg(sr, IRQENABLE_CLR, IRQENABLE_MCUDISABLEACKINT); | ||
344 | sr_write_reg(sr, IRQSTATUS, IRQSTATUS_MCUDISABLEACKINT); | ||
345 | } | ||
346 | |||
347 | static struct omap_sr_nvalue_table *sr_retrieve_nvalue_row( | ||
348 | struct omap_sr *sr, u32 efuse_offs) | ||
349 | { | ||
350 | int i; | ||
351 | |||
352 | if (!sr->nvalue_table) { | ||
353 | dev_warn(&sr->pdev->dev, "%s: Missing ntarget value table\n", | ||
354 | __func__); | ||
355 | return NULL; | ||
356 | } | ||
357 | |||
358 | for (i = 0; i < sr->nvalue_count; i++) { | ||
359 | if (sr->nvalue_table[i].efuse_offs == efuse_offs) | ||
360 | return &sr->nvalue_table[i]; | ||
361 | } | ||
362 | |||
363 | return NULL; | ||
364 | } | ||
365 | |||
366 | /* Public Functions */ | ||
367 | |||
368 | /** | ||
369 | * sr_configure_errgen() - Configures the smrtreflex to perform AVS using the | ||
370 | * error generator module. | ||
371 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | ||
372 | * | ||
373 | * This API is to be called from the smartreflex class driver to | ||
374 | * configure the error generator module inside the smartreflex module. | ||
375 | * SR settings if using the ERROR module inside Smartreflex. | ||
376 | * SR CLASS 3 by default uses only the ERROR module where as | ||
377 | * SR CLASS 2 can choose between ERROR module and MINMAXAVG | ||
378 | * module. Returns 0 on success and error value in case of failure. | ||
379 | */ | ||
380 | int sr_configure_errgen(struct voltagedomain *voltdm) | ||
381 | { | ||
382 | u32 sr_config, sr_errconfig, errconfig_offs; | ||
383 | u32 vpboundint_en, vpboundint_st; | ||
384 | u32 senp_en = 0, senn_en = 0; | ||
385 | u8 senp_shift, senn_shift; | ||
386 | struct omap_sr *sr = _sr_lookup(voltdm); | ||
387 | |||
388 | if (IS_ERR(sr)) { | ||
389 | pr_warning("%s: omap_sr struct for voltdm not found\n", __func__); | ||
390 | return PTR_ERR(sr); | ||
391 | } | ||
392 | |||
393 | if (!sr->clk_length) | ||
394 | sr_set_clk_length(sr); | ||
395 | |||
396 | senp_en = sr->senp_mod; | ||
397 | senn_en = sr->senn_mod; | ||
398 | |||
399 | sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) | | ||
400 | SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN; | ||
401 | |||
402 | switch (sr->ip_type) { | ||
403 | case SR_TYPE_V1: | ||
404 | sr_config |= SRCONFIG_DELAYCTRL; | ||
405 | senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT; | ||
406 | senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT; | ||
407 | errconfig_offs = ERRCONFIG_V1; | ||
408 | vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1; | ||
409 | vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1; | ||
410 | break; | ||
411 | case SR_TYPE_V2: | ||
412 | senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT; | ||
413 | senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT; | ||
414 | errconfig_offs = ERRCONFIG_V2; | ||
415 | vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2; | ||
416 | vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2; | ||
417 | break; | ||
418 | default: | ||
419 | dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex" | ||
420 | "module without specifying the ip\n", __func__); | ||
421 | return -EINVAL; | ||
422 | } | ||
423 | |||
424 | sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift)); | ||
425 | sr_write_reg(sr, SRCONFIG, sr_config); | ||
426 | sr_errconfig = (sr->err_weight << ERRCONFIG_ERRWEIGHT_SHIFT) | | ||
427 | (sr->err_maxlimit << ERRCONFIG_ERRMAXLIMIT_SHIFT) | | ||
428 | (sr->err_minlimit << ERRCONFIG_ERRMINLIMIT_SHIFT); | ||
429 | sr_modify_reg(sr, errconfig_offs, (SR_ERRWEIGHT_MASK | | ||
430 | SR_ERRMAXLIMIT_MASK | SR_ERRMINLIMIT_MASK), | ||
431 | sr_errconfig); | ||
432 | |||
433 | /* Enabling the interrupts if the ERROR module is used */ | ||
434 | sr_modify_reg(sr, errconfig_offs, (vpboundint_en | vpboundint_st), | ||
435 | vpboundint_en); | ||
436 | |||
437 | return 0; | ||
438 | } | ||
439 | |||
440 | /** | ||
441 | * sr_disable_errgen() - Disables SmartReflex AVS module's errgen component | ||
442 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | ||
443 | * | ||
444 | * This API is to be called from the smartreflex class driver to | ||
445 | * disable the error generator module inside the smartreflex module. | ||
446 | * | ||
447 | * Returns 0 on success and error value in case of failure. | ||
448 | */ | ||
449 | int sr_disable_errgen(struct voltagedomain *voltdm) | ||
450 | { | ||
451 | u32 errconfig_offs; | ||
452 | u32 vpboundint_en, vpboundint_st; | ||
453 | struct omap_sr *sr = _sr_lookup(voltdm); | ||
454 | |||
455 | if (IS_ERR(sr)) { | ||
456 | pr_warning("%s: omap_sr struct for voltdm not found\n", __func__); | ||
457 | return PTR_ERR(sr); | ||
458 | } | ||
459 | |||
460 | switch (sr->ip_type) { | ||
461 | case SR_TYPE_V1: | ||
462 | errconfig_offs = ERRCONFIG_V1; | ||
463 | vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V1; | ||
464 | vpboundint_st = ERRCONFIG_VPBOUNDINTST_V1; | ||
465 | break; | ||
466 | case SR_TYPE_V2: | ||
467 | errconfig_offs = ERRCONFIG_V2; | ||
468 | vpboundint_en = ERRCONFIG_VPBOUNDINTEN_V2; | ||
469 | vpboundint_st = ERRCONFIG_VPBOUNDINTST_V2; | ||
470 | break; | ||
471 | default: | ||
472 | dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex" | ||
473 | "module without specifying the ip\n", __func__); | ||
474 | return -EINVAL; | ||
475 | } | ||
476 | |||
477 | /* Disable the interrupts of ERROR module */ | ||
478 | sr_modify_reg(sr, errconfig_offs, vpboundint_en | vpboundint_st, 0); | ||
479 | |||
480 | /* Disable the Sensor and errorgen */ | ||
481 | sr_modify_reg(sr, SRCONFIG, SRCONFIG_SENENABLE | SRCONFIG_ERRGEN_EN, 0); | ||
482 | |||
483 | return 0; | ||
484 | } | ||
485 | |||
486 | /** | ||
487 | * sr_configure_minmax() - Configures the smrtreflex to perform AVS using the | ||
488 | * minmaxavg module. | ||
489 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | ||
490 | * | ||
491 | * This API is to be called from the smartreflex class driver to | ||
492 | * configure the minmaxavg module inside the smartreflex module. | ||
493 | * SR settings if using the ERROR module inside Smartreflex. | ||
494 | * SR CLASS 3 by default uses only the ERROR module where as | ||
495 | * SR CLASS 2 can choose between ERROR module and MINMAXAVG | ||
496 | * module. Returns 0 on success and error value in case of failure. | ||
497 | */ | ||
498 | int sr_configure_minmax(struct voltagedomain *voltdm) | ||
499 | { | ||
500 | u32 sr_config, sr_avgwt; | ||
501 | u32 senp_en = 0, senn_en = 0; | ||
502 | u8 senp_shift, senn_shift; | ||
503 | struct omap_sr *sr = _sr_lookup(voltdm); | ||
504 | |||
505 | if (IS_ERR(sr)) { | ||
506 | pr_warning("%s: omap_sr struct for voltdm not found\n", __func__); | ||
507 | return PTR_ERR(sr); | ||
508 | } | ||
509 | |||
510 | if (!sr->clk_length) | ||
511 | sr_set_clk_length(sr); | ||
512 | |||
513 | senp_en = sr->senp_mod; | ||
514 | senn_en = sr->senn_mod; | ||
515 | |||
516 | sr_config = (sr->clk_length << SRCONFIG_SRCLKLENGTH_SHIFT) | | ||
517 | SRCONFIG_SENENABLE | | ||
518 | (sr->accum_data << SRCONFIG_ACCUMDATA_SHIFT); | ||
519 | |||
520 | switch (sr->ip_type) { | ||
521 | case SR_TYPE_V1: | ||
522 | sr_config |= SRCONFIG_DELAYCTRL; | ||
523 | senn_shift = SRCONFIG_SENNENABLE_V1_SHIFT; | ||
524 | senp_shift = SRCONFIG_SENPENABLE_V1_SHIFT; | ||
525 | break; | ||
526 | case SR_TYPE_V2: | ||
527 | senn_shift = SRCONFIG_SENNENABLE_V2_SHIFT; | ||
528 | senp_shift = SRCONFIG_SENPENABLE_V2_SHIFT; | ||
529 | break; | ||
530 | default: | ||
531 | dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex" | ||
532 | "module without specifying the ip\n", __func__); | ||
533 | return -EINVAL; | ||
534 | } | ||
535 | |||
536 | sr_config |= ((senn_en << senn_shift) | (senp_en << senp_shift)); | ||
537 | sr_write_reg(sr, SRCONFIG, sr_config); | ||
538 | sr_avgwt = (sr->senp_avgweight << AVGWEIGHT_SENPAVGWEIGHT_SHIFT) | | ||
539 | (sr->senn_avgweight << AVGWEIGHT_SENNAVGWEIGHT_SHIFT); | ||
540 | sr_write_reg(sr, AVGWEIGHT, sr_avgwt); | ||
541 | |||
542 | /* | ||
543 | * Enabling the interrupts if MINMAXAVG module is used. | ||
544 | * TODO: check if all the interrupts are mandatory | ||
545 | */ | ||
546 | switch (sr->ip_type) { | ||
547 | case SR_TYPE_V1: | ||
548 | sr_modify_reg(sr, ERRCONFIG_V1, | ||
549 | (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUVALIDINTEN | | ||
550 | ERRCONFIG_MCUBOUNDINTEN), | ||
551 | (ERRCONFIG_MCUACCUMINTEN | ERRCONFIG_MCUACCUMINTST | | ||
552 | ERRCONFIG_MCUVALIDINTEN | ERRCONFIG_MCUVALIDINTST | | ||
553 | ERRCONFIG_MCUBOUNDINTEN | ERRCONFIG_MCUBOUNDINTST)); | ||
554 | break; | ||
555 | case SR_TYPE_V2: | ||
556 | sr_write_reg(sr, IRQSTATUS, | ||
557 | IRQSTATUS_MCUACCUMINT | IRQSTATUS_MCVALIDINT | | ||
558 | IRQSTATUS_MCBOUNDSINT | IRQSTATUS_MCUDISABLEACKINT); | ||
559 | sr_write_reg(sr, IRQENABLE_SET, | ||
560 | IRQENABLE_MCUACCUMINT | IRQENABLE_MCUVALIDINT | | ||
561 | IRQENABLE_MCUBOUNDSINT | IRQENABLE_MCUDISABLEACKINT); | ||
562 | break; | ||
563 | default: | ||
564 | dev_err(&sr->pdev->dev, "%s: Trying to Configure smartreflex" | ||
565 | "module without specifying the ip\n", __func__); | ||
566 | return -EINVAL; | ||
567 | } | ||
568 | |||
569 | return 0; | ||
570 | } | ||
571 | |||
572 | /** | ||
573 | * sr_enable() - Enables the smartreflex module. | ||
574 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | ||
575 | * @volt: The voltage at which the Voltage domain associated with | ||
576 | * the smartreflex module is operating at. | ||
577 | * This is required only to program the correct Ntarget value. | ||
578 | * | ||
579 | * This API is to be called from the smartreflex class driver to | ||
580 | * enable a smartreflex module. Returns 0 on success. Returns error | ||
581 | * value if the voltage passed is wrong or if ntarget value is wrong. | ||
582 | */ | ||
583 | int sr_enable(struct voltagedomain *voltdm, unsigned long volt) | ||
584 | { | ||
585 | struct omap_volt_data *volt_data; | ||
586 | struct omap_sr *sr = _sr_lookup(voltdm); | ||
587 | struct omap_sr_nvalue_table *nvalue_row; | ||
588 | int ret; | ||
589 | |||
590 | if (IS_ERR(sr)) { | ||
591 | pr_warning("%s: omap_sr struct for voltdm not found\n", __func__); | ||
592 | return PTR_ERR(sr); | ||
593 | } | ||
594 | |||
595 | volt_data = omap_voltage_get_voltdata(sr->voltdm, volt); | ||
596 | |||
597 | if (IS_ERR(volt_data)) { | ||
598 | dev_warn(&sr->pdev->dev, "%s: Unable to get voltage table" | ||
599 | "for nominal voltage %ld\n", __func__, volt); | ||
600 | return PTR_ERR(volt_data); | ||
601 | } | ||
602 | |||
603 | nvalue_row = sr_retrieve_nvalue_row(sr, volt_data->sr_efuse_offs); | ||
604 | |||
605 | if (!nvalue_row) { | ||
606 | dev_warn(&sr->pdev->dev, "%s: failure getting SR data for this voltage %ld\n", | ||
607 | __func__, volt); | ||
608 | return -ENODATA; | ||
609 | } | ||
610 | |||
611 | /* errminlimit is opp dependent and hence linked to voltage */ | ||
612 | sr->err_minlimit = nvalue_row->errminlimit; | ||
613 | |||
614 | pm_runtime_get_sync(&sr->pdev->dev); | ||
615 | |||
616 | /* Check if SR is already enabled. If yes do nothing */ | ||
617 | if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) | ||
618 | return 0; | ||
619 | |||
620 | /* Configure SR */ | ||
621 | ret = sr_class->configure(sr); | ||
622 | if (ret) | ||
623 | return ret; | ||
624 | |||
625 | sr_write_reg(sr, NVALUERECIPROCAL, nvalue_row->nvalue); | ||
626 | |||
627 | /* SRCONFIG - enable SR */ | ||
628 | sr_modify_reg(sr, SRCONFIG, SRCONFIG_SRENABLE, SRCONFIG_SRENABLE); | ||
629 | return 0; | ||
630 | } | ||
631 | |||
632 | /** | ||
633 | * sr_disable() - Disables the smartreflex module. | ||
634 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | ||
635 | * | ||
636 | * This API is to be called from the smartreflex class driver to | ||
637 | * disable a smartreflex module. | ||
638 | */ | ||
639 | void sr_disable(struct voltagedomain *voltdm) | ||
640 | { | ||
641 | struct omap_sr *sr = _sr_lookup(voltdm); | ||
642 | |||
643 | if (IS_ERR(sr)) { | ||
644 | pr_warning("%s: omap_sr struct for voltdm not found\n", __func__); | ||
645 | return; | ||
646 | } | ||
647 | |||
648 | /* Check if SR clocks are already disabled. If yes do nothing */ | ||
649 | if (pm_runtime_suspended(&sr->pdev->dev)) | ||
650 | return; | ||
651 | |||
652 | /* | ||
653 | * Disable SR if only it is indeed enabled. Else just | ||
654 | * disable the clocks. | ||
655 | */ | ||
656 | if (sr_read_reg(sr, SRCONFIG) & SRCONFIG_SRENABLE) { | ||
657 | switch (sr->ip_type) { | ||
658 | case SR_TYPE_V1: | ||
659 | sr_v1_disable(sr); | ||
660 | break; | ||
661 | case SR_TYPE_V2: | ||
662 | sr_v2_disable(sr); | ||
663 | break; | ||
664 | default: | ||
665 | dev_err(&sr->pdev->dev, "UNKNOWN IP type %d\n", | ||
666 | sr->ip_type); | ||
667 | } | ||
668 | } | ||
669 | |||
670 | pm_runtime_put_sync_suspend(&sr->pdev->dev); | ||
671 | } | ||
672 | |||
673 | /** | ||
674 | * sr_register_class() - API to register a smartreflex class parameters. | ||
675 | * @class_data: The structure containing various sr class specific data. | ||
676 | * | ||
677 | * This API is to be called by the smartreflex class driver to register itself | ||
678 | * with the smartreflex driver during init. Returns 0 on success else the | ||
679 | * error value. | ||
680 | */ | ||
681 | int sr_register_class(struct omap_sr_class_data *class_data) | ||
682 | { | ||
683 | struct omap_sr *sr_info; | ||
684 | |||
685 | if (!class_data) { | ||
686 | pr_warning("%s:, Smartreflex class data passed is NULL\n", | ||
687 | __func__); | ||
688 | return -EINVAL; | ||
689 | } | ||
690 | |||
691 | if (sr_class) { | ||
692 | pr_warning("%s: Smartreflex class driver already registered\n", | ||
693 | __func__); | ||
694 | return -EBUSY; | ||
695 | } | ||
696 | |||
697 | sr_class = class_data; | ||
698 | |||
699 | /* | ||
700 | * Call into late init to do intializations that require | ||
701 | * both sr driver and sr class driver to be initiallized. | ||
702 | */ | ||
703 | list_for_each_entry(sr_info, &sr_list, node) | ||
704 | sr_late_init(sr_info); | ||
705 | |||
706 | return 0; | ||
707 | } | ||
708 | |||
709 | /** | ||
710 | * omap_sr_enable() - API to enable SR clocks and to call into the | ||
711 | * registered smartreflex class enable API. | ||
712 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | ||
713 | * | ||
714 | * This API is to be called from the kernel in order to enable | ||
715 | * a particular smartreflex module. This API will do the initial | ||
716 | * configurations to turn on the smartreflex module and in turn call | ||
717 | * into the registered smartreflex class enable API. | ||
718 | */ | ||
719 | void omap_sr_enable(struct voltagedomain *voltdm) | ||
720 | { | ||
721 | struct omap_sr *sr = _sr_lookup(voltdm); | ||
722 | |||
723 | if (IS_ERR(sr)) { | ||
724 | pr_warning("%s: omap_sr struct for voltdm not found\n", __func__); | ||
725 | return; | ||
726 | } | ||
727 | |||
728 | if (!sr->autocomp_active) | ||
729 | return; | ||
730 | |||
731 | if (!sr_class || !(sr_class->enable) || !(sr_class->configure)) { | ||
732 | dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not" | ||
733 | "registered\n", __func__); | ||
734 | return; | ||
735 | } | ||
736 | |||
737 | sr_class->enable(sr); | ||
738 | } | ||
739 | |||
740 | /** | ||
741 | * omap_sr_disable() - API to disable SR without resetting the voltage | ||
742 | * processor voltage | ||
743 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | ||
744 | * | ||
745 | * This API is to be called from the kernel in order to disable | ||
746 | * a particular smartreflex module. This API will in turn call | ||
747 | * into the registered smartreflex class disable API. This API will tell | ||
748 | * the smartreflex class disable not to reset the VP voltage after | ||
749 | * disabling smartreflex. | ||
750 | */ | ||
751 | void omap_sr_disable(struct voltagedomain *voltdm) | ||
752 | { | ||
753 | struct omap_sr *sr = _sr_lookup(voltdm); | ||
754 | |||
755 | if (IS_ERR(sr)) { | ||
756 | pr_warning("%s: omap_sr struct for voltdm not found\n", __func__); | ||
757 | return; | ||
758 | } | ||
759 | |||
760 | if (!sr->autocomp_active) | ||
761 | return; | ||
762 | |||
763 | if (!sr_class || !(sr_class->disable)) { | ||
764 | dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not" | ||
765 | "registered\n", __func__); | ||
766 | return; | ||
767 | } | ||
768 | |||
769 | sr_class->disable(sr, 0); | ||
770 | } | ||
771 | |||
772 | /** | ||
773 | * omap_sr_disable_reset_volt() - API to disable SR and reset the | ||
774 | * voltage processor voltage | ||
775 | * @voltdm: VDD pointer to which the SR module to be configured belongs to. | ||
776 | * | ||
777 | * This API is to be called from the kernel in order to disable | ||
778 | * a particular smartreflex module. This API will in turn call | ||
779 | * into the registered smartreflex class disable API. This API will tell | ||
780 | * the smartreflex class disable to reset the VP voltage after | ||
781 | * disabling smartreflex. | ||
782 | */ | ||
783 | void omap_sr_disable_reset_volt(struct voltagedomain *voltdm) | ||
784 | { | ||
785 | struct omap_sr *sr = _sr_lookup(voltdm); | ||
786 | |||
787 | if (IS_ERR(sr)) { | ||
788 | pr_warning("%s: omap_sr struct for voltdm not found\n", __func__); | ||
789 | return; | ||
790 | } | ||
791 | |||
792 | if (!sr->autocomp_active) | ||
793 | return; | ||
794 | |||
795 | if (!sr_class || !(sr_class->disable)) { | ||
796 | dev_warn(&sr->pdev->dev, "%s: smartreflex class driver not" | ||
797 | "registered\n", __func__); | ||
798 | return; | ||
799 | } | ||
800 | |||
801 | sr_class->disable(sr, 1); | ||
802 | } | ||
803 | |||
804 | /** | ||
805 | * omap_sr_register_pmic() - API to register pmic specific info. | ||
806 | * @pmic_data: The structure containing pmic specific data. | ||
807 | * | ||
808 | * This API is to be called from the PMIC specific code to register with | ||
809 | * smartreflex driver pmic specific info. Currently the only info required | ||
810 | * is the smartreflex init on the PMIC side. | ||
811 | */ | ||
812 | void omap_sr_register_pmic(struct omap_sr_pmic_data *pmic_data) | ||
813 | { | ||
814 | if (!pmic_data) { | ||
815 | pr_warning("%s: Trying to register NULL PMIC data structure" | ||
816 | "with smartreflex\n", __func__); | ||
817 | return; | ||
818 | } | ||
819 | |||
820 | sr_pmic_data = pmic_data; | ||
821 | } | ||
822 | |||
823 | /* PM Debug FS entries to enable and disable smartreflex. */ | ||
824 | static int omap_sr_autocomp_show(void *data, u64 *val) | ||
825 | { | ||
826 | struct omap_sr *sr_info = data; | ||
827 | |||
828 | if (!sr_info) { | ||
829 | pr_warning("%s: omap_sr struct not found\n", __func__); | ||
830 | return -EINVAL; | ||
831 | } | ||
832 | |||
833 | *val = sr_info->autocomp_active; | ||
834 | |||
835 | return 0; | ||
836 | } | ||
837 | |||
838 | static int omap_sr_autocomp_store(void *data, u64 val) | ||
839 | { | ||
840 | struct omap_sr *sr_info = data; | ||
841 | |||
842 | if (!sr_info) { | ||
843 | pr_warning("%s: omap_sr struct not found\n", __func__); | ||
844 | return -EINVAL; | ||
845 | } | ||
846 | |||
847 | /* Sanity check */ | ||
848 | if (val > 1) { | ||
849 | pr_warning("%s: Invalid argument %lld\n", __func__, val); | ||
850 | return -EINVAL; | ||
851 | } | ||
852 | |||
853 | /* control enable/disable only if there is a delta in value */ | ||
854 | if (sr_info->autocomp_active != val) { | ||
855 | if (!val) | ||
856 | sr_stop_vddautocomp(sr_info); | ||
857 | else | ||
858 | sr_start_vddautocomp(sr_info); | ||
859 | } | ||
860 | |||
861 | return 0; | ||
862 | } | ||
863 | |||
864 | DEFINE_SIMPLE_ATTRIBUTE(pm_sr_fops, omap_sr_autocomp_show, | ||
865 | omap_sr_autocomp_store, "%llu\n"); | ||
866 | |||
867 | static int __init omap_sr_probe(struct platform_device *pdev) | ||
868 | { | ||
869 | struct omap_sr *sr_info; | ||
870 | struct omap_sr_data *pdata = pdev->dev.platform_data; | ||
871 | struct resource *mem, *irq; | ||
872 | struct dentry *nvalue_dir; | ||
873 | int i, ret = 0; | ||
874 | |||
875 | sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL); | ||
876 | if (!sr_info) { | ||
877 | dev_err(&pdev->dev, "%s: unable to allocate sr_info\n", | ||
878 | __func__); | ||
879 | return -ENOMEM; | ||
880 | } | ||
881 | |||
882 | platform_set_drvdata(pdev, sr_info); | ||
883 | |||
884 | if (!pdata) { | ||
885 | dev_err(&pdev->dev, "%s: platform data missing\n", __func__); | ||
886 | ret = -EINVAL; | ||
887 | goto err_free_devinfo; | ||
888 | } | ||
889 | |||
890 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
891 | if (!mem) { | ||
892 | dev_err(&pdev->dev, "%s: no mem resource\n", __func__); | ||
893 | ret = -ENODEV; | ||
894 | goto err_free_devinfo; | ||
895 | } | ||
896 | |||
897 | mem = request_mem_region(mem->start, resource_size(mem), | ||
898 | dev_name(&pdev->dev)); | ||
899 | if (!mem) { | ||
900 | dev_err(&pdev->dev, "%s: no mem region\n", __func__); | ||
901 | ret = -EBUSY; | ||
902 | goto err_free_devinfo; | ||
903 | } | ||
904 | |||
905 | irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | ||
906 | |||
907 | pm_runtime_enable(&pdev->dev); | ||
908 | pm_runtime_irq_safe(&pdev->dev); | ||
909 | |||
910 | sr_info->name = kasprintf(GFP_KERNEL, "%s", pdata->name); | ||
911 | if (!sr_info->name) { | ||
912 | dev_err(&pdev->dev, "%s: Unable to alloc SR instance name\n", | ||
913 | __func__); | ||
914 | ret = -ENOMEM; | ||
915 | goto err_release_region; | ||
916 | } | ||
917 | |||
918 | sr_info->pdev = pdev; | ||
919 | sr_info->srid = pdev->id; | ||
920 | sr_info->voltdm = pdata->voltdm; | ||
921 | sr_info->nvalue_table = pdata->nvalue_table; | ||
922 | sr_info->nvalue_count = pdata->nvalue_count; | ||
923 | sr_info->senn_mod = pdata->senn_mod; | ||
924 | sr_info->senp_mod = pdata->senp_mod; | ||
925 | sr_info->autocomp_active = false; | ||
926 | sr_info->ip_type = pdata->ip_type; | ||
927 | sr_info->base = ioremap(mem->start, resource_size(mem)); | ||
928 | if (!sr_info->base) { | ||
929 | dev_err(&pdev->dev, "%s: ioremap fail\n", __func__); | ||
930 | ret = -ENOMEM; | ||
931 | goto err_release_region; | ||
932 | } | ||
933 | |||
934 | if (irq) | ||
935 | sr_info->irq = irq->start; | ||
936 | |||
937 | sr_set_clk_length(sr_info); | ||
938 | sr_set_regfields(sr_info); | ||
939 | |||
940 | list_add(&sr_info->node, &sr_list); | ||
941 | |||
942 | /* | ||
943 | * Call into late init to do intializations that require | ||
944 | * both sr driver and sr class driver to be initiallized. | ||
945 | */ | ||
946 | if (sr_class) { | ||
947 | ret = sr_late_init(sr_info); | ||
948 | if (ret) { | ||
949 | pr_warning("%s: Error in SR late init\n", __func__); | ||
950 | goto err_iounmap; | ||
951 | } | ||
952 | } | ||
953 | |||
954 | dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__); | ||
955 | if (!sr_dbg_dir) { | ||
956 | sr_dbg_dir = debugfs_create_dir("smartreflex", NULL); | ||
957 | if (IS_ERR_OR_NULL(sr_dbg_dir)) { | ||
958 | ret = PTR_ERR(sr_dbg_dir); | ||
959 | pr_err("%s:sr debugfs dir creation failed(%d)\n", | ||
960 | __func__, ret); | ||
961 | goto err_iounmap; | ||
962 | } | ||
963 | } | ||
964 | |||
965 | sr_info->dbg_dir = debugfs_create_dir(sr_info->name, sr_dbg_dir); | ||
966 | if (IS_ERR_OR_NULL(sr_info->dbg_dir)) { | ||
967 | dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n", | ||
968 | __func__); | ||
969 | ret = PTR_ERR(sr_info->dbg_dir); | ||
970 | goto err_free_name; | ||
971 | } | ||
972 | |||
973 | (void) debugfs_create_file("autocomp", S_IRUGO | S_IWUSR, | ||
974 | sr_info->dbg_dir, (void *)sr_info, &pm_sr_fops); | ||
975 | (void) debugfs_create_x32("errweight", S_IRUGO, sr_info->dbg_dir, | ||
976 | &sr_info->err_weight); | ||
977 | (void) debugfs_create_x32("errmaxlimit", S_IRUGO, sr_info->dbg_dir, | ||
978 | &sr_info->err_maxlimit); | ||
979 | |||
980 | nvalue_dir = debugfs_create_dir("nvalue", sr_info->dbg_dir); | ||
981 | if (IS_ERR_OR_NULL(nvalue_dir)) { | ||
982 | dev_err(&pdev->dev, "%s: Unable to create debugfs directory" | ||
983 | "for n-values\n", __func__); | ||
984 | ret = PTR_ERR(nvalue_dir); | ||
985 | goto err_debugfs; | ||
986 | } | ||
987 | |||
988 | if (sr_info->nvalue_count == 0 || !sr_info->nvalue_table) { | ||
989 | dev_warn(&pdev->dev, "%s: %s: No Voltage table for the corresponding vdd. Cannot create debugfs entries for n-values\n", | ||
990 | __func__, sr_info->name); | ||
991 | |||
992 | ret = -ENODATA; | ||
993 | goto err_debugfs; | ||
994 | } | ||
995 | |||
996 | for (i = 0; i < sr_info->nvalue_count; i++) { | ||
997 | char name[NVALUE_NAME_LEN + 1]; | ||
998 | |||
999 | snprintf(name, sizeof(name), "volt_%lu", | ||
1000 | sr_info->nvalue_table[i].volt_nominal); | ||
1001 | (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir, | ||
1002 | &(sr_info->nvalue_table[i].nvalue)); | ||
1003 | snprintf(name, sizeof(name), "errminlimit_%lu", | ||
1004 | sr_info->nvalue_table[i].volt_nominal); | ||
1005 | (void) debugfs_create_x32(name, S_IRUGO | S_IWUSR, nvalue_dir, | ||
1006 | &(sr_info->nvalue_table[i].errminlimit)); | ||
1007 | |||
1008 | } | ||
1009 | |||
1010 | return ret; | ||
1011 | |||
1012 | err_debugfs: | ||
1013 | debugfs_remove_recursive(sr_info->dbg_dir); | ||
1014 | err_free_name: | ||
1015 | kfree(sr_info->name); | ||
1016 | err_iounmap: | ||
1017 | list_del(&sr_info->node); | ||
1018 | iounmap(sr_info->base); | ||
1019 | err_release_region: | ||
1020 | release_mem_region(mem->start, resource_size(mem)); | ||
1021 | err_free_devinfo: | ||
1022 | kfree(sr_info); | ||
1023 | |||
1024 | return ret; | ||
1025 | } | ||
1026 | |||
1027 | static int __devexit omap_sr_remove(struct platform_device *pdev) | ||
1028 | { | ||
1029 | struct omap_sr_data *pdata = pdev->dev.platform_data; | ||
1030 | struct omap_sr *sr_info; | ||
1031 | struct resource *mem; | ||
1032 | |||
1033 | if (!pdata) { | ||
1034 | dev_err(&pdev->dev, "%s: platform data missing\n", __func__); | ||
1035 | return -EINVAL; | ||
1036 | } | ||
1037 | |||
1038 | sr_info = _sr_lookup(pdata->voltdm); | ||
1039 | if (IS_ERR(sr_info)) { | ||
1040 | dev_warn(&pdev->dev, "%s: omap_sr struct not found\n", | ||
1041 | __func__); | ||
1042 | return PTR_ERR(sr_info); | ||
1043 | } | ||
1044 | |||
1045 | if (sr_info->autocomp_active) | ||
1046 | sr_stop_vddautocomp(sr_info); | ||
1047 | if (sr_info->dbg_dir) | ||
1048 | debugfs_remove_recursive(sr_info->dbg_dir); | ||
1049 | |||
1050 | list_del(&sr_info->node); | ||
1051 | iounmap(sr_info->base); | ||
1052 | kfree(sr_info->name); | ||
1053 | kfree(sr_info); | ||
1054 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
1055 | release_mem_region(mem->start, resource_size(mem)); | ||
1056 | |||
1057 | return 0; | ||
1058 | } | ||
1059 | |||
1060 | static void __devexit omap_sr_shutdown(struct platform_device *pdev) | ||
1061 | { | ||
1062 | struct omap_sr_data *pdata = pdev->dev.platform_data; | ||
1063 | struct omap_sr *sr_info; | ||
1064 | |||
1065 | if (!pdata) { | ||
1066 | dev_err(&pdev->dev, "%s: platform data missing\n", __func__); | ||
1067 | return; | ||
1068 | } | ||
1069 | |||
1070 | sr_info = _sr_lookup(pdata->voltdm); | ||
1071 | if (IS_ERR(sr_info)) { | ||
1072 | dev_warn(&pdev->dev, "%s: omap_sr struct not found\n", | ||
1073 | __func__); | ||
1074 | return; | ||
1075 | } | ||
1076 | |||
1077 | if (sr_info->autocomp_active) | ||
1078 | sr_stop_vddautocomp(sr_info); | ||
1079 | |||
1080 | return; | ||
1081 | } | ||
1082 | |||
1083 | static struct platform_driver smartreflex_driver = { | ||
1084 | .remove = __devexit_p(omap_sr_remove), | ||
1085 | .shutdown = __devexit_p(omap_sr_shutdown), | ||
1086 | .driver = { | ||
1087 | .name = "smartreflex", | ||
1088 | }, | ||
1089 | }; | ||
1090 | |||
1091 | static int __init sr_init(void) | ||
1092 | { | ||
1093 | int ret = 0; | ||
1094 | |||
1095 | /* | ||
1096 | * sr_init is a late init. If by then a pmic specific API is not | ||
1097 | * registered either there is no need for anything to be done on | ||
1098 | * the PMIC side or somebody has forgotten to register a PMIC | ||
1099 | * handler. Warn for the second condition. | ||
1100 | */ | ||
1101 | if (sr_pmic_data && sr_pmic_data->sr_pmic_init) | ||
1102 | sr_pmic_data->sr_pmic_init(); | ||
1103 | else | ||
1104 | pr_warning("%s: No PMIC hook to init smartreflex\n", __func__); | ||
1105 | |||
1106 | ret = platform_driver_probe(&smartreflex_driver, omap_sr_probe); | ||
1107 | if (ret) { | ||
1108 | pr_err("%s: platform driver register failed for SR\n", | ||
1109 | __func__); | ||
1110 | return ret; | ||
1111 | } | ||
1112 | |||
1113 | return 0; | ||
1114 | } | ||
1115 | late_initcall(sr_init); | ||
1116 | |||
1117 | static void __exit sr_exit(void) | ||
1118 | { | ||
1119 | platform_driver_unregister(&smartreflex_driver); | ||
1120 | } | ||
1121 | module_exit(sr_exit); | ||
1122 | |||
1123 | MODULE_DESCRIPTION("OMAP Smartreflex Driver"); | ||
1124 | MODULE_LICENSE("GPL"); | ||
1125 | MODULE_ALIAS("platform:" DRIVER_NAME); | ||
1126 | MODULE_AUTHOR("Texas Instruments Inc"); | ||