diff options
Diffstat (limited to 'drivers/platform/x86/intel_pmic_gpio.c')
-rw-r--r-- | drivers/platform/x86/intel_pmic_gpio.c | 116 |
1 files changed, 32 insertions, 84 deletions
diff --git a/drivers/platform/x86/intel_pmic_gpio.c b/drivers/platform/x86/intel_pmic_gpio.c index 930e62762365..61433d492862 100644 --- a/drivers/platform/x86/intel_pmic_gpio.c +++ b/drivers/platform/x86/intel_pmic_gpio.c | |||
@@ -60,69 +60,20 @@ enum pmic_gpio_register { | |||
60 | #define GPOSW_DOU 0x08 | 60 | #define GPOSW_DOU 0x08 |
61 | #define GPOSW_RDRV 0x30 | 61 | #define GPOSW_RDRV 0x30 |
62 | 62 | ||
63 | #define GPIO_UPDATE_TYPE 0x80000000 | ||
63 | 64 | ||
64 | #define NUM_GPIO 24 | 65 | #define NUM_GPIO 24 |
65 | 66 | ||
66 | struct pmic_gpio_irq { | ||
67 | spinlock_t lock; | ||
68 | u32 trigger[NUM_GPIO]; | ||
69 | u32 dirty; | ||
70 | struct work_struct work; | ||
71 | }; | ||
72 | |||
73 | |||
74 | struct pmic_gpio { | 67 | struct pmic_gpio { |
68 | struct mutex buslock; | ||
75 | struct gpio_chip chip; | 69 | struct gpio_chip chip; |
76 | struct pmic_gpio_irq irqtypes; | ||
77 | void *gpiointr; | 70 | void *gpiointr; |
78 | int irq; | 71 | int irq; |
79 | unsigned irq_base; | 72 | unsigned irq_base; |
73 | unsigned int update_type; | ||
74 | u32 trigger_type; | ||
80 | }; | 75 | }; |
81 | 76 | ||
82 | static void pmic_program_irqtype(int gpio, int type) | ||
83 | { | ||
84 | if (type & IRQ_TYPE_EDGE_RISING) | ||
85 | intel_scu_ipc_update_register(GPIO0 + gpio, 0x20, 0x20); | ||
86 | else | ||
87 | intel_scu_ipc_update_register(GPIO0 + gpio, 0x00, 0x20); | ||
88 | |||
89 | if (type & IRQ_TYPE_EDGE_FALLING) | ||
90 | intel_scu_ipc_update_register(GPIO0 + gpio, 0x10, 0x10); | ||
91 | else | ||
92 | intel_scu_ipc_update_register(GPIO0 + gpio, 0x00, 0x10); | ||
93 | }; | ||
94 | |||
95 | static void pmic_irqtype_work(struct work_struct *work) | ||
96 | { | ||
97 | struct pmic_gpio_irq *t = | ||
98 | container_of(work, struct pmic_gpio_irq, work); | ||
99 | unsigned long flags; | ||
100 | int i; | ||
101 | u16 type; | ||
102 | |||
103 | spin_lock_irqsave(&t->lock, flags); | ||
104 | /* As we drop the lock, we may need multiple scans if we race the | ||
105 | pmic_irq_type function */ | ||
106 | while (t->dirty) { | ||
107 | /* | ||
108 | * For each pin that has the dirty bit set send an IPC | ||
109 | * message to configure the hardware via the PMIC | ||
110 | */ | ||
111 | for (i = 0; i < NUM_GPIO; i++) { | ||
112 | if (!(t->dirty & (1 << i))) | ||
113 | continue; | ||
114 | t->dirty &= ~(1 << i); | ||
115 | /* We can't trust the array entry or dirty | ||
116 | once the lock is dropped */ | ||
117 | type = t->trigger[i]; | ||
118 | spin_unlock_irqrestore(&t->lock, flags); | ||
119 | pmic_program_irqtype(i, type); | ||
120 | spin_lock_irqsave(&t->lock, flags); | ||
121 | } | ||
122 | } | ||
123 | spin_unlock_irqrestore(&t->lock, flags); | ||
124 | } | ||
125 | |||
126 | static int pmic_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | 77 | static int pmic_gpio_direction_input(struct gpio_chip *chip, unsigned offset) |
127 | { | 78 | { |
128 | if (offset > 8) { | 79 | if (offset > 8) { |
@@ -190,25 +141,24 @@ static void pmic_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
190 | 1 << (offset - 16)); | 141 | 1 << (offset - 16)); |
191 | } | 142 | } |
192 | 143 | ||
193 | static int pmic_irq_type(unsigned irq, unsigned type) | 144 | /* |
145 | * This is called from genirq with pg->buslock locked and | ||
146 | * irq_desc->lock held. We can not access the scu bus here, so we | ||
147 | * store the change and update in the bus_sync_unlock() function below | ||
148 | */ | ||
149 | static int pmic_irq_type(struct irq_data *data, unsigned type) | ||
194 | { | 150 | { |
195 | struct pmic_gpio *pg = get_irq_chip_data(irq); | 151 | struct pmic_gpio *pg = irq_data_get_irq_chip_data(data); |
196 | u32 gpio = irq - pg->irq_base; | 152 | u32 gpio = data->irq - pg->irq_base; |
197 | unsigned long flags; | ||
198 | 153 | ||
199 | if (gpio >= pg->chip.ngpio) | 154 | if (gpio >= pg->chip.ngpio) |
200 | return -EINVAL; | 155 | return -EINVAL; |
201 | 156 | ||
202 | spin_lock_irqsave(&pg->irqtypes.lock, flags); | 157 | pg->trigger_type = type; |
203 | pg->irqtypes.trigger[gpio] = type; | 158 | pg->update_type = gpio | GPIO_UPDATE_TYPE; |
204 | pg->irqtypes.dirty |= (1 << gpio); | ||
205 | spin_unlock_irqrestore(&pg->irqtypes.lock, flags); | ||
206 | schedule_work(&pg->irqtypes.work); | ||
207 | return 0; | 159 | return 0; |
208 | } | 160 | } |
209 | 161 | ||
210 | |||
211 | |||
212 | static int pmic_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | 162 | static int pmic_gpio_to_irq(struct gpio_chip *chip, unsigned offset) |
213 | { | 163 | { |
214 | struct pmic_gpio *pg = container_of(chip, struct pmic_gpio, chip); | 164 | struct pmic_gpio *pg = container_of(chip, struct pmic_gpio, chip); |
@@ -217,38 +167,32 @@ static int pmic_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | |||
217 | } | 167 | } |
218 | 168 | ||
219 | /* the gpiointr register is read-clear, so just do nothing. */ | 169 | /* the gpiointr register is read-clear, so just do nothing. */ |
220 | static void pmic_irq_unmask(unsigned irq) | 170 | static void pmic_irq_unmask(struct irq_data *data) { } |
221 | { | ||
222 | }; | ||
223 | 171 | ||
224 | static void pmic_irq_mask(unsigned irq) | 172 | static void pmic_irq_mask(struct irq_data *data) { } |
225 | { | ||
226 | }; | ||
227 | 173 | ||
228 | static struct irq_chip pmic_irqchip = { | 174 | static struct irq_chip pmic_irqchip = { |
229 | .name = "PMIC-GPIO", | 175 | .name = "PMIC-GPIO", |
230 | .mask = pmic_irq_mask, | 176 | .irq_mask = pmic_irq_mask, |
231 | .unmask = pmic_irq_unmask, | 177 | .irq_unmask = pmic_irq_unmask, |
232 | .set_type = pmic_irq_type, | 178 | .irq_set_type = pmic_irq_type, |
233 | }; | 179 | }; |
234 | 180 | ||
235 | static void pmic_irq_handler(unsigned irq, struct irq_desc *desc) | 181 | static irqreturn_t pmic_irq_handler(int irq, void *data) |
236 | { | 182 | { |
237 | struct pmic_gpio *pg = (struct pmic_gpio *)get_irq_data(irq); | 183 | struct pmic_gpio *pg = data; |
238 | u8 intsts = *((u8 *)pg->gpiointr + 4); | 184 | u8 intsts = *((u8 *)pg->gpiointr + 4); |
239 | int gpio; | 185 | int gpio; |
186 | irqreturn_t ret = IRQ_NONE; | ||
240 | 187 | ||
241 | for (gpio = 0; gpio < 8; gpio++) { | 188 | for (gpio = 0; gpio < 8; gpio++) { |
242 | if (intsts & (1 << gpio)) { | 189 | if (intsts & (1 << gpio)) { |
243 | pr_debug("pmic pin %d triggered\n", gpio); | 190 | pr_debug("pmic pin %d triggered\n", gpio); |
244 | generic_handle_irq(pg->irq_base + gpio); | 191 | generic_handle_irq(pg->irq_base + gpio); |
192 | ret = IRQ_HANDLED; | ||
245 | } | 193 | } |
246 | } | 194 | } |
247 | 195 | return ret; | |
248 | if (desc->chip->irq_eoi) | ||
249 | desc->chip->irq_eoi(irq_get_irq_data(irq)); | ||
250 | else | ||
251 | dev_warn(pg->chip.dev, "missing EOI handler for irq %d\n", irq); | ||
252 | } | 196 | } |
253 | 197 | ||
254 | static int __devinit platform_pmic_gpio_probe(struct platform_device *pdev) | 198 | static int __devinit platform_pmic_gpio_probe(struct platform_device *pdev) |
@@ -297,8 +241,7 @@ static int __devinit platform_pmic_gpio_probe(struct platform_device *pdev) | |||
297 | pg->chip.can_sleep = 1; | 241 | pg->chip.can_sleep = 1; |
298 | pg->chip.dev = dev; | 242 | pg->chip.dev = dev; |
299 | 243 | ||
300 | INIT_WORK(&pg->irqtypes.work, pmic_irqtype_work); | 244 | mutex_init(&pg->buslock); |
301 | spin_lock_init(&pg->irqtypes.lock); | ||
302 | 245 | ||
303 | pg->chip.dev = dev; | 246 | pg->chip.dev = dev; |
304 | retval = gpiochip_add(&pg->chip); | 247 | retval = gpiochip_add(&pg->chip); |
@@ -306,8 +249,13 @@ static int __devinit platform_pmic_gpio_probe(struct platform_device *pdev) | |||
306 | printk(KERN_ERR "%s: Can not add pmic gpio chip.\n", __func__); | 249 | printk(KERN_ERR "%s: Can not add pmic gpio chip.\n", __func__); |
307 | goto err; | 250 | goto err; |
308 | } | 251 | } |
309 | set_irq_data(pg->irq, pg); | 252 | |
310 | set_irq_chained_handler(pg->irq, pmic_irq_handler); | 253 | retval = request_irq(pg->irq, pmic_irq_handler, 0, "pmic", pg); |
254 | if (retval) { | ||
255 | printk(KERN_WARNING "pmic: Interrupt request failed\n"); | ||
256 | goto err; | ||
257 | } | ||
258 | |||
311 | for (i = 0; i < 8; i++) { | 259 | for (i = 0; i < 8; i++) { |
312 | set_irq_chip_and_handler_name(i + pg->irq_base, &pmic_irqchip, | 260 | set_irq_chip_and_handler_name(i + pg->irq_base, &pmic_irqchip, |
313 | handle_simple_irq, "demux"); | 261 | handle_simple_irq, "demux"); |