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path: root/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
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Diffstat (limited to 'drivers/pinctrl/sh-pfc/pfc-r8a7790.c')
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-r8a7790.c236
1 files changed, 236 insertions, 0 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
index 7f7b2bde62f3..9acb0e5d6841 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
@@ -2046,6 +2046,178 @@ static const unsigned int mmc1_ctrl_pins[] = {
2046static const unsigned int mmc1_ctrl_mux[] = { 2046static const unsigned int mmc1_ctrl_mux[] = {
2047 MMC1_CLK_MARK, MMC1_CMD_MARK, 2047 MMC1_CLK_MARK, MMC1_CMD_MARK,
2048}; 2048};
2049/* - MSIOF0 ----------------------------------------------------------------- */
2050static const unsigned int msiof0_clk_pins[] = {
2051 /* SCK */
2052 RCAR_GP_PIN(5, 12),
2053};
2054static const unsigned int msiof0_clk_mux[] = {
2055 MSIOF0_SCK_MARK,
2056};
2057static const unsigned int msiof0_sync_pins[] = {
2058 /* SYNC */
2059 RCAR_GP_PIN(5, 13),
2060};
2061static const unsigned int msiof0_sync_mux[] = {
2062 MSIOF0_SYNC_MARK,
2063};
2064static const unsigned int msiof0_ss1_pins[] = {
2065 /* SS1 */
2066 RCAR_GP_PIN(5, 14),
2067};
2068static const unsigned int msiof0_ss1_mux[] = {
2069 MSIOF0_SS1_MARK,
2070};
2071static const unsigned int msiof0_ss2_pins[] = {
2072 /* SS2 */
2073 RCAR_GP_PIN(5, 16),
2074};
2075static const unsigned int msiof0_ss2_mux[] = {
2076 MSIOF0_SS2_MARK,
2077};
2078static const unsigned int msiof0_rx_pins[] = {
2079 /* RXD */
2080 RCAR_GP_PIN(5, 17),
2081};
2082static const unsigned int msiof0_rx_mux[] = {
2083 MSIOF0_RXD_MARK,
2084};
2085static const unsigned int msiof0_tx_pins[] = {
2086 /* TXD */
2087 RCAR_GP_PIN(5, 15),
2088};
2089static const unsigned int msiof0_tx_mux[] = {
2090 MSIOF0_TXD_MARK,
2091};
2092/* - MSIOF1 ----------------------------------------------------------------- */
2093static const unsigned int msiof1_clk_pins[] = {
2094 /* SCK */
2095 RCAR_GP_PIN(4, 8),
2096};
2097static const unsigned int msiof1_clk_mux[] = {
2098 MSIOF1_SCK_MARK,
2099};
2100static const unsigned int msiof1_sync_pins[] = {
2101 /* SYNC */
2102 RCAR_GP_PIN(4, 9),
2103};
2104static const unsigned int msiof1_sync_mux[] = {
2105 MSIOF1_SYNC_MARK,
2106};
2107static const unsigned int msiof1_ss1_pins[] = {
2108 /* SS1 */
2109 RCAR_GP_PIN(4, 10),
2110};
2111static const unsigned int msiof1_ss1_mux[] = {
2112 MSIOF1_SS1_MARK,
2113};
2114static const unsigned int msiof1_ss2_pins[] = {
2115 /* SS2 */
2116 RCAR_GP_PIN(4, 11),
2117};
2118static const unsigned int msiof1_ss2_mux[] = {
2119 MSIOF1_SS2_MARK,
2120};
2121static const unsigned int msiof1_rx_pins[] = {
2122 /* RXD */
2123 RCAR_GP_PIN(4, 13),
2124};
2125static const unsigned int msiof1_rx_mux[] = {
2126 MSIOF1_RXD_MARK,
2127};
2128static const unsigned int msiof1_tx_pins[] = {
2129 /* TXD */
2130 RCAR_GP_PIN(4, 12),
2131};
2132static const unsigned int msiof1_tx_mux[] = {
2133 MSIOF1_TXD_MARK,
2134};
2135/* - MSIOF2 ----------------------------------------------------------------- */
2136static const unsigned int msiof2_clk_pins[] = {
2137 /* SCK */
2138 RCAR_GP_PIN(0, 27),
2139};
2140static const unsigned int msiof2_clk_mux[] = {
2141 MSIOF2_SCK_MARK,
2142};
2143static const unsigned int msiof2_sync_pins[] = {
2144 /* SYNC */
2145 RCAR_GP_PIN(0, 26),
2146};
2147static const unsigned int msiof2_sync_mux[] = {
2148 MSIOF2_SYNC_MARK,
2149};
2150static const unsigned int msiof2_ss1_pins[] = {
2151 /* SS1 */
2152 RCAR_GP_PIN(0, 30),
2153};
2154static const unsigned int msiof2_ss1_mux[] = {
2155 MSIOF2_SS1_MARK,
2156};
2157static const unsigned int msiof2_ss2_pins[] = {
2158 /* SS2 */
2159 RCAR_GP_PIN(0, 31),
2160};
2161static const unsigned int msiof2_ss2_mux[] = {
2162 MSIOF2_SS2_MARK,
2163};
2164static const unsigned int msiof2_rx_pins[] = {
2165 /* RXD */
2166 RCAR_GP_PIN(0, 29),
2167};
2168static const unsigned int msiof2_rx_mux[] = {
2169 MSIOF2_RXD_MARK,
2170};
2171static const unsigned int msiof2_tx_pins[] = {
2172 /* TXD */
2173 RCAR_GP_PIN(0, 28),
2174};
2175static const unsigned int msiof2_tx_mux[] = {
2176 MSIOF2_TXD_MARK,
2177};
2178/* - MSIOF3 ----------------------------------------------------------------- */
2179static const unsigned int msiof3_clk_pins[] = {
2180 /* SCK */
2181 RCAR_GP_PIN(5, 4),
2182};
2183static const unsigned int msiof3_clk_mux[] = {
2184 MSIOF3_SCK_MARK,
2185};
2186static const unsigned int msiof3_sync_pins[] = {
2187 /* SYNC */
2188 RCAR_GP_PIN(4, 30),
2189};
2190static const unsigned int msiof3_sync_mux[] = {
2191 MSIOF3_SYNC_MARK,
2192};
2193static const unsigned int msiof3_ss1_pins[] = {
2194 /* SS1 */
2195 RCAR_GP_PIN(4, 31),
2196};
2197static const unsigned int msiof3_ss1_mux[] = {
2198 MSIOF3_SS1_MARK,
2199};
2200static const unsigned int msiof3_ss2_pins[] = {
2201 /* SS2 */
2202 RCAR_GP_PIN(4, 27),
2203};
2204static const unsigned int msiof3_ss2_mux[] = {
2205 MSIOF3_SS2_MARK,
2206};
2207static const unsigned int msiof3_rx_pins[] = {
2208 /* RXD */
2209 RCAR_GP_PIN(5, 2),
2210};
2211static const unsigned int msiof3_rx_mux[] = {
2212 MSIOF3_RXD_MARK,
2213};
2214static const unsigned int msiof3_tx_pins[] = {
2215 /* TXD */
2216 RCAR_GP_PIN(5, 3),
2217};
2218static const unsigned int msiof3_tx_mux[] = {
2219 MSIOF3_TXD_MARK,
2220};
2049/* - SCIF0 ------------------------------------------------------------------ */ 2221/* - SCIF0 ------------------------------------------------------------------ */
2050static const unsigned int scif0_data_pins[] = { 2222static const unsigned int scif0_data_pins[] = {
2051 /* RX, TX */ 2223 /* RX, TX */
@@ -2712,6 +2884,30 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
2712 SH_PFC_PIN_GROUP(mmc1_data4), 2884 SH_PFC_PIN_GROUP(mmc1_data4),
2713 SH_PFC_PIN_GROUP(mmc1_data8), 2885 SH_PFC_PIN_GROUP(mmc1_data8),
2714 SH_PFC_PIN_GROUP(mmc1_ctrl), 2886 SH_PFC_PIN_GROUP(mmc1_ctrl),
2887 SH_PFC_PIN_GROUP(msiof0_clk),
2888 SH_PFC_PIN_GROUP(msiof0_sync),
2889 SH_PFC_PIN_GROUP(msiof0_ss1),
2890 SH_PFC_PIN_GROUP(msiof0_ss2),
2891 SH_PFC_PIN_GROUP(msiof0_rx),
2892 SH_PFC_PIN_GROUP(msiof0_tx),
2893 SH_PFC_PIN_GROUP(msiof1_clk),
2894 SH_PFC_PIN_GROUP(msiof1_sync),
2895 SH_PFC_PIN_GROUP(msiof1_ss1),
2896 SH_PFC_PIN_GROUP(msiof1_ss2),
2897 SH_PFC_PIN_GROUP(msiof1_rx),
2898 SH_PFC_PIN_GROUP(msiof1_tx),
2899 SH_PFC_PIN_GROUP(msiof2_clk),
2900 SH_PFC_PIN_GROUP(msiof2_sync),
2901 SH_PFC_PIN_GROUP(msiof2_ss1),
2902 SH_PFC_PIN_GROUP(msiof2_ss2),
2903 SH_PFC_PIN_GROUP(msiof2_rx),
2904 SH_PFC_PIN_GROUP(msiof2_tx),
2905 SH_PFC_PIN_GROUP(msiof3_clk),
2906 SH_PFC_PIN_GROUP(msiof3_sync),
2907 SH_PFC_PIN_GROUP(msiof3_ss1),
2908 SH_PFC_PIN_GROUP(msiof3_ss2),
2909 SH_PFC_PIN_GROUP(msiof3_rx),
2910 SH_PFC_PIN_GROUP(msiof3_tx),
2715 SH_PFC_PIN_GROUP(scif0_data), 2911 SH_PFC_PIN_GROUP(scif0_data),
2716 SH_PFC_PIN_GROUP(scif0_clk), 2912 SH_PFC_PIN_GROUP(scif0_clk),
2717 SH_PFC_PIN_GROUP(scif0_ctrl), 2913 SH_PFC_PIN_GROUP(scif0_ctrl),
@@ -2855,6 +3051,42 @@ static const char * const mmc1_groups[] = {
2855 "mmc1_ctrl", 3051 "mmc1_ctrl",
2856}; 3052};
2857 3053
3054static const char * const msiof0_groups[] = {
3055 "msiof0_clk",
3056 "msiof0_sync",
3057 "msiof0_ss1",
3058 "msiof0_ss2",
3059 "msiof0_rx",
3060 "msiof0_tx",
3061};
3062
3063static const char * const msiof1_groups[] = {
3064 "msiof1_clk",
3065 "msiof1_sync",
3066 "msiof1_ss1",
3067 "msiof1_ss2",
3068 "msiof1_rx",
3069 "msiof1_tx",
3070};
3071
3072static const char * const msiof2_groups[] = {
3073 "msiof2_clk",
3074 "msiof2_sync",
3075 "msiof2_ss1",
3076 "msiof2_ss2",
3077 "msiof2_rx",
3078 "msiof2_tx",
3079};
3080
3081static const char * const msiof3_groups[] = {
3082 "msiof3_clk",
3083 "msiof3_sync",
3084 "msiof3_ss1",
3085 "msiof3_ss2",
3086 "msiof3_rx",
3087 "msiof3_tx",
3088};
3089
2858static const char * const scif0_groups[] = { 3090static const char * const scif0_groups[] = {
2859 "scif0_data", 3091 "scif0_data",
2860 "scif0_clk", 3092 "scif0_clk",
@@ -2989,6 +3221,10 @@ static const struct sh_pfc_function pinmux_functions[] = {
2989 SH_PFC_FUNCTION(intc), 3221 SH_PFC_FUNCTION(intc),
2990 SH_PFC_FUNCTION(mmc0), 3222 SH_PFC_FUNCTION(mmc0),
2991 SH_PFC_FUNCTION(mmc1), 3223 SH_PFC_FUNCTION(mmc1),
3224 SH_PFC_FUNCTION(msiof0),
3225 SH_PFC_FUNCTION(msiof1),
3226 SH_PFC_FUNCTION(msiof2),
3227 SH_PFC_FUNCTION(msiof3),
2992 SH_PFC_FUNCTION(scif0), 3228 SH_PFC_FUNCTION(scif0),
2993 SH_PFC_FUNCTION(scif1), 3229 SH_PFC_FUNCTION(scif1),
2994 SH_PFC_FUNCTION(scifa0), 3230 SH_PFC_FUNCTION(scifa0),
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-15 06:28:38 -0400