1 files changed, 105 insertions, 0 deletions

diff --git a/drivers/pinctrl/samsung/pinctrl-exynos.c b/drivers/pinctrl/samsung/pinctrl-exynos.c
index d97765c20466..5622d8a3e478 100644
--- a/drivers/pinctrl/samsung/pinctrl-exynos.c
+++ b/drivers/pinctrl/samsung/pinctrl-exynos.c
@@ -1164,3 +1164,108 @@ const struct samsung_pin_ctrl exynos5420_pin_ctrl[] __initconst = {
                 .eint_gpio_init = exynos_eint_gpio_init,
         },
 };
+
+/* pin banks of exynos7 pin-controller - ALIVE */
+static const struct samsung_pin_bank_data exynos7_pin_banks0[] __initconst = {
+        EXYNOS_PIN_BANK_EINTW(8, 0x000, "gpa0", 0x00),
+        EXYNOS_PIN_BANK_EINTW(8, 0x020, "gpa1", 0x04),
+        EXYNOS_PIN_BANK_EINTW(8, 0x040, "gpa2", 0x08),
+        EXYNOS_PIN_BANK_EINTW(8, 0x060, "gpa3", 0x0c),
+};
+
+/* pin banks of exynos7 pin-controller - BUS0 */
+static const struct samsung_pin_bank_data exynos7_pin_banks1[] __initconst = {
+        EXYNOS_PIN_BANK_EINTG(5, 0x000, "gpb0", 0x00),
+        EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpc0", 0x04),
+        EXYNOS_PIN_BANK_EINTG(2, 0x040, "gpc1", 0x08),
+        EXYNOS_PIN_BANK_EINTG(6, 0x060, "gpc2", 0x0c),
+        EXYNOS_PIN_BANK_EINTG(8, 0x080, "gpc3", 0x10),
+        EXYNOS_PIN_BANK_EINTG(4, 0x0a0, "gpd0", 0x14),
+        EXYNOS_PIN_BANK_EINTG(6, 0x0c0, "gpd1", 0x18),
+        EXYNOS_PIN_BANK_EINTG(8, 0x0e0, "gpd2", 0x1c),
+        EXYNOS_PIN_BANK_EINTG(5, 0x100, "gpd4", 0x20),
+        EXYNOS_PIN_BANK_EINTG(4, 0x120, "gpd5", 0x24),
+        EXYNOS_PIN_BANK_EINTG(6, 0x140, "gpd6", 0x28),
+        EXYNOS_PIN_BANK_EINTG(3, 0x160, "gpd7", 0x2c),
+        EXYNOS_PIN_BANK_EINTG(2, 0x180, "gpd8", 0x30),
+        EXYNOS_PIN_BANK_EINTG(2, 0x1a0, "gpg0", 0x34),
+        EXYNOS_PIN_BANK_EINTG(4, 0x1c0, "gpg3", 0x38),
+};
+
+/* pin banks of exynos7 pin-controller - NFC */
+static const struct samsung_pin_bank_data exynos7_pin_banks2[] __initconst = {
+        EXYNOS_PIN_BANK_EINTG(3, 0x000, "gpj0", 0x00),
+};
+
+/* pin banks of exynos7 pin-controller - TOUCH */
+static const struct samsung_pin_bank_data exynos7_pin_banks3[] __initconst = {
+        EXYNOS_PIN_BANK_EINTG(3, 0x000, "gpj1", 0x00),
+};
+
+/* pin banks of exynos7 pin-controller - FF */
+static const struct samsung_pin_bank_data exynos7_pin_banks4[] __initconst = {
+        EXYNOS_PIN_BANK_EINTG(4, 0x000, "gpg4", 0x00),
+};
+
+/* pin banks of exynos7 pin-controller - ESE */
+static const struct samsung_pin_bank_data exynos7_pin_banks5[] __initconst = {
+        EXYNOS_PIN_BANK_EINTG(5, 0x000, "gpv7", 0x00),
+};
+
+/* pin banks of exynos7 pin-controller - FSYS0 */
+static const struct samsung_pin_bank_data exynos7_pin_banks6[] __initconst = {
+        EXYNOS_PIN_BANK_EINTG(7, 0x000, "gpr4", 0x00),
+};
+
+/* pin banks of exynos7 pin-controller - FSYS1 */
+static const struct samsung_pin_bank_data exynos7_pin_banks7[] __initconst = {
+        EXYNOS_PIN_BANK_EINTG(4, 0x000, "gpr0", 0x00),
+        EXYNOS_PIN_BANK_EINTG(8, 0x020, "gpr1", 0x04),
+        EXYNOS_PIN_BANK_EINTG(5, 0x040, "gpr2", 0x08),
+        EXYNOS_PIN_BANK_EINTG(8, 0x060, "gpr3", 0x0c),
+};
+
+const struct samsung_pin_ctrl exynos7_pin_ctrl[] __initconst = {
+        {
+                /* pin-controller instance 0 Alive data */
+                .pin_banks      = exynos7_pin_banks0,
+                .nr_banks       = ARRAY_SIZE(exynos7_pin_banks0),
+                .eint_gpio_init = exynos_eint_gpio_init,
+                .eint_wkup_init = exynos_eint_wkup_init,
+        }, {
+                /* pin-controller instance 1 BUS0 data */
+                .pin_banks      = exynos7_pin_banks1,
+                .nr_banks       = ARRAY_SIZE(exynos7_pin_banks1),
+                .eint_gpio_init = exynos_eint_gpio_init,
+        }, {
+                /* pin-controller instance 2 NFC data */
+                .pin_banks      = exynos7_pin_banks2,
+                .nr_banks       = ARRAY_SIZE(exynos7_pin_banks2),
+                .eint_gpio_init = exynos_eint_gpio_init,
+        }, {
+                /* pin-controller instance 3 TOUCH data */
+                .pin_banks      = exynos7_pin_banks3,
+                .nr_banks       = ARRAY_SIZE(exynos7_pin_banks3),
+                .eint_gpio_init = exynos_eint_gpio_init,
+        }, {
+                /* pin-controller instance 4 FF data */
+                .pin_banks      = exynos7_pin_banks4,
+                .nr_banks       = ARRAY_SIZE(exynos7_pin_banks4),
+                .eint_gpio_init = exynos_eint_gpio_init,
+        }, {
+                /* pin-controller instance 5 ESE data */
+                .pin_banks      = exynos7_pin_banks5,
+                .nr_banks       = ARRAY_SIZE(exynos7_pin_banks5),
+                .eint_gpio_init = exynos_eint_gpio_init,
+        }, {
+                /* pin-controller instance 6 FSYS0 data */
+                .pin_banks      = exynos7_pin_banks6,
+                .nr_banks       = ARRAY_SIZE(exynos7_pin_banks6),
+                .eint_gpio_init = exynos_eint_gpio_init,
+        }, {
+                /* pin-controller instance 7 FSYS1 data */
+                .pin_banks      = exynos7_pin_banks7,
+                .nr_banks       = ARRAY_SIZE(exynos7_pin_banks7),
+                .eint_gpio_init = exynos_eint_gpio_init,
+        },
+};