aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/pinctrl/pinctrl-coh901.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/pinctrl/pinctrl-coh901.c')
-rw-r--r--drivers/pinctrl/pinctrl-coh901.c56
1 files changed, 13 insertions, 43 deletions
diff --git a/drivers/pinctrl/pinctrl-coh901.c b/drivers/pinctrl/pinctrl-coh901.c
index b90c01144fea..724234c9b01b 100644
--- a/drivers/pinctrl/pinctrl-coh901.c
+++ b/drivers/pinctrl/pinctrl-coh901.c
@@ -26,36 +26,6 @@
26#include <mach/gpio-u300.h> 26#include <mach/gpio-u300.h>
27 27
28/* 28/*
29 * Bias modes for U300 GPIOs
30 *
31 * GPIO_U300_CONFIG_BIAS_UNKNOWN: this bias mode is not known to us
32 * GPIO_U300_CONFIG_BIAS_FLOAT: no specific bias, the GPIO will float or state
33 * is not controlled by software
34 * GPIO_U300_CONFIG_BIAS_PULL_UP: the GPIO will be pulled up (usually with high
35 * impedance to VDD)
36 */
37#define GPIO_U300_CONFIG_BIAS_UNKNOWN 0x1000
38#define GPIO_U300_CONFIG_BIAS_FLOAT 0x1001
39#define GPIO_U300_CONFIG_BIAS_PULL_UP 0x1002
40
41/*
42 * Drive modes for U300 GPIOs (output)
43 *
44 * GPIO_U300_CONFIG_DRIVE_PUSH_PULL: the GPIO will be driven actively high and
45 * low, this is the most typical case and is typically achieved with two
46 * active transistors on the output
47 * GPIO_U300_CONFIG_DRIVE_OPEN_DRAIN: the GPIO will be driven with open drain
48 * (open collector) which means it is usually wired with other output
49 * ports which are then pulled up with an external resistor
50 * GPIO_U300_CONFIG_DRIVE_OPEN_SOURCE: the GPIO will be driven with open drain
51 * (open emitter) which is the same as open drain mutatis mutandis but
52 * pulled to ground
53 */
54#define GPIO_U300_CONFIG_DRIVE_PUSH_PULL 0x2000
55#define GPIO_U300_CONFIG_DRIVE_OPEN_DRAIN 0x2001
56#define GPIO_U300_CONFIG_DRIVE_OPEN_SOURCE 0x2002
57
58/*
59 * Register definitions for COH 901 335 variant 29 * Register definitions for COH 901 335 variant
60 */ 30 */
61#define U300_335_PORT_STRIDE (0x1C) 31#define U300_335_PORT_STRIDE (0x1C)
@@ -181,12 +151,12 @@ struct u300_gpio_confdata {
181#define BS365_GPIO_NUM_PORTS 5 151#define BS365_GPIO_NUM_PORTS 5
182 152
183#define U300_FLOATING_INPUT { \ 153#define U300_FLOATING_INPUT { \
184 .bias_mode = GPIO_U300_CONFIG_BIAS_FLOAT, \ 154 .bias_mode = PIN_CONFIG_BIAS_HIGH_IMPEDANCE, \
185 .output = false, \ 155 .output = false, \
186} 156}
187 157
188#define U300_PULL_UP_INPUT { \ 158#define U300_PULL_UP_INPUT { \
189 .bias_mode = GPIO_U300_CONFIG_BIAS_PULL_UP, \ 159 .bias_mode = PIN_CONFIG_BIAS_PULL_UP, \
190 .output = false, \ 160 .output = false, \
191} 161}
192 162
@@ -449,7 +419,7 @@ static int u300_gpio_to_irq(struct gpio_chip *chip, unsigned offset)
449} 419}
450 420
451static int u300_gpio_config(struct gpio_chip *chip, unsigned offset, 421static int u300_gpio_config(struct gpio_chip *chip, unsigned offset,
452 u16 param, unsigned long *data) 422 enum pin_config_param param, unsigned long data)
453{ 423{
454 struct u300_gpio *gpio = to_u300_gpio(chip); 424 struct u300_gpio *gpio = to_u300_gpio(chip);
455 unsigned long flags; 425 unsigned long flags;
@@ -457,16 +427,16 @@ static int u300_gpio_config(struct gpio_chip *chip, unsigned offset,
457 427
458 local_irq_save(flags); 428 local_irq_save(flags);
459 switch (param) { 429 switch (param) {
460 case GPIO_U300_CONFIG_BIAS_UNKNOWN: 430 case PIN_CONFIG_BIAS_DISABLE:
461 case GPIO_U300_CONFIG_BIAS_FLOAT: 431 case PIN_CONFIG_BIAS_HIGH_IMPEDANCE:
462 val = readl(U300_PIN_REG(offset, per)); 432 val = readl(U300_PIN_REG(offset, per));
463 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, per)); 433 writel(val | U300_PIN_BIT(offset), U300_PIN_REG(offset, per));
464 break; 434 break;
465 case GPIO_U300_CONFIG_BIAS_PULL_UP: 435 case PIN_CONFIG_BIAS_PULL_UP:
466 val = readl(U300_PIN_REG(offset, per)); 436 val = readl(U300_PIN_REG(offset, per));
467 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, per)); 437 writel(val & ~U300_PIN_BIT(offset), U300_PIN_REG(offset, per));
468 break; 438 break;
469 case GPIO_U300_CONFIG_DRIVE_PUSH_PULL: 439 case PIN_CONFIG_DRIVE_PUSH_PULL:
470 val = readl(U300_PIN_REG(offset, pcr)); 440 val = readl(U300_PIN_REG(offset, pcr));
471 val &= ~(U300_GPIO_PXPCR_PIN_MODE_MASK 441 val &= ~(U300_GPIO_PXPCR_PIN_MODE_MASK
472 << ((offset & 0x07) << 1)); 442 << ((offset & 0x07) << 1));
@@ -474,7 +444,7 @@ static int u300_gpio_config(struct gpio_chip *chip, unsigned offset,
474 << ((offset & 0x07) << 1)); 444 << ((offset & 0x07) << 1));
475 writel(val, U300_PIN_REG(offset, pcr)); 445 writel(val, U300_PIN_REG(offset, pcr));
476 break; 446 break;
477 case GPIO_U300_CONFIG_DRIVE_OPEN_DRAIN: 447 case PIN_CONFIG_DRIVE_OPEN_DRAIN:
478 val = readl(U300_PIN_REG(offset, pcr)); 448 val = readl(U300_PIN_REG(offset, pcr));
479 val &= ~(U300_GPIO_PXPCR_PIN_MODE_MASK 449 val &= ~(U300_GPIO_PXPCR_PIN_MODE_MASK
480 << ((offset & 0x07) << 1)); 450 << ((offset & 0x07) << 1));
@@ -482,7 +452,7 @@ static int u300_gpio_config(struct gpio_chip *chip, unsigned offset,
482 << ((offset & 0x07) << 1)); 452 << ((offset & 0x07) << 1));
483 writel(val, U300_PIN_REG(offset, pcr)); 453 writel(val, U300_PIN_REG(offset, pcr));
484 break; 454 break;
485 case GPIO_U300_CONFIG_DRIVE_OPEN_SOURCE: 455 case PIN_CONFIG_DRIVE_OPEN_SOURCE:
486 val = readl(U300_PIN_REG(offset, pcr)); 456 val = readl(U300_PIN_REG(offset, pcr));
487 val &= ~(U300_GPIO_PXPCR_PIN_MODE_MASK 457 val &= ~(U300_GPIO_PXPCR_PIN_MODE_MASK
488 << ((offset & 0x07) << 1)); 458 << ((offset & 0x07) << 1));
@@ -651,12 +621,12 @@ static void __init u300_gpio_init_pin(struct u300_gpio *gpio,
651 621
652 /* Deactivate bias mode for output */ 622 /* Deactivate bias mode for output */
653 u300_gpio_config(&gpio->chip, offset, 623 u300_gpio_config(&gpio->chip, offset,
654 GPIO_U300_CONFIG_BIAS_FLOAT, 624 PIN_CONFIG_BIAS_HIGH_IMPEDANCE,
655 NULL); 625 0);
656 626
657 /* Set drive mode for output */ 627 /* Set drive mode for output */
658 u300_gpio_config(&gpio->chip, offset, 628 u300_gpio_config(&gpio->chip, offset,
659 GPIO_U300_CONFIG_DRIVE_PUSH_PULL, NULL); 629 PIN_CONFIG_DRIVE_PUSH_PULL, 0);
660 630
661 dev_dbg(gpio->dev, "set up pin %d as output, value: %d\n", 631 dev_dbg(gpio->dev, "set up pin %d as output, value: %d\n",
662 offset, conf->outval); 632 offset, conf->outval);
@@ -667,7 +637,7 @@ static void __init u300_gpio_init_pin(struct u300_gpio *gpio,
667 u300_gpio_set(&gpio->chip, offset, 0); 637 u300_gpio_set(&gpio->chip, offset, 0);
668 638
669 /* Set bias mode for input */ 639 /* Set bias mode for input */
670 u300_gpio_config(&gpio->chip, offset, conf->bias_mode, NULL); 640 u300_gpio_config(&gpio->chip, offset, conf->bias_mode, 0);
671 641
672 dev_dbg(gpio->dev, "set up pin %d as input, bias: %04x\n", 642 dev_dbg(gpio->dev, "set up pin %d as input, bias: %04x\n",
673 offset, conf->bias_mode); 643 offset, conf->bias_mode);