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Diffstat (limited to 'drivers/pci/quirks.c')
-rw-r--r--drivers/pci/quirks.c166
1 files changed, 45 insertions, 121 deletions
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 23b599d6a9d5..9ca9b9bf6160 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -453,6 +453,12 @@ static void __devinit quirk_ich6_lpc_acpi(struct pci_dev *dev)
453} 453}
454DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_0, quirk_ich6_lpc_acpi ); 454DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_0, quirk_ich6_lpc_acpi );
455DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1, quirk_ich6_lpc_acpi ); 455DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH6_1, quirk_ich6_lpc_acpi );
456DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_0, quirk_ich6_lpc_acpi );
457DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_1, quirk_ich6_lpc_acpi );
458DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_31, quirk_ich6_lpc_acpi );
459DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_0, quirk_ich6_lpc_acpi );
460DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_2, quirk_ich6_lpc_acpi );
461DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_3, quirk_ich6_lpc_acpi );
456 462
457/* 463/*
458 * VIA ACPI: One IO region pointed to by longword at 464 * VIA ACPI: One IO region pointed to by longword at
@@ -648,11 +654,43 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_4, quirk_vi
648 * Some of the on-chip devices are actually '586 devices' so they are 654 * Some of the on-chip devices are actually '586 devices' so they are
649 * listed here. 655 * listed here.
650 */ 656 */
657
658static int via_irq_fixup_needed = -1;
659
660/*
661 * As some VIA hardware is available in PCI-card form, we need to restrict
662 * this quirk to VIA PCI hardware built onto VIA-based motherboards only.
663 * We try to locate a VIA southbridge before deciding whether the quirk
664 * should be applied.
665 */
666static const struct pci_device_id via_irq_fixup_tbl[] = {
667 {
668 .vendor = PCI_VENDOR_ID_VIA,
669 .device = PCI_ANY_ID,
670 .subvendor = PCI_ANY_ID,
671 .subdevice = PCI_ANY_ID,
672 .class = PCI_CLASS_BRIDGE_ISA << 8,
673 .class_mask = 0xffff00,
674 },
675 { 0, },
676};
677
651static void quirk_via_irq(struct pci_dev *dev) 678static void quirk_via_irq(struct pci_dev *dev)
652{ 679{
653 u8 irq, new_irq; 680 u8 irq, new_irq;
654 681
655 new_irq = dev->irq & 0xf; 682 if (via_irq_fixup_needed == -1)
683 via_irq_fixup_needed = pci_dev_present(via_irq_fixup_tbl);
684
685 if (!via_irq_fixup_needed)
686 return;
687
688 new_irq = dev->irq;
689
690 /* Don't quirk interrupts outside the legacy IRQ range */
691 if (!new_irq || new_irq > 15)
692 return;
693
656 pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq); 694 pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &irq);
657 if (new_irq != irq) { 695 if (new_irq != irq) {
658 printk(KERN_INFO "PCI: VIA IRQ fixup for %s, from %d to %d\n", 696 printk(KERN_INFO "PCI: VIA IRQ fixup for %s, from %d to %d\n",
@@ -661,14 +699,7 @@ static void quirk_via_irq(struct pci_dev *dev)
661 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, new_irq); 699 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, new_irq);
662 } 700 }
663} 701}
664DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_0, quirk_via_irq); 702DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_VIA, PCI_ANY_ID, quirk_via_irq);
665DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_1, quirk_via_irq);
666DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_2, quirk_via_irq);
667DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C586_3, quirk_via_irq);
668DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235_USB_2, quirk_via_irq);
669DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686, quirk_via_irq);
670DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_4, quirk_via_irq);
671DECLARE_PCI_FIXUP_ENABLE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_5, quirk_via_irq);
672 703
673/* 704/*
674 * VIA VT82C598 has its device ID settable and many BIOSes 705 * VIA VT82C598 has its device ID settable and many BIOSes
@@ -683,33 +714,6 @@ static void __devinit quirk_vt82c598_id(struct pci_dev *dev)
683} 714}
684DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C597_0, quirk_vt82c598_id ); 715DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C597_0, quirk_vt82c598_id );
685 716
686#ifdef CONFIG_ACPI_SLEEP
687
688/*
689 * Some VIA systems boot with the abnormal status flag set. This can cause
690 * the BIOS to re-POST the system on resume rather than passing control
691 * back to the OS. Clear the flag on boot
692 */
693static void __devinit quirk_via_abnormal_poweroff(struct pci_dev *dev)
694{
695 u32 reg;
696
697 acpi_hw_register_read(ACPI_MTX_DO_NOT_LOCK, ACPI_REGISTER_PM1_STATUS,
698 &reg);
699
700 if (reg & 0x800) {
701 printk("Clearing abnormal poweroff flag\n");
702 acpi_hw_register_write(ACPI_MTX_DO_NOT_LOCK,
703 ACPI_REGISTER_PM1_STATUS,
704 (u16)0x800);
705 }
706}
707
708DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, quirk_via_abnormal_poweroff);
709DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8237, quirk_via_abnormal_poweroff);
710
711#endif
712
713/* 717/*
714 * CardBus controllers have a legacy base address that enables them 718 * CardBus controllers have a legacy base address that enables them
715 * to respond as i82365 pcmcia controllers. We don't want them to 719 * to respond as i82365 pcmcia controllers. We don't want them to
@@ -793,56 +797,6 @@ static void __init quirk_mediagx_master(struct pci_dev *dev)
793DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_PCI_MASTER, quirk_mediagx_master ); 797DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_PCI_MASTER, quirk_mediagx_master );
794 798
795/* 799/*
796 * As per PCI spec, ignore base address registers 0-3 of the IDE controllers
797 * running in Compatible mode (bits 0 and 2 in the ProgIf for primary and
798 * secondary channels respectively). If the device reports Compatible mode
799 * but does use BAR0-3 for address decoding, we assume that firmware has
800 * programmed these BARs with standard values (0x1f0,0x3f4 and 0x170,0x374).
801 * Exceptions (if they exist) must be handled in chip/architecture specific
802 * fixups.
803 *
804 * Note: for non x86 people. You may need an arch specific quirk to handle
805 * moving IDE devices to native mode as well. Some plug in card devices power
806 * up in compatible mode and assume the BIOS will adjust them.
807 *
808 * Q: should we load the 0x1f0,0x3f4 into the registers or zap them as
809 * we do now ? We don't want is pci_enable_device to come along
810 * and assign new resources. Both approaches work for that.
811 */
812static void __devinit quirk_ide_bases(struct pci_dev *dev)
813{
814 struct resource *res;
815 int first_bar = 2, last_bar = 0;
816
817 if ((dev->class >> 8) != PCI_CLASS_STORAGE_IDE)
818 return;
819
820 res = &dev->resource[0];
821
822 /* primary channel: ProgIf bit 0, BAR0, BAR1 */
823 if (!(dev->class & 1) && (res[0].flags || res[1].flags)) {
824 res[0].start = res[0].end = res[0].flags = 0;
825 res[1].start = res[1].end = res[1].flags = 0;
826 first_bar = 0;
827 last_bar = 1;
828 }
829
830 /* secondary channel: ProgIf bit 2, BAR2, BAR3 */
831 if (!(dev->class & 4) && (res[2].flags || res[3].flags)) {
832 res[2].start = res[2].end = res[2].flags = 0;
833 res[3].start = res[3].end = res[3].flags = 0;
834 last_bar = 3;
835 }
836
837 if (!last_bar)
838 return;
839
840 printk(KERN_INFO "PCI: Ignoring BAR%d-%d of IDE controller %s\n",
841 first_bar, last_bar, pci_name(dev));
842}
843DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, quirk_ide_bases);
844
845/*
846 * Ensure C0 rev restreaming is off. This is normally done by 800 * Ensure C0 rev restreaming is off. This is normally done by
847 * the BIOS but in the odd case it is not the results are corruption 801 * the BIOS but in the odd case it is not the results are corruption
848 * hence the presence of a Linux check 802 * hence the presence of a Linux check
@@ -876,11 +830,10 @@ static void __devinit quirk_svwks_csb5ide(struct pci_dev *pdev)
876 prog &= ~5; 830 prog &= ~5;
877 pdev->class &= ~5; 831 pdev->class &= ~5;
878 pci_write_config_byte(pdev, PCI_CLASS_PROG, prog); 832 pci_write_config_byte(pdev, PCI_CLASS_PROG, prog);
879 /* need to re-assign BARs for compat mode */ 833 /* PCI layer will sort out resources */
880 quirk_ide_bases(pdev);
881 } 834 }
882} 835}
883DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, quirk_svwks_csb5ide ); 836DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, quirk_svwks_csb5ide );
884 837
885/* 838/*
886 * Intel 82801CAM ICH3-M datasheet says IDE modes must be the same 839 * Intel 82801CAM ICH3-M datasheet says IDE modes must be the same
@@ -896,11 +849,9 @@ static void __init quirk_ide_samemode(struct pci_dev *pdev)
896 prog &= ~5; 849 prog &= ~5;
897 pdev->class &= ~5; 850 pdev->class &= ~5;
898 pci_write_config_byte(pdev, PCI_CLASS_PROG, prog); 851 pci_write_config_byte(pdev, PCI_CLASS_PROG, prog);
899 /* need to re-assign BARs for compat mode */
900 quirk_ide_bases(pdev);
901 } 852 }
902} 853}
903DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_10, quirk_ide_samemode); 854DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_10, quirk_ide_samemode);
904 855
905/* This was originally an Alpha specific thing, but it really fits here. 856/* This was originally an Alpha specific thing, but it really fits here.
906 * The i82375 PCI/EISA bridge appears as non-classified. Fix that. 857 * The i82375 PCI/EISA bridge appears as non-classified. Fix that.
@@ -1456,33 +1407,6 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x2609, quirk_intel_pcie_pm);
1456DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x260a, quirk_intel_pcie_pm); 1407DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x260a, quirk_intel_pcie_pm);
1457DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x260b, quirk_intel_pcie_pm); 1408DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x260b, quirk_intel_pcie_pm);
1458 1409
1459/*
1460 * Fixup the cardbus bridges on the IBM Dock II docking station
1461 */
1462static void __devinit quirk_ibm_dock2_cardbus(struct pci_dev *dev)
1463{
1464 u32 val;
1465
1466 /*
1467 * tie the 2 interrupt pins to INTA, and configure the
1468 * multifunction routing register to handle this.
1469 */
1470 if ((dev->subsystem_vendor == PCI_VENDOR_ID_IBM) &&
1471 (dev->subsystem_device == 0x0148)) {
1472 printk(KERN_INFO "PCI: Found IBM Dock II Cardbus Bridge "
1473 "applying quirk\n");
1474 pci_read_config_dword(dev, 0x8c, &val);
1475 val = ((val & 0xffffff00) | 0x1002);
1476 pci_write_config_dword(dev, 0x8c, val);
1477 pci_read_config_dword(dev, 0x80, &val);
1478 val = ((val & 0x00ffff00) | 0x2864c077);
1479 pci_write_config_dword(dev, 0x80, val);
1480 }
1481}
1482
1483DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_1420,
1484 quirk_ibm_dock2_cardbus);
1485
1486static void __devinit quirk_netmos(struct pci_dev *dev) 1410static void __devinit quirk_netmos(struct pci_dev *dev)
1487{ 1411{
1488 unsigned int num_parallel = (dev->subsystem_device & 0xf0) >> 4; 1412 unsigned int num_parallel = (dev->subsystem_device & 0xf0) >> 4;
@@ -1588,7 +1512,6 @@ static void __devinit fixup_rev1_53c810(struct pci_dev* dev)
1588} 1512}
1589DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C810, fixup_rev1_53c810); 1513DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C810, fixup_rev1_53c810);
1590 1514
1591
1592static void pci_do_fixups(struct pci_dev *dev, struct pci_fixup *f, struct pci_fixup *end) 1515static void pci_do_fixups(struct pci_dev *dev, struct pci_fixup *f, struct pci_fixup *end)
1593{ 1516{
1594 while (f < end) { 1517 while (f < end) {
@@ -1764,7 +1687,7 @@ static void __devinit quirk_nvidia_ck804_msi_ht_cap(struct pci_dev *dev)
1764 /* check HT MSI cap on this chipset and the root one. 1687 /* check HT MSI cap on this chipset and the root one.
1765 * a single one having MSI is enough to be sure that MSI are supported. 1688 * a single one having MSI is enough to be sure that MSI are supported.
1766 */ 1689 */
1767 pdev = pci_find_slot(dev->bus->number, 0); 1690 pdev = pci_get_slot(dev->bus, 0);
1768 if (dev->subordinate && !msi_ht_cap_enabled(dev) 1691 if (dev->subordinate && !msi_ht_cap_enabled(dev)
1769 && !msi_ht_cap_enabled(pdev)) { 1692 && !msi_ht_cap_enabled(pdev)) {
1770 printk(KERN_WARNING "PCI: MSI quirk detected. " 1693 printk(KERN_WARNING "PCI: MSI quirk detected. "
@@ -1772,6 +1695,7 @@ static void __devinit quirk_nvidia_ck804_msi_ht_cap(struct pci_dev *dev)
1772 pci_name(dev)); 1695 pci_name(dev));
1773 dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI; 1696 dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
1774 } 1697 }
1698 pci_dev_put(pdev);
1775} 1699}
1776DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_CK804_PCIE, 1700DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_CK804_PCIE,
1777 quirk_nvidia_ck804_msi_ht_cap); 1701 quirk_nvidia_ck804_msi_ht_cap);