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Diffstat (limited to 'drivers/pci/quirks.c')
-rw-r--r--drivers/pci/quirks.c157
1 files changed, 73 insertions, 84 deletions
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index d3f29dd29876..d0f69269eb6c 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -48,8 +48,8 @@ static void quirk_mellanox_tavor(struct pci_dev *dev)
48{ 48{
49 dev->broken_parity_status = 1; /* This device gives false positives */ 49 dev->broken_parity_status = 1; /* This device gives false positives */
50} 50}
51DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MELLANOX,PCI_DEVICE_ID_MELLANOX_TAVOR,quirk_mellanox_tavor); 51DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_TAVOR, quirk_mellanox_tavor);
52DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MELLANOX,PCI_DEVICE_ID_MELLANOX_TAVOR_BRIDGE,quirk_mellanox_tavor); 52DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_MELLANOX, PCI_DEVICE_ID_MELLANOX_TAVOR_BRIDGE, quirk_mellanox_tavor);
53 53
54/* Deal with broken BIOSes that neglect to enable passive release, 54/* Deal with broken BIOSes that neglect to enable passive release,
55 which can cause problems in combination with the 82441FX/PPro MTRRs */ 55 which can cause problems in combination with the 82441FX/PPro MTRRs */
@@ -82,7 +82,7 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82441, quirk_p
82static void quirk_isa_dma_hangs(struct pci_dev *dev) 82static void quirk_isa_dma_hangs(struct pci_dev *dev)
83{ 83{
84 if (!isa_dma_bridge_buggy) { 84 if (!isa_dma_bridge_buggy) {
85 isa_dma_bridge_buggy=1; 85 isa_dma_bridge_buggy = 1;
86 dev_info(&dev->dev, "Activating ISA DMA hang workarounds\n"); 86 dev_info(&dev->dev, "Activating ISA DMA hang workarounds\n");
87 } 87 }
88} 88}
@@ -123,7 +123,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_TGP_LPC, quirk
123 */ 123 */
124static void quirk_nopcipci(struct pci_dev *dev) 124static void quirk_nopcipci(struct pci_dev *dev)
125{ 125{
126 if ((pci_pci_problems & PCIPCI_FAIL)==0) { 126 if ((pci_pci_problems & PCIPCI_FAIL) == 0) {
127 dev_info(&dev->dev, "Disabling direct PCI/PCI transfers\n"); 127 dev_info(&dev->dev, "Disabling direct PCI/PCI transfers\n");
128 pci_pci_problems |= PCIPCI_FAIL; 128 pci_pci_problems |= PCIPCI_FAIL;
129 } 129 }
@@ -148,7 +148,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8151_0, quirk_nopci
148 */ 148 */
149static void quirk_triton(struct pci_dev *dev) 149static void quirk_triton(struct pci_dev *dev)
150{ 150{
151 if ((pci_pci_problems&PCIPCI_TRITON)==0) { 151 if ((pci_pci_problems&PCIPCI_TRITON) == 0) {
152 dev_info(&dev->dev, "Limiting direct PCI/PCI transfers\n"); 152 dev_info(&dev->dev, "Limiting direct PCI/PCI transfers\n");
153 pci_pci_problems |= PCIPCI_TRITON; 153 pci_pci_problems |= PCIPCI_TRITON;
154 } 154 }
@@ -163,8 +163,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82439TX, quirk_
163 * Made according to a windows driver based patch by George E. Breese 163 * Made according to a windows driver based patch by George E. Breese
164 * see PCI Latency Adjust on http://www.viahardware.com/download/viatweak.shtm 164 * see PCI Latency Adjust on http://www.viahardware.com/download/viatweak.shtm
165 * and http://www.georgebreese.com/net/software/#PCI 165 * and http://www.georgebreese.com/net/software/#PCI
166 * Also see http://www.au-ja.org/review-kt133a-1-en.phtml for 166 * Also see http://www.au-ja.org/review-kt133a-1-en.phtml for
167 * the info on which Mr Breese based his work. 167 * the info on which Mr Breese based his work.
168 * 168 *
169 * Updated based on further information from the site and also on 169 * Updated based on further information from the site and also on
170 * information provided by VIA 170 * information provided by VIA
@@ -177,14 +177,14 @@ static void quirk_vialatency(struct pci_dev *dev)
177 a buggy southbridge */ 177 a buggy southbridge */
178 178
179 p = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686, NULL); 179 p = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686, NULL);
180 if (p!=NULL) { 180 if (p != NULL) {
181 /* 0x40 - 0x4f == 686B, 0x10 - 0x2f == 686A; thanks Dan Hollis */ 181 /* 0x40 - 0x4f == 686B, 0x10 - 0x2f == 686A; thanks Dan Hollis */
182 /* Check for buggy part revisions */ 182 /* Check for buggy part revisions */
183 if (p->revision < 0x40 || p->revision > 0x42) 183 if (p->revision < 0x40 || p->revision > 0x42)
184 goto exit; 184 goto exit;
185 } else { 185 } else {
186 p = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231, NULL); 186 p = pci_get_device(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231, NULL);
187 if (p==NULL) /* No problem parts */ 187 if (p == NULL) /* No problem parts */
188 goto exit; 188 goto exit;
189 /* Check for buggy part revisions */ 189 /* Check for buggy part revisions */
190 if (p->revision < 0x10 || p->revision > 0x12) 190 if (p->revision < 0x10 || p->revision > 0x12)
@@ -227,7 +227,7 @@ DECLARE_PCI_FIXUP_RESUME(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8361, quirk_viala
227 */ 227 */
228static void quirk_viaetbf(struct pci_dev *dev) 228static void quirk_viaetbf(struct pci_dev *dev)
229{ 229{
230 if ((pci_pci_problems&PCIPCI_VIAETBF)==0) { 230 if ((pci_pci_problems&PCIPCI_VIAETBF) == 0) {
231 dev_info(&dev->dev, "Limiting direct PCI/PCI transfers\n"); 231 dev_info(&dev->dev, "Limiting direct PCI/PCI transfers\n");
232 pci_pci_problems |= PCIPCI_VIAETBF; 232 pci_pci_problems |= PCIPCI_VIAETBF;
233 } 233 }
@@ -236,7 +236,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C597_0, quirk_via
236 236
237static void quirk_vsfx(struct pci_dev *dev) 237static void quirk_vsfx(struct pci_dev *dev)
238{ 238{
239 if ((pci_pci_problems&PCIPCI_VSFX)==0) { 239 if ((pci_pci_problems&PCIPCI_VSFX) == 0) {
240 dev_info(&dev->dev, "Limiting direct PCI/PCI transfers\n"); 240 dev_info(&dev->dev, "Limiting direct PCI/PCI transfers\n");
241 pci_pci_problems |= PCIPCI_VSFX; 241 pci_pci_problems |= PCIPCI_VSFX;
242 } 242 }
@@ -251,7 +251,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C576, quirk_vsfx)
251 */ 251 */
252static void quirk_alimagik(struct pci_dev *dev) 252static void quirk_alimagik(struct pci_dev *dev)
253{ 253{
254 if ((pci_pci_problems&PCIPCI_ALIMAGIK)==0) { 254 if ((pci_pci_problems&PCIPCI_ALIMAGIK) == 0) {
255 dev_info(&dev->dev, "Limiting direct PCI/PCI transfers\n"); 255 dev_info(&dev->dev, "Limiting direct PCI/PCI transfers\n");
256 pci_pci_problems |= PCIPCI_ALIMAGIK|PCIPCI_TRITON; 256 pci_pci_problems |= PCIPCI_ALIMAGIK|PCIPCI_TRITON;
257 } 257 }
@@ -265,7 +265,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1651, quirk_alimagi
265 */ 265 */
266static void quirk_natoma(struct pci_dev *dev) 266static void quirk_natoma(struct pci_dev *dev)
267{ 267{
268 if ((pci_pci_problems&PCIPCI_NATOMA)==0) { 268 if ((pci_pci_problems&PCIPCI_NATOMA) == 0) {
269 dev_info(&dev->dev, "Limiting direct PCI/PCI transfers\n"); 269 dev_info(&dev->dev, "Limiting direct PCI/PCI transfers\n");
270 pci_pci_problems |= PCIPCI_NATOMA; 270 pci_pci_problems |= PCIPCI_NATOMA;
271 } 271 }
@@ -315,8 +315,7 @@ static void quirk_cs5536_vsa(struct pci_dev *dev)
315 if (pci_resource_len(dev, 0) != 8) { 315 if (pci_resource_len(dev, 0) != 8) {
316 struct resource *res = &dev->resource[0]; 316 struct resource *res = &dev->resource[0];
317 res->end = res->start + 8 - 1; 317 res->end = res->start + 8 - 1;
318 dev_info(&dev->dev, "CS5536 ISA bridge bug detected " 318 dev_info(&dev->dev, "CS5536 ISA bridge bug detected (incorrect header); workaround applied\n");
319 "(incorrect header); workaround applied.\n");
320 } 319 }
321} 320}
322DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA, quirk_cs5536_vsa); 321DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA, quirk_cs5536_vsa);
@@ -400,7 +399,8 @@ static void piix4_io_quirk(struct pci_dev *dev, const char *name, unsigned int p
400 * let's get enough confirmation reports first. 399 * let's get enough confirmation reports first.
401 */ 400 */
402 base &= -size; 401 base &= -size;
403 dev_info(&dev->dev, "%s PIO at %04x-%04x\n", name, base, base + size - 1); 402 dev_info(&dev->dev, "%s PIO at %04x-%04x\n", name, base,
403 base + size - 1);
404} 404}
405 405
406static void piix4_mem_quirk(struct pci_dev *dev, const char *name, unsigned int port, unsigned int enable) 406static void piix4_mem_quirk(struct pci_dev *dev, const char *name, unsigned int port, unsigned int enable)
@@ -425,7 +425,8 @@ static void piix4_mem_quirk(struct pci_dev *dev, const char *name, unsigned int
425 * reserve it, but let's get enough confirmation reports first. 425 * reserve it, but let's get enough confirmation reports first.
426 */ 426 */
427 base &= -size; 427 base &= -size;
428 dev_info(&dev->dev, "%s MMIO at %04x-%04x\n", name, base, base + size - 1); 428 dev_info(&dev->dev, "%s MMIO at %04x-%04x\n", name, base,
429 base + size - 1);
429} 430}
430 431
431/* 432/*
@@ -668,8 +669,7 @@ static void quirk_xio2000a(struct pci_dev *dev)
668 struct pci_dev *pdev; 669 struct pci_dev *pdev;
669 u16 command; 670 u16 command;
670 671
671 dev_warn(&dev->dev, "TI XIO2000a quirk detected; " 672 dev_warn(&dev->dev, "TI XIO2000a quirk detected; secondary bus fast back-to-back transfers disabled\n");
672 "secondary bus fast back-to-back transfers disabled\n");
673 list_for_each_entry(pdev, &dev->subordinate->devices, bus_list) { 673 list_for_each_entry(pdev, &dev->subordinate->devices, bus_list) {
674 pci_read_config_word(pdev, PCI_COMMAND, &command); 674 pci_read_config_word(pdev, PCI_COMMAND, &command);
675 if (command & PCI_COMMAND_FAST_BACK) 675 if (command & PCI_COMMAND_FAST_BACK)
@@ -703,7 +703,7 @@ static void quirk_via_ioapic(struct pci_dev *dev)
703 tmp == 0 ? "Disa" : "Ena"); 703 tmp == 0 ? "Disa" : "Ena");
704 704
705 /* Offset 0x58: External APIC IRQ output control */ 705 /* Offset 0x58: External APIC IRQ output control */
706 pci_write_config_byte (dev, 0x58, tmp); 706 pci_write_config_byte(dev, 0x58, tmp);
707} 707}
708DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686, quirk_via_ioapic); 708DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686, quirk_via_ioapic);
709DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686, quirk_via_ioapic); 709DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686, quirk_via_ioapic);
@@ -761,8 +761,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SI, PCI_ANY_ID, quirk_ioapic_rmw);
761static void quirk_amd_8131_mmrbc(struct pci_dev *dev) 761static void quirk_amd_8131_mmrbc(struct pci_dev *dev)
762{ 762{
763 if (dev->subordinate && dev->revision <= 0x12) { 763 if (dev->subordinate && dev->revision <= 0x12) {
764 dev_info(&dev->dev, "AMD8131 rev %x detected; " 764 dev_info(&dev->dev, "AMD8131 rev %x detected; disabling PCI-X MMRBC\n",
765 "disabling PCI-X MMRBC\n", dev->revision); 765 dev->revision);
766 dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MMRBC; 766 dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MMRBC;
767 } 767 }
768} 768}
@@ -916,12 +916,12 @@ static void quirk_amd_ordering(struct pci_dev *dev)
916{ 916{
917 u32 pcic; 917 u32 pcic;
918 pci_read_config_dword(dev, 0x4C, &pcic); 918 pci_read_config_dword(dev, 0x4C, &pcic);
919 if ((pcic&6)!=6) { 919 if ((pcic & 6) != 6) {
920 pcic |= 6; 920 pcic |= 6;
921 dev_warn(&dev->dev, "BIOS failed to enable PCI standards compliance; fixing this error\n"); 921 dev_warn(&dev->dev, "BIOS failed to enable PCI standards compliance; fixing this error\n");
922 pci_write_config_dword(dev, 0x4C, pcic); 922 pci_write_config_dword(dev, 0x4C, pcic);
923 pci_read_config_dword(dev, 0x84, &pcic); 923 pci_read_config_dword(dev, 0x84, &pcic);
924 pcic |= (1<<23); /* Required in this mode */ 924 pcic |= (1 << 23); /* Required in this mode */
925 pci_write_config_dword(dev, 0x84, pcic); 925 pci_write_config_dword(dev, 0x84, pcic);
926 } 926 }
927} 927}
@@ -937,7 +937,7 @@ DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_FE_GATE_700C
937 */ 937 */
938static void quirk_dunord(struct pci_dev *dev) 938static void quirk_dunord(struct pci_dev *dev)
939{ 939{
940 struct resource *r = &dev->resource [1]; 940 struct resource *r = &dev->resource[1];
941 941
942 r->flags |= IORESOURCE_UNSET; 942 r->flags |= IORESOURCE_UNSET;
943 r->start = 0; 943 r->start = 0;
@@ -967,11 +967,13 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TOSHIBA, 0x605, quirk_transparent_bridge)
967static void quirk_mediagx_master(struct pci_dev *dev) 967static void quirk_mediagx_master(struct pci_dev *dev)
968{ 968{
969 u8 reg; 969 u8 reg;
970
970 pci_read_config_byte(dev, 0x41, &reg); 971 pci_read_config_byte(dev, 0x41, &reg);
971 if (reg & 2) { 972 if (reg & 2) {
972 reg &= ~2; 973 reg &= ~2;
973 dev_info(&dev->dev, "Fixup for MediaGX/Geode Slave Disconnect Boundary (0x41=0x%02x)\n", reg); 974 dev_info(&dev->dev, "Fixup for MediaGX/Geode Slave Disconnect Boundary (0x41=0x%02x)\n",
974 pci_write_config_byte(dev, 0x41, reg); 975 reg);
976 pci_write_config_byte(dev, 0x41, reg);
975 } 977 }
976} 978}
977DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_PCI_MASTER, quirk_mediagx_master); 979DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_PCI_MASTER, quirk_mediagx_master);
@@ -1120,7 +1122,7 @@ static void asus_hides_smbus_hostbridge(struct pci_dev *dev)
1120{ 1122{
1121 if (unlikely(dev->subsystem_vendor == PCI_VENDOR_ID_ASUSTEK)) { 1123 if (unlikely(dev->subsystem_vendor == PCI_VENDOR_ID_ASUSTEK)) {
1122 if (dev->device == PCI_DEVICE_ID_INTEL_82845_HB) 1124 if (dev->device == PCI_DEVICE_ID_INTEL_82845_HB)
1123 switch(dev->subsystem_device) { 1125 switch (dev->subsystem_device) {
1124 case 0x8025: /* P4B-LX */ 1126 case 0x8025: /* P4B-LX */
1125 case 0x8070: /* P4B */ 1127 case 0x8070: /* P4B */
1126 case 0x8088: /* P4B533 */ 1128 case 0x8088: /* P4B533 */
@@ -1128,14 +1130,14 @@ static void asus_hides_smbus_hostbridge(struct pci_dev *dev)
1128 asus_hides_smbus = 1; 1130 asus_hides_smbus = 1;
1129 } 1131 }
1130 else if (dev->device == PCI_DEVICE_ID_INTEL_82845G_HB) 1132 else if (dev->device == PCI_DEVICE_ID_INTEL_82845G_HB)
1131 switch(dev->subsystem_device) { 1133 switch (dev->subsystem_device) {
1132 case 0x80b1: /* P4GE-V */ 1134 case 0x80b1: /* P4GE-V */
1133 case 0x80b2: /* P4PE */ 1135 case 0x80b2: /* P4PE */
1134 case 0x8093: /* P4B533-V */ 1136 case 0x8093: /* P4B533-V */
1135 asus_hides_smbus = 1; 1137 asus_hides_smbus = 1;
1136 } 1138 }
1137 else if (dev->device == PCI_DEVICE_ID_INTEL_82850_HB) 1139 else if (dev->device == PCI_DEVICE_ID_INTEL_82850_HB)
1138 switch(dev->subsystem_device) { 1140 switch (dev->subsystem_device) {
1139 case 0x8030: /* P4T533 */ 1141 case 0x8030: /* P4T533 */
1140 asus_hides_smbus = 1; 1142 asus_hides_smbus = 1;
1141 } 1143 }
@@ -1175,7 +1177,7 @@ static void asus_hides_smbus_hostbridge(struct pci_dev *dev)
1175 } 1177 }
1176 } else if (unlikely(dev->subsystem_vendor == PCI_VENDOR_ID_HP)) { 1178 } else if (unlikely(dev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
1177 if (dev->device == PCI_DEVICE_ID_INTEL_82855PM_HB) 1179 if (dev->device == PCI_DEVICE_ID_INTEL_82855PM_HB)
1178 switch(dev->subsystem_device) { 1180 switch (dev->subsystem_device) {
1179 case 0x088C: /* HP Compaq nc8000 */ 1181 case 0x088C: /* HP Compaq nc8000 */
1180 case 0x0890: /* HP Compaq nc6000 */ 1182 case 0x0890: /* HP Compaq nc6000 */
1181 asus_hides_smbus = 1; 1183 asus_hides_smbus = 1;
@@ -1192,20 +1194,20 @@ static void asus_hides_smbus_hostbridge(struct pci_dev *dev)
1192 case 0x12bf: /* HP xw4100 */ 1194 case 0x12bf: /* HP xw4100 */
1193 asus_hides_smbus = 1; 1195 asus_hides_smbus = 1;
1194 } 1196 }
1195 } else if (unlikely(dev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG)) { 1197 } else if (unlikely(dev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG)) {
1196 if (dev->device == PCI_DEVICE_ID_INTEL_82855PM_HB) 1198 if (dev->device == PCI_DEVICE_ID_INTEL_82855PM_HB)
1197 switch(dev->subsystem_device) { 1199 switch (dev->subsystem_device) {
1198 case 0xC00C: /* Samsung P35 notebook */ 1200 case 0xC00C: /* Samsung P35 notebook */
1199 asus_hides_smbus = 1; 1201 asus_hides_smbus = 1;
1200 } 1202 }
1201 } else if (unlikely(dev->subsystem_vendor == PCI_VENDOR_ID_COMPAQ)) { 1203 } else if (unlikely(dev->subsystem_vendor == PCI_VENDOR_ID_COMPAQ)) {
1202 if (dev->device == PCI_DEVICE_ID_INTEL_82855PM_HB) 1204 if (dev->device == PCI_DEVICE_ID_INTEL_82855PM_HB)
1203 switch(dev->subsystem_device) { 1205 switch (dev->subsystem_device) {
1204 case 0x0058: /* Compaq Evo N620c */ 1206 case 0x0058: /* Compaq Evo N620c */
1205 asus_hides_smbus = 1; 1207 asus_hides_smbus = 1;
1206 } 1208 }
1207 else if (dev->device == PCI_DEVICE_ID_INTEL_82810_IG3) 1209 else if (dev->device == PCI_DEVICE_ID_INTEL_82810_IG3)
1208 switch(dev->subsystem_device) { 1210 switch (dev->subsystem_device) {
1209 case 0xB16C: /* Compaq Deskpro EP 401963-001 (PCA# 010174) */ 1211 case 0xB16C: /* Compaq Deskpro EP 401963-001 (PCA# 010174) */
1210 /* Motherboard doesn't have Host bridge 1212 /* Motherboard doesn't have Host bridge
1211 * subvendor/subdevice IDs, therefore checking 1213 * subvendor/subdevice IDs, therefore checking
@@ -1213,7 +1215,7 @@ static void asus_hides_smbus_hostbridge(struct pci_dev *dev)
1213 asus_hides_smbus = 1; 1215 asus_hides_smbus = 1;
1214 } 1216 }
1215 else if (dev->device == PCI_DEVICE_ID_INTEL_82801DB_2) 1217 else if (dev->device == PCI_DEVICE_ID_INTEL_82801DB_2)
1216 switch(dev->subsystem_device) { 1218 switch (dev->subsystem_device) {
1217 case 0x00b8: /* Compaq Evo D510 CMT */ 1219 case 0x00b8: /* Compaq Evo D510 CMT */
1218 case 0x00b9: /* Compaq Evo D510 SFF */ 1220 case 0x00b9: /* Compaq Evo D510 SFF */
1219 case 0x00ba: /* Compaq Evo D510 USDT */ 1221 case 0x00ba: /* Compaq Evo D510 USDT */
@@ -1261,7 +1263,8 @@ static void asus_hides_smbus_lpc(struct pci_dev *dev)
1261 pci_write_config_word(dev, 0xF2, val & (~0x8)); 1263 pci_write_config_word(dev, 0xF2, val & (~0x8));
1262 pci_read_config_word(dev, 0xF2, &val); 1264 pci_read_config_word(dev, 0xF2, &val);
1263 if (val & 0x8) 1265 if (val & 0x8)
1264 dev_info(&dev->dev, "i801 SMBus device continues to play 'hide and seek'! 0x%x\n", val); 1266 dev_info(&dev->dev, "i801 SMBus device continues to play 'hide and seek'! 0x%x\n",
1267 val);
1265 else 1268 else
1266 dev_info(&dev->dev, "Enabled i801 SMBus device\n"); 1269 dev_info(&dev->dev, "Enabled i801 SMBus device\n");
1267 } 1270 }
@@ -1409,7 +1412,8 @@ static void asus_hides_ac97_lpc(struct pci_dev *dev)
1409 pci_write_config_byte(dev, 0x50, val & (~0xc0)); 1412 pci_write_config_byte(dev, 0x50, val & (~0xc0));
1410 pci_read_config_byte(dev, 0x50, &val); 1413 pci_read_config_byte(dev, 0x50, &val);
1411 if (val & 0xc0) 1414 if (val & 0xc0)
1412 dev_info(&dev->dev, "Onboard AC97/MC97 devices continue to play 'hide and seek'! 0x%x\n", val); 1415 dev_info(&dev->dev, "Onboard AC97/MC97 devices continue to play 'hide and seek'! 0x%x\n",
1416 val);
1413 else 1417 else
1414 dev_info(&dev->dev, "Enabled onboard AC97/MC97 devices\n"); 1418 dev_info(&dev->dev, "Enabled onboard AC97/MC97 devices\n");
1415 } 1419 }
@@ -1514,10 +1518,8 @@ static void quirk_alder_ioapic(struct pci_dev *pdev)
1514 1518
1515 /* The next five BARs all seem to be rubbish, so just clean 1519 /* The next five BARs all seem to be rubbish, so just clean
1516 * them out */ 1520 * them out */
1517 for (i=1; i < 6; i++) { 1521 for (i = 1; i < 6; i++)
1518 memset(&pdev->resource[i], 0, sizeof(pdev->resource[i])); 1522 memset(&pdev->resource[i], 0, sizeof(pdev->resource[i]));
1519 }
1520
1521} 1523}
1522DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EESSC, quirk_alder_ioapic); 1524DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_EESSC, quirk_alder_ioapic);
1523#endif 1525#endif
@@ -1552,7 +1554,7 @@ DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_PXHV, quirk_pci
1552 * Some Intel PCI Express chipsets have trouble with downstream 1554 * Some Intel PCI Express chipsets have trouble with downstream
1553 * device power management. 1555 * device power management.
1554 */ 1556 */
1555static void quirk_intel_pcie_pm(struct pci_dev * dev) 1557static void quirk_intel_pcie_pm(struct pci_dev *dev)
1556{ 1558{
1557 pci_pm_d3_delay = 120; 1559 pci_pm_d3_delay = 120;
1558 dev->no_d1d2 = 1; 1560 dev->no_d1d2 = 1;
@@ -1721,8 +1723,8 @@ static void quirk_disable_amd_8111_boot_interrupt(struct pci_dev *dev)
1721 1723
1722 pci_read_config_word(dev, AMD_8111_PCI_IRQ_ROUTING, &pci_config_word); 1724 pci_read_config_word(dev, AMD_8111_PCI_IRQ_ROUTING, &pci_config_word);
1723 if (!pci_config_word) { 1725 if (!pci_config_word) {
1724 dev_info(&dev->dev, "boot interrupts on device [%04x:%04x] " 1726 dev_info(&dev->dev, "boot interrupts on device [%04x:%04x] already disabled\n",
1725 "already disabled\n", dev->vendor, dev->device); 1727 dev->vendor, dev->device);
1726 return; 1728 return;
1727 } 1729 }
1728 pci_write_config_word(dev, AMD_8111_PCI_IRQ_ROUTING, 0); 1730 pci_write_config_word(dev, AMD_8111_PCI_IRQ_ROUTING, 0);
@@ -1770,8 +1772,7 @@ static void quirk_plx_pci9050(struct pci_dev *dev)
1770 if (pci_resource_len(dev, bar) == 0x80 && 1772 if (pci_resource_len(dev, bar) == 0x80 &&
1771 (pci_resource_start(dev, bar) & 0x80)) { 1773 (pci_resource_start(dev, bar) & 0x80)) {
1772 struct resource *r = &dev->resource[bar]; 1774 struct resource *r = &dev->resource[bar];
1773 dev_info(&dev->dev, 1775 dev_info(&dev->dev, "Re-allocating PLX PCI 9050 BAR %u to length 256 to avoid bit 7 bug\n",
1774 "Re-allocating PLX PCI 9050 BAR %u to length 256 to avoid bit 7 bug\n",
1775 bar); 1776 bar);
1776 r->flags |= IORESOURCE_UNSET; 1777 r->flags |= IORESOURCE_UNSET;
1777 r->start = 0; 1778 r->start = 0;
@@ -1818,9 +1819,7 @@ static void quirk_netmos(struct pci_dev *dev)
1818 case PCI_DEVICE_ID_NETMOS_9845: 1819 case PCI_DEVICE_ID_NETMOS_9845:
1819 case PCI_DEVICE_ID_NETMOS_9855: 1820 case PCI_DEVICE_ID_NETMOS_9855:
1820 if (num_parallel) { 1821 if (num_parallel) {
1821 dev_info(&dev->dev, "Netmos %04x (%u parallel, " 1822 dev_info(&dev->dev, "Netmos %04x (%u parallel, %u serial); changing class SERIAL to OTHER (use parport_serial)\n",
1822 "%u serial); changing class SERIAL to OTHER "
1823 "(use parport_serial)\n",
1824 dev->device, num_parallel, num_serial); 1823 dev->device, num_parallel, num_serial);
1825 dev->class = (PCI_CLASS_COMMUNICATION_OTHER << 8) | 1824 dev->class = (PCI_CLASS_COMMUNICATION_OTHER << 8) |
1826 (dev->class & 0xff); 1825 (dev->class & 0xff);
@@ -1887,8 +1886,7 @@ static void quirk_e100_interrupt(struct pci_dev *dev)
1887 1886
1888 cmd_hi = readb(csr + 3); 1887 cmd_hi = readb(csr + 3);
1889 if (cmd_hi == 0) { 1888 if (cmd_hi == 0) {
1890 dev_warn(&dev->dev, "Firmware left e100 interrupts enabled; " 1889 dev_warn(&dev->dev, "Firmware left e100 interrupts enabled; disabling\n");
1891 "disabling\n");
1892 writeb(1, csr + 3); 1890 writeb(1, csr + 3);
1893 } 1891 }
1894 1892
@@ -1958,8 +1956,7 @@ static void quirk_nvidia_ck804_pcie_aer_ext_cap(struct pci_dev *dev)
1958 if (pci_read_config_byte(dev, 0xf41, &b) == 0) { 1956 if (pci_read_config_byte(dev, 0xf41, &b) == 0) {
1959 if (!(b & 0x20)) { 1957 if (!(b & 0x20)) {
1960 pci_write_config_byte(dev, 0xf41, b | 0x20); 1958 pci_write_config_byte(dev, 0xf41, b | 0x20);
1961 dev_info(&dev->dev, 1959 dev_info(&dev->dev, "Linking AER extended capability\n");
1962 "Linking AER extended capability\n");
1963 } 1960 }
1964 } 1961 }
1965} 1962}
@@ -1997,8 +1994,7 @@ static void quirk_via_cx700_pci_parking_caching(struct pci_dev *dev)
1997 /* Turn off PCI Bus Parking */ 1994 /* Turn off PCI Bus Parking */
1998 pci_write_config_byte(dev, 0x76, b ^ 0x40); 1995 pci_write_config_byte(dev, 0x76, b ^ 0x40);
1999 1996
2000 dev_info(&dev->dev, 1997 dev_info(&dev->dev, "Disabling VIA CX700 PCI parking\n");
2001 "Disabling VIA CX700 PCI parking\n");
2002 } 1998 }
2003 } 1999 }
2004 2000
@@ -2013,8 +2009,7 @@ static void quirk_via_cx700_pci_parking_caching(struct pci_dev *dev)
2013 /* Disable "Read FIFO Timer" */ 2009 /* Disable "Read FIFO Timer" */
2014 pci_write_config_byte(dev, 0x77, 0x0); 2010 pci_write_config_byte(dev, 0x77, 0x0);
2015 2011
2016 dev_info(&dev->dev, 2012 dev_info(&dev->dev, "Disabling VIA CX700 PCI caching\n");
2017 "Disabling VIA CX700 PCI caching\n");
2018 } 2013 }
2019 } 2014 }
2020} 2015}
@@ -2149,8 +2144,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8380_0, quirk_disab
2149static void quirk_disable_msi(struct pci_dev *dev) 2144static void quirk_disable_msi(struct pci_dev *dev)
2150{ 2145{
2151 if (dev->subordinate) { 2146 if (dev->subordinate) {
2152 dev_warn(&dev->dev, "MSI quirk detected; " 2147 dev_warn(&dev->dev, "MSI quirk detected; subordinate MSI disabled\n");
2153 "subordinate MSI disabled\n");
2154 dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI; 2148 dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
2155 } 2149 }
2156} 2150}
@@ -2189,8 +2183,7 @@ static int msi_ht_cap_enabled(struct pci_dev *dev)
2189 u8 flags; 2183 u8 flags;
2190 2184
2191 if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS, 2185 if (pci_read_config_byte(dev, pos + HT_MSI_FLAGS,
2192 &flags) == 0) 2186 &flags) == 0) {
2193 {
2194 dev_info(&dev->dev, "Found %s HT MSI Mapping\n", 2187 dev_info(&dev->dev, "Found %s HT MSI Mapping\n",
2195 flags & HT_MSI_FLAGS_ENABLE ? 2188 flags & HT_MSI_FLAGS_ENABLE ?
2196 "enabled" : "disabled"); 2189 "enabled" : "disabled");
@@ -2207,8 +2200,7 @@ static int msi_ht_cap_enabled(struct pci_dev *dev)
2207static void quirk_msi_ht_cap(struct pci_dev *dev) 2200static void quirk_msi_ht_cap(struct pci_dev *dev)
2208{ 2201{
2209 if (dev->subordinate && !msi_ht_cap_enabled(dev)) { 2202 if (dev->subordinate && !msi_ht_cap_enabled(dev)) {
2210 dev_warn(&dev->dev, "MSI quirk detected; " 2203 dev_warn(&dev->dev, "MSI quirk detected; subordinate MSI disabled\n");
2211 "subordinate MSI disabled\n");
2212 dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI; 2204 dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
2213 } 2205 }
2214} 2206}
@@ -2232,8 +2224,7 @@ static void quirk_nvidia_ck804_msi_ht_cap(struct pci_dev *dev)
2232 if (!pdev) 2224 if (!pdev)
2233 return; 2225 return;
2234 if (!msi_ht_cap_enabled(dev) && !msi_ht_cap_enabled(pdev)) { 2226 if (!msi_ht_cap_enabled(dev) && !msi_ht_cap_enabled(pdev)) {
2235 dev_warn(&dev->dev, "MSI quirk detected; " 2227 dev_warn(&dev->dev, "MSI quirk detected; subordinate MSI disabled\n");
2236 "subordinate MSI disabled\n");
2237 dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI; 2228 dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
2238 } 2229 }
2239 pci_dev_put(pdev); 2230 pci_dev_put(pdev);
@@ -2279,8 +2270,7 @@ static void nvenet_msi_disable(struct pci_dev *dev)
2279 if (board_name && 2270 if (board_name &&
2280 (strstr(board_name, "P5N32-SLI PREMIUM") || 2271 (strstr(board_name, "P5N32-SLI PREMIUM") ||
2281 strstr(board_name, "P5N32-E SLI"))) { 2272 strstr(board_name, "P5N32-E SLI"))) {
2282 dev_info(&dev->dev, 2273 dev_info(&dev->dev, "Disabling msi for MCP55 NIC on P5N32-SLI\n");
2283 "Disabling msi for MCP55 NIC on P5N32-SLI\n");
2284 dev->no_msi = 1; 2274 dev->no_msi = 1;
2285 } 2275 }
2286} 2276}
@@ -2489,8 +2479,7 @@ static void __nv_msi_ht_cap_quirk(struct pci_dev *dev, int all)
2489 */ 2479 */
2490 host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0)); 2480 host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
2491 if (host_bridge == NULL) { 2481 if (host_bridge == NULL) {
2492 dev_warn(&dev->dev, 2482 dev_warn(&dev->dev, "nv_msi_ht_cap_quirk didn't locate host bridge\n");
2493 "nv_msi_ht_cap_quirk didn't locate host bridge\n");
2494 return; 2483 return;
2495 } 2484 }
2496 2485
@@ -2817,8 +2806,7 @@ static void quirk_intel_mc_errata(struct pci_dev *dev)
2817 */ 2806 */
2818 err = pci_read_config_word(dev, 0x48, &rcc); 2807 err = pci_read_config_word(dev, 0x48, &rcc);
2819 if (err) { 2808 if (err) {
2820 dev_err(&dev->dev, "Error attempting to read the read " 2809 dev_err(&dev->dev, "Error attempting to read the read completion coalescing register\n");
2821 "completion coalescing register.\n");
2822 return; 2810 return;
2823 } 2811 }
2824 2812
@@ -2829,13 +2817,11 @@ static void quirk_intel_mc_errata(struct pci_dev *dev)
2829 2817
2830 err = pci_write_config_word(dev, 0x48, rcc); 2818 err = pci_write_config_word(dev, 0x48, rcc);
2831 if (err) { 2819 if (err) {
2832 dev_err(&dev->dev, "Error attempting to write the read " 2820 dev_err(&dev->dev, "Error attempting to write the read completion coalescing register\n");
2833 "completion coalescing register.\n");
2834 return; 2821 return;
2835 } 2822 }
2836 2823
2837 pr_info_once("Read completion coalescing disabled due to hardware " 2824 pr_info_once("Read completion coalescing disabled due to hardware errata relating to 256B MPS\n");
2838 "errata relating to 256B MPS.\n");
2839} 2825}
2840/* Intel 5000 series memory controllers and ports 2-7 */ 2826/* Intel 5000 series memory controllers and ports 2-7 */
2841DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x25c0, quirk_intel_mc_errata); 2827DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x25c0, quirk_intel_mc_errata);
@@ -2944,8 +2930,7 @@ static void disable_igfx_irq(struct pci_dev *dev)
2944 2930
2945 /* Check if any interrupt line is still enabled */ 2931 /* Check if any interrupt line is still enabled */
2946 if (readl(regs + I915_DEIER_REG) != 0) { 2932 if (readl(regs + I915_DEIER_REG) != 0) {
2947 dev_warn(&dev->dev, "BIOS left Intel GPU interrupts enabled; " 2933 dev_warn(&dev->dev, "BIOS left Intel GPU interrupts enabled; disabling\n");
2948 "disabling\n");
2949 2934
2950 writel(0, regs + I915_DEIER_REG); 2935 writel(0, regs + I915_DEIER_REG);
2951 } 2936 }
@@ -3040,7 +3025,7 @@ void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev)
3040{ 3025{
3041 struct pci_fixup *start, *end; 3026 struct pci_fixup *start, *end;
3042 3027
3043 switch(pass) { 3028 switch (pass) {
3044 case pci_fixup_early: 3029 case pci_fixup_early:
3045 start = __start_pci_fixups_early; 3030 start = __start_pci_fixups_early;
3046 end = __end_pci_fixups_early; 3031 end = __end_pci_fixups_early;
@@ -3112,8 +3097,8 @@ static int __init pci_apply_final_quirks(void)
3112 if (!tmp || cls == tmp) 3097 if (!tmp || cls == tmp)
3113 continue; 3098 continue;
3114 3099
3115 printk(KERN_DEBUG "PCI: CLS mismatch (%u != %u), " 3100 printk(KERN_DEBUG "PCI: CLS mismatch (%u != %u), using %u bytes\n",
3116 "using %u bytes\n", cls << 2, tmp << 2, 3101 cls << 2, tmp << 2,
3117 pci_dfl_cache_line_size << 2); 3102 pci_dfl_cache_line_size << 2);
3118 pci_cache_line_size = pci_dfl_cache_line_size; 3103 pci_cache_line_size = pci_dfl_cache_line_size;
3119 } 3104 }
@@ -3389,6 +3374,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL_EXT, 0x91a0,
3389/* https://bugzilla.kernel.org/show_bug.cgi?id=42679#c49 */ 3374/* https://bugzilla.kernel.org/show_bug.cgi?id=42679#c49 */
3390DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL_EXT, 0x9230, 3375DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL_EXT, 0x9230,
3391 quirk_dma_func1_alias); 3376 quirk_dma_func1_alias);
3377DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_TTI, 0x0642,
3378 quirk_dma_func1_alias);
3392/* https://bugs.gentoo.org/show_bug.cgi?id=497630 */ 3379/* https://bugs.gentoo.org/show_bug.cgi?id=497630 */
3393DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_JMICRON, 3380DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_JMICRON,
3394 PCI_DEVICE_ID_JMICRON_JMB388_ESD, 3381 PCI_DEVICE_ID_JMICRON_JMB388_ESD,
@@ -3416,6 +3403,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ASMEDIA, 0x1080,
3416 quirk_use_pcie_bridge_dma_alias); 3403 quirk_use_pcie_bridge_dma_alias);
3417/* Tundra 8113, https://bugzilla.kernel.org/show_bug.cgi?id=44881#c43 */ 3404/* Tundra 8113, https://bugzilla.kernel.org/show_bug.cgi?id=44881#c43 */
3418DECLARE_PCI_FIXUP_HEADER(0x10e3, 0x8113, quirk_use_pcie_bridge_dma_alias); 3405DECLARE_PCI_FIXUP_HEADER(0x10e3, 0x8113, quirk_use_pcie_bridge_dma_alias);
3406/* ITE 8892, https://bugzilla.kernel.org/show_bug.cgi?id=73551 */
3407DECLARE_PCI_FIXUP_HEADER(0x1283, 0x8892, quirk_use_pcie_bridge_dma_alias);
3419 3408
3420static struct pci_dev *pci_func_0_dma_source(struct pci_dev *dev) 3409static struct pci_dev *pci_func_0_dma_source(struct pci_dev *dev)
3421{ 3410{