6 files changed, 38 insertions, 14 deletions

diff --git a/drivers/pci/pcie/aer/Kconfig.debug b/drivers/pci/pcie/aer/Kconfig.debug
index b8c925c1f6aa..9142949734f5 100644
--- a/drivers/pci/pcie/aer/Kconfig.debug
+++ b/drivers/pci/pcie/aer/Kconfig.debug
@@ -3,14 +3,14 @@
 #
 
 config PCIEAER_INJECT
-        tristate "PCIE AER error injector support"
+        tristate "PCIe AER error injector support"
         depends on PCIEAER
         default n
         help
           This enables PCI Express Root Port Advanced Error Reporting
           (AER) software error injector.
 
-          Debuging PCIE AER code is quite difficult because it is hard
+          Debugging PCIe AER code is quite difficult because it is hard
           to trigger various real hardware errors. Software based
           error injection can fake almost all kinds of errors with the
           help of a user space helper tool aer-inject, which can be
diff --git a/drivers/pci/pcie/aer/aer_inject.c b/drivers/pci/pcie/aer/aer_inject.c
index 7fcd5331b14c..223052b73563 100644
--- a/drivers/pci/pcie/aer/aer_inject.c
+++ b/drivers/pci/pcie/aer/aer_inject.c
@@ -1,7 +1,7 @@
 /*
- * PCIE AER software error injection support.
+ * PCIe AER software error injection support.
  *
- * Debuging PCIE AER code is quite difficult because it is hard to
+ * Debuging PCIe AER code is quite difficult because it is hard to
  * trigger various real hardware errors. Software based error
  * injection can fake almost all kinds of errors with the help of a
  * user space helper tool aer-inject, which can be gotten from:
@@ -321,7 +321,7 @@ static int aer_inject(struct aer_error_inj *einj)
         unsigned long flags;
         unsigned int devfn = PCI_DEVFN(einj->dev, einj->fn);
         int pos_cap_err, rp_pos_cap_err;
-        u32 sever;
+        u32 sever, cor_mask, uncor_mask;
         int ret = 0;
 
         dev = pci_get_domain_bus_and_slot((int)einj->domain, einj->bus, devfn);
@@ -339,6 +339,9 @@ static int aer_inject(struct aer_error_inj *einj)
                 goto out_put;
         }
         pci_read_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_SEVER, &sever);
+        pci_read_config_dword(dev, pos_cap_err + PCI_ERR_COR_MASK, &cor_mask);
+        pci_read_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_MASK,
+                              &uncor_mask);
 
         rp_pos_cap_err = pci_find_ext_capability(rpdev, PCI_EXT_CAP_ID_ERR);
         if (!rp_pos_cap_err) {
@@ -374,6 +377,21 @@ static int aer_inject(struct aer_error_inj *einj)
         err->header_log2 = einj->header_log2;
         err->header_log3 = einj->header_log3;
 
+        if (einj->cor_status && !(einj->cor_status & ~cor_mask)) {
+                ret = -EINVAL;
+                printk(KERN_WARNING "The correctable error(s) is masked "
+                                "by device\n");
+                spin_unlock_irqrestore(&inject_lock, flags);
+                goto out_put;
+        }
+        if (einj->uncor_status && !(einj->uncor_status & ~uncor_mask)) {
+                ret = -EINVAL;
+                printk(KERN_WARNING "The uncorrectable error(s) is masked "
+                                "by device\n");
+                spin_unlock_irqrestore(&inject_lock, flags);
+                goto out_put;
+        }
+
         rperr = __find_aer_error_by_dev(rpdev);
         if (!rperr) {
                 rperr = rperr_alloc;
@@ -413,8 +431,14 @@ static int aer_inject(struct aer_error_inj *einj)
         if (ret)
                 goto out_put;
 
-        if (find_aer_device(rpdev, &edev))
+        if (find_aer_device(rpdev, &edev)) {
+                if (!get_service_data(edev)) {
+                        printk(KERN_WARNING "AER service is not initialized\n");
+                        ret = -EINVAL;
+                        goto out_put;
+                }
                 aer_irq(-1, edev);
+        }
         else
                 ret = -EINVAL;
 out_put:
@@ -484,5 +508,5 @@ static void __exit aer_inject_exit(void)
 module_init(aer_inject_init);
 module_exit(aer_inject_exit);
 
-MODULE_DESCRIPTION("PCIE AER software error injector");
+MODULE_DESCRIPTION("PCIe AER software error injector");
 MODULE_LICENSE("GPL");
diff --git a/drivers/pci/pcie/aer/aerdrv.c b/drivers/pci/pcie/aer/aerdrv.c
index 97a345927b55..21f215f4daa3 100644
--- a/drivers/pci/pcie/aer/aerdrv.c
+++ b/drivers/pci/pcie/aer/aerdrv.c
@@ -155,7 +155,7 @@ static struct aer_rpc *aer_alloc_rpc(struct pcie_device *dev)
         mutex_init(&rpc->rpc_mutex);
         init_waitqueue_head(&rpc->wait_release);
 
-        /* Use PCIE bus function to store rpc into PCIE device */
+        /* Use PCIe bus function to store rpc into PCIe device */
         set_service_data(dev, rpc);
 
         return rpc;
diff --git a/drivers/pci/pcie/aer/aerdrv_acpi.c b/drivers/pci/pcie/aer/aerdrv_acpi.c
index 8edb2f300e8f..04814087658d 100644
--- a/drivers/pci/pcie/aer/aerdrv_acpi.c
+++ b/drivers/pci/pcie/aer/aerdrv_acpi.c
@@ -24,7 +24,7 @@
  *
  * @return: Zero on success. Nonzero otherwise.
  *
- * Invoked when PCIE bus loads AER service driver. To avoid conflict with
+ * Invoked when PCIe bus loads AER service driver. To avoid conflict with
  * BIOS AER support requires BIOS to yield AER control to OS native driver.
  **/
 int aer_osc_setup(struct pcie_device *pciedev)
diff --git a/drivers/pci/pcie/aer/aerdrv_core.c b/drivers/pci/pcie/aer/aerdrv_core.c
index ae672ca80333..c843a799814d 100644
--- a/drivers/pci/pcie/aer/aerdrv_core.c
+++ b/drivers/pci/pcie/aer/aerdrv_core.c
@@ -587,7 +587,7 @@ static void handle_error_source(struct pcie_device *aerdev,
  * aer_enable_rootport - enable Root Port's interrupts when receiving messages
  * @rpc: pointer to a Root Port data structure
  *
- * Invoked when PCIE bus loads AER service driver.
+ * Invoked when PCIe bus loads AER service driver.
  */
 void aer_enable_rootport(struct aer_rpc *rpc)
 {
@@ -597,7 +597,7 @@ void aer_enable_rootport(struct aer_rpc *rpc)
         u32 reg32;
 
         pos = pci_pcie_cap(pdev);
-        /* Clear PCIE Capability's Device Status */
+        /* Clear PCIe Capability's Device Status */
         pci_read_config_word(pdev, pos+PCI_EXP_DEVSTA, &reg16);
         pci_write_config_word(pdev, pos+PCI_EXP_DEVSTA, reg16);
 
@@ -631,7 +631,7 @@ void aer_enable_rootport(struct aer_rpc *rpc)
  * disable_root_aer - disable Root Port's interrupts when receiving messages
  * @rpc: pointer to a Root Port data structure
  *
- * Invoked when PCIE bus unloads AER service driver.
+ * Invoked when PCIe bus unloads AER service driver.
  */
 static void disable_root_aer(struct aer_rpc *rpc)
 {
diff --git a/drivers/pci/pcie/aer/aerdrv_errprint.c b/drivers/pci/pcie/aer/aerdrv_errprint.c
index 44acde72294f..9d3e4c8d0184 100644
--- a/drivers/pci/pcie/aer/aerdrv_errprint.c
+++ b/drivers/pci/pcie/aer/aerdrv_errprint.c
@@ -184,7 +184,7 @@ void aer_print_error(struct pci_dev *dev, struct aer_err_info *info)
 
         if (info->status == 0) {
                 AER_PR(info, dev,
-                        "PCIE Bus Error: severity=%s, type=Unaccessible, "
+                        "PCIe Bus Error: severity=%s, type=Unaccessible, "
                         "id=%04x(Unregistered Agent ID)\n",
                         aer_error_severity_string[info->severity], id);
         } else {
@@ -194,7 +194,7 @@ void aer_print_error(struct pci_dev *dev, struct aer_err_info *info)
                 agent = AER_GET_AGENT(info->severity, info->status);
 
                 AER_PR(info, dev,
-                        "PCIE Bus Error: severity=%s, type=%s, id=%04x(%s)\n",
+                        "PCIe Bus Error: severity=%s, type=%s, id=%04x(%s)\n",
                         aer_error_severity_string[info->severity],
                         aer_error_layer[layer], id, aer_agent_string[agent]);