diff options
Diffstat (limited to 'drivers/net')
-rw-r--r-- | drivers/net/wireless/ath9k/ath9k.h | 27 | ||||
-rw-r--r-- | drivers/net/wireless/ath9k/beacon.c | 8 | ||||
-rw-r--r-- | drivers/net/wireless/ath9k/core.h | 206 | ||||
-rw-r--r-- | drivers/net/wireless/ath9k/hw.c | 118 | ||||
-rw-r--r-- | drivers/net/wireless/ath9k/main.c | 2 | ||||
-rw-r--r-- | drivers/net/wireless/ath9k/xmit.c | 29 |
6 files changed, 178 insertions, 212 deletions
diff --git a/drivers/net/wireless/ath9k/ath9k.h b/drivers/net/wireless/ath9k/ath9k.h index 71027dcdcafc..587c0fed9f8f 100644 --- a/drivers/net/wireless/ath9k/ath9k.h +++ b/drivers/net/wireless/ath9k/ath9k.h | |||
@@ -282,23 +282,6 @@ enum ath9k_tx_queue_flags { | |||
282 | TXQ_FLAG_FRAG_BURST_BACKOFF_ENABLE = 0x0080, | 282 | TXQ_FLAG_FRAG_BURST_BACKOFF_ENABLE = 0x0080, |
283 | }; | 283 | }; |
284 | 284 | ||
285 | struct ath9k_txq_info { | ||
286 | u32 tqi_ver; | ||
287 | enum ath9k_tx_queue_subtype tqi_subtype; | ||
288 | enum ath9k_tx_queue_flags tqi_qflags; | ||
289 | u32 tqi_priority; | ||
290 | u32 tqi_aifs; | ||
291 | u32 tqi_cwmin; | ||
292 | u32 tqi_cwmax; | ||
293 | u16 tqi_shretry; | ||
294 | u16 tqi_lgretry; | ||
295 | u32 tqi_cbrPeriod; | ||
296 | u32 tqi_cbrOverflowLimit; | ||
297 | u32 tqi_burstTime; | ||
298 | u32 tqi_readyTime; | ||
299 | u32 tqi_compBuf; | ||
300 | }; | ||
301 | |||
302 | #define ATH9K_TXQ_USEDEFAULT ((u32) -1) | 285 | #define ATH9K_TXQ_USEDEFAULT ((u32) -1) |
303 | 286 | ||
304 | #define ATH9K_DECOMP_MASK_SIZE 128 | 287 | #define ATH9K_DECOMP_MASK_SIZE 128 |
@@ -999,10 +982,10 @@ u32 ath9k_regd_get_ctl(struct ath_hal *ah, struct ath9k_channel *chan); | |||
999 | u32 ath9k_regd_get_antenna_allowed(struct ath_hal *ah, | 982 | u32 ath9k_regd_get_antenna_allowed(struct ath_hal *ah, |
1000 | struct ath9k_channel *chan); | 983 | struct ath9k_channel *chan); |
1001 | u32 ath9k_hw_mhz2ieee(struct ath_hal *ah, u32 freq, u32 flags); | 984 | u32 ath9k_hw_mhz2ieee(struct ath_hal *ah, u32 freq, u32 flags); |
1002 | bool ath9k_hw_gettxqueueprops(struct ath_hal *ah, int q, | 985 | bool ath9k_hw_get_txq_props(struct ath_hal *ah, int q, |
1003 | struct ath9k_txq_info *qInfo); | 986 | struct ath9k_tx_queue_info *qinfo); |
1004 | bool ath9k_hw_settxqueueprops(struct ath_hal *ah, int q, | 987 | bool ath9k_hw_set_txq_props(struct ath_hal *ah, int q, |
1005 | const struct ath9k_txq_info *qInfo); | 988 | const struct ath9k_tx_queue_info *qinfo); |
1006 | struct ath9k_channel *ath9k_regd_check_channel(struct ath_hal *ah, | 989 | struct ath9k_channel *ath9k_regd_check_channel(struct ath_hal *ah, |
1007 | const struct ath9k_channel *c); | 990 | const struct ath9k_channel *c); |
1008 | void ath9k_hw_set11n_txdesc(struct ath_hal *ah, struct ath_desc *ds, | 991 | void ath9k_hw_set11n_txdesc(struct ath_hal *ah, struct ath_desc *ds, |
@@ -1053,7 +1036,7 @@ void ath9k_hw_set11n_virtualmorefrag(struct ath_hal *ah, | |||
1053 | bool ath9k_hw_set_txpowerlimit(struct ath_hal *ah, u32 limit); | 1036 | bool ath9k_hw_set_txpowerlimit(struct ath_hal *ah, u32 limit); |
1054 | bool ath9k_regd_is_public_safety_sku(struct ath_hal *ah); | 1037 | bool ath9k_regd_is_public_safety_sku(struct ath_hal *ah); |
1055 | int ath9k_hw_setuptxqueue(struct ath_hal *ah, enum ath9k_tx_queue type, | 1038 | int ath9k_hw_setuptxqueue(struct ath_hal *ah, enum ath9k_tx_queue type, |
1056 | const struct ath9k_txq_info *qInfo); | 1039 | const struct ath9k_tx_queue_info *qinfo); |
1057 | u32 ath9k_hw_numtxpending(struct ath_hal *ah, u32 q); | 1040 | u32 ath9k_hw_numtxpending(struct ath_hal *ah, u32 q); |
1058 | const char *ath9k_hw_probe(u16 vendorid, u16 devid); | 1041 | const char *ath9k_hw_probe(u16 vendorid, u16 devid); |
1059 | bool ath9k_hw_disable(struct ath_hal *ah); | 1042 | bool ath9k_hw_disable(struct ath_hal *ah); |
diff --git a/drivers/net/wireless/ath9k/beacon.c b/drivers/net/wireless/ath9k/beacon.c index ba3dd253e963..6e6538b31a4c 100644 --- a/drivers/net/wireless/ath9k/beacon.c +++ b/drivers/net/wireless/ath9k/beacon.c | |||
@@ -30,9 +30,9 @@ | |||
30 | static int ath_beaconq_config(struct ath_softc *sc) | 30 | static int ath_beaconq_config(struct ath_softc *sc) |
31 | { | 31 | { |
32 | struct ath_hal *ah = sc->sc_ah; | 32 | struct ath_hal *ah = sc->sc_ah; |
33 | struct ath9k_txq_info qi; | 33 | struct ath9k_tx_queue_info qi; |
34 | 34 | ||
35 | ath9k_hw_gettxqueueprops(ah, sc->sc_bhalq, &qi); | 35 | ath9k_hw_get_txq_props(ah, sc->sc_bhalq, &qi); |
36 | if (sc->sc_opmode == ATH9K_M_HOSTAP) { | 36 | if (sc->sc_opmode == ATH9K_M_HOSTAP) { |
37 | /* Always burst out beacon and CAB traffic. */ | 37 | /* Always burst out beacon and CAB traffic. */ |
38 | qi.tqi_aifs = 1; | 38 | qi.tqi_aifs = 1; |
@@ -45,7 +45,7 @@ static int ath_beaconq_config(struct ath_softc *sc) | |||
45 | qi.tqi_cwmax = sc->sc_beacon_qi.tqi_cwmax; | 45 | qi.tqi_cwmax = sc->sc_beacon_qi.tqi_cwmax; |
46 | } | 46 | } |
47 | 47 | ||
48 | if (!ath9k_hw_settxqueueprops(ah, sc->sc_bhalq, &qi)) { | 48 | if (!ath9k_hw_set_txq_props(ah, sc->sc_bhalq, &qi)) { |
49 | DPRINTF(sc, ATH_DBG_FATAL, | 49 | DPRINTF(sc, ATH_DBG_FATAL, |
50 | "%s: unable to update h/w beacon queue parameters\n", | 50 | "%s: unable to update h/w beacon queue parameters\n", |
51 | __func__); | 51 | __func__); |
@@ -335,7 +335,7 @@ static void ath_beacon_start_adhoc(struct ath_softc *sc, int if_id) | |||
335 | 335 | ||
336 | int ath_beaconq_setup(struct ath_hal *ah) | 336 | int ath_beaconq_setup(struct ath_hal *ah) |
337 | { | 337 | { |
338 | struct ath9k_txq_info qi; | 338 | struct ath9k_tx_queue_info qi; |
339 | 339 | ||
340 | memzero(&qi, sizeof(qi)); | 340 | memzero(&qi, sizeof(qi)); |
341 | qi.tqi_aifs = 1; | 341 | qi.tqi_aifs = 1; |
diff --git a/drivers/net/wireless/ath9k/core.h b/drivers/net/wireless/ath9k/core.h index cf76b36d1757..903bd4624c6e 100644 --- a/drivers/net/wireless/ath9k/core.h +++ b/drivers/net/wireless/ath9k/core.h | |||
@@ -568,7 +568,8 @@ void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq); | |||
568 | int ath_tx_init(struct ath_softc *sc, int nbufs); | 568 | int ath_tx_init(struct ath_softc *sc, int nbufs); |
569 | int ath_tx_cleanup(struct ath_softc *sc); | 569 | int ath_tx_cleanup(struct ath_softc *sc); |
570 | int ath_tx_get_qnum(struct ath_softc *sc, int qtype, int haltype); | 570 | int ath_tx_get_qnum(struct ath_softc *sc, int qtype, int haltype); |
571 | int ath_txq_update(struct ath_softc *sc, int qnum, struct ath9k_txq_info *q); | 571 | int ath_txq_update(struct ath_softc *sc, int qnum, |
572 | struct ath9k_tx_queue_info *q); | ||
572 | int ath_tx_start(struct ath_softc *sc, struct sk_buff *skb); | 573 | int ath_tx_start(struct ath_softc *sc, struct sk_buff *skb); |
573 | void ath_tx_tasklet(struct ath_softc *sc); | 574 | void ath_tx_tasklet(struct ath_softc *sc); |
574 | u32 ath_txq_depth(struct ath_softc *sc, int qnum); | 575 | u32 ath_txq_depth(struct ath_softc *sc, int qnum); |
@@ -922,132 +923,123 @@ struct ath_ht_info { | |||
922 | }; | 923 | }; |
923 | 924 | ||
924 | struct ath_softc { | 925 | struct ath_softc { |
925 | struct ieee80211_hw *hw; /* mac80211 instance */ | 926 | struct ieee80211_hw *hw; |
926 | struct pci_dev *pdev; /* Bus handle */ | 927 | struct pci_dev *pdev; |
927 | void __iomem *mem; /* address of the device */ | 928 | void __iomem *mem; |
928 | struct tasklet_struct intr_tq; /* General tasklet */ | 929 | struct tasklet_struct intr_tq; |
929 | struct tasklet_struct bcon_tasklet; /* Beacon tasklet */ | 930 | struct tasklet_struct bcon_tasklet; |
930 | struct ath_config sc_config; /* per-instance load-time | 931 | struct ath_config sc_config; /* load-time parameters */ |
931 | parameters */ | 932 | int sc_debug; |
932 | int sc_debug; /* Debug masks */ | 933 | struct ath_hal *sc_ah; |
933 | struct ath_hal *sc_ah; /* HAL Instance */ | 934 | struct ath_rate_softc *sc_rc; /* tx rate control support */ |
934 | struct ath_rate_softc *sc_rc; /* tx rate control support */ | 935 | u32 sc_intrstatus; |
935 | u32 sc_intrstatus; /* HAL_STATUS */ | 936 | enum ath9k_opmode sc_opmode; /* current operating mode */ |
936 | enum ath9k_opmode sc_opmode; /* current operating mode */ | 937 | |
937 | 938 | u8 sc_invalid; /* being detached */ | |
938 | /* Properties, Config */ | 939 | u8 sc_beacons; /* beacons running */ |
939 | u8 sc_invalid; /* being detached */ | 940 | u8 sc_scanning; /* scanning active */ |
940 | u8 sc_beacons; /* beacons running */ | 941 | u8 sc_txaggr; /* enable 11n tx aggregation */ |
941 | u8 sc_scanning; /* scanning active */ | 942 | u8 sc_rxaggr; /* enable 11n rx aggregation */ |
942 | u8 sc_txaggr; /* enable 11n tx aggregation */ | 943 | u8 sc_update_chainmask; /* change chain mask */ |
943 | u8 sc_rxaggr; /* enable 11n rx aggregation */ | 944 | u8 sc_full_reset; /* force full reset */ |
944 | u8 sc_update_chainmask; /* change chain mask */ | 945 | enum wireless_mode sc_curmode; /* current phy mode */ |
945 | u8 sc_full_reset; /* force full reset */ | 946 | u16 sc_curtxpow; |
946 | enum wireless_mode sc_curmode; /* current phy mode */ | 947 | u16 sc_curaid; |
947 | u16 sc_curtxpow; /* current tx power limit */ | 948 | u8 sc_curbssid[ETH_ALEN]; |
948 | u16 sc_curaid; /* current association id */ | 949 | u8 sc_myaddr[ETH_ALEN]; |
949 | u8 sc_curbssid[ETH_ALEN]; | 950 | enum PROT_MODE sc_protmode; |
950 | u8 sc_myaddr[ETH_ALEN]; | 951 | u8 sc_mcastantenna; |
951 | enum PROT_MODE sc_protmode; /* protection mode */ | 952 | u8 sc_txantenna; /* data tx antenna (fixed or auto) */ |
952 | u8 sc_mcastantenna;/* Multicast antenna number */ | 953 | u8 sc_nbcnvaps; /* # of vaps sending beacons */ |
953 | u8 sc_txantenna; /* data tx antenna | 954 | u16 sc_nvaps; /* # of active virtual ap's */ |
954 | (fixed or auto) */ | 955 | struct ath_vap *sc_vaps[ATH_BCBUF]; |
955 | u8 sc_nbcnvaps; /* # of vaps sending beacons */ | 956 | enum ath9k_int sc_imask; |
956 | u16 sc_nvaps; /* # of active virtual ap's */ | 957 | u8 sc_bssidmask[ETH_ALEN]; |
957 | struct ath_vap *sc_vaps[ATH_BCBUF]; /* interface id | 958 | u8 sc_defant; /* current default antenna */ |
958 | to avp map */ | 959 | u8 sc_rxotherant; /* rx's on non-default antenna */ |
959 | enum ath9k_int sc_imask; /* interrupt mask copy */ | 960 | u16 sc_cachelsz; |
960 | u8 sc_bssidmask[ETH_ALEN]; | 961 | int sc_slotupdate; /* slot to next advance fsm */ |
961 | u8 sc_defant; /* current default antenna */ | 962 | int sc_slottime; |
962 | u8 sc_rxotherant; /* rx's on non-default antenna*/ | 963 | u8 sc_noreset; |
963 | u16 sc_cachelsz; /* cache line size */ | 964 | int sc_bslot[ATH_BCBUF]; |
964 | int sc_slotupdate; /* slot to next advance fsm */ | 965 | struct ath9k_node_stats sc_halstats; /* station-mode rssi stats */ |
965 | int sc_slottime; /* slot time */ | 966 | struct list_head node_list; |
966 | u8 sc_noreset; | 967 | struct ath_ht_info sc_ht_info; |
967 | int sc_bslot[ATH_BCBUF];/* beacon xmit slots */ | 968 | int16_t sc_noise_floor; /* signal noise floor in dBm */ |
968 | struct ath9k_node_stats sc_halstats; /* station-mode rssi stats */ | 969 | enum ath9k_ht_extprotspacing sc_ht_extprotspacing; |
969 | struct list_head node_list; | 970 | u8 sc_tx_chainmask; |
970 | struct ath_ht_info sc_ht_info; | 971 | u8 sc_rx_chainmask; |
971 | int16_t sc_noise_floor; /* signal noise floor in dBm */ | 972 | u8 sc_rxchaindetect_ref; |
972 | enum ath9k_ht_extprotspacing sc_ht_extprotspacing; | 973 | u8 sc_rxchaindetect_thresh5GHz; |
973 | u8 sc_tx_chainmask; | 974 | u8 sc_rxchaindetect_thresh2GHz; |
974 | u8 sc_rx_chainmask; | 975 | u8 sc_rxchaindetect_delta5GHz; |
975 | u8 sc_rxchaindetect_ref; | 976 | u8 sc_rxchaindetect_delta2GHz; |
976 | u8 sc_rxchaindetect_thresh5GHz; | 977 | u32 sc_rtsaggrlimit; /* Chipset specific aggr limit */ |
977 | u8 sc_rxchaindetect_thresh2GHz; | 978 | u32 sc_flags; |
978 | u8 sc_rxchaindetect_delta5GHz; | ||
979 | u8 sc_rxchaindetect_delta2GHz; | ||
980 | u32 sc_rtsaggrlimit; /* Chipset specific | ||
981 | aggr limit */ | ||
982 | u32 sc_flags; | ||
983 | #ifdef CONFIG_SLOW_ANT_DIV | 979 | #ifdef CONFIG_SLOW_ANT_DIV |
984 | /* Slow antenna diversity */ | 980 | struct ath_antdiv sc_antdiv; |
985 | struct ath_antdiv sc_antdiv; | ||
986 | #endif | 981 | #endif |
987 | enum { | 982 | enum { |
988 | OK, /* no change needed */ | 983 | OK, /* no change needed */ |
989 | UPDATE, /* update pending */ | 984 | UPDATE, /* update pending */ |
990 | COMMIT /* beacon sent, commit change */ | 985 | COMMIT /* beacon sent, commit change */ |
991 | } sc_updateslot; /* slot time update fsm */ | 986 | } sc_updateslot; /* slot time update fsm */ |
992 | 987 | ||
993 | /* Crypto */ | 988 | /* Crypto */ |
994 | u32 sc_keymax; /* size of key cache */ | 989 | u32 sc_keymax; /* size of key cache */ |
995 | DECLARE_BITMAP(sc_keymap, ATH_KEYMAX); /* key use bit map */ | 990 | DECLARE_BITMAP(sc_keymap, ATH_KEYMAX); /* key use bit map */ |
996 | u8 sc_splitmic; /* split TKIP MIC keys */ | 991 | u8 sc_splitmic; /* split TKIP MIC keys */ |
997 | int sc_keytype; /* type of the key being used */ | 992 | int sc_keytype; |
998 | 993 | ||
999 | /* RX */ | 994 | /* RX */ |
1000 | struct list_head sc_rxbuf; /* receive buffer */ | 995 | struct list_head sc_rxbuf; |
1001 | struct ath_descdma sc_rxdma; /* RX descriptors */ | 996 | struct ath_descdma sc_rxdma; |
1002 | int sc_rxbufsize; /* rx size based on mtu */ | 997 | int sc_rxbufsize; /* rx size based on mtu */ |
1003 | u32 *sc_rxlink; /* link ptr in last RX desc */ | 998 | u32 *sc_rxlink; /* link ptr in last RX desc */ |
1004 | u32 sc_rxflush; /* rx flush in progress */ | 999 | u32 sc_rxflush; /* rx flush in progress */ |
1005 | u64 sc_lastrx; /* tsf of last rx'd frame */ | 1000 | u64 sc_lastrx; /* tsf of last rx'd frame */ |
1006 | 1001 | ||
1007 | /* TX */ | 1002 | /* TX */ |
1008 | struct list_head sc_txbuf; /* transmit buffer */ | 1003 | struct list_head sc_txbuf; |
1009 | struct ath_txq sc_txq[ATH9K_NUM_TX_QUEUES]; | 1004 | struct ath_txq sc_txq[ATH9K_NUM_TX_QUEUES]; |
1010 | struct ath_descdma sc_txdma; /* TX descriptors */ | 1005 | struct ath_descdma sc_txdma; |
1011 | u32 sc_txqsetup; /* h/w queues setup */ | 1006 | u32 sc_txqsetup; |
1012 | u32 sc_txintrperiod;/* tx interrupt batching */ | 1007 | u32 sc_txintrperiod; /* tx interrupt batching */ |
1013 | int sc_haltype2q[ATH9K_WME_AC_VO+1]; /* HAL WME | 1008 | int sc_haltype2q[ATH9K_WME_AC_VO+1]; /* HAL WME AC -> h/w qnum */ |
1014 | AC -> h/w qnum */ | 1009 | u32 sc_ant_tx[8]; /* recent tx frames/antenna */ |
1015 | u32 sc_ant_tx[8]; /* recent tx frames/antenna */ | ||
1016 | 1010 | ||
1017 | /* Beacon */ | 1011 | /* Beacon */ |
1018 | struct ath9k_txq_info sc_beacon_qi; /* adhoc only: beacon | 1012 | struct ath9k_tx_queue_info sc_beacon_qi; |
1019 | queue parameters */ | 1013 | struct ath_descdma sc_bdma; |
1020 | struct ath_descdma sc_bdma; /* beacon descriptors */ | 1014 | struct ath_txq *sc_cabq; |
1021 | struct ath_txq *sc_cabq; /* tx q for cab frames */ | 1015 | struct list_head sc_bbuf; |
1022 | struct list_head sc_bbuf; /* beacon buffers */ | 1016 | u32 sc_bhalq; |
1023 | u32 sc_bhalq; /* HAL q for outgoing beacons */ | 1017 | u32 sc_bmisscount; |
1024 | u32 sc_bmisscount; /* missed beacon transmits */ | 1018 | u32 ast_be_xmit; /* beacons transmitted */ |
1025 | u32 ast_be_xmit; /* beacons transmitted */ | ||
1026 | 1019 | ||
1027 | /* Rate */ | 1020 | /* Rate */ |
1028 | struct ieee80211_rate rates[IEEE80211_NUM_BANDS][ATH_RATE_MAX]; | 1021 | struct ieee80211_rate rates[IEEE80211_NUM_BANDS][ATH_RATE_MAX]; |
1029 | const struct ath9k_rate_table *sc_rates[WIRELESS_MODE_MAX]; | 1022 | const struct ath9k_rate_table *sc_rates[WIRELESS_MODE_MAX]; |
1030 | const struct ath9k_rate_table *sc_currates; /* current rate table */ | 1023 | const struct ath9k_rate_table *sc_currates; |
1031 | u8 sc_rixmap[256]; /* IEEE to h/w | 1024 | u8 sc_rixmap[256]; /* IEEE to h/w rate table ix */ |
1032 | rate table ix */ | 1025 | u8 sc_minrateix; /* min h/w rate index */ |
1033 | u8 sc_minrateix; /* min h/w rate index */ | 1026 | u8 sc_protrix; /* protection rate index */ |
1034 | u8 sc_protrix; /* protection rate index */ | ||
1035 | struct { | 1027 | struct { |
1036 | u32 rateKbps; /* transfer rate in kbs */ | 1028 | u32 rateKbps; /* transfer rate in kbs */ |
1037 | u8 ieeerate; /* IEEE rate */ | 1029 | u8 ieeerate; /* IEEE rate */ |
1038 | } sc_hwmap[256]; /* h/w rate ix mappings */ | 1030 | } sc_hwmap[256]; /* h/w rate ix mappings */ |
1039 | 1031 | ||
1040 | /* Channel, Band */ | 1032 | /* Channel, Band */ |
1041 | struct ieee80211_channel channels[IEEE80211_NUM_BANDS][ATH_CHAN_MAX]; | 1033 | struct ieee80211_channel channels[IEEE80211_NUM_BANDS][ATH_CHAN_MAX]; |
1042 | struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS]; | 1034 | struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS]; |
1043 | struct ath9k_channel sc_curchan; /* current h/w channel */ | 1035 | struct ath9k_channel sc_curchan; |
1044 | 1036 | ||
1045 | /* Locks */ | 1037 | /* Locks */ |
1046 | spinlock_t sc_rxflushlock; /* lock of RX flush */ | 1038 | spinlock_t sc_rxflushlock; |
1047 | spinlock_t sc_rxbuflock; /* rxbuf lock */ | 1039 | spinlock_t sc_rxbuflock; |
1048 | spinlock_t sc_txbuflock; /* txbuf lock */ | 1040 | spinlock_t sc_txbuflock; |
1049 | spinlock_t sc_resetlock; | 1041 | spinlock_t sc_resetlock; |
1050 | spinlock_t node_lock; | 1042 | spinlock_t node_lock; |
1051 | }; | 1043 | }; |
1052 | 1044 | ||
1053 | int ath_init(u16 devid, struct ath_softc *sc); | 1045 | int ath_init(u16 devid, struct ath_softc *sc); |
diff --git a/drivers/net/wireless/ath9k/hw.c b/drivers/net/wireless/ath9k/hw.c index 0dd11ee3b314..bc5def9edd36 100644 --- a/drivers/net/wireless/ath9k/hw.c +++ b/drivers/net/wireless/ath9k/hw.c | |||
@@ -7394,12 +7394,21 @@ ath9k_hw_updatetxtriglevel(struct ath_hal *ah, bool bIncTrigLevel) | |||
7394 | return newLevel != curLevel; | 7394 | return newLevel != curLevel; |
7395 | } | 7395 | } |
7396 | 7396 | ||
7397 | static bool ath9k_hw_set_txq_props(struct ath_hal *ah, | 7397 | bool ath9k_hw_set_txq_props(struct ath_hal *ah, int q, |
7398 | struct ath9k_tx_queue_info *qi, | 7398 | const struct ath9k_tx_queue_info *qinfo) |
7399 | const struct ath9k_txq_info *qInfo) | ||
7400 | { | 7399 | { |
7401 | u32 cw; | 7400 | u32 cw; |
7401 | struct ath_hal_5416 *ahp = AH5416(ah); | ||
7402 | struct ath9k_hw_capabilities *pCap = &ah->ah_caps; | ||
7403 | struct ath9k_tx_queue_info *qi; | ||
7402 | 7404 | ||
7405 | if (q >= pCap->total_queues) { | ||
7406 | DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: invalid queue num %u\n", | ||
7407 | __func__, q); | ||
7408 | return false; | ||
7409 | } | ||
7410 | |||
7411 | qi = &ahp->ah_txq[q]; | ||
7403 | if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) { | 7412 | if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) { |
7404 | DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: inactive queue\n", | 7413 | DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: inactive queue\n", |
7405 | __func__); | 7414 | __func__); |
@@ -7408,43 +7417,43 @@ static bool ath9k_hw_set_txq_props(struct ath_hal *ah, | |||
7408 | 7417 | ||
7409 | DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: queue %p\n", __func__, qi); | 7418 | DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: queue %p\n", __func__, qi); |
7410 | 7419 | ||
7411 | qi->tqi_ver = qInfo->tqi_ver; | 7420 | qi->tqi_ver = qinfo->tqi_ver; |
7412 | qi->tqi_subtype = qInfo->tqi_subtype; | 7421 | qi->tqi_subtype = qinfo->tqi_subtype; |
7413 | qi->tqi_qflags = qInfo->tqi_qflags; | 7422 | qi->tqi_qflags = qinfo->tqi_qflags; |
7414 | qi->tqi_priority = qInfo->tqi_priority; | 7423 | qi->tqi_priority = qinfo->tqi_priority; |
7415 | if (qInfo->tqi_aifs != ATH9K_TXQ_USEDEFAULT) | 7424 | if (qinfo->tqi_aifs != ATH9K_TXQ_USEDEFAULT) |
7416 | qi->tqi_aifs = min(qInfo->tqi_aifs, 255U); | 7425 | qi->tqi_aifs = min(qinfo->tqi_aifs, 255U); |
7417 | else | 7426 | else |
7418 | qi->tqi_aifs = INIT_AIFS; | 7427 | qi->tqi_aifs = INIT_AIFS; |
7419 | if (qInfo->tqi_cwmin != ATH9K_TXQ_USEDEFAULT) { | 7428 | if (qinfo->tqi_cwmin != ATH9K_TXQ_USEDEFAULT) { |
7420 | cw = min(qInfo->tqi_cwmin, 1024U); | 7429 | cw = min(qinfo->tqi_cwmin, 1024U); |
7421 | qi->tqi_cwmin = 1; | 7430 | qi->tqi_cwmin = 1; |
7422 | while (qi->tqi_cwmin < cw) | 7431 | while (qi->tqi_cwmin < cw) |
7423 | qi->tqi_cwmin = (qi->tqi_cwmin << 1) | 1; | 7432 | qi->tqi_cwmin = (qi->tqi_cwmin << 1) | 1; |
7424 | } else | 7433 | } else |
7425 | qi->tqi_cwmin = qInfo->tqi_cwmin; | 7434 | qi->tqi_cwmin = qinfo->tqi_cwmin; |
7426 | if (qInfo->tqi_cwmax != ATH9K_TXQ_USEDEFAULT) { | 7435 | if (qinfo->tqi_cwmax != ATH9K_TXQ_USEDEFAULT) { |
7427 | cw = min(qInfo->tqi_cwmax, 1024U); | 7436 | cw = min(qinfo->tqi_cwmax, 1024U); |
7428 | qi->tqi_cwmax = 1; | 7437 | qi->tqi_cwmax = 1; |
7429 | while (qi->tqi_cwmax < cw) | 7438 | while (qi->tqi_cwmax < cw) |
7430 | qi->tqi_cwmax = (qi->tqi_cwmax << 1) | 1; | 7439 | qi->tqi_cwmax = (qi->tqi_cwmax << 1) | 1; |
7431 | } else | 7440 | } else |
7432 | qi->tqi_cwmax = INIT_CWMAX; | 7441 | qi->tqi_cwmax = INIT_CWMAX; |
7433 | 7442 | ||
7434 | if (qInfo->tqi_shretry != 0) | 7443 | if (qinfo->tqi_shretry != 0) |
7435 | qi->tqi_shretry = min((u32) qInfo->tqi_shretry, 15U); | 7444 | qi->tqi_shretry = min((u32) qinfo->tqi_shretry, 15U); |
7436 | else | 7445 | else |
7437 | qi->tqi_shretry = INIT_SH_RETRY; | 7446 | qi->tqi_shretry = INIT_SH_RETRY; |
7438 | if (qInfo->tqi_lgretry != 0) | 7447 | if (qinfo->tqi_lgretry != 0) |
7439 | qi->tqi_lgretry = min((u32) qInfo->tqi_lgretry, 15U); | 7448 | qi->tqi_lgretry = min((u32) qinfo->tqi_lgretry, 15U); |
7440 | else | 7449 | else |
7441 | qi->tqi_lgretry = INIT_LG_RETRY; | 7450 | qi->tqi_lgretry = INIT_LG_RETRY; |
7442 | qi->tqi_cbrPeriod = qInfo->tqi_cbrPeriod; | 7451 | qi->tqi_cbrPeriod = qinfo->tqi_cbrPeriod; |
7443 | qi->tqi_cbrOverflowLimit = qInfo->tqi_cbrOverflowLimit; | 7452 | qi->tqi_cbrOverflowLimit = qinfo->tqi_cbrOverflowLimit; |
7444 | qi->tqi_burstTime = qInfo->tqi_burstTime; | 7453 | qi->tqi_burstTime = qinfo->tqi_burstTime; |
7445 | qi->tqi_readyTime = qInfo->tqi_readyTime; | 7454 | qi->tqi_readyTime = qinfo->tqi_readyTime; |
7446 | 7455 | ||
7447 | switch (qInfo->tqi_subtype) { | 7456 | switch (qinfo->tqi_subtype) { |
7448 | case ATH9K_WME_UPSD: | 7457 | case ATH9K_WME_UPSD: |
7449 | if (qi->tqi_type == ATH9K_TX_QUEUE_DATA) | 7458 | if (qi->tqi_type == ATH9K_TX_QUEUE_DATA) |
7450 | qi->tqi_intFlags = ATH9K_TXQ_USE_LOCKOUT_BKOFF_DIS; | 7459 | qi->tqi_intFlags = ATH9K_TXQ_USE_LOCKOUT_BKOFF_DIS; |
@@ -7455,66 +7464,47 @@ static bool ath9k_hw_set_txq_props(struct ath_hal *ah, | |||
7455 | return true; | 7464 | return true; |
7456 | } | 7465 | } |
7457 | 7466 | ||
7458 | bool ath9k_hw_settxqueueprops(struct ath_hal *ah, int q, | 7467 | bool ath9k_hw_get_txq_props(struct ath_hal *ah, int q, |
7459 | const struct ath9k_txq_info *qInfo) | 7468 | struct ath9k_tx_queue_info *qinfo) |
7460 | { | 7469 | { |
7461 | struct ath_hal_5416 *ahp = AH5416(ah); | 7470 | struct ath_hal_5416 *ahp = AH5416(ah); |
7462 | struct ath9k_hw_capabilities *pCap = &ah->ah_caps; | 7471 | struct ath9k_hw_capabilities *pCap = &ah->ah_caps; |
7472 | struct ath9k_tx_queue_info *qi; | ||
7463 | 7473 | ||
7464 | if (q >= pCap->total_queues) { | 7474 | if (q >= pCap->total_queues) { |
7465 | DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: invalid queue num %u\n", | 7475 | DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: invalid queue num %u\n", |
7466 | __func__, q); | 7476 | __func__, q); |
7467 | return false; | 7477 | return false; |
7468 | } | 7478 | } |
7469 | return ath9k_hw_set_txq_props(ah, &ahp->ah_txq[q], qInfo); | ||
7470 | } | ||
7471 | 7479 | ||
7472 | static bool ath9k_hw_get_txq_props(struct ath_hal *ah, | 7480 | qi = &ahp->ah_txq[q]; |
7473 | struct ath9k_txq_info *qInfo, | ||
7474 | const struct ath9k_tx_queue_info *qi) | ||
7475 | { | ||
7476 | if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) { | 7481 | if (qi->tqi_type == ATH9K_TX_QUEUE_INACTIVE) { |
7477 | DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: inactive queue\n", | 7482 | DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: inactive queue\n", |
7478 | __func__); | 7483 | __func__); |
7479 | return false; | 7484 | return false; |
7480 | } | 7485 | } |
7481 | 7486 | ||
7482 | qInfo->tqi_qflags = qi->tqi_qflags; | 7487 | qinfo->tqi_qflags = qi->tqi_qflags; |
7483 | qInfo->tqi_ver = qi->tqi_ver; | 7488 | qinfo->tqi_ver = qi->tqi_ver; |
7484 | qInfo->tqi_subtype = qi->tqi_subtype; | 7489 | qinfo->tqi_subtype = qi->tqi_subtype; |
7485 | qInfo->tqi_qflags = qi->tqi_qflags; | 7490 | qinfo->tqi_qflags = qi->tqi_qflags; |
7486 | qInfo->tqi_priority = qi->tqi_priority; | 7491 | qinfo->tqi_priority = qi->tqi_priority; |
7487 | qInfo->tqi_aifs = qi->tqi_aifs; | 7492 | qinfo->tqi_aifs = qi->tqi_aifs; |
7488 | qInfo->tqi_cwmin = qi->tqi_cwmin; | 7493 | qinfo->tqi_cwmin = qi->tqi_cwmin; |
7489 | qInfo->tqi_cwmax = qi->tqi_cwmax; | 7494 | qinfo->tqi_cwmax = qi->tqi_cwmax; |
7490 | qInfo->tqi_shretry = qi->tqi_shretry; | 7495 | qinfo->tqi_shretry = qi->tqi_shretry; |
7491 | qInfo->tqi_lgretry = qi->tqi_lgretry; | 7496 | qinfo->tqi_lgretry = qi->tqi_lgretry; |
7492 | qInfo->tqi_cbrPeriod = qi->tqi_cbrPeriod; | 7497 | qinfo->tqi_cbrPeriod = qi->tqi_cbrPeriod; |
7493 | qInfo->tqi_cbrOverflowLimit = qi->tqi_cbrOverflowLimit; | 7498 | qinfo->tqi_cbrOverflowLimit = qi->tqi_cbrOverflowLimit; |
7494 | qInfo->tqi_burstTime = qi->tqi_burstTime; | 7499 | qinfo->tqi_burstTime = qi->tqi_burstTime; |
7495 | qInfo->tqi_readyTime = qi->tqi_readyTime; | 7500 | qinfo->tqi_readyTime = qi->tqi_readyTime; |
7496 | 7501 | ||
7497 | return true; | 7502 | return true; |
7498 | } | 7503 | } |
7499 | 7504 | ||
7500 | bool | ||
7501 | ath9k_hw_gettxqueueprops(struct ath_hal *ah, int q, | ||
7502 | struct ath9k_txq_info *qInfo) | ||
7503 | { | ||
7504 | struct ath_hal_5416 *ahp = AH5416(ah); | ||
7505 | struct ath9k_hw_capabilities *pCap = &ah->ah_caps; | ||
7506 | |||
7507 | if (q >= pCap->total_queues) { | ||
7508 | DPRINTF(ah->ah_sc, ATH_DBG_QUEUE, "%s: invalid queue num %u\n", | ||
7509 | __func__, q); | ||
7510 | return false; | ||
7511 | } | ||
7512 | return ath9k_hw_get_txq_props(ah, qInfo, &ahp->ah_txq[q]); | ||
7513 | } | ||
7514 | |||
7515 | int | 7505 | int |
7516 | ath9k_hw_setuptxqueue(struct ath_hal *ah, enum ath9k_tx_queue type, | 7506 | ath9k_hw_setuptxqueue(struct ath_hal *ah, enum ath9k_tx_queue type, |
7517 | const struct ath9k_txq_info *qInfo) | 7507 | const struct ath9k_tx_queue_info *qinfo) |
7518 | { | 7508 | { |
7519 | struct ath_hal_5416 *ahp = AH5416(ah); | 7509 | struct ath_hal_5416 *ahp = AH5416(ah); |
7520 | struct ath9k_tx_queue_info *qi; | 7510 | struct ath9k_tx_queue_info *qi; |
@@ -7561,7 +7551,7 @@ ath9k_hw_setuptxqueue(struct ath_hal *ah, enum ath9k_tx_queue type, | |||
7561 | } | 7551 | } |
7562 | memset(qi, 0, sizeof(struct ath9k_tx_queue_info)); | 7552 | memset(qi, 0, sizeof(struct ath9k_tx_queue_info)); |
7563 | qi->tqi_type = type; | 7553 | qi->tqi_type = type; |
7564 | if (qInfo == NULL) { | 7554 | if (qinfo == NULL) { |
7565 | qi->tqi_qflags = | 7555 | qi->tqi_qflags = |
7566 | TXQ_FLAG_TXOKINT_ENABLE | 7556 | TXQ_FLAG_TXOKINT_ENABLE |
7567 | | TXQ_FLAG_TXERRINT_ENABLE | 7557 | | TXQ_FLAG_TXERRINT_ENABLE |
@@ -7573,8 +7563,8 @@ ath9k_hw_setuptxqueue(struct ath_hal *ah, enum ath9k_tx_queue type, | |||
7573 | qi->tqi_lgretry = INIT_LG_RETRY; | 7563 | qi->tqi_lgretry = INIT_LG_RETRY; |
7574 | qi->tqi_physCompBuf = 0; | 7564 | qi->tqi_physCompBuf = 0; |
7575 | } else { | 7565 | } else { |
7576 | qi->tqi_physCompBuf = qInfo->tqi_compBuf; | 7566 | qi->tqi_physCompBuf = qinfo->tqi_physCompBuf; |
7577 | (void) ath9k_hw_settxqueueprops(ah, q, qInfo); | 7567 | (void) ath9k_hw_set_txq_props(ah, q, qinfo); |
7578 | } | 7568 | } |
7579 | 7569 | ||
7580 | return q; | 7570 | return q; |
diff --git a/drivers/net/wireless/ath9k/main.c b/drivers/net/wireless/ath9k/main.c index 01bee5ec7233..4cf0d26d1392 100644 --- a/drivers/net/wireless/ath9k/main.c +++ b/drivers/net/wireless/ath9k/main.c | |||
@@ -700,7 +700,7 @@ static int ath9k_conf_tx(struct ieee80211_hw *hw, | |||
700 | const struct ieee80211_tx_queue_params *params) | 700 | const struct ieee80211_tx_queue_params *params) |
701 | { | 701 | { |
702 | struct ath_softc *sc = hw->priv; | 702 | struct ath_softc *sc = hw->priv; |
703 | struct ath9k_txq_info qi; | 703 | struct ath9k_tx_queue_info qi; |
704 | int ret = 0, qnum; | 704 | int ret = 0, qnum; |
705 | 705 | ||
706 | if (queue >= WME_NUM_AC) | 706 | if (queue >= WME_NUM_AC) |
diff --git a/drivers/net/wireless/ath9k/xmit.c b/drivers/net/wireless/ath9k/xmit.c index 92bb3c22e7c2..debd7f46d44a 100644 --- a/drivers/net/wireless/ath9k/xmit.c +++ b/drivers/net/wireless/ath9k/xmit.c | |||
@@ -2209,7 +2209,7 @@ int ath_tx_cleanup(struct ath_softc *sc) | |||
2209 | struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype) | 2209 | struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype) |
2210 | { | 2210 | { |
2211 | struct ath_hal *ah = sc->sc_ah; | 2211 | struct ath_hal *ah = sc->sc_ah; |
2212 | struct ath9k_txq_info qi; | 2212 | struct ath9k_tx_queue_info qi; |
2213 | int qnum; | 2213 | int qnum; |
2214 | 2214 | ||
2215 | memzero(&qi, sizeof(qi)); | 2215 | memzero(&qi, sizeof(qi)); |
@@ -2217,7 +2217,7 @@ struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype) | |||
2217 | qi.tqi_aifs = ATH9K_TXQ_USEDEFAULT; | 2217 | qi.tqi_aifs = ATH9K_TXQ_USEDEFAULT; |
2218 | qi.tqi_cwmin = ATH9K_TXQ_USEDEFAULT; | 2218 | qi.tqi_cwmin = ATH9K_TXQ_USEDEFAULT; |
2219 | qi.tqi_cwmax = ATH9K_TXQ_USEDEFAULT; | 2219 | qi.tqi_cwmax = ATH9K_TXQ_USEDEFAULT; |
2220 | qi.tqi_compBuf = 0; | 2220 | qi.tqi_physCompBuf = 0; |
2221 | 2221 | ||
2222 | /* | 2222 | /* |
2223 | * Enable interrupts only for EOL and DESC conditions. | 2223 | * Enable interrupts only for EOL and DESC conditions. |
@@ -2337,11 +2337,12 @@ int ath_tx_get_qnum(struct ath_softc *sc, int qtype, int haltype) | |||
2337 | 2337 | ||
2338 | /* Update parameters for a transmit queue */ | 2338 | /* Update parameters for a transmit queue */ |
2339 | 2339 | ||
2340 | int ath_txq_update(struct ath_softc *sc, int qnum, struct ath9k_txq_info *qi0) | 2340 | int ath_txq_update(struct ath_softc *sc, int qnum, |
2341 | struct ath9k_tx_queue_info *qinfo) | ||
2341 | { | 2342 | { |
2342 | struct ath_hal *ah = sc->sc_ah; | 2343 | struct ath_hal *ah = sc->sc_ah; |
2343 | int error = 0; | 2344 | int error = 0; |
2344 | struct ath9k_txq_info qi; | 2345 | struct ath9k_tx_queue_info qi; |
2345 | 2346 | ||
2346 | if (qnum == sc->sc_bhalq) { | 2347 | if (qnum == sc->sc_bhalq) { |
2347 | /* | 2348 | /* |
@@ -2349,20 +2350,20 @@ int ath_txq_update(struct ath_softc *sc, int qnum, struct ath9k_txq_info *qi0) | |||
2349 | * It will be picked up by ath_beaconq_config when | 2350 | * It will be picked up by ath_beaconq_config when |
2350 | * it's necessary. | 2351 | * it's necessary. |
2351 | */ | 2352 | */ |
2352 | sc->sc_beacon_qi = *qi0; | 2353 | sc->sc_beacon_qi = *qinfo; |
2353 | return 0; | 2354 | return 0; |
2354 | } | 2355 | } |
2355 | 2356 | ||
2356 | ASSERT(sc->sc_txq[qnum].axq_qnum == qnum); | 2357 | ASSERT(sc->sc_txq[qnum].axq_qnum == qnum); |
2357 | 2358 | ||
2358 | ath9k_hw_gettxqueueprops(ah, qnum, &qi); | 2359 | ath9k_hw_get_txq_props(ah, qnum, &qi); |
2359 | qi.tqi_aifs = qi0->tqi_aifs; | 2360 | qi.tqi_aifs = qinfo->tqi_aifs; |
2360 | qi.tqi_cwmin = qi0->tqi_cwmin; | 2361 | qi.tqi_cwmin = qinfo->tqi_cwmin; |
2361 | qi.tqi_cwmax = qi0->tqi_cwmax; | 2362 | qi.tqi_cwmax = qinfo->tqi_cwmax; |
2362 | qi.tqi_burstTime = qi0->tqi_burstTime; | 2363 | qi.tqi_burstTime = qinfo->tqi_burstTime; |
2363 | qi.tqi_readyTime = qi0->tqi_readyTime; | 2364 | qi.tqi_readyTime = qinfo->tqi_readyTime; |
2364 | 2365 | ||
2365 | if (!ath9k_hw_settxqueueprops(ah, qnum, &qi)) { | 2366 | if (!ath9k_hw_set_txq_props(ah, qnum, &qi)) { |
2366 | DPRINTF(sc, ATH_DBG_FATAL, | 2367 | DPRINTF(sc, ATH_DBG_FATAL, |
2367 | "%s: unable to update hardware queue %u!\n", | 2368 | "%s: unable to update hardware queue %u!\n", |
2368 | __func__, qnum); | 2369 | __func__, qnum); |
@@ -2376,11 +2377,11 @@ int ath_txq_update(struct ath_softc *sc, int qnum, struct ath9k_txq_info *qi0) | |||
2376 | 2377 | ||
2377 | int ath_cabq_update(struct ath_softc *sc) | 2378 | int ath_cabq_update(struct ath_softc *sc) |
2378 | { | 2379 | { |
2379 | struct ath9k_txq_info qi; | 2380 | struct ath9k_tx_queue_info qi; |
2380 | int qnum = sc->sc_cabq->axq_qnum; | 2381 | int qnum = sc->sc_cabq->axq_qnum; |
2381 | struct ath_beacon_config conf; | 2382 | struct ath_beacon_config conf; |
2382 | 2383 | ||
2383 | ath9k_hw_gettxqueueprops(sc->sc_ah, qnum, &qi); | 2384 | ath9k_hw_get_txq_props(sc->sc_ah, qnum, &qi); |
2384 | /* | 2385 | /* |
2385 | * Ensure the readytime % is within the bounds. | 2386 | * Ensure the readytime % is within the bounds. |
2386 | */ | 2387 | */ |