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-rw-r--r--drivers/net/sky2.c27
-rw-r--r--drivers/net/sky2.h9
2 files changed, 33 insertions, 3 deletions
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index e6f71c1232bc..aff347f1ea4b 100644
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -114,9 +114,11 @@ static const struct pci_device_id sky2_id_table[] = {
114 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4347) }, 114 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4347) },
115 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4350) }, 115 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4350) },
116 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4351) }, 116 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4351) },
117 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4352) },
117 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4360) }, 118 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4360) },
118 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4361) }, 119 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4361) },
119 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4362) }, 120 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4362) },
121 { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4363) },
120 { 0 } 122 { 0 }
121}; 123};
122 124
@@ -130,6 +132,7 @@ static const char *yukon_name[] = {
130 [CHIP_ID_YUKON_LITE - CHIP_ID_YUKON] = "Lite", /* 0xb0 */ 132 [CHIP_ID_YUKON_LITE - CHIP_ID_YUKON] = "Lite", /* 0xb0 */
131 [CHIP_ID_YUKON_LP - CHIP_ID_YUKON] = "LP", /* 0xb2 */ 133 [CHIP_ID_YUKON_LP - CHIP_ID_YUKON] = "LP", /* 0xb2 */
132 [CHIP_ID_YUKON_XL - CHIP_ID_YUKON] = "XL", /* 0xb3 */ 134 [CHIP_ID_YUKON_XL - CHIP_ID_YUKON] = "XL", /* 0xb3 */
135 [CHIP_ID_YUKON_EC_U - CHIP_ID_YUKON] = "EC Ultra", /* 0xb4 */
133 136
134 [CHIP_ID_YUKON_EC - CHIP_ID_YUKON] = "EC", /* 0xb6 */ 137 [CHIP_ID_YUKON_EC - CHIP_ID_YUKON] = "EC", /* 0xb6 */
135 [CHIP_ID_YUKON_FE - CHIP_ID_YUKON] = "FE", /* 0xb7 */ 138 [CHIP_ID_YUKON_FE - CHIP_ID_YUKON] = "FE", /* 0xb7 */
@@ -599,6 +602,18 @@ static void sky2_mac_init(struct sky2_hw *hw, unsigned port)
599 /* Configure Tx MAC FIFO */ 602 /* Configure Tx MAC FIFO */
600 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_CLR); 603 sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_CLR);
601 sky2_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON); 604 sky2_write16(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_OPER_ON);
605
606 if (hw->chip_id == CHIP_ID_YUKON_EC_U) {
607 sky2_write8(hw, SK_REG(port, RX_GMF_LP_THR), 768/8);
608 sky2_write8(hw, SK_REG(port, RX_GMF_UP_THR), 1024/8);
609 if (hw->dev[port]->mtu > ETH_DATA_LEN) {
610 /* set Tx GMAC FIFO Almost Empty Threshold */
611 sky2_write32(hw, SK_REG(port, TX_GMF_AE_THR), 0x180);
612 /* Disable Store & Forward mode for TX */
613 sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_DIS);
614 }
615 }
616
602} 617}
603 618
604static void sky2_ramset(struct sky2_hw *hw, u16 q, u32 start, size_t len) 619static void sky2_ramset(struct sky2_hw *hw, u16 q, u32 start, size_t len)
@@ -984,6 +999,10 @@ static int sky2_up(struct net_device *dev)
984 RB_RST_SET); 999 RB_RST_SET);
985 1000
986 sky2_qset(hw, txqaddr[port], 0x600); 1001 sky2_qset(hw, txqaddr[port], 0x600);
1002 if (hw->chip_id == CHIP_ID_YUKON_EC_U)
1003 sky2_write16(hw, Q_ADDR(txqaddr[port], Q_AL), 0x1a0);
1004
1005
987 sky2_prefetch_init(hw, txqaddr[port], sky2->tx_le_map, 1006 sky2_prefetch_init(hw, txqaddr[port], sky2->tx_le_map,
988 TX_RING_SIZE - 1); 1007 TX_RING_SIZE - 1);
989 1008
@@ -1553,6 +1572,9 @@ static int sky2_change_mtu(struct net_device *dev, int new_mtu)
1553 if (new_mtu < ETH_ZLEN || new_mtu > ETH_JUMBO_MTU) 1572 if (new_mtu < ETH_ZLEN || new_mtu > ETH_JUMBO_MTU)
1554 return -EINVAL; 1573 return -EINVAL;
1555 1574
1575 if (hw->chip_id == CHIP_ID_YUKON_EC_U && new_mtu > ETH_DATA_LEN)
1576 return -EINVAL;
1577
1556 if (!netif_running(dev)) { 1578 if (!netif_running(dev)) {
1557 dev->mtu = new_mtu; 1579 dev->mtu = new_mtu;
1558 return 0; 1580 return 0;
@@ -1972,6 +1994,7 @@ static inline u32 sky2_khz(const struct sky2_hw *hw)
1972{ 1994{
1973 switch (hw->chip_id) { 1995 switch (hw->chip_id) {
1974 case CHIP_ID_YUKON_EC: 1996 case CHIP_ID_YUKON_EC:
1997 case CHIP_ID_YUKON_EC_U:
1975 return 125000; /* 125 Mhz */ 1998 return 125000; /* 125 Mhz */
1976 case CHIP_ID_YUKON_FE: 1999 case CHIP_ID_YUKON_FE:
1977 return 100000; /* 100 Mhz */ 2000 return 100000; /* 100 Mhz */
@@ -2796,7 +2819,9 @@ static __devinit struct net_device *sky2_init_netdev(struct sky2_hw *hw,
2796 2819
2797 sky2->port = port; 2820 sky2->port = port;
2798 2821
2799 dev->features |= NETIF_F_LLTX | NETIF_F_TSO; 2822 dev->features |= NETIF_F_LLTX;
2823 if (hw->chip_id != CHIP_ID_YUKON_EC_U)
2824 dev->features |= NETIF_F_TSO;
2800 if (highmem) 2825 if (highmem)
2801 dev->features |= NETIF_F_HIGHDMA; 2826 dev->features |= NETIF_F_HIGHDMA;
2802 dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG; 2827 dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG;
diff --git a/drivers/net/sky2.h b/drivers/net/sky2.h
index 629d08f170fd..f836b0322b19 100644
--- a/drivers/net/sky2.h
+++ b/drivers/net/sky2.h
@@ -309,7 +309,7 @@ enum {
309 Y2_IS_PAR_RX2 | Y2_IS_TCP_TXS2| Y2_IS_TCP_TXA2, 309 Y2_IS_PAR_RX2 | Y2_IS_TCP_TXS2| Y2_IS_TCP_TXA2,
310 310
311 Y2_HWE_ALL_MASK = Y2_IS_TIST_OV | Y2_IS_MST_ERR | Y2_IS_IRQ_STAT | 311 Y2_HWE_ALL_MASK = Y2_IS_TIST_OV | Y2_IS_MST_ERR | Y2_IS_IRQ_STAT |
312 Y2_IS_PCI_EXP | Y2_IS_PCI_NEXP | 312 Y2_IS_PCI_EXP |
313 Y2_HWE_L1_MASK | Y2_HWE_L2_MASK, 313 Y2_HWE_L1_MASK | Y2_HWE_L2_MASK,
314}; 314};
315 315
@@ -346,6 +346,7 @@ enum {
346 CHIP_ID_YUKON_LITE = 0xb1, /* Chip ID for YUKON-Lite (Rev. A1-A3) */ 346 CHIP_ID_YUKON_LITE = 0xb1, /* Chip ID for YUKON-Lite (Rev. A1-A3) */
347 CHIP_ID_YUKON_LP = 0xb2, /* Chip ID for YUKON-LP */ 347 CHIP_ID_YUKON_LP = 0xb2, /* Chip ID for YUKON-LP */
348 CHIP_ID_YUKON_XL = 0xb3, /* Chip ID for YUKON-2 XL */ 348 CHIP_ID_YUKON_XL = 0xb3, /* Chip ID for YUKON-2 XL */
349 CHIP_ID_YUKON_EC_U = 0xb4, /* Chip ID for YUKON-2 EC Ultra */
349 CHIP_ID_YUKON_EC = 0xb6, /* Chip ID for YUKON-2 EC */ 350 CHIP_ID_YUKON_EC = 0xb6, /* Chip ID for YUKON-2 EC */
350 CHIP_ID_YUKON_FE = 0xb7, /* Chip ID for YUKON-2 FE */ 351 CHIP_ID_YUKON_FE = 0xb7, /* Chip ID for YUKON-2 FE */
351 352
@@ -579,7 +580,8 @@ enum {
579 RX_GMF_FL_MSK = 0x0c4c,/* 32 bit Rx GMAC FIFO Flush Mask */ 580 RX_GMF_FL_MSK = 0x0c4c,/* 32 bit Rx GMAC FIFO Flush Mask */
580 RX_GMF_FL_THR = 0x0c50,/* 32 bit Rx GMAC FIFO Flush Threshold */ 581 RX_GMF_FL_THR = 0x0c50,/* 32 bit Rx GMAC FIFO Flush Threshold */
581 RX_GMF_TR_THR = 0x0c54,/* 32 bit Rx Truncation Threshold (Yukon-2) */ 582 RX_GMF_TR_THR = 0x0c54,/* 32 bit Rx Truncation Threshold (Yukon-2) */
582 583 RX_GMF_UP_THR = 0x0c58,/* 8 bit Rx Upper Pause Thr (Yukon-EC_U) */
584 RX_GMF_LP_THR = 0x0c5a,/* 8 bit Rx Lower Pause Thr (Yukon-EC_U) */
583 RX_GMF_VLAN = 0x0c5c,/* 32 bit Rx VLAN Type Register (Yukon-2) */ 585 RX_GMF_VLAN = 0x0c5c,/* 32 bit Rx VLAN Type Register (Yukon-2) */
584 RX_GMF_WP = 0x0c60,/* 32 bit Rx GMAC FIFO Write Pointer */ 586 RX_GMF_WP = 0x0c60,/* 32 bit Rx GMAC FIFO Write Pointer */
585 587
@@ -1557,6 +1559,9 @@ enum {
1557 1559
1558/* TX_GMF_CTRL_T 32 bit Tx GMAC FIFO Control/Test */ 1560/* TX_GMF_CTRL_T 32 bit Tx GMAC FIFO Control/Test */
1559enum { 1561enum {
1562 TX_STFW_DIS = 1<<31,/* Disable Store & Forward (Yukon-EC Ultra) */
1563 TX_STFW_ENA = 1<<30,/* Enable Store & Forward (Yukon-EC Ultra) */
1564
1560 TX_VLAN_TAG_ON = 1<<25,/* enable VLAN tagging */ 1565 TX_VLAN_TAG_ON = 1<<25,/* enable VLAN tagging */
1561 TX_VLAN_TAG_OFF = 1<<24,/* disable VLAN tagging */ 1566 TX_VLAN_TAG_OFF = 1<<24,/* disable VLAN tagging */
1562 1567