141 files changed, 20566 insertions, 9677 deletions

diff --git a/drivers/net/3c505.c b/drivers/net/3c505.c
index 6124605bef05..a8107f992fb4 100644
--- a/drivers/net/3c505.c
+++ b/drivers/net/3c505.c
@@ -493,21 +493,27 @@ static bool receive_pcb(struct net_device *dev, pcb_struct * pcb)
         }
         /* read the data */
         spin_lock_irqsave(&adapter->lock, flags);
-        i = 0;
-        do {
-                j = 0;
-                while (((stat = get_status(dev->base_addr)) & ACRF) == 0 && j++ < 20000);
-                pcb->data.raw[i++] = inb_command(dev->base_addr);
-                if (i > MAX_PCB_DATA)
-                        INVALID_PCB_MSG(i);
-        } while ((stat & ASF_PCB_MASK) != ASF_PCB_END && j < 20000);
+        for (i = 0; i < MAX_PCB_DATA; i++) {
+                for (j = 0; j < 20000; j++) {
+                        stat = get_status(dev->base_addr);
+                        if (stat & ACRF)
+                                break;
+                }
+                pcb->data.raw[i] = inb_command(dev->base_addr);
+                if ((stat & ASF_PCB_MASK) == ASF_PCB_END || j >= 20000)
+                        break;
+        }
         spin_unlock_irqrestore(&adapter->lock, flags);
+        if (i >= MAX_PCB_DATA) {
+                INVALID_PCB_MSG(i);
+                return false;
+        }
         if (j >= 20000) {
                 TIMEOUT_MSG(__LINE__);
                 return false;
         }
-        /* woops, the last "data" byte was really the length! */
-        total_length = pcb->data.raw[--i];
+        /* the last "data" byte was really the length! */
+        total_length = pcb->data.raw[i];
 
         /* safety check total length vs data length */
         if (total_length != (pcb->length + 2)) {
diff --git a/drivers/net/3c509.c b/drivers/net/3c509.c
index 535c234286ea..8c694213035b 100644
--- a/drivers/net/3c509.c
+++ b/drivers/net/3c509.c
@@ -1475,6 +1475,7 @@ el3_resume(struct device *pdev)
         spin_lock_irqsave(&lp->lock, flags);
 
         outw(PowerUp, ioaddr + EL3_CMD);
+        EL3WINDOW(0);
         el3_up(dev);
 
         if (netif_running(dev))
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 6bdfd47d679d..62d732a886f1 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1040,6 +1040,17 @@ config NI65
           To compile this driver as a module, choose M here. The module
           will be called ni65.
 
+config DNET
+        tristate "Dave ethernet support (DNET)"
+        depends on NET_ETHERNET && HAS_IOMEM
+        select PHYLIB
+        help
+          The Dave ethernet interface (DNET) is found on Qong Board FPGA.
+          Say Y to include support for the DNET chip.
+
+          To compile this driver as a module, choose M here: the module
+          will be called dnet.
+
 source "drivers/net/tulip/Kconfig"
 
 config AT1700
@@ -2342,6 +2353,17 @@ config ATL1E
           To compile this driver as a module, choose M here.  The module
           will be called atl1e.
 
+config ATL1C
+        tristate "Atheros L1C Gigabit Ethernet support (EXPERIMENTAL)"
+        depends on PCI && EXPERIMENTAL
+        select CRC32
+        select MII
+        help
+          This driver supports the Atheros L1C gigabit ethernet adapter.
+
+          To compile this driver as a module, choose M here.  The module
+          will be called atl1c.
+
 config JME
         tristate "JMicron(R) PCI-Express Gigabit Ethernet support"
         depends on PCI
@@ -2608,6 +2630,8 @@ config QLGE
 
 source "drivers/net/sfc/Kconfig"
 
+source "drivers/net/benet/Kconfig"
+
 endif # NETDEV_10000
 
 source "drivers/net/tokenring/Kconfig"
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index a3c5c002f224..471baaff229f 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -17,10 +17,12 @@ obj-$(CONFIG_BONDING) += bonding/
 obj-$(CONFIG_ATL1) += atlx/
 obj-$(CONFIG_ATL2) += atlx/
 obj-$(CONFIG_ATL1E) += atl1e/
+obj-$(CONFIG_ATL1C) += atl1c/
 obj-$(CONFIG_GIANFAR) += gianfar_driver.o
 obj-$(CONFIG_TEHUTI) += tehuti.o
 obj-$(CONFIG_ENIC) += enic/
 obj-$(CONFIG_JME) += jme.o
+obj-$(CONFIG_BE2NET) += benet/
 
 gianfar_driver-objs := gianfar.o \
                 gianfar_ethtool.o \
@@ -230,6 +232,7 @@ obj-$(CONFIG_ENC28J60) += enc28j60.o
 
 obj-$(CONFIG_XTENSA_XT2000_SONIC) += xtsonic.o
 
+obj-$(CONFIG_DNET) += dnet.o
 obj-$(CONFIG_MACB) += macb.o
 
 obj-$(CONFIG_ARM) += arm/
diff --git a/drivers/net/arm/Makefile b/drivers/net/arm/Makefile
index c69c0cdba4a2..811a3ccd14c1 100644
--- a/drivers/net/arm/Makefile
+++ b/drivers/net/arm/Makefile
@@ -4,7 +4,7 @@
 #
 
 obj-$(CONFIG_ARM_AM79C961A)     += am79c961a.o
-obj-$(CONFIG_ARM_ETHERH)        += etherh.o ../8390.o
+obj-$(CONFIG_ARM_ETHERH)        += etherh.o
 obj-$(CONFIG_ARM_ETHER3)        += ether3.o
 obj-$(CONFIG_ARM_ETHER1)        += ether1.o
 obj-$(CONFIG_ARM_AT91_ETHER)    += at91_ether.o
diff --git a/drivers/net/arm/etherh.c b/drivers/net/arm/etherh.c
index d15d8b79d8e5..f52f668c49bf 100644
--- a/drivers/net/arm/etherh.c
+++ b/drivers/net/arm/etherh.c
@@ -641,15 +641,15 @@ static const struct net_device_ops etherh_netdev_ops = {
         .ndo_open               = etherh_open,
         .ndo_stop               = etherh_close,
         .ndo_set_config         = etherh_set_config,
-        .ndo_start_xmit         = ei_start_xmit,
-        .ndo_tx_timeout         = ei_tx_timeout,
-        .ndo_get_stats          = ei_get_stats,
-        .ndo_set_multicast_list = ei_set_multicast_list,
+        .ndo_start_xmit         = __ei_start_xmit,
+        .ndo_tx_timeout         = __ei_tx_timeout,
+        .ndo_get_stats          = __ei_get_stats,
+        .ndo_set_multicast_list = __ei_set_multicast_list,
         .ndo_validate_addr      = eth_validate_addr,
-        .ndo_set_mac_address    = eth_set_mac_addr,
+        .ndo_set_mac_address    = eth_mac_addr,
         .ndo_change_mtu         = eth_change_mtu,
 #ifdef CONFIG_NET_POLL_CONTROLLER
-        .ndo_poll_controller    = ei_poll,
+        .ndo_poll_controller    = __ei_poll,
 #endif
 };
 
diff --git a/drivers/net/arm/ks8695net.c b/drivers/net/arm/ks8695net.c
index 1cf2f949c0b4..f3a127434897 100644
--- a/drivers/net/arm/ks8695net.c
+++ b/drivers/net/arm/ks8695net.c
@@ -560,7 +560,7 @@ ks8695_reset(struct ks8695_priv *ksp)
                 msleep(1);
         }
 
-        if (reset_timeout == 0) {
+        if (reset_timeout < 0) {
                 dev_crit(ksp->dev,
                          "Timeout waiting for DMA engines to reset\n");
                 /* And blithely carry on */
diff --git a/drivers/net/atl1c/Makefile b/drivers/net/atl1c/Makefile
new file mode 100644
index 000000000000..c37d966952ee
--- /dev/null
+++ b/drivers/net/atl1c/Makefile
@@ -0,0 +1,2 @@
+obj-$(CONFIG_ATL1C) += atl1c.o
+atl1c-objs := atl1c_main.o atl1c_hw.o atl1c_ethtool.o
diff --git a/drivers/net/atl1c/atl1c.h b/drivers/net/atl1c/atl1c.h
new file mode 100644
index 000000000000..ac11b84b8377
--- /dev/null
+++ b/drivers/net/atl1c/atl1c.h
@@ -0,0 +1,606 @@
+/*
+ * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
+ *
+ * Derived from Intel e1000 driver
+ * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc., 59
+ * Temple Place - Suite 330, Boston, MA  02111-1307, USA.
+ */
+
+#ifndef _ATL1C_H_
+#define _ATL1C_H_
+
+#include <linux/version.h>
+#include <linux/init.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/skbuff.h>
+#include <linux/ioport.h>
+#include <linux/slab.h>
+#include <linux/list.h>
+#include <linux/delay.h>
+#include <linux/sched.h>
+#include <linux/in.h>
+#include <linux/ip.h>
+#include <linux/ipv6.h>
+#include <linux/udp.h>
+#include <linux/mii.h>
+#include <linux/io.h>
+#include <linux/vmalloc.h>
+#include <linux/pagemap.h>
+#include <linux/tcp.h>
+#include <linux/mii.h>
+#include <linux/ethtool.h>
+#include <linux/if_vlan.h>
+#include <linux/workqueue.h>
+#include <net/checksum.h>
+#include <net/ip6_checksum.h>
+
+#include "atl1c_hw.h"
+
+/* Wake Up Filter Control */
+#define AT_WUFC_LNKC 0x00000001 /* Link Status Change Wakeup Enable */
+#define AT_WUFC_MAG  0x00000002 /* Magic Packet Wakeup Enable */
+#define AT_WUFC_EX   0x00000004 /* Directed Exact Wakeup Enable */
+#define AT_WUFC_MC   0x00000008 /* Multicast Wakeup Enable */
+#define AT_WUFC_BC   0x00000010 /* Broadcast Wakeup Enable */
+
+#define AT_VLAN_TO_TAG(_vlan, _tag)        \
+        _tag =  ((((_vlan) >> 8) & 0xFF)  |\
+                 (((_vlan) & 0xFF) << 8))
+
+#define AT_TAG_TO_VLAN(_tag, _vlan)      \
+        _vlan = ((((_tag) >> 8) & 0xFF) |\
+                (((_tag) & 0xFF) << 8))
+
+#define SPEED_0            0xffff
+#define HALF_DUPLEX        1
+#define FULL_DUPLEX        2
+
+#define AT_RX_BUF_SIZE          (ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN)
+#define MAX_JUMBO_FRAME_SIZE    (9*1024)
+#define MAX_TX_OFFLOAD_THRESH   (9*1024)
+
+#define AT_MAX_RECEIVE_QUEUE    4
+#define AT_DEF_RECEIVE_QUEUE    1
+#define AT_MAX_TRANSMIT_QUEUE   2
+
+#define AT_DMA_HI_ADDR_MASK     0xffffffff00000000ULL
+#define AT_DMA_LO_ADDR_MASK     0x00000000ffffffffULL
+
+#define AT_TX_WATCHDOG  (5 * HZ)
+#define AT_MAX_INT_WORK         5
+#define AT_TWSI_EEPROM_TIMEOUT  100
+#define AT_HW_MAX_IDLE_DELAY    10
+#define AT_SUSPEND_LINK_TIMEOUT 28
+
+#define AT_ASPM_L0S_TIMER       6
+#define AT_ASPM_L1_TIMER        12
+
+#define ATL1C_PCIE_L0S_L1_DISABLE       0x01
+#define ATL1C_PCIE_PHY_RESET            0x02
+
+#define ATL1C_ASPM_L0s_ENABLE           0x0001
+#define ATL1C_ASPM_L1_ENABLE            0x0002
+
+#define AT_REGS_LEN     (75 * sizeof(u32))
+#define AT_EEPROM_LEN   512
+
+#define ATL1C_GET_DESC(R, i, type)      (&(((type *)((R)->desc))[i]))
+#define ATL1C_RFD_DESC(R, i)    ATL1C_GET_DESC(R, i, struct atl1c_rx_free_desc)
+#define ATL1C_TPD_DESC(R, i)    ATL1C_GET_DESC(R, i, struct atl1c_tpd_desc)
+#define ATL1C_RRD_DESC(R, i)    ATL1C_GET_DESC(R, i, struct atl1c_recv_ret_status)
+
+/* tpd word 1 bit 0:7 General Checksum task offload */
+#define TPD_L4HDR_OFFSET_MASK   0x00FF
+#define TPD_L4HDR_OFFSET_SHIFT  0
+
+/* tpd word 1 bit 0:7 Large Send task offload (IPv4/IPV6) */
+#define TPD_TCPHDR_OFFSET_MASK  0x00FF
+#define TPD_TCPHDR_OFFSET_SHIFT 0
+
+/* tpd word 1 bit 0:7 Custom Checksum task offload */
+#define TPD_PLOADOFFSET_MASK    0x00FF
+#define TPD_PLOADOFFSET_SHIFT   0
+
+/* tpd word 1 bit 8:17 */
+#define TPD_CCSUM_EN_MASK       0x0001
+#define TPD_CCSUM_EN_SHIFT      8
+#define TPD_IP_CSUM_MASK        0x0001
+#define TPD_IP_CSUM_SHIFT       9
+#define TPD_TCP_CSUM_MASK       0x0001
+#define TPD_TCP_CSUM_SHIFT      10
+#define TPD_UDP_CSUM_MASK       0x0001
+#define TPD_UDP_CSUM_SHIFT      11
+#define TPD_LSO_EN_MASK         0x0001  /* TCP Large Send Offload */
+#define TPD_LSO_EN_SHIFT        12
+#define TPD_LSO_VER_MASK        0x0001
+#define TPD_LSO_VER_SHIFT       13      /* 0 : ipv4; 1 : ipv4/ipv6 */
+#define TPD_CON_VTAG_MASK       0x0001
+#define TPD_CON_VTAG_SHIFT      14
+#define TPD_INS_VTAG_MASK       0x0001
+#define TPD_INS_VTAG_SHIFT      15
+#define TPD_IPV4_PACKET_MASK    0x0001  /* valid when LSO VER  is 1 */
+#define TPD_IPV4_PACKET_SHIFT   16
+#define TPD_ETH_TYPE_MASK       0x0001
+#define TPD_ETH_TYPE_SHIFT      17      /* 0 : 802.3 frame; 1 : Ethernet */
+
+/* tpd word 18:25 Custom Checksum task offload */
+#define TPD_CCSUM_OFFSET_MASK   0x00FF
+#define TPD_CCSUM_OFFSET_SHIFT  18
+#define TPD_CCSUM_EPAD_MASK     0x0001
+#define TPD_CCSUM_EPAD_SHIFT    30
+
+/* tpd word 18:30 Large Send task offload (IPv4/IPV6) */
+#define TPD_MSS_MASK            0x1FFF
+#define TPD_MSS_SHIFT           18
+
+#define TPD_EOP_MASK            0x0001
+#define TPD_EOP_SHIFT           31
+
+struct atl1c_tpd_desc {
+        __le16  buffer_len; /* include 4-byte CRC */
+        __le16  vlan_tag;
+        __le32  word1;
+        __le64  buffer_addr;
+};
+
+struct atl1c_tpd_ext_desc {
+        u32 reservd_0;
+        __le32 word1;
+        __le32 pkt_len;
+        u32 reservd_1;
+};
+/* rrs word 0 bit 0:31 */
+#define RRS_RX_CSUM_MASK        0xFFFF
+#define RRS_RX_CSUM_SHIFT       0
+#define RRS_RX_RFD_CNT_MASK     0x000F
+#define RRS_RX_RFD_CNT_SHIFT    16
+#define RRS_RX_RFD_INDEX_MASK   0x0FFF
+#define RRS_RX_RFD_INDEX_SHIFT  20
+
+/* rrs flag bit 0:16 */
+#define RRS_HEAD_LEN_MASK       0x00FF
+#define RRS_HEAD_LEN_SHIFT      0
+#define RRS_HDS_TYPE_MASK       0x0003
+#define RRS_HDS_TYPE_SHIFT      8
+#define RRS_CPU_NUM_MASK        0x0003
+#define RRS_CPU_NUM_SHIFT       10
+#define RRS_HASH_FLG_MASK       0x000F
+#define RRS_HASH_FLG_SHIFT      12
+
+#define RRS_HDS_TYPE_HEAD       1
+#define RRS_HDS_TYPE_DATA       2
+
+#define RRS_IS_NO_HDS_TYPE(flag) \
+        (((flag) >> (RRS_HDS_TYPE_SHIFT)) & RRS_HDS_TYPE_MASK == 0)
+
+#define RRS_IS_HDS_HEAD(flag) \
+        (((flag) >> (RRS_HDS_TYPE_SHIFT)) & RRS_HDS_TYPE_MASK == \
+                        RRS_HDS_TYPE_HEAD)
+
+#define RRS_IS_HDS_DATA(flag) \
+        (((flag) >> (RRS_HDS_TYPE_SHIFT)) & RRS_HDS_TYPE_MASK == \
+                        RRS_HDS_TYPE_DATA)
+
+/* rrs word 3 bit 0:31 */
+#define RRS_PKT_SIZE_MASK       0x3FFF
+#define RRS_PKT_SIZE_SHIFT      0
+#define RRS_ERR_L4_CSUM_MASK    0x0001
+#define RRS_ERR_L4_CSUM_SHIFT   14
+#define RRS_ERR_IP_CSUM_MASK    0x0001
+#define RRS_ERR_IP_CSUM_SHIFT   15
+#define RRS_VLAN_INS_MASK       0x0001
+#define RRS_VLAN_INS_SHIFT      16
+#define RRS_PROT_ID_MASK        0x0007
+#define RRS_PROT_ID_SHIFT       17
+#define RRS_RX_ERR_SUM_MASK     0x0001
+#define RRS_RX_ERR_SUM_SHIFT    20
+#define RRS_RX_ERR_CRC_MASK     0x0001
+#define RRS_RX_ERR_CRC_SHIFT    21
+#define RRS_RX_ERR_FAE_MASK     0x0001
+#define RRS_RX_ERR_FAE_SHIFT    22
+#define RRS_RX_ERR_TRUNC_MASK   0x0001
+#define RRS_RX_ERR_TRUNC_SHIFT  23
+#define RRS_RX_ERR_RUNC_MASK    0x0001
+#define RRS_RX_ERR_RUNC_SHIFT   24
+#define RRS_RX_ERR_ICMP_MASK    0x0001
+#define RRS_RX_ERR_ICMP_SHIFT   25
+#define RRS_PACKET_BCAST_MASK   0x0001
+#define RRS_PACKET_BCAST_SHIFT  26
+#define RRS_PACKET_MCAST_MASK   0x0001
+#define RRS_PACKET_MCAST_SHIFT  27
+#define RRS_PACKET_TYPE_MASK    0x0001
+#define RRS_PACKET_TYPE_SHIFT   28
+#define RRS_FIFO_FULL_MASK      0x0001
+#define RRS_FIFO_FULL_SHIFT     29
+#define RRS_802_3_LEN_ERR_MASK  0x0001
+#define RRS_802_3_LEN_ERR_SHIFT 30
+#define RRS_RXD_UPDATED_MASK    0x0001
+#define RRS_RXD_UPDATED_SHIFT   31
+
+#define RRS_ERR_L4_CSUM         0x00004000
+#define RRS_ERR_IP_CSUM         0x00008000
+#define RRS_VLAN_INS            0x00010000
+#define RRS_RX_ERR_SUM          0x00100000
+#define RRS_RX_ERR_CRC          0x00200000
+#define RRS_802_3_LEN_ERR       0x40000000
+#define RRS_RXD_UPDATED         0x80000000
+
+#define RRS_PACKET_TYPE_802_3   1
+#define RRS_PACKET_TYPE_ETH     0
+#define RRS_PACKET_IS_ETH(word) \
+        (((word) >> RRS_PACKET_TYPE_SHIFT) & RRS_PACKET_TYPE_MASK == \
+                        RRS_PACKET_TYPE_ETH)
+#define RRS_RXD_IS_VALID(word) \
+        ((((word) >> RRS_RXD_UPDATED_SHIFT) & RRS_RXD_UPDATED_MASK) == 1)
+
+#define RRS_PACKET_PROT_IS_IPV4_ONLY(word) \
+        ((((word) >> RRS_PROT_ID_SHIFT) & RRS_PROT_ID_MASK) == 1)
+#define RRS_PACKET_PROT_IS_IPV6_ONLY(word) \
+        ((((word) >> RRS_PROT_ID_SHIFT) & RRS_PROT_ID_MASK) == 6)
+
+struct atl1c_recv_ret_status {
+        __le32  word0;
+        __le32  rss_hash;
+        __le16  vlan_tag;
+        __le16  flag;
+        __le32  word3;
+};
+
+/* RFD desciptor */
+struct atl1c_rx_free_desc {
+        __le64  buffer_addr;
+};
+
+/* DMA Order Settings */
+enum atl1c_dma_order {
+        atl1c_dma_ord_in = 1,
+        atl1c_dma_ord_enh = 2,
+        atl1c_dma_ord_out = 4
+};
+
+enum atl1c_dma_rcb {
+        atl1c_rcb_64 = 0,
+        atl1c_rcb_128 = 1
+};
+
+enum atl1c_mac_speed {
+        atl1c_mac_speed_0 = 0,
+        atl1c_mac_speed_10_100 = 1,
+        atl1c_mac_speed_1000 = 2
+};
+
+enum atl1c_dma_req_block {
+        atl1c_dma_req_128 = 0,
+        atl1c_dma_req_256 = 1,
+        atl1c_dma_req_512 = 2,
+        atl1c_dma_req_1024 = 3,
+        atl1c_dma_req_2048 = 4,
+        atl1c_dma_req_4096 = 5
+};
+
+enum atl1c_rss_mode {
+        atl1c_rss_mode_disable = 0,
+        atl1c_rss_sig_que = 1,
+        atl1c_rss_mul_que_sig_int = 2,
+        atl1c_rss_mul_que_mul_int = 4,
+};
+
+enum atl1c_rss_type {
+        atl1c_rss_disable = 0,
+        atl1c_rss_ipv4 = 1,
+        atl1c_rss_ipv4_tcp = 2,
+        atl1c_rss_ipv6 = 4,
+        atl1c_rss_ipv6_tcp = 8
+};
+
+enum atl1c_nic_type {
+        athr_l1c = 0,
+        athr_l2c = 1,
+};
+
+enum atl1c_trans_queue {
+        atl1c_trans_normal = 0,
+        atl1c_trans_high = 1
+};
+
+struct atl1c_hw_stats {
+        /* rx */
+        unsigned long rx_ok;            /* The number of good packet received. */
+        unsigned long rx_bcast;         /* The number of good broadcast packet received. */
+        unsigned long rx_mcast;         /* The number of good multicast packet received. */
+        unsigned long rx_pause;         /* The number of Pause packet received. */
+        unsigned long rx_ctrl;          /* The number of Control packet received other than Pause frame. */
+        unsigned long rx_fcs_err;       /* The number of packets with bad FCS. */
+        unsigned long rx_len_err;       /* The number of packets with mismatch of length field and actual size. */
+        unsigned long rx_byte_cnt;      /* The number of bytes of good packet received. FCS is NOT included. */
+        unsigned long rx_runt;          /* The number of packets received that are less than 64 byte long and with good FCS. */
+        unsigned long rx_frag;          /* The number of packets received that are less than 64 byte long and with bad FCS. */
+        unsigned long rx_sz_64;         /* The number of good and bad packets received that are 64 byte long. */
+        unsigned long rx_sz_65_127;     /* The number of good and bad packets received that are between 65 and 127-byte long. */
+        unsigned long rx_sz_128_255;    /* The number of good and bad packets received that are between 128 and 255-byte long. */
+        unsigned long rx_sz_256_511;    /* The number of good and bad packets received that are between 256 and 511-byte long. */
+        unsigned long rx_sz_512_1023;   /* The number of good and bad packets received that are between 512 and 1023-byte long. */
+        unsigned long rx_sz_1024_1518;  /* The number of good and bad packets received that are between 1024 and 1518-byte long. */
+        unsigned long rx_sz_1519_max;   /* The number of good and bad packets received that are between 1519-byte and MTU. */
+        unsigned long rx_sz_ov;         /* The number of good and bad packets received that are more than MTU size truncated by Selene. */
+        unsigned long rx_rxf_ov;        /* The number of frame dropped due to occurrence of RX FIFO overflow. */
+        unsigned long rx_rrd_ov;        /* The number of frame dropped due to occurrence of RRD overflow. */
+        unsigned long rx_align_err;     /* Alignment Error */
+        unsigned long rx_bcast_byte_cnt; /* The byte count of broadcast packet received, excluding FCS. */
+        unsigned long rx_mcast_byte_cnt; /* The byte count of multicast packet received, excluding FCS. */
+        unsigned long rx_err_addr;      /* The number of packets dropped due to address filtering. */
+
+        /* tx */
+        unsigned long tx_ok;            /* The number of good packet transmitted. */
+        unsigned long tx_bcast;         /* The number of good broadcast packet transmitted. */
+        unsigned long tx_mcast;         /* The number of good multicast packet transmitted. */
+        unsigned long tx_pause;         /* The number of Pause packet transmitted. */
+        unsigned long tx_exc_defer;     /* The number of packets transmitted with excessive deferral. */
+        unsigned long tx_ctrl;          /* The number of packets transmitted is a control frame, excluding Pause frame. */
+        unsigned long tx_defer;         /* The number of packets transmitted that is deferred. */
+        unsigned long tx_byte_cnt;      /* The number of bytes of data transmitted. FCS is NOT included. */
+        unsigned long tx_sz_64;         /* The number of good and bad packets transmitted that are 64 byte long. */
+        unsigned long tx_sz_65_127;     /* The number of good and bad packets transmitted that are between 65 and 127-byte long. */
+        unsigned long tx_sz_128_255;    /* The number of good and bad packets transmitted that are between 128 and 255-byte long. */
+        unsigned long tx_sz_256_511;    /* The number of good and bad packets transmitted that are between 256 and 511-byte long. */
+        unsigned long tx_sz_512_1023;   /* The number of good and bad packets transmitted that are between 512 and 1023-byte long. */
+        unsigned long tx_sz_1024_1518;  /* The number of good and bad packets transmitted that are between 1024 and 1518-byte long. */
+        unsigned long tx_sz_1519_max;   /* The number of good and bad packets transmitted that are between 1519-byte and MTU. */
+        unsigned long tx_1_col;         /* The number of packets subsequently transmitted successfully with a single prior collision. */
+        unsigned long tx_2_col;         /* The number of packets subsequently transmitted successfully with multiple prior collisions. */
+        unsigned long tx_late_col;      /* The number of packets transmitted with late collisions. */
+        unsigned long tx_abort_col;     /* The number of transmit packets aborted due to excessive collisions. */
+        unsigned long tx_underrun;      /* The number of transmit packets aborted due to transmit FIFO underrun, or TRD FIFO underrun */
+        unsigned long tx_rd_eop;        /* The number of times that read beyond the EOP into the next frame area when TRD was not written timely */
+        unsigned long tx_len_err;       /* The number of transmit packets with length field does NOT match the actual frame size. */
+        unsigned long tx_trunc;         /* The number of transmit packets truncated due to size exceeding MTU. */
+        unsigned long tx_bcast_byte;    /* The byte count of broadcast packet transmitted, excluding FCS. */
+        unsigned long tx_mcast_byte;    /* The byte count of multicast packet transmitted, excluding FCS. */
+};
+
+struct atl1c_hw {
+        u8 __iomem      *hw_addr;            /* inner register address */
+        struct atl1c_adapter *adapter;
+        enum atl1c_nic_type  nic_type;
+        enum atl1c_dma_order dma_order;
+        enum atl1c_dma_rcb   rcb_value;
+        enum atl1c_dma_req_block dmar_block;
+        enum atl1c_dma_req_block dmaw_block;
+
+        u16 device_id;
+        u16 vendor_id;
+        u16 subsystem_id;
+        u16 subsystem_vendor_id;
+        u8 revision_id;
+
+        u32 intr_mask;
+        u8 dmaw_dly_cnt;
+        u8 dmar_dly_cnt;
+
+        u8 preamble_len;
+        u16 max_frame_size;
+        u16 min_frame_size;
+
+        enum atl1c_mac_speed mac_speed;
+        bool mac_duplex;
+        bool hibernate;
+        u16 media_type;
+#define MEDIA_TYPE_AUTO_SENSOR  0
+#define MEDIA_TYPE_100M_FULL    1
+#define MEDIA_TYPE_100M_HALF    2
+#define MEDIA_TYPE_10M_FULL     3
+#define MEDIA_TYPE_10M_HALF     4
+
+        u16 autoneg_advertised;
+        u16 mii_autoneg_adv_reg;
+        u16 mii_1000t_ctrl_reg;
+
+        u16 tx_imt;     /* TX Interrupt Moderator timer ( 2us resolution) */
+        u16 rx_imt;     /* RX Interrupt Moderator timer ( 2us resolution) */
+        u16 ict;        /* Interrupt Clear timer (2us resolution) */
+        u16 ctrl_flags;
+#define ATL1C_INTR_CLEAR_ON_READ        0x0001
+#define ATL1C_INTR_MODRT_ENABLE         0x0002
+#define ATL1C_CMB_ENABLE                0x0004
+#define ATL1C_SMB_ENABLE                0x0010
+#define ATL1C_TXQ_MODE_ENHANCE          0x0020
+#define ATL1C_RX_IPV6_CHKSUM            0x0040
+#define ATL1C_ASPM_L0S_SUPPORT          0x0080
+#define ATL1C_ASPM_L1_SUPPORT           0x0100
+#define ATL1C_ASPM_CTRL_MON             0x0200
+#define ATL1C_HIB_DISABLE               0x0400
+#define ATL1C_LINK_CAP_1000M            0x0800
+#define ATL1C_FPGA_VERSION              0x8000
+        u16 cmb_tpd;
+        u16 cmb_rrd;
+        u16 cmb_rx_timer; /* 2us resolution */
+        u16 cmb_tx_timer;
+        u32 smb_timer;
+
+        u16 rrd_thresh; /* Threshold of number of RRD produced to trigger
+                          interrupt request */
+        u16 tpd_thresh;
+        u8 tpd_burst;   /* Number of TPD to prefetch in cache-aligned burst. */
+        u8 rfd_burst;
+        enum atl1c_rss_type rss_type;
+        enum atl1c_rss_mode rss_mode;
+        u8 rss_hash_bits;
+        u32 base_cpu;
+        u32 indirect_tab;
+        u8 mac_addr[ETH_ALEN];
+        u8 perm_mac_addr[ETH_ALEN];
+
+        bool phy_configured;
+        bool re_autoneg;
+        bool emi_ca;
+};
+
+/*
+ * atl1c_ring_header represents a single, contiguous block of DMA space
+ * mapped for the three descriptor rings (tpd, rfd, rrd) and the two
+ * message blocks (cmb, smb) described below
+ */
+struct atl1c_ring_header {
+        void *desc;             /* virtual address */
+        dma_addr_t dma;         /* physical address*/
+        unsigned int size;      /* length in bytes */
+};
+
+/*
+ * atl1c_buffer is wrapper around a pointer to a socket buffer
+ * so a DMA handle can be stored along with the skb
+ */
+struct atl1c_buffer {
+        struct sk_buff *skb;    /* socket buffer */
+        u16 length;             /* rx buffer length */
+        u16 state;              /* state of buffer */
+#define ATL1_BUFFER_FREE        0
+#define ATL1_BUFFER_BUSY        1
+        dma_addr_t dma;
+};
+
+/* transimit packet descriptor (tpd) ring */
+struct atl1c_tpd_ring {
+        void *desc;             /* descriptor ring virtual address */
+        dma_addr_t dma;         /* descriptor ring physical address */
+        u16 size;               /* descriptor ring length in bytes */
+        u16 count;              /* number of descriptors in the ring */
+        u16 next_to_use;        /* this is protectd by adapter->tx_lock */
+        atomic_t next_to_clean;
+        struct atl1c_buffer *buffer_info;
+};
+
+/* receive free descriptor (rfd) ring */
+struct atl1c_rfd_ring {
+        void *desc;             /* descriptor ring virtual address */
+        dma_addr_t dma;         /* descriptor ring physical address */
+        u16 size;               /* descriptor ring length in bytes */
+        u16 count;              /* number of descriptors in the ring */
+        u16 next_to_use;
+        u16 next_to_clean;
+        struct atl1c_buffer *buffer_info;
+};
+
+/* receive return desciptor (rrd) ring */
+struct atl1c_rrd_ring {
+        void *desc;             /* descriptor ring virtual address */
+        dma_addr_t dma;         /* descriptor ring physical address */
+        u16 size;               /* descriptor ring length in bytes */
+        u16 count;              /* number of descriptors in the ring */
+        u16 next_to_use;
+        u16 next_to_clean;
+};
+
+struct atl1c_cmb {
+        void *cmb;
+        dma_addr_t dma;
+};
+
+struct atl1c_smb {
+        void *smb;
+        dma_addr_t dma;
+};
+
+/* board specific private data structure */
+struct atl1c_adapter {
+        struct net_device   *netdev;
+        struct pci_dev      *pdev;
+        struct vlan_group   *vlgrp;
+        struct napi_struct  napi;
+        struct atl1c_hw        hw;
+        struct atl1c_hw_stats  hw_stats;
+        struct net_device_stats net_stats;
+        struct mii_if_info  mii;    /* MII interface info */
+        u16 rx_buffer_len;
+
+        unsigned long flags;
+#define __AT_TESTING        0x0001
+#define __AT_RESETTING      0x0002
+#define __AT_DOWN           0x0003
+        u32 msg_enable;
+
+        bool have_msi;
+        u32 wol;
+        u16 link_speed;
+        u16 link_duplex;
+
+        spinlock_t mdio_lock;
+        spinlock_t tx_lock;
+        atomic_t irq_sem;
+
+        struct work_struct reset_task;
+        struct work_struct link_chg_task;
+        struct timer_list watchdog_timer;
+        struct timer_list phy_config_timer;
+
+        /* All Descriptor memory */
+        struct atl1c_ring_header ring_header;
+        struct atl1c_tpd_ring tpd_ring[AT_MAX_TRANSMIT_QUEUE];
+        struct atl1c_rfd_ring rfd_ring[AT_MAX_RECEIVE_QUEUE];
+        struct atl1c_rrd_ring rrd_ring[AT_MAX_RECEIVE_QUEUE];
+        struct atl1c_cmb cmb;
+        struct atl1c_smb smb;
+        int num_rx_queues;
+        u32 bd_number;     /* board number;*/
+};
+
+#define AT_WRITE_REG(a, reg, value) ( \
+                writel((value), ((a)->hw_addr + reg)))
+
+#define AT_WRITE_FLUSH(a) (\
+                readl((a)->hw_addr))
+
+#define AT_READ_REG(a, reg, pdata) do {                                 \
+                if (unlikely((a)->hibernate)) {                         \
+                        readl((a)->hw_addr + reg);                      \
+                        *(u32 *)pdata = readl((a)->hw_addr + reg);      \
+                } else {                                                \
+                        *(u32 *)pdata = readl((a)->hw_addr + reg);      \
+                }                                                       \
+        } while (0)
+
+#define AT_WRITE_REGB(a, reg, value) (\
+                writeb((value), ((a)->hw_addr + reg)))
+
+#define AT_READ_REGB(a, reg) (\
+                readb((a)->hw_addr + reg))
+
+#define AT_WRITE_REGW(a, reg, value) (\
+                writew((value), ((a)->hw_addr + reg)))
+
+#define AT_READ_REGW(a, reg) (\
+                readw((a)->hw_addr + reg))
+
+#define AT_WRITE_REG_ARRAY(a, reg, offset, value) ( \
+                writel((value), (((a)->hw_addr + reg) + ((offset) << 2))))
+
+#define AT_READ_REG_ARRAY(a, reg, offset) ( \
+                readl(((a)->hw_addr + reg) + ((offset) << 2)))
+
+extern char atl1c_driver_name[];
+extern char atl1c_driver_version[];
+
+extern int atl1c_up(struct atl1c_adapter *adapter);
+extern void atl1c_down(struct atl1c_adapter *adapter);
+extern void atl1c_reinit_locked(struct atl1c_adapter *adapter);
+extern s32 atl1c_reset_hw(struct atl1c_hw *hw);
+extern void atl1c_set_ethtool_ops(struct net_device *netdev);
+#endif /* _ATL1C_H_ */
diff --git a/drivers/net/atl1c/atl1c_ethtool.c b/drivers/net/atl1c/atl1c_ethtool.c
new file mode 100644
index 000000000000..45c5b7332cd3
--- /dev/null
+++ b/drivers/net/atl1c/atl1c_ethtool.c
@@ -0,0 +1,317 @@
+/*
+ * Copyright(c) 2009 - 2009 Atheros Corporation. All rights reserved.
+ *
+ * Derived from Intel e1000 driver
+ * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc., 59
+ * Temple Place - Suite 330, Boston, MA  02111-1307, USA.
+ *
+ */
+
+#include <linux/netdevice.h>
+#include <linux/ethtool.h>
+
+#include "atl1c.h"
+
+static int atl1c_get_settings(struct net_device *netdev,
+                              struct ethtool_cmd *ecmd)
+{
+        struct atl1c_adapter *adapter = netdev_priv(netdev);
+        struct atl1c_hw *hw = &adapter->hw;
+
+        ecmd->supported = (SUPPORTED_10baseT_Half  |
+                           SUPPORTED_10baseT_Full  |
+                           SUPPORTED_100baseT_Half |
+                           SUPPORTED_100baseT_Full |
+                           SUPPORTED_Autoneg       |
+                           SUPPORTED_TP);
+        if (hw->ctrl_flags & ATL1C_LINK_CAP_1000M)
+                ecmd->supported |= SUPPORTED_1000baseT_Full;
+
+        ecmd->advertising = ADVERTISED_TP;
+
+        ecmd->advertising |= hw->autoneg_advertised;
+
+        ecmd->port = PORT_TP;
+        ecmd->phy_address = 0;
+        ecmd->transceiver = XCVR_INTERNAL;
+
+        if (adapter->link_speed != SPEED_0) {
+                ecmd->speed = adapter->link_speed;
+                if (adapter->link_duplex == FULL_DUPLEX)
+                        ecmd->duplex = DUPLEX_FULL;
+                else
+                        ecmd->duplex = DUPLEX_HALF;
+        } else {
+                ecmd->speed = -1;
+                ecmd->duplex = -1;
+        }
+
+        ecmd->autoneg = AUTONEG_ENABLE;
+        return 0;
+}
+
+static int atl1c_set_settings(struct net_device *netdev,
+                              struct ethtool_cmd *ecmd)
+{
+        struct atl1c_adapter *adapter = netdev_priv(netdev);
+        struct atl1c_hw *hw = &adapter->hw;
+        u16  autoneg_advertised;
+
+        while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
+                msleep(1);
+
+        if (ecmd->autoneg == AUTONEG_ENABLE) {
+                autoneg_advertised = ADVERTISED_Autoneg;
+        } else {
+                if (ecmd->speed == SPEED_1000) {
+                        if (ecmd->duplex != DUPLEX_FULL) {
+                                if (netif_msg_link(adapter))
+                                        dev_warn(&adapter->pdev->dev,
+                                                "1000M half is invalid\n");
+                                clear_bit(__AT_RESETTING, &adapter->flags);
+                                return -EINVAL;
+                        }
+                        autoneg_advertised = ADVERTISED_1000baseT_Full;
+                } else if (ecmd->speed == SPEED_100) {
+                        if (ecmd->duplex == DUPLEX_FULL)
+                                autoneg_advertised = ADVERTISED_100baseT_Full;
+                        else
+                                autoneg_advertised = ADVERTISED_100baseT_Half;
+                } else {
+                        if (ecmd->duplex == DUPLEX_FULL)
+                                autoneg_advertised = ADVERTISED_10baseT_Full;
+                        else
+                                autoneg_advertised = ADVERTISED_10baseT_Half;
+                }
+        }
+
+        if (hw->autoneg_advertised != autoneg_advertised) {
+                hw->autoneg_advertised = autoneg_advertised;
+                if (atl1c_restart_autoneg(hw) != 0) {
+                        if (netif_msg_link(adapter))
+                                dev_warn(&adapter->pdev->dev,
+                                        "ethtool speed/duplex setting failed\n");
+                        clear_bit(__AT_RESETTING, &adapter->flags);
+                        return -EINVAL;
+                }
+        }
+        clear_bit(__AT_RESETTING, &adapter->flags);
+        return 0;
+}
+
+static u32 atl1c_get_tx_csum(struct net_device *netdev)
+{
+        return (netdev->features & NETIF_F_HW_CSUM) != 0;
+}
+
+static u32 atl1c_get_msglevel(struct net_device *netdev)
+{
+        struct atl1c_adapter *adapter = netdev_priv(netdev);
+        return adapter->msg_enable;
+}
+
+static void atl1c_set_msglevel(struct net_device *netdev, u32 data)
+{
+        struct atl1c_adapter *adapter = netdev_priv(netdev);
+        adapter->msg_enable = data;
+}
+
+static int atl1c_get_regs_len(struct net_device *netdev)
+{
+        return AT_REGS_LEN;
+}
+
+static void atl1c_get_regs(struct net_device *netdev,
+                           struct ethtool_regs *regs, void *p)
+{
+        struct atl1c_adapter *adapter = netdev_priv(netdev);
+        struct atl1c_hw *hw = &adapter->hw;
+        u32 *regs_buff = p;
+        u16 phy_data;
+
+        memset(p, 0, AT_REGS_LEN);
+
+        regs->version = 0;
+        AT_READ_REG(hw, REG_VPD_CAP,              p++);
+        AT_READ_REG(hw, REG_PM_CTRL,              p++);
+        AT_READ_REG(hw, REG_MAC_HALF_DUPLX_CTRL,  p++);
+        AT_READ_REG(hw, REG_TWSI_CTRL,            p++);
+        AT_READ_REG(hw, REG_PCIE_DEV_MISC_CTRL,   p++);
+        AT_READ_REG(hw, REG_MASTER_CTRL,          p++);
+        AT_READ_REG(hw, REG_MANUAL_TIMER_INIT,    p++);
+        AT_READ_REG(hw, REG_IRQ_MODRT_TIMER_INIT, p++);
+        AT_READ_REG(hw, REG_GPHY_CTRL,            p++);
+        AT_READ_REG(hw, REG_LINK_CTRL,            p++);
+        AT_READ_REG(hw, REG_IDLE_STATUS,          p++);
+        AT_READ_REG(hw, REG_MDIO_CTRL,            p++);
+        AT_READ_REG(hw, REG_SERDES_LOCK,          p++);
+        AT_READ_REG(hw, REG_MAC_CTRL,             p++);
+        AT_READ_REG(hw, REG_MAC_IPG_IFG,          p++);
+        AT_READ_REG(hw, REG_MAC_STA_ADDR,         p++);
+        AT_READ_REG(hw, REG_MAC_STA_ADDR+4,       p++);
+        AT_READ_REG(hw, REG_RX_HASH_TABLE,        p++);
+        AT_READ_REG(hw, REG_RX_HASH_TABLE+4,      p++);
+        AT_READ_REG(hw, REG_RXQ_CTRL,             p++);
+        AT_READ_REG(hw, REG_TXQ_CTRL,             p++);
+        AT_READ_REG(hw, REG_MTU,                  p++);
+        AT_READ_REG(hw, REG_WOL_CTRL,             p++);
+
+        atl1c_read_phy_reg(hw, MII_BMCR, &phy_data);
+        regs_buff[73] = (u32) phy_data;
+        atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
+        regs_buff[74] = (u32) phy_data;
+}
+
+static int atl1c_get_eeprom_len(struct net_device *netdev)
+{
+        struct atl1c_adapter *adapter = netdev_priv(netdev);
+
+        if (atl1c_check_eeprom_exist(&adapter->hw))
+                return AT_EEPROM_LEN;
+        else
+                return 0;
+}
+
+static int atl1c_get_eeprom(struct net_device *netdev,
+                struct ethtool_eeprom *eeprom, u8 *bytes)
+{
+        struct atl1c_adapter *adapter = netdev_priv(netdev);
+        struct atl1c_hw *hw = &adapter->hw;
+        u32 *eeprom_buff;
+        int first_dword, last_dword;
+        int ret_val = 0;
+        int i;
+
+        if (eeprom->len == 0)
+                return -EINVAL;
+
+        if (!atl1c_check_eeprom_exist(hw)) /* not exist */
+                return -EINVAL;
+
+        eeprom->magic = adapter->pdev->vendor |
+                        (adapter->pdev->device << 16);
+
+        first_dword = eeprom->offset >> 2;
+        last_dword = (eeprom->offset + eeprom->len - 1) >> 2;
+
+        eeprom_buff = kmalloc(sizeof(u32) *
+                        (last_dword - first_dword + 1), GFP_KERNEL);
+        if (eeprom_buff == NULL)
+                return -ENOMEM;
+
+        for (i = first_dword; i < last_dword; i++) {
+                if (!atl1c_read_eeprom(hw, i * 4, &(eeprom_buff[i-first_dword]))) {
+                        kfree(eeprom_buff);
+                        return -EIO;
+                }
+        }
+
+        memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 3),
+                        eeprom->len);
+        kfree(eeprom_buff);
+
+        return ret_val;
+        return 0;
+}
+
+static void atl1c_get_drvinfo(struct net_device *netdev,
+                struct ethtool_drvinfo *drvinfo)
+{
+        struct atl1c_adapter *adapter = netdev_priv(netdev);
+
+        strncpy(drvinfo->driver,  atl1c_driver_name, sizeof(drvinfo->driver));
+        strncpy(drvinfo->version, atl1c_driver_version,
+                sizeof(drvinfo->version));
+        strncpy(drvinfo->fw_version, "N/A", sizeof(drvinfo->fw_version));
+        strncpy(drvinfo->bus_info, pci_name(adapter->pdev),
+                sizeof(drvinfo->bus_info));
+        drvinfo->n_stats = 0;
+        drvinfo->testinfo_len = 0;
+        drvinfo->regdump_len = atl1c_get_regs_len(netdev);
+        drvinfo->eedump_len = atl1c_get_eeprom_len(netdev);
+}
+
+static void atl1c_get_wol(struct net_device *netdev,
+                          struct ethtool_wolinfo *wol)
+{
+        struct atl1c_adapter *adapter = netdev_priv(netdev);
+
+        wol->supported = WAKE_MAGIC | WAKE_PHY;
+        wol->wolopts = 0;
+
+        if (adapter->wol & AT_WUFC_EX)
+                wol->wolopts |= WAKE_UCAST;
+        if (adapter->wol & AT_WUFC_MC)
+                wol->wolopts |= WAKE_MCAST;
+        if (adapter->wol & AT_WUFC_BC)
+                wol->wolopts |= WAKE_BCAST;
+        if (adapter->wol & AT_WUFC_MAG)
+                wol->wolopts |= WAKE_MAGIC;
+        if (adapter->wol & AT_WUFC_LNKC)
+                wol->wolopts |= WAKE_PHY;
+
+        return;
+}
+
+static int atl1c_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
+{
+        struct atl1c_adapter *adapter = netdev_priv(netdev);
+
+        if (wol->wolopts & (WAKE_ARP | WAKE_MAGICSECURE |
+                            WAKE_MCAST | WAKE_BCAST | WAKE_MCAST))
+                return -EOPNOTSUPP;
+        /* these settings will always override what we currently have */
+        adapter->wol = 0;
+
+        if (wol->wolopts & WAKE_MAGIC)
+                adapter->wol |= AT_WUFC_MAG;
+        if (wol->wolopts & WAKE_PHY)
+                adapter->wol |= AT_WUFC_LNKC;
+
+        return 0;
+}
+
+static int atl1c_nway_reset(struct net_device *netdev)
+{
+        struct atl1c_adapter *adapter = netdev_priv(netdev);
+        if (netif_running(netdev))
+                atl1c_reinit_locked(adapter);
+        return 0;
+}
+
+static struct ethtool_ops atl1c_ethtool_ops = {
+        .get_settings           = atl1c_get_settings,
+        .set_settings           = atl1c_set_settings,
+        .get_drvinfo            = atl1c_get_drvinfo,
+        .get_regs_len           = atl1c_get_regs_len,
+        .get_regs               = atl1c_get_regs,
+        .get_wol                = atl1c_get_wol,
+        .set_wol                = atl1c_set_wol,
+        .get_msglevel           = atl1c_get_msglevel,
+        .set_msglevel           = atl1c_set_msglevel,
+        .nway_reset             = atl1c_nway_reset,
+        .get_link               = ethtool_op_get_link,
+        .get_eeprom_len         = atl1c_get_eeprom_len,
+        .get_eeprom             = atl1c_get_eeprom,
+        .get_tx_csum            = atl1c_get_tx_csum,
+        .get_sg                 = ethtool_op_get_sg,
+        .set_sg                 = ethtool_op_set_sg,
+};
+
+void atl1c_set_ethtool_ops(struct net_device *netdev)
+{
+        SET_ETHTOOL_OPS(netdev, &atl1c_ethtool_ops);
+}
diff --git a/drivers/net/atl1c/atl1c_hw.c b/drivers/net/atl1c/atl1c_hw.c
new file mode 100644
index 000000000000..3e69b940b8f7
--- /dev/null
+++ b/drivers/net/atl1c/atl1c_hw.c
@@ -0,0 +1,527 @@
+/*
+ * Copyright(c) 2007 Atheros Corporation. All rights reserved.
+ *
+ * Derived from Intel e1000 driver
+ * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc., 59
+ * Temple Place - Suite 330, Boston, MA  02111-1307, USA.
+ */
+#include <linux/pci.h>
+#include <linux/delay.h>
+#include <linux/mii.h>
+#include <linux/crc32.h>
+
+#include "atl1c.h"
+
+/*
+ * check_eeprom_exist
+ * return 1 if eeprom exist
+ */
+int atl1c_check_eeprom_exist(struct atl1c_hw *hw)
+{
+        u32 data;
+
+        AT_READ_REG(hw, REG_TWSI_DEBUG, &data);
+        if (data & TWSI_DEBUG_DEV_EXIST)
+                return 1;
+
+        return 0;
+}
+
+void atl1c_hw_set_mac_addr(struct atl1c_hw *hw)
+{
+        u32 value;
+        /*
+         * 00-0B-6A-F6-00-DC
+         * 0:  6AF600DC 1: 000B
+         * low dword
+         */
+        value = (((u32)hw->mac_addr[2]) << 24) |
+                (((u32)hw->mac_addr[3]) << 16) |
+                (((u32)hw->mac_addr[4]) << 8)  |
+                (((u32)hw->mac_addr[5])) ;
+        AT_WRITE_REG_ARRAY(hw, REG_MAC_STA_ADDR, 0, value);
+        /* hight dword */
+        value = (((u32)hw->mac_addr[0]) << 8) |
+                (((u32)hw->mac_addr[1])) ;
+        AT_WRITE_REG_ARRAY(hw, REG_MAC_STA_ADDR, 1, value);
+}
+
+/*
+ * atl1c_get_permanent_address
+ * return 0 if get valid mac address,
+ */
+static int atl1c_get_permanent_address(struct atl1c_hw *hw)
+{
+        u32 addr[2];
+        u32 i;
+        u32 otp_ctrl_data;
+        u32 twsi_ctrl_data;
+        u8  eth_addr[ETH_ALEN];
+
+        /* init */
+        addr[0] = addr[1] = 0;
+        AT_READ_REG(hw, REG_OTP_CTRL, &otp_ctrl_data);
+        if (atl1c_check_eeprom_exist(hw)) {
+                /* Enable OTP CLK */
+                if (!(otp_ctrl_data & OTP_CTRL_CLK_EN)) {
+                        otp_ctrl_data |= OTP_CTRL_CLK_EN;
+                        AT_WRITE_REG(hw, REG_OTP_CTRL, otp_ctrl_data);
+                        AT_WRITE_FLUSH(hw);
+                        msleep(1);
+                }
+
+                AT_READ_REG(hw, REG_TWSI_CTRL, &twsi_ctrl_data);
+                twsi_ctrl_data |= TWSI_CTRL_SW_LDSTART;
+                AT_WRITE_REG(hw, REG_TWSI_CTRL, twsi_ctrl_data);
+                for (i = 0; i < AT_TWSI_EEPROM_TIMEOUT; i++) {
+                        msleep(10);
+                        AT_READ_REG(hw, REG_TWSI_CTRL, &twsi_ctrl_data);
+                        if ((twsi_ctrl_data & TWSI_CTRL_SW_LDSTART) == 0)
+                                break;
+                }
+                if (i >= AT_TWSI_EEPROM_TIMEOUT)
+                        return -1;
+        }
+        /* Disable OTP_CLK */
+        if (otp_ctrl_data & OTP_CTRL_CLK_EN) {
+                otp_ctrl_data &= ~OTP_CTRL_CLK_EN;
+                AT_WRITE_REG(hw, REG_OTP_CTRL, otp_ctrl_data);
+                AT_WRITE_FLUSH(hw);
+                msleep(1);
+        }
+
+        /* maybe MAC-address is from BIOS */
+        AT_READ_REG(hw, REG_MAC_STA_ADDR, &addr[0]);
+        AT_READ_REG(hw, REG_MAC_STA_ADDR + 4, &addr[1]);
+        *(u32 *) &eth_addr[2] = swab32(addr[0]);
+        *(u16 *) &eth_addr[0] = swab16(*(u16 *)&addr[1]);
+
+        if (is_valid_ether_addr(eth_addr)) {
+                memcpy(hw->perm_mac_addr, eth_addr, ETH_ALEN);
+                return 0;
+        }
+
+        return -1;
+}
+
+bool atl1c_read_eeprom(struct atl1c_hw *hw, u32 offset, u32 *p_value)
+{
+        int i;
+        int ret = false;
+        u32 otp_ctrl_data;
+        u32 control;
+        u32 data;
+
+        if (offset & 3)
+                return ret; /* address do not align */
+
+        AT_READ_REG(hw, REG_OTP_CTRL, &otp_ctrl_data);
+        if (!(otp_ctrl_data & OTP_CTRL_CLK_EN))
+                AT_WRITE_REG(hw, REG_OTP_CTRL,
+                                (otp_ctrl_data | OTP_CTRL_CLK_EN));
+
+        AT_WRITE_REG(hw, REG_EEPROM_DATA_LO, 0);
+        control = (offset & EEPROM_CTRL_ADDR_MASK) << EEPROM_CTRL_ADDR_SHIFT;
+        AT_WRITE_REG(hw, REG_EEPROM_CTRL, control);
+
+        for (i = 0; i < 10; i++) {
+                udelay(100);
+                AT_READ_REG(hw, REG_EEPROM_CTRL, &control);
+                if (control & EEPROM_CTRL_RW)
+                        break;
+        }
+        if (control & EEPROM_CTRL_RW) {
+                AT_READ_REG(hw, REG_EEPROM_CTRL, &data);
+                AT_READ_REG(hw, REG_EEPROM_DATA_LO, p_value);
+                data = data & 0xFFFF;
+                *p_value = swab32((data << 16) | (*p_value >> 16));
+                ret = true;
+        }
+        if (!(otp_ctrl_data & OTP_CTRL_CLK_EN))
+                AT_WRITE_REG(hw, REG_OTP_CTRL, otp_ctrl_data);
+
+        return ret;
+}
+/*
+ * Reads the adapter's MAC address from the EEPROM
+ *
+ * hw - Struct containing variables accessed by shared code
+ */
+int atl1c_read_mac_addr(struct atl1c_hw *hw)
+{
+        int err = 0;
+
+        err = atl1c_get_permanent_address(hw);
+        if (err)
+                random_ether_addr(hw->perm_mac_addr);
+
+        memcpy(hw->mac_addr, hw->perm_mac_addr, sizeof(hw->perm_mac_addr));
+        return 0;
+}
+
+/*
+ * atl1c_hash_mc_addr
+ *  purpose
+ *      set hash value for a multicast address
+ *      hash calcu processing :
+ *          1. calcu 32bit CRC for multicast address
+ *          2. reverse crc with MSB to LSB
+ */
+u32 atl1c_hash_mc_addr(struct atl1c_hw *hw, u8 *mc_addr)
+{
+        u32 crc32;
+        u32 value = 0;
+        int i;
+
+        crc32 = ether_crc_le(6, mc_addr);
+        for (i = 0; i < 32; i++)
+                value |= (((crc32 >> i) & 1) << (31 - i));
+
+        return value;
+}
+
+/*
+ * Sets the bit in the multicast table corresponding to the hash value.
+ * hw - Struct containing variables accessed by shared code
+ * hash_value - Multicast address hash value
+ */
+void atl1c_hash_set(struct atl1c_hw *hw, u32 hash_value)
+{
+        u32 hash_bit, hash_reg;
+        u32 mta;
+
+        /*
+         * The HASH Table  is a register array of 2 32-bit registers.
+         * It is treated like an array of 64 bits.  We want to set
+         * bit BitArray[hash_value]. So we figure out what register
+         * the bit is in, read it, OR in the new bit, then write
+         * back the new value.  The register is determined by the
+         * upper bit of the hash value and the bit within that
+         * register are determined by the lower 5 bits of the value.
+         */
+        hash_reg = (hash_value >> 31) & 0x1;
+        hash_bit = (hash_value >> 26) & 0x1F;
+
+        mta = AT_READ_REG_ARRAY(hw, REG_RX_HASH_TABLE, hash_reg);
+
+        mta |= (1 << hash_bit);
+
+        AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, hash_reg, mta);
+}
+
+/*
+ * Reads the value from a PHY register
+ * hw - Struct containing variables accessed by shared code
+ * reg_addr - address of the PHY register to read
+ */
+int atl1c_read_phy_reg(struct atl1c_hw *hw, u16 reg_addr, u16 *phy_data)
+{
+        u32 val;
+        int i;
+
+        val = ((u32)(reg_addr & MDIO_REG_ADDR_MASK)) << MDIO_REG_ADDR_SHIFT |
+                MDIO_START | MDIO_SUP_PREAMBLE | MDIO_RW |
+                MDIO_CLK_25_4 << MDIO_CLK_SEL_SHIFT;
+
+        AT_WRITE_REG(hw, REG_MDIO_CTRL, val);
+
+        for (i = 0; i < MDIO_WAIT_TIMES; i++) {
+                udelay(2);
+                AT_READ_REG(hw, REG_MDIO_CTRL, &val);
+                if (!(val & (MDIO_START | MDIO_BUSY)))
+                        break;
+        }
+        if (!(val & (MDIO_START | MDIO_BUSY))) {
+                *phy_data = (u16)val;
+                return 0;
+        }
+
+        return -1;
+}
+
+/*
+ * Writes a value to a PHY register
+ * hw - Struct containing variables accessed by shared code
+ * reg_addr - address of the PHY register to write
+ * data - data to write to the PHY
+ */
+int atl1c_write_phy_reg(struct atl1c_hw *hw, u32 reg_addr, u16 phy_data)
+{
+        int i;
+        u32 val;
+
+        val = ((u32)(phy_data & MDIO_DATA_MASK)) << MDIO_DATA_SHIFT   |
+               (reg_addr & MDIO_REG_ADDR_MASK) << MDIO_REG_ADDR_SHIFT |
+               MDIO_SUP_PREAMBLE | MDIO_START |
+               MDIO_CLK_25_4 << MDIO_CLK_SEL_SHIFT;
+
+        AT_WRITE_REG(hw, REG_MDIO_CTRL, val);
+
+        for (i = 0; i < MDIO_WAIT_TIMES; i++) {
+                udelay(2);
+                AT_READ_REG(hw, REG_MDIO_CTRL, &val);
+                if (!(val & (MDIO_START | MDIO_BUSY)))
+                        break;
+        }
+
+        if (!(val & (MDIO_START | MDIO_BUSY)))
+                return 0;
+
+        return -1;
+}
+
+/*
+ * Configures PHY autoneg and flow control advertisement settings
+ *
+ * hw - Struct containing variables accessed by shared code
+ */
+static int atl1c_phy_setup_adv(struct atl1c_hw *hw)
+{
+        u16 mii_adv_data = ADVERTISE_DEFAULT_CAP & ~ADVERTISE_SPEED_MASK;
+        u16 mii_giga_ctrl_data = GIGA_CR_1000T_DEFAULT_CAP &
+                                ~GIGA_CR_1000T_SPEED_MASK;
+
+        if (hw->autoneg_advertised & ADVERTISED_10baseT_Half)
+                mii_adv_data |= ADVERTISE_10HALF;
+        if (hw->autoneg_advertised & ADVERTISED_10baseT_Full)
+                mii_adv_data |= ADVERTISE_10FULL;
+        if (hw->autoneg_advertised & ADVERTISED_100baseT_Half)
+                mii_adv_data |= ADVERTISE_100HALF;
+        if (hw->autoneg_advertised & ADVERTISED_100baseT_Full)
+                mii_adv_data |= ADVERTISE_100FULL;
+
+        if (hw->autoneg_advertised & ADVERTISED_Autoneg)
+                mii_adv_data |= ADVERTISE_10HALF  | ADVERTISE_10FULL |
+                                ADVERTISE_100HALF | ADVERTISE_100FULL;
+
+        if (hw->ctrl_flags & ATL1C_LINK_CAP_1000M) {
+                if (hw->autoneg_advertised & ADVERTISED_1000baseT_Half)
+                        mii_giga_ctrl_data |= ADVERTISE_1000HALF;
+                if (hw->autoneg_advertised & ADVERTISED_1000baseT_Full)
+                        mii_giga_ctrl_data |= ADVERTISE_1000FULL;
+                if (hw->autoneg_advertised & ADVERTISED_Autoneg)
+                        mii_giga_ctrl_data |= ADVERTISE_1000HALF |
+                                        ADVERTISE_1000FULL;
+        }
+
+        if (atl1c_write_phy_reg(hw, MII_ADVERTISE, mii_adv_data) != 0 ||
+            atl1c_write_phy_reg(hw, MII_GIGA_CR, mii_giga_ctrl_data) != 0)
+                return -1;
+        return 0;
+}
+
+void atl1c_phy_disable(struct atl1c_hw *hw)
+{
+        AT_WRITE_REGW(hw, REG_GPHY_CTRL,
+                        GPHY_CTRL_PW_WOL_DIS | GPHY_CTRL_EXT_RESET);
+}
+
+static void atl1c_phy_magic_data(struct atl1c_hw *hw)
+{
+        u16 data;
+
+        data = ANA_LOOP_SEL_10BT | ANA_EN_MASK_TB | ANA_EN_10BT_IDLE |
+                ((1 & ANA_INTERVAL_SEL_TIMER_MASK) <<
+                ANA_INTERVAL_SEL_TIMER_SHIFT);
+
+        atl1c_write_phy_reg(hw, MII_DBG_ADDR, MII_ANA_CTRL_18);
+        atl1c_write_phy_reg(hw, MII_DBG_DATA, data);
+
+        data = (2 & ANA_SERDES_CDR_BW_MASK) | ANA_MS_PAD_DBG |
+                ANA_SERDES_EN_DEEM | ANA_SERDES_SEL_HSP | ANA_SERDES_EN_PLL |
+                ANA_SERDES_EN_LCKDT;
+
+        atl1c_write_phy_reg(hw, MII_DBG_ADDR, MII_ANA_CTRL_5);
+        atl1c_write_phy_reg(hw, MII_DBG_DATA, data);
+
+        data = (44 & ANA_LONG_CABLE_TH_100_MASK) |
+                ((33 & ANA_SHORT_CABLE_TH_100_MASK) <<
+                ANA_SHORT_CABLE_TH_100_SHIFT) | ANA_BP_BAD_LINK_ACCUM |
+                ANA_BP_SMALL_BW;
+
+        atl1c_write_phy_reg(hw, MII_DBG_ADDR, MII_ANA_CTRL_54);
+        atl1c_write_phy_reg(hw, MII_DBG_DATA, data);
+
+        data = (11 & ANA_IECHO_ADJ_MASK) | ((11 & ANA_IECHO_ADJ_MASK) <<
+                ANA_IECHO_ADJ_2_SHIFT) | ((8 & ANA_IECHO_ADJ_MASK) <<
+                ANA_IECHO_ADJ_1_SHIFT) | ((8 & ANA_IECHO_ADJ_MASK) <<
+                ANA_IECHO_ADJ_0_SHIFT);
+
+        atl1c_write_phy_reg(hw, MII_DBG_ADDR, MII_ANA_CTRL_4);
+        atl1c_write_phy_reg(hw, MII_DBG_DATA, data);
+
+        data = ANA_RESTART_CAL | ((7 & ANA_MANUL_SWICH_ON_MASK) <<
+                ANA_MANUL_SWICH_ON_SHIFT) | ANA_MAN_ENABLE |
+                ANA_SEL_HSP | ANA_EN_HB | ANA_OEN_125M;
+
+        atl1c_write_phy_reg(hw, MII_DBG_ADDR, MII_ANA_CTRL_0);
+        atl1c_write_phy_reg(hw, MII_DBG_DATA, data);
+
+        if (hw->ctrl_flags & ATL1C_HIB_DISABLE) {
+                atl1c_write_phy_reg(hw, MII_DBG_ADDR, MII_ANA_CTRL_41);
+                if (atl1c_read_phy_reg(hw, MII_DBG_DATA, &data) != 0)
+                        return;
+                data &= ~ANA_TOP_PS_EN;
+                atl1c_write_phy_reg(hw, MII_DBG_DATA, data);
+
+                atl1c_write_phy_reg(hw, MII_DBG_ADDR, MII_ANA_CTRL_11);
+                if (atl1c_read_phy_reg(hw, MII_DBG_DATA, &data) != 0)
+                        return;
+                data &= ~ANA_PS_HIB_EN;
+                atl1c_write_phy_reg(hw, MII_DBG_DATA, data);
+        }
+}
+
+int atl1c_phy_reset(struct atl1c_hw *hw)
+{
+        struct atl1c_adapter *adapter = hw->adapter;
+        struct pci_dev *pdev = adapter->pdev;
+        u32 phy_ctrl_data = GPHY_CTRL_DEFAULT;
+        u32 mii_ier_data = IER_LINK_UP | IER_LINK_DOWN;
+        int err;
+
+        if (hw->ctrl_flags & ATL1C_HIB_DISABLE)
+                phy_ctrl_data &= ~GPHY_CTRL_HIB_EN;
+
+        AT_WRITE_REG(hw, REG_GPHY_CTRL, phy_ctrl_data);
+        AT_WRITE_FLUSH(hw);
+        msleep(40);
+        phy_ctrl_data |= GPHY_CTRL_EXT_RESET;
+        AT_WRITE_REG(hw, REG_GPHY_CTRL, phy_ctrl_data);
+        AT_WRITE_FLUSH(hw);
+        msleep(10);
+
+        /*Enable PHY LinkChange Interrupt */
+        err = atl1c_write_phy_reg(hw, MII_IER, mii_ier_data);
+        if (err) {
+                if (netif_msg_hw(adapter))
+                        dev_err(&pdev->dev,
+                                "Error enable PHY linkChange Interrupt\n");
+                return err;
+        }
+        if (!(hw->ctrl_flags & ATL1C_FPGA_VERSION))
+                atl1c_phy_magic_data(hw);
+        return 0;
+}
+
+int atl1c_phy_init(struct atl1c_hw *hw)
+{
+        struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter;
+        struct pci_dev *pdev = adapter->pdev;
+        int ret_val;
+        u16 mii_bmcr_data = BMCR_RESET;
+        u16 phy_id1, phy_id2;
+
+        if ((atl1c_read_phy_reg(hw, MII_PHYSID1, &phy_id1) != 0) ||
+                (atl1c_read_phy_reg(hw, MII_PHYSID2, &phy_id2) != 0)) {
+                        if (netif_msg_link(adapter))
+                                dev_err(&pdev->dev, "Error get phy ID\n");
+                return -1;
+        }
+        switch (hw->media_type) {
+        case MEDIA_TYPE_AUTO_SENSOR:
+                ret_val = atl1c_phy_setup_adv(hw);
+                if (ret_val) {
+                        if (netif_msg_link(adapter))
+                                dev_err(&pdev->dev,
+                                        "Error Setting up Auto-Negotiation\n");
+                        return ret_val;
+                }
+                mii_bmcr_data |= BMCR_AUTO_NEG_EN | BMCR_RESTART_AUTO_NEG;
+                break;
+        case MEDIA_TYPE_100M_FULL:
+                mii_bmcr_data |= BMCR_SPEED_100 | BMCR_FULL_DUPLEX;
+                break;
+        case MEDIA_TYPE_100M_HALF:
+                mii_bmcr_data |= BMCR_SPEED_100;
+                break;
+        case MEDIA_TYPE_10M_FULL:
+                mii_bmcr_data |= BMCR_SPEED_10 | BMCR_FULL_DUPLEX;
+                break;
+        case MEDIA_TYPE_10M_HALF:
+                mii_bmcr_data |= BMCR_SPEED_10;
+                break;
+        default:
+                if (netif_msg_link(adapter))
+                        dev_err(&pdev->dev, "Wrong Media type %d\n",
+                                hw->media_type);
+                return -1;
+                break;
+        }
+
+        ret_val = atl1c_write_phy_reg(hw, MII_BMCR, mii_bmcr_data);
+        if (ret_val)
+                return ret_val;
+        hw->phy_configured = true;
+
+        return 0;
+}
+
+/*
+ * Detects the current speed and duplex settings of the hardware.
+ *
+ * hw - Struct containing variables accessed by shared code
+ * speed - Speed of the connection
+ * duplex - Duplex setting of the connection
+ */
+int atl1c_get_speed_and_duplex(struct atl1c_hw *hw, u16 *speed, u16 *duplex)
+{
+        int err;
+        u16 phy_data;
+
+        /* Read   PHY Specific Status Register (17) */
+        err = atl1c_read_phy_reg(hw, MII_GIGA_PSSR, &phy_data);
+        if (err)
+                return err;
+
+        if (!(phy_data & GIGA_PSSR_SPD_DPLX_RESOLVED))
+                return -1;
+
+        switch (phy_data & GIGA_PSSR_SPEED) {
+        case GIGA_PSSR_1000MBS:
+                *speed = SPEED_1000;
+                break;
+        case GIGA_PSSR_100MBS:
+                *speed = SPEED_100;
+                break;
+        case  GIGA_PSSR_10MBS:
+                *speed = SPEED_10;
+                break;
+        default:
+                return -1;
+                break;
+        }
+
+        if (phy_data & GIGA_PSSR_DPLX)
+                *duplex = FULL_DUPLEX;
+        else
+                *duplex = HALF_DUPLEX;
+
+        return 0;
+}
+
+int atl1c_restart_autoneg(struct atl1c_hw *hw)
+{
+        int err = 0;
+        u16 mii_bmcr_data = BMCR_RESET;
+
+        err = atl1c_phy_setup_adv(hw);
+        if (err)
+                return err;
+        mii_bmcr_data |= BMCR_AUTO_NEG_EN | BMCR_RESTART_AUTO_NEG;
+
+        return atl1c_write_phy_reg(hw, MII_BMCR, mii_bmcr_data);
+}
diff --git a/drivers/net/atl1c/atl1c_hw.h b/drivers/net/atl1c/atl1c_hw.h
new file mode 100644
index 000000000000..c2c738df5c63
--- /dev/null
+++ b/drivers/net/atl1c/atl1c_hw.h
@@ -0,0 +1,859 @@
+/*
+ * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
+ *
+ * Derived from Intel e1000 driver
+ * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc., 59
+ * Temple Place - Suite 330, Boston, MA  02111-1307, USA.
+ */
+
+#ifndef _ATL1C_HW_H_
+#define _ATL1C_HW_H_
+
+#include <linux/types.h>
+#include <linux/mii.h>
+
+struct atl1c_adapter;
+struct atl1c_hw;
+
+/* function prototype */
+void atl1c_phy_disable(struct atl1c_hw *hw);
+void atl1c_hw_set_mac_addr(struct atl1c_hw *hw);
+int atl1c_phy_reset(struct atl1c_hw *hw);
+int atl1c_read_mac_addr(struct atl1c_hw *hw);
+int atl1c_get_speed_and_duplex(struct atl1c_hw *hw, u16 *speed, u16 *duplex);
+u32 atl1c_hash_mc_addr(struct atl1c_hw *hw, u8 *mc_addr);
+void atl1c_hash_set(struct atl1c_hw *hw, u32 hash_value);
+int atl1c_read_phy_reg(struct atl1c_hw *hw, u16 reg_addr, u16 *phy_data);
+int atl1c_write_phy_reg(struct atl1c_hw *hw, u32 reg_addr, u16 phy_data);
+bool atl1c_read_eeprom(struct atl1c_hw *hw, u32 offset, u32 *p_value);
+int atl1c_phy_init(struct atl1c_hw *hw);
+int atl1c_check_eeprom_exist(struct atl1c_hw *hw);
+int atl1c_restart_autoneg(struct atl1c_hw *hw);
+
+/* register definition */
+#define REG_DEVICE_CAP                  0x5C
+#define DEVICE_CAP_MAX_PAYLOAD_MASK     0x7
+#define DEVICE_CAP_MAX_PAYLOAD_SHIFT    0
+
+#define REG_DEVICE_CTRL                 0x60
+#define DEVICE_CTRL_MAX_PAYLOAD_MASK    0x7
+#define DEVICE_CTRL_MAX_PAYLOAD_SHIFT   5
+#define DEVICE_CTRL_MAX_RREQ_SZ_MASK    0x7
+#define DEVICE_CTRL_MAX_RREQ_SZ_SHIFT   12
+
+#define REG_LINK_CTRL                   0x68
+#define LINK_CTRL_L0S_EN                0x01
+#define LINK_CTRL_L1_EN                 0x02
+
+#define REG_VPD_CAP                     0x6C
+#define VPD_CAP_ID_MASK                 0xff
+#define VPD_CAP_ID_SHIFT                0
+#define VPD_CAP_NEXT_PTR_MASK           0xFF
+#define VPD_CAP_NEXT_PTR_SHIFT          8
+#define VPD_CAP_VPD_ADDR_MASK           0x7FFF
+#define VPD_CAP_VPD_ADDR_SHIFT          16
+#define VPD_CAP_VPD_FLAG                0x80000000
+
+#define REG_VPD_DATA                    0x70
+
+#define REG_PCIE_UC_SEVERITY            0x10C
+#define PCIE_UC_SERVRITY_TRN            0x00000001
+#define PCIE_UC_SERVRITY_DLP            0x00000010
+#define PCIE_UC_SERVRITY_PSN_TLP        0x00001000
+#define PCIE_UC_SERVRITY_FCP            0x00002000
+#define PCIE_UC_SERVRITY_CPL_TO         0x00004000
+#define PCIE_UC_SERVRITY_CA             0x00008000
+#define PCIE_UC_SERVRITY_UC             0x00010000
+#define PCIE_UC_SERVRITY_ROV            0x00020000
+#define PCIE_UC_SERVRITY_MLFP           0x00040000
+#define PCIE_UC_SERVRITY_ECRC           0x00080000
+#define PCIE_UC_SERVRITY_UR             0x00100000
+
+#define REG_DEV_SERIALNUM_CTRL          0x200
+#define REG_DEV_MAC_SEL_MASK            0x0 /* 0:EUI; 1:MAC */
+#define REG_DEV_MAC_SEL_SHIFT           0
+#define REG_DEV_SERIAL_NUM_EN_MASK      0x1
+#define REG_DEV_SERIAL_NUM_EN_SHIFT     1
+
+#define REG_TWSI_CTRL                   0x218
+#define TWSI_CTRL_LD_OFFSET_MASK        0xFF
+#define TWSI_CTRL_LD_OFFSET_SHIFT       0
+#define TWSI_CTRL_LD_SLV_ADDR_MASK      0x7
+#define TWSI_CTRL_LD_SLV_ADDR_SHIFT     8
+#define TWSI_CTRL_SW_LDSTART            0x800
+#define TWSI_CTRL_HW_LDSTART            0x1000
+#define TWSI_CTRL_SMB_SLV_ADDR_MASK     0x7F
+#define TWSI_CTRL_SMB_SLV_ADDR_SHIFT    15
+#define TWSI_CTRL_LD_EXIST              0x400000
+#define TWSI_CTRL_READ_FREQ_SEL_MASK    0x3
+#define TWSI_CTRL_READ_FREQ_SEL_SHIFT   23
+#define TWSI_CTRL_FREQ_SEL_100K         0
+#define TWSI_CTRL_FREQ_SEL_200K         1
+#define TWSI_CTRL_FREQ_SEL_300K         2
+#define TWSI_CTRL_FREQ_SEL_400K         3
+#define TWSI_CTRL_SMB_SLV_ADDR
+#define TWSI_CTRL_WRITE_FREQ_SEL_MASK   0x3
+#define TWSI_CTRL_WRITE_FREQ_SEL_SHIFT  24
+
+
+#define REG_PCIE_DEV_MISC_CTRL          0x21C
+#define PCIE_DEV_MISC_EXT_PIPE          0x2
+#define PCIE_DEV_MISC_RETRY_BUFDIS      0x1
+#define PCIE_DEV_MISC_SPIROM_EXIST      0x4
+#define PCIE_DEV_MISC_SERDES_ENDIAN     0x8
+#define PCIE_DEV_MISC_SERDES_SEL_DIN    0x10
+
+#define REG_PCIE_PHYMISC                0x1000
+#define PCIE_PHYMISC_FORCE_RCV_DET      0x4
+
+#define REG_TWSI_DEBUG                  0x1108
+#define TWSI_DEBUG_DEV_EXIST            0x20000000
+
+#define REG_EEPROM_CTRL                 0x12C0
+#define EEPROM_CTRL_DATA_HI_MASK        0xFFFF
+#define EEPROM_CTRL_DATA_HI_SHIFT       0
+#define EEPROM_CTRL_ADDR_MASK           0x3FF
+#define EEPROM_CTRL_ADDR_SHIFT          16
+#define EEPROM_CTRL_ACK                 0x40000000
+#define EEPROM_CTRL_RW                  0x80000000
+
+#define REG_EEPROM_DATA_LO              0x12C4
+
+#define REG_OTP_CTRL                    0x12F0
+#define OTP_CTRL_CLK_EN                 0x0002
+
+#define REG_PM_CTRL                     0x12F8
+#define PM_CTRL_SDES_EN                 0x00000001
+#define PM_CTRL_RBER_EN                 0x00000002
+#define PM_CTRL_CLK_REQ_EN              0x00000004
+#define PM_CTRL_ASPM_L1_EN              0x00000008
+#define PM_CTRL_SERDES_L1_EN            0x00000010
+#define PM_CTRL_SERDES_PLL_L1_EN        0x00000020
+#define PM_CTRL_SERDES_PD_EX_L1         0x00000040
+#define PM_CTRL_SERDES_BUDS_RX_L1_EN    0x00000080
+#define PM_CTRL_L0S_ENTRY_TIMER_MASK    0xF
+#define PM_CTRL_L0S_ENTRY_TIMER_SHIFT   8
+#define PM_CTRL_ASPM_L0S_EN             0x00001000
+#define PM_CTRL_CLK_SWH_L1              0x00002000
+#define PM_CTRL_CLK_PWM_VER1_1          0x00004000
+#define PM_CTRL_PCIE_RECV               0x00008000
+#define PM_CTRL_L1_ENTRY_TIMER_MASK     0xF
+#define PM_CTRL_L1_ENTRY_TIMER_SHIFT    16
+#define PM_CTRL_PM_REQ_TIMER_MASK       0xF
+#define PM_CTRL_PM_REQ_TIMER_SHIFT      20
+#define PM_CTRL_LCKDET_TIMER_MASK       0x3F
+#define PM_CTRL_LCKDET_TIMER_SHIFT      24
+#define PM_CTRL_MAC_ASPM_CHK            0x40000000
+#define PM_CTRL_HOTRST                  0x80000000
+
+/* Selene Master Control Register */
+#define REG_MASTER_CTRL                 0x1400
+#define MASTER_CTRL_SOFT_RST            0x1
+#define MASTER_CTRL_TEST_MODE_MASK      0x3
+#define MASTER_CTRL_TEST_MODE_SHIFT     2
+#define MASTER_CTRL_BERT_START          0x10
+#define MASTER_CTRL_MTIMER_EN           0x100
+#define MASTER_CTRL_MANUAL_INT          0x200
+#define MASTER_CTRL_TX_ITIMER_EN        0x400
+#define MASTER_CTRL_RX_ITIMER_EN        0x800
+#define MASTER_CTRL_CLK_SEL_DIS         0x1000
+#define MASTER_CTRL_CLK_SWH_MODE        0x2000
+#define MASTER_CTRL_INT_RDCLR           0x4000
+#define MASTER_CTRL_REV_NUM_SHIFT       16
+#define MASTER_CTRL_REV_NUM_MASK        0xff
+#define MASTER_CTRL_DEV_ID_SHIFT        24
+#define MASTER_CTRL_DEV_ID_MASK         0x7f
+#define MASTER_CTRL_OTP_SEL             0x80000000
+
+/* Timer Initial Value Register */
+#define REG_MANUAL_TIMER_INIT           0x1404
+
+/* IRQ ModeratorTimer Initial Value Register */
+#define REG_IRQ_MODRT_TIMER_INIT        0x1408
+#define IRQ_MODRT_TIMER_MASK            0xffff
+#define IRQ_MODRT_TX_TIMER_SHIFT        0
+#define IRQ_MODRT_RX_TIMER_SHIFT        16
+
+#define REG_GPHY_CTRL                   0x140C
+#define GPHY_CTRL_EXT_RESET             0x1
+#define GPHY_CTRL_RTL_MODE              0x2
+#define GPHY_CTRL_LED_MODE              0x4
+#define GPHY_CTRL_ANEG_NOW              0x8
+#define GPHY_CTRL_REV_ANEG              0x10
+#define GPHY_CTRL_GATE_25M_EN           0x20
+#define GPHY_CTRL_LPW_EXIT              0x40
+#define GPHY_CTRL_PHY_IDDQ              0x80
+#define GPHY_CTRL_PHY_IDDQ_DIS          0x100
+#define GPHY_CTRL_GIGA_DIS              0x200
+#define GPHY_CTRL_HIB_EN                0x400
+#define GPHY_CTRL_HIB_PULSE             0x800
+#define GPHY_CTRL_SEL_ANA_RST           0x1000
+#define GPHY_CTRL_PHY_PLL_ON            0x2000
+#define GPHY_CTRL_PWDOWN_HW             0x4000
+#define GPHY_CTRL_PHY_PLL_BYPASS        0x8000
+
+#define GPHY_CTRL_DEFAULT (              \
+                GPHY_CTRL_SEL_ANA_RST   |\
+                GPHY_CTRL_HIB_PULSE     |\
+                GPHY_CTRL_HIB_EN)
+
+#define GPHY_CTRL_PW_WOL_DIS (           \
+                GPHY_CTRL_SEL_ANA_RST   |\
+                GPHY_CTRL_HIB_PULSE     |\
+                GPHY_CTRL_HIB_EN        |\
+                GPHY_CTRL_PWDOWN_HW     |\
+                GPHY_CTRL_PHY_IDDQ)
+
+/* Block IDLE Status Register */
+#define REG_IDLE_STATUS                 0x1410
+#define IDLE_STATUS_MASK                0x00FF
+#define IDLE_STATUS_RXMAC_NO_IDLE       0x1
+#define IDLE_STATUS_TXMAC_NO_IDLE       0x2
+#define IDLE_STATUS_RXQ_NO_IDLE         0x4
+#define IDLE_STATUS_TXQ_NO_IDLE         0x8
+#define IDLE_STATUS_DMAR_NO_IDLE        0x10
+#define IDLE_STATUS_DMAW_NO_IDLE        0x20
+#define IDLE_STATUS_SMB_NO_IDLE         0x40
+#define IDLE_STATUS_CMB_NO_IDLE         0x80
+
+/* MDIO Control Register */
+#define REG_MDIO_CTRL                   0x1414
+#define MDIO_DATA_MASK                  0xffff  /* On MDIO write, the 16-bit
+                                                 * control data to write to PHY
+                                                 * MII management register */
+#define MDIO_DATA_SHIFT                 0       /* On MDIO read, the 16-bit
+                                                 * status data that was read
+                                                 * from the PHY MII management register */
+#define MDIO_REG_ADDR_MASK              0x1f    /* MDIO register address */
+#define MDIO_REG_ADDR_SHIFT             16
+#define MDIO_RW                         0x200000  /* 1: read, 0: write */
+#define MDIO_SUP_PREAMBLE               0x400000  /* Suppress preamble */
+#define MDIO_START                      0x800000  /* Write 1 to initiate the MDIO
+                                                   * master. And this bit is self
+                                                   * cleared after one cycle */
+#define MDIO_CLK_SEL_SHIFT              24
+#define MDIO_CLK_25_4                   0
+#define MDIO_CLK_25_6                   2
+#define MDIO_CLK_25_8                   3
+#define MDIO_CLK_25_10                  4
+#define MDIO_CLK_25_14                  5
+#define MDIO_CLK_25_20                  6
+#define MDIO_CLK_25_28                  7
+#define MDIO_BUSY                       0x8000000
+#define MDIO_AP_EN                      0x10000000
+#define MDIO_WAIT_TIMES                 10
+
+/* MII PHY Status Register */
+#define REG_PHY_STATUS                  0x1418
+#define PHY_GENERAL_STATUS_MASK         0xFFFF
+#define PHY_STATUS_RECV_ENABLE          0x0001
+#define PHY_OE_PWSP_STATUS_MASK         0x07FF
+#define PHY_OE_PWSP_STATUS_SHIFT        16
+#define PHY_STATUS_LPW_STATE            0x80000000
+/* BIST Control and Status Register0 (for the Packet Memory) */
+#define REG_BIST0_CTRL                  0x141c
+#define BIST0_NOW                       0x1
+#define BIST0_SRAM_FAIL                 0x2 /* 1: The SRAM failure is
+                                             * un-repairable  because
+                                             * it has address decoder
+                                             * failure or more than 1 cell
+                                             * stuck-to-x failure */
+#define BIST0_FUSE_FLAG                 0x4
+
+/* BIST Control and Status Register1(for the retry buffer of PCI Express) */
+#define REG_BIST1_CTRL                  0x1420
+#define BIST1_NOW                       0x1
+#define BIST1_SRAM_FAIL                 0x2
+#define BIST1_FUSE_FLAG                 0x4
+
+/* SerDes Lock Detect Control and Status Register */
+#define REG_SERDES_LOCK                 0x1424
+#define SERDES_LOCK_DETECT              0x1  /* SerDes lock detected. This signal
+                                              * comes from Analog SerDes */
+#define SERDES_LOCK_DETECT_EN           0x2  /* 1: Enable SerDes Lock detect function */
+
+/* MAC Control Register  */
+#define REG_MAC_CTRL                    0x1480
+#define MAC_CTRL_TX_EN                  0x1
+#define MAC_CTRL_RX_EN                  0x2
+#define MAC_CTRL_TX_FLOW                0x4
+#define MAC_CTRL_RX_FLOW                0x8
+#define MAC_CTRL_LOOPBACK               0x10
+#define MAC_CTRL_DUPLX                  0x20
+#define MAC_CTRL_ADD_CRC                0x40
+#define MAC_CTRL_PAD                    0x80
+#define MAC_CTRL_LENCHK                 0x100
+#define MAC_CTRL_HUGE_EN                0x200
+#define MAC_CTRL_PRMLEN_SHIFT           10
+#define MAC_CTRL_PRMLEN_MASK            0xf
+#define MAC_CTRL_RMV_VLAN               0x4000
+#define MAC_CTRL_PROMIS_EN              0x8000
+#define MAC_CTRL_TX_PAUSE               0x10000
+#define MAC_CTRL_SCNT                   0x20000
+#define MAC_CTRL_SRST_TX                0x40000
+#define MAC_CTRL_TX_SIMURST             0x80000
+#define MAC_CTRL_SPEED_SHIFT            20
+#define MAC_CTRL_SPEED_MASK             0x3
+#define MAC_CTRL_DBG_TX_BKPRESURE       0x400000
+#define MAC_CTRL_TX_HUGE                0x800000
+#define MAC_CTRL_RX_CHKSUM_EN           0x1000000
+#define MAC_CTRL_MC_ALL_EN              0x2000000
+#define MAC_CTRL_BC_EN                  0x4000000
+#define MAC_CTRL_DBG                    0x8000000
+#define MAC_CTRL_SINGLE_PAUSE_EN        0x10000000
+
+/* MAC IPG/IFG Control Register  */
+#define REG_MAC_IPG_IFG                 0x1484
+#define MAC_IPG_IFG_IPGT_SHIFT          0       /* Desired back to back
+                                                 * inter-packet gap. The
+                                                 * default is 96-bit time */
+#define MAC_IPG_IFG_IPGT_MASK           0x7f
+#define MAC_IPG_IFG_MIFG_SHIFT          8       /* Minimum number of IFG to
+                                                 * enforce in between RX frames */
+#define MAC_IPG_IFG_MIFG_MASK           0xff    /* Frame gap below such IFP is dropped */
+#define MAC_IPG_IFG_IPGR1_SHIFT         16      /* 64bit Carrier-Sense window */
+#define MAC_IPG_IFG_IPGR1_MASK          0x7f
+#define MAC_IPG_IFG_IPGR2_SHIFT         24      /* 96-bit IPG window */
+#define MAC_IPG_IFG_IPGR2_MASK          0x7f
+
+/* MAC STATION ADDRESS  */
+#define REG_MAC_STA_ADDR                0x1488
+
+/* Hash table for multicast address */
+#define REG_RX_HASH_TABLE               0x1490
+
+/* MAC Half-Duplex Control Register */
+#define REG_MAC_HALF_DUPLX_CTRL         0x1498
+#define MAC_HALF_DUPLX_CTRL_LCOL_SHIFT  0      /* Collision Window */
+#define MAC_HALF_DUPLX_CTRL_LCOL_MASK   0x3ff
+#define MAC_HALF_DUPLX_CTRL_RETRY_SHIFT 12
+#define MAC_HALF_DUPLX_CTRL_RETRY_MASK  0xf
+#define MAC_HALF_DUPLX_CTRL_EXC_DEF_EN  0x10000
+#define MAC_HALF_DUPLX_CTRL_NO_BACK_C   0x20000
+#define MAC_HALF_DUPLX_CTRL_NO_BACK_P   0x40000 /* No back-off on backpressure,
+                                                 * immediately start the
+                                                 * transmission after back pressure */
+#define MAC_HALF_DUPLX_CTRL_ABEBE        0x80000 /* 1: Alternative Binary Exponential Back-off Enabled */
+#define MAC_HALF_DUPLX_CTRL_ABEBT_SHIFT  20      /* Maximum binary exponential number */
+#define MAC_HALF_DUPLX_CTRL_ABEBT_MASK   0xf
+#define MAC_HALF_DUPLX_CTRL_JAMIPG_SHIFT 24      /* IPG to start JAM for collision based flow control in half-duplex */
+#define MAC_HALF_DUPLX_CTRL_JAMIPG_MASK  0xf     /* mode. In unit of 8-bit time */
+
+/* Maximum Frame Length Control Register   */
+#define REG_MTU                         0x149c
+
+/* Wake-On-Lan control register */
+#define REG_WOL_CTRL                    0x14a0
+#define WOL_PATTERN_EN                  0x00000001
+#define WOL_PATTERN_PME_EN              0x00000002
+#define WOL_MAGIC_EN                    0x00000004
+#define WOL_MAGIC_PME_EN                0x00000008
+#define WOL_LINK_CHG_EN                 0x00000010
+#define WOL_LINK_CHG_PME_EN             0x00000020
+#define WOL_PATTERN_ST                  0x00000100
+#define WOL_MAGIC_ST                    0x00000200
+#define WOL_LINKCHG_ST                  0x00000400
+#define WOL_CLK_SWITCH_EN               0x00008000
+#define WOL_PT0_EN                      0x00010000
+#define WOL_PT1_EN                      0x00020000
+#define WOL_PT2_EN                      0x00040000
+#define WOL_PT3_EN                      0x00080000
+#define WOL_PT4_EN                      0x00100000
+#define WOL_PT5_EN                      0x00200000
+#define WOL_PT6_EN                      0x00400000
+
+/* WOL Length ( 2 DWORD ) */
+#define REG_WOL_PATTERN_LEN             0x14a4
+#define WOL_PT_LEN_MASK                 0x7f
+#define WOL_PT0_LEN_SHIFT               0
+#define WOL_PT1_LEN_SHIFT               8
+#define WOL_PT2_LEN_SHIFT               16
+#define WOL_PT3_LEN_SHIFT               24
+#define WOL_PT4_LEN_SHIFT               0
+#define WOL_PT5_LEN_SHIFT               8
+#define WOL_PT6_LEN_SHIFT               16
+
+/* Internal SRAM Partition Register */
+#define RFDX_HEAD_ADDR_MASK             0x03FF
+#define RFDX_HARD_ADDR_SHIFT            0
+#define RFDX_TAIL_ADDR_MASK             0x03FF
+#define RFDX_TAIL_ADDR_SHIFT            16
+
+#define REG_SRAM_RFD0_INFO              0x1500
+#define REG_SRAM_RFD1_INFO              0x1504
+#define REG_SRAM_RFD2_INFO              0x1508
+#define REG_SRAM_RFD3_INFO              0x150C
+
+#define REG_RFD_NIC_LEN                 0x1510 /* In 8-bytes */
+#define RFD_NIC_LEN_MASK                0x03FF
+
+#define REG_SRAM_TRD_ADDR               0x1518
+#define TPD_HEAD_ADDR_MASK              0x03FF
+#define TPD_HEAD_ADDR_SHIFT             0
+#define TPD_TAIL_ADDR_MASK              0x03FF
+#define TPD_TAIL_ADDR_SHIFT             16
+
+#define REG_SRAM_TRD_LEN                0x151C /* In 8-bytes */
+#define TPD_NIC_LEN_MASK                0x03FF
+
+#define REG_SRAM_RXF_ADDR               0x1520
+#define REG_SRAM_RXF_LEN                0x1524
+#define REG_SRAM_TXF_ADDR               0x1528
+#define REG_SRAM_TXF_LEN                0x152C
+#define REG_SRAM_TCPH_ADDR              0x1530
+#define REG_SRAM_PKTH_ADDR              0x1532
+
+/*
+ * Load Ptr Register
+ * Software sets this bit after the initialization of the head and tail */
+#define REG_LOAD_PTR                    0x1534
+
+/*
+ * addresses of all descriptors, as well as the following descriptor
+ * control register, which triggers each function block to load the head
+ * pointer to prepare for the operation. This bit is then self-cleared
+ * after one cycle.
+ */
+#define REG_RX_BASE_ADDR_HI             0x1540
+#define REG_TX_BASE_ADDR_HI             0x1544
+#define REG_SMB_BASE_ADDR_HI            0x1548
+#define REG_SMB_BASE_ADDR_LO            0x154C
+#define REG_RFD0_HEAD_ADDR_LO           0x1550
+#define REG_RFD1_HEAD_ADDR_LO           0x1554
+#define REG_RFD2_HEAD_ADDR_LO           0x1558
+#define REG_RFD3_HEAD_ADDR_LO           0x155C
+#define REG_RFD_RING_SIZE               0x1560
+#define RFD_RING_SIZE_MASK              0x0FFF
+#define REG_RX_BUF_SIZE                 0x1564
+#define RX_BUF_SIZE_MASK                0xFFFF
+#define REG_RRD0_HEAD_ADDR_LO           0x1568
+#define REG_RRD1_HEAD_ADDR_LO           0x156C
+#define REG_RRD2_HEAD_ADDR_LO           0x1570
+#define REG_RRD3_HEAD_ADDR_LO           0x1574
+#define REG_RRD_RING_SIZE               0x1578
+#define RRD_RING_SIZE_MASK              0x0FFF
+#define REG_HTPD_HEAD_ADDR_LO           0x157C
+#define REG_NTPD_HEAD_ADDR_LO           0x1580
+#define REG_TPD_RING_SIZE               0x1584
+#define TPD_RING_SIZE_MASK              0xFFFF
+#define REG_CMB_BASE_ADDR_LO            0x1588
+
+/* RSS about */
+#define REG_RSS_KEY0                    0x14B0
+#define REG_RSS_KEY1                    0x14B4
+#define REG_RSS_KEY2                    0x14B8
+#define REG_RSS_KEY3                    0x14BC
+#define REG_RSS_KEY4                    0x14C0
+#define REG_RSS_KEY5                    0x14C4
+#define REG_RSS_KEY6                    0x14C8
+#define REG_RSS_KEY7                    0x14CC
+#define REG_RSS_KEY8                    0x14D0
+#define REG_RSS_KEY9                    0x14D4
+#define REG_IDT_TABLE0                  0x14E0
+#define REG_IDT_TABLE1                  0x14E4
+#define REG_IDT_TABLE2                  0x14E8
+#define REG_IDT_TABLE3                  0x14EC
+#define REG_IDT_TABLE4                  0x14F0
+#define REG_IDT_TABLE5                  0x14F4
+#define REG_IDT_TABLE6                  0x14F8
+#define REG_IDT_TABLE7                  0x14FC
+#define REG_IDT_TABLE                   REG_IDT_TABLE0
+#define REG_RSS_HASH_VALUE              0x15B0
+#define REG_RSS_HASH_FLAG               0x15B4
+#define REG_BASE_CPU_NUMBER             0x15B8
+
+/* TXQ Control Register */
+#define REG_TXQ_CTRL                    0x1590
+#define TXQ_NUM_TPD_BURST_MASK          0xF
+#define TXQ_NUM_TPD_BURST_SHIFT         0
+#define TXQ_CTRL_IP_OPTION_EN           0x10
+#define TXQ_CTRL_EN                     0x20
+#define TXQ_CTRL_ENH_MODE               0x40
+#define TXQ_CTRL_LS_8023_EN             0x80
+#define TXQ_TXF_BURST_NUM_SHIFT         16
+#define TXQ_TXF_BURST_NUM_MASK          0xFFFF
+
+/* Jumbo packet Threshold for task offload */
+#define REG_TX_TSO_OFFLOAD_THRESH       0x1594 /* In 8-bytes */
+#define TX_TSO_OFFLOAD_THRESH_MASK      0x07FF
+
+#define REG_TXF_WATER_MARK              0x1598 /* In 8-bytes */
+#define TXF_WATER_MARK_MASK             0x0FFF
+#define TXF_LOW_WATER_MARK_SHIFT        0
+#define TXF_HIGH_WATER_MARK_SHIFT       16
+#define TXQ_CTRL_BURST_MODE_EN          0x80000000
+
+#define REG_THRUPUT_MON_CTRL            0x159C
+#define THRUPUT_MON_RATE_MASK           0x3
+#define THRUPUT_MON_RATE_SHIFT          0
+#define THRUPUT_MON_EN                  0x80
+
+/* RXQ Control Register */
+#define REG_RXQ_CTRL                    0x15A0
+#define ASPM_THRUPUT_LIMIT_MASK         0x3
+#define ASPM_THRUPUT_LIMIT_SHIFT        0
+#define ASPM_THRUPUT_LIMIT_NO           0x00
+#define ASPM_THRUPUT_LIMIT_1M           0x01
+#define ASPM_THRUPUT_LIMIT_10M          0x02
+#define ASPM_THRUPUT_LIMIT_100M         0x04
+#define RXQ1_CTRL_EN                    0x10
+#define RXQ2_CTRL_EN                    0x20
+#define RXQ3_CTRL_EN                    0x40
+#define IPV6_CHKSUM_CTRL_EN             0x80
+#define RSS_HASH_BITS_MASK              0x00FF
+#define RSS_HASH_BITS_SHIFT             8
+#define RSS_HASH_IPV4                   0x10000
+#define RSS_HASH_IPV4_TCP               0x20000
+#define RSS_HASH_IPV6                   0x40000
+#define RSS_HASH_IPV6_TCP               0x80000
+#define RXQ_RFD_BURST_NUM_MASK          0x003F
+#define RXQ_RFD_BURST_NUM_SHIFT         20
+#define RSS_MODE_MASK                   0x0003
+#define RSS_MODE_SHIFT                  26
+#define RSS_NIP_QUEUE_SEL_MASK          0x1
+#define RSS_NIP_QUEUE_SEL_SHIFT         28
+#define RRS_HASH_CTRL_EN                0x20000000
+#define RX_CUT_THRU_EN                  0x40000000
+#define RXQ_CTRL_EN                     0x80000000
+
+#define REG_RFD_FREE_THRESH             0x15A4
+#define RFD_FREE_THRESH_MASK            0x003F
+#define RFD_FREE_HI_THRESH_SHIFT        0
+#define RFD_FREE_LO_THRESH_SHIFT        6
+
+/* RXF flow control register */
+#define REG_RXQ_RXF_PAUSE_THRESH        0x15A8
+#define RXQ_RXF_PAUSE_TH_HI_SHIFT       0
+#define RXQ_RXF_PAUSE_TH_HI_MASK        0x0FFF
+#define RXQ_RXF_PAUSE_TH_LO_SHIFT       16
+#define RXQ_RXF_PAUSE_TH_LO_MASK        0x0FFF
+
+#define REG_RXD_DMA_CTRL                0x15AC
+#define RXD_DMA_THRESH_MASK             0x0FFF  /* In 8-bytes */
+#define RXD_DMA_THRESH_SHIFT            0
+#define RXD_DMA_DOWN_TIMER_MASK         0xFFFF
+#define RXD_DMA_DOWN_TIMER_SHIFT        16
+
+/* DMA Engine Control Register */
+#define REG_DMA_CTRL                    0x15C0
+#define DMA_CTRL_DMAR_IN_ORDER          0x1
+#define DMA_CTRL_DMAR_ENH_ORDER         0x2
+#define DMA_CTRL_DMAR_OUT_ORDER         0x4
+#define DMA_CTRL_RCB_VALUE              0x8
+#define DMA_CTRL_DMAR_BURST_LEN_MASK    0x0007
+#define DMA_CTRL_DMAR_BURST_LEN_SHIFT   4
+#define DMA_CTRL_DMAW_BURST_LEN_MASK    0x0007
+#define DMA_CTRL_DMAW_BURST_LEN_SHIFT   7
+#define DMA_CTRL_DMAR_REQ_PRI           0x400
+#define DMA_CTRL_DMAR_DLY_CNT_MASK      0x001F
+#define DMA_CTRL_DMAR_DLY_CNT_SHIFT     11
+#define DMA_CTRL_DMAW_DLY_CNT_MASK      0x000F
+#define DMA_CTRL_DMAW_DLY_CNT_SHIFT     16
+#define DMA_CTRL_CMB_EN                 0x100000
+#define DMA_CTRL_SMB_EN                 0x200000
+#define DMA_CTRL_CMB_NOW                0x400000
+#define MAC_CTRL_SMB_DIS                0x1000000
+#define DMA_CTRL_SMB_NOW                0x80000000
+
+/* CMB/SMB Control Register */
+#define REG_SMB_STAT_TIMER              0x15C4  /* 2us resolution */
+#define SMB_STAT_TIMER_MASK             0xFFFFFF
+#define REG_CMB_TPD_THRESH              0x15C8
+#define CMB_TPD_THRESH_MASK             0xFFFF
+#define REG_CMB_TX_TIMER                0x15CC  /* 2us resolution */
+#define CMB_TX_TIMER_MASK               0xFFFF
+
+/* Mail box */
+#define MB_RFDX_PROD_IDX_MASK           0xFFFF
+#define REG_MB_RFD0_PROD_IDX            0x15E0
+#define REG_MB_RFD1_PROD_IDX            0x15E4
+#define REG_MB_RFD2_PROD_IDX            0x15E8
+#define REG_MB_RFD3_PROD_IDX            0x15EC
+
+#define MB_PRIO_PROD_IDX_MASK           0xFFFF
+#define REG_MB_PRIO_PROD_IDX            0x15F0
+#define MB_HTPD_PROD_IDX_SHIFT          0
+#define MB_NTPD_PROD_IDX_SHIFT          16
+
+#define MB_PRIO_CONS_IDX_MASK           0xFFFF
+#define REG_MB_PRIO_CONS_IDX            0x15F4
+#define MB_HTPD_CONS_IDX_SHIFT          0
+#define MB_NTPD_CONS_IDX_SHIFT          16
+
+#define REG_MB_RFD01_CONS_IDX           0x15F8
+#define MB_RFD0_CONS_IDX_MASK           0x0000FFFF
+#define MB_RFD1_CONS_IDX_MASK           0xFFFF0000
+#define REG_MB_RFD23_CONS_IDX           0x15FC
+#define MB_RFD2_CONS_IDX_MASK           0x0000FFFF
+#define MB_RFD3_CONS_IDX_MASK           0xFFFF0000
+
+/* Interrupt Status Register */
+#define REG_ISR                         0x1600
+#define ISR_SMB                         0x00000001
+#define ISR_TIMER                       0x00000002
+/*
+ * Software manual interrupt, for debug. Set when SW_MAN_INT_EN is set
+ * in Table 51 Selene Master Control Register (Offset 0x1400).
+ */
+#define ISR_MANUAL                      0x00000004
+#define ISR_HW_RXF_OV                   0x00000008 /* RXF overflow interrupt */
+#define ISR_RFD0_UR                     0x00000010 /* RFD0 under run */
+#define ISR_RFD1_UR                     0x00000020
+#define ISR_RFD2_UR                     0x00000040
+#define ISR_RFD3_UR                     0x00000080
+#define ISR_TXF_UR                      0x00000100
+#define ISR_DMAR_TO_RST                 0x00000200
+#define ISR_DMAW_TO_RST                 0x00000400
+#define ISR_TX_CREDIT                   0x00000800
+#define ISR_GPHY                        0x00001000
+/* GPHY low power state interrupt */
+#define ISR_GPHY_LPW                    0x00002000
+#define ISR_TXQ_TO_RST                  0x00004000
+#define ISR_TX_PKT                      0x00008000
+#define ISR_RX_PKT_0                    0x00010000
+#define ISR_RX_PKT_1                    0x00020000
+#define ISR_RX_PKT_2                    0x00040000
+#define ISR_RX_PKT_3                    0x00080000
+#define ISR_MAC_RX                      0x00100000
+#define ISR_MAC_TX                      0x00200000
+#define ISR_UR_DETECTED                 0x00400000
+#define ISR_FERR_DETECTED               0x00800000
+#define ISR_NFERR_DETECTED              0x01000000
+#define ISR_CERR_DETECTED               0x02000000
+#define ISR_PHY_LINKDOWN                0x04000000
+#define ISR_DIS_INT                     0x80000000
+
+/* Interrupt Mask Register */
+#define REG_IMR                         0x1604
+
+#define IMR_NORMAL_MASK         (\
+                ISR_MANUAL      |\
+                ISR_HW_RXF_OV   |\
+                ISR_RFD0_UR     |\
+                ISR_TXF_UR      |\
+                ISR_DMAR_TO_RST |\
+                ISR_TXQ_TO_RST  |\
+                ISR_DMAW_TO_RST |\
+                ISR_GPHY        |\
+                ISR_TX_PKT      |\
+                ISR_RX_PKT_0    |\
+                ISR_GPHY_LPW    |\
+                ISR_PHY_LINKDOWN)
+
+#define ISR_RX_PKT      (\
+        ISR_RX_PKT_0    |\
+        ISR_RX_PKT_1    |\
+        ISR_RX_PKT_2    |\
+        ISR_RX_PKT_3)
+
+#define ISR_OVER        (\
+        ISR_RFD0_UR     |\
+        ISR_RFD1_UR     |\
+        ISR_RFD2_UR     |\
+        ISR_RFD3_UR     |\
+        ISR_HW_RXF_OV   |\
+        ISR_TXF_UR)
+
+#define ISR_ERROR       (\
+        ISR_DMAR_TO_RST |\
+        ISR_TXQ_TO_RST  |\
+        ISR_DMAW_TO_RST |\
+        ISR_PHY_LINKDOWN)
+
+#define REG_INT_RETRIG_TIMER            0x1608
+#define INT_RETRIG_TIMER_MASK           0xFFFF
+
+#define REG_HDS_CTRL                    0x160C
+#define HDS_CTRL_EN                     0x0001
+#define HDS_CTRL_BACKFILLSIZE_SHIFT     8
+#define HDS_CTRL_BACKFILLSIZE_MASK      0x0FFF
+#define HDS_CTRL_MAX_HDRSIZE_SHIFT      20
+#define HDS_CTRL_MAC_HDRSIZE_MASK       0x0FFF
+
+#define REG_MAC_RX_STATUS_BIN           0x1700
+#define REG_MAC_RX_STATUS_END           0x175c
+#define REG_MAC_TX_STATUS_BIN           0x1760
+#define REG_MAC_TX_STATUS_END           0x17c0
+
+/* DEBUG ADDR */
+#define REG_DEBUG_DATA0                 0x1900
+#define REG_DEBUG_DATA1                 0x1904
+
+/* PHY Control Register */
+#define MII_BMCR                        0x00
+#define BMCR_SPEED_SELECT_MSB           0x0040  /* bits 6,13: 10=1000, 01=100, 00=10 */
+#define BMCR_COLL_TEST_ENABLE           0x0080  /* Collision test enable */
+#define BMCR_FULL_DUPLEX                0x0100  /* FDX =1, half duplex =0 */
+#define BMCR_RESTART_AUTO_NEG           0x0200  /* Restart auto negotiation */
+#define BMCR_ISOLATE                    0x0400  /* Isolate PHY from MII */
+#define BMCR_POWER_DOWN                 0x0800  /* Power down */
+#define BMCR_AUTO_NEG_EN                0x1000  /* Auto Neg Enable */
+#define BMCR_SPEED_SELECT_LSB           0x2000  /* bits 6,13: 10=1000, 01=100, 00=10 */
+#define BMCR_LOOPBACK                   0x4000  /* 0 = normal, 1 = loopback */
+#define BMCR_RESET                      0x8000  /* 0 = normal, 1 = PHY reset */
+#define BMCR_SPEED_MASK                 0x2040
+#define BMCR_SPEED_1000                 0x0040
+#define BMCR_SPEED_100                  0x2000
+#define BMCR_SPEED_10                   0x0000
+
+/* PHY Status Register */
+#define MII_BMSR                        0x01
+#define BMMSR_EXTENDED_CAPS             0x0001  /* Extended register capabilities */
+#define BMSR_JABBER_DETECT              0x0002  /* Jabber Detected */
+#define BMSR_LINK_STATUS                0x0004  /* Link Status 1 = link */
+#define BMSR_AUTONEG_CAPS               0x0008  /* Auto Neg Capable */
+#define BMSR_REMOTE_FAULT               0x0010  /* Remote Fault Detect */
+#define BMSR_AUTONEG_COMPLETE           0x0020  /* Auto Neg Complete */
+#define BMSR_PREAMBLE_SUPPRESS          0x0040  /* Preamble may be suppressed */
+#define BMSR_EXTENDED_STATUS            0x0100  /* Ext. status info in Reg 0x0F */
+#define BMSR_100T2_HD_CAPS              0x0200  /* 100T2 Half Duplex Capable */
+#define BMSR_100T2_FD_CAPS              0x0400  /* 100T2 Full Duplex Capable */
+#define BMSR_10T_HD_CAPS                0x0800  /* 10T   Half Duplex Capable */
+#define BMSR_10T_FD_CAPS                0x1000  /* 10T   Full Duplex Capable */
+#define BMSR_100X_HD_CAPS               0x2000  /* 100X  Half Duplex Capable */
+#define BMMII_SR_100X_FD_CAPS           0x4000  /* 100X  Full Duplex Capable */
+#define BMMII_SR_100T4_CAPS             0x8000  /* 100T4 Capable */
+
+#define MII_PHYSID1                     0x02
+#define MII_PHYSID2                     0x03
+
+/* Autoneg Advertisement Register */
+#define MII_ADVERTISE                   0x04
+#define ADVERTISE_SPEED_MASK            0x01E0
+#define ADVERTISE_DEFAULT_CAP           0x0DE0
+
+/* 1000BASE-T Control Register */
+#define MII_GIGA_CR                     0x09
+#define GIGA_CR_1000T_REPEATER_DTE      0x0400  /* 1=Repeater/switch device port 0=DTE device */
+
+#define GIGA_CR_1000T_MS_VALUE          0x0800  /* 1=Configure PHY as Master 0=Configure PHY as Slave */
+#define GIGA_CR_1000T_MS_ENABLE         0x1000  /* 1=Master/Slave manual config value 0=Automatic Master/Slave config */
+#define GIGA_CR_1000T_TEST_MODE_NORMAL  0x0000  /* Normal Operation */
+#define GIGA_CR_1000T_TEST_MODE_1       0x2000  /* Transmit Waveform test */
+#define GIGA_CR_1000T_TEST_MODE_2       0x4000  /* Master Transmit Jitter test */
+#define GIGA_CR_1000T_TEST_MODE_3       0x6000  /* Slave Transmit Jitter test */
+#define GIGA_CR_1000T_TEST_MODE_4       0x8000  /* Transmitter Distortion test */
+#define GIGA_CR_1000T_SPEED_MASK        0x0300
+#define GIGA_CR_1000T_DEFAULT_CAP       0x0300
+
+/* PHY Specific Status Register */
+#define MII_GIGA_PSSR                   0x11
+#define GIGA_PSSR_SPD_DPLX_RESOLVED     0x0800  /* 1=Speed & Duplex resolved */
+#define GIGA_PSSR_DPLX                  0x2000  /* 1=Duplex 0=Half Duplex */
+#define GIGA_PSSR_SPEED                 0xC000  /* Speed, bits 14:15 */
+#define GIGA_PSSR_10MBS                 0x0000  /* 00=10Mbs */
+#define GIGA_PSSR_100MBS                0x4000  /* 01=100Mbs */
+#define GIGA_PSSR_1000MBS               0x8000  /* 10=1000Mbs */
+
+/* PHY Interrupt Enable Register */
+#define MII_IER                         0x12
+#define IER_LINK_UP                     0x0400
+#define IER_LINK_DOWN                   0x0800
+
+/* PHY Interrupt Status Register */
+#define MII_ISR                         0x13
+#define ISR_LINK_UP                     0x0400
+#define ISR_LINK_DOWN                   0x0800
+
+/* Cable-Detect-Test Control Register */
+#define MII_CDTC                        0x16
+#define CDTC_EN_OFF                     0   /* sc */
+#define CDTC_EN_BITS                    1
+#define CDTC_PAIR_OFF                   8
+#define CDTC_PAIR_BIT                   2
+
+/* Cable-Detect-Test Status Register */
+#define MII_CDTS                        0x1C
+#define CDTS_STATUS_OFF                 8
+#define CDTS_STATUS_BITS                2
+#define CDTS_STATUS_NORMAL              0
+#define CDTS_STATUS_SHORT               1
+#define CDTS_STATUS_OPEN                2
+#define CDTS_STATUS_INVALID             3
+
+#define MII_DBG_ADDR                    0x1D
+#define MII_DBG_DATA                    0x1E
+
+#define MII_ANA_CTRL_0                  0x0
+#define ANA_RESTART_CAL                 0x0001
+#define ANA_MANUL_SWICH_ON_SHIFT        0x1
+#define ANA_MANUL_SWICH_ON_MASK         0xF
+#define ANA_MAN_ENABLE                  0x0020
+#define ANA_SEL_HSP                     0x0040
+#define ANA_EN_HB                       0x0080
+#define ANA_EN_HBIAS                    0x0100
+#define ANA_OEN_125M                    0x0200
+#define ANA_EN_LCKDT                    0x0400
+#define ANA_LCKDT_PHY                   0x0800
+#define ANA_AFE_MODE                    0x1000
+#define ANA_VCO_SLOW                    0x2000
+#define ANA_VCO_FAST                    0x4000
+#define ANA_SEL_CLK125M_DSP             0x8000
+
+#define MII_ANA_CTRL_4                  0x4
+#define ANA_IECHO_ADJ_MASK              0xF
+#define ANA_IECHO_ADJ_3_SHIFT           0
+#define ANA_IECHO_ADJ_2_SHIFT           4
+#define ANA_IECHO_ADJ_1_SHIFT           8
+#define ANA_IECHO_ADJ_0_SHIFT           12
+
+#define MII_ANA_CTRL_5                  0x5
+#define ANA_SERDES_CDR_BW_SHIFT         0
+#define ANA_SERDES_CDR_BW_MASK          0x3
+#define ANA_MS_PAD_DBG                  0x0004
+#define ANA_SPEEDUP_DBG                 0x0008
+#define ANA_SERDES_TH_LOS_SHIFT         4
+#define ANA_SERDES_TH_LOS_MASK          0x3
+#define ANA_SERDES_EN_DEEM              0x0040
+#define ANA_SERDES_TXELECIDLE           0x0080
+#define ANA_SERDES_BEACON               0x0100
+#define ANA_SERDES_HALFTXDR             0x0200
+#define ANA_SERDES_SEL_HSP              0x0400
+#define ANA_SERDES_EN_PLL               0x0800
+#define ANA_SERDES_EN                   0x1000
+#define ANA_SERDES_EN_LCKDT             0x2000
+
+#define MII_ANA_CTRL_11                 0xB
+#define ANA_PS_HIB_EN                   0x8000
+
+#define MII_ANA_CTRL_18                 0x12
+#define ANA_TEST_MODE_10BT_01SHIFT      0
+#define ANA_TEST_MODE_10BT_01MASK       0x3
+#define ANA_LOOP_SEL_10BT               0x0004
+#define ANA_RGMII_MODE_SW               0x0008
+#define ANA_EN_LONGECABLE               0x0010
+#define ANA_TEST_MODE_10BT_2            0x0020
+#define ANA_EN_10BT_IDLE                0x0400
+#define ANA_EN_MASK_TB                  0x0800
+#define ANA_TRIGGER_SEL_TIMER_SHIFT     12
+#define ANA_TRIGGER_SEL_TIMER_MASK      0x3
+#define ANA_INTERVAL_SEL_TIMER_SHIFT    14
+#define ANA_INTERVAL_SEL_TIMER_MASK     0x3
+
+#define MII_ANA_CTRL_41                 0x29
+#define ANA_TOP_PS_EN                   0x8000
+
+#define MII_ANA_CTRL_54                 0x36
+#define ANA_LONG_CABLE_TH_100_SHIFT     0
+#define ANA_LONG_CABLE_TH_100_MASK      0x3F
+#define ANA_DESERVED                    0x0040
+#define ANA_EN_LIT_CH                   0x0080
+#define ANA_SHORT_CABLE_TH_100_SHIFT    8
+#define ANA_SHORT_CABLE_TH_100_MASK     0x3F
+#define ANA_BP_BAD_LINK_ACCUM           0x4000
+#define ANA_BP_SMALL_BW                 0x8000
+
+#endif /*_ATL1C_HW_H_*/
diff --git a/drivers/net/atl1c/atl1c_main.c b/drivers/net/atl1c/atl1c_main.c
new file mode 100644
index 000000000000..deb7b53167ee
--- /dev/null
+++ b/drivers/net/atl1c/atl1c_main.c
@@ -0,0 +1,2797 @@
+/*
+ * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
+ *
+ * Derived from Intel e1000 driver
+ * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc., 59
+ * Temple Place - Suite 330, Boston, MA  02111-1307, USA.
+ */
+
+#include "atl1c.h"
+
+#define ATL1C_DRV_VERSION "1.0.0.1-NAPI"
+char atl1c_driver_name[] = "atl1c";
+char atl1c_driver_version[] = ATL1C_DRV_VERSION;
+#define PCI_DEVICE_ID_ATTANSIC_L2C      0x1062
+#define PCI_DEVICE_ID_ATTANSIC_L1C      0x1063
+/*
+ * atl1c_pci_tbl - PCI Device ID Table
+ *
+ * Wildcard entries (PCI_ANY_ID) should come last
+ * Last entry must be all 0s
+ *
+ * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
+ *   Class, Class Mask, private data (not used) }
+ */
+static struct pci_device_id atl1c_pci_tbl[] = {
+        {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)},
+        {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)},
+        /* required last entry */
+        { 0 }
+};
+MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl);
+
+MODULE_AUTHOR("Jie Yang <jie.yang@atheros.com>");
+MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver");
+MODULE_LICENSE("GPL");
+MODULE_VERSION(ATL1C_DRV_VERSION);
+
+static int atl1c_stop_mac(struct atl1c_hw *hw);
+static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw);
+static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw);
+static void atl1c_disable_l0s_l1(struct atl1c_hw *hw);
+static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup);
+static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter);
+static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,
+                   int *work_done, int work_to_do);
+
+static const u16 atl1c_pay_load_size[] = {
+        128, 256, 512, 1024, 2048, 4096,
+};
+
+static const u16 atl1c_rfd_prod_idx_regs[AT_MAX_RECEIVE_QUEUE] =
+{
+        REG_MB_RFD0_PROD_IDX,
+        REG_MB_RFD1_PROD_IDX,
+        REG_MB_RFD2_PROD_IDX,
+        REG_MB_RFD3_PROD_IDX
+};
+
+static const u16 atl1c_rfd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] =
+{
+        REG_RFD0_HEAD_ADDR_LO,
+        REG_RFD1_HEAD_ADDR_LO,
+        REG_RFD2_HEAD_ADDR_LO,
+        REG_RFD3_HEAD_ADDR_LO
+};
+
+static const u16 atl1c_rrd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] =
+{
+        REG_RRD0_HEAD_ADDR_LO,
+        REG_RRD1_HEAD_ADDR_LO,
+        REG_RRD2_HEAD_ADDR_LO,
+        REG_RRD3_HEAD_ADDR_LO
+};
+
+static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
+        NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
+
+/*
+ * atl1c_init_pcie - init PCIE module
+ */
+static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
+{
+        u32 data;
+        u32 pci_cmd;
+        struct pci_dev *pdev = hw->adapter->pdev;
+
+        AT_READ_REG(hw, PCI_COMMAND, &pci_cmd);
+        pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
+        pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
+                PCI_COMMAND_IO);
+        AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd);
+
+        /*
+         * Clear any PowerSaveing Settings
+         */
+        pci_enable_wake(pdev, PCI_D3hot, 0);
+        pci_enable_wake(pdev, PCI_D3cold, 0);
+
+        /*
+         * Mask some pcie error bits
+         */
+        AT_READ_REG(hw, REG_PCIE_UC_SEVERITY, &data);
+        data &= ~PCIE_UC_SERVRITY_DLP;
+        data &= ~PCIE_UC_SERVRITY_FCP;
+        AT_WRITE_REG(hw, REG_PCIE_UC_SEVERITY, data);
+
+        if (flag & ATL1C_PCIE_L0S_L1_DISABLE)
+                atl1c_disable_l0s_l1(hw);
+        if (flag & ATL1C_PCIE_PHY_RESET)
+                AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT);
+        else
+                AT_WRITE_REG(hw, REG_GPHY_CTRL,
+                        GPHY_CTRL_DEFAULT | GPHY_CTRL_EXT_RESET);
+
+        msleep(1);
+}
+
+/*
+ * atl1c_irq_enable - Enable default interrupt generation settings
+ * @adapter: board private structure
+ */
+static inline void atl1c_irq_enable(struct atl1c_adapter *adapter)
+{
+        if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
+                AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF);
+                AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
+                AT_WRITE_FLUSH(&adapter->hw);
+        }
+}
+
+/*
+ * atl1c_irq_disable - Mask off interrupt generation on the NIC
+ * @adapter: board private structure
+ */
+static inline void atl1c_irq_disable(struct atl1c_adapter *adapter)
+{
+        atomic_inc(&adapter->irq_sem);
+        AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
+        AT_WRITE_FLUSH(&adapter->hw);
+        synchronize_irq(adapter->pdev->irq);
+}
+
+/*
+ * atl1c_irq_reset - reset interrupt confiure on the NIC
+ * @adapter: board private structure
+ */
+static inline void atl1c_irq_reset(struct atl1c_adapter *adapter)
+{
+        atomic_set(&adapter->irq_sem, 1);
+        atl1c_irq_enable(adapter);
+}
+
+/*
+ * atl1c_phy_config - Timer Call-back
+ * @data: pointer to netdev cast into an unsigned long
+ */
+static void atl1c_phy_config(unsigned long data)
+{
+        struct atl1c_adapter *adapter = (struct atl1c_adapter *) data;
+        struct atl1c_hw *hw = &adapter->hw;
+        unsigned long flags;
+
+        spin_lock_irqsave(&adapter->mdio_lock, flags);
+        atl1c_restart_autoneg(hw);
+        spin_unlock_irqrestore(&adapter->mdio_lock, flags);
+}
+
+void atl1c_reinit_locked(struct atl1c_adapter *adapter)
+{
+
+        WARN_ON(in_interrupt());
+        atl1c_down(adapter);
+        atl1c_up(adapter);
+        clear_bit(__AT_RESETTING, &adapter->flags);
+}
+
+static void atl1c_reset_task(struct work_struct *work)
+{
+        struct atl1c_adapter *adapter;
+        struct net_device *netdev;
+
+        adapter = container_of(work, struct atl1c_adapter, reset_task);
+        netdev = adapter->netdev;
+
+        netif_device_detach(netdev);
+        atl1c_down(adapter);
+        atl1c_up(adapter);
+        netif_device_attach(netdev);
+}
+
+static void atl1c_check_link_status(struct atl1c_adapter *adapter)
+{
+        struct atl1c_hw *hw = &adapter->hw;
+        struct net_device *netdev = adapter->netdev;
+        struct pci_dev    *pdev   = adapter->pdev;
+        int err;
+        unsigned long flags;
+        u16 speed, duplex, phy_data;
+
+        spin_lock_irqsave(&adapter->mdio_lock, flags);
+        /* MII_BMSR must read twise */
+        atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
+        atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
+        spin_unlock_irqrestore(&adapter->mdio_lock, flags);
+
+        if ((phy_data & BMSR_LSTATUS) == 0) {
+                /* link down */
+                if (netif_carrier_ok(netdev)) {
+                        hw->hibernate = true;
+                        atl1c_set_aspm(hw, false);
+                        if (atl1c_stop_mac(hw) != 0)
+                                if (netif_msg_hw(adapter))
+                                        dev_warn(&pdev->dev,
+                                                "stop mac failed\n");
+                }
+                netif_carrier_off(netdev);
+        } else {
+                /* Link Up */
+                hw->hibernate = false;
+                spin_lock_irqsave(&adapter->mdio_lock, flags);
+                err = atl1c_get_speed_and_duplex(hw, &speed, &duplex);
+                spin_unlock_irqrestore(&adapter->mdio_lock, flags);
+                if (unlikely(err))
+                        return;
+                /* link result is our setting */
+                if (adapter->link_speed != speed ||
+                    adapter->link_duplex != duplex) {
+                        adapter->link_speed  = speed;
+                        adapter->link_duplex = duplex;
+                        atl1c_enable_tx_ctrl(hw);
+                        atl1c_enable_rx_ctrl(hw);
+                        atl1c_setup_mac_ctrl(adapter);
+                        atl1c_set_aspm(hw, true);
+                        if (netif_msg_link(adapter))
+                                dev_info(&pdev->dev,
+                                        "%s: %s NIC Link is Up<%d Mbps %s>\n",
+                                        atl1c_driver_name, netdev->name,
+                                        adapter->link_speed,
+                                        adapter->link_duplex == FULL_DUPLEX ?
+                                        "Full Duplex" : "Half Duplex");
+                }
+                if (!netif_carrier_ok(netdev))
+                        netif_carrier_on(netdev);
+        }
+}
+
+/*
+ * atl1c_link_chg_task - deal with link change event Out of interrupt context
+ * @netdev: network interface device structure
+ */
+static void atl1c_link_chg_task(struct work_struct *work)
+{
+        struct atl1c_adapter *adapter;
+
+        adapter = container_of(work, struct atl1c_adapter, link_chg_task);
+        atl1c_check_link_status(adapter);
+}
+
+static void atl1c_link_chg_event(struct atl1c_adapter *adapter)
+{
+        struct net_device *netdev = adapter->netdev;
+        struct pci_dev    *pdev   = adapter->pdev;
+        u16 phy_data;
+        u16 link_up;
+
+        spin_lock(&adapter->mdio_lock);
+        atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
+        atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
+        spin_unlock(&adapter->mdio_lock);
+        link_up = phy_data & BMSR_LSTATUS;
+        /* notify upper layer link down ASAP */
+        if (!link_up) {
+                if (netif_carrier_ok(netdev)) {
+                        /* old link state: Up */
+                        netif_carrier_off(netdev);
+                        if (netif_msg_link(adapter))
+                                dev_info(&pdev->dev,
+                                        "%s: %s NIC Link is Down\n",
+                                        atl1c_driver_name, netdev->name);
+                        adapter->link_speed = SPEED_0;
+                }
+        }
+        schedule_work(&adapter->link_chg_task);
+}
+
+static void atl1c_del_timer(struct atl1c_adapter *adapter)
+{
+        del_timer_sync(&adapter->phy_config_timer);
+}
+
+static void atl1c_cancel_work(struct atl1c_adapter *adapter)
+{
+        cancel_work_sync(&adapter->reset_task);
+        cancel_work_sync(&adapter->link_chg_task);
+}
+
+/*
+ * atl1c_tx_timeout - Respond to a Tx Hang
+ * @netdev: network interface device structure
+ */
+static void atl1c_tx_timeout(struct net_device *netdev)
+{
+        struct atl1c_adapter *adapter = netdev_priv(netdev);
+
+        /* Do the reset outside of interrupt context */
+        schedule_work(&adapter->reset_task);
+}
+
+/*
+ * atl1c_set_multi - Multicast and Promiscuous mode set
+ * @netdev: network interface device structure
+ *
+ * The set_multi entry point is called whenever the multicast address
+ * list or the network interface flags are updated.  This routine is
+ * responsible for configuring the hardware for proper multicast,
+ * promiscuous mode, and all-multi behavior.
+ */
+static void atl1c_set_multi(struct net_device *netdev)
+{
+        struct atl1c_adapter *adapter = netdev_priv(netdev);
+        struct atl1c_hw *hw = &adapter->hw;
+        struct dev_mc_list *mc_ptr;
+        u32 mac_ctrl_data;
+        u32 hash_value;
+
+        /* Check for Promiscuous and All Multicast modes */
+        AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
+
+        if (netdev->flags & IFF_PROMISC) {
+                mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
+        } else if (netdev->flags & IFF_ALLMULTI) {
+                mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
+                mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
+        } else {
+                mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
+        }
+
+        AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
+
+        /* clear the old settings from the multicast hash table */
+        AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
+        AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
+
+        /* comoute mc addresses' hash value ,and put it into hash table */
+        for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
+                hash_value = atl1c_hash_mc_addr(hw, mc_ptr->dmi_addr);
+                atl1c_hash_set(hw, hash_value);
+        }
+}
+
+static void atl1c_vlan_rx_register(struct net_device *netdev,
+                                   struct vlan_group *grp)
+{
+        struct atl1c_adapter *adapter = netdev_priv(netdev);
+        struct pci_dev *pdev = adapter->pdev;
+        u32 mac_ctrl_data = 0;
+
+        if (netif_msg_pktdata(adapter))
+                dev_dbg(&pdev->dev, "atl1c_vlan_rx_register\n");
+
+        atl1c_irq_disable(adapter);
+
+        adapter->vlgrp = grp;
+        AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data);
+
+        if (grp) {
+                /* enable VLAN tag insert/strip */
+                mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
+        } else {
+                /* disable VLAN tag insert/strip */
+                mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
+        }
+
+        AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
+        atl1c_irq_enable(adapter);
+}
+
+static void atl1c_restore_vlan(struct atl1c_adapter *adapter)
+{
+        struct pci_dev *pdev = adapter->pdev;
+
+        if (netif_msg_pktdata(adapter))
+                dev_dbg(&pdev->dev, "atl1c_restore_vlan !");
+        atl1c_vlan_rx_register(adapter->netdev, adapter->vlgrp);
+}
+/*
+ * atl1c_set_mac - Change the Ethernet Address of the NIC
+ * @netdev: network interface device structure
+ * @p: pointer to an address structure
+ *
+ * Returns 0 on success, negative on failure
+ */
+static int atl1c_set_mac_addr(struct net_device *netdev, void *p)
+{
+        struct atl1c_adapter *adapter = netdev_priv(netdev);
+        struct sockaddr *addr = p;
+
+        if (!is_valid_ether_addr(addr->sa_data))
+                return -EADDRNOTAVAIL;
+
+        if (netif_running(netdev))
+                return -EBUSY;
+
+        memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
+        memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
+
+        atl1c_hw_set_mac_addr(&adapter->hw);
+
+        return 0;
+}
+
+static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter,
+                                struct net_device *dev)
+{
+        int mtu = dev->mtu;
+
+        adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ?
+                roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE;
+}
+/*
+ * atl1c_change_mtu - Change the Maximum Transfer Unit
+ * @netdev: network interface device structure
+ * @new_mtu: new value for maximum frame size
+ *
+ * Returns 0 on success, negative on failure
+ */
+static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)
+{
+        struct atl1c_adapter *adapter = netdev_priv(netdev);
+        int old_mtu   = netdev->mtu;
+        int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
+
+        if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
+                        (max_frame > MAX_JUMBO_FRAME_SIZE)) {
+                if (netif_msg_link(adapter))
+                        dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
+                return -EINVAL;
+        }
+        /* set MTU */
+        if (old_mtu != new_mtu && netif_running(netdev)) {
+                while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
+                        msleep(1);
+                netdev->mtu = new_mtu;
+                adapter->hw.max_frame_size = new_mtu;
+                atl1c_set_rxbufsize(adapter, netdev);
+                atl1c_down(adapter);
+                atl1c_up(adapter);
+                clear_bit(__AT_RESETTING, &adapter->flags);
+                if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
+                        u32 phy_data;
+
+                        AT_READ_REG(&adapter->hw, 0x1414, &phy_data);
+                        phy_data |= 0x10000000;
+                        AT_WRITE_REG(&adapter->hw, 0x1414, phy_data);
+                }
+
+        }
+        return 0;
+}
+
+/*
+ *  caller should hold mdio_lock
+ */
+static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
+{
+        struct atl1c_adapter *adapter = netdev_priv(netdev);
+        u16 result;
+
+        atl1c_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
+        return result;
+}
+
+static void atl1c_mdio_write(struct net_device *netdev, int phy_id,
+                             int reg_num, int val)
+{
+        struct atl1c_adapter *adapter = netdev_priv(netdev);
+
+        atl1c_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val);
+}
+
+/*
+ * atl1c_mii_ioctl -
+ * @netdev:
+ * @ifreq:
+ * @cmd:
+ */
+static int atl1c_mii_ioctl(struct net_device *netdev,
+                           struct ifreq *ifr, int cmd)
+{
+        struct atl1c_adapter *adapter = netdev_priv(netdev);
+        struct pci_dev *pdev = adapter->pdev;
+        struct mii_ioctl_data *data = if_mii(ifr);
+        unsigned long flags;
+        int retval = 0;
+
+        if (!netif_running(netdev))
+                return -EINVAL;
+
+        spin_lock_irqsave(&adapter->mdio_lock, flags);
+        switch (cmd) {
+        case SIOCGMIIPHY:
+                data->phy_id = 0;
+                break;
+
+        case SIOCGMIIREG:
+                if (!capable(CAP_NET_ADMIN)) {
+                        retval = -EPERM;
+                        goto out;
+                }
+                if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
+                                    &data->val_out)) {
+                        retval = -EIO;
+                        goto out;
+                }
+                break;
+
+        case SIOCSMIIREG:
+                if (!capable(CAP_NET_ADMIN)) {
+                        retval = -EPERM;
+                        goto out;
+                }
+                if (data->reg_num & ~(0x1F)) {
+                        retval = -EFAULT;
+                        goto out;
+                }
+
+                dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x",
+                                data->reg_num, data->val_in);
+                if (atl1c_write_phy_reg(&adapter->hw,
+                                     data->reg_num, data->val_in)) {
+                        retval = -EIO;
+                        goto out;
+                }
+                break;
+
+        default:
+                retval = -EOPNOTSUPP;
+                break;
+        }
+out:
+        spin_unlock_irqrestore(&adapter->mdio_lock, flags);
+        return retval;
+}
+
+/*
+ * atl1c_ioctl -
+ * @netdev:
+ * @ifreq:
+ * @cmd:
+ */
+static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
+{
+        switch (cmd) {
+        case SIOCGMIIPHY:
+        case SIOCGMIIREG:
+        case SIOCSMIIREG:
+                return atl1c_mii_ioctl(netdev, ifr, cmd);
+        default:
+                return -EOPNOTSUPP;
+        }
+}
+
+/*
+ * atl1c_alloc_queues - Allocate memory for all rings
+ * @adapter: board private structure to initialize
+ *
+ */
+static int __devinit atl1c_alloc_queues(struct atl1c_adapter *adapter)
+{
+        return 0;
+}
+
+static void atl1c_set_mac_type(struct atl1c_hw *hw)
+{
+        switch (hw->device_id) {
+        case PCI_DEVICE_ID_ATTANSIC_L2C:
+                hw->nic_type = athr_l2c;
+                break;
+
+        case PCI_DEVICE_ID_ATTANSIC_L1C:
+                hw->nic_type = athr_l1c;
+                break;
+
+        default:
+                break;
+        }
+}
+
+static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)
+{
+        u32 phy_status_data;
+        u32 link_ctrl_data;
+
+        atl1c_set_mac_type(hw);
+        AT_READ_REG(hw, REG_PHY_STATUS, &phy_status_data);
+        AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
+
+        hw->ctrl_flags = ATL1C_INTR_CLEAR_ON_READ |
+                         ATL1C_INTR_MODRT_ENABLE  |
+                         ATL1C_RX_IPV6_CHKSUM     |
+                         ATL1C_TXQ_MODE_ENHANCE;
+        if (link_ctrl_data & LINK_CTRL_L0S_EN)
+                hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT;
+        if (link_ctrl_data & LINK_CTRL_L1_EN)
+                hw->ctrl_flags |= ATL1C_ASPM_L1_SUPPORT;
+
+        if (hw->nic_type == athr_l1c) {
+                hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON;
+                hw->ctrl_flags |= ATL1C_LINK_CAP_1000M;
+        }
+        return 0;
+}
+/*
+ * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter)
+ * @adapter: board private structure to initialize
+ *
+ * atl1c_sw_init initializes the Adapter private data structure.
+ * Fields are initialized based on PCI device information and
+ * OS network device settings (MTU size).
+ */
+static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter)
+{
+        struct atl1c_hw *hw   = &adapter->hw;
+        struct pci_dev  *pdev = adapter->pdev;
+
+        adapter->wol = 0;
+        adapter->link_speed = SPEED_0;
+        adapter->link_duplex = FULL_DUPLEX;
+        adapter->num_rx_queues = AT_DEF_RECEIVE_QUEUE;
+        adapter->tpd_ring[0].count = 1024;
+        adapter->rfd_ring[0].count = 512;
+
+        hw->vendor_id = pdev->vendor;
+        hw->device_id = pdev->device;
+        hw->subsystem_vendor_id = pdev->subsystem_vendor;
+        hw->subsystem_id = pdev->subsystem_device;
+
+        /* before link up, we assume hibernate is true */
+        hw->hibernate = true;
+        hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
+        if (atl1c_setup_mac_funcs(hw) != 0) {
+                dev_err(&pdev->dev, "set mac function pointers failed\n");
+                return -1;
+        }
+        hw->intr_mask = IMR_NORMAL_MASK;
+        hw->phy_configured = false;
+        hw->preamble_len = 7;
+        hw->max_frame_size = adapter->netdev->mtu;
+        if (adapter->num_rx_queues < 2) {
+                hw->rss_type = atl1c_rss_disable;
+                hw->rss_mode = atl1c_rss_mode_disable;
+        } else {
+                hw->rss_type = atl1c_rss_ipv4;
+                hw->rss_mode = atl1c_rss_mul_que_mul_int;
+                hw->rss_hash_bits = 16;
+        }
+        hw->autoneg_advertised = ADVERTISED_Autoneg;
+        hw->indirect_tab = 0xE4E4E4E4;
+        hw->base_cpu = 0;
+
+        hw->ict = 50000;                /* 100ms */
+        hw->smb_timer = 200000;         /* 400ms */
+        hw->cmb_tpd = 4;
+        hw->cmb_tx_timer = 1;           /* 2 us  */
+        hw->rx_imt = 200;
+        hw->tx_imt = 1000;
+
+        hw->tpd_burst = 5;
+        hw->rfd_burst = 8;
+        hw->dma_order = atl1c_dma_ord_out;
+        hw->dmar_block = atl1c_dma_req_1024;
+        hw->dmaw_block = atl1c_dma_req_1024;
+        hw->dmar_dly_cnt = 15;
+        hw->dmaw_dly_cnt = 4;
+
+        if (atl1c_alloc_queues(adapter)) {
+                dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
+                return -ENOMEM;
+        }
+        /* TODO */
+        atl1c_set_rxbufsize(adapter, adapter->netdev);
+        atomic_set(&adapter->irq_sem, 1);
+        spin_lock_init(&adapter->mdio_lock);
+        spin_lock_init(&adapter->tx_lock);
+        set_bit(__AT_DOWN, &adapter->flags);
+
+        return 0;
+}
+
+/*
+ * atl1c_clean_tx_ring - Free Tx-skb
+ * @adapter: board private structure
+ */
+static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter,
+                                enum atl1c_trans_queue type)
+{
+        struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
+        struct atl1c_buffer *buffer_info;
+        struct pci_dev *pdev = adapter->pdev;
+        u16 index, ring_count;
+
+        ring_count = tpd_ring->count;
+        for (index = 0; index < ring_count; index++) {
+                buffer_info = &tpd_ring->buffer_info[index];
+                if (buffer_info->state == ATL1_BUFFER_FREE)
+                        continue;
+                if (buffer_info->dma)
+                        pci_unmap_single(pdev, buffer_info->dma,
+                                        buffer_info->length,
+                                        PCI_DMA_TODEVICE);
+                if (buffer_info->skb)
+                        dev_kfree_skb(buffer_info->skb);
+                buffer_info->dma = 0;
+                buffer_info->skb = NULL;
+                buffer_info->state = ATL1_BUFFER_FREE;
+        }
+
+        /* Zero out Tx-buffers */
+        memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *
+                                ring_count);
+        atomic_set(&tpd_ring->next_to_clean, 0);
+        tpd_ring->next_to_use = 0;
+}
+
+/*
+ * atl1c_clean_rx_ring - Free rx-reservation skbs
+ * @adapter: board private structure
+ */
+static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter)
+{
+        struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
+        struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
+        struct atl1c_buffer *buffer_info;
+        struct pci_dev *pdev = adapter->pdev;
+        int i, j;
+
+        for (i = 0; i < adapter->num_rx_queues; i++) {
+                for (j = 0; j < rfd_ring[i].count; j++) {
+                        buffer_info = &rfd_ring[i].buffer_info[j];
+                        if (buffer_info->state == ATL1_BUFFER_FREE)
+                                continue;
+                        if (buffer_info->dma)
+                                pci_unmap_single(pdev, buffer_info->dma,
+                                                buffer_info->length,
+                                                PCI_DMA_FROMDEVICE);
+                        if (buffer_info->skb)
+                                dev_kfree_skb(buffer_info->skb);
+                        buffer_info->state = ATL1_BUFFER_FREE;
+                        buffer_info->skb = NULL;
+                }
+                /* zero out the descriptor ring */
+                memset(rfd_ring[i].desc, 0, rfd_ring[i].size);
+                rfd_ring[i].next_to_clean = 0;
+                rfd_ring[i].next_to_use = 0;
+                rrd_ring[i].next_to_use = 0;
+                rrd_ring[i].next_to_clean = 0;
+        }
+}
+
+/*
+ * Read / Write Ptr Initialize:
+ */
+static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)
+{
+        struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
+        struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
+        struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
+        struct atl1c_buffer *buffer_info;
+        int i, j;
+
+        for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
+                tpd_ring[i].next_to_use = 0;
+                atomic_set(&tpd_ring[i].next_to_clean, 0);
+                buffer_info = tpd_ring[i].buffer_info;
+                for (j = 0; j < tpd_ring->count; j++)
+                        buffer_info[i].state = ATL1_BUFFER_FREE;
+        }
+        for (i = 0; i < adapter->num_rx_queues; i++) {
+                rfd_ring[i].next_to_use = 0;
+                rfd_ring[i].next_to_clean = 0;
+                rrd_ring[i].next_to_use = 0;
+                rrd_ring[i].next_to_clean = 0;
+                for (j = 0; j < rfd_ring[i].count; j++) {
+                        buffer_info = &rfd_ring[i].buffer_info[j];
+                        buffer_info->state = ATL1_BUFFER_FREE;
+                }
+        }
+}
+
+/*
+ * atl1c_free_ring_resources - Free Tx / RX descriptor Resources
+ * @adapter: board private structure
+ *
+ * Free all transmit software resources
+ */
+static void atl1c_free_ring_resources(struct atl1c_adapter *adapter)
+{
+        struct pci_dev *pdev = adapter->pdev;
+
+        pci_free_consistent(pdev, adapter->ring_header.size,
+                                        adapter->ring_header.desc,
+                                        adapter->ring_header.dma);
+        adapter->ring_header.desc = NULL;
+
+        /* Note: just free tdp_ring.buffer_info,
+        *  it contain rfd_ring.buffer_info, do not double free */
+        if (adapter->tpd_ring[0].buffer_info) {
+                kfree(adapter->tpd_ring[0].buffer_info);
+                adapter->tpd_ring[0].buffer_info = NULL;
+        }
+}
+
+/*
+ * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources
+ * @adapter: board private structure
+ *
+ * Return 0 on success, negative on failure
+ */
+static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
+{
+        struct pci_dev *pdev = adapter->pdev;
+        struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
+        struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
+        struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
+        struct atl1c_ring_header *ring_header = &adapter->ring_header;
+        int num_rx_queues = adapter->num_rx_queues;
+        int size;
+        int i;
+        int count = 0;
+        int rx_desc_count = 0;
+        u32 offset = 0;
+
+        rrd_ring[0].count = rfd_ring[0].count;
+        for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++)
+                tpd_ring[i].count = tpd_ring[0].count;
+
+        for (i = 1; i < adapter->num_rx_queues; i++)
+                rfd_ring[i].count = rrd_ring[i].count = rfd_ring[0].count;
+
+        /* 2 tpd queue, one high priority queue,
+         * another normal priority queue */
+        size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 +
+                rfd_ring->count * num_rx_queues);
+        tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
+        if (unlikely(!tpd_ring->buffer_info)) {
+                dev_err(&pdev->dev, "kzalloc failed, size = %d\n",
+                        size);
+                goto err_nomem;
+        }
+        for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
+                tpd_ring[i].buffer_info =
+                        (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
+                count += tpd_ring[i].count;
+        }
+
+        for (i = 0; i < num_rx_queues; i++) {
+                rfd_ring[i].buffer_info =
+                        (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
+                count += rfd_ring[i].count;
+                rx_desc_count += rfd_ring[i].count;
+        }
+        /*
+         * real ring DMA buffer
+         * each ring/block may need up to 8 bytes for alignment, hence the
+         * additional bytes tacked onto the end.
+         */
+        ring_header->size = size =
+                sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 +
+                sizeof(struct atl1c_rx_free_desc) * rx_desc_count +
+                sizeof(struct atl1c_recv_ret_status) * rx_desc_count +
+                sizeof(struct atl1c_hw_stats) +
+                8 * 4 + 8 * 2 * num_rx_queues;
+
+        ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
+                                &ring_header->dma);
+        if (unlikely(!ring_header->desc)) {
+                dev_err(&pdev->dev, "pci_alloc_consistend failed\n");
+                goto err_nomem;
+        }
+        memset(ring_header->desc, 0, ring_header->size);
+        /* init TPD ring */
+
+        tpd_ring[0].dma = roundup(ring_header->dma, 8);
+        offset = tpd_ring[0].dma - ring_header->dma;
+        for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
+                tpd_ring[i].dma = ring_header->dma + offset;
+                tpd_ring[i].desc = (u8 *) ring_header->desc + offset;
+                tpd_ring[i].size =
+                        sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count;
+                offset += roundup(tpd_ring[i].size, 8);
+        }
+        /* init RFD ring */
+        for (i = 0; i < num_rx_queues; i++) {
+                rfd_ring[i].dma = ring_header->dma + offset;
+                rfd_ring[i].desc = (u8 *) ring_header->desc + offset;
+                rfd_ring[i].size = sizeof(struct atl1c_rx_free_desc) *
+                                rfd_ring[i].count;
+                offset += roundup(rfd_ring[i].size, 8);
+        }
+
+        /* init RRD ring */
+        for (i = 0; i < num_rx_queues; i++) {
+                rrd_ring[i].dma = ring_header->dma + offset;
+                rrd_ring[i].desc = (u8 *) ring_header->desc + offset;
+                rrd_ring[i].size = sizeof(struct atl1c_recv_ret_status) *
+                                rrd_ring[i].count;
+                offset += roundup(rrd_ring[i].size, 8);
+        }
+
+        adapter->smb.dma = ring_header->dma + offset;
+        adapter->smb.smb = (u8 *)ring_header->desc + offset;
+        return 0;
+
+err_nomem:
+        kfree(tpd_ring->buffer_info);
+        return -ENOMEM;
+}
+
+static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
+{
+        struct atl1c_hw *hw = &adapter->hw;
+        struct atl1c_rfd_ring *rfd_ring = (struct atl1c_rfd_ring *)
+                                adapter->rfd_ring;
+        struct atl1c_rrd_ring *rrd_ring = (struct atl1c_rrd_ring *)
+                                adapter->rrd_ring;
+        struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
+                                adapter->tpd_ring;
+        struct atl1c_cmb *cmb = (struct atl1c_cmb *) &adapter->cmb;
+        struct atl1c_smb *smb = (struct atl1c_smb *) &adapter->smb;
+        int i;
+
+        /* TPD */
+        AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI,
+                        (u32)((tpd_ring[atl1c_trans_normal].dma &
+                                AT_DMA_HI_ADDR_MASK) >> 32));
+        /* just enable normal priority TX queue */
+        AT_WRITE_REG(hw, REG_NTPD_HEAD_ADDR_LO,
+                        (u32)(tpd_ring[atl1c_trans_normal].dma &
+                                AT_DMA_LO_ADDR_MASK));
+        AT_WRITE_REG(hw, REG_HTPD_HEAD_ADDR_LO,
+                        (u32)(tpd_ring[atl1c_trans_high].dma &
+                                AT_DMA_LO_ADDR_MASK));
+        AT_WRITE_REG(hw, REG_TPD_RING_SIZE,
+                        (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK));
+
+
+        /* RFD */
+        AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI,
+                        (u32)((rfd_ring[0].dma & AT_DMA_HI_ADDR_MASK) >> 32));
+        for (i = 0; i < adapter->num_rx_queues; i++)
+                AT_WRITE_REG(hw, atl1c_rfd_addr_lo_regs[i],
+                        (u32)(rfd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
+
+        AT_WRITE_REG(hw, REG_RFD_RING_SIZE,
+                        rfd_ring[0].count & RFD_RING_SIZE_MASK);
+        AT_WRITE_REG(hw, REG_RX_BUF_SIZE,
+                        adapter->rx_buffer_len & RX_BUF_SIZE_MASK);
+
+        /* RRD */
+        for (i = 0; i < adapter->num_rx_queues; i++)
+                AT_WRITE_REG(hw, atl1c_rrd_addr_lo_regs[i],
+                        (u32)(rrd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
+        AT_WRITE_REG(hw, REG_RRD_RING_SIZE,
+                        (rrd_ring[0].count & RRD_RING_SIZE_MASK));
+
+        /* CMB */
+        AT_WRITE_REG(hw, REG_CMB_BASE_ADDR_LO, cmb->dma & AT_DMA_LO_ADDR_MASK);
+
+        /* SMB */
+        AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_HI,
+                        (u32)((smb->dma & AT_DMA_HI_ADDR_MASK) >> 32));
+        AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_LO,
+                        (u32)(smb->dma & AT_DMA_LO_ADDR_MASK));
+        /* Load all of base address above */
+        AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
+}
+
+static void atl1c_configure_tx(struct atl1c_adapter *adapter)
+{
+        struct atl1c_hw *hw = &adapter->hw;
+        u32 dev_ctrl_data;
+        u32 max_pay_load;
+        u16 tx_offload_thresh;
+        u32 txq_ctrl_data;
+        u32 extra_size = 0;     /* Jumbo frame threshold in QWORD unit */
+
+        extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN;
+        tx_offload_thresh = MAX_TX_OFFLOAD_THRESH;
+        AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
+                (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
+        AT_READ_REG(hw, REG_DEVICE_CTRL, &dev_ctrl_data);
+        max_pay_load  = (dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT) &
+                        DEVICE_CTRL_MAX_PAYLOAD_MASK;
+        hw->dmaw_block = min(max_pay_load, hw->dmaw_block);
+        max_pay_load  = (dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT) &
+                        DEVICE_CTRL_MAX_RREQ_SZ_MASK;
+        hw->dmar_block = min(max_pay_load, hw->dmar_block);
+
+        txq_ctrl_data = (hw->tpd_burst & TXQ_NUM_TPD_BURST_MASK) <<
+                        TXQ_NUM_TPD_BURST_SHIFT;
+        if (hw->ctrl_flags & ATL1C_TXQ_MODE_ENHANCE)
+                txq_ctrl_data |= TXQ_CTRL_ENH_MODE;
+        txq_ctrl_data |= (atl1c_pay_load_size[hw->dmar_block] &
+                        TXQ_TXF_BURST_NUM_MASK) << TXQ_TXF_BURST_NUM_SHIFT;
+
+        AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data);
+}
+
+static void atl1c_configure_rx(struct atl1c_adapter *adapter)
+{
+        struct atl1c_hw *hw = &adapter->hw;
+        u32 rxq_ctrl_data;
+
+        rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) <<
+                        RXQ_RFD_BURST_NUM_SHIFT;
+
+        if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM)
+                rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN;
+        if (hw->rss_type == atl1c_rss_ipv4)
+                rxq_ctrl_data |= RSS_HASH_IPV4;
+        if (hw->rss_type == atl1c_rss_ipv4_tcp)
+                rxq_ctrl_data |= RSS_HASH_IPV4_TCP;
+        if (hw->rss_type == atl1c_rss_ipv6)
+                rxq_ctrl_data |= RSS_HASH_IPV6;
+        if (hw->rss_type == atl1c_rss_ipv6_tcp)
+                rxq_ctrl_data |= RSS_HASH_IPV6_TCP;
+        if (hw->rss_type != atl1c_rss_disable)
+                rxq_ctrl_data |= RRS_HASH_CTRL_EN;
+
+        rxq_ctrl_data |= (hw->rss_mode & RSS_MODE_MASK) <<
+                        RSS_MODE_SHIFT;
+        rxq_ctrl_data |= (hw->rss_hash_bits & RSS_HASH_BITS_MASK) <<
+                        RSS_HASH_BITS_SHIFT;
+        if (hw->ctrl_flags & ATL1C_ASPM_CTRL_MON)
+                rxq_ctrl_data |= (ASPM_THRUPUT_LIMIT_100M &
+                        ASPM_THRUPUT_LIMIT_MASK) << ASPM_THRUPUT_LIMIT_SHIFT;
+
+        AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
+}
+
+static void atl1c_configure_rss(struct atl1c_adapter *adapter)
+{
+        struct atl1c_hw *hw = &adapter->hw;
+
+        AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab);
+        AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu);
+}
+
+static void atl1c_configure_dma(struct atl1c_adapter *adapter)
+{
+        struct atl1c_hw *hw = &adapter->hw;
+        u32 dma_ctrl_data;
+
+        dma_ctrl_data = DMA_CTRL_DMAR_REQ_PRI;
+        if (hw->ctrl_flags & ATL1C_CMB_ENABLE)
+                dma_ctrl_data |= DMA_CTRL_CMB_EN;
+        if (hw->ctrl_flags & ATL1C_SMB_ENABLE)
+                dma_ctrl_data |= DMA_CTRL_SMB_EN;
+        else
+                dma_ctrl_data |= MAC_CTRL_SMB_DIS;
+
+        switch (hw->dma_order) {
+        case atl1c_dma_ord_in:
+                dma_ctrl_data |= DMA_CTRL_DMAR_IN_ORDER;
+                break;
+        case atl1c_dma_ord_enh:
+                dma_ctrl_data |= DMA_CTRL_DMAR_ENH_ORDER;
+                break;
+        case atl1c_dma_ord_out:
+                dma_ctrl_data |= DMA_CTRL_DMAR_OUT_ORDER;
+                break;
+        default:
+                break;
+        }
+
+        dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
+                << DMA_CTRL_DMAR_BURST_LEN_SHIFT;
+        dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
+                << DMA_CTRL_DMAW_BURST_LEN_SHIFT;
+        dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK)
+                << DMA_CTRL_DMAR_DLY_CNT_SHIFT;
+        dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK)
+                << DMA_CTRL_DMAW_DLY_CNT_SHIFT;
+
+        AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
+}
+
+/*
+ * Stop the mac, transmit and receive units
+ * hw - Struct containing variables accessed by shared code
+ * return : 0  or  idle status (if error)
+ */
+static int atl1c_stop_mac(struct atl1c_hw *hw)
+{
+        u32 data;
+        int timeout;
+
+        AT_READ_REG(hw, REG_RXQ_CTRL, &data);
+        data &= ~(RXQ1_CTRL_EN | RXQ2_CTRL_EN |
+                  RXQ3_CTRL_EN | RXQ_CTRL_EN);
+        AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
+
+        AT_READ_REG(hw, REG_TXQ_CTRL, &data);
+        data &= ~TXQ_CTRL_EN;
+        AT_WRITE_REG(hw, REG_TWSI_CTRL, data);
+
+        for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
+                AT_READ_REG(hw, REG_IDLE_STATUS, &data);
+                if ((data & (IDLE_STATUS_RXQ_NO_IDLE |
+                        IDLE_STATUS_TXQ_NO_IDLE)) == 0)
+                        break;
+                msleep(1);
+        }
+
+        AT_READ_REG(hw, REG_MAC_CTRL, &data);
+        data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);
+        AT_WRITE_REG(hw, REG_MAC_CTRL, data);
+
+        for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
+                AT_READ_REG(hw, REG_IDLE_STATUS, &data);
+                if ((data & IDLE_STATUS_MASK) == 0)
+                        return 0;
+                msleep(1);
+        }
+        return data;
+}
+
+static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw)
+{
+        u32 data;
+
+        AT_READ_REG(hw, REG_RXQ_CTRL, &data);
+        switch (hw->adapter->num_rx_queues) {
+        case 4:
+                data |= (RXQ3_CTRL_EN | RXQ2_CTRL_EN | RXQ1_CTRL_EN);
+                break;
+        case 3:
+                data |= (RXQ2_CTRL_EN | RXQ1_CTRL_EN);
+                break;
+        case 2:
+                data |= RXQ1_CTRL_EN;
+                break;
+        default:
+                break;
+        }
+        data |= RXQ_CTRL_EN;
+        AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
+}
+
+static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw)
+{
+        u32 data;
+
+        AT_READ_REG(hw, REG_TXQ_CTRL, &data);
+        data |= TXQ_CTRL_EN;
+        AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
+}
+
+/*
+ * Reset the transmit and receive units; mask and clear all interrupts.
+ * hw - Struct containing variables accessed by shared code
+ * return : 0  or  idle status (if error)
+ */
+static int atl1c_reset_mac(struct atl1c_hw *hw)
+{
+        struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter;
+        struct pci_dev *pdev = adapter->pdev;
+        u32 idle_status_data = 0;
+        int timeout = 0;
+        int ret;
+
+        AT_WRITE_REG(hw, REG_IMR, 0);
+        AT_WRITE_REG(hw, REG_ISR, ISR_DIS_INT);
+
+        ret = atl1c_stop_mac(hw);
+        if (ret)
+                return ret;
+        /*
+         * Issue Soft Reset to the MAC.  This will reset the chip's
+         * transmit, receive, DMA.  It will not effect
+         * the current PCI configuration.  The global reset bit is self-
+         * clearing, and should clear within a microsecond.
+         */
+        AT_WRITE_REGW(hw, REG_MASTER_CTRL, MASTER_CTRL_SOFT_RST);
+        AT_WRITE_FLUSH(hw);
+        msleep(10);
+        /* Wait at least 10ms for All module to be Idle */
+        for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
+                AT_READ_REG(hw, REG_IDLE_STATUS, &idle_status_data);
+                if ((idle_status_data & IDLE_STATUS_MASK) == 0)
+                        break;
+                msleep(1);
+        }
+        if (timeout >= AT_HW_MAX_IDLE_DELAY) {
+                dev_err(&pdev->dev,
+                        "MAC state machine cann't be idle since"
+                        " disabled for 10ms second\n");
+                return -1;
+        }
+        return 0;
+}
+
+static void atl1c_disable_l0s_l1(struct atl1c_hw *hw)
+{
+        u32 pm_ctrl_data;
+
+        AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
+        pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
+                        PM_CTRL_L1_ENTRY_TIMER_SHIFT);
+        pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
+        pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
+        pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
+        pm_ctrl_data &= ~PM_CTRL_MAC_ASPM_CHK;
+        pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
+
+        pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
+        pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
+        pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
+        AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
+}
+
+/*
+ * Set ASPM state.
+ * Enable/disable L0s/L1 depend on link state.
+ */
+static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup)
+{
+        u32 pm_ctrl_data;
+
+        AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
+
+        pm_ctrl_data &= PM_CTRL_SERDES_PD_EX_L1;
+        pm_ctrl_data |= ~PM_CTRL_SERDES_BUDS_RX_L1_EN;
+        pm_ctrl_data |= ~PM_CTRL_SERDES_L1_EN;
+        pm_ctrl_data &=  ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
+                        PM_CTRL_L1_ENTRY_TIMER_SHIFT);
+
+        pm_ctrl_data |= PM_CTRL_MAC_ASPM_CHK;
+
+        if (linkup) {
+                pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
+                pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
+
+                if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT) {
+                        pm_ctrl_data |= AT_ASPM_L1_TIMER <<
+                                PM_CTRL_L1_ENTRY_TIMER_SHIFT;
+                        pm_ctrl_data |= PM_CTRL_ASPM_L1_EN;
+                } else
+                        pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
+
+                if (hw->ctrl_flags & ATL1C_ASPM_L0S_SUPPORT)
+                        pm_ctrl_data |= PM_CTRL_ASPM_L0S_EN;
+                else
+                        pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
+
+        } else {
+                pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
+                pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN;
+
+                pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
+
+                if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
+                        pm_ctrl_data |= PM_CTRL_ASPM_L1_EN;
+                else
+                        pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
+        }
+
+        AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
+}
+
+static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter)
+{
+        struct atl1c_hw *hw = &adapter->hw;
+        struct net_device *netdev = adapter->netdev;
+        u32 mac_ctrl_data;
+
+        mac_ctrl_data = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
+        mac_ctrl_data |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
+
+        if (adapter->link_duplex == FULL_DUPLEX) {
+                hw->mac_duplex = true;
+                mac_ctrl_data |= MAC_CTRL_DUPLX;
+        }
+
+        if (adapter->link_speed == SPEED_1000)
+                hw->mac_speed = atl1c_mac_speed_1000;
+        else
+                hw->mac_speed = atl1c_mac_speed_10_100;
+
+        mac_ctrl_data |= (hw->mac_speed & MAC_CTRL_SPEED_MASK) <<
+                        MAC_CTRL_SPEED_SHIFT;
+
+        mac_ctrl_data |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
+        mac_ctrl_data |= ((hw->preamble_len & MAC_CTRL_PRMLEN_MASK) <<
+                        MAC_CTRL_PRMLEN_SHIFT);
+
+        if (adapter->vlgrp)
+                mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
+
+        mac_ctrl_data |= MAC_CTRL_BC_EN;
+        if (netdev->flags & IFF_PROMISC)
+                mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
+        if (netdev->flags & IFF_ALLMULTI)
+                mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
+
+        mac_ctrl_data |= MAC_CTRL_SINGLE_PAUSE_EN;
+        AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
+}
+
+/*
+ * atl1c_configure - Configure Transmit&Receive Unit after Reset
+ * @adapter: board private structure
+ *
+ * Configure the Tx /Rx unit of the MAC after a reset.
+ */
+static int atl1c_configure(struct atl1c_adapter *adapter)
+{
+        struct atl1c_hw *hw = &adapter->hw;
+        u32 master_ctrl_data = 0;
+        u32 intr_modrt_data;
+
+        /* clear interrupt status */
+        AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF);
+        /*  Clear any WOL status */
+        AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
+        /* set Interrupt Clear Timer
+         * HW will enable self to assert interrupt event to system after
+         * waiting x-time for software to notify it accept interrupt.
+         */
+        AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER,
+                hw->ict & INT_RETRIG_TIMER_MASK);
+
+        atl1c_configure_des_ring(adapter);
+
+        if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) {
+                intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) <<
+                                        IRQ_MODRT_TX_TIMER_SHIFT;
+                intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) <<
+                                        IRQ_MODRT_RX_TIMER_SHIFT;
+                AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data);
+                master_ctrl_data |=
+                        MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN;
+        }
+
+        if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ)
+                master_ctrl_data |= MASTER_CTRL_INT_RDCLR;
+
+        AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
+
+        if (hw->ctrl_flags & ATL1C_CMB_ENABLE) {
+                AT_WRITE_REG(hw, REG_CMB_TPD_THRESH,
+                        hw->cmb_tpd & CMB_TPD_THRESH_MASK);
+                AT_WRITE_REG(hw, REG_CMB_TX_TIMER,
+                        hw->cmb_tx_timer & CMB_TX_TIMER_MASK);
+        }
+
+        if (hw->ctrl_flags & ATL1C_SMB_ENABLE)
+                AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,
+                        hw->smb_timer & SMB_STAT_TIMER_MASK);
+        /* set MTU */
+        AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
+                        VLAN_HLEN + ETH_FCS_LEN);
+        /* HDS, disable */
+        AT_WRITE_REG(hw, REG_HDS_CTRL, 0);
+
+        atl1c_configure_tx(adapter);
+        atl1c_configure_rx(adapter);
+        atl1c_configure_rss(adapter);
+        atl1c_configure_dma(adapter);
+
+        return 0;
+}
+
+static void atl1c_update_hw_stats(struct atl1c_adapter *adapter)
+{
+        u16 hw_reg_addr = 0;
+        unsigned long *stats_item = NULL;
+        u32 data;
+
+        /* update rx status */
+        hw_reg_addr = REG_MAC_RX_STATUS_BIN;
+        stats_item  = &adapter->hw_stats.rx_ok;
+        while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
+                AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
+                *stats_item += data;
+                stats_item++;
+                hw_reg_addr += 4;
+        }
+/* update tx status */
+        hw_reg_addr = REG_MAC_TX_STATUS_BIN;
+        stats_item  = &adapter->hw_stats.tx_ok;
+        while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
+                AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
+                *stats_item += data;
+                stats_item++;
+                hw_reg_addr += 4;
+        }
+}
+
+/*
+ * atl1c_get_stats - Get System Network Statistics
+ * @netdev: network interface device structure
+ *
+ * Returns the address of the device statistics structure.
+ * The statistics are actually updated from the timer callback.
+ */
+static struct net_device_stats *atl1c_get_stats(struct net_device *netdev)
+{
+        struct atl1c_adapter *adapter = netdev_priv(netdev);
+        struct atl1c_hw_stats  *hw_stats = &adapter->hw_stats;
+        struct net_device_stats *net_stats = &adapter->net_stats;
+
+        atl1c_update_hw_stats(adapter);
+        net_stats->rx_packets = hw_stats->rx_ok;
+        net_stats->tx_packets = hw_stats->tx_ok;
+        net_stats->rx_bytes   = hw_stats->rx_byte_cnt;
+        net_stats->tx_bytes   = hw_stats->tx_byte_cnt;
+        net_stats->multicast  = hw_stats->rx_mcast;
+        net_stats->collisions = hw_stats->tx_1_col +
+                                hw_stats->tx_2_col * 2 +
+                                hw_stats->tx_late_col + hw_stats->tx_abort_col;
+        net_stats->rx_errors  = hw_stats->rx_frag + hw_stats->rx_fcs_err +
+                                hw_stats->rx_len_err + hw_stats->rx_sz_ov +
+                                hw_stats->rx_rrd_ov + hw_stats->rx_align_err;
+        net_stats->rx_fifo_errors   = hw_stats->rx_rxf_ov;
+        net_stats->rx_length_errors = hw_stats->rx_len_err;
+        net_stats->rx_crc_errors    = hw_stats->rx_fcs_err;
+        net_stats->rx_frame_errors  = hw_stats->rx_align_err;
+        net_stats->rx_over_errors   = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
+
+        net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
+
+        net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col +
+                                hw_stats->tx_underrun + hw_stats->tx_trunc;
+        net_stats->tx_fifo_errors    = hw_stats->tx_underrun;
+        net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
+        net_stats->tx_window_errors  = hw_stats->tx_late_col;
+
+        return &adapter->net_stats;
+}
+
+static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter)
+{
+        u16 phy_data;
+
+        spin_lock(&adapter->mdio_lock);
+        atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data);
+        spin_unlock(&adapter->mdio_lock);
+}
+
+static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter,
+                                enum atl1c_trans_queue type)
+{
+        struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
+                                &adapter->tpd_ring[type];
+        struct atl1c_buffer *buffer_info;
+        u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
+        u16 hw_next_to_clean;
+        u16 shift;
+        u32 data;
+
+        if (type == atl1c_trans_high)
+                shift = MB_HTPD_CONS_IDX_SHIFT;
+        else
+                shift = MB_NTPD_CONS_IDX_SHIFT;
+
+        AT_READ_REG(&adapter->hw, REG_MB_PRIO_CONS_IDX, &data);
+        hw_next_to_clean = (data >> shift) & MB_PRIO_PROD_IDX_MASK;
+
+        while (next_to_clean != hw_next_to_clean) {
+                buffer_info = &tpd_ring->buffer_info[next_to_clean];
+                if (buffer_info->state == ATL1_BUFFER_BUSY) {
+                        pci_unmap_page(adapter->pdev, buffer_info->dma,
+                                        buffer_info->length, PCI_DMA_TODEVICE);
+                        buffer_info->dma = 0;
+                        if (buffer_info->skb) {
+                                dev_kfree_skb_irq(buffer_info->skb);
+                                buffer_info->skb = NULL;
+                        }
+                        buffer_info->state = ATL1_BUFFER_FREE;
+                }
+                if (++next_to_clean == tpd_ring->count)
+                        next_to_clean = 0;
+                atomic_set(&tpd_ring->next_to_clean, next_to_clean);
+        }
+
+        if (netif_queue_stopped(adapter->netdev) &&
+                        netif_carrier_ok(adapter->netdev)) {
+                netif_wake_queue(adapter->netdev);
+        }
+
+        return true;
+}
+
+/*
+ * atl1c_intr - Interrupt Handler
+ * @irq: interrupt number
+ * @data: pointer to a network interface device structure
+ * @pt_regs: CPU registers structure
+ */
+static irqreturn_t atl1c_intr(int irq, void *data)
+{
+        struct net_device *netdev  = data;
+        struct atl1c_adapter *adapter = netdev_priv(netdev);
+        struct pci_dev *pdev = adapter->pdev;
+        struct atl1c_hw *hw = &adapter->hw;
+        int max_ints = AT_MAX_INT_WORK;
+        int handled = IRQ_NONE;
+        u32 status;
+        u32 reg_data;
+
+        do {
+                AT_READ_REG(hw, REG_ISR, &reg_data);
+                status = reg_data & hw->intr_mask;
+
+                if (status == 0 || (status & ISR_DIS_INT) != 0) {
+                        if (max_ints != AT_MAX_INT_WORK)
+                                handled = IRQ_HANDLED;
+                        break;
+                }
+                /* link event */
+                if (status & ISR_GPHY)
+                        atl1c_clear_phy_int(adapter);
+                /* Ack ISR */
+                AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
+                if (status & ISR_RX_PKT) {
+                        if (likely(napi_schedule_prep(&adapter->napi))) {
+                                hw->intr_mask &= ~ISR_RX_PKT;
+                                AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
+                                __napi_schedule(&adapter->napi);
+                        }
+                }
+                if (status & ISR_TX_PKT)
+                        atl1c_clean_tx_irq(adapter, atl1c_trans_normal);
+
+                handled = IRQ_HANDLED;
+                /* check if PCIE PHY Link down */
+                if (status & ISR_ERROR) {
+                        if (netif_msg_hw(adapter))
+                                dev_err(&pdev->dev,
+                                        "atl1c hardware error (status = 0x%x)\n",
+                                        status & ISR_ERROR);
+                        /* reset MAC */
+                        hw->intr_mask &= ~ISR_ERROR;
+                        AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
+                        schedule_work(&adapter->reset_task);
+                        break;
+                }
+
+                if (status & ISR_OVER)
+                        if (netif_msg_intr(adapter))
+                                dev_warn(&pdev->dev,
+                                        "TX/RX over flow (status = 0x%x)\n",
+                                        status & ISR_OVER);
+
+                /* link event */
+                if (status & (ISR_GPHY | ISR_MANUAL)) {
+                        adapter->net_stats.tx_carrier_errors++;
+                        atl1c_link_chg_event(adapter);
+                        break;
+                }
+
+        } while (--max_ints > 0);
+        /* re-enable Interrupt*/
+        AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
+        return handled;
+}
+
+static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter,
+                  struct sk_buff *skb, struct atl1c_recv_ret_status *prrs)
+{
+        /*
+         * The pid field in RRS in not correct sometimes, so we
+         * cannot figure out if the packet is fragmented or not,
+         * so we tell the KERNEL CHECKSUM_NONE
+         */
+        skb->ip_summed = CHECKSUM_NONE;
+}
+
+static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter, const int ringid)
+{
+        struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[ringid];
+        struct pci_dev *pdev = adapter->pdev;
+        struct atl1c_buffer *buffer_info, *next_info;
+        struct sk_buff *skb;
+        void *vir_addr = NULL;
+        u16 num_alloc = 0;
+        u16 rfd_next_to_use, next_next;
+        struct atl1c_rx_free_desc *rfd_desc;
+
+        next_next = rfd_next_to_use = rfd_ring->next_to_use;
+        if (++next_next == rfd_ring->count)
+                next_next = 0;
+        buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
+        next_info = &rfd_ring->buffer_info[next_next];
+
+        while (next_info->state == ATL1_BUFFER_FREE) {
+                rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use);
+
+                skb = dev_alloc_skb(adapter->rx_buffer_len);
+                if (unlikely(!skb)) {
+                        if (netif_msg_rx_err(adapter))
+                                dev_warn(&pdev->dev, "alloc rx buffer failed\n");
+                        break;
+                }
+
+                /*
+                 * Make buffer alignment 2 beyond a 16 byte boundary
+                 * this will result in a 16 byte aligned IP header after
+                 * the 14 byte MAC header is removed
+                 */
+                vir_addr = skb->data;
+                buffer_info->state = ATL1_BUFFER_BUSY;
+                buffer_info->skb = skb;
+                buffer_info->length = adapter->rx_buffer_len;
+                buffer_info->dma = pci_map_single(pdev, vir_addr,
+                                                buffer_info->length,
+                                                PCI_DMA_FROMDEVICE);
+                rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
+                rfd_next_to_use = next_next;
+                if (++next_next == rfd_ring->count)
+                        next_next = 0;
+                buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
+                next_info = &rfd_ring->buffer_info[next_next];
+                num_alloc++;
+        }
+
+        if (num_alloc) {
+                /* TODO: update mailbox here */
+                wmb();
+                rfd_ring->next_to_use = rfd_next_to_use;
+                AT_WRITE_REG(&adapter->hw, atl1c_rfd_prod_idx_regs[ringid],
+                        rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK);
+        }
+
+        return num_alloc;
+}
+
+static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring,
+                        struct  atl1c_recv_ret_status *rrs, u16 num)
+{
+        u16 i;
+        /* the relationship between rrd and rfd is one map one */
+        for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring,
+                                        rrd_ring->next_to_clean)) {
+                rrs->word3 &= ~RRS_RXD_UPDATED;
+                if (++rrd_ring->next_to_clean == rrd_ring->count)
+                        rrd_ring->next_to_clean = 0;
+        }
+}
+
+static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring,
+        struct atl1c_recv_ret_status *rrs, u16 num)
+{
+        u16 i;
+        u16 rfd_index;
+        struct atl1c_buffer *buffer_info = rfd_ring->buffer_info;
+
+        rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
+                        RRS_RX_RFD_INDEX_MASK;
+        for (i = 0; i < num; i++) {
+                buffer_info[rfd_index].skb = NULL;
+                buffer_info[rfd_index].state = ATL1_BUFFER_FREE;
+                if (++rfd_index == rfd_ring->count)
+                        rfd_index = 0;
+        }
+        rfd_ring->next_to_clean = rfd_index;
+}
+
+static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,
+                   int *work_done, int work_to_do)
+{
+        u16 rfd_num, rfd_index;
+        u16 count = 0;
+        u16 length;
+        struct pci_dev *pdev = adapter->pdev;
+        struct net_device *netdev  = adapter->netdev;
+        struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[que];
+        struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring[que];
+        struct sk_buff *skb;
+        struct atl1c_recv_ret_status *rrs;
+        struct atl1c_buffer *buffer_info;
+
+        while (1) {
+                if (*work_done >= work_to_do)
+                        break;
+                rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean);
+                if (likely(RRS_RXD_IS_VALID(rrs->word3))) {
+                        rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) &
+                                RRS_RX_RFD_CNT_MASK;
+                        if (unlikely(rfd_num) != 1)
+                                /* TODO support mul rfd*/
+                                if (netif_msg_rx_err(adapter))
+                                        dev_warn(&pdev->dev,
+                                                "Multi rfd not support yet!\n");
+                        goto rrs_checked;
+                } else {
+                        break;
+                }
+rrs_checked:
+                atl1c_clean_rrd(rrd_ring, rrs, rfd_num);
+                if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) {
+                        atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
+                                if (netif_msg_rx_err(adapter))
+                                        dev_warn(&pdev->dev,
+                                                "wrong packet! rrs word3 is %x\n",
+                                                rrs->word3);
+                        continue;
+                }
+
+                length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) &
+                                RRS_PKT_SIZE_MASK);
+                /* Good Receive */
+                if (likely(rfd_num == 1)) {
+                        rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
+                                        RRS_RX_RFD_INDEX_MASK;
+                        buffer_info = &rfd_ring->buffer_info[rfd_index];
+                        pci_unmap_single(pdev, buffer_info->dma,
+                                buffer_info->length, PCI_DMA_FROMDEVICE);
+                        skb = buffer_info->skb;
+                } else {
+                        /* TODO */
+                        if (netif_msg_rx_err(adapter))
+                                dev_warn(&pdev->dev,
+                                        "Multi rfd not support yet!\n");
+                        break;
+                }
+                atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
+                skb_put(skb, length - ETH_FCS_LEN);
+                skb->protocol = eth_type_trans(skb, netdev);
+                skb->dev = netdev;
+                atl1c_rx_checksum(adapter, skb, rrs);
+                if (unlikely(adapter->vlgrp) && rrs->word3 & RRS_VLAN_INS) {
+                        u16 vlan;
+
+                        AT_TAG_TO_VLAN(rrs->vlan_tag, vlan);
+                        vlan = le16_to_cpu(vlan);
+                        vlan_hwaccel_receive_skb(skb, adapter->vlgrp, vlan);
+                } else
+                        netif_receive_skb(skb);
+
+                netdev->last_rx = jiffies;
+                (*work_done)++;
+                count++;
+        }
+        if (count)
+                atl1c_alloc_rx_buffer(adapter, que);
+}
+
+/*
+ * atl1c_clean - NAPI Rx polling callback
+ * @adapter: board private structure
+ */
+static int atl1c_clean(struct napi_struct *napi, int budget)
+{
+        struct atl1c_adapter *adapter =
+                        container_of(napi, struct atl1c_adapter, napi);
+        int work_done = 0;
+
+        /* Keep link state information with original netdev */
+        if (!netif_carrier_ok(adapter->netdev))
+                goto quit_polling;
+        /* just enable one RXQ */
+        atl1c_clean_rx_irq(adapter, 0, &work_done, budget);
+
+        if (work_done < budget) {
+quit_polling:
+                napi_complete(napi);
+                adapter->hw.intr_mask |= ISR_RX_PKT;
+                AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
+        }
+        return work_done;
+}
+
+#ifdef CONFIG_NET_POLL_CONTROLLER
+
+/*
+ * Polling 'interrupt' - used by things like netconsole to send skbs
+ * without having to re-enable interrupts. It's not called while
+ * the interrupt routine is executing.
+ */
+static void atl1c_netpoll(struct net_device *netdev)
+{
+        struct atl1c_adapter *adapter = netdev_priv(netdev);
+
+        disable_irq(adapter->pdev->irq);
+        atl1c_intr(adapter->pdev->irq, netdev);
+        enable_irq(adapter->pdev->irq);
+}
+#endif
+
+static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type)
+{
+        struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
+        u16 next_to_use = 0;
+        u16 next_to_clean = 0;
+
+        next_to_clean = atomic_read(&tpd_ring->next_to_clean);
+        next_to_use   = tpd_ring->next_to_use;
+
+        return (u16)(next_to_clean > next_to_use) ?
+                (next_to_clean - next_to_use - 1) :
+                (tpd_ring->count + next_to_clean - next_to_use - 1);
+}
+
+/*
+ * get next usable tpd
+ * Note: should call atl1c_tdp_avail to make sure
+ * there is enough tpd to use
+ */
+static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter,
+        enum atl1c_trans_queue type)
+{
+        struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
+        struct atl1c_tpd_desc *tpd_desc;
+        u16 next_to_use = 0;
+
+        next_to_use = tpd_ring->next_to_use;
+        if (++tpd_ring->next_to_use == tpd_ring->count)
+                tpd_ring->next_to_use = 0;
+        tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use);
+        memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc));
+        return  tpd_desc;
+}
+
+static struct atl1c_buffer *
+atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd)
+{
+        struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
+
+        return &tpd_ring->buffer_info[tpd -
+                        (struct atl1c_tpd_desc *)tpd_ring->desc];
+}
+
+/* Calculate the transmit packet descript needed*/
+static u16 atl1c_cal_tpd_req(const struct sk_buff *skb)
+{
+        u16 tpd_req;
+        u16 proto_hdr_len = 0;
+
+        tpd_req = skb_shinfo(skb)->nr_frags + 1;
+
+        if (skb_is_gso(skb)) {
+                proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
+                if (proto_hdr_len < skb_headlen(skb))
+                        tpd_req++;
+                if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6)
+                        tpd_req++;
+        }
+        return tpd_req;
+}
+
+static int atl1c_tso_csum(struct atl1c_adapter *adapter,
+                          struct sk_buff *skb,
+                          struct atl1c_tpd_desc **tpd,
+                          enum atl1c_trans_queue type)
+{
+        struct pci_dev *pdev = adapter->pdev;
+        u8 hdr_len;
+        u32 real_len;
+        unsigned short offload_type;
+        int err;
+
+        if (skb_is_gso(skb)) {
+                if (skb_header_cloned(skb)) {
+                        err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
+                        if (unlikely(err))
+                                return -1;
+                }
+                offload_type = skb_shinfo(skb)->gso_type;
+
+                if (offload_type & SKB_GSO_TCPV4) {
+                        real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
+                                        + ntohs(ip_hdr(skb)->tot_len));
+
+                        if (real_len < skb->len)
+                                pskb_trim(skb, real_len);
+
+                        hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
+                        if (unlikely(skb->len == hdr_len)) {
+                                /* only xsum need */
+                                if (netif_msg_tx_queued(adapter))
+                                        dev_warn(&pdev->dev,
+                                                "IPV4 tso with zero data??\n");
+                                goto check_sum;
+                        } else {
+                                ip_hdr(skb)->check = 0;
+                                tcp_hdr(skb)->check = ~csum_tcpudp_magic(
+                                                        ip_hdr(skb)->saddr,
+                                                        ip_hdr(skb)->daddr,
+                                                        0, IPPROTO_TCP, 0);
+                                (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT;
+                        }
+                }
+
+                if (offload_type & SKB_GSO_TCPV6) {
+                        struct atl1c_tpd_ext_desc *etpd =
+                                *(struct atl1c_tpd_ext_desc **)(tpd);
+
+                        memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc));
+                        *tpd = atl1c_get_tpd(adapter, type);
+                        ipv6_hdr(skb)->payload_len = 0;
+                        /* check payload == 0 byte ? */
+                        hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
+                        if (unlikely(skb->len == hdr_len)) {
+                                /* only xsum need */
+                                if (netif_msg_tx_queued(adapter))
+                                        dev_warn(&pdev->dev,
+                                                "IPV6 tso with zero data??\n");
+                                goto check_sum;
+                        } else
+                                tcp_hdr(skb)->check = ~csum_ipv6_magic(
+                                                &ipv6_hdr(skb)->saddr,
+                                                &ipv6_hdr(skb)->daddr,
+                                                0, IPPROTO_TCP, 0);
+                        etpd->word1 |= 1 << TPD_LSO_EN_SHIFT;
+                        etpd->word1 |= 1 << TPD_LSO_VER_SHIFT;
+                        etpd->pkt_len = cpu_to_le32(skb->len);
+                        (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT;
+                }
+
+                (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT;
+                (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) <<
+                                TPD_TCPHDR_OFFSET_SHIFT;
+                (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) <<
+                                TPD_MSS_SHIFT;
+                return 0;
+        }
+
+check_sum:
+        if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
+                u8 css, cso;
+                cso = skb_transport_offset(skb);
+
+                if (unlikely(cso & 0x1)) {
+                        if (netif_msg_tx_err(adapter))
+                                dev_err(&adapter->pdev->dev,
+                                        "payload offset should not an event number\n");
+                        return -1;
+                } else {
+                        css = cso + skb->csum_offset;
+
+                        (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) <<
+                                        TPD_PLOADOFFSET_SHIFT;
+                        (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) <<
+                                        TPD_CCSUM_OFFSET_SHIFT;
+                        (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT;
+                }
+        }
+        return 0;
+}
+
+static void atl1c_tx_map(struct atl1c_adapter *adapter,
+                      struct sk_buff *skb, struct atl1c_tpd_desc *tpd,
+                        enum atl1c_trans_queue type)
+{
+        struct atl1c_tpd_desc *use_tpd = NULL;
+        struct atl1c_buffer *buffer_info = NULL;
+        u16 buf_len = skb_headlen(skb);
+        u16 map_len = 0;
+        u16 mapped_len = 0;
+        u16 hdr_len = 0;
+        u16 nr_frags;
+        u16 f;
+        int tso;
+
+        nr_frags = skb_shinfo(skb)->nr_frags;
+        tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK;
+        if (tso) {
+                /* TSO */
+                map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
+                use_tpd = tpd;
+
+                buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
+                buffer_info->length = map_len;
+                buffer_info->dma = pci_map_single(adapter->pdev,
+                                        skb->data, hdr_len, PCI_DMA_TODEVICE);
+                buffer_info->state = ATL1_BUFFER_BUSY;
+                mapped_len += map_len;
+                use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
+                use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
+        }
+
+        if (mapped_len < buf_len) {
+                /* mapped_len == 0, means we should use the first tpd,
+                   which is given by caller  */
+                if (mapped_len == 0)
+                        use_tpd = tpd;
+                else {
+                        use_tpd = atl1c_get_tpd(adapter, type);
+                        memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
+                        use_tpd = atl1c_get_tpd(adapter, type);
+                        memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
+                }
+                buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
+                buffer_info->length = buf_len - mapped_len;
+                buffer_info->dma =
+                        pci_map_single(adapter->pdev, skb->data + mapped_len,
+                                        buffer_info->length, PCI_DMA_TODEVICE);
+                buffer_info->state = ATL1_BUFFER_BUSY;
+
+                use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
+                use_tpd->buffer_len  = cpu_to_le16(buffer_info->length);
+        }
+
+        for (f = 0; f < nr_frags; f++) {
+                struct skb_frag_struct *frag;
+
+                frag = &skb_shinfo(skb)->frags[f];
+
+                use_tpd = atl1c_get_tpd(adapter, type);
+                memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
+
+                buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
+                buffer_info->length = frag->size;
+                buffer_info->dma =
+                        pci_map_page(adapter->pdev, frag->page,
+                                        frag->page_offset,
+                                        buffer_info->length,
+                                        PCI_DMA_TODEVICE);
+                buffer_info->state = ATL1_BUFFER_BUSY;
+
+                use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
+                use_tpd->buffer_len  = cpu_to_le16(buffer_info->length);
+        }
+
+        /* The last tpd */
+        use_tpd->word1 |= 1 << TPD_EOP_SHIFT;
+        /* The last buffer info contain the skb address,
+           so it will be free after unmap */
+        buffer_info->skb = skb;
+}
+
+static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb,
+                           struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type)
+{
+        struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
+        u32 prod_data;
+
+        AT_READ_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, &prod_data);
+        switch (type) {
+        case atl1c_trans_high:
+                prod_data &= 0xFFFF0000;
+                prod_data |= tpd_ring->next_to_use & 0xFFFF;
+                break;
+        case atl1c_trans_normal:
+                prod_data &= 0x0000FFFF;
+                prod_data |= (tpd_ring->next_to_use & 0xFFFF) << 16;
+                break;
+        default:
+                break;
+        }
+        wmb();
+        AT_WRITE_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, prod_data);
+}
+
+static int atl1c_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
+{
+        struct atl1c_adapter *adapter = netdev_priv(netdev);
+        unsigned long flags;
+        u16 tpd_req = 1;
+        struct atl1c_tpd_desc *tpd;
+        enum atl1c_trans_queue type = atl1c_trans_normal;
+
+        if (test_bit(__AT_DOWN, &adapter->flags)) {
+                dev_kfree_skb_any(skb);
+                return NETDEV_TX_OK;
+        }
+
+        tpd_req = atl1c_cal_tpd_req(skb);
+        if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) {
+                if (netif_msg_pktdata(adapter))
+                        dev_info(&adapter->pdev->dev, "tx locked\n");
+                return NETDEV_TX_LOCKED;
+        }
+        if (skb->mark == 0x01)
+                type = atl1c_trans_high;
+        else
+                type = atl1c_trans_normal;
+
+        if (atl1c_tpd_avail(adapter, type) < tpd_req) {
+                /* no enough descriptor, just stop queue */
+                netif_stop_queue(netdev);
+                spin_unlock_irqrestore(&adapter->tx_lock, flags);
+                return NETDEV_TX_BUSY;
+        }
+
+        tpd = atl1c_get_tpd(adapter, type);
+
+        /* do TSO and check sum */
+        if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) {
+                spin_unlock_irqrestore(&adapter->tx_lock, flags);
+                dev_kfree_skb_any(skb);
+                return NETDEV_TX_OK;
+        }
+
+        if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
+                u16 vlan = vlan_tx_tag_get(skb);
+                __le16 tag;
+
+                vlan = cpu_to_le16(vlan);
+                AT_VLAN_TO_TAG(vlan, tag);
+                tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT;
+                tpd->vlan_tag = tag;
+        }
+
+        if (skb_network_offset(skb) != ETH_HLEN)
+                tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */
+
+        atl1c_tx_map(adapter, skb, tpd, type);
+        atl1c_tx_queue(adapter, skb, tpd, type);
+
+        netdev->trans_start = jiffies;
+        spin_unlock_irqrestore(&adapter->tx_lock, flags);
+        return NETDEV_TX_OK;
+}
+
+static void atl1c_free_irq(struct atl1c_adapter *adapter)
+{
+        struct net_device *netdev = adapter->netdev;
+
+        free_irq(adapter->pdev->irq, netdev);
+
+        if (adapter->have_msi)
+                pci_disable_msi(adapter->pdev);
+}
+
+static int atl1c_request_irq(struct atl1c_adapter *adapter)
+{
+        struct pci_dev    *pdev   = adapter->pdev;
+        struct net_device *netdev = adapter->netdev;
+        int flags = 0;
+        int err = 0;
+
+        adapter->have_msi = true;
+        err = pci_enable_msi(adapter->pdev);
+        if (err) {
+                if (netif_msg_ifup(adapter))
+                        dev_err(&pdev->dev,
+                                "Unable to allocate MSI interrupt Error: %d\n",
+                                err);
+                adapter->have_msi = false;
+        } else
+                netdev->irq = pdev->irq;
+
+        if (!adapter->have_msi)
+                flags |= IRQF_SHARED;
+        err = request_irq(adapter->pdev->irq, &atl1c_intr, flags,
+                        netdev->name, netdev);
+        if (err) {
+                if (netif_msg_ifup(adapter))
+                        dev_err(&pdev->dev,
+                                "Unable to allocate interrupt Error: %d\n",
+                                err);
+                if (adapter->have_msi)
+                        pci_disable_msi(adapter->pdev);
+                return err;
+        }
+        if (netif_msg_ifup(adapter))
+                dev_dbg(&pdev->dev, "atl1c_request_irq OK\n");
+        return err;
+}
+
+int atl1c_up(struct atl1c_adapter *adapter)
+{
+        struct net_device *netdev = adapter->netdev;
+        int num;
+        int err;
+        int i;
+
+        netif_carrier_off(netdev);
+        atl1c_init_ring_ptrs(adapter);
+        atl1c_set_multi(netdev);
+        atl1c_restore_vlan(adapter);
+
+        for (i = 0; i < adapter->num_rx_queues; i++) {
+                num = atl1c_alloc_rx_buffer(adapter, i);
+                if (unlikely(num == 0)) {
+                        err = -ENOMEM;
+                        goto err_alloc_rx;
+                }
+        }
+
+        if (atl1c_configure(adapter)) {
+                err = -EIO;
+                goto err_up;
+        }
+
+        err = atl1c_request_irq(adapter);
+        if (unlikely(err))
+                goto err_up;
+
+        clear_bit(__AT_DOWN, &adapter->flags);
+        napi_enable(&adapter->napi);
+        atl1c_irq_enable(adapter);
+        atl1c_check_link_status(adapter);
+        netif_start_queue(netdev);
+        return err;
+
+err_up:
+err_alloc_rx:
+        atl1c_clean_rx_ring(adapter);
+        return err;
+}
+
+void atl1c_down(struct atl1c_adapter *adapter)
+{
+        struct net_device *netdev = adapter->netdev;
+
+        atl1c_del_timer(adapter);
+        atl1c_cancel_work(adapter);
+
+        /* signal that we're down so the interrupt handler does not
+         * reschedule our watchdog timer */
+        set_bit(__AT_DOWN, &adapter->flags);
+        netif_carrier_off(netdev);
+        napi_disable(&adapter->napi);
+        atl1c_irq_disable(adapter);
+        atl1c_free_irq(adapter);
+        AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT);
+        /* reset MAC to disable all RX/TX */
+        atl1c_reset_mac(&adapter->hw);
+        msleep(1);
+
+        adapter->link_speed = SPEED_0;
+        adapter->link_duplex = -1;
+        atl1c_clean_tx_ring(adapter, atl1c_trans_normal);
+        atl1c_clean_tx_ring(adapter, atl1c_trans_high);
+        atl1c_clean_rx_ring(adapter);
+}
+
+/*
+ * atl1c_open - Called when a network interface is made active
+ * @netdev: network interface device structure
+ *
+ * Returns 0 on success, negative value on failure
+ *
+ * The open entry point is called when a network interface is made
+ * active by the system (IFF_UP).  At this point all resources needed
+ * for transmit and receive operations are allocated, the interrupt
+ * handler is registered with the OS, the watchdog timer is started,
+ * and the stack is notified that the interface is ready.
+ */
+static int atl1c_open(struct net_device *netdev)
+{
+        struct atl1c_adapter *adapter = netdev_priv(netdev);
+        int err;
+
+        /* disallow open during test */
+        if (test_bit(__AT_TESTING, &adapter->flags))
+                return -EBUSY;
+
+        /* allocate rx/tx dma buffer & descriptors */
+        err = atl1c_setup_ring_resources(adapter);
+        if (unlikely(err))
+                return err;
+
+        err = atl1c_up(adapter);
+        if (unlikely(err))
+                goto err_up;
+
+        if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
+                u32 phy_data;
+
+                AT_READ_REG(&adapter->hw, REG_MDIO_CTRL, &phy_data);
+                phy_data |= MDIO_AP_EN;
+                AT_WRITE_REG(&adapter->hw, REG_MDIO_CTRL, phy_data);
+        }
+        return 0;
+
+err_up:
+        atl1c_free_irq(adapter);
+        atl1c_free_ring_resources(adapter);
+        atl1c_reset_mac(&adapter->hw);
+        return err;
+}
+
+/*
+ * atl1c_close - Disables a network interface
+ * @netdev: network interface device structure
+ *
+ * Returns 0, this is not allowed to fail
+ *
+ * The close entry point is called when an interface is de-activated
+ * by the OS.  The hardware is still under the drivers control, but
+ * needs to be disabled.  A global MAC reset is issued to stop the
+ * hardware, and all transmit and receive resources are freed.
+ */
+static int atl1c_close(struct net_device *netdev)
+{
+        struct atl1c_adapter *adapter = netdev_priv(netdev);
+
+        WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
+        atl1c_down(adapter);
+        atl1c_free_ring_resources(adapter);
+        return 0;
+}
+
+static int atl1c_suspend(struct pci_dev *pdev, pm_message_t state)
+{
+        struct net_device *netdev = pci_get_drvdata(pdev);
+        struct atl1c_adapter *adapter = netdev_priv(netdev);
+        struct atl1c_hw *hw = &adapter->hw;
+        u32 ctrl;
+        u32 mac_ctrl_data;
+        u32 master_ctrl_data;
+        u32 wol_ctrl_data;
+        u16 mii_bmsr_data;
+        u16 save_autoneg_advertised;
+        u16 mii_intr_status_data;
+        u32 wufc = adapter->wol;
+        u32 i;
+        int retval = 0;
+
+        if (netif_running(netdev)) {
+                WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
+                atl1c_down(adapter);
+        }
+        netif_device_detach(netdev);
+        atl1c_disable_l0s_l1(hw);
+        retval = pci_save_state(pdev);
+        if (retval)
+                return retval;
+        if (wufc) {
+                AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
+                master_ctrl_data &= ~MASTER_CTRL_CLK_SEL_DIS;
+
+                /* get link status */
+                atl1c_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data);
+                atl1c_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data);
+                save_autoneg_advertised = hw->autoneg_advertised;
+                hw->autoneg_advertised = ADVERTISED_10baseT_Half;
+                if (atl1c_restart_autoneg(hw) != 0)
+                        if (netif_msg_link(adapter))
+                                dev_warn(&pdev->dev, "phy autoneg failed\n");
+                hw->phy_configured = false; /* re-init PHY when resume */
+                hw->autoneg_advertised = save_autoneg_advertised;
+                /* turn on magic packet wol */
+                if (wufc & AT_WUFC_MAG)
+                        wol_ctrl_data = WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
+
+                if (wufc & AT_WUFC_LNKC) {
+                        for (i = 0; i < AT_SUSPEND_LINK_TIMEOUT; i++) {
+                                msleep(100);
+                                atl1c_read_phy_reg(hw, MII_BMSR,
+                                        (u16 *)&mii_bmsr_data);
+                                if (mii_bmsr_data & BMSR_LSTATUS)
+                                        break;
+                        }
+                        if ((mii_bmsr_data & BMSR_LSTATUS) == 0)
+                                if (netif_msg_link(adapter))
+                                        dev_warn(&pdev->dev,
+                                                "%s: Link may change"
+                                                "when suspend\n",
+                                                atl1c_driver_name);
+                        wol_ctrl_data |=  WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;
+                        /* only link up can wake up */
+                        if (atl1c_write_phy_reg(hw, MII_IER, IER_LINK_UP) != 0) {
+                                if (netif_msg_link(adapter))
+                                        dev_err(&pdev->dev,
+                                                "%s: read write phy "
+                                                "register failed.\n",
+                                                atl1c_driver_name);
+                                goto wol_dis;
+                        }
+                }
+                /* clear phy interrupt */
+                atl1c_read_phy_reg(hw, MII_ISR, &mii_intr_status_data);
+                /* Config MAC Ctrl register */
+                mac_ctrl_data = MAC_CTRL_RX_EN;
+                /* set to 10/100M halt duplex */
+                mac_ctrl_data |= atl1c_mac_speed_10_100 << MAC_CTRL_SPEED_SHIFT;
+                mac_ctrl_data |= (((u32)adapter->hw.preamble_len &
+                                 MAC_CTRL_PRMLEN_MASK) <<
+                                 MAC_CTRL_PRMLEN_SHIFT);
+
+                if (adapter->vlgrp)
+                        mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
+
+                /* magic packet maybe Broadcast&multicast&Unicast frame */
+                if (wufc & AT_WUFC_MAG)
+                        mac_ctrl_data |= MAC_CTRL_BC_EN;
+
+                if (netif_msg_hw(adapter))
+                        dev_dbg(&pdev->dev,
+                                "%s: suspend MAC=0x%x\n",
+                                atl1c_driver_name, mac_ctrl_data);
+                AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
+                AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data);
+                AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
+
+                /* pcie patch */
+                AT_READ_REG(hw, REG_PCIE_PHYMISC, &ctrl);
+                ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
+                AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
+
+                pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
+                goto suspend_exit;
+        }
+wol_dis:
+
+        /* WOL disabled */
+        AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
+
+        /* pcie patch */
+        AT_READ_REG(hw, REG_PCIE_PHYMISC, &ctrl);
+        ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
+        AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
+
+        atl1c_phy_disable(hw);
+        hw->phy_configured = false; /* re-init PHY when resume */
+
+        pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
+suspend_exit:
+
+        pci_disable_device(pdev);
+        pci_set_power_state(pdev, pci_choose_state(pdev, state));
+
+        return 0;
+}
+
+static int atl1c_resume(struct pci_dev *pdev)
+{
+        struct net_device *netdev = pci_get_drvdata(pdev);
+        struct atl1c_adapter *adapter = netdev_priv(netdev);
+
+        pci_set_power_state(pdev, PCI_D0);
+        pci_restore_state(pdev);
+        pci_enable_wake(pdev, PCI_D3hot, 0);
+        pci_enable_wake(pdev, PCI_D3cold, 0);
+
+        AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
+
+        atl1c_phy_reset(&adapter->hw);
+        atl1c_reset_mac(&adapter->hw);
+        netif_device_attach(netdev);
+        if (netif_running(netdev))
+                atl1c_up(adapter);
+
+        return 0;
+}
+
+static void atl1c_shutdown(struct pci_dev *pdev)
+{
+        atl1c_suspend(pdev, PMSG_SUSPEND);
+}
+
+static const struct net_device_ops atl1c_netdev_ops = {
+        .ndo_open               = atl1c_open,
+        .ndo_stop               = atl1c_close,
+        .ndo_validate_addr      = eth_validate_addr,
+        .ndo_start_xmit         = atl1c_xmit_frame,
+        .ndo_set_mac_address    = atl1c_set_mac_addr,
+        .ndo_set_multicast_list = atl1c_set_multi,
+        .ndo_change_mtu         = atl1c_change_mtu,
+        .ndo_do_ioctl           = atl1c_ioctl,
+        .ndo_tx_timeout         = atl1c_tx_timeout,
+        .ndo_get_stats          = atl1c_get_stats,
+        .ndo_vlan_rx_register   = atl1c_vlan_rx_register,
+#ifdef CONFIG_NET_POLL_CONTROLLER
+        .ndo_poll_controller    = atl1c_netpoll,
+#endif
+};
+
+static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
+{
+        SET_NETDEV_DEV(netdev, &pdev->dev);
+        pci_set_drvdata(pdev, netdev);
+
+        netdev->irq  = pdev->irq;
+        netdev->netdev_ops = &atl1c_netdev_ops;
+        netdev->watchdog_timeo = AT_TX_WATCHDOG;
+        atl1c_set_ethtool_ops(netdev);
+
+        /* TODO: add when ready */
+        netdev->features =      NETIF_F_SG         |
+                                NETIF_F_HW_CSUM    |
+                                NETIF_F_HW_VLAN_TX |
+                                NETIF_F_HW_VLAN_RX |
+                                NETIF_F_TSO        |
+                                NETIF_F_TSO6;
+        return 0;
+}
+
+/*
+ * atl1c_probe - Device Initialization Routine
+ * @pdev: PCI device information struct
+ * @ent: entry in atl1c_pci_tbl
+ *
+ * Returns 0 on success, negative on failure
+ *
+ * atl1c_probe initializes an adapter identified by a pci_dev structure.
+ * The OS initialization, configuring of the adapter private structure,
+ * and a hardware reset occur.
+ */
+static int __devinit atl1c_probe(struct pci_dev *pdev,
+                                 const struct pci_device_id *ent)
+{
+        struct net_device *netdev;
+        struct atl1c_adapter *adapter;
+        static int cards_found;
+
+        int err = 0;
+
+        /* enable device (incl. PCI PM wakeup and hotplug setup) */
+        err = pci_enable_device_mem(pdev);
+        if (err) {
+                dev_err(&pdev->dev, "cannot enable PCI device\n");
+                return err;
+        }
+
+        /*
+         * The atl1c chip can DMA to 64-bit addresses, but it uses a single
+         * shared register for the high 32 bits, so only a single, aligned,
+         * 4 GB physical address range can be used at a time.
+         *
+         * Supporting 64-bit DMA on this hardware is more trouble than it's
+         * worth.  It is far easier to limit to 32-bit DMA than update
+         * various kernel subsystems to support the mechanics required by a
+         * fixed-high-32-bit system.
+         */
+        if ((pci_set_dma_mask(pdev, DMA_32BIT_MASK) != 0) ||
+            (pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK) != 0)) {
+                dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
+                goto err_dma;
+        }
+
+        err = pci_request_regions(pdev, atl1c_driver_name);
+        if (err) {
+                dev_err(&pdev->dev, "cannot obtain PCI resources\n");
+                goto err_pci_reg;
+        }
+
+        pci_set_master(pdev);
+
+        netdev = alloc_etherdev(sizeof(struct atl1c_adapter));
+        if (netdev == NULL) {
+                err = -ENOMEM;
+                dev_err(&pdev->dev, "etherdev alloc failed\n");
+                goto err_alloc_etherdev;
+        }
+
+        err = atl1c_init_netdev(netdev, pdev);
+        if (err) {
+                dev_err(&pdev->dev, "init netdevice failed\n");
+                goto err_init_netdev;
+        }
+        adapter = netdev_priv(netdev);
+        adapter->bd_number = cards_found;
+        adapter->netdev = netdev;
+        adapter->pdev = pdev;
+        adapter->hw.adapter = adapter;
+        adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg);
+        adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
+        if (!adapter->hw.hw_addr) {
+                err = -EIO;
+                dev_err(&pdev->dev, "cannot map device registers\n");
+                goto err_ioremap;
+        }
+        netdev->base_addr = (unsigned long)adapter->hw.hw_addr;
+
+        /* init mii data */
+        adapter->mii.dev = netdev;
+        adapter->mii.mdio_read  = atl1c_mdio_read;
+        adapter->mii.mdio_write = atl1c_mdio_write;
+        adapter->mii.phy_id_mask = 0x1f;
+        adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK;
+        netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64);
+        setup_timer(&adapter->phy_config_timer, atl1c_phy_config,
+                        (unsigned long)adapter);
+        /* setup the private structure */
+        err = atl1c_sw_init(adapter);
+        if (err) {
+                dev_err(&pdev->dev, "net device private data init failed\n");
+                goto err_sw_init;
+        }
+        atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE |
+                        ATL1C_PCIE_PHY_RESET);
+
+        /* Init GPHY as early as possible due to power saving issue  */
+        atl1c_phy_reset(&adapter->hw);
+
+        err = atl1c_reset_mac(&adapter->hw);
+        if (err) {
+                err = -EIO;
+                goto err_reset;
+        }
+
+        device_init_wakeup(&pdev->dev, 1);
+        /* reset the controller to
+         * put the device in a known good starting state */
+        err = atl1c_phy_init(&adapter->hw);
+        if (err) {
+                err = -EIO;
+                goto err_reset;
+        }
+        if (atl1c_read_mac_addr(&adapter->hw) != 0) {
+                err = -EIO;
+                dev_err(&pdev->dev, "get mac address failed\n");
+                goto err_eeprom;
+        }
+        memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
+        memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
+        if (netif_msg_probe(adapter))
+                dev_dbg(&pdev->dev,
+                        "mac address : %02x-%02x-%02x-%02x-%02x-%02x\n",
+                        adapter->hw.mac_addr[0], adapter->hw.mac_addr[1],
+                        adapter->hw.mac_addr[2], adapter->hw.mac_addr[3],
+                        adapter->hw.mac_addr[4], adapter->hw.mac_addr[5]);
+
+        atl1c_hw_set_mac_addr(&adapter->hw);
+        INIT_WORK(&adapter->reset_task, atl1c_reset_task);
+        INIT_WORK(&adapter->link_chg_task, atl1c_link_chg_task);
+        err = register_netdev(netdev);
+        if (err) {
+                dev_err(&pdev->dev, "register netdevice failed\n");
+                goto err_register;
+        }
+
+        if (netif_msg_probe(adapter))
+                dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION);
+        cards_found++;
+        return 0;
+
+err_reset:
+err_register:
+err_sw_init:
+err_eeprom:
+        iounmap(adapter->hw.hw_addr);
+err_init_netdev:
+err_ioremap:
+        free_netdev(netdev);
+err_alloc_etherdev:
+        pci_release_regions(pdev);
+err_pci_reg:
+err_dma:
+        pci_disable_device(pdev);
+        return err;
+}
+
+/*
+ * atl1c_remove - Device Removal Routine
+ * @pdev: PCI device information struct
+ *
+ * atl1c_remove is called by the PCI subsystem to alert the driver
+ * that it should release a PCI device.  The could be caused by a
+ * Hot-Plug event, or because the driver is going to be removed from
+ * memory.
+ */
+static void __devexit atl1c_remove(struct pci_dev *pdev)
+{
+        struct net_device *netdev = pci_get_drvdata(pdev);
+        struct atl1c_adapter *adapter = netdev_priv(netdev);
+
+        unregister_netdev(netdev);
+        atl1c_phy_disable(&adapter->hw);
+
+        iounmap(adapter->hw.hw_addr);
+
+        pci_release_regions(pdev);
+        pci_disable_device(pdev);
+        free_netdev(netdev);
+}
+
+/*
+ * atl1c_io_error_detected - called when PCI error is detected
+ * @pdev: Pointer to PCI device
+ * @state: The current pci connection state
+ *
+ * This function is called after a PCI bus error affecting
+ * this device has been detected.
+ */
+static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev,
+                                                pci_channel_state_t state)
+{
+        struct net_device *netdev = pci_get_drvdata(pdev);
+        struct atl1c_adapter *adapter = netdev_priv(netdev);
+
+        netif_device_detach(netdev);
+
+        if (netif_running(netdev))
+                atl1c_down(adapter);
+
+        pci_disable_device(pdev);
+
+        /* Request a slot slot reset. */
+        return PCI_ERS_RESULT_NEED_RESET;
+}
+
+/*
+ * atl1c_io_slot_reset - called after the pci bus has been reset.
+ * @pdev: Pointer to PCI device
+ *
+ * Restart the card from scratch, as if from a cold-boot. Implementation
+ * resembles the first-half of the e1000_resume routine.
+ */
+static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev)
+{
+        struct net_device *netdev = pci_get_drvdata(pdev);
+        struct atl1c_adapter *adapter = netdev_priv(netdev);
+
+        if (pci_enable_device(pdev)) {
+                if (netif_msg_hw(adapter))
+                        dev_err(&pdev->dev,
+                                "Cannot re-enable PCI device after reset\n");
+                return PCI_ERS_RESULT_DISCONNECT;
+        }
+        pci_set_master(pdev);
+
+        pci_enable_wake(pdev, PCI_D3hot, 0);
+        pci_enable_wake(pdev, PCI_D3cold, 0);
+
+        atl1c_reset_mac(&adapter->hw);
+
+        return PCI_ERS_RESULT_RECOVERED;
+}
+
+/*
+ * atl1c_io_resume - called when traffic can start flowing again.
+ * @pdev: Pointer to PCI device
+ *
+ * This callback is called when the error recovery driver tells us that
+ * its OK to resume normal operation. Implementation resembles the
+ * second-half of the atl1c_resume routine.
+ */
+static void atl1c_io_resume(struct pci_dev *pdev)
+{
+        struct net_device *netdev = pci_get_drvdata(pdev);
+        struct atl1c_adapter *adapter = netdev_priv(netdev);
+
+        if (netif_running(netdev)) {
+                if (atl1c_up(adapter)) {
+                        if (netif_msg_hw(adapter))
+                                dev_err(&pdev->dev,
+                                        "Cannot bring device back up after reset\n");
+                        return;
+                }
+        }
+
+        netif_device_attach(netdev);
+}
+
+static struct pci_error_handlers atl1c_err_handler = {
+        .error_detected = atl1c_io_error_detected,
+        .slot_reset = atl1c_io_slot_reset,
+        .resume = atl1c_io_resume,
+};
+
+static struct pci_driver atl1c_driver = {
+        .name     = atl1c_driver_name,
+        .id_table = atl1c_pci_tbl,
+        .probe    = atl1c_probe,
+        .remove   = __devexit_p(atl1c_remove),
+        /* Power Managment Hooks */
+        .suspend  = atl1c_suspend,
+        .resume   = atl1c_resume,
+        .shutdown = atl1c_shutdown,
+        .err_handler = &atl1c_err_handler
+};
+
+/*
+ * atl1c_init_module - Driver Registration Routine
+ *
+ * atl1c_init_module is the first routine called when the driver is
+ * loaded. All it does is register with the PCI subsystem.
+ */
+static int __init atl1c_init_module(void)
+{
+        return pci_register_driver(&atl1c_driver);
+}
+
+/*
+ * atl1c_exit_module - Driver Exit Cleanup Routine
+ *
+ * atl1c_exit_module is called just before the driver is removed
+ * from memory.
+ */
+static void __exit atl1c_exit_module(void)
+{
+        pci_unregister_driver(&atl1c_driver);
+}
+
+module_init(atl1c_init_module);
+module_exit(atl1c_exit_module);
diff --git a/drivers/net/b44.c b/drivers/net/b44.c
index c38512ebcea6..dc5f051005fa 100644
--- a/drivers/net/b44.c
+++ b/drivers/net/b44.c
@@ -1264,8 +1264,14 @@ static void b44_clear_stats(struct b44 *bp)
 static void b44_chip_reset(struct b44 *bp, int reset_kind)
 {
         struct ssb_device *sdev = bp->sdev;
+        bool was_enabled;
 
-        if (ssb_device_is_enabled(bp->sdev)) {
+        was_enabled = ssb_device_is_enabled(bp->sdev);
+
+        ssb_device_enable(bp->sdev, 0);
+        ssb_pcicore_dev_irqvecs_enable(&sdev->bus->pcicore, sdev);
+
+        if (was_enabled) {
                 bw32(bp, B44_RCV_LAZY, 0);
                 bw32(bp, B44_ENET_CTRL, ENET_CTRL_DISABLE);
                 b44_wait_bit(bp, B44_ENET_CTRL, ENET_CTRL_DISABLE, 200, 1);
@@ -1277,10 +1283,8 @@ static void b44_chip_reset(struct b44 *bp, int reset_kind)
                 }
                 bw32(bp, B44_DMARX_CTRL, 0);
                 bp->rx_prod = bp->rx_cons = 0;
-        } else
-                ssb_pcicore_dev_irqvecs_enable(&sdev->bus->pcicore, sdev);
+        }
 
-        ssb_device_enable(bp->sdev, 0);
         b44_clear_stats(bp);
 
         /*
@@ -2236,6 +2240,7 @@ static void __devexit b44_remove_one(struct ssb_device *sdev)
         struct net_device *dev = ssb_get_drvdata(sdev);
 
         unregister_netdev(dev);
+        ssb_device_disable(sdev, 0);
         ssb_bus_may_powerdown(sdev->bus);
         free_netdev(dev);
         ssb_pcihost_set_power_state(sdev, PCI_D3hot);
diff --git a/drivers/net/benet/Kconfig b/drivers/net/benet/Kconfig
new file mode 100644
index 000000000000..c6934f179c09
--- /dev/null
+++ b/drivers/net/benet/Kconfig
@@ -0,0 +1,7 @@
+config BE2NET
+        tristate "ServerEngines' 10Gbps NIC - BladeEngine 2"
+        depends on PCI && INET
+        select INET_LRO
+        help
+        This driver implements the NIC functionality for ServerEngines'
+        10Gbps network adapter - BladeEngine 2.
diff --git a/drivers/net/benet/Makefile b/drivers/net/benet/Makefile
new file mode 100644
index 000000000000..a60cd8051135
--- /dev/null
+++ b/drivers/net/benet/Makefile
@@ -0,0 +1,7 @@
+#
+# Makefile to build the network driver for ServerEngine's BladeEngine.
+#
+
+obj-$(CONFIG_BE2NET) += be2net.o
+
+be2net-y :=  be_main.o be_cmds.o be_ethtool.o
diff --git a/drivers/net/benet/be.h b/drivers/net/benet/be.h
new file mode 100644
index 000000000000..f327be57ca96
--- /dev/null
+++ b/drivers/net/benet/be.h
@@ -0,0 +1,328 @@
+/*
+ * Copyright (C) 2005 - 2009 ServerEngines
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.  The full GNU General
+ * Public License is included in this distribution in the file called COPYING.
+ *
+ * Contact Information:
+ * linux-drivers@serverengines.com
+ *
+ * ServerEngines
+ * 209 N. Fair Oaks Ave
+ * Sunnyvale, CA 94085
+ */
+
+#ifndef BE_H
+#define BE_H
+
+#include <linux/pci.h>
+#include <linux/etherdevice.h>
+#include <linux/version.h>
+#include <linux/delay.h>
+#include <net/tcp.h>
+#include <net/ip.h>
+#include <net/ipv6.h>
+#include <linux/if_vlan.h>
+#include <linux/workqueue.h>
+#include <linux/interrupt.h>
+#include <linux/inet_lro.h>
+
+#include "be_hw.h"
+
+#define DRV_VER                 "2.0.348"
+#define DRV_NAME                "be2net"
+#define BE_NAME                 "ServerEngines BladeEngine2 10Gbps NIC"
+#define DRV_DESC                BE_NAME "Driver"
+
+/* Number of bytes of an RX frame that are copied to skb->data */
+#define BE_HDR_LEN              64
+#define BE_MAX_JUMBO_FRAME_SIZE 9018
+#define BE_MIN_MTU              256
+
+#define BE_NUM_VLANS_SUPPORTED  64
+#define BE_MAX_EQD              96
+#define BE_MAX_TX_FRAG_COUNT    30
+
+#define EVNT_Q_LEN              1024
+#define TX_Q_LEN                2048
+#define TX_CQ_LEN               1024
+#define RX_Q_LEN                1024    /* Does not support any other value */
+#define RX_CQ_LEN               1024
+#define MCC_Q_LEN               64      /* total size not to exceed 8 pages */
+#define MCC_CQ_LEN              256
+
+#define BE_NAPI_WEIGHT          64
+#define MAX_RX_POST             BE_NAPI_WEIGHT /* Frags posted at a time */
+#define RX_FRAGS_REFILL_WM      (RX_Q_LEN - MAX_RX_POST)
+
+#define BE_MAX_LRO_DESCRIPTORS  16
+#define BE_MAX_FRAGS_PER_FRAME  16
+
+struct be_dma_mem {
+        void *va;
+        dma_addr_t dma;
+        u32 size;
+};
+
+struct be_queue_info {
+        struct be_dma_mem dma_mem;
+        u16 len;
+        u16 entry_size; /* Size of an element in the queue */
+        u16 id;
+        u16 tail, head;
+        bool created;
+        atomic_t used;  /* Number of valid elements in the queue */
+};
+
+struct be_ctrl_info {
+        u8 __iomem *csr;
+        u8 __iomem *db;         /* Door Bell */
+        u8 __iomem *pcicfg;     /* PCI config space */
+        int pci_func;
+
+        /* Mbox used for cmd request/response */
+        spinlock_t cmd_lock;    /* For serializing cmds to BE card */
+        struct be_dma_mem mbox_mem;
+        /* Mbox mem is adjusted to align to 16 bytes. The allocated addr
+         * is stored for freeing purpose */
+        struct be_dma_mem mbox_mem_alloced;
+};
+
+#include "be_cmds.h"
+
+struct be_drvr_stats {
+        u32 be_tx_reqs;         /* number of TX requests initiated */
+        u32 be_tx_stops;        /* number of times TX Q was stopped */
+        u32 be_fwd_reqs;        /* number of send reqs through forwarding i/f */
+        u32 be_tx_wrbs;         /* number of tx WRBs used */
+        u32 be_tx_events;       /* number of tx completion events  */
+        u32 be_tx_compl;        /* number of tx completion entries processed */
+        u64 be_tx_jiffies;
+        ulong be_tx_bytes;
+        ulong be_tx_bytes_prev;
+        u32 be_tx_rate;
+
+        u32 cache_barrier[16];
+
+        u32 be_ethrx_post_fail;/* number of ethrx buffer alloc failures */
+        u32 be_polls;           /* number of times NAPI called poll function */
+        u32 be_rx_events;       /* number of ucast rx completion events  */
+        u32 be_rx_compl;        /* number of rx completion entries processed */
+        u32 be_lro_hgram_data[8];       /* histogram of LRO data packets */
+        u32 be_lro_hgram_ack[8];        /* histogram of LRO ACKs */
+        u64 be_rx_jiffies;
+        ulong be_rx_bytes;
+        ulong be_rx_bytes_prev;
+        u32 be_rx_rate;
+        /* number of non ether type II frames dropped where
+         * frame len > length field of Mac Hdr */
+        u32 be_802_3_dropped_frames;
+        /* number of non ether type II frames malformed where
+         * in frame len < length field of Mac Hdr */
+        u32 be_802_3_malformed_frames;
+        u32 be_rxcp_err;        /* Num rx completion entries w/ err set. */
+        ulong rx_fps_jiffies;   /* jiffies at last FPS calc */
+        u32 be_rx_frags;
+        u32 be_prev_rx_frags;
+        u32 be_rx_fps;          /* Rx frags per second */
+};
+
+struct be_stats_obj {
+        struct be_drvr_stats drvr_stats;
+        struct net_device_stats net_stats;
+        struct be_dma_mem cmd;
+};
+
+struct be_eq_obj {
+        struct be_queue_info q;
+        char desc[32];
+
+        /* Adaptive interrupt coalescing (AIC) info */
+        bool enable_aic;
+        u16 min_eqd;            /* in usecs */
+        u16 max_eqd;            /* in usecs */
+        u16 cur_eqd;            /* in usecs */
+
+        struct napi_struct napi;
+};
+
+struct be_tx_obj {
+        struct be_queue_info q;
+        struct be_queue_info cq;
+        /* Remember the skbs that were transmitted */
+        struct sk_buff *sent_skb_list[TX_Q_LEN];
+};
+
+/* Struct to remember the pages posted for rx frags */
+struct be_rx_page_info {
+        struct page *page;
+        dma_addr_t bus;
+        u16 page_offset;
+        bool last_page_user;
+};
+
+struct be_rx_obj {
+        struct be_queue_info q;
+        struct be_queue_info cq;
+        struct be_rx_page_info page_info_tbl[RX_Q_LEN];
+        struct net_lro_mgr lro_mgr;
+        struct net_lro_desc lro_desc[BE_MAX_LRO_DESCRIPTORS];
+};
+
+#define BE_NUM_MSIX_VECTORS             2       /* 1 each for Tx and Rx */
+struct be_adapter {
+        struct pci_dev *pdev;
+        struct net_device *netdev;
+
+        /* Mbox, pci config, csr address information */
+        struct be_ctrl_info ctrl;
+
+        struct msix_entry msix_entries[BE_NUM_MSIX_VECTORS];
+        bool msix_enabled;
+        bool isr_registered;
+
+        /* TX Rings */
+        struct be_eq_obj tx_eq;
+        struct be_tx_obj tx_obj;
+
+        u32 cache_line_break[8];
+
+        /* Rx rings */
+        struct be_eq_obj rx_eq;
+        struct be_rx_obj rx_obj;
+        u32 big_page_size;      /* Compounded page size shared by rx wrbs */
+        bool rx_post_starved;   /* Zero rx frags have been posted to BE */
+
+        struct vlan_group *vlan_grp;
+        u16 num_vlans;
+        u8 vlan_tag[VLAN_GROUP_ARRAY_LEN];
+
+        struct be_stats_obj stats;
+        /* Work queue used to perform periodic tasks like getting statistics */
+        struct delayed_work work;
+
+        /* Ethtool knobs and info */
+        bool rx_csum;           /* BE card must perform rx-checksumming */
+        u32 max_rx_coal;
+        char fw_ver[FW_VER_LEN];
+        u32 if_handle;          /* Used to configure filtering */
+        u32 pmac_id;            /* MAC addr handle used by BE card */
+
+        struct be_link_info link;
+        u32 port_num;
+};
+
+extern struct ethtool_ops be_ethtool_ops;
+
+#define drvr_stats(adapter)             (&adapter->stats.drvr_stats)
+
+#define BE_SET_NETDEV_OPS(netdev, ops)  (netdev->netdev_ops = ops)
+
+static inline u32 MODULO(u16 val, u16 limit)
+{
+        BUG_ON(limit & (limit - 1));
+        return val & (limit - 1);
+}
+
+static inline void index_adv(u16 *index, u16 val, u16 limit)
+{
+        *index = MODULO((*index + val), limit);
+}
+
+static inline void index_inc(u16 *index, u16 limit)
+{
+        *index = MODULO((*index + 1), limit);
+}
+
+#define PAGE_SHIFT_4K           12
+#define PAGE_SIZE_4K            (1 << PAGE_SHIFT_4K)
+
+/* Returns number of pages spanned by the data starting at the given addr */
+#define PAGES_4K_SPANNED(_address, size)                                \
+                ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) +     \
+                        (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K))
+
+/* Byte offset into the page corresponding to given address */
+#define OFFSET_IN_PAGE(addr)                                            \
+                 ((size_t)(addr) & (PAGE_SIZE_4K-1))
+
+/* Returns bit offset within a DWORD of a bitfield */
+#define AMAP_BIT_OFFSET(_struct, field)                                 \
+                (((size_t)&(((_struct *)0)->field))%32)
+
+/* Returns the bit mask of the field that is NOT shifted into location. */
+static inline u32 amap_mask(u32 bitsize)
+{
+        return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1);
+}
+
+static inline void
+amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value)
+{
+        u32 *dw = (u32 *) ptr + dw_offset;
+        *dw &= ~(mask << offset);
+        *dw |= (mask & value) << offset;
+}
+
+#define AMAP_SET_BITS(_struct, field, ptr, val)                         \
+                amap_set(ptr,                                           \
+                        offsetof(_struct, field)/32,                    \
+                        amap_mask(sizeof(((_struct *)0)->field)),       \
+                        AMAP_BIT_OFFSET(_struct, field),                \
+                        val)
+
+static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset)
+{
+        u32 *dw = (u32 *) ptr;
+        return mask & (*(dw + dw_offset) >> offset);
+}
+
+#define AMAP_GET_BITS(_struct, field, ptr)                              \
+                amap_get(ptr,                                           \
+                        offsetof(_struct, field)/32,                    \
+                        amap_mask(sizeof(((_struct *)0)->field)),       \
+                        AMAP_BIT_OFFSET(_struct, field))
+
+#define be_dws_cpu_to_le(wrb, len)      swap_dws(wrb, len)
+#define be_dws_le_to_cpu(wrb, len)      swap_dws(wrb, len)
+static inline void swap_dws(void *wrb, int len)
+{
+#ifdef __BIG_ENDIAN
+        u32 *dw = wrb;
+        BUG_ON(len % 4);
+        do {
+                *dw = cpu_to_le32(*dw);
+                dw++;
+                len -= 4;
+        } while (len);
+#endif                          /* __BIG_ENDIAN */
+}
+
+static inline u8 is_tcp_pkt(struct sk_buff *skb)
+{
+        u8 val = 0;
+
+        if (ip_hdr(skb)->version == 4)
+                val = (ip_hdr(skb)->protocol == IPPROTO_TCP);
+        else if (ip_hdr(skb)->version == 6)
+                val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP);
+
+        return val;
+}
+
+static inline u8 is_udp_pkt(struct sk_buff *skb)
+{
+        u8 val = 0;
+
+        if (ip_hdr(skb)->version == 4)
+                val = (ip_hdr(skb)->protocol == IPPROTO_UDP);
+        else if (ip_hdr(skb)->version == 6)
+                val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP);
+
+        return val;
+}
+
+#endif                          /* BE_H */
diff --git a/drivers/net/benet/be_cmds.c b/drivers/net/benet/be_cmds.c
new file mode 100644
index 000000000000..d444aed962bc
--- /dev/null
+++ b/drivers/net/benet/be_cmds.c
@@ -0,0 +1,861 @@
+/*
+ * Copyright (C) 2005 - 2009 ServerEngines
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.  The full GNU General
+ * Public License is included in this distribution in the file called COPYING.
+ *
+ * Contact Information:
+ * linux-drivers@serverengines.com
+ *
+ * ServerEngines
+ * 209 N. Fair Oaks Ave
+ * Sunnyvale, CA 94085
+ */
+
+#include "be.h"
+
+static int be_mbox_db_ready_wait(void __iomem *db)
+{
+        int cnt = 0, wait = 5;
+        u32 ready;
+
+        do {
+                ready = ioread32(db) & MPU_MAILBOX_DB_RDY_MASK;
+                if (ready)
+                        break;
+
+                if (cnt > 200000) {
+                        printk(KERN_WARNING DRV_NAME
+                                ": mbox_db poll timed out\n");
+                        return -1;
+                }
+
+                if (cnt > 50)
+                        wait = 200;
+                cnt += wait;
+                udelay(wait);
+        } while (true);
+
+        return 0;
+}
+
+/*
+ * Insert the mailbox address into the doorbell in two steps
+ */
+static int be_mbox_db_ring(struct be_ctrl_info *ctrl)
+{
+        int status;
+        u16 compl_status, extd_status;
+        u32 val = 0;
+        void __iomem *db = ctrl->db + MPU_MAILBOX_DB_OFFSET;
+        struct be_dma_mem *mbox_mem = &ctrl->mbox_mem;
+        struct be_mcc_mailbox *mbox = mbox_mem->va;
+        struct be_mcc_cq_entry *cqe = &mbox->cqe;
+
+        memset(cqe, 0, sizeof(*cqe));
+
+        val &= ~MPU_MAILBOX_DB_RDY_MASK;
+        val |= MPU_MAILBOX_DB_HI_MASK;
+        /* at bits 2 - 31 place mbox dma addr msb bits 34 - 63 */
+        val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2;
+        iowrite32(val, db);
+
+        /* wait for ready to be set */
+        status = be_mbox_db_ready_wait(db);
+        if (status != 0)
+                return status;
+
+        val = 0;
+        val &= ~MPU_MAILBOX_DB_RDY_MASK;
+        val &= ~MPU_MAILBOX_DB_HI_MASK;
+        /* at bits 2 - 31 place mbox dma addr lsb bits 4 - 33 */
+        val |= (u32)(mbox_mem->dma >> 4) << 2;
+        iowrite32(val, db);
+
+        status = be_mbox_db_ready_wait(db);
+        if (status != 0)
+                return status;
+
+        /* compl entry has been made now */
+        be_dws_le_to_cpu(cqe, sizeof(*cqe));
+        if (!(cqe->flags & CQE_FLAGS_VALID_MASK)) {
+                printk(KERN_WARNING DRV_NAME ": ERROR invalid mbox compl\n");
+                return -1;
+        }
+
+        compl_status = (cqe->status >> CQE_STATUS_COMPL_SHIFT) &
+                                CQE_STATUS_COMPL_MASK;
+        if (compl_status != MCC_STATUS_SUCCESS) {
+                extd_status = (cqe->status >> CQE_STATUS_EXTD_SHIFT) &
+                                CQE_STATUS_EXTD_MASK;
+                printk(KERN_WARNING DRV_NAME
+                        ": ERROR in cmd compl. status(compl/extd)=%d/%d\n",
+                        compl_status, extd_status);
+        }
+
+        return compl_status;
+}
+
+static int be_POST_stage_get(struct be_ctrl_info *ctrl, u16 *stage)
+{
+        u32 sem = ioread32(ctrl->csr + MPU_EP_SEMAPHORE_OFFSET);
+
+        *stage = sem & EP_SEMAPHORE_POST_STAGE_MASK;
+        if ((sem >> EP_SEMAPHORE_POST_ERR_SHIFT) & EP_SEMAPHORE_POST_ERR_MASK)
+                return -1;
+        else
+                return 0;
+}
+
+static int be_POST_stage_poll(struct be_ctrl_info *ctrl, u16 poll_stage)
+{
+        u16 stage, cnt, error;
+        for (cnt = 0; cnt < 5000; cnt++) {
+                error = be_POST_stage_get(ctrl, &stage);
+                if (error)
+                        return -1;
+
+                if (stage == poll_stage)
+                        break;
+                udelay(1000);
+        }
+        if (stage != poll_stage)
+                return -1;
+        return 0;
+}
+
+
+int be_cmd_POST(struct be_ctrl_info *ctrl)
+{
+        u16 stage, error;
+
+        error = be_POST_stage_get(ctrl, &stage);
+        if (error)
+                goto err;
+
+        if (stage == POST_STAGE_ARMFW_RDY)
+                return 0;
+
+        if (stage != POST_STAGE_AWAITING_HOST_RDY)
+                goto err;
+
+        /* On awaiting host rdy, reset and again poll on awaiting host rdy */
+        iowrite32(POST_STAGE_BE_RESET, ctrl->csr + MPU_EP_SEMAPHORE_OFFSET);
+        error = be_POST_stage_poll(ctrl, POST_STAGE_AWAITING_HOST_RDY);
+        if (error)
+                goto err;
+
+        /* Now kickoff POST and poll on armfw ready */
+        iowrite32(POST_STAGE_HOST_RDY, ctrl->csr + MPU_EP_SEMAPHORE_OFFSET);
+        error = be_POST_stage_poll(ctrl, POST_STAGE_ARMFW_RDY);
+        if (error)
+                goto err;
+
+        return 0;
+err:
+        printk(KERN_WARNING DRV_NAME ": ERROR, stage=%d\n", stage);
+        return -1;
+}
+
+static inline void *embedded_payload(struct be_mcc_wrb *wrb)
+{
+        return wrb->payload.embedded_payload;
+}
+
+static inline struct be_sge *nonembedded_sgl(struct be_mcc_wrb *wrb)
+{
+        return &wrb->payload.sgl[0];
+}
+
+/* Don't touch the hdr after it's prepared */
+static void be_wrb_hdr_prepare(struct be_mcc_wrb *wrb, int payload_len,
+                                bool embedded, u8 sge_cnt)
+{
+        if (embedded)
+                wrb->embedded |= MCC_WRB_EMBEDDED_MASK;
+        else
+                wrb->embedded |= (sge_cnt & MCC_WRB_SGE_CNT_MASK) <<
+                                MCC_WRB_SGE_CNT_SHIFT;
+        wrb->payload_length = payload_len;
+        be_dws_cpu_to_le(wrb, 20);
+}
+
+/* Don't touch the hdr after it's prepared */
+static void be_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr,
+                                u8 subsystem, u8 opcode, int cmd_len)
+{
+        req_hdr->opcode = opcode;
+        req_hdr->subsystem = subsystem;
+        req_hdr->request_length = cpu_to_le32(cmd_len - sizeof(*req_hdr));
+}
+
+static void be_cmd_page_addrs_prepare(struct phys_addr *pages, u32 max_pages,
+                        struct be_dma_mem *mem)
+{
+        int i, buf_pages = min(PAGES_4K_SPANNED(mem->va, mem->size), max_pages);
+        u64 dma = (u64)mem->dma;
+
+        for (i = 0; i < buf_pages; i++) {
+                pages[i].lo = cpu_to_le32(dma & 0xFFFFFFFF);
+                pages[i].hi = cpu_to_le32(upper_32_bits(dma));
+                dma += PAGE_SIZE_4K;
+        }
+}
+
+/* Converts interrupt delay in microseconds to multiplier value */
+static u32 eq_delay_to_mult(u32 usec_delay)
+{
+#define MAX_INTR_RATE                   651042
+        const u32 round = 10;
+        u32 multiplier;
+
+        if (usec_delay == 0)
+                multiplier = 0;
+        else {
+                u32 interrupt_rate = 1000000 / usec_delay;
+                /* Max delay, corresponding to the lowest interrupt rate */
+                if (interrupt_rate == 0)
+                        multiplier = 1023;
+                else {
+                        multiplier = (MAX_INTR_RATE - interrupt_rate) * round;
+                        multiplier /= interrupt_rate;
+                        /* Round the multiplier to the closest value.*/
+                        multiplier = (multiplier + round/2) / round;
+                        multiplier = min(multiplier, (u32)1023);
+                }
+        }
+        return multiplier;
+}
+
+static inline struct be_mcc_wrb *wrb_from_mbox(struct be_dma_mem *mbox_mem)
+{
+        return &((struct be_mcc_mailbox *)(mbox_mem->va))->wrb;
+}
+
+int be_cmd_eq_create(struct be_ctrl_info *ctrl,
+                struct be_queue_info *eq, int eq_delay)
+{
+        struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+        struct be_cmd_req_eq_create *req = embedded_payload(wrb);
+        struct be_cmd_resp_eq_create *resp = embedded_payload(wrb);
+        struct be_dma_mem *q_mem = &eq->dma_mem;
+        int status;
+
+        spin_lock(&ctrl->cmd_lock);
+        memset(wrb, 0, sizeof(*wrb));
+
+        be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+        be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
+                OPCODE_COMMON_EQ_CREATE, sizeof(*req));
+
+        req->num_pages =  cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
+
+        AMAP_SET_BITS(struct amap_eq_context, func, req->context,
+                        ctrl->pci_func);
+        AMAP_SET_BITS(struct amap_eq_context, valid, req->context, 1);
+        /* 4byte eqe*/
+        AMAP_SET_BITS(struct amap_eq_context, size, req->context, 0);
+        AMAP_SET_BITS(struct amap_eq_context, count, req->context,
+                        __ilog2_u32(eq->len/256));
+        AMAP_SET_BITS(struct amap_eq_context, delaymult, req->context,
+                        eq_delay_to_mult(eq_delay));
+        be_dws_cpu_to_le(req->context, sizeof(req->context));
+
+        be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
+
+        status = be_mbox_db_ring(ctrl);
+        if (!status) {
+                eq->id = le16_to_cpu(resp->eq_id);
+                eq->created = true;
+        }
+        spin_unlock(&ctrl->cmd_lock);
+        return status;
+}
+
+int be_cmd_mac_addr_query(struct be_ctrl_info *ctrl, u8 *mac_addr,
+                        u8 type, bool permanent, u32 if_handle)
+{
+        struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+        struct be_cmd_req_mac_query *req = embedded_payload(wrb);
+        struct be_cmd_resp_mac_query *resp = embedded_payload(wrb);
+        int status;
+
+        spin_lock(&ctrl->cmd_lock);
+        memset(wrb, 0, sizeof(*wrb));
+
+        be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+        be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
+                OPCODE_COMMON_NTWK_MAC_QUERY, sizeof(*req));
+
+        req->type = type;
+        if (permanent) {
+                req->permanent = 1;
+        } else {
+                req->if_id = cpu_to_le16((u16)if_handle);
+                req->permanent = 0;
+        }
+
+        status = be_mbox_db_ring(ctrl);
+        if (!status)
+                memcpy(mac_addr, resp->mac.addr, ETH_ALEN);
+
+        spin_unlock(&ctrl->cmd_lock);
+        return status;
+}
+
+int be_cmd_pmac_add(struct be_ctrl_info *ctrl, u8 *mac_addr,
+                u32 if_id, u32 *pmac_id)
+{
+        struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+        struct be_cmd_req_pmac_add *req = embedded_payload(wrb);
+        int status;
+
+        spin_lock(&ctrl->cmd_lock);
+        memset(wrb, 0, sizeof(*wrb));
+
+        be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+        be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
+                OPCODE_COMMON_NTWK_PMAC_ADD, sizeof(*req));
+
+        req->if_id = cpu_to_le32(if_id);
+        memcpy(req->mac_address, mac_addr, ETH_ALEN);
+
+        status = be_mbox_db_ring(ctrl);
+        if (!status) {
+                struct be_cmd_resp_pmac_add *resp = embedded_payload(wrb);
+                *pmac_id = le32_to_cpu(resp->pmac_id);
+        }
+
+        spin_unlock(&ctrl->cmd_lock);
+        return status;
+}
+
+int be_cmd_pmac_del(struct be_ctrl_info *ctrl, u32 if_id, u32 pmac_id)
+{
+        struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+        struct be_cmd_req_pmac_del *req = embedded_payload(wrb);
+        int status;
+
+        spin_lock(&ctrl->cmd_lock);
+        memset(wrb, 0, sizeof(*wrb));
+
+        be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+        be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
+                OPCODE_COMMON_NTWK_PMAC_DEL, sizeof(*req));
+
+        req->if_id = cpu_to_le32(if_id);
+        req->pmac_id = cpu_to_le32(pmac_id);
+
+        status = be_mbox_db_ring(ctrl);
+        spin_unlock(&ctrl->cmd_lock);
+
+        return status;
+}
+
+int be_cmd_cq_create(struct be_ctrl_info *ctrl,
+                struct be_queue_info *cq, struct be_queue_info *eq,
+                bool sol_evts, bool no_delay, int coalesce_wm)
+{
+        struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+        struct be_cmd_req_cq_create *req = embedded_payload(wrb);
+        struct be_cmd_resp_cq_create *resp = embedded_payload(wrb);
+        struct be_dma_mem *q_mem = &cq->dma_mem;
+        void *ctxt = &req->context;
+        int status;
+
+        spin_lock(&ctrl->cmd_lock);
+        memset(wrb, 0, sizeof(*wrb));
+
+        be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+        be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
+                OPCODE_COMMON_CQ_CREATE, sizeof(*req));
+
+        req->num_pages =  cpu_to_le16(PAGES_4K_SPANNED(q_mem->va, q_mem->size));
+
+        AMAP_SET_BITS(struct amap_cq_context, coalescwm, ctxt, coalesce_wm);
+        AMAP_SET_BITS(struct amap_cq_context, nodelay, ctxt, no_delay);
+        AMAP_SET_BITS(struct amap_cq_context, count, ctxt,
+                        __ilog2_u32(cq->len/256));
+        AMAP_SET_BITS(struct amap_cq_context, valid, ctxt, 1);
+        AMAP_SET_BITS(struct amap_cq_context, solevent, ctxt, sol_evts);
+        AMAP_SET_BITS(struct amap_cq_context, eventable, ctxt, 1);
+        AMAP_SET_BITS(struct amap_cq_context, eqid, ctxt, eq->id);
+        AMAP_SET_BITS(struct amap_cq_context, armed, ctxt, 0);
+        AMAP_SET_BITS(struct amap_cq_context, func, ctxt, ctrl->pci_func);
+        be_dws_cpu_to_le(ctxt, sizeof(req->context));
+
+        be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
+
+        status = be_mbox_db_ring(ctrl);
+        if (!status) {
+                cq->id = le16_to_cpu(resp->cq_id);
+                cq->created = true;
+        }
+        spin_unlock(&ctrl->cmd_lock);
+
+        return status;
+}
+
+int be_cmd_txq_create(struct be_ctrl_info *ctrl,
+                        struct be_queue_info *txq,
+                        struct be_queue_info *cq)
+{
+        struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+        struct be_cmd_req_eth_tx_create *req = embedded_payload(wrb);
+        struct be_dma_mem *q_mem = &txq->dma_mem;
+        void *ctxt = &req->context;
+        int status;
+        u32 len_encoded;
+
+        spin_lock(&ctrl->cmd_lock);
+        memset(wrb, 0, sizeof(*wrb));
+
+        be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+        be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, OPCODE_ETH_TX_CREATE,
+                sizeof(*req));
+
+        req->num_pages = PAGES_4K_SPANNED(q_mem->va, q_mem->size);
+        req->ulp_num = BE_ULP1_NUM;
+        req->type = BE_ETH_TX_RING_TYPE_STANDARD;
+
+        len_encoded = fls(txq->len); /* log2(len) + 1 */
+        if (len_encoded == 16)
+                len_encoded = 0;
+        AMAP_SET_BITS(struct amap_tx_context, tx_ring_size, ctxt, len_encoded);
+        AMAP_SET_BITS(struct amap_tx_context, pci_func_id, ctxt,
+                        ctrl->pci_func);
+        AMAP_SET_BITS(struct amap_tx_context, ctx_valid, ctxt, 1);
+        AMAP_SET_BITS(struct amap_tx_context, cq_id_send, ctxt, cq->id);
+
+        be_dws_cpu_to_le(ctxt, sizeof(req->context));
+
+        be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
+
+        status = be_mbox_db_ring(ctrl);
+        if (!status) {
+                struct be_cmd_resp_eth_tx_create *resp = embedded_payload(wrb);
+                txq->id = le16_to_cpu(resp->cid);
+                txq->created = true;
+        }
+        spin_unlock(&ctrl->cmd_lock);
+
+        return status;
+}
+
+int be_cmd_rxq_create(struct be_ctrl_info *ctrl,
+                struct be_queue_info *rxq, u16 cq_id, u16 frag_size,
+                u16 max_frame_size, u32 if_id, u32 rss)
+{
+        struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+        struct be_cmd_req_eth_rx_create *req = embedded_payload(wrb);
+        struct be_dma_mem *q_mem = &rxq->dma_mem;
+        int status;
+
+        spin_lock(&ctrl->cmd_lock);
+        memset(wrb, 0, sizeof(*wrb));
+
+        be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+        be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH, OPCODE_ETH_RX_CREATE,
+                sizeof(*req));
+
+        req->cq_id = cpu_to_le16(cq_id);
+        req->frag_size = fls(frag_size) - 1;
+        req->num_pages = 2;
+        be_cmd_page_addrs_prepare(req->pages, ARRAY_SIZE(req->pages), q_mem);
+        req->interface_id = cpu_to_le32(if_id);
+        req->max_frame_size = cpu_to_le16(max_frame_size);
+        req->rss_queue = cpu_to_le32(rss);
+
+        status = be_mbox_db_ring(ctrl);
+        if (!status) {
+                struct be_cmd_resp_eth_rx_create *resp = embedded_payload(wrb);
+                rxq->id = le16_to_cpu(resp->id);
+                rxq->created = true;
+        }
+        spin_unlock(&ctrl->cmd_lock);
+
+        return status;
+}
+
+/* Generic destroyer function for all types of queues */
+int be_cmd_q_destroy(struct be_ctrl_info *ctrl, struct be_queue_info *q,
+                int queue_type)
+{
+        struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+        struct be_cmd_req_q_destroy *req = embedded_payload(wrb);
+        u8 subsys = 0, opcode = 0;
+        int status;
+
+        spin_lock(&ctrl->cmd_lock);
+
+        memset(wrb, 0, sizeof(*wrb));
+        be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+        switch (queue_type) {
+        case QTYPE_EQ:
+                subsys = CMD_SUBSYSTEM_COMMON;
+                opcode = OPCODE_COMMON_EQ_DESTROY;
+                break;
+        case QTYPE_CQ:
+                subsys = CMD_SUBSYSTEM_COMMON;
+                opcode = OPCODE_COMMON_CQ_DESTROY;
+                break;
+        case QTYPE_TXQ:
+                subsys = CMD_SUBSYSTEM_ETH;
+                opcode = OPCODE_ETH_TX_DESTROY;
+                break;
+        case QTYPE_RXQ:
+                subsys = CMD_SUBSYSTEM_ETH;
+                opcode = OPCODE_ETH_RX_DESTROY;
+                break;
+        default:
+                printk(KERN_WARNING DRV_NAME ":bad Q type in Q destroy cmd\n");
+                status = -1;
+                goto err;
+        }
+        be_cmd_hdr_prepare(&req->hdr, subsys, opcode, sizeof(*req));
+        req->id = cpu_to_le16(q->id);
+
+        status = be_mbox_db_ring(ctrl);
+err:
+        spin_unlock(&ctrl->cmd_lock);
+
+        return status;
+}
+
+/* Create an rx filtering policy configuration on an i/f */
+int be_cmd_if_create(struct be_ctrl_info *ctrl, u32 flags, u8 *mac,
+                bool pmac_invalid, u32 *if_handle, u32 *pmac_id)
+{
+        struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+        struct be_cmd_req_if_create *req = embedded_payload(wrb);
+        int status;
+
+        spin_lock(&ctrl->cmd_lock);
+        memset(wrb, 0, sizeof(*wrb));
+
+        be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+        be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
+                OPCODE_COMMON_NTWK_INTERFACE_CREATE, sizeof(*req));
+
+        req->capability_flags = cpu_to_le32(flags);
+        req->enable_flags = cpu_to_le32(flags);
+        if (!pmac_invalid)
+                memcpy(req->mac_addr, mac, ETH_ALEN);
+
+        status = be_mbox_db_ring(ctrl);
+        if (!status) {
+                struct be_cmd_resp_if_create *resp = embedded_payload(wrb);
+                *if_handle = le32_to_cpu(resp->interface_id);
+                if (!pmac_invalid)
+                        *pmac_id = le32_to_cpu(resp->pmac_id);
+        }
+
+        spin_unlock(&ctrl->cmd_lock);
+        return status;
+}
+
+int be_cmd_if_destroy(struct be_ctrl_info *ctrl, u32 interface_id)
+{
+        struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+        struct be_cmd_req_if_destroy *req = embedded_payload(wrb);
+        int status;
+
+        spin_lock(&ctrl->cmd_lock);
+        memset(wrb, 0, sizeof(*wrb));
+
+        be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+        be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
+                OPCODE_COMMON_NTWK_INTERFACE_DESTROY, sizeof(*req));
+
+        req->interface_id = cpu_to_le32(interface_id);
+        status = be_mbox_db_ring(ctrl);
+
+        spin_unlock(&ctrl->cmd_lock);
+
+        return status;
+}
+
+/* Get stats is a non embedded command: the request is not embedded inside
+ * WRB but is a separate dma memory block
+ */
+int be_cmd_get_stats(struct be_ctrl_info *ctrl, struct be_dma_mem *nonemb_cmd)
+{
+        struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+        struct be_cmd_req_get_stats *req = nonemb_cmd->va;
+        struct be_sge *sge = nonembedded_sgl(wrb);
+        int status;
+
+        spin_lock(&ctrl->cmd_lock);
+        memset(wrb, 0, sizeof(*wrb));
+
+        memset(req, 0, sizeof(*req));
+
+        be_wrb_hdr_prepare(wrb, sizeof(*req), false, 1);
+
+        be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
+                OPCODE_ETH_GET_STATISTICS, sizeof(*req));
+        sge->pa_hi = cpu_to_le32(upper_32_bits(nonemb_cmd->dma));
+        sge->pa_lo = cpu_to_le32(nonemb_cmd->dma & 0xFFFFFFFF);
+        sge->len = cpu_to_le32(nonemb_cmd->size);
+
+        status = be_mbox_db_ring(ctrl);
+        if (!status) {
+                struct be_cmd_resp_get_stats *resp = nonemb_cmd->va;
+                be_dws_le_to_cpu(&resp->hw_stats, sizeof(resp->hw_stats));
+        }
+
+        spin_unlock(&ctrl->cmd_lock);
+        return status;
+}
+
+int be_cmd_link_status_query(struct be_ctrl_info *ctrl,
+                        struct be_link_info *link)
+{
+        struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+        struct be_cmd_req_link_status *req = embedded_payload(wrb);
+        int status;
+
+        spin_lock(&ctrl->cmd_lock);
+        memset(wrb, 0, sizeof(*wrb));
+
+        be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+        be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
+                OPCODE_COMMON_NTWK_LINK_STATUS_QUERY, sizeof(*req));
+
+        status = be_mbox_db_ring(ctrl);
+        if (!status) {
+                struct be_cmd_resp_link_status *resp = embedded_payload(wrb);
+                link->speed = resp->mac_speed;
+                link->duplex = resp->mac_duplex;
+                link->fault = resp->mac_fault;
+        } else {
+                link->speed = PHY_LINK_SPEED_ZERO;
+        }
+
+        spin_unlock(&ctrl->cmd_lock);
+        return status;
+}
+
+int be_cmd_get_fw_ver(struct be_ctrl_info *ctrl, char *fw_ver)
+{
+        struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+        struct be_cmd_req_get_fw_version *req = embedded_payload(wrb);
+        int status;
+
+        spin_lock(&ctrl->cmd_lock);
+        memset(wrb, 0, sizeof(*wrb));
+
+        be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+        be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
+                OPCODE_COMMON_GET_FW_VERSION, sizeof(*req));
+
+        status = be_mbox_db_ring(ctrl);
+        if (!status) {
+                struct be_cmd_resp_get_fw_version *resp = embedded_payload(wrb);
+                strncpy(fw_ver, resp->firmware_version_string, FW_VER_LEN);
+        }
+
+        spin_unlock(&ctrl->cmd_lock);
+        return status;
+}
+
+/* set the EQ delay interval of an EQ to specified value */
+int be_cmd_modify_eqd(struct be_ctrl_info *ctrl, u32 eq_id, u32 eqd)
+{
+        struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+        struct be_cmd_req_modify_eq_delay *req = embedded_payload(wrb);
+        int status;
+
+        spin_lock(&ctrl->cmd_lock);
+        memset(wrb, 0, sizeof(*wrb));
+
+        be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+        be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
+                OPCODE_COMMON_MODIFY_EQ_DELAY, sizeof(*req));
+
+        req->num_eq = cpu_to_le32(1);
+        req->delay[0].eq_id = cpu_to_le32(eq_id);
+        req->delay[0].phase = 0;
+        req->delay[0].delay_multiplier = cpu_to_le32(eqd);
+
+        status = be_mbox_db_ring(ctrl);
+
+        spin_unlock(&ctrl->cmd_lock);
+        return status;
+}
+
+int be_cmd_vlan_config(struct be_ctrl_info *ctrl, u32 if_id, u16 *vtag_array,
+                        u32 num, bool untagged, bool promiscuous)
+{
+        struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+        struct be_cmd_req_vlan_config *req = embedded_payload(wrb);
+        int status;
+
+        spin_lock(&ctrl->cmd_lock);
+        memset(wrb, 0, sizeof(*wrb));
+
+        be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+        be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
+                OPCODE_COMMON_NTWK_VLAN_CONFIG, sizeof(*req));
+
+        req->interface_id = if_id;
+        req->promiscuous = promiscuous;
+        req->untagged = untagged;
+        req->num_vlan = num;
+        if (!promiscuous) {
+                memcpy(req->normal_vlan, vtag_array,
+                        req->num_vlan * sizeof(vtag_array[0]));
+        }
+
+        status = be_mbox_db_ring(ctrl);
+
+        spin_unlock(&ctrl->cmd_lock);
+        return status;
+}
+
+int be_cmd_promiscuous_config(struct be_ctrl_info *ctrl, u8 port_num, bool en)
+{
+        struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+        struct be_cmd_req_promiscuous_config *req = embedded_payload(wrb);
+        int status;
+
+        spin_lock(&ctrl->cmd_lock);
+        memset(wrb, 0, sizeof(*wrb));
+
+        be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+        be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_ETH,
+                OPCODE_ETH_PROMISCUOUS, sizeof(*req));
+
+        if (port_num)
+                req->port1_promiscuous = en;
+        else
+                req->port0_promiscuous = en;
+
+        status = be_mbox_db_ring(ctrl);
+
+        spin_unlock(&ctrl->cmd_lock);
+        return status;
+}
+
+int be_cmd_mcast_mac_set(struct be_ctrl_info *ctrl, u32 if_id, u8 *mac_table,
+                        u32 num, bool promiscuous)
+{
+        struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+        struct be_cmd_req_mcast_mac_config *req = embedded_payload(wrb);
+        int status;
+
+        spin_lock(&ctrl->cmd_lock);
+        memset(wrb, 0, sizeof(*wrb));
+
+        be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+        be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
+                OPCODE_COMMON_NTWK_MULTICAST_SET, sizeof(*req));
+
+        req->interface_id = if_id;
+        req->promiscuous = promiscuous;
+        if (!promiscuous) {
+                req->num_mac = cpu_to_le16(num);
+                if (num)
+                        memcpy(req->mac, mac_table, ETH_ALEN * num);
+        }
+
+        status = be_mbox_db_ring(ctrl);
+
+        spin_unlock(&ctrl->cmd_lock);
+        return status;
+}
+
+int be_cmd_set_flow_control(struct be_ctrl_info *ctrl, u32 tx_fc, u32 rx_fc)
+{
+        struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+        struct be_cmd_req_set_flow_control *req = embedded_payload(wrb);
+        int status;
+
+        spin_lock(&ctrl->cmd_lock);
+
+        memset(wrb, 0, sizeof(*wrb));
+
+        be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+        be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
+                OPCODE_COMMON_SET_FLOW_CONTROL, sizeof(*req));
+
+        req->tx_flow_control = cpu_to_le16((u16)tx_fc);
+        req->rx_flow_control = cpu_to_le16((u16)rx_fc);
+
+        status = be_mbox_db_ring(ctrl);
+
+        spin_unlock(&ctrl->cmd_lock);
+        return status;
+}
+
+int be_cmd_get_flow_control(struct be_ctrl_info *ctrl, u32 *tx_fc, u32 *rx_fc)
+{
+        struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+        struct be_cmd_req_get_flow_control *req = embedded_payload(wrb);
+        int status;
+
+        spin_lock(&ctrl->cmd_lock);
+
+        memset(wrb, 0, sizeof(*wrb));
+
+        be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+        be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
+                OPCODE_COMMON_GET_FLOW_CONTROL, sizeof(*req));
+
+        status = be_mbox_db_ring(ctrl);
+        if (!status) {
+                struct be_cmd_resp_get_flow_control *resp =
+                                                embedded_payload(wrb);
+                *tx_fc = le16_to_cpu(resp->tx_flow_control);
+                *rx_fc = le16_to_cpu(resp->rx_flow_control);
+        }
+
+        spin_unlock(&ctrl->cmd_lock);
+        return status;
+}
+
+int be_cmd_query_fw_cfg(struct be_ctrl_info *ctrl, u32 *port_num)
+{
+        struct be_mcc_wrb *wrb = wrb_from_mbox(&ctrl->mbox_mem);
+        struct be_cmd_req_query_fw_cfg *req = embedded_payload(wrb);
+        int status;
+
+        spin_lock(&ctrl->cmd_lock);
+
+        memset(wrb, 0, sizeof(*wrb));
+
+        be_wrb_hdr_prepare(wrb, sizeof(*req), true, 0);
+
+        be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
+                OPCODE_COMMON_QUERY_FIRMWARE_CONFIG, sizeof(*req));
+
+        status = be_mbox_db_ring(ctrl);
+        if (!status) {
+                struct be_cmd_resp_query_fw_cfg *resp = embedded_payload(wrb);
+                *port_num = le32_to_cpu(resp->phys_port);
+        }
+
+        spin_unlock(&ctrl->cmd_lock);
+        return status;
+}
diff --git a/drivers/net/benet/be_cmds.h b/drivers/net/benet/be_cmds.h
new file mode 100644
index 000000000000..e499e2d5b8c3
--- /dev/null
+++ b/drivers/net/benet/be_cmds.h
@@ -0,0 +1,688 @@
+/*
+ * Copyright (C) 2005 - 2009 ServerEngines
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.  The full GNU General
+ * Public License is included in this distribution in the file called COPYING.
+ *
+ * Contact Information:
+ * linux-drivers@serverengines.com
+ *
+ * ServerEngines
+ * 209 N. Fair Oaks Ave
+ * Sunnyvale, CA 94085
+ */
+
+/*
+ * The driver sends configuration and managements command requests to the
+ * firmware in the BE. These requests are communicated to the processor
+ * using Work Request Blocks (WRBs) submitted to the MCC-WRB ring or via one
+ * WRB inside a MAILBOX.
+ * The commands are serviced by the ARM processor in the BladeEngine's MPU.
+ */
+
+struct be_sge {
+        u32 pa_lo;
+        u32 pa_hi;
+        u32 len;
+};
+
+#define MCC_WRB_EMBEDDED_MASK   1       /* bit 0 of dword 0*/
+#define MCC_WRB_SGE_CNT_SHIFT   3       /* bits 3 - 7 of dword 0 */
+#define MCC_WRB_SGE_CNT_MASK    0x1F    /* bits 3 - 7 of dword 0 */
+struct be_mcc_wrb {
+        u32 embedded;           /* dword 0 */
+        u32 payload_length;     /* dword 1 */
+        u32 tag0;               /* dword 2 */
+        u32 tag1;               /* dword 3 */
+        u32 rsvd;               /* dword 4 */
+        union {
+                u8 embedded_payload[236]; /* used by embedded cmds */
+                struct be_sge sgl[19];    /* used by non-embedded cmds */
+        } payload;
+};
+
+#define CQE_FLAGS_VALID_MASK            (1 << 31)
+#define CQE_FLAGS_ASYNC_MASK            (1 << 30)
+#define CQE_FLAGS_COMPLETED_MASK        (1 << 28)
+#define CQE_FLAGS_CONSUMED_MASK         (1 << 27)
+
+/* Completion Status */
+enum {
+        MCC_STATUS_SUCCESS = 0x0,
+/* The client does not have sufficient privileges to execute the command */
+        MCC_STATUS_INSUFFICIENT_PRIVILEGES = 0x1,
+/* A parameter in the command was invalid. */
+        MCC_STATUS_INVALID_PARAMETER = 0x2,
+/* There are insufficient chip resources to execute the command */
+        MCC_STATUS_INSUFFICIENT_RESOURCES = 0x3,
+/* The command is completing because the queue was getting flushed */
+        MCC_STATUS_QUEUE_FLUSHING = 0x4,
+/* The command is completing with a DMA error */
+        MCC_STATUS_DMA_FAILED = 0x5
+};
+
+#define CQE_STATUS_COMPL_MASK           0xFFFF
+#define CQE_STATUS_COMPL_SHIFT          0       /* bits 0 - 15 */
+#define CQE_STATUS_EXTD_MASK            0xFFFF
+#define CQE_STATUS_EXTD_SHIFT           0       /* bits 0 - 15 */
+
+struct be_mcc_cq_entry {
+        u32 status;             /* dword 0 */
+        u32 tag0;               /* dword 1 */
+        u32 tag1;               /* dword 2 */
+        u32 flags;              /* dword 3 */
+};
+
+struct be_mcc_mailbox {
+        struct be_mcc_wrb wrb;
+        struct be_mcc_cq_entry cqe;
+};
+
+#define CMD_SUBSYSTEM_COMMON    0x1
+#define CMD_SUBSYSTEM_ETH       0x3
+
+#define OPCODE_COMMON_NTWK_MAC_QUERY                    1
+#define OPCODE_COMMON_NTWK_MAC_SET                      2
+#define OPCODE_COMMON_NTWK_MULTICAST_SET                3
+#define OPCODE_COMMON_NTWK_VLAN_CONFIG                  4
+#define OPCODE_COMMON_NTWK_LINK_STATUS_QUERY            5
+#define OPCODE_COMMON_CQ_CREATE                         12
+#define OPCODE_COMMON_EQ_CREATE                         13
+#define OPCODE_COMMON_MCC_CREATE                        21
+#define OPCODE_COMMON_NTWK_RX_FILTER                    34
+#define OPCODE_COMMON_GET_FW_VERSION                    35
+#define OPCODE_COMMON_SET_FLOW_CONTROL                  36
+#define OPCODE_COMMON_GET_FLOW_CONTROL                  37
+#define OPCODE_COMMON_SET_FRAME_SIZE                    39
+#define OPCODE_COMMON_MODIFY_EQ_DELAY                   41
+#define OPCODE_COMMON_FIRMWARE_CONFIG                   42
+#define OPCODE_COMMON_NTWK_INTERFACE_CREATE             50
+#define OPCODE_COMMON_NTWK_INTERFACE_DESTROY            51
+#define OPCODE_COMMON_CQ_DESTROY                        54
+#define OPCODE_COMMON_EQ_DESTROY                        55
+#define OPCODE_COMMON_QUERY_FIRMWARE_CONFIG             58
+#define OPCODE_COMMON_NTWK_PMAC_ADD                     59
+#define OPCODE_COMMON_NTWK_PMAC_DEL                     60
+
+#define OPCODE_ETH_ACPI_CONFIG                          2
+#define OPCODE_ETH_PROMISCUOUS                          3
+#define OPCODE_ETH_GET_STATISTICS                       4
+#define OPCODE_ETH_TX_CREATE                            7
+#define OPCODE_ETH_RX_CREATE                            8
+#define OPCODE_ETH_TX_DESTROY                           9
+#define OPCODE_ETH_RX_DESTROY                           10
+
+struct be_cmd_req_hdr {
+        u8 opcode;              /* dword 0 */
+        u8 subsystem;           /* dword 0 */
+        u8 port_number;         /* dword 0 */
+        u8 domain;              /* dword 0 */
+        u32 timeout;            /* dword 1 */
+        u32 request_length;     /* dword 2 */
+        u32 rsvd;               /* dword 3 */
+};
+
+#define RESP_HDR_INFO_OPCODE_SHIFT      0       /* bits 0 - 7 */
+#define RESP_HDR_INFO_SUBSYS_SHIFT      8       /* bits 8 - 15 */
+struct be_cmd_resp_hdr {
+        u32 info;               /* dword 0 */
+        u32 status;             /* dword 1 */
+        u32 response_length;    /* dword 2 */
+        u32 actual_resp_len;    /* dword 3 */
+};
+
+struct phys_addr {
+        u32 lo;
+        u32 hi;
+};
+
+/**************************
+ * BE Command definitions *
+ **************************/
+
+/* Pseudo amap definition in which each bit of the actual structure is defined
+ * as a byte: used to calculate offset/shift/mask of each field */
+struct amap_eq_context {
+        u8 cidx[13];            /* dword 0*/
+        u8 rsvd0[3];            /* dword 0*/
+        u8 epidx[13];           /* dword 0*/
+        u8 valid;               /* dword 0*/
+        u8 rsvd1;               /* dword 0*/
+        u8 size;                /* dword 0*/
+        u8 pidx[13];            /* dword 1*/
+        u8 rsvd2[3];            /* dword 1*/
+        u8 pd[10];              /* dword 1*/
+        u8 count[3];            /* dword 1*/
+        u8 solevent;            /* dword 1*/
+        u8 stalled;             /* dword 1*/
+        u8 armed;               /* dword 1*/
+        u8 rsvd3[4];            /* dword 2*/
+        u8 func[8];             /* dword 2*/
+        u8 rsvd4;               /* dword 2*/
+        u8 delaymult[10];       /* dword 2*/
+        u8 rsvd5[2];            /* dword 2*/
+        u8 phase[2];            /* dword 2*/
+        u8 nodelay;             /* dword 2*/
+        u8 rsvd6[4];            /* dword 2*/
+        u8 rsvd7[32];           /* dword 3*/
+} __packed;
+
+struct be_cmd_req_eq_create {
+        struct be_cmd_req_hdr hdr;
+        u16 num_pages;          /* sword */
+        u16 rsvd0;              /* sword */
+        u8 context[sizeof(struct amap_eq_context) / 8];
+        struct phys_addr pages[8];
+} __packed;
+
+struct be_cmd_resp_eq_create {
+        struct be_cmd_resp_hdr resp_hdr;
+        u16 eq_id;              /* sword */
+        u16 rsvd0;              /* sword */
+} __packed;
+
+/******************** Mac query ***************************/
+enum {
+        MAC_ADDRESS_TYPE_STORAGE = 0x0,
+        MAC_ADDRESS_TYPE_NETWORK = 0x1,
+        MAC_ADDRESS_TYPE_PD = 0x2,
+        MAC_ADDRESS_TYPE_MANAGEMENT = 0x3
+};
+
+struct mac_addr {
+        u16 size_of_struct;
+        u8 addr[ETH_ALEN];
+} __packed;
+
+struct be_cmd_req_mac_query {
+        struct be_cmd_req_hdr hdr;
+        u8 type;
+        u8 permanent;
+        u16 if_id;
+} __packed;
+
+struct be_cmd_resp_mac_query {
+        struct be_cmd_resp_hdr hdr;
+        struct mac_addr mac;
+};
+
+/******************** PMac Add ***************************/
+struct be_cmd_req_pmac_add {
+        struct be_cmd_req_hdr hdr;
+        u32 if_id;
+        u8 mac_address[ETH_ALEN];
+        u8 rsvd0[2];
+} __packed;
+
+struct be_cmd_resp_pmac_add {
+        struct be_cmd_resp_hdr hdr;
+        u32 pmac_id;
+};
+
+/******************** PMac Del ***************************/
+struct be_cmd_req_pmac_del {
+        struct be_cmd_req_hdr hdr;
+        u32 if_id;
+        u32 pmac_id;
+};
+
+/******************** Create CQ ***************************/
+/* Pseudo amap definition in which each bit of the actual structure is defined
+ * as a byte: used to calculate offset/shift/mask of each field */
+struct amap_cq_context {
+        u8 cidx[11];            /* dword 0*/
+        u8 rsvd0;               /* dword 0*/
+        u8 coalescwm[2];        /* dword 0*/
+        u8 nodelay;             /* dword 0*/
+        u8 epidx[11];           /* dword 0*/
+        u8 rsvd1;               /* dword 0*/
+        u8 count[2];            /* dword 0*/
+        u8 valid;               /* dword 0*/
+        u8 solevent;            /* dword 0*/
+        u8 eventable;           /* dword 0*/
+        u8 pidx[11];            /* dword 1*/
+        u8 rsvd2;               /* dword 1*/
+        u8 pd[10];              /* dword 1*/
+        u8 eqid[8];             /* dword 1*/
+        u8 stalled;             /* dword 1*/
+        u8 armed;               /* dword 1*/
+        u8 rsvd3[4];            /* dword 2*/
+        u8 func[8];             /* dword 2*/
+        u8 rsvd4[20];           /* dword 2*/
+        u8 rsvd5[32];           /* dword 3*/
+} __packed;
+
+struct be_cmd_req_cq_create {
+        struct be_cmd_req_hdr hdr;
+        u16 num_pages;
+        u16 rsvd0;
+        u8 context[sizeof(struct amap_cq_context) / 8];
+        struct phys_addr pages[8];
+} __packed;
+
+struct be_cmd_resp_cq_create {
+        struct be_cmd_resp_hdr hdr;
+        u16 cq_id;
+        u16 rsvd0;
+} __packed;
+
+/******************** Create TxQ ***************************/
+#define BE_ETH_TX_RING_TYPE_STANDARD            2
+#define BE_ULP1_NUM                             1
+
+/* Pseudo amap definition in which each bit of the actual structure is defined
+ * as a byte: used to calculate offset/shift/mask of each field */
+struct amap_tx_context {
+        u8 rsvd0[16];           /* dword 0 */
+        u8 tx_ring_size[4];     /* dword 0 */
+        u8 rsvd1[26];           /* dword 0 */
+        u8 pci_func_id[8];      /* dword 1 */
+        u8 rsvd2[9];            /* dword 1 */
+        u8 ctx_valid;           /* dword 1 */
+        u8 cq_id_send[16];      /* dword 2 */
+        u8 rsvd3[16];           /* dword 2 */
+        u8 rsvd4[32];           /* dword 3 */
+        u8 rsvd5[32];           /* dword 4 */
+        u8 rsvd6[32];           /* dword 5 */
+        u8 rsvd7[32];           /* dword 6 */
+        u8 rsvd8[32];           /* dword 7 */
+        u8 rsvd9[32];           /* dword 8 */
+        u8 rsvd10[32];          /* dword 9 */
+        u8 rsvd11[32];          /* dword 10 */
+        u8 rsvd12[32];          /* dword 11 */
+        u8 rsvd13[32];          /* dword 12 */
+        u8 rsvd14[32];          /* dword 13 */
+        u8 rsvd15[32];          /* dword 14 */
+        u8 rsvd16[32];          /* dword 15 */
+} __packed;
+
+struct be_cmd_req_eth_tx_create {
+        struct be_cmd_req_hdr hdr;
+        u8 num_pages;
+        u8 ulp_num;
+        u8 type;
+        u8 bound_port;
+        u8 context[sizeof(struct amap_tx_context) / 8];
+        struct phys_addr pages[8];
+} __packed;
+
+struct be_cmd_resp_eth_tx_create {
+        struct be_cmd_resp_hdr hdr;
+        u16 cid;
+        u16 rsvd0;
+} __packed;
+
+/******************** Create RxQ ***************************/
+struct be_cmd_req_eth_rx_create {
+        struct be_cmd_req_hdr hdr;
+        u16 cq_id;
+        u8 frag_size;
+        u8 num_pages;
+        struct phys_addr pages[2];
+        u32 interface_id;
+        u16 max_frame_size;
+        u16 rsvd0;
+        u32 rss_queue;
+} __packed;
+
+struct be_cmd_resp_eth_rx_create {
+        struct be_cmd_resp_hdr hdr;
+        u16 id;
+        u8 cpu_id;
+        u8 rsvd0;
+} __packed;
+
+/******************** Q Destroy  ***************************/
+/* Type of Queue to be destroyed */
+enum {
+        QTYPE_EQ = 1,
+        QTYPE_CQ,
+        QTYPE_TXQ,
+        QTYPE_RXQ
+};
+
+struct be_cmd_req_q_destroy {
+        struct be_cmd_req_hdr hdr;
+        u16 id;
+        u16 bypass_flush;       /* valid only for rx q destroy */
+} __packed;
+
+/************ I/f Create (it's actually I/f Config Create)**********/
+
+/* Capability flags for the i/f */
+enum be_if_flags {
+        BE_IF_FLAGS_RSS = 0x4,
+        BE_IF_FLAGS_PROMISCUOUS = 0x8,
+        BE_IF_FLAGS_BROADCAST = 0x10,
+        BE_IF_FLAGS_UNTAGGED = 0x20,
+        BE_IF_FLAGS_ULP = 0x40,
+        BE_IF_FLAGS_VLAN_PROMISCUOUS = 0x80,
+        BE_IF_FLAGS_VLAN = 0x100,
+        BE_IF_FLAGS_MCAST_PROMISCUOUS = 0x200,
+        BE_IF_FLAGS_PASS_L2_ERRORS = 0x400,
+        BE_IF_FLAGS_PASS_L3L4_ERRORS = 0x800
+};
+
+/* An RX interface is an object with one or more MAC addresses and
+ * filtering capabilities. */
+struct be_cmd_req_if_create {
+        struct be_cmd_req_hdr hdr;
+        u32 version;            /* ignore currntly */
+        u32 capability_flags;
+        u32 enable_flags;
+        u8 mac_addr[ETH_ALEN];
+        u8 rsvd0;
+        u8 pmac_invalid; /* if set, don't attach the mac addr to the i/f */
+        u32 vlan_tag;    /* not used currently */
+} __packed;
+
+struct be_cmd_resp_if_create {
+        struct be_cmd_resp_hdr hdr;
+        u32 interface_id;
+        u32 pmac_id;
+};
+
+/****** I/f Destroy(it's actually I/f Config Destroy )**********/
+struct be_cmd_req_if_destroy {
+        struct be_cmd_req_hdr hdr;
+        u32 interface_id;
+};
+
+/*************** HW Stats Get **********************************/
+struct be_port_rxf_stats {
+        u32 rx_bytes_lsd;       /* dword 0*/
+        u32 rx_bytes_msd;       /* dword 1*/
+        u32 rx_total_frames;    /* dword 2*/
+        u32 rx_unicast_frames;  /* dword 3*/
+        u32 rx_multicast_frames;        /* dword 4*/
+        u32 rx_broadcast_frames;        /* dword 5*/
+        u32 rx_crc_errors;      /* dword 6*/
+        u32 rx_alignment_symbol_errors; /* dword 7*/
+        u32 rx_pause_frames;    /* dword 8*/
+        u32 rx_control_frames;  /* dword 9*/
+        u32 rx_in_range_errors; /* dword 10*/
+        u32 rx_out_range_errors;        /* dword 11*/
+        u32 rx_frame_too_long;  /* dword 12*/
+        u32 rx_address_match_errors;    /* dword 13*/
+        u32 rx_vlan_mismatch;   /* dword 14*/
+        u32 rx_dropped_too_small;       /* dword 15*/
+        u32 rx_dropped_too_short;       /* dword 16*/
+        u32 rx_dropped_header_too_small;        /* dword 17*/
+        u32 rx_dropped_tcp_length;      /* dword 18*/
+        u32 rx_dropped_runt;    /* dword 19*/
+        u32 rx_64_byte_packets; /* dword 20*/
+        u32 rx_65_127_byte_packets;     /* dword 21*/
+        u32 rx_128_256_byte_packets;    /* dword 22*/
+        u32 rx_256_511_byte_packets;    /* dword 23*/
+        u32 rx_512_1023_byte_packets;   /* dword 24*/
+        u32 rx_1024_1518_byte_packets;  /* dword 25*/
+        u32 rx_1519_2047_byte_packets;  /* dword 26*/
+        u32 rx_2048_4095_byte_packets;  /* dword 27*/
+        u32 rx_4096_8191_byte_packets;  /* dword 28*/
+        u32 rx_8192_9216_byte_packets;  /* dword 29*/
+        u32 rx_ip_checksum_errs;        /* dword 30*/
+        u32 rx_tcp_checksum_errs;       /* dword 31*/
+        u32 rx_udp_checksum_errs;       /* dword 32*/
+        u32 rx_non_rss_packets; /* dword 33*/
+        u32 rx_ipv4_packets;    /* dword 34*/
+        u32 rx_ipv6_packets;    /* dword 35*/
+        u32 rx_ipv4_bytes_lsd;  /* dword 36*/
+        u32 rx_ipv4_bytes_msd;  /* dword 37*/
+        u32 rx_ipv6_bytes_lsd;  /* dword 38*/
+        u32 rx_ipv6_bytes_msd;  /* dword 39*/
+        u32 rx_chute1_packets;  /* dword 40*/
+        u32 rx_chute2_packets;  /* dword 41*/
+        u32 rx_chute3_packets;  /* dword 42*/
+        u32 rx_management_packets;      /* dword 43*/
+        u32 rx_switched_unicast_packets;        /* dword 44*/
+        u32 rx_switched_multicast_packets;      /* dword 45*/
+        u32 rx_switched_broadcast_packets;      /* dword 46*/
+        u32 tx_bytes_lsd;       /* dword 47*/
+        u32 tx_bytes_msd;       /* dword 48*/
+        u32 tx_unicastframes;   /* dword 49*/
+        u32 tx_multicastframes; /* dword 50*/
+        u32 tx_broadcastframes; /* dword 51*/
+        u32 tx_pauseframes;     /* dword 52*/
+        u32 tx_controlframes;   /* dword 53*/
+        u32 tx_64_byte_packets; /* dword 54*/
+        u32 tx_65_127_byte_packets;     /* dword 55*/
+        u32 tx_128_256_byte_packets;    /* dword 56*/
+        u32 tx_256_511_byte_packets;    /* dword 57*/
+        u32 tx_512_1023_byte_packets;   /* dword 58*/
+        u32 tx_1024_1518_byte_packets;  /* dword 59*/
+        u32 tx_1519_2047_byte_packets;  /* dword 60*/
+        u32 tx_2048_4095_byte_packets;  /* dword 61*/
+        u32 tx_4096_8191_byte_packets;  /* dword 62*/
+        u32 tx_8192_9216_byte_packets;  /* dword 63*/
+        u32 rx_fifo_overflow;   /* dword 64*/
+        u32 rx_input_fifo_overflow;     /* dword 65*/
+};
+
+struct be_rxf_stats {
+        struct be_port_rxf_stats port[2];
+        u32 rx_drops_no_pbuf;   /* dword 132*/
+        u32 rx_drops_no_txpb;   /* dword 133*/
+        u32 rx_drops_no_erx_descr;      /* dword 134*/
+        u32 rx_drops_no_tpre_descr;     /* dword 135*/
+        u32 management_rx_port_packets; /* dword 136*/
+        u32 management_rx_port_bytes;   /* dword 137*/
+        u32 management_rx_port_pause_frames;    /* dword 138*/
+        u32 management_rx_port_errors;  /* dword 139*/
+        u32 management_tx_port_packets; /* dword 140*/
+        u32 management_tx_port_bytes;   /* dword 141*/
+        u32 management_tx_port_pause;   /* dword 142*/
+        u32 management_rx_port_rxfifo_overflow; /* dword 143*/
+        u32 rx_drops_too_many_frags;    /* dword 144*/
+        u32 rx_drops_invalid_ring;      /* dword 145*/
+        u32 forwarded_packets;  /* dword 146*/
+        u32 rx_drops_mtu;       /* dword 147*/
+        u32 rsvd0[15];
+};
+
+struct be_erx_stats {
+        u32 rx_drops_no_fragments[44];     /* dwordS 0 to 43*/
+        u32 debug_wdma_sent_hold;          /* dword 44*/
+        u32 debug_wdma_pbfree_sent_hold;   /* dword 45*/
+        u32 debug_wdma_zerobyte_pbfree_sent_hold; /* dword 46*/
+        u32 debug_pmem_pbuf_dealloc;       /* dword 47*/
+};
+
+struct be_hw_stats {
+        struct be_rxf_stats rxf;
+        u32 rsvd[48];
+        struct be_erx_stats erx;
+};
+
+struct be_cmd_req_get_stats {
+        struct be_cmd_req_hdr hdr;
+        u8 rsvd[sizeof(struct be_hw_stats)];
+};
+
+struct be_cmd_resp_get_stats {
+        struct be_cmd_resp_hdr hdr;
+        struct be_hw_stats hw_stats;
+};
+
+struct be_cmd_req_vlan_config {
+        struct be_cmd_req_hdr hdr;
+        u8 interface_id;
+        u8 promiscuous;
+        u8 untagged;
+        u8 num_vlan;
+        u16 normal_vlan[64];
+} __packed;
+
+struct be_cmd_req_promiscuous_config {
+        struct be_cmd_req_hdr hdr;
+        u8 port0_promiscuous;
+        u8 port1_promiscuous;
+        u16 rsvd0;
+} __packed;
+
+struct macaddr {
+        u8 byte[ETH_ALEN];
+};
+
+struct be_cmd_req_mcast_mac_config {
+        struct be_cmd_req_hdr hdr;
+        u16 num_mac;
+        u8 promiscuous;
+        u8 interface_id;
+        struct macaddr mac[32];
+} __packed;
+
+static inline struct be_hw_stats *
+hw_stats_from_cmd(struct be_cmd_resp_get_stats *cmd)
+{
+        return &cmd->hw_stats;
+}
+
+/******************** Link Status Query *******************/
+struct be_cmd_req_link_status {
+        struct be_cmd_req_hdr hdr;
+        u32 rsvd;
+};
+
+struct be_link_info {
+        u8 duplex;
+        u8 speed;
+        u8 fault;
+};
+
+enum {
+        PHY_LINK_DUPLEX_NONE = 0x0,
+        PHY_LINK_DUPLEX_HALF = 0x1,
+        PHY_LINK_DUPLEX_FULL = 0x2
+};
+
+enum {
+        PHY_LINK_SPEED_ZERO = 0x0,      /* => No link */
+        PHY_LINK_SPEED_10MBPS = 0x1,
+        PHY_LINK_SPEED_100MBPS = 0x2,
+        PHY_LINK_SPEED_1GBPS = 0x3,
+        PHY_LINK_SPEED_10GBPS = 0x4
+};
+
+struct be_cmd_resp_link_status {
+        struct be_cmd_resp_hdr hdr;
+        u8 physical_port;
+        u8 mac_duplex;
+        u8 mac_speed;
+        u8 mac_fault;
+        u8 mgmt_mac_duplex;
+        u8 mgmt_mac_speed;
+        u16 rsvd0;
+} __packed;
+
+/******************** Get FW Version *******************/
+#define FW_VER_LEN                      32
+struct be_cmd_req_get_fw_version {
+        struct be_cmd_req_hdr hdr;
+        u8 rsvd0[FW_VER_LEN];
+        u8 rsvd1[FW_VER_LEN];
+} __packed;
+
+struct be_cmd_resp_get_fw_version {
+        struct be_cmd_resp_hdr hdr;
+        u8 firmware_version_string[FW_VER_LEN];
+        u8 fw_on_flash_version_string[FW_VER_LEN];
+} __packed;
+
+/******************** Set Flow Contrl *******************/
+struct be_cmd_req_set_flow_control {
+        struct be_cmd_req_hdr hdr;
+        u16 tx_flow_control;
+        u16 rx_flow_control;
+} __packed;
+
+/******************** Get Flow Contrl *******************/
+struct be_cmd_req_get_flow_control {
+        struct be_cmd_req_hdr hdr;
+        u32 rsvd;
+};
+
+struct be_cmd_resp_get_flow_control {
+        struct be_cmd_resp_hdr hdr;
+        u16 tx_flow_control;
+        u16 rx_flow_control;
+} __packed;
+
+/******************** Modify EQ Delay *******************/
+struct be_cmd_req_modify_eq_delay {
+        struct be_cmd_req_hdr hdr;
+        u32 num_eq;
+        struct {
+                u32 eq_id;
+                u32 phase;
+                u32 delay_multiplier;
+        } delay[8];
+} __packed;
+
+struct be_cmd_resp_modify_eq_delay {
+        struct be_cmd_resp_hdr hdr;
+        u32 rsvd0;
+} __packed;
+
+/******************** Get FW Config *******************/
+struct be_cmd_req_query_fw_cfg {
+        struct be_cmd_req_hdr hdr;
+        u32 rsvd[30];
+};
+
+struct be_cmd_resp_query_fw_cfg {
+        struct be_cmd_resp_hdr hdr;
+        u32 be_config_number;
+        u32 asic_revision;
+        u32 phys_port;
+        u32 function_mode;
+        u32 rsvd[26];
+};
+
+extern int be_pci_fnum_get(struct be_ctrl_info *ctrl);
+extern int be_cmd_POST(struct be_ctrl_info *ctrl);
+extern int be_cmd_mac_addr_query(struct be_ctrl_info *ctrl, u8 *mac_addr,
+                        u8 type, bool permanent, u32 if_handle);
+extern int be_cmd_pmac_add(struct be_ctrl_info *ctrl, u8 *mac_addr,
+                        u32 if_id, u32 *pmac_id);
+extern int be_cmd_pmac_del(struct be_ctrl_info *ctrl, u32 if_id, u32 pmac_id);
+extern int be_cmd_if_create(struct be_ctrl_info *ctrl, u32 if_flags, u8 *mac,
+                        bool pmac_invalid, u32 *if_handle, u32 *pmac_id);
+extern int be_cmd_if_destroy(struct be_ctrl_info *ctrl, u32 if_handle);
+extern int be_cmd_eq_create(struct be_ctrl_info *ctrl,
+                        struct be_queue_info *eq, int eq_delay);
+extern int be_cmd_cq_create(struct be_ctrl_info *ctrl,
+                        struct be_queue_info *cq, struct be_queue_info *eq,
+                        bool sol_evts, bool no_delay,
+                        int num_cqe_dma_coalesce);
+extern int be_cmd_txq_create(struct be_ctrl_info *ctrl,
+                        struct be_queue_info *txq,
+                        struct be_queue_info *cq);
+extern int be_cmd_rxq_create(struct be_ctrl_info *ctrl,
+                        struct be_queue_info *rxq, u16 cq_id,
+                        u16 frag_size, u16 max_frame_size, u32 if_id,
+                        u32 rss);
+extern int be_cmd_q_destroy(struct be_ctrl_info *ctrl, struct be_queue_info *q,
+                        int type);
+extern int be_cmd_link_status_query(struct be_ctrl_info *ctrl,
+                        struct be_link_info *link);
+extern int be_cmd_reset(struct be_ctrl_info *ctrl);
+extern int be_cmd_get_stats(struct be_ctrl_info *ctrl,
+                        struct be_dma_mem *nonemb_cmd);
+extern int be_cmd_get_fw_ver(struct be_ctrl_info *ctrl, char *fw_ver);
+
+extern int be_cmd_modify_eqd(struct be_ctrl_info *ctrl, u32 eq_id, u32 eqd);
+extern int be_cmd_vlan_config(struct be_ctrl_info *ctrl, u32 if_id,
+                        u16 *vtag_array, u32 num, bool untagged,
+                        bool promiscuous);
+extern int be_cmd_promiscuous_config(struct be_ctrl_info *ctrl,
+                        u8 port_num, bool en);
+extern int be_cmd_mcast_mac_set(struct be_ctrl_info *ctrl, u32 if_id,
+                        u8 *mac_table, u32 num, bool promiscuous);
+extern int be_cmd_set_flow_control(struct be_ctrl_info *ctrl,
+                        u32 tx_fc, u32 rx_fc);
+extern int be_cmd_get_flow_control(struct be_ctrl_info *ctrl,
+                        u32 *tx_fc, u32 *rx_fc);
+extern int be_cmd_query_fw_cfg(struct be_ctrl_info *ctrl, u32 *port_num);
diff --git a/drivers/net/benet/be_ethtool.c b/drivers/net/benet/be_ethtool.c
new file mode 100644
index 000000000000..04f4b73fa8d8
--- /dev/null
+++ b/drivers/net/benet/be_ethtool.c
@@ -0,0 +1,362 @@
+/*
+ * Copyright (C) 2005 - 2009 ServerEngines
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.  The full GNU General
+ * Public License is included in this distribution in the file called COPYING.
+ *
+ * Contact Information:
+ * linux-drivers@serverengines.com
+ *
+ * ServerEngines
+ * 209 N. Fair Oaks Ave
+ * Sunnyvale, CA 94085
+ */
+
+#include "be.h"
+#include <linux/ethtool.h>
+
+struct be_ethtool_stat {
+        char desc[ETH_GSTRING_LEN];
+        int type;
+        int size;
+        int offset;
+};
+
+enum {NETSTAT, PORTSTAT, MISCSTAT, DRVSTAT, ERXSTAT};
+#define FIELDINFO(_struct, field) FIELD_SIZEOF(_struct, field), \
+                                        offsetof(_struct, field)
+#define NETSTAT_INFO(field)     #field, NETSTAT,\
+                                        FIELDINFO(struct net_device_stats,\
+                                                field)
+#define DRVSTAT_INFO(field)     #field, DRVSTAT,\
+                                        FIELDINFO(struct be_drvr_stats, field)
+#define MISCSTAT_INFO(field)    #field, MISCSTAT,\
+                                        FIELDINFO(struct be_rxf_stats, field)
+#define PORTSTAT_INFO(field)    #field, PORTSTAT,\
+                                        FIELDINFO(struct be_port_rxf_stats, \
+                                                field)
+#define ERXSTAT_INFO(field)     #field, ERXSTAT,\
+                                        FIELDINFO(struct be_erx_stats, field)
+
+static const struct be_ethtool_stat et_stats[] = {
+        {NETSTAT_INFO(rx_packets)},
+        {NETSTAT_INFO(tx_packets)},
+        {NETSTAT_INFO(rx_bytes)},
+        {NETSTAT_INFO(tx_bytes)},
+        {NETSTAT_INFO(rx_errors)},
+        {NETSTAT_INFO(tx_errors)},
+        {NETSTAT_INFO(rx_dropped)},
+        {NETSTAT_INFO(tx_dropped)},
+        {DRVSTAT_INFO(be_tx_reqs)},
+        {DRVSTAT_INFO(be_tx_stops)},
+        {DRVSTAT_INFO(be_fwd_reqs)},
+        {DRVSTAT_INFO(be_tx_wrbs)},
+        {DRVSTAT_INFO(be_polls)},
+        {DRVSTAT_INFO(be_tx_events)},
+        {DRVSTAT_INFO(be_rx_events)},
+        {DRVSTAT_INFO(be_tx_compl)},
+        {DRVSTAT_INFO(be_rx_compl)},
+        {DRVSTAT_INFO(be_ethrx_post_fail)},
+        {DRVSTAT_INFO(be_802_3_dropped_frames)},
+        {DRVSTAT_INFO(be_802_3_malformed_frames)},
+        {DRVSTAT_INFO(be_tx_rate)},
+        {DRVSTAT_INFO(be_rx_rate)},
+        {PORTSTAT_INFO(rx_unicast_frames)},
+        {PORTSTAT_INFO(rx_multicast_frames)},
+        {PORTSTAT_INFO(rx_broadcast_frames)},
+        {PORTSTAT_INFO(rx_crc_errors)},
+        {PORTSTAT_INFO(rx_alignment_symbol_errors)},
+        {PORTSTAT_INFO(rx_pause_frames)},
+        {PORTSTAT_INFO(rx_control_frames)},
+        {PORTSTAT_INFO(rx_in_range_errors)},
+        {PORTSTAT_INFO(rx_out_range_errors)},
+        {PORTSTAT_INFO(rx_frame_too_long)},
+        {PORTSTAT_INFO(rx_address_match_errors)},
+        {PORTSTAT_INFO(rx_vlan_mismatch)},
+        {PORTSTAT_INFO(rx_dropped_too_small)},
+        {PORTSTAT_INFO(rx_dropped_too_short)},
+        {PORTSTAT_INFO(rx_dropped_header_too_small)},
+        {PORTSTAT_INFO(rx_dropped_tcp_length)},
+        {PORTSTAT_INFO(rx_dropped_runt)},
+        {PORTSTAT_INFO(rx_fifo_overflow)},
+        {PORTSTAT_INFO(rx_input_fifo_overflow)},
+        {PORTSTAT_INFO(rx_ip_checksum_errs)},
+        {PORTSTAT_INFO(rx_tcp_checksum_errs)},
+        {PORTSTAT_INFO(rx_udp_checksum_errs)},
+        {PORTSTAT_INFO(rx_non_rss_packets)},
+        {PORTSTAT_INFO(rx_ipv4_packets)},
+        {PORTSTAT_INFO(rx_ipv6_packets)},
+        {PORTSTAT_INFO(tx_unicastframes)},
+        {PORTSTAT_INFO(tx_multicastframes)},
+        {PORTSTAT_INFO(tx_broadcastframes)},
+        {PORTSTAT_INFO(tx_pauseframes)},
+        {PORTSTAT_INFO(tx_controlframes)},
+        {MISCSTAT_INFO(rx_drops_no_pbuf)},
+        {MISCSTAT_INFO(rx_drops_no_txpb)},
+        {MISCSTAT_INFO(rx_drops_no_erx_descr)},
+        {MISCSTAT_INFO(rx_drops_no_tpre_descr)},
+        {MISCSTAT_INFO(rx_drops_too_many_frags)},
+        {MISCSTAT_INFO(rx_drops_invalid_ring)},
+        {MISCSTAT_INFO(forwarded_packets)},
+        {MISCSTAT_INFO(rx_drops_mtu)},
+        {ERXSTAT_INFO(rx_drops_no_fragments)},
+};
+#define ETHTOOL_STATS_NUM ARRAY_SIZE(et_stats)
+
+static void
+be_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *drvinfo)
+{
+        struct be_adapter *adapter = netdev_priv(netdev);
+
+        strcpy(drvinfo->driver, DRV_NAME);
+        strcpy(drvinfo->version, DRV_VER);
+        strncpy(drvinfo->fw_version, adapter->fw_ver, FW_VER_LEN);
+        strcpy(drvinfo->bus_info, pci_name(adapter->pdev));
+        drvinfo->testinfo_len = 0;
+        drvinfo->regdump_len = 0;
+        drvinfo->eedump_len = 0;
+}
+
+static int
+be_get_coalesce(struct net_device *netdev, struct ethtool_coalesce *coalesce)
+{
+        struct be_adapter *adapter = netdev_priv(netdev);
+        struct be_eq_obj *rx_eq = &adapter->rx_eq;
+        struct be_eq_obj *tx_eq = &adapter->tx_eq;
+
+        coalesce->rx_max_coalesced_frames = adapter->max_rx_coal;
+
+        coalesce->rx_coalesce_usecs = rx_eq->cur_eqd;
+        coalesce->rx_coalesce_usecs_high = rx_eq->max_eqd;
+        coalesce->rx_coalesce_usecs_low = rx_eq->min_eqd;
+
+        coalesce->tx_coalesce_usecs = tx_eq->cur_eqd;
+        coalesce->tx_coalesce_usecs_high = tx_eq->max_eqd;
+        coalesce->tx_coalesce_usecs_low = tx_eq->min_eqd;
+
+        coalesce->use_adaptive_rx_coalesce = rx_eq->enable_aic;
+        coalesce->use_adaptive_tx_coalesce = tx_eq->enable_aic;
+
+        return 0;
+}
+
+/*
+ * This routine is used to set interrup coalescing delay *as well as*
+ * the number of pkts to coalesce for LRO.
+ */
+static int
+be_set_coalesce(struct net_device *netdev, struct ethtool_coalesce *coalesce)
+{
+        struct be_adapter *adapter = netdev_priv(netdev);
+        struct be_ctrl_info *ctrl = &adapter->ctrl;
+        struct be_eq_obj *rx_eq = &adapter->rx_eq;
+        struct be_eq_obj *tx_eq = &adapter->tx_eq;
+        u32 tx_max, tx_min, tx_cur;
+        u32 rx_max, rx_min, rx_cur;
+        int status = 0;
+
+        if (coalesce->use_adaptive_tx_coalesce == 1)
+                return -EINVAL;
+
+        adapter->max_rx_coal = coalesce->rx_max_coalesced_frames;
+        if (adapter->max_rx_coal > MAX_SKB_FRAGS)
+                adapter->max_rx_coal = MAX_SKB_FRAGS - 1;
+
+        /* if AIC is being turned on now, start with an EQD of 0 */
+        if (rx_eq->enable_aic == 0 &&
+                coalesce->use_adaptive_rx_coalesce == 1) {
+                rx_eq->cur_eqd = 0;
+        }
+        rx_eq->enable_aic = coalesce->use_adaptive_rx_coalesce;
+
+        rx_max = coalesce->rx_coalesce_usecs_high;
+        rx_min = coalesce->rx_coalesce_usecs_low;
+        rx_cur = coalesce->rx_coalesce_usecs;
+
+        tx_max = coalesce->tx_coalesce_usecs_high;
+        tx_min = coalesce->tx_coalesce_usecs_low;
+        tx_cur = coalesce->tx_coalesce_usecs;
+
+        if (tx_cur > BE_MAX_EQD)
+                tx_cur = BE_MAX_EQD;
+        if (tx_eq->cur_eqd != tx_cur) {
+                status = be_cmd_modify_eqd(ctrl, tx_eq->q.id, tx_cur);
+                if (!status)
+                        tx_eq->cur_eqd = tx_cur;
+        }
+
+        if (rx_eq->enable_aic) {
+                if (rx_max > BE_MAX_EQD)
+                        rx_max = BE_MAX_EQD;
+                if (rx_min > rx_max)
+                        rx_min = rx_max;
+                rx_eq->max_eqd = rx_max;
+                rx_eq->min_eqd = rx_min;
+                if (rx_eq->cur_eqd > rx_max)
+                        rx_eq->cur_eqd = rx_max;
+                if (rx_eq->cur_eqd < rx_min)
+                        rx_eq->cur_eqd = rx_min;
+        } else {
+                if (rx_cur > BE_MAX_EQD)
+                        rx_cur = BE_MAX_EQD;
+                if (rx_eq->cur_eqd != rx_cur) {
+                        status = be_cmd_modify_eqd(ctrl, rx_eq->q.id, rx_cur);
+                        if (!status)
+                                rx_eq->cur_eqd = rx_cur;
+                }
+        }
+        return 0;
+}
+
+static u32 be_get_rx_csum(struct net_device *netdev)
+{
+        struct be_adapter *adapter = netdev_priv(netdev);
+
+        return adapter->rx_csum;
+}
+
+static int be_set_rx_csum(struct net_device *netdev, uint32_t data)
+{
+        struct be_adapter *adapter = netdev_priv(netdev);
+
+        if (data)
+                adapter->rx_csum = true;
+        else
+                adapter->rx_csum = false;
+
+        return 0;
+}
+
+static void
+be_get_ethtool_stats(struct net_device *netdev,
+                struct ethtool_stats *stats, uint64_t *data)
+{
+        struct be_adapter *adapter = netdev_priv(netdev);
+        struct be_drvr_stats *drvr_stats = &adapter->stats.drvr_stats;
+        struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
+        struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
+        struct be_port_rxf_stats *port_stats =
+                        &rxf_stats->port[adapter->port_num];
+        struct net_device_stats *net_stats = &adapter->stats.net_stats;
+        struct be_erx_stats *erx_stats = &hw_stats->erx;
+        void *p = NULL;
+        int i;
+
+        for (i = 0; i < ETHTOOL_STATS_NUM; i++) {
+                switch (et_stats[i].type) {
+                case NETSTAT:
+                        p = net_stats;
+                        break;
+                case DRVSTAT:
+                        p = drvr_stats;
+                        break;
+                case PORTSTAT:
+                        p = port_stats;
+                        break;
+                case MISCSTAT:
+                        p = rxf_stats;
+                        break;
+                case ERXSTAT: /* Currently only one ERX stat is provided */
+                        p = (u32 *)erx_stats + adapter->rx_obj.q.id;
+                        break;
+                }
+
+                p = (u8 *)p + et_stats[i].offset;
+                data[i] = (et_stats[i].size == sizeof(u64)) ?
+                                *(u64 *)p: *(u32 *)p;
+        }
+
+        return;
+}
+
+static void
+be_get_stat_strings(struct net_device *netdev, uint32_t stringset,
+                uint8_t *data)
+{
+        int i;
+        switch (stringset) {
+        case ETH_SS_STATS:
+                for (i = 0; i < ETHTOOL_STATS_NUM; i++) {
+                        memcpy(data, et_stats[i].desc, ETH_GSTRING_LEN);
+                        data += ETH_GSTRING_LEN;
+                }
+                break;
+        }
+}
+
+static int be_get_stats_count(struct net_device *netdev)
+{
+        return ETHTOOL_STATS_NUM;
+}
+
+static int be_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
+{
+        ecmd->speed = SPEED_10000;
+        ecmd->duplex = DUPLEX_FULL;
+        ecmd->autoneg = AUTONEG_DISABLE;
+        return 0;
+}
+
+static void
+be_get_ringparam(struct net_device *netdev, struct ethtool_ringparam *ring)
+{
+        struct be_adapter *adapter = netdev_priv(netdev);
+
+        ring->rx_max_pending = adapter->rx_obj.q.len;
+        ring->tx_max_pending = adapter->tx_obj.q.len;
+
+        ring->rx_pending = atomic_read(&adapter->rx_obj.q.used);
+        ring->tx_pending = atomic_read(&adapter->tx_obj.q.used);
+}
+
+static void
+be_get_pauseparam(struct net_device *netdev, struct ethtool_pauseparam *ecmd)
+{
+        struct be_adapter *adapter = netdev_priv(netdev);
+
+        be_cmd_get_flow_control(&adapter->ctrl, &ecmd->tx_pause,
+                &ecmd->rx_pause);
+        ecmd->autoneg = AUTONEG_ENABLE;
+}
+
+static int
+be_set_pauseparam(struct net_device *netdev, struct ethtool_pauseparam *ecmd)
+{
+        struct be_adapter *adapter = netdev_priv(netdev);
+        int status;
+
+        if (ecmd->autoneg != AUTONEG_ENABLE)
+                return -EINVAL;
+
+        status = be_cmd_set_flow_control(&adapter->ctrl, ecmd->tx_pause,
+                        ecmd->rx_pause);
+        if (!status)
+                dev_warn(&adapter->pdev->dev, "Pause param set failed.\n");
+
+        return status;
+}
+
+struct ethtool_ops be_ethtool_ops = {
+        .get_settings = be_get_settings,
+        .get_drvinfo = be_get_drvinfo,
+        .get_link = ethtool_op_get_link,
+        .get_coalesce = be_get_coalesce,
+        .set_coalesce = be_set_coalesce,
+        .get_ringparam = be_get_ringparam,
+        .get_pauseparam = be_get_pauseparam,
+        .set_pauseparam = be_set_pauseparam,
+        .get_rx_csum = be_get_rx_csum,
+        .set_rx_csum = be_set_rx_csum,
+        .get_tx_csum = ethtool_op_get_tx_csum,
+        .set_tx_csum = ethtool_op_set_tx_csum,
+        .get_sg = ethtool_op_get_sg,
+        .set_sg = ethtool_op_set_sg,
+        .get_tso = ethtool_op_get_tso,
+        .set_tso = ethtool_op_set_tso,
+        .get_strings = be_get_stat_strings,
+        .get_stats_count = be_get_stats_count,
+        .get_ethtool_stats = be_get_ethtool_stats,
+};
diff --git a/drivers/net/benet/be_hw.h b/drivers/net/benet/be_hw.h
new file mode 100644
index 000000000000..b132aa4893ca
--- /dev/null
+++ b/drivers/net/benet/be_hw.h
@@ -0,0 +1,211 @@
+/*
+ * Copyright (C) 2005 - 2009 ServerEngines
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.  The full GNU General
+ * Public License is included in this distribution in the file called COPYING.
+ *
+ * Contact Information:
+ * linux-drivers@serverengines.com
+ *
+ * ServerEngines
+ * 209 N. Fair Oaks Ave
+ * Sunnyvale, CA 94085
+ */
+
+/********* Mailbox door bell *************/
+/* Used for driver communication with the FW.
+ * The software must write this register twice to post any command. First,
+ * it writes the register with hi=1 and the upper bits of the physical address
+ * for the MAILBOX structure. Software must poll the ready bit until this
+ * is acknowledged. Then, sotware writes the register with hi=0 with the lower
+ * bits in the address. It must poll the ready bit until the command is
+ * complete. Upon completion, the MAILBOX will contain a valid completion
+ * queue entry.
+ */
+#define MPU_MAILBOX_DB_OFFSET   0x160
+#define MPU_MAILBOX_DB_RDY_MASK 0x1     /* bit 0 */
+#define MPU_MAILBOX_DB_HI_MASK  0x2     /* bit 1 */
+
+#define MPU_EP_CONTROL          0
+
+/********** MPU semphore ******************/
+#define MPU_EP_SEMAPHORE_OFFSET         0xac
+#define EP_SEMAPHORE_POST_STAGE_MASK    0x0000FFFF
+#define EP_SEMAPHORE_POST_ERR_MASK      0x1
+#define EP_SEMAPHORE_POST_ERR_SHIFT     31
+/* MPU semphore POST stage values */
+#define POST_STAGE_AWAITING_HOST_RDY    0x1 /* FW awaiting goahead from host */
+#define POST_STAGE_HOST_RDY             0x2 /* Host has given go-ahed to FW */
+#define POST_STAGE_BE_RESET             0x3 /* Host wants to reset chip */
+#define POST_STAGE_ARMFW_RDY            0xc000  /* FW is done with POST */
+
+/********* Memory BAR register ************/
+#define PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET      0xfc
+/* Host Interrupt Enable, if set interrupts are enabled although "PCI Interrupt
+ * Disable" may still globally block interrupts in addition to individual
+ * interrupt masks; a mechanism for the device driver to block all interrupts
+ * atomically without having to arbitrate for the PCI Interrupt Disable bit
+ * with the OS.
+ */
+#define MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK      (1 << 29) /* bit 29 */
+/* PCI physical function number */
+#define MEMBAR_CTRL_INT_CTRL_PFUNC_MASK         0x7     /* bits 26 - 28 */
+#define MEMBAR_CTRL_INT_CTRL_PFUNC_SHIFT        26
+
+/********* Event Q door bell *************/
+#define DB_EQ_OFFSET                    DB_CQ_OFFSET
+#define DB_EQ_RING_ID_MASK              0x1FF   /* bits 0 - 8 */
+/* Clear the interrupt for this eq */
+#define DB_EQ_CLR_SHIFT                 (9)     /* bit 9 */
+/* Must be 1 */
+#define DB_EQ_EVNT_SHIFT                        (10)    /* bit 10 */
+/* Number of event entries processed */
+#define DB_EQ_NUM_POPPED_SHIFT          (16)    /* bits 16 - 28 */
+/* Rearm bit */
+#define DB_EQ_REARM_SHIFT               (29)    /* bit 29 */
+
+/********* Compl Q door bell *************/
+#define DB_CQ_OFFSET                    0x120
+#define DB_CQ_RING_ID_MASK              0x3FF   /* bits 0 - 9 */
+/* Number of event entries processed */
+#define DB_CQ_NUM_POPPED_SHIFT          (16)    /* bits 16 - 28 */
+/* Rearm bit */
+#define DB_CQ_REARM_SHIFT               (29)    /* bit 29 */
+
+/********** TX ULP door bell *************/
+#define DB_TXULP1_OFFSET                0x60
+#define DB_TXULP_RING_ID_MASK           0x7FF   /* bits 0 - 10 */
+/* Number of tx entries posted */
+#define DB_TXULP_NUM_POSTED_SHIFT       (16)    /* bits 16 - 29 */
+#define DB_TXULP_NUM_POSTED_MASK        0x3FFF  /* bits 16 - 29 */
+
+/********** RQ(erx) door bell ************/
+#define DB_RQ_OFFSET                    0x100
+#define DB_RQ_RING_ID_MASK              0x3FF   /* bits 0 - 9 */
+/* Number of rx frags posted */
+#define DB_RQ_NUM_POSTED_SHIFT          (24)    /* bits 24 - 31 */
+
+/*
+ * BE descriptors: host memory data structures whose formats
+ * are hardwired in BE silicon.
+ */
+/* Event Queue Descriptor */
+#define EQ_ENTRY_VALID_MASK             0x1     /* bit 0 */
+#define EQ_ENTRY_RES_ID_MASK            0xFFFF  /* bits 16 - 31 */
+#define EQ_ENTRY_RES_ID_SHIFT           16
+struct be_eq_entry {
+        u32 evt;
+};
+
+/* TX Queue Descriptor */
+#define ETH_WRB_FRAG_LEN_MASK           0xFFFF
+struct be_eth_wrb {
+        u32 frag_pa_hi;         /* dword 0 */
+        u32 frag_pa_lo;         /* dword 1 */
+        u32 rsvd0;              /* dword 2 */
+        u32 frag_len;           /* dword 3: bits 0 - 15 */
+} __packed;
+
+/* Pseudo amap definition for eth_hdr_wrb in which each bit of the
+ * actual structure is defined as a byte : used to calculate
+ * offset/shift/mask of each field */
+struct amap_eth_hdr_wrb {
+        u8 rsvd0[32];           /* dword 0 */
+        u8 rsvd1[32];           /* dword 1 */
+        u8 complete;            /* dword 2 */
+        u8 event;
+        u8 crc;
+        u8 forward;
+        u8 ipsec;
+        u8 mgmt;
+        u8 ipcs;
+        u8 udpcs;
+        u8 tcpcs;
+        u8 lso;
+        u8 vlan;
+        u8 gso[2];
+        u8 num_wrb[5];
+        u8 lso_mss[14];
+        u8 len[16];             /* dword 3 */
+        u8 vlan_tag[16];
+} __packed;
+
+struct be_eth_hdr_wrb {
+        u32 dw[4];
+};
+
+/* TX Compl Queue Descriptor */
+
+/* Pseudo amap definition for eth_tx_compl in which each bit of the
+ * actual structure is defined as a byte: used to calculate
+ * offset/shift/mask of each field */
+struct amap_eth_tx_compl {
+        u8 wrb_index[16];       /* dword 0 */
+        u8 ct[2];               /* dword 0 */
+        u8 port[2];             /* dword 0 */
+        u8 rsvd0[8];            /* dword 0 */
+        u8 status[4];           /* dword 0 */
+        u8 user_bytes[16];      /* dword 1 */
+        u8 nwh_bytes[8];        /* dword 1 */
+        u8 lso;                 /* dword 1 */
+        u8 cast_enc[2];         /* dword 1 */
+        u8 rsvd1[5];            /* dword 1 */
+        u8 rsvd2[32];           /* dword 2 */
+        u8 pkts[16];            /* dword 3 */
+        u8 ringid[11];          /* dword 3 */
+        u8 hash_val[4];         /* dword 3 */
+        u8 valid;               /* dword 3 */
+} __packed;
+
+struct be_eth_tx_compl {
+        u32 dw[4];
+};
+
+/* RX Queue Descriptor */
+struct be_eth_rx_d {
+        u32 fragpa_hi;
+        u32 fragpa_lo;
+};
+
+/* RX Compl Queue Descriptor */
+
+/* Pseudo amap definition for eth_rx_compl in which each bit of the
+ * actual structure is defined as a byte: used to calculate
+ * offset/shift/mask of each field */
+struct amap_eth_rx_compl {
+        u8 vlan_tag[16];        /* dword 0 */
+        u8 pktsize[14];         /* dword 0 */
+        u8 port;                /* dword 0 */
+        u8 ip_opt;              /* dword 0 */
+        u8 err;                 /* dword 1 */
+        u8 rsshp;               /* dword 1 */
+        u8 ipf;                 /* dword 1 */
+        u8 tcpf;                /* dword 1 */
+        u8 udpf;                /* dword 1 */
+        u8 ipcksm;              /* dword 1 */
+        u8 l4_cksm;             /* dword 1 */
+        u8 ip_version;          /* dword 1 */
+        u8 macdst[6];           /* dword 1 */
+        u8 vtp;                 /* dword 1 */
+        u8 rsvd0;               /* dword 1 */
+        u8 fragndx[10];         /* dword 1 */
+        u8 ct[2];               /* dword 1 */
+        u8 sw;                  /* dword 1 */
+        u8 numfrags[3];         /* dword 1 */
+        u8 rss_flush;           /* dword 2 */
+        u8 cast_enc[2];         /* dword 2 */
+        u8 qnq;                 /* dword 2 */
+        u8 rss_bank;            /* dword 2 */
+        u8 rsvd1[23];           /* dword 2 */
+        u8 lro_pkt;             /* dword 2 */
+        u8 rsvd2[2];            /* dword 2 */
+        u8 valid;               /* dword 2 */
+        u8 rsshash[32];         /* dword 3 */
+} __packed;
+
+struct be_eth_rx_compl {
+        u32 dw[4];
+};
diff --git a/drivers/net/benet/be_main.c b/drivers/net/benet/be_main.c
new file mode 100644
index 000000000000..0ecaffb70e58
--- /dev/null
+++ b/drivers/net/benet/be_main.c
@@ -0,0 +1,1911 @@
+/*
+ * Copyright (C) 2005 - 2009 ServerEngines
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.  The full GNU General
+ * Public License is included in this distribution in the file called COPYING.
+ *
+ * Contact Information:
+ * linux-drivers@serverengines.com
+ *
+ * ServerEngines
+ * 209 N. Fair Oaks Ave
+ * Sunnyvale, CA 94085
+ */
+
+#include "be.h"
+
+MODULE_VERSION(DRV_VER);
+MODULE_DEVICE_TABLE(pci, be_dev_ids);
+MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
+MODULE_AUTHOR("ServerEngines Corporation");
+MODULE_LICENSE("GPL");
+
+static unsigned int rx_frag_size = 2048;
+module_param(rx_frag_size, uint, S_IRUGO);
+MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
+
+#define BE_VENDOR_ID            0x19a2
+#define BE2_DEVICE_ID_1         0x0211
+static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
+        { PCI_DEVICE(BE_VENDOR_ID, BE2_DEVICE_ID_1) },
+        { 0 }
+};
+MODULE_DEVICE_TABLE(pci, be_dev_ids);
+
+static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
+{
+        struct be_dma_mem *mem = &q->dma_mem;
+        if (mem->va)
+                pci_free_consistent(adapter->pdev, mem->size,
+                        mem->va, mem->dma);
+}
+
+static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
+                u16 len, u16 entry_size)
+{
+        struct be_dma_mem *mem = &q->dma_mem;
+
+        memset(q, 0, sizeof(*q));
+        q->len = len;
+        q->entry_size = entry_size;
+        mem->size = len * entry_size;
+        mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
+        if (!mem->va)
+                return -1;
+        memset(mem->va, 0, mem->size);
+        return 0;
+}
+
+static inline void *queue_head_node(struct be_queue_info *q)
+{
+        return q->dma_mem.va + q->head * q->entry_size;
+}
+
+static inline void *queue_tail_node(struct be_queue_info *q)
+{
+        return q->dma_mem.va + q->tail * q->entry_size;
+}
+
+static inline void queue_head_inc(struct be_queue_info *q)
+{
+        index_inc(&q->head, q->len);
+}
+
+static inline void queue_tail_inc(struct be_queue_info *q)
+{
+        index_inc(&q->tail, q->len);
+}
+
+static void be_intr_set(struct be_ctrl_info *ctrl, bool enable)
+{
+        u8 __iomem *addr = ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
+        u32 reg = ioread32(addr);
+        u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
+        if (!enabled && enable) {
+                reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
+        } else if (enabled && !enable) {
+                reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
+        } else {
+                printk(KERN_WARNING DRV_NAME
+                        ": bad value in membar_int_ctrl reg=0x%x\n", reg);
+                return;
+        }
+        iowrite32(reg, addr);
+}
+
+static void be_rxq_notify(struct be_ctrl_info *ctrl, u16 qid, u16 posted)
+{
+        u32 val = 0;
+        val |= qid & DB_RQ_RING_ID_MASK;
+        val |= posted << DB_RQ_NUM_POSTED_SHIFT;
+        iowrite32(val, ctrl->db + DB_RQ_OFFSET);
+}
+
+static void be_txq_notify(struct be_ctrl_info *ctrl, u16 qid, u16 posted)
+{
+        u32 val = 0;
+        val |= qid & DB_TXULP_RING_ID_MASK;
+        val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
+        iowrite32(val, ctrl->db + DB_TXULP1_OFFSET);
+}
+
+static void be_eq_notify(struct be_ctrl_info *ctrl, u16 qid,
+                bool arm, bool clear_int, u16 num_popped)
+{
+        u32 val = 0;
+        val |= qid & DB_EQ_RING_ID_MASK;
+        if (arm)
+                val |= 1 << DB_EQ_REARM_SHIFT;
+        if (clear_int)
+                val |= 1 << DB_EQ_CLR_SHIFT;
+        val |= 1 << DB_EQ_EVNT_SHIFT;
+        val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
+        iowrite32(val, ctrl->db + DB_EQ_OFFSET);
+}
+
+static void be_cq_notify(struct be_ctrl_info *ctrl, u16 qid,
+                bool arm, u16 num_popped)
+{
+        u32 val = 0;
+        val |= qid & DB_CQ_RING_ID_MASK;
+        if (arm)
+                val |= 1 << DB_CQ_REARM_SHIFT;
+        val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
+        iowrite32(val, ctrl->db + DB_CQ_OFFSET);
+}
+
+
+static int be_mac_addr_set(struct net_device *netdev, void *p)
+{
+        struct be_adapter *adapter = netdev_priv(netdev);
+        struct sockaddr *addr = p;
+        int status = 0;
+
+        if (netif_running(netdev)) {
+                status = be_cmd_pmac_del(&adapter->ctrl, adapter->if_handle,
+                                adapter->pmac_id);
+                if (status)
+                        return status;
+
+                status = be_cmd_pmac_add(&adapter->ctrl, (u8 *)addr->sa_data,
+                                adapter->if_handle, &adapter->pmac_id);
+        }
+
+        if (!status)
+                memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
+
+        return status;
+}
+
+static void netdev_stats_update(struct be_adapter *adapter)
+{
+        struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
+        struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
+        struct be_port_rxf_stats *port_stats =
+                        &rxf_stats->port[adapter->port_num];
+        struct net_device_stats *dev_stats = &adapter->stats.net_stats;
+
+        dev_stats->rx_packets = port_stats->rx_total_frames;
+        dev_stats->tx_packets = port_stats->tx_unicastframes +
+                port_stats->tx_multicastframes + port_stats->tx_broadcastframes;
+        dev_stats->rx_bytes = (u64) port_stats->rx_bytes_msd << 32 |
+                                (u64) port_stats->rx_bytes_lsd;
+        dev_stats->tx_bytes = (u64) port_stats->tx_bytes_msd << 32 |
+                                (u64) port_stats->tx_bytes_lsd;
+
+        /* bad pkts received */
+        dev_stats->rx_errors = port_stats->rx_crc_errors +
+                port_stats->rx_alignment_symbol_errors +
+                port_stats->rx_in_range_errors +
+                port_stats->rx_out_range_errors + port_stats->rx_frame_too_long;
+
+        /*  packet transmit problems */
+        dev_stats->tx_errors = 0;
+
+        /*  no space in linux buffers */
+        dev_stats->rx_dropped = 0;
+
+        /* no space available in linux */
+        dev_stats->tx_dropped = 0;
+
+        dev_stats->multicast = port_stats->tx_multicastframes;
+        dev_stats->collisions = 0;
+
+        /* detailed rx errors */
+        dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
+                port_stats->rx_out_range_errors + port_stats->rx_frame_too_long;
+        /* receive ring buffer overflow */
+        dev_stats->rx_over_errors = 0;
+        dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
+
+        /* frame alignment errors */
+        dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
+        /* receiver fifo overrun */
+        /* drops_no_pbuf is no per i/f, it's per BE card */
+        dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
+                                        port_stats->rx_input_fifo_overflow +
+                                        rxf_stats->rx_drops_no_pbuf;
+        /* receiver missed packetd */
+        dev_stats->rx_missed_errors = 0;
+        /* detailed tx_errors */
+        dev_stats->tx_aborted_errors = 0;
+        dev_stats->tx_carrier_errors = 0;
+        dev_stats->tx_fifo_errors = 0;
+        dev_stats->tx_heartbeat_errors = 0;
+        dev_stats->tx_window_errors = 0;
+}
+
+static void be_link_status_update(struct be_adapter *adapter)
+{
+        struct be_link_info *prev = &adapter->link;
+        struct be_link_info now = { 0 };
+        struct net_device *netdev = adapter->netdev;
+
+        be_cmd_link_status_query(&adapter->ctrl, &now);
+
+        /* If link came up or went down */
+        if (now.speed != prev->speed && (now.speed == PHY_LINK_SPEED_ZERO ||
+                        prev->speed == PHY_LINK_SPEED_ZERO)) {
+                if (now.speed == PHY_LINK_SPEED_ZERO) {
+                        netif_stop_queue(netdev);
+                        netif_carrier_off(netdev);
+                        printk(KERN_INFO "%s: Link down\n", netdev->name);
+                } else {
+                        netif_start_queue(netdev);
+                        netif_carrier_on(netdev);
+                        printk(KERN_INFO "%s: Link up\n", netdev->name);
+                }
+        }
+        *prev = now;
+}
+
+/* Update the EQ delay n BE based on the RX frags consumed / sec */
+static void be_rx_eqd_update(struct be_adapter *adapter)
+{
+        u32 eqd;
+        struct be_ctrl_info *ctrl = &adapter->ctrl;
+        struct be_eq_obj *rx_eq = &adapter->rx_eq;
+        struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
+
+        /* Update once a second */
+        if (((jiffies - stats->rx_fps_jiffies) < HZ) || rx_eq->enable_aic == 0)
+                return;
+
+        stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
+                        ((jiffies - stats->rx_fps_jiffies) / HZ);
+
+        stats->rx_fps_jiffies = jiffies;
+        stats->be_prev_rx_frags = stats->be_rx_frags;
+        eqd = stats->be_rx_fps / 110000;
+        eqd = eqd << 3;
+        if (eqd > rx_eq->max_eqd)
+                eqd = rx_eq->max_eqd;
+        if (eqd < rx_eq->min_eqd)
+                eqd = rx_eq->min_eqd;
+        if (eqd < 10)
+                eqd = 0;
+        if (eqd != rx_eq->cur_eqd)
+                be_cmd_modify_eqd(ctrl, rx_eq->q.id, eqd);
+
+        rx_eq->cur_eqd = eqd;
+}
+
+static struct net_device_stats *be_get_stats(struct net_device *dev)
+{
+        struct be_adapter *adapter = netdev_priv(dev);
+
+        return &adapter->stats.net_stats;
+}
+
+static void be_tx_stats_update(struct be_adapter *adapter,
+                        u32 wrb_cnt, u32 copied, bool stopped)
+{
+        struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
+        stats->be_tx_reqs++;
+        stats->be_tx_wrbs += wrb_cnt;
+        stats->be_tx_bytes += copied;
+        if (stopped)
+                stats->be_tx_stops++;
+
+        /* Update tx rate once in two seconds */
+        if ((jiffies - stats->be_tx_jiffies) > 2 * HZ) {
+                u32 r;
+                r = (stats->be_tx_bytes - stats->be_tx_bytes_prev) /
+                        ((u32) (jiffies - stats->be_tx_jiffies) / HZ);
+                r = (r / 1000000);                      /* M bytes/s */
+                stats->be_tx_rate = (r * 8);    /* M bits/s */
+                stats->be_tx_jiffies = jiffies;
+                stats->be_tx_bytes_prev = stats->be_tx_bytes;
+        }
+}
+
+/* Determine number of WRB entries needed to xmit data in an skb */
+static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
+{
+        int cnt = 0;
+        while (skb) {
+                if (skb->len > skb->data_len)
+                        cnt++;
+                cnt += skb_shinfo(skb)->nr_frags;
+                skb = skb_shinfo(skb)->frag_list;
+        }
+        /* to account for hdr wrb */
+        cnt++;
+        if (cnt & 1) {
+                /* add a dummy to make it an even num */
+                cnt++;
+                *dummy = true;
+        } else
+                *dummy = false;
+        BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
+        return cnt;
+}
+
+static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
+{
+        wrb->frag_pa_hi = upper_32_bits(addr);
+        wrb->frag_pa_lo = addr & 0xFFFFFFFF;
+        wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
+}
+
+static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
+                bool vlan, u32 wrb_cnt, u32 len)
+{
+        memset(hdr, 0, sizeof(*hdr));
+
+        AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
+
+        if (skb_shinfo(skb)->gso_segs > 1 && skb_shinfo(skb)->gso_size) {
+                AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
+                AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
+                        hdr, skb_shinfo(skb)->gso_size);
+        } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
+                if (is_tcp_pkt(skb))
+                        AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
+                else if (is_udp_pkt(skb))
+                        AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
+        }
+
+        if (vlan && vlan_tx_tag_present(skb)) {
+                AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
+                AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
+                        hdr, vlan_tx_tag_get(skb));
+        }
+
+        AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
+        AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
+        AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
+        AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
+}
+
+
+static int make_tx_wrbs(struct be_adapter *adapter,
+                struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
+{
+        u64 busaddr;
+        u32 i, copied = 0;
+        struct pci_dev *pdev = adapter->pdev;
+        struct sk_buff *first_skb = skb;
+        struct be_queue_info *txq = &adapter->tx_obj.q;
+        struct be_eth_wrb *wrb;
+        struct be_eth_hdr_wrb *hdr;
+
+        atomic_add(wrb_cnt, &txq->used);
+        hdr = queue_head_node(txq);
+        queue_head_inc(txq);
+
+        while (skb) {
+                if (skb->len > skb->data_len) {
+                        int len = skb->len - skb->data_len;
+                        busaddr = pci_map_single(pdev, skb->data, len,
+                                        PCI_DMA_TODEVICE);
+                        wrb = queue_head_node(txq);
+                        wrb_fill(wrb, busaddr, len);
+                        be_dws_cpu_to_le(wrb, sizeof(*wrb));
+                        queue_head_inc(txq);
+                        copied += len;
+                }
+
+                for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
+                        struct skb_frag_struct *frag =
+                                &skb_shinfo(skb)->frags[i];
+                        busaddr = pci_map_page(pdev, frag->page,
+                                        frag->page_offset,
+                                        frag->size, PCI_DMA_TODEVICE);
+                        wrb = queue_head_node(txq);
+                        wrb_fill(wrb, busaddr, frag->size);
+                        be_dws_cpu_to_le(wrb, sizeof(*wrb));
+                        queue_head_inc(txq);
+                        copied += frag->size;
+                }
+                skb = skb_shinfo(skb)->frag_list;
+        }
+
+        if (dummy_wrb) {
+                wrb = queue_head_node(txq);
+                wrb_fill(wrb, 0, 0);
+                be_dws_cpu_to_le(wrb, sizeof(*wrb));
+                queue_head_inc(txq);
+        }
+
+        wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
+                wrb_cnt, copied);
+        be_dws_cpu_to_le(hdr, sizeof(*hdr));
+
+        return copied;
+}
+
+static int be_xmit(struct sk_buff *skb, struct net_device *netdev)
+{
+        struct be_adapter *adapter = netdev_priv(netdev);
+        struct be_tx_obj *tx_obj = &adapter->tx_obj;
+        struct be_queue_info *txq = &tx_obj->q;
+        u32 wrb_cnt = 0, copied = 0;
+        u32 start = txq->head;
+        bool dummy_wrb, stopped = false;
+
+        wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
+
+        copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
+
+        /* record the sent skb in the sent_skb table */
+        BUG_ON(tx_obj->sent_skb_list[start]);
+        tx_obj->sent_skb_list[start] = skb;
+
+        /* Ensure that txq has space for the next skb; Else stop the queue
+         * *BEFORE* ringing the tx doorbell, so that we serialze the
+         * tx compls of the current transmit which'll wake up the queue
+         */
+        if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >= txq->len) {
+                netif_stop_queue(netdev);
+                stopped = true;
+        }
+
+        be_txq_notify(&adapter->ctrl, txq->id, wrb_cnt);
+
+        netdev->trans_start = jiffies;
+
+        be_tx_stats_update(adapter, wrb_cnt, copied, stopped);
+        return NETDEV_TX_OK;
+}
+
+static int be_change_mtu(struct net_device *netdev, int new_mtu)
+{
+        struct be_adapter *adapter = netdev_priv(netdev);
+        if (new_mtu < BE_MIN_MTU ||
+                        new_mtu > BE_MAX_JUMBO_FRAME_SIZE) {
+                dev_info(&adapter->pdev->dev,
+                        "MTU must be between %d and %d bytes\n",
+                        BE_MIN_MTU, BE_MAX_JUMBO_FRAME_SIZE);
+                return -EINVAL;
+        }
+        dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
+                        netdev->mtu, new_mtu);
+        netdev->mtu = new_mtu;
+        return 0;
+}
+
+/*
+ * if there are BE_NUM_VLANS_SUPPORTED or lesser number of VLANS configured,
+ * program them in BE.  If more than BE_NUM_VLANS_SUPPORTED are configured,
+ * set the BE in promiscuous VLAN mode.
+ */
+static void be_vid_config(struct net_device *netdev)
+{
+        struct be_adapter *adapter = netdev_priv(netdev);
+        u16 vtag[BE_NUM_VLANS_SUPPORTED];
+        u16 ntags = 0, i;
+
+        if (adapter->num_vlans <= BE_NUM_VLANS_SUPPORTED)  {
+                /* Construct VLAN Table to give to HW */
+                for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
+                        if (adapter->vlan_tag[i]) {
+                                vtag[ntags] = cpu_to_le16(i);
+                                ntags++;
+                        }
+                }
+                be_cmd_vlan_config(&adapter->ctrl, adapter->if_handle,
+                        vtag, ntags, 1, 0);
+        } else {
+                be_cmd_vlan_config(&adapter->ctrl, adapter->if_handle,
+                        NULL, 0, 1, 1);
+        }
+}
+
+static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
+{
+        struct be_adapter *adapter = netdev_priv(netdev);
+        struct be_eq_obj *rx_eq = &adapter->rx_eq;
+        struct be_eq_obj *tx_eq = &adapter->tx_eq;
+        struct be_ctrl_info *ctrl = &adapter->ctrl;
+
+        be_eq_notify(ctrl, rx_eq->q.id, false, false, 0);
+        be_eq_notify(ctrl, tx_eq->q.id, false, false, 0);
+        adapter->vlan_grp = grp;
+        be_eq_notify(ctrl, rx_eq->q.id, true, false, 0);
+        be_eq_notify(ctrl, tx_eq->q.id, true, false, 0);
+}
+
+static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
+{
+        struct be_adapter *adapter = netdev_priv(netdev);
+
+        adapter->num_vlans++;
+        adapter->vlan_tag[vid] = 1;
+
+        be_vid_config(netdev);
+}
+
+static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
+{
+        struct be_adapter *adapter = netdev_priv(netdev);
+
+        adapter->num_vlans--;
+        adapter->vlan_tag[vid] = 0;
+
+        vlan_group_set_device(adapter->vlan_grp, vid, NULL);
+        be_vid_config(netdev);
+}
+
+static void be_set_multicast_filter(struct net_device *netdev)
+{
+        struct be_adapter *adapter = netdev_priv(netdev);
+        struct dev_mc_list *mc_ptr;
+        u8 mac_addr[32][ETH_ALEN];
+        int i = 0;
+
+        if (netdev->flags & IFF_ALLMULTI) {
+                /* set BE in Multicast promiscuous */
+                be_cmd_mcast_mac_set(&adapter->ctrl,
+                                        adapter->if_handle, NULL, 0, true);
+                return;
+        }
+
+        for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
+                memcpy(&mac_addr[i][0], mc_ptr->dmi_addr, ETH_ALEN);
+                if (++i >= 32) {
+                        be_cmd_mcast_mac_set(&adapter->ctrl,
+                                adapter->if_handle, &mac_addr[0][0], i, false);
+                        i = 0;
+                }
+
+        }
+
+        if (i) {
+                /* reset the promiscuous mode also. */
+                be_cmd_mcast_mac_set(&adapter->ctrl,
+                        adapter->if_handle, &mac_addr[0][0], i, false);
+        }
+}
+
+static void be_set_multicast_list(struct net_device *netdev)
+{
+        struct be_adapter *adapter = netdev_priv(netdev);
+
+        if (netdev->flags & IFF_PROMISC) {
+                be_cmd_promiscuous_config(&adapter->ctrl, adapter->port_num, 1);
+        } else {
+                be_cmd_promiscuous_config(&adapter->ctrl, adapter->port_num, 0);
+                be_set_multicast_filter(netdev);
+        }
+}
+
+static void be_rx_rate_update(struct be_adapter *adapter, u32 pktsize,
+                        u16 numfrags)
+{
+        struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
+        u32 rate;
+
+        stats->be_rx_compl++;
+        stats->be_rx_frags += numfrags;
+        stats->be_rx_bytes += pktsize;
+
+        /* Update the rate once in two seconds */
+        if ((jiffies - stats->be_rx_jiffies) < 2 * HZ)
+                return;
+
+        rate = (stats->be_rx_bytes - stats->be_rx_bytes_prev) /
+                ((u32) (jiffies - stats->be_rx_jiffies) / HZ);
+        rate = (rate / 1000000);        /* MB/Sec */
+        stats->be_rx_rate = (rate * 8);         /* Mega Bits/Sec */
+        stats->be_rx_jiffies = jiffies;
+        stats->be_rx_bytes_prev = stats->be_rx_bytes;
+}
+
+static struct be_rx_page_info *
+get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
+{
+        struct be_rx_page_info *rx_page_info;
+        struct be_queue_info *rxq = &adapter->rx_obj.q;
+
+        rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
+        BUG_ON(!rx_page_info->page);
+
+        if (rx_page_info->last_page_user)
+                pci_unmap_page(adapter->pdev, pci_unmap_addr(rx_page_info, bus),
+                        adapter->big_page_size, PCI_DMA_FROMDEVICE);
+
+        atomic_dec(&rxq->used);
+        return rx_page_info;
+}
+
+/* Throwaway the data in the Rx completion */
+static void be_rx_compl_discard(struct be_adapter *adapter,
+                        struct be_eth_rx_compl *rxcp)
+{
+        struct be_queue_info *rxq = &adapter->rx_obj.q;
+        struct be_rx_page_info *page_info;
+        u16 rxq_idx, i, num_rcvd;
+
+        rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
+        num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
+
+        for (i = 0; i < num_rcvd; i++) {
+                page_info = get_rx_page_info(adapter, rxq_idx);
+                put_page(page_info->page);
+                memset(page_info, 0, sizeof(*page_info));
+                index_inc(&rxq_idx, rxq->len);
+        }
+}
+
+/*
+ * skb_fill_rx_data forms a complete skb for an ether frame
+ * indicated by rxcp.
+ */
+static void skb_fill_rx_data(struct be_adapter *adapter,
+                        struct sk_buff *skb, struct be_eth_rx_compl *rxcp)
+{
+        struct be_queue_info *rxq = &adapter->rx_obj.q;
+        struct be_rx_page_info *page_info;
+        u16 rxq_idx, i, num_rcvd;
+        u32 pktsize, hdr_len, curr_frag_len;
+        u8 *start;
+
+        rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
+        pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
+        num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
+
+        page_info = get_rx_page_info(adapter, rxq_idx);
+
+        start = page_address(page_info->page) + page_info->page_offset;
+        prefetch(start);
+
+        /* Copy data in the first descriptor of this completion */
+        curr_frag_len = min(pktsize, rx_frag_size);
+
+        /* Copy the header portion into skb_data */
+        hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
+        memcpy(skb->data, start, hdr_len);
+        skb->len = curr_frag_len;
+        if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
+                /* Complete packet has now been moved to data */
+                put_page(page_info->page);
+                skb->data_len = 0;
+                skb->tail += curr_frag_len;
+        } else {
+                skb_shinfo(skb)->nr_frags = 1;
+                skb_shinfo(skb)->frags[0].page = page_info->page;
+                skb_shinfo(skb)->frags[0].page_offset =
+                                        page_info->page_offset + hdr_len;
+                skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
+                skb->data_len = curr_frag_len - hdr_len;
+                skb->tail += hdr_len;
+        }
+        memset(page_info, 0, sizeof(*page_info));
+
+        if (pktsize <= rx_frag_size) {
+                BUG_ON(num_rcvd != 1);
+                return;
+        }
+
+        /* More frags present for this completion */
+        pktsize -= curr_frag_len; /* account for above copied frag */
+        for (i = 1; i < num_rcvd; i++) {
+                index_inc(&rxq_idx, rxq->len);
+                page_info = get_rx_page_info(adapter, rxq_idx);
+
+                curr_frag_len = min(pktsize, rx_frag_size);
+
+                skb_shinfo(skb)->frags[i].page = page_info->page;
+                skb_shinfo(skb)->frags[i].page_offset = page_info->page_offset;
+                skb_shinfo(skb)->frags[i].size = curr_frag_len;
+                skb->len += curr_frag_len;
+                skb->data_len += curr_frag_len;
+                skb_shinfo(skb)->nr_frags++;
+                pktsize -= curr_frag_len;
+
+                memset(page_info, 0, sizeof(*page_info));
+        }
+
+        be_rx_rate_update(adapter, pktsize, num_rcvd);
+        return;
+}
+
+/* Process the RX completion indicated by rxcp when LRO is disabled */
+static void be_rx_compl_process(struct be_adapter *adapter,
+                        struct be_eth_rx_compl *rxcp)
+{
+        struct sk_buff *skb;
+        u32 vtp, vid;
+        int l4_cksm;
+
+        l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
+        vtp = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
+
+        skb = netdev_alloc_skb(adapter->netdev, BE_HDR_LEN + NET_IP_ALIGN);
+        if (!skb) {
+                if (net_ratelimit())
+                        dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
+                be_rx_compl_discard(adapter, rxcp);
+                return;
+        }
+
+        skb_reserve(skb, NET_IP_ALIGN);
+
+        skb_fill_rx_data(adapter, skb, rxcp);
+
+        if (l4_cksm && adapter->rx_csum)
+                skb->ip_summed = CHECKSUM_UNNECESSARY;
+        else
+                skb->ip_summed = CHECKSUM_NONE;
+
+        skb->truesize = skb->len + sizeof(struct sk_buff);
+        skb->protocol = eth_type_trans(skb, adapter->netdev);
+        skb->dev = adapter->netdev;
+
+        if (vtp) {
+                if (!adapter->vlan_grp || adapter->num_vlans == 0) {
+                        kfree_skb(skb);
+                        return;
+                }
+                vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
+                vid = be16_to_cpu(vid);
+                vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
+        } else {
+                netif_receive_skb(skb);
+        }
+
+        adapter->netdev->last_rx = jiffies;
+
+        return;
+}
+
+/* Process the RX completion indicated by rxcp when LRO is enabled */
+static void be_rx_compl_process_lro(struct be_adapter *adapter,
+                        struct be_eth_rx_compl *rxcp)
+{
+        struct be_rx_page_info *page_info;
+        struct skb_frag_struct rx_frags[BE_MAX_FRAGS_PER_FRAME];
+        struct be_queue_info *rxq = &adapter->rx_obj.q;
+        u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
+        u16 i, rxq_idx = 0, vid;
+
+        num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
+        pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
+        vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
+        rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
+
+        remaining = pkt_size;
+        for (i = 0; i < num_rcvd; i++) {
+                page_info = get_rx_page_info(adapter, rxq_idx);
+
+                curr_frag_len = min(remaining, rx_frag_size);
+
+                rx_frags[i].page = page_info->page;
+                rx_frags[i].page_offset = page_info->page_offset;
+                rx_frags[i].size = curr_frag_len;
+                remaining -= curr_frag_len;
+
+                index_inc(&rxq_idx, rxq->len);
+
+                memset(page_info, 0, sizeof(*page_info));
+        }
+
+        if (likely(!vlanf)) {
+                lro_receive_frags(&adapter->rx_obj.lro_mgr, rx_frags, pkt_size,
+                                pkt_size, NULL, 0);
+        } else {
+                vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
+                vid = be16_to_cpu(vid);
+
+                if (!adapter->vlan_grp || adapter->num_vlans == 0)
+                        return;
+
+                lro_vlan_hwaccel_receive_frags(&adapter->rx_obj.lro_mgr,
+                        rx_frags, pkt_size, pkt_size, adapter->vlan_grp,
+                        vid, NULL, 0);
+        }
+
+        be_rx_rate_update(adapter, pkt_size, num_rcvd);
+        return;
+}
+
+static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
+{
+        struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
+
+        if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
+                return NULL;
+
+        be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
+
+        rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
+
+        queue_tail_inc(&adapter->rx_obj.cq);
+        return rxcp;
+}
+
+static inline struct page *be_alloc_pages(u32 size)
+{
+        gfp_t alloc_flags = GFP_ATOMIC;
+        u32 order = get_order(size);
+        if (order > 0)
+                alloc_flags |= __GFP_COMP;
+        return  alloc_pages(alloc_flags, order);
+}
+
+/*
+ * Allocate a page, split it to fragments of size rx_frag_size and post as
+ * receive buffers to BE
+ */
+static void be_post_rx_frags(struct be_adapter *adapter)
+{
+        struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
+        struct be_rx_page_info *page_info = NULL;
+        struct be_queue_info *rxq = &adapter->rx_obj.q;
+        struct page *pagep = NULL;
+        struct be_eth_rx_d *rxd;
+        u64 page_dmaaddr = 0, frag_dmaaddr;
+        u32 posted, page_offset = 0;
+
+
+        page_info = &page_info_tbl[rxq->head];
+        for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
+                if (!pagep) {
+                        pagep = be_alloc_pages(adapter->big_page_size);
+                        if (unlikely(!pagep)) {
+                                drvr_stats(adapter)->be_ethrx_post_fail++;
+                                break;
+                        }
+                        page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
+                                                adapter->big_page_size,
+                                                PCI_DMA_FROMDEVICE);
+                        page_info->page_offset = 0;
+                } else {
+                        get_page(pagep);
+                        page_info->page_offset = page_offset + rx_frag_size;
+                }
+                page_offset = page_info->page_offset;
+                page_info->page = pagep;
+                pci_unmap_addr_set(page_info, bus, page_dmaaddr);
+                frag_dmaaddr = page_dmaaddr + page_info->page_offset;
+
+                rxd = queue_head_node(rxq);
+                rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
+                rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
+                queue_head_inc(rxq);
+
+                /* Any space left in the current big page for another frag? */
+                if ((page_offset + rx_frag_size + rx_frag_size) >
+                                        adapter->big_page_size) {
+                        pagep = NULL;
+                        page_info->last_page_user = true;
+                }
+                page_info = &page_info_tbl[rxq->head];
+        }
+        if (pagep)
+                page_info->last_page_user = true;
+
+        if (posted) {
+                atomic_add(posted, &rxq->used);
+                be_rxq_notify(&adapter->ctrl, rxq->id, posted);
+        } else if (atomic_read(&rxq->used) == 0) {
+                /* Let be_worker replenish when memory is available */
+                adapter->rx_post_starved = true;
+        }
+
+        return;
+}
+
+static struct be_eth_tx_compl *
+be_tx_compl_get(struct be_adapter *adapter)
+{
+        struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
+        struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
+
+        if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
+                return NULL;
+
+        be_dws_le_to_cpu(txcp, sizeof(*txcp));
+
+        txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
+
+        queue_tail_inc(tx_cq);
+        return txcp;
+}
+
+static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
+{
+        struct be_queue_info *txq = &adapter->tx_obj.q;
+        struct be_eth_wrb *wrb;
+        struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
+        struct sk_buff *sent_skb;
+        u64 busaddr;
+        u16 cur_index, num_wrbs = 0;
+
+        cur_index = txq->tail;
+        sent_skb = sent_skbs[cur_index];
+        BUG_ON(!sent_skb);
+        sent_skbs[cur_index] = NULL;
+
+        do {
+                cur_index = txq->tail;
+                wrb = queue_tail_node(txq);
+                be_dws_le_to_cpu(wrb, sizeof(*wrb));
+                busaddr = ((u64)wrb->frag_pa_hi << 32) | (u64)wrb->frag_pa_lo;
+                if (busaddr != 0) {
+                        pci_unmap_single(adapter->pdev, busaddr,
+                                wrb->frag_len, PCI_DMA_TODEVICE);
+                }
+                num_wrbs++;
+                queue_tail_inc(txq);
+        } while (cur_index != last_index);
+
+        atomic_sub(num_wrbs, &txq->used);
+
+        kfree_skb(sent_skb);
+}
+
+static void be_rx_q_clean(struct be_adapter *adapter)
+{
+        struct be_rx_page_info *page_info;
+        struct be_queue_info *rxq = &adapter->rx_obj.q;
+        struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
+        struct be_eth_rx_compl *rxcp;
+        u16 tail;
+
+        /* First cleanup pending rx completions */
+        while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
+                be_rx_compl_discard(adapter, rxcp);
+                be_cq_notify(&adapter->ctrl, rx_cq->id, true, 1);
+        }
+
+        /* Then free posted rx buffer that were not used */
+        tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
+        for (; tail != rxq->head; index_inc(&tail, rxq->len)) {
+                page_info = get_rx_page_info(adapter, tail);
+                put_page(page_info->page);
+                memset(page_info, 0, sizeof(*page_info));
+        }
+        BUG_ON(atomic_read(&rxq->used));
+}
+
+static void be_tx_q_clean(struct be_adapter *adapter)
+{
+        struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
+        struct sk_buff *sent_skb;
+        struct be_queue_info *txq = &adapter->tx_obj.q;
+        u16 last_index;
+        bool dummy_wrb;
+
+        while (atomic_read(&txq->used)) {
+                sent_skb = sent_skbs[txq->tail];
+                last_index = txq->tail;
+                index_adv(&last_index,
+                        wrb_cnt_for_skb(sent_skb, &dummy_wrb) - 1, txq->len);
+                be_tx_compl_process(adapter, last_index);
+        }
+}
+
+static void be_tx_queues_destroy(struct be_adapter *adapter)
+{
+        struct be_queue_info *q;
+
+        q = &adapter->tx_obj.q;
+        if (q->created)
+                be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_TXQ);
+        be_queue_free(adapter, q);
+
+        q = &adapter->tx_obj.cq;
+        if (q->created)
+                be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_CQ);
+        be_queue_free(adapter, q);
+
+        /* No more tx completions can be rcvd now; clean up if there are
+         * any pending completions or pending tx requests */
+        be_tx_q_clean(adapter);
+
+        q = &adapter->tx_eq.q;
+        if (q->created)
+                be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_EQ);
+        be_queue_free(adapter, q);
+}
+
+static int be_tx_queues_create(struct be_adapter *adapter)
+{
+        struct be_queue_info *eq, *q, *cq;
+
+        adapter->tx_eq.max_eqd = 0;
+        adapter->tx_eq.min_eqd = 0;
+        adapter->tx_eq.cur_eqd = 96;
+        adapter->tx_eq.enable_aic = false;
+        /* Alloc Tx Event queue */
+        eq = &adapter->tx_eq.q;
+        if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
+                return -1;
+
+        /* Ask BE to create Tx Event queue */
+        if (be_cmd_eq_create(&adapter->ctrl, eq, adapter->tx_eq.cur_eqd))
+                goto tx_eq_free;
+        /* Alloc TX eth compl queue */
+        cq = &adapter->tx_obj.cq;
+        if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
+                        sizeof(struct be_eth_tx_compl)))
+                goto tx_eq_destroy;
+
+        /* Ask BE to create Tx eth compl queue */
+        if (be_cmd_cq_create(&adapter->ctrl, cq, eq, false, false, 3))
+                goto tx_cq_free;
+
+        /* Alloc TX eth queue */
+        q = &adapter->tx_obj.q;
+        if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
+                goto tx_cq_destroy;
+
+        /* Ask BE to create Tx eth queue */
+        if (be_cmd_txq_create(&adapter->ctrl, q, cq))
+                goto tx_q_free;
+        return 0;
+
+tx_q_free:
+        be_queue_free(adapter, q);
+tx_cq_destroy:
+        be_cmd_q_destroy(&adapter->ctrl, cq, QTYPE_CQ);
+tx_cq_free:
+        be_queue_free(adapter, cq);
+tx_eq_destroy:
+        be_cmd_q_destroy(&adapter->ctrl, eq, QTYPE_EQ);
+tx_eq_free:
+        be_queue_free(adapter, eq);
+        return -1;
+}
+
+static void be_rx_queues_destroy(struct be_adapter *adapter)
+{
+        struct be_queue_info *q;
+
+        q = &adapter->rx_obj.q;
+        if (q->created) {
+                be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_RXQ);
+                be_rx_q_clean(adapter);
+        }
+        be_queue_free(adapter, q);
+
+        q = &adapter->rx_obj.cq;
+        if (q->created)
+                be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_CQ);
+        be_queue_free(adapter, q);
+
+        q = &adapter->rx_eq.q;
+        if (q->created)
+                be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_EQ);
+        be_queue_free(adapter, q);
+}
+
+static int be_rx_queues_create(struct be_adapter *adapter)
+{
+        struct be_queue_info *eq, *q, *cq;
+        int rc;
+
+        adapter->max_rx_coal = BE_MAX_FRAGS_PER_FRAME;
+        adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
+        adapter->rx_eq.max_eqd = BE_MAX_EQD;
+        adapter->rx_eq.min_eqd = 0;
+        adapter->rx_eq.cur_eqd = 0;
+        adapter->rx_eq.enable_aic = true;
+
+        /* Alloc Rx Event queue */
+        eq = &adapter->rx_eq.q;
+        rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
+                                sizeof(struct be_eq_entry));
+        if (rc)
+                return rc;
+
+        /* Ask BE to create Rx Event queue */
+        rc = be_cmd_eq_create(&adapter->ctrl, eq, adapter->rx_eq.cur_eqd);
+        if (rc)
+                goto rx_eq_free;
+
+        /* Alloc RX eth compl queue */
+        cq = &adapter->rx_obj.cq;
+        rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
+                        sizeof(struct be_eth_rx_compl));
+        if (rc)
+                goto rx_eq_destroy;
+
+        /* Ask BE to create Rx eth compl queue */
+        rc = be_cmd_cq_create(&adapter->ctrl, cq, eq, false, false, 3);
+        if (rc)
+                goto rx_cq_free;
+
+        /* Alloc RX eth queue */
+        q = &adapter->rx_obj.q;
+        rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
+        if (rc)
+                goto rx_cq_destroy;
+
+        /* Ask BE to create Rx eth queue */
+        rc = be_cmd_rxq_create(&adapter->ctrl, q, cq->id, rx_frag_size,
+                BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
+        if (rc)
+                goto rx_q_free;
+
+        return 0;
+rx_q_free:
+        be_queue_free(adapter, q);
+rx_cq_destroy:
+        be_cmd_q_destroy(&adapter->ctrl, cq, QTYPE_CQ);
+rx_cq_free:
+        be_queue_free(adapter, cq);
+rx_eq_destroy:
+        be_cmd_q_destroy(&adapter->ctrl, eq, QTYPE_EQ);
+rx_eq_free:
+        be_queue_free(adapter, eq);
+        return rc;
+}
+static bool event_get(struct be_eq_obj *eq_obj, u16 *rid)
+{
+        struct be_eq_entry *entry = queue_tail_node(&eq_obj->q);
+        u32 evt = entry->evt;
+
+        if (!evt)
+                return false;
+
+        evt = le32_to_cpu(evt);
+        *rid = (evt >> EQ_ENTRY_RES_ID_SHIFT) & EQ_ENTRY_RES_ID_MASK;
+        entry->evt = 0;
+        queue_tail_inc(&eq_obj->q);
+        return true;
+}
+
+static int event_handle(struct be_ctrl_info *ctrl,
+                        struct be_eq_obj *eq_obj)
+{
+        u16 rid = 0, num = 0;
+
+        while (event_get(eq_obj, &rid))
+                num++;
+
+        /* We can see an interrupt and no event */
+        be_eq_notify(ctrl, eq_obj->q.id, true, true, num);
+        if (num)
+                napi_schedule(&eq_obj->napi);
+
+        return num;
+}
+
+static irqreturn_t be_intx(int irq, void *dev)
+{
+        struct be_adapter *adapter = dev;
+        struct be_ctrl_info *ctrl = &adapter->ctrl;
+        int rx, tx;
+
+        tx = event_handle(ctrl, &adapter->tx_eq);
+        rx = event_handle(ctrl, &adapter->rx_eq);
+
+        if (rx || tx)
+                return IRQ_HANDLED;
+        else
+                return IRQ_NONE;
+}
+
+static irqreturn_t be_msix_rx(int irq, void *dev)
+{
+        struct be_adapter *adapter = dev;
+
+        event_handle(&adapter->ctrl, &adapter->rx_eq);
+
+        return IRQ_HANDLED;
+}
+
+static irqreturn_t be_msix_tx(int irq, void *dev)
+{
+        struct be_adapter *adapter = dev;
+
+        event_handle(&adapter->ctrl, &adapter->tx_eq);
+
+        return IRQ_HANDLED;
+}
+
+static inline bool do_lro(struct be_adapter *adapter,
+                        struct be_eth_rx_compl *rxcp)
+{
+        int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
+        int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
+
+        if (err)
+                drvr_stats(adapter)->be_rxcp_err++;
+
+        return (!tcp_frame || err || (adapter->max_rx_coal <= 1)) ?
+                false : true;
+}
+
+int be_poll_rx(struct napi_struct *napi, int budget)
+{
+        struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
+        struct be_adapter *adapter =
+                container_of(rx_eq, struct be_adapter, rx_eq);
+        struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
+        struct be_eth_rx_compl *rxcp;
+        u32 work_done;
+
+        for (work_done = 0; work_done < budget; work_done++) {
+                rxcp = be_rx_compl_get(adapter);
+                if (!rxcp)
+                        break;
+
+                if (do_lro(adapter, rxcp))
+                        be_rx_compl_process_lro(adapter, rxcp);
+                else
+                        be_rx_compl_process(adapter, rxcp);
+        }
+
+        lro_flush_all(&adapter->rx_obj.lro_mgr);
+
+        /* Refill the queue */
+        if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
+                be_post_rx_frags(adapter);
+
+        /* All consumed */
+        if (work_done < budget) {
+                napi_complete(napi);
+                be_cq_notify(&adapter->ctrl, rx_cq->id, true, work_done);
+        } else {
+                /* More to be consumed; continue with interrupts disabled */
+                be_cq_notify(&adapter->ctrl, rx_cq->id, false, work_done);
+        }
+        return work_done;
+}
+
+/* For TX we don't honour budget; consume everything */
+int be_poll_tx(struct napi_struct *napi, int budget)
+{
+        struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
+        struct be_adapter *adapter =
+                container_of(tx_eq, struct be_adapter, tx_eq);
+        struct be_tx_obj *tx_obj = &adapter->tx_obj;
+        struct be_queue_info *tx_cq = &tx_obj->cq;
+        struct be_queue_info *txq = &tx_obj->q;
+        struct be_eth_tx_compl *txcp;
+        u32 num_cmpl = 0;
+        u16 end_idx;
+
+        while ((txcp = be_tx_compl_get(adapter))) {
+                end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
+                                        wrb_index, txcp);
+                be_tx_compl_process(adapter, end_idx);
+                num_cmpl++;
+        }
+
+        /* As Tx wrbs have been freed up, wake up netdev queue if
+         * it was stopped due to lack of tx wrbs.
+         */
+        if (netif_queue_stopped(adapter->netdev) &&
+                        atomic_read(&txq->used) < txq->len / 2) {
+                netif_wake_queue(adapter->netdev);
+        }
+
+        napi_complete(napi);
+
+        be_cq_notify(&adapter->ctrl, tx_cq->id, true, num_cmpl);
+
+        drvr_stats(adapter)->be_tx_events++;
+        drvr_stats(adapter)->be_tx_compl += num_cmpl;
+
+        return 1;
+}
+
+static void be_worker(struct work_struct *work)
+{
+        struct be_adapter *adapter =
+                container_of(work, struct be_adapter, work.work);
+        int status;
+
+        /* Check link */
+        be_link_status_update(adapter);
+
+        /* Get Stats */
+        status = be_cmd_get_stats(&adapter->ctrl, &adapter->stats.cmd);
+        if (!status)
+                netdev_stats_update(adapter);
+
+        /* Set EQ delay */
+        be_rx_eqd_update(adapter);
+
+        if (adapter->rx_post_starved) {
+                adapter->rx_post_starved = false;
+                be_post_rx_frags(adapter);
+        }
+
+        schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
+}
+
+static void be_msix_enable(struct be_adapter *adapter)
+{
+        int i, status;
+
+        for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
+                adapter->msix_entries[i].entry = i;
+
+        status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
+                BE_NUM_MSIX_VECTORS);
+        if (status == 0)
+                adapter->msix_enabled = true;
+        return;
+}
+
+static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
+{
+        return adapter->msix_entries[eq_id -
+                        8 * adapter->ctrl.pci_func].vector;
+}
+
+static int be_msix_register(struct be_adapter *adapter)
+{
+        struct net_device *netdev = adapter->netdev;
+        struct be_eq_obj *tx_eq = &adapter->tx_eq;
+        struct be_eq_obj *rx_eq = &adapter->rx_eq;
+        int status, vec;
+
+        sprintf(tx_eq->desc, "%s-tx", netdev->name);
+        vec = be_msix_vec_get(adapter, tx_eq->q.id);
+        status = request_irq(vec, be_msix_tx, 0, tx_eq->desc, adapter);
+        if (status)
+                goto err;
+
+        sprintf(rx_eq->desc, "%s-rx", netdev->name);
+        vec = be_msix_vec_get(adapter, rx_eq->q.id);
+        status = request_irq(vec, be_msix_rx, 0, rx_eq->desc, adapter);
+        if (status) { /* Free TX IRQ */
+                vec = be_msix_vec_get(adapter, tx_eq->q.id);
+                free_irq(vec, adapter);
+                goto err;
+        }
+        return 0;
+err:
+        dev_warn(&adapter->pdev->dev,
+                "MSIX Request IRQ failed - err %d\n", status);
+        pci_disable_msix(adapter->pdev);
+        adapter->msix_enabled = false;
+        return status;
+}
+
+static int be_irq_register(struct be_adapter *adapter)
+{
+        struct net_device *netdev = adapter->netdev;
+        int status;
+
+        if (adapter->msix_enabled) {
+                status = be_msix_register(adapter);
+                if (status == 0)
+                        goto done;
+        }
+
+        /* INTx */
+        netdev->irq = adapter->pdev->irq;
+        status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
+                        adapter);
+        if (status) {
+                dev_err(&adapter->pdev->dev,
+                        "INTx request IRQ failed - err %d\n", status);
+                return status;
+        }
+done:
+        adapter->isr_registered = true;
+        return 0;
+}
+
+static void be_irq_unregister(struct be_adapter *adapter)
+{
+        struct net_device *netdev = adapter->netdev;
+        int vec;
+
+        if (!adapter->isr_registered)
+                return;
+
+        /* INTx */
+        if (!adapter->msix_enabled) {
+                free_irq(netdev->irq, adapter);
+                goto done;
+        }
+
+        /* MSIx */
+        vec = be_msix_vec_get(adapter, adapter->tx_eq.q.id);
+        free_irq(vec, adapter);
+        vec = be_msix_vec_get(adapter, adapter->rx_eq.q.id);
+        free_irq(vec, adapter);
+done:
+        adapter->isr_registered = false;
+        return;
+}
+
+static int be_open(struct net_device *netdev)
+{
+        struct be_adapter *adapter = netdev_priv(netdev);
+        struct be_ctrl_info *ctrl = &adapter->ctrl;
+        struct be_eq_obj *rx_eq = &adapter->rx_eq;
+        struct be_eq_obj *tx_eq = &adapter->tx_eq;
+        u32 if_flags;
+        int status;
+
+        if_flags = BE_IF_FLAGS_BROADCAST | BE_IF_FLAGS_PROMISCUOUS |
+                BE_IF_FLAGS_MCAST_PROMISCUOUS | BE_IF_FLAGS_UNTAGGED |
+                BE_IF_FLAGS_PASS_L3L4_ERRORS;
+        status = be_cmd_if_create(ctrl, if_flags, netdev->dev_addr,
+                        false/* pmac_invalid */, &adapter->if_handle,
+                        &adapter->pmac_id);
+        if (status != 0)
+                goto do_none;
+
+        be_vid_config(netdev);
+
+        status = be_cmd_set_flow_control(ctrl, true, true);
+        if (status != 0)
+                goto if_destroy;
+
+        status = be_tx_queues_create(adapter);
+        if (status != 0)
+                goto if_destroy;
+
+        status = be_rx_queues_create(adapter);
+        if (status != 0)
+                goto tx_qs_destroy;
+
+        /* First time posting */
+        be_post_rx_frags(adapter);
+
+        napi_enable(&rx_eq->napi);
+        napi_enable(&tx_eq->napi);
+
+        be_irq_register(adapter);
+
+        be_intr_set(ctrl, true);
+
+        /* The evt queues are created in the unarmed state; arm them */
+        be_eq_notify(ctrl, rx_eq->q.id, true, false, 0);
+        be_eq_notify(ctrl, tx_eq->q.id, true, false, 0);
+
+        /* The compl queues are created in the unarmed state; arm them */
+        be_cq_notify(ctrl, adapter->rx_obj.cq.id, true, 0);
+        be_cq_notify(ctrl, adapter->tx_obj.cq.id, true, 0);
+
+        be_link_status_update(adapter);
+
+        schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
+        return 0;
+
+tx_qs_destroy:
+        be_tx_queues_destroy(adapter);
+if_destroy:
+        be_cmd_if_destroy(ctrl, adapter->if_handle);
+do_none:
+        return status;
+}
+
+static int be_close(struct net_device *netdev)
+{
+        struct be_adapter *adapter = netdev_priv(netdev);
+        struct be_ctrl_info *ctrl = &adapter->ctrl;
+        struct be_eq_obj *rx_eq = &adapter->rx_eq;
+        struct be_eq_obj *tx_eq = &adapter->tx_eq;
+        int vec;
+
+        cancel_delayed_work(&adapter->work);
+
+        netif_stop_queue(netdev);
+        netif_carrier_off(netdev);
+        adapter->link.speed = PHY_LINK_SPEED_ZERO;
+
+        be_intr_set(ctrl, false);
+
+        if (adapter->msix_enabled) {
+                vec = be_msix_vec_get(adapter, tx_eq->q.id);
+                synchronize_irq(vec);
+                vec = be_msix_vec_get(adapter, rx_eq->q.id);
+                synchronize_irq(vec);
+        } else {
+                synchronize_irq(netdev->irq);
+        }
+        be_irq_unregister(adapter);
+
+        napi_disable(&rx_eq->napi);
+        napi_disable(&tx_eq->napi);
+
+        be_rx_queues_destroy(adapter);
+        be_tx_queues_destroy(adapter);
+
+        be_cmd_if_destroy(ctrl, adapter->if_handle);
+        return 0;
+}
+
+static int be_get_frag_header(struct skb_frag_struct *frag, void **mac_hdr,
+                                void **ip_hdr, void **tcpudp_hdr,
+                                u64 *hdr_flags, void *priv)
+{
+        struct ethhdr *eh;
+        struct vlan_ethhdr *veh;
+        struct iphdr *iph;
+        u8 *va = page_address(frag->page) + frag->page_offset;
+        unsigned long ll_hlen;
+
+        prefetch(va);
+        eh = (struct ethhdr *)va;
+        *mac_hdr = eh;
+        ll_hlen = ETH_HLEN;
+        if (eh->h_proto != htons(ETH_P_IP)) {
+                if (eh->h_proto == htons(ETH_P_8021Q)) {
+                        veh = (struct vlan_ethhdr *)va;
+                        if (veh->h_vlan_encapsulated_proto != htons(ETH_P_IP))
+                                return -1;
+
+                        ll_hlen += VLAN_HLEN;
+                } else {
+                        return -1;
+                }
+        }
+        *hdr_flags = LRO_IPV4;
+        iph = (struct iphdr *)(va + ll_hlen);
+        *ip_hdr = iph;
+        if (iph->protocol != IPPROTO_TCP)
+                return -1;
+        *hdr_flags |= LRO_TCP;
+        *tcpudp_hdr = (u8 *) (*ip_hdr) + (iph->ihl << 2);
+
+        return 0;
+}
+
+static void be_lro_init(struct be_adapter *adapter, struct net_device *netdev)
+{
+        struct net_lro_mgr *lro_mgr;
+
+        lro_mgr = &adapter->rx_obj.lro_mgr;
+        lro_mgr->dev = netdev;
+        lro_mgr->features = LRO_F_NAPI;
+        lro_mgr->ip_summed = CHECKSUM_UNNECESSARY;
+        lro_mgr->ip_summed_aggr = CHECKSUM_UNNECESSARY;
+        lro_mgr->max_desc = BE_MAX_LRO_DESCRIPTORS;
+        lro_mgr->lro_arr = adapter->rx_obj.lro_desc;
+        lro_mgr->get_frag_header = be_get_frag_header;
+        lro_mgr->max_aggr = BE_MAX_FRAGS_PER_FRAME;
+}
+
+static struct net_device_ops be_netdev_ops = {
+        .ndo_open               = be_open,
+        .ndo_stop               = be_close,
+        .ndo_start_xmit         = be_xmit,
+        .ndo_get_stats          = be_get_stats,
+        .ndo_set_rx_mode        = be_set_multicast_list,
+        .ndo_set_mac_address    = be_mac_addr_set,
+        .ndo_change_mtu         = be_change_mtu,
+        .ndo_validate_addr      = eth_validate_addr,
+        .ndo_vlan_rx_register   = be_vlan_register,
+        .ndo_vlan_rx_add_vid    = be_vlan_add_vid,
+        .ndo_vlan_rx_kill_vid   = be_vlan_rem_vid,
+};
+
+static void be_netdev_init(struct net_device *netdev)
+{
+        struct be_adapter *adapter = netdev_priv(netdev);
+
+        netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
+                NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_IP_CSUM |
+                NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
+
+        netdev->flags |= IFF_MULTICAST;
+
+        BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
+
+        SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
+
+        be_lro_init(adapter, netdev);
+
+        netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
+                BE_NAPI_WEIGHT);
+        netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx,
+                BE_NAPI_WEIGHT);
+
+        netif_carrier_off(netdev);
+        netif_stop_queue(netdev);
+}
+
+static void be_unmap_pci_bars(struct be_adapter *adapter)
+{
+        struct be_ctrl_info *ctrl = &adapter->ctrl;
+        if (ctrl->csr)
+                iounmap(ctrl->csr);
+        if (ctrl->db)
+                iounmap(ctrl->db);
+        if (ctrl->pcicfg)
+                iounmap(ctrl->pcicfg);
+}
+
+static int be_map_pci_bars(struct be_adapter *adapter)
+{
+        u8 __iomem *addr;
+
+        addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
+                        pci_resource_len(adapter->pdev, 2));
+        if (addr == NULL)
+                return -ENOMEM;
+        adapter->ctrl.csr = addr;
+
+        addr = ioremap_nocache(pci_resource_start(adapter->pdev, 4),
+                        128 * 1024);
+        if (addr == NULL)
+                goto pci_map_err;
+        adapter->ctrl.db = addr;
+
+        addr = ioremap_nocache(pci_resource_start(adapter->pdev, 1),
+                        pci_resource_len(adapter->pdev, 1));
+        if (addr == NULL)
+                goto pci_map_err;
+        adapter->ctrl.pcicfg = addr;
+
+        return 0;
+pci_map_err:
+        be_unmap_pci_bars(adapter);
+        return -ENOMEM;
+}
+
+
+static void be_ctrl_cleanup(struct be_adapter *adapter)
+{
+        struct be_dma_mem *mem = &adapter->ctrl.mbox_mem_alloced;
+
+        be_unmap_pci_bars(adapter);
+
+        if (mem->va)
+                pci_free_consistent(adapter->pdev, mem->size,
+                        mem->va, mem->dma);
+}
+
+/* Initialize the mbox required to send cmds to BE */
+static int be_ctrl_init(struct be_adapter *adapter)
+{
+        struct be_ctrl_info *ctrl = &adapter->ctrl;
+        struct be_dma_mem *mbox_mem_alloc = &ctrl->mbox_mem_alloced;
+        struct be_dma_mem *mbox_mem_align = &ctrl->mbox_mem;
+        int status;
+        u32 val;
+
+        status = be_map_pci_bars(adapter);
+        if (status)
+                return status;
+
+        mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
+        mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
+                                mbox_mem_alloc->size, &mbox_mem_alloc->dma);
+        if (!mbox_mem_alloc->va) {
+                be_unmap_pci_bars(adapter);
+                return -1;
+        }
+        mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
+        mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
+        mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
+        memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
+        spin_lock_init(&ctrl->cmd_lock);
+
+        val = ioread32(ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET);
+        ctrl->pci_func = (val >> MEMBAR_CTRL_INT_CTRL_PFUNC_SHIFT) &
+                                        MEMBAR_CTRL_INT_CTRL_PFUNC_MASK;
+        return 0;
+}
+
+static void be_stats_cleanup(struct be_adapter *adapter)
+{
+        struct be_stats_obj *stats = &adapter->stats;
+        struct be_dma_mem *cmd = &stats->cmd;
+
+        if (cmd->va)
+                pci_free_consistent(adapter->pdev, cmd->size,
+                        cmd->va, cmd->dma);
+}
+
+static int be_stats_init(struct be_adapter *adapter)
+{
+        struct be_stats_obj *stats = &adapter->stats;
+        struct be_dma_mem *cmd = &stats->cmd;
+
+        cmd->size = sizeof(struct be_cmd_req_get_stats);
+        cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
+        if (cmd->va == NULL)
+                return -1;
+        return 0;
+}
+
+static void __devexit be_remove(struct pci_dev *pdev)
+{
+        struct be_adapter *adapter = pci_get_drvdata(pdev);
+        if (!adapter)
+                return;
+
+        unregister_netdev(adapter->netdev);
+
+        be_stats_cleanup(adapter);
+
+        be_ctrl_cleanup(adapter);
+
+        if (adapter->msix_enabled) {
+                pci_disable_msix(adapter->pdev);
+                adapter->msix_enabled = false;
+        }
+
+        pci_set_drvdata(pdev, NULL);
+        pci_release_regions(pdev);
+        pci_disable_device(pdev);
+
+        free_netdev(adapter->netdev);
+}
+
+static int be_hw_up(struct be_adapter *adapter)
+{
+        struct be_ctrl_info *ctrl = &adapter->ctrl;
+        int status;
+
+        status = be_cmd_POST(ctrl);
+        if (status)
+                return status;
+
+        status = be_cmd_get_fw_ver(ctrl, adapter->fw_ver);
+        if (status)
+                return status;
+
+        status = be_cmd_query_fw_cfg(ctrl, &adapter->port_num);
+        return status;
+}
+
+static int __devinit be_probe(struct pci_dev *pdev,
+                        const struct pci_device_id *pdev_id)
+{
+        int status = 0;
+        struct be_adapter *adapter;
+        struct net_device *netdev;
+        struct be_ctrl_info *ctrl;
+        u8 mac[ETH_ALEN];
+
+        status = pci_enable_device(pdev);
+        if (status)
+                goto do_none;
+
+        status = pci_request_regions(pdev, DRV_NAME);
+        if (status)
+                goto disable_dev;
+        pci_set_master(pdev);
+
+        netdev = alloc_etherdev(sizeof(struct be_adapter));
+        if (netdev == NULL) {
+                status = -ENOMEM;
+                goto rel_reg;
+        }
+        adapter = netdev_priv(netdev);
+        adapter->pdev = pdev;
+        pci_set_drvdata(pdev, adapter);
+        adapter->netdev = netdev;
+
+        be_msix_enable(adapter);
+
+        status = pci_set_dma_mask(pdev, DMA_64BIT_MASK);
+        if (!status) {
+                netdev->features |= NETIF_F_HIGHDMA;
+        } else {
+                status = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
+                if (status) {
+                        dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
+                        goto free_netdev;
+                }
+        }
+
+        ctrl = &adapter->ctrl;
+        status = be_ctrl_init(adapter);
+        if (status)
+                goto free_netdev;
+
+        status = be_stats_init(adapter);
+        if (status)
+                goto ctrl_clean;
+
+        status = be_hw_up(adapter);
+        if (status)
+                goto stats_clean;
+
+        status = be_cmd_mac_addr_query(ctrl, mac, MAC_ADDRESS_TYPE_NETWORK,
+                        true /* permanent */, 0);
+        if (status)
+                goto stats_clean;
+        memcpy(netdev->dev_addr, mac, ETH_ALEN);
+
+        INIT_DELAYED_WORK(&adapter->work, be_worker);
+        be_netdev_init(netdev);
+        SET_NETDEV_DEV(netdev, &adapter->pdev->dev);
+
+        status = register_netdev(netdev);
+        if (status != 0)
+                goto stats_clean;
+
+        dev_info(&pdev->dev, BE_NAME " port %d\n", adapter->port_num);
+        return 0;
+
+stats_clean:
+        be_stats_cleanup(adapter);
+ctrl_clean:
+        be_ctrl_cleanup(adapter);
+free_netdev:
+        free_netdev(adapter->netdev);
+rel_reg:
+        pci_release_regions(pdev);
+disable_dev:
+        pci_disable_device(pdev);
+do_none:
+        dev_warn(&pdev->dev, BE_NAME " initialization failed\n");
+        return status;
+}
+
+static int be_suspend(struct pci_dev *pdev, pm_message_t state)
+{
+        struct be_adapter *adapter = pci_get_drvdata(pdev);
+        struct net_device *netdev =  adapter->netdev;
+
+        netif_device_detach(netdev);
+        if (netif_running(netdev)) {
+                rtnl_lock();
+                be_close(netdev);
+                rtnl_unlock();
+        }
+
+        pci_save_state(pdev);
+        pci_disable_device(pdev);
+        pci_set_power_state(pdev, pci_choose_state(pdev, state));
+        return 0;
+}
+
+static int be_resume(struct pci_dev *pdev)
+{
+        int status = 0;
+        struct be_adapter *adapter = pci_get_drvdata(pdev);
+        struct net_device *netdev =  adapter->netdev;
+
+        netif_device_detach(netdev);
+
+        status = pci_enable_device(pdev);
+        if (status)
+                return status;
+
+        pci_set_power_state(pdev, 0);
+        pci_restore_state(pdev);
+
+        if (netif_running(netdev)) {
+                rtnl_lock();
+                be_open(netdev);
+                rtnl_unlock();
+        }
+        netif_device_attach(netdev);
+        return 0;
+}
+
+static struct pci_driver be_driver = {
+        .name = DRV_NAME,
+        .id_table = be_dev_ids,
+        .probe = be_probe,
+        .remove = be_remove,
+        .suspend = be_suspend,
+        .resume = be_resume
+};
+
+static int __init be_init_module(void)
+{
+        if (rx_frag_size != 8192 && rx_frag_size != 4096
+                && rx_frag_size != 2048) {
+                printk(KERN_WARNING DRV_NAME
+                        " : Module param rx_frag_size must be 2048/4096/8192."
+                        " Using 2048\n");
+                rx_frag_size = 2048;
+        }
+        /* Ensure rx_frag_size is aligned to chache line */
+        if (SKB_DATA_ALIGN(rx_frag_size) != rx_frag_size) {
+                printk(KERN_WARNING DRV_NAME
+                        " : Bad module param rx_frag_size. Using 2048\n");
+                rx_frag_size = 2048;
+        }
+
+        return pci_register_driver(&be_driver);
+}
+module_init(be_init_module);
+
+static void __exit be_exit_module(void)
+{
+        pci_unregister_driver(&be_driver);
+}
+module_exit(be_exit_module);
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index d4a3dac21dcf..6b6530ffdf19 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -1,6 +1,6 @@
 /* bnx2.c: Broadcom NX2 network driver.
  *
- * Copyright (c) 2004-2008 Broadcom Corporation
+ * Copyright (c) 2004-2009 Broadcom Corporation
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -57,8 +57,8 @@
 
 #define DRV_MODULE_NAME         "bnx2"
 #define PFX DRV_MODULE_NAME     ": "
-#define DRV_MODULE_VERSION      "1.9.0"
-#define DRV_MODULE_RELDATE      "Dec 16, 2008"
+#define DRV_MODULE_VERSION      "1.9.3"
+#define DRV_MODULE_RELDATE      "March 17, 2009"
 
 #define RUN_AT(x) (jiffies + (x))
 
@@ -2910,18 +2910,8 @@ bnx2_rx_int(struct bnx2 *bp, struct bnx2_napi *bnapi, int budget)
 
                 rx_hdr = (struct l2_fhdr *) skb->data;
                 len = rx_hdr->l2_fhdr_pkt_len;
+                status = rx_hdr->l2_fhdr_status;
 
-                if ((status = rx_hdr->l2_fhdr_status) &
-                        (L2_FHDR_ERRORS_BAD_CRC |
-                        L2_FHDR_ERRORS_PHY_DECODE |
-                        L2_FHDR_ERRORS_ALIGNMENT |
-                        L2_FHDR_ERRORS_TOO_SHORT |
-                        L2_FHDR_ERRORS_GIANT_FRAME)) {
-
-                        bnx2_reuse_rx_skb(bp, rxr, skb, sw_ring_cons,
-                                          sw_ring_prod);
-                        goto next_rx;
-                }
                 hdr_len = 0;
                 if (status & L2_FHDR_STATUS_SPLIT) {
                         hdr_len = rx_hdr->l2_fhdr_ip_xsum;
@@ -2931,6 +2921,24 @@ bnx2_rx_int(struct bnx2 *bp, struct bnx2_napi *bnapi, int budget)
                         pg_ring_used = 1;
                 }
 
+                if (unlikely(status & (L2_FHDR_ERRORS_BAD_CRC |
+                                       L2_FHDR_ERRORS_PHY_DECODE |
+                                       L2_FHDR_ERRORS_ALIGNMENT |
+                                       L2_FHDR_ERRORS_TOO_SHORT |
+                                       L2_FHDR_ERRORS_GIANT_FRAME))) {
+
+                        bnx2_reuse_rx_skb(bp, rxr, skb, sw_ring_cons,
+                                          sw_ring_prod);
+                        if (pg_ring_used) {
+                                int pages;
+
+                                pages = PAGE_ALIGN(len - hdr_len) >> PAGE_SHIFT;
+
+                                bnx2_reuse_rx_skb_pages(bp, rxr, NULL, pages);
+                        }
+                        goto next_rx;
+                }
+
                 len -= 4;
 
                 if (len <= bp->rx_copy_thresh) {
@@ -5835,9 +5843,6 @@ bnx2_enable_msix(struct bnx2 *bp, int msix_vecs)
         for (i = 0; i < BNX2_MAX_MSIX_VEC; i++) {
                 msix_ent[i].entry = i;
                 msix_ent[i].vector = 0;
-
-                snprintf(bp->irq_tbl[i].name, len, "%s-%d", dev->name, i);
-                bp->irq_tbl[i].handler = bnx2_msi_1shot;
         }
 
         rc = pci_enable_msix(bp->pdev, msix_ent, BNX2_MAX_MSIX_VEC);
@@ -5846,8 +5851,11 @@ bnx2_enable_msix(struct bnx2 *bp, int msix_vecs)
 
         bp->irq_nvecs = msix_vecs;
         bp->flags |= BNX2_FLAG_USING_MSIX | BNX2_FLAG_ONE_SHOT_MSI;
-        for (i = 0; i < BNX2_MAX_MSIX_VEC; i++)
+        for (i = 0; i < BNX2_MAX_MSIX_VEC; i++) {
                 bp->irq_tbl[i].vector = msix_ent[i].vector;
+                snprintf(bp->irq_tbl[i].name, len, "%s-%d", dev->name, i);
+                bp->irq_tbl[i].handler = bnx2_msi_1shot;
+        }
 }
 
 static void
diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h
index 900641ac63e0..704cbbcbf97a 100644
--- a/drivers/net/bnx2.h
+++ b/drivers/net/bnx2.h
@@ -1,6 +1,6 @@
 /* bnx2.h: Broadcom NX2 network driver.
  *
- * Copyright (c) 2004-2007 Broadcom Corporation
+ * Copyright (c) 2004-2009 Broadcom Corporation
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
diff --git a/drivers/net/bnx2_fw.h b/drivers/net/bnx2_fw.h
index 24c3cc40c23d..6a4f1d695de7 100644
--- a/drivers/net/bnx2_fw.h
+++ b/drivers/net/bnx2_fw.h
@@ -15,854 +15,849 @@
  */
 
 static u8 bnx2_COM_b06FwText[] = {
-        0xcd, 0x7c, 0x0d, 0x70, 0x5b, 0xd7, 0x95, 0xde, 0xc1, 0x03, 0x40, 0x82,
-        0x10, 0x45, 0x3d, 0x52, 0x30, 0x0d, 0x3b, 0x4c, 0x82, 0x47, 0x3c, 0x92,
-        0xb0, 0xc9, 0x64, 0x9f, 0x64, 0x46, 0x66, 0x12, 0xac, 0x05, 0x03, 0xa4,
-        0x4c, 0x27, 0xea, 0x92, 0xb6, 0x19, 0x47, 0x6d, 0x35, 0x09, 0x17, 0x92,
-        0x12, 0xdb, 0x4d, 0xa7, 0x9a, 0xc6, 0xe9, 0x2a, 0x1b, 0xc7, 0x82, 0x41,
-        0xca, 0x51, 0x52, 0x8a, 0x60, 0x24, 0x4a, 0xf2, 0x74, 0xb3, 0xbb, 0x0c,
-        0x48, 0x4a, 0x8e, 0x03, 0x09, 0x96, 0xec, 0x75, 0xdc, 0xad, 0xb3, 0x62,
-        0x68, 0xad, 0xec, 0x4d, 0xb3, 0xad, 0x9d, 0x49, 0x3a, 0x9a, 0xa9, 0xb7,
-        0x55, 0x95, 0xa4, 0xf9, 0x99, 0xfe, 0xb8, 0x49, 0xa6, 0x75, 0xbb, 0xf1,
-        0xbe, 0x7e, 0xdf, 0x7d, 0xf7, 0x11, 0x20, 0xc5, 0x28, 0xde, 0xec, 0x64,
-        0x66, 0x39, 0x83, 0xb9, 0xef, 0xde, 0x77, 0x7f, 0xce, 0x3d, 0xf7, 0xfc,
-        0x7c, 0xe7, 0xde, 0xfb, 0x78, 0x87, 0x48, 0x54, 0xf4, 0xdf, 0x46, 0xfc,
-        0xfa, 0xff, 0xe9, 0x3f, 0xdb, 0xb3, 0xf5, 0xdd, 0xfd, 0xef, 0x66, 0xde,
-        0x30, 0x42, 0x21, 0xa6, 0x41, 0xfc, 0x62, 0xf8, 0x6d, 0xd5, 0xcf, 0xeb,
-        0xfd, 0x99, 0xf8, 0x6d, 0x0b, 0x88, 0x8c, 0xff, 0x44, 0x24, 0xb0, 0xe6,
-        0x5d, 0x64, 0x9d, 0xfa, 0xae, 0xfb, 0x4b, 0x3a, 0xd2, 0x7f, 0x06, 0x7e,
-        0x89, 0xeb, 0x57, 0x59, 0x19, 0xf7, 0xd7, 0xfd, 0x0b, 0xea, 0xe6, 0x1b,
-        0xf5, 0x4f, 0x22, 0x46, 0x5a, 0x46, 0xb2, 0xb6, 0x44, 0x82, 0xe9, 0x9f,
-        0x8f, 0xec, 0xb1, 0x45, 0x32, 0x95, 0xde, 0x44, 0x4e, 0xde, 0x74, 0x0b,
-        0xb1, 0x90, 0xb0, 0xfc, 0xed, 0xe9, 0x5f, 0x1c, 0xfc, 0xfa, 0xed, 0xd6,
-        0xeb, 0x73, 0x41, 0x89, 0x98, 0xe9, 0x37, 0xc4, 0xec, 0x96, 0x48, 0x07,
-        0xda, 0x7c, 0xa9, 0xe7, 0x49, 0x43, 0x5a, 0xfc, 0xbe, 0xcc, 0xf1, 0x60,
-        0x5a, 0x46, 0xf7, 0x4e, 0x1d, 0x74, 0x0d, 0x5b, 0x0a, 0x37, 0xa7, 0xed,
-        0x44, 0x51, 0x9a, 0x07, 0x26, 0xfb, 0x6f, 0x17, 0xe4, 0x47, 0xf7, 0x56,
-        0x22, 0x92, 0xad, 0x16, 0x9a, 0x0d, 0xdb, 0x46, 0x1a, 0x29, 0xbc, 0x2d,
-        0x2d, 0x91, 0x86, 0xf4, 0x6c, 0xe3, 0x25, 0x9b, 0xe3, 0x0f, 0x60, 0xfc,
-        0xb7, 0x49, 0xc8, 0x76, 0xdd, 0x49, 0x8c, 0xbf, 0xa3, 0xf2, 0xa6, 0xfb,
-        0x58, 0xc8, 0x1b, 0xdb, 0x48, 0x1f, 0x08, 0x32, 0x0d, 0xa4, 0x33, 0x23,
-        0x9d, 0x15, 0x95, 0x6f, 0xf0, 0xf2, 0x83, 0x3a, 0x1f, 0x89, 0x7a, 0xb4,
-        0x4b, 0x13, 0x68, 0x8f, 0x84, 0xd2, 0xe9, 0x26, 0xf4, 0x11, 0x09, 0xa7,
-        0x97, 0x7e, 0x7b, 0x51, 0xd5, 0x3b, 0xac, 0xeb, 0x3d, 0x10, 0xf6, 0xda,
-        0x4d, 0x8e, 0x74, 0x57, 0x98, 0xce, 0x8e, 0x74, 0xa9, 0xf4, 0x4b, 0x23,
-        0x49, 0x95, 0xce, 0xa9, 0x7a, 0x81, 0xf4, 0xc2, 0x88, 0xad, 0xd2, 0xb4,
-        0x2e, 0x1f, 0x1e, 0x49, 0xa8, 0x74, 0xa7, 0x4e, 0x47, 0x75, 0x3a, 0xa6,
-        0xd3, 0x5d, 0x3a, 0xdd, 0xad, 0xd3, 0x71, 0x9d, 0xee, 0xd5, 0xfd, 0x3c,
-        0xa0, 0xf3, 0x9f, 0xd0, 0xe9, 0x7e, 0x9d, 0x3e, 0xac, 0xd3, 0x03, 0x3a,
-        0x7d, 0x44, 0xd3, 0x55, 0xd0, 0xe9, 0x94, 0x2e, 0x9f, 0xd1, 0x74, 0x3e,
-        0x01, 0x7a, 0xfe, 0x71, 0xa3, 0x96, 0x5b, 0xcc, 0x37, 0x21, 0x7b, 0xa6,
-        0x22, 0x52, 0x2c, 0x05, 0x25, 0xa7, 0xd6, 0xf3, 0xe3, 0x61, 0x89, 0x46,
-        0x64, 0xa2, 0x1a, 0x91, 0x2b, 0x4a, 0x5c, 0x7f, 0xe4, 0x7e, 0xbd, 0xc7,
-        0x94, 0xa7, 0xab, 0x31, 0xb9, 0x50, 0x95, 0xc0, 0x68, 0x4f, 0x93, 0x18,
-        0x47, 0x6f, 0x96, 0x8c, 0x19, 0x90, 0xa0, 0xe2, 0x6b, 0x42, 0xb2, 0x53,
-        0xed, 0xc8, 0x5b, 0x71, 0x91, 0xc5, 0xb0, 0xb7, 0x8e, 0x11, 0x09, 0x9e,
-        0xe0, 0xba, 0x3c, 0x37, 0x72, 0x69, 0x36, 0x2e, 0xa1, 0xe9, 0x04, 0xfa,
-        0x6f, 0x96, 0xf0, 0x09, 0xe9, 0x08, 0x4a, 0x57, 0xfc, 0x63, 0xa8, 0x31,
-        0x58, 0x09, 0xc9, 0x50, 0x25, 0x80, 0xb5, 0x8a, 0x40, 0x4e, 0x9a, 0xf1,
-        0x33, 0xf1, 0x8b, 0xe1, 0x17, 0xc7, 0xef, 0xaf, 0xd0, 0x4f, 0x87, 0xe4,
-        0x2a, 0xec, 0x13, 0xe3, 0x96, 0x30, 0x7e, 0xc9, 0x32, 0xc7, 0x85, 0x34,
-        0xc5, 0xe5, 0xeb, 0x3d, 0x1e, 0x4d, 0x17, 0xaa, 0x91, 0x40, 0xf6, 0xa4,
-        0xec, 0xcf, 0x39, 0x92, 0x30, 0xec, 0xa8, 0xe4, 0xcd, 0x40, 0x62, 0x6f,
-        0xaa, 0x4d, 0x0a, 0x63, 0x78, 0x57, 0x92, 0x8c, 0x81, 0xbe, 0xf3, 0xa6,
-        0x8c, 0x7b, 0xef, 0x58, 0xf6, 0x7f, 0xa1, 0xaf, 0x96, 0x49, 0xc1, 0xbd,
-        0x50, 0xfa, 0xd7, 0x78, 0x66, 0x5f, 0x2f, 0x86, 0x3c, 0x9a, 0xdf, 0x40,
-        0x9e, 0xe5, 0xee, 0x26, 0x2f, 0xcf, 0x67, 0xd6, 0xf5, 0xc7, 0xf4, 0xe7,
-        0xca, 0xb1, 0x7b, 0x30, 0x5f, 0x8e, 0xbf, 0x32, 0x5f, 0xd0, 0xd1, 0x1c,
-        0xc8, 0x9d, 0x4c, 0xc8, 0xa1, 0xd2, 0x1d, 0x92, 0x75, 0x5c, 0x77, 0x8f,
-        0x23, 0x31, 0x43, 0xba, 0xcc, 0x1c, 0xde, 0x96, 0x2b, 0x12, 0xc8, 0x96,
-        0x7c, 0x7e, 0xb0, 0xdf, 0x10, 0xca, 0xda, 0x51, 0xbf, 0x25, 0x30, 0x78,
-        0x12, 0xb4, 0xa7, 0xc9, 0x17, 0xc8, 0xac, 0xd3, 0x15, 0xdf, 0x8b, 0xf1,
-        0xe6, 0x2b, 0x5d, 0xce, 0xb2, 0x98, 0xe8, 0xb3, 0x0d, 0x75, 0xc8, 0x23,
-        0xf6, 0xc5, 0x3e, 0xd9, 0x5f, 0x33, 0xda, 0xc6, 0xf0, 0x8e, 0x34, 0xb9,
-        0x6e, 0xd6, 0x31, 0x99, 0x97, 0x39, 0xf0, 0x6d, 0x8e, 0x7c, 0x8b, 0x76,
-        0xc8, 0xa9, 0x0a, 0xc7, 0x58, 0x8f, 0xee, 0x5b, 0xff, 0x9e, 0xd1, 0x1d,
-        0x47, 0xff, 0x31, 0xa4, 0x1b, 0x02, 0xd9, 0x63, 0x2e, 0xc6, 0x8f, 0xe3,
-        0x79, 0xbd, 0x39, 0x5c, 0xd1, 0x32, 0x18, 0x07, 0xed, 0x31, 0x39, 0xa7,
-        0xe4, 0x70, 0x83, 0x04, 0x21, 0x87, 0x5c, 0xe3, 0xd6, 0x13, 0xef, 0x91,
-        0x7c, 0xcc, 0x4a, 0xd0, 0x76, 0x76, 0x6e, 0x6d, 0xc2, 0x1c, 0xb5, 0x15,
-        0x9c, 0x8e, 0x41, 0x0e, 0x97, 0x5b, 0x0d, 0x94, 0x18, 0x62, 0x99, 0xff,
-        0x48, 0x0a, 0x92, 0x5b, 0xf8, 0xbd, 0x80, 0x44, 0x0d, 0xd4, 0xbb, 0x25,
-        0xe0, 0xf1, 0x80, 0xfc, 0xc9, 0x80, 0x3f, 0x01, 0xd1, 0xf6, 0x41, 0x3a,
-        0x2b, 0x7c, 0xdf, 0x9b, 0x30, 0xd4, 0xbb, 0x41, 0xbc, 0x0b, 0x49, 0x72,
-        0xab, 0xff, 0x7e, 0x10, 0xef, 0x6f, 0x96, 0x71, 0x13, 0xb4, 0x94, 0x9e,
-        0x37, 0xb2, 0xa0, 0xf1, 0xce, 0x90, 0x9a, 0x2b, 0xea, 0x8e, 0xd7, 0xf5,
-        0x33, 0x8e, 0x7a, 0xff, 0x0a, 0x63, 0x81, 0xde, 0x52, 0x02, 0xb4, 0xb4,
-        0x83, 0x16, 0xd2, 0x58, 0x30, 0xb2, 0xd5, 0x10, 0xf2, 0x93, 0x46, 0xee,
-        0xf4, 0x61, 0x3c, 0x8b, 0x69, 0xa4, 0x9f, 0x67, 0x8a, 0xf6, 0xbb, 0xeb,
-        0xda, 0xef, 0x46, 0x7b, 0x8e, 0xc1, 0xf6, 0x9e, 0xfc, 0x17, 0x94, 0x2c,
-        0x26, 0xae, 0xc3, 0x8f, 0xe0, 0xaf, 0xc1, 0x8f, 0x7f, 0xa3, 0xf9, 0xf1,
-        0xd7, 0xf2, 0x9b, 0xe7, 0xc7, 0x7f, 0xfa, 0x0d, 0xf1, 0x43, 0x24, 0x7f,
-        0x8c, 0xcf, 0x21, 0x29, 0x28, 0xbb, 0x45, 0xbd, 0xa5, 0xbc, 0xd3, 0x66,
-        0x91, 0x4f, 0x94, 0x63, 0xe8, 0x40, 0x35, 0x84, 0xf4, 0x49, 0xa4, 0x1b,
-        0x02, 0xa3, 0xc7, 0xae, 0x62, 0xfd, 0x5d, 0x31, 0xb7, 0xfa, 0x7e, 0xa3,
-        0x10, 0x37, 0xa5, 0x43, 0xcc, 0x77, 0xc3, 0x69, 0xb7, 0x5b, 0x66, 0x5e,
-        0x7e, 0x80, 0xf7, 0x6f, 0x06, 0x7c, 0xff, 0x9e, 0x9d, 0x6a, 0x7a, 0x23,
-        0xa3, 0x9e, 0xc2, 0xe4, 0x67, 0xc6, 0x48, 0x87, 0x02, 0xb9, 0x52, 0x62,
-        0xdc, 0x48, 0xc7, 0x60, 0xa7, 0x98, 0x1f, 0x08, 0x78, 0x34, 0xf7, 0xa3,
-        0xae, 0x6f, 0xb3, 0x7c, 0xda, 0xfb, 0x41, 0xfb, 0x5a, 0xdb, 0x95, 0x01,
-        0x2d, 0xa4, 0x81, 0x74, 0x15, 0x82, 0x9a, 0xf7, 0xe8, 0xe7, 0x80, 0xea,
-        0x27, 0x98, 0x1e, 0x10, 0xfa, 0xd0, 0xfc, 0x14, 0xf5, 0x80, 0xed, 0xd8,
-        0x97, 0x67, 0x93, 0xf3, 0x15, 0xbf, 0x8f, 0x42, 0x7d, 0x1f, 0xa0, 0x47,
-        0x36, 0x19, 0x76, 0x18, 0x6b, 0xcf, 0xae, 0x0e, 0xe3, 0xdd, 0x97, 0x24,
-        0x7b, 0xfa, 0x76, 0x03, 0x73, 0x40, 0xbf, 0xe4, 0xd1, 0x28, 0x6c, 0x36,
-        0xf5, 0x2c, 0x22, 0xb9, 0x18, 0xcb, 0x3e, 0xa2, 0xc7, 0x0d, 0x49, 0x46,
-        0xe5, 0xbf, 0xd2, 0x52, 0xa3, 0xe3, 0x79, 0x3d, 0x9f, 0x34, 0xe6, 0x43,
-        0x1a, 0xfc, 0xb9, 0xa4, 0xeb, 0xe6, 0xe2, 0xf3, 0x9a, 0xbc, 0x30, 0x61,
-        0xe3, 0x23, 0xda, 0x87, 0xb0, 0xdd, 0x64, 0xdd, 0xda, 0x4d, 0xa2, 0x0d,
-        0x79, 0x8f, 0x3a, 0x6b, 0xfc, 0x0a, 0x7d, 0xca, 0x20, 0xfa, 0x29, 0xce,
-        0x1a, 0x92, 0x73, 0xe0, 0xab, 0x9d, 0xb7, 0x69, 0x79, 0xad, 0xc9, 0x52,
-        0x78, 0x5d, 0x59, 0x3a, 0x68, 0x78, 0xf6, 0x1a, 0xbe, 0x05, 0xfe, 0x67,
-        0x62, 0xd6, 0x4a, 0xf9, 0xb2, 0x54, 0x9c, 0x7a, 0x2b, 0xb2, 0xe4, 0xb7,
-        0x8f, 0x40, 0x76, 0xfd, 0x31, 0xd6, 0xd2, 0xec, 0xd7, 0x01, 0x8d, 0xa5,
-        0xac, 0xc6, 0x28, 0x1c, 0xc7, 0xf3, 0x0d, 0x73, 0xab, 0x7c, 0xc3, 0x61,
-        0xb4, 0x95, 0x40, 0xae, 0xa7, 0x59, 0xf6, 0xcd, 0xfa, 0x7d, 0x1c, 0x56,
-        0x32, 0xbb, 0x77, 0xca, 0x32, 0x87, 0x82, 0x92, 0x19, 0x9a, 0x19, 0x90,
-        0xc1, 0x6a, 0x07, 0xd6, 0xf4, 0x0d, 0x17, 0xbe, 0xf3, 0xdd, 0x61, 0xb1,
-        0x61, 0x17, 0x31, 0xe7, 0x7e, 0xf0, 0xb8, 0x1a, 0x16, 0x23, 0xed, 0x20,
-        0xad, 0xc7, 0x58, 0xa1, 0xd0, 0xd0, 0xaa, 0x7c, 0x03, 0xea, 0xa0, 0xef,
-        0xfe, 0xb5, 0xf5, 0x20, 0x9f, 0xe0, 0x6d, 0xd6, 0x79, 0xd3, 0x85, 0x1f,
-        0xd6, 0x3e, 0x8b, 0xa5, 0xb4, 0x13, 0xbe, 0x8d, 0xf8, 0x10, 0xf4, 0x5b,
-        0xe9, 0x42, 0xc1, 0x48, 0xef, 0x47, 0x1f, 0xa2, 0xe4, 0xb4, 0x58, 0x7d,
-        0xda, 0xd7, 0x7b, 0x55, 0xbe, 0xa3, 0x9f, 0xb2, 0x37, 0x07, 0x4c, 0xc0,
-        0x39, 0x2d, 0x28, 0x5d, 0xcf, 0x99, 0x31, 0x99, 0x2c, 0x29, 0x4c, 0x23,
-        0xc9, 0xca, 0x1f, 0x49, 0xee, 0xb4, 0xc8, 0x37, 0xa7, 0x58, 0xef, 0x05,
-        0x5d, 0xef, 0x79, 0xd4, 0x4b, 0x26, 0x06, 0x03, 0x16, 0xfc, 0x80, 0x05,
-        0x35, 0xe9, 0x4d, 0x20, 0x35, 0x87, 0xf1, 0x1b, 0xa4, 0x93, 0x41, 0x3d,
-        0x0f, 0x03, 0x3d, 0x0f, 0x7e, 0x88, 0xdc, 0x53, 0x6a, 0x84, 0x3d, 0xf9,
-        0x2f, 0xa0, 0x35, 0x26, 0x5f, 0xc0, 0x3c, 0x2e, 0x4d, 0x11, 0x67, 0xbd,
-        0x20, 0x8b, 0x53, 0xc4, 0x5d, 0xcf, 0xcb, 0xe4, 0x54, 0xd2, 0xf9, 0x26,
-        0xf8, 0x7c, 0x4a, 0x38, 0x97, 0x5e, 0x07, 0x29, 0x30, 0xa0, 0x95, 0x78,
-        0x1c, 0xf6, 0xac, 0x67, 0xab, 0xd7, 0x5f, 0x97, 0xee, 0xcf, 0xae, 0x58,
-        0x72, 0xc5, 0xa4, 0x7d, 0xba, 0x56, 0xc7, 0xb3, 0x5a, 0xc7, 0x47, 0x9d,
-        0x0e, 0x31, 0xa0, 0xd7, 0x99, 0xb1, 0x02, 0xbc, 0x1f, 0xf5, 0xfa, 0x7f,
-        0x1b, 0x35, 0xfc, 0x33, 0x00, 0xac, 0x6a, 0x29, 0x7f, 0xf7, 0xb7, 0xd3,
-        0xf1, 0x7a, 0xdd, 0xe6, 0xf8, 0x2d, 0x68, 0x13, 0x42, 0x7a, 0x7d, 0xbd,
-        0x46, 0x1f, 0x75, 0x6d, 0x07, 0xa8, 0x17, 0x68, 0xf3, 0x07, 0xe0, 0x05,
-        0xf9, 0xff, 0x56, 0xf4, 0xb9, 0x37, 0xf8, 0x96, 0xf4, 0x79, 0xec, 0x7a,
-        0xfa, 0x5c, 0xaf, 0xcb, 0x67, 0xc9, 0x0b, 0x8c, 0x2d, 0x33, 0x9e, 0x6c,
-        0x75, 0x81, 0xd7, 0x09, 0xc8, 0x29, 0x68, 0x28, 0xfd, 0x8d, 0x9b, 0x09,
-        0x79, 0x78, 0xce, 0x93, 0x27, 0xd6, 0xf3, 0xeb, 0x78, 0xb6, 0x77, 0xb0,
-        0x7a, 0x45, 0xd9, 0xd9, 0x73, 0xca, 0xce, 0x5a, 0x87, 0x0b, 0x42, 0x79,
-        0xbb, 0x2d, 0x48, 0xbe, 0x3f, 0xed, 0x7c, 0x16, 0x34, 0x5a, 0x89, 0x84,
-        0xd1, 0x55, 0x30, 0x8c, 0xcf, 0xca, 0xfe, 0xf9, 0x87, 0x65, 0x7f, 0x89,
-        0x7d, 0xa4, 0xf1, 0xde, 0x46, 0x59, 0x13, 0x6c, 0x2d, 0x6d, 0xfa, 0x1b,
-        0x01, 0x6f, 0x2c, 0x03, 0xfe, 0x6b, 0x29, 0x70, 0x4f, 0xf5, 0x62, 0x20,
-        0x3b, 0x4f, 0xdd, 0x45, 0x79, 0xb5, 0xde, 0xe6, 0xfb, 0xf6, 0xbe, 0x66,
-        0xff, 0x06, 0x4b, 0x93, 0xc4, 0x80, 0x46, 0xd6, 0xe1, 0x9a, 0x51, 0x37,
-        0x2f, 0x98, 0xde, 0x9c, 0x3f, 0x09, 0x3e, 0x51, 0xaf, 0xc9, 0x37, 0xf8,
-        0xc0, 0x10, 0x75, 0x96, 0xcf, 0xe2, 0x06, 0xd3, 0xd4, 0x3b, 0x09, 0x05,
-        0x41, 0x46, 0x2e, 0xc6, 0x3a, 0x77, 0x80, 0xce, 0xb5, 0x3a, 0xcd, 0x75,
-        0x14, 0x6d, 0x43, 0x58, 0x36, 0x80, 0xe7, 0x4e, 0x19, 0x9f, 0xcf, 0x60,
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+        0x46, 0x7e, 0x28, 0x8e, 0x24, 0x6f, 0xa4, 0xac, 0xb0, 0xdf, 0x49, 0xae,
+        0x33, 0xf1, 0x90, 0x5a, 0xa7, 0x0d, 0x3f, 0x92, 0x77, 0x2d, 0xec, 0x50,
+        0x75, 0x8e, 0x7c, 0x47, 0xba, 0xc8, 0x67, 0x73, 0xde, 0xab, 0xf4, 0x0a,
+        0xc6, 0x65, 0x19, 0x75, 0x23, 0xdf, 0x67, 0xf4, 0x79, 0x70, 0x7b, 0x07,
+        0xef, 0x24, 0x14, 0x50, 0x56, 0x59, 0xdc, 0x78, 0x6e, 0xbf, 0xad, 0xe4,
+        0xe0, 0x51, 0xd0, 0xfd, 0x9f, 0xa1, 0xee, 0x63, 0x48, 0xb9, 0xc6, 0xcc,
+        0x0a, 0xdf, 0x49, 0xef, 0x8f, 0xca, 0x20, 0xe4, 0x82, 0xf9, 0x47, 0x81,
+        0x37, 0x69, 0x4f, 0x91, 0x56, 0xf8, 0x4c, 0x5d, 0xef, 0x6a, 0x7b, 0xca,
+        0xb9, 0xec, 0xc3, 0x5c, 0xd4, 0x3a, 0xb5, 0x3c, 0xdd, 0xaf, 0xdb, 0x8d,
+        0xaf, 0xd0, 0xea, 0xa1, 0x77, 0xe0, 0x8d, 0xe8, 0x0a, 0xde, 0x08, 0xc6,
+        0xca, 0x76, 0x18, 0xac, 0x11, 0xac, 0x21, 0xc0, 0x1a, 0x81, 0x9c, 0x4f,
+        0x4a, 0x04, 0x72, 0x1c, 0x5e, 0x95, 0x63, 0xe0, 0x9e, 0x60, 0xcf, 0x4c,
+        0xf1, 0x1c, 0x53, 0xd1, 0x99, 0x72, 0x48, 0xf9, 0x25, 0x1f, 0x1b, 0x79,
+        0x7d, 0xfb, 0xbb, 0xf0, 0xba, 0xd4, 0x61, 0xf0, 0xc3, 0x3f, 0x6c, 0x1f,
+        0x3c, 0xd2, 0xb1, 0xba, 0x0f, 0x6e, 0xfa, 0x05, 0xed, 0x83, 0xf5, 0x72,
+        0xd9, 0x28, 0x53, 0x36, 0xe4, 0x89, 0xfc, 0xa2, 0x3c, 0x51, 0x8e, 0x48,
+        0x4b, 0xea, 0xd3, 0x66, 0xfa, 0x6f, 0x89, 0xab, 0xea, 0xdb, 0x91, 0x69,
+        0xe8, 0xa0, 0x8e, 0x50, 0xa5, 0x12, 0x97, 0xd2, 0xe2, 0x4f, 0x94, 0x4c,
+        0x3f, 0x5b, 0xa7, 0x5e, 0x7a, 0xaf, 0xb5, 0xaf, 0xd5, 0xb9, 0x85, 0x75,
+        0x3a, 0xb7, 0xb0, 0xa2, 0x73, 0xdb, 0xb5, 0xcf, 0xf6, 0x0f, 0xd1, 0xb9,
+        0xf1, 0x86, 0xb3, 0x21, 0x73, 0x2e, 0x24, 0xa1, 0x5c, 0x5f, 0x8b, 0xec,
+        0x81, 0x1d, 0x19, 0x99, 0xd9, 0x2b, 0x7f, 0x30, 0x33, 0xad, 0xee, 0x49,
+        0x7d, 0xd3, 0x4b, 0x25, 0x3e, 0x11, 0xf2, 0xe5, 0xa3, 0xf0, 0xb9, 0x27,
+        0xba, 0x9a, 0x64, 0xcf, 0x6d, 0xea, 0xbc, 0xd3, 0xce, 0x85, 0x3a, 0x85,
+        0x91, 0xf8, 0xbc, 0xe7, 0x78, 0xc9, 0x10, 0xef, 0xcc, 0x35, 0xcb, 0x44,
+        0xbc, 0x55, 0xf6, 0x02, 0x3b, 0x15, 0xaf, 0xf7, 0xd4, 0x37, 0xd3, 0x59,
+        0x75, 0x9e, 0xf4, 0x86, 0xe6, 0x3b, 0xe8, 0xd0, 0x66, 0xcb, 0x7f, 0xac,
+        0x33, 0xcf, 0xf2, 0x07, 0xd7, 0xe5, 0xf9, 0xfc, 0x04, 0xfc, 0xb9, 0x38,
+        0x68, 0xd5, 0x78, 0xff, 0x28, 0xac, 0xe8, 0x59, 0xaa, 0x8c, 0xab, 0x7b,
+        0x5d, 0x57, 0xc3, 0xa4, 0x97, 0xf2, 0xa1, 0x12, 0xb9, 0x30, 0x30, 0xce,
+        0x2c, 0x90, 0xb4, 0x4b, 0xbf, 0x53, 0xe3, 0x4f, 0xe8, 0xff, 0xfd, 0xea,
+        0x7c, 0x79, 0x19, 0xb4, 0xf1, 0x55, 0xfc, 0xb9, 0x10, 0x27, 0xae, 0x5f,
+        0xbd, 0xc3, 0xfc, 0x4e, 0x7c, 0xaf, 0xb0, 0xbd, 0x39, 0x0b, 0xd1, 0xf1,
+        0x2a, 0x1d, 0x07, 0x50, 0x67, 0x7b, 0x1b, 0xfd, 0xbf, 0x0b, 0xc4, 0x7a,
+        0xfc, 0xae, 0x9f, 0xd8, 0xce, 0x39, 0x5a, 0x91, 0x1f, 0x2a, 0x5f, 0x34,
+        0x4b, 0xfa, 0x56, 0xc1, 0xa7, 0xe3, 0x09, 0x63, 0xcf, 0x43, 0xdd, 0xe7,
+        0x1b, 0x7d, 0x51, 0xf6, 0x11, 0x53, 0x77, 0x42, 0x56, 0xff, 0x9f, 0x17,
+        0xc6, 0x98, 0xb2, 0xa1, 0xbb, 0xcb, 0xd3, 0x12, 0x3e, 0x31, 0x26, 0x91,
+        0xe3, 0x8c, 0xe7, 0x67, 0xa5, 0x14, 0xf7, 0xe5, 0x01, 0x6f, 0xad, 0x6f,
+        0xd2, 0x6d, 0xad, 0x9f, 0xfb, 0xa3, 0x32, 0x74, 0xfa, 0x31, 0x89, 0x9e,
+        0xe0, 0xbb, 0x35, 0x67, 0x39, 0xd0, 0x47, 0x9b, 0xa5, 0x12, 0x67, 0x4c,
+        0x3b, 0xaa, 0xce, 0xc6, 0x2f, 0x8f, 0xbf, 0x1e, 0x2d, 0x01, 0x2b, 0x14,
+        0x94, 0x6e, 0x41, 0xba, 0xe2, 0x4b, 0xe4, 0xae, 0xe3, 0x9e, 0x82, 0xbf,
+        0x19, 0x9a, 0xa8, 0x44, 0xd5, 0x1d, 0xa5, 0xcb, 0x71, 0xd6, 0x7d, 0x0c,
+        0x7e, 0x37, 0x71, 0x06, 0x74, 0xc7, 0x98, 0xb4, 0x30, 0x1f, 0x3e, 0xb1,
+        0x8a, 0x33, 0xa8, 0x13, 0x86, 0xbc, 0xb8, 0x44, 0xce, 0x04, 0x6b, 0xe7,
+        0x7f, 0x1c, 0x64, 0xcd, 0xef, 0x95, 0xf0, 0x71, 0x3e, 0x37, 0xfa, 0x43,
+        0xc4, 0xee, 0xb0, 0x0d, 0xe7, 0x7f, 0x1f, 0xfd, 0xf1, 0x5d, 0x56, 0x7f,
+        0x87, 0x8b, 0x7c, 0xf5, 0xef, 0xfa, 0x7f, 0x04, 0x50, 0xf6, 0xff, 0x3f,
+        0xc3, 0x8e, 0xbb, 0xb0, 0xa8, 0x4d, 0x00, 0x00, 0x00 };
 
 static const u32 bnx2_COM_b06FwData[(0x0/4) + 1] = { 0x0 };
 static const u32 bnx2_COM_b06FwRodata[(0x14/4) + 1] = {
-        0x08000e7c, 0x08000ec4, 0x08000ef8, 0x08000f44, 0x08000f78, 0x00000000
+        0x08000e7c, 0x08000ec4, 0x08000f04, 0x08000f50, 0x08000f84, 0x00000000
 };
 
 static struct fw_info bnx2_com_fw_06 = {
-        /* Firmware version: 4.4.2 */
+        /* Firmware version: 4.6.16 */
         .ver_major                      = 0x4,
-        .ver_minor                      = 0x4,
-        .ver_fix                        = 0x2,
+        .ver_minor                      = 0x6,
+        .ver_fix                        = 0x10,
 
         .start_addr                     = 0x080000f8,
 
         .text_addr                      = 0x08000000,
-        .text_len                       = 0x4ebc,
+        .text_len                       = 0x4da4,
         .text_index                     = 0x0,
         .gz_text                        = bnx2_COM_b06FwText,
         .gz_text_len                    = sizeof(bnx2_COM_b06FwText),
@@ -872,15 +867,15 @@ static struct fw_info bnx2_com_fw_06 = {
         .data_index                     = 0x0,
         .data                           = bnx2_COM_b06FwData,
 
-        .sbss_addr                      = 0x08004f00,
+        .sbss_addr                      = 0x08004de0,
         .sbss_len                       = 0x38,
         .sbss_index                     = 0x0,
 
-        .bss_addr                       = 0x08004f38,
+        .bss_addr                       = 0x08004e18,
         .bss_len                        = 0xbc,
         .bss_index                      = 0x0,
 
-        .rodata_addr                    = 0x08004ebc,
+        .rodata_addr                    = 0x08004da4,
         .rodata_len                     = 0x14,
         .rodata_index                   = 0x0,
         .rodata                         = bnx2_COM_b06FwRodata,
@@ -903,1232 +898,1219 @@ static const struct cpu_reg cpu_reg_com = {
 };
 
 static u8 bnx2_CP_b06FwText[] = {
-        0x9d, 0xbc, 0x0d, 0x78, 0x1b, 0xe5, 0x95, 0x36, 0x7c, 0xcf, 0x48, 0xb2,
-        0x65, 0x5b, 0xb6, 0xc7, 0x8e, 0x9c, 0x28, 0x6c, 0x9a, 0x68, 0xf0, 0x28,
-        0x51, 0xb0, 0x69, 0x47, 0x89, 0x03, 0x82, 0x55, 0x89, 0xea, 0x98, 0xc4,
-        0x81, 0x50, 0x9c, 0x12, 0x5a, 0xb3, 0x4b, 0x5b, 0xe1, 0xfc, 0x60, 0x42,
-        0xa0, 0xa1, 0xb0, 0xef, 0x9a, 0xef, 0x65, 0x5f, 0xab, 0xb6, 0x93, 0x38,
-        0x89, 0x2c, 0x39, 0x8e, 0x21, 0x61, 0xbf, 0x5e, 0x8b, 0x89, 0x9d, 0x38,
-        0x80, 0x6c, 0x85, 0x36, 0xdd, 0x0d, 0x7d, 0xd3, 0x8d, 0x36, 0x09, 0x60,
-        0xfe, 0xda, 0x40, 0xbb, 0x2c, 0xed, 0xcb, 0x07, 0xde, 0x14, 0x42, 0xd8,
-        0xb6, 0x40, 0xb7, 0x3f, 0x1b, 0x5a, 0xca, 0xbc, 0xf7, 0x19, 0x49, 0x89,
-        0x13, 0x28, 0xed, 0x7e, 0xbe, 0xae, 0xb9, 0xac, 0x99, 0x79, 0x7e, 0xce,
-        0x73, 0x9e, 0x73, 0xee, 0x73, 0x9f, 0x67, 0x9e, 0x19, 0x3f, 0x50, 0x8a,
-        0xfc, 0x5f, 0x39, 0x8f, 0x4f, 0x37, 0x6c, 0x5c, 0xbd, 0x60, 0xc1, 0xa7,
-        0x1b, 0xe4, 0xdc, 0x39, 0xdd, 0xe9, 0xc4, 0x9f, 0xf9, 0xe7, 0xff, 0x73,
-        0x0b, 0x7e, 0xcc, 0x9f, 0x03, 0xd0, 0x0a, 0xfd, 0xcb, 0x01, 0xb7, 0x1a,
-        0x71, 0xde, 0xdc, 0x68, 0xc0, 0xed, 0x88, 0x4c, 0xb4, 0xad, 0x36, 0x80,
-        0x68, 0xba, 0xce, 0xbf, 0x04, 0x7f, 0xb0, 0xe2, 0x5e, 0x27, 0xe4, 0xfa,
-        0xa7, 0x22, 0x1f, 0x74, 0x7e, 0xef, 0x72, 0xfd, 0xbd, 0x21, 0x07, 0xdc,
-        0x5a, 0x24, 0x0e, 0x6d, 0x2e, 0xdc, 0xb3, 0x58, 0xe7, 0x9b, 0xf3, 0xbe,
-        0xa9, 0xa0, 0xa2, 0xd0, 0xd6, 0x69, 0xeb, 0x7b, 0xf3, 0x7c, 0xb1, 0x92,
-        0x88, 0x86, 0x23, 0x19, 0xb4, 0xd4, 0xf7, 0x75, 0x5a, 0xe5, 0x46, 0x08,
-        0x6e, 0xc3, 0x68, 0xed, 0x53, 0x3c, 0xe1, 0xf5, 0x8b, 0xe0, 0x29, 0x36,
-        0x10, 0xbf, 0x28, 0x82, 0x96, 0x4b, 0xc6, 0x4a, 0xe3, 0xce, 0x88, 0x1b,
-        0xcd, 0x19, 0x77, 0xfc, 0x2f, 0x22, 0x06, 0x96, 0x65, 0x66, 0x95, 0xa2,
-        0xc2, 0x8d, 0x9e, 0xcc, 0xeb, 0x25, 0xb9, 0xf6, 0xea, 0xf3, 0xff, 0x83,
-        0xd3, 0x72, 0xff, 0xa7, 0xc7, 0x9c, 0x11, 0x60, 0x53, 0xc2, 0xb2, 0x8a,
-        0x22, 0x37, 0xdc, 0xa0, 0x46, 0x0c, 0xdf, 0x3e, 0x2c, 0x46, 0x9b, 0x86,
-        0xfb, 0x36, 0x37, 0xfc, 0xa7, 0x72, 0x74, 0x90, 0x0d, 0x8f, 0x3a, 0x10,
-        0xd5, 0x8e, 0xf3, 0xff, 0xec, 0xd9, 0xad, 0x61, 0x03, 0xbb, 0x47, 0xcf,
-        0xf0, 0xba, 0xd3, 0xbe, 0xd6, 0xbd, 0x6b, 0xf6, 0xec, 0x9b, 0xc2, 0xc7,
-        0xf1, 0xe0, 0xa8, 0xfc, 0xbe, 0x15, 0x9d, 0xf5, 0x0a, 0x26, 0x6f, 0x58,
-        0x07, 0x87, 0x61, 0xa0, 0x67, 0x97, 0xe2, 0xec, 0xaa, 0x57, 0x11, 0xf5,
-        0xea, 0xc1, 0x18, 0x27, 0xc1, 0x69, 0x20, 0x56, 0x1c, 0x09, 0x3b, 0xdf,
-        0x4e, 0x44, 0x34, 0x87, 0x61, 0x59, 0xc1, 0xd0, 0x0c, 0x38, 0xaa, 0x2c,
-        0xeb, 0x09, 0xd3, 0x03, 0xff, 0x97, 0x9e, 0x42, 0x7c, 0xb8, 0x05, 0xaa,
-        0xf1, 0x14, 0xba, 0x86, 0x9f, 0xc2, 0x43, 0x3b, 0x4b, 0x31, 0x39, 0x8d,
-        0xe3, 0x4d, 0xf9, 0xf0, 0xbd, 0x79, 0xd2, 0xb7, 0xc8, 0x51, 0xcf, 0xc3,
-        0x8d, 0x49, 0xc7, 0x6b, 0xfc, 0x2f, 0x65, 0xce, 0x58, 0x93, 0x33, 0xce,
-        0x95, 0xd9, 0xc4, 0x32, 0x3d, 0x17, 0x94, 0x89, 0x0f, 0x47, 0xf0, 0x5c,
-        0x42, 0xc1, 0xfa, 0x50, 0x05, 0xa2, 0x55, 0x32, 0x5e, 0xcb, 0x1a, 0x35,
-        0x4f, 0x59, 0x93, 0x9a, 0xf4, 0x35, 0x81, 0xe7, 0x79, 0x6f, 0x73, 0xe8,
-        0x0d, 0x2b, 0xeb, 0x95, 0xf6, 0xbe, 0x4e, 0x1b, 0x5a, 0xc9, 0xeb, 0x4e,
-        0xa4, 0x12, 0x88, 0x55, 0x44, 0x6e, 0xe4, 0xb9, 0x6e, 0xbe, 0xa3, 0xb8,
-        0xdd, 0xef, 0x26, 0xdc, 0x5f, 0x2a, 0x37, 0xd4, 0x7b, 0x2a, 0xe1, 0xc4,
-        0x0b, 0x94, 0xf9, 0x90, 0xb9, 0x0e, 0x2e, 0xe3, 0x6e, 0xb1, 0x39, 0x8e,
-        0xeb, 0x47, 0x16, 0x66, 0x14, 0xea, 0x4b, 0xbb, 0x6e, 0x6c, 0x4e, 0x59,
-        0xd6, 0x56, 0x33, 0x7a, 0x45, 0x09, 0x0d, 0xe2, 0x58, 0xa2, 0x05, 0xee,
-        0x48, 0xc0, 0x7f, 0x1a, 0x61, 0x2c, 0xc9, 0x78, 0xf1, 0x64, 0x02, 0xce,
-        0xc6, 0x79, 0x5e, 0x74, 0x65, 0x22, 0xb8, 0x3a, 0x63, 0xa2, 0x29, 0xf3,
-        0xa7, 0x2d, 0xeb, 0xda, 0x94, 0x9f, 0x63, 0xf8, 0x83, 0x95, 0x1b, 0x83,
-        0x8c, 0x2f, 0xf7, 0xbf, 0x27, 0x75, 0x11, 0xb6, 0x71, 0x8e, 0xb6, 0x70,
-        0xfe, 0x96, 0x87, 0xb2, 0xd1, 0x12, 0xe8, 0xe6, 0x69, 0x44, 0xb0, 0x34,
-        0x63, 0x70, 0x4e, 0x23, 0x58, 0x92, 0xaa, 0xd5, 0x86, 0x31, 0x1f, 0x51,
-        0x5f, 0xce, 0xb6, 0xb7, 0x73, 0xbc, 0x6d, 0x81, 0x16, 0x94, 0xd3, 0x46,
-        0xd2, 0x8b, 0xc2, 0x68, 0x64, 0xff, 0x2b, 0xfe, 0x8c, 0xfe, 0xaf, 0x67,
-        0xff, 0xef, 0xb0, 0xff, 0xac, 0xdd, 0x3f, 0x9c, 0xd7, 0xf0, 0xdc, 0x4d,
-        0x7b, 0xdc, 0x96, 0x76, 0x3a, 0x97, 0xa7, 0xbc, 0xd8, 0x9a, 0x36, 0x69,
-        0x73, 0x72, 0xcb, 0x87, 0xcd, 0x83, 0xb3, 0xb0, 0x65, 0x50, 0xf7, 0x3d,
-        0xcd, 0xdf, 0xdd, 0x23, 0x17, 0x61, 0xd3, 0xa0, 0x82, 0x3d, 0xc6, 0x45,
-        0xe8, 0xe2, 0xef, 0xdd, 0x83, 0xb3, 0xf1, 0xe0, 0xa0, 0x03, 0xe1, 0x69,
-        0xe7, 0x8f, 0x63, 0xd2, 0x71, 0x11, 0xe2, 0x23, 0x7e, 0x74, 0x25, 0x9e,
-        0xb7, 0x75, 0x58, 0x1e, 0xf9, 0x5e, 0xc1, 0x9f, 0xe9, 0x3b, 0x7e, 0xac,
-        0x4e, 0x68, 0xe8, 0x4a, 0x89, 0x1f, 0xb8, 0x69, 0x9b, 0xe2, 0x07, 0xbf,
-        0x06, 0x2a, 0x34, 0x74, 0x67, 0x0a, 0xf7, 0x15, 0x38, 0x39, 0x6f, 0x6b,
-        0x34, 0x37, 0xb6, 0xa6, 0xc4, 0x26, 0xa4, 0x4d, 0xb1, 0x0b, 0xf9, 0x5d,
-        0x4d, 0xbb, 0x2b, 0x85, 0x7f, 0x6f, 0x29, 0x82, 0xf7, 0x6b, 0x78, 0xb3,
-        0x41, 0xae, 0xd3, 0xde, 0x43, 0x52, 0xa6, 0x1f, 0xfb, 0xd2, 0xe2, 0xa7,
-        0x7e, 0x34, 0x26, 0x26, 0xd8, 0x7e, 0x03, 0xdb, 0x36, 0xf1, 0xcf, 0x99,
-        0x7a, 0xfc, 0x53, 0x26, 0x88, 0x7f, 0xa4, 0x1e, 0xbf, 0x93, 0xf1, 0xe3,
-        0x60, 0x66, 0x16, 0xbe, 0x9d, 0xf1, 0xe1, 0x5b, 0x9c, 0xbf, 0xc7, 0x33,
-        0x2d, 0xb4, 0x7d, 0x0d, 0x07, 0x32, 0xa2, 0xff, 0x22, 0x8e, 0xb7, 0x14,
-        0xdd, 0x83, 0xb5, 0xc1, 0x63, 0xb4, 0xad, 0x7f, 0x34, 0xaf, 0x41, 0xb6,
-        0xba, 0xc1, 0xb6, 0xc9, 0xad, 0xbc, 0xbe, 0x6d, 0xb0, 0x36, 0x7a, 0x89,
-        0x62, 0x59, 0x6a, 0xa8, 0x2e, 0x7c, 0x54, 0x55, 0x31, 0xe9, 0xd5, 0xfd,
-        0x59, 0x55, 0xf7, 0x47, 0xe1, 0x42, 0x82, 0xbe, 0x11, 0xaf, 0xd1, 0x87,
-        0xe2, 0xb4, 0x29, 0xaf, 0x31, 0xcc, 0xf1, 0xe8, 0xfe, 0xb8, 0xea, 0xc6,
-        0x96, 0x94, 0xbe, 0x3b, 0xae, 0x7a, 0x10, 0xcf, 0x94, 0xe2, 0x17, 0x83,
-        0x7a, 0x6f, 0x5c, 0xfd, 0x3c, 0xe2, 0xd5, 0x96, 0xf5, 0xad, 0x10, 0x36,
-        0xce, 0x88, 0x20, 0x5a, 0x13, 0x41, 0x6c, 0x76, 0xc4, 0x8b, 0x54, 0x0a,
-        0x78, 0xa7, 0xcf, 0xf0, 0xfd, 0x9b, 0xd2, 0x82, 0xbf, 0x69, 0xd1, 0xfd,
-        0x7e, 0xb5, 0x2e, 0x3e, 0xac, 0x2e, 0xa2, 0x4b, 0xc3, 0xef, 0x8b, 0x2c,
-        0x43, 0x87, 0x7d, 0x4d, 0x81, 0x66, 0x78, 0xd0, 0x9d, 0xba, 0x02, 0x31,
-        0x6f, 0x6d, 0xeb, 0x0e, 0xb5, 0xf6, 0x8c, 0xa9, 0xea, 0x13, 0x2d, 0xaa,
-        0x65, 0xfd, 0x72, 0xe1, 0x3b, 0x96, 0x7f, 0xba, 0x65, 0x2d, 0x58, 0x28,
-        0x7d, 0xfa, 0x51, 0x15, 0x31, 0xb1, 0xd2, 0x9e, 0xc3, 0x52, 0x9c, 0x1a,
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+        0x1f, 0x7d, 0x5f, 0x11, 0xfb, 0x2a, 0x97, 0xf7, 0x15, 0xd5, 0xd9, 0xcf,
+        0xa7, 0xac, 0x4f, 0x38, 0x0a, 0xfb, 0x15, 0x2f, 0xbf, 0xc7, 0x73, 0x23,
+        0x79, 0xfd, 0x26, 0x79, 0x67, 0x1f, 0xc7, 0xba, 0x39, 0x21, 0x4b, 0x5a,
+        0xff, 0x0f, 0xdd, 0x0f, 0x6b, 0xf2, 0xd0, 0x56, 0x00, 0x00, 0x00 };
 
 static const u32 bnx2_CP_b06FwData[(0x84/4) + 1] = {
         0x00000000, 0x0000001b, 0x0000000f, 0x0000000a, 0x00000008, 0x00000006,
@@ -2137,50 +2119,51 @@ static const u32 bnx2_CP_b06FwData[(0x84/4) + 1] = {
         0x00000002, 0x00000002, 0x00000002, 0x00000002, 0x00000002, 0x00000002,
         0x00000002, 0x00000002, 0x00000002, 0x00000002, 0x00000002, 0x00000002,
         0x00000001, 0x00000001, 0x00000001, 0x00000000 };
-static const u32 bnx2_CP_b06FwRodata[(0x130/4) + 1] = {
-        0x08001e8c, 0x08001d18, 0x08001e68, 0x08001e44, 0x08001e20, 0x08001dfc,
-        0x08001dd4, 0x08001dac, 0x08001d80, 0x08001f84, 0x08001f74, 0x08001d34,
-        0x08001d34, 0x08001d34, 0x08001eb4, 0x08001eb4, 0x08001d34, 0x08001d34,
-        0x08001f64, 0x08001d34, 0x08001d34, 0x08001d34, 0x08001d34, 0x08001f54,
-        0x08001d34, 0x08001d34, 0x08001d34, 0x08001d34, 0x08001d34, 0x08001d34,
-        0x08001d34, 0x08001d34, 0x08001d34, 0x08001d34, 0x08001d34, 0x08001d34,
-        0x08001d34, 0x08001d34, 0x08001f44, 0x08001d34, 0x08001d34, 0x08001f34,
-        0x08001d34, 0x08001d34, 0x08001d34, 0x08001d34, 0x08001d34, 0x08001d34,
-        0x08001d34, 0x08001d34, 0x08001d34, 0x08001d34, 0x08001d34, 0x08001d34,
-        0x08001d34, 0x08001d34, 0x08001d34, 0x08001d34, 0x08001d34, 0x08001f1c,
-        0x08001d34, 0x08001d34, 0x08001f0c, 0x08001efc, 0x08003208, 0x08003210,
-        0x080031d8, 0x080031e4, 0x080031f0, 0x080031fc, 0x08005694, 0x08005654,
-        0x08005620, 0x080055f4, 0x080055d0, 0x0800558c, 0x00000000 };
+static const u32 bnx2_CP_b06FwRodata[(0x134/4) + 1] = {
+        0x08000f30, 0x08000d88, 0x08000fc4, 0x0800106c, 0x08000f58, 0x08000f98,
+        0x080011a4, 0x08000da4, 0x080011c8, 0x08000df4, 0x08001498, 0x08001440,
+        0x08000da4, 0x08000da4, 0x08000da4, 0x08001254, 0x08001254, 0x08000da4,
+        0x08000da4, 0x080016e0, 0x08000da4, 0x08000da4, 0x08000da4, 0x08000da4,
+        0x080013d4, 0x08000da4, 0x08000da4, 0x08000da4, 0x08000da4, 0x08000da4,
+        0x08000da4, 0x08000da4, 0x08000da4, 0x08000da4, 0x08000da4, 0x08000da4,
+        0x08000da4, 0x08000da4, 0x08000da4, 0x08000fb8, 0x08000da4, 0x08000da4,
+        0x08001690, 0x08000da4, 0x08000da4, 0x08000da4, 0x08000da4, 0x08000da4,
+        0x08000da4, 0x08000da4, 0x08000da4, 0x08000da4, 0x08000da4, 0x08000da4,
+        0x08000da4, 0x08000da4, 0x08000da4, 0x08000da4, 0x08000da4, 0x08000da4,
+        0x080015bc, 0x08000da4, 0x08000da4, 0x08001348, 0x080012b8, 0x08002e50,
+        0x08002e58, 0x08002e20, 0x08002e2c, 0x08002e38, 0x08002e44, 0x0800532c,
+        0x080052ec, 0x080052b8, 0x0800528c, 0x08005268, 0x08005224, 0x00000000
+};
 
 static struct fw_info bnx2_cp_fw_06 = {
-        /* Firmware version: 4.4.22 */
+        /* Firmware version: 4.6.16 */
         .ver_major                      = 0x4,
-        .ver_minor                      = 0x4,
-        .ver_fix                        = 0x16,
+        .ver_minor                      = 0x6,
+        .ver_fix                        = 0x10,
 
         .start_addr                     = 0x08000080,
 
         .text_addr                      = 0x08000000,
-        .text_len                       = 0x5a34,
+        .text_len                       = 0x56cc,
         .text_index                     = 0x0,
         .gz_text                        = bnx2_CP_b06FwText,
         .gz_text_len                    = sizeof(bnx2_CP_b06FwText),
 
-        .data_addr                      = 0x08005b80,
+        .data_addr                      = 0x08005820,
         .data_len                       = 0x84,
         .data_index                     = 0x0,
         .data                           = bnx2_CP_b06FwData,
 
-        .sbss_addr                      = 0x08005c04,
-        .sbss_len                       = 0xe9,
+        .sbss_addr                      = 0x080058a4,
+        .sbss_len                       = 0xf1,
         .sbss_index                     = 0x0,
 
-        .bss_addr                       = 0x08005cf0,
+        .bss_addr                       = 0x08005998,
         .bss_len                        = 0x5d8,
         .bss_index                      = 0x0,
 
-        .rodata_addr                    = 0x08005a34,
-        .rodata_len                     = 0x130,
+        .rodata_addr                    = 0x080056cc,
+        .rodata_len                     = 0x134,
         .rodata_index                   = 0x0,
         .rodata                         = bnx2_CP_b06FwRodata,
 };
@@ -2202,761 +2185,747 @@ static const struct cpu_reg cpu_reg_cp = {
 };
 
 static u8 bnx2_RXP_b06FwText[] = {
-        0xec, 0x5b, 0x5f, 0x6c, 0x5b, 0xd7, 0x79, 0xff, 0xee, 0x21, 0x25, 0x51,
-        0xb2, 0xfe, 0x5c, 0xc9, 0x8c, 0x43, 0x27, 0x4a, 0x43, 0x4a, 0x57, 0x12,
-        0x13, 0x69, 0xe9, 0x95, 0xc6, 0x26, 0x2a, 0x46, 0x34, 0x2c, 0x29, 0xdb,
-        0x4a, 0xe3, 0x07, 0xc5, 0xf5, 0xda, 0xac, 0xeb, 0x30, 0x81, 0xb2, 0xb1,
-        0xec, 0x61, 0x83, 0x67, 0xac, 0x41, 0xb6, 0xb9, 0x30, 0x41, 0x29, 0x8e,
-        0x92, 0xd2, 0x22, 0x67, 0x2b, 0x73, 0xb1, 0x65, 0x80, 0x42, 0x49, 0x76,
-        0xb6, 0xd1, 0x62, 0xda, 0xbd, 0x74, 0x45, 0x1c, 0x0b, 0x8a, 0xe7, 0xe5,
-        0xa1, 0x0f, 0x69, 0x17, 0x60, 0xed, 0xd0, 0x61, 0x86, 0xe2, 0xda, 0x79,
-        0x28, 0xb6, 0x6c, 0x40, 0x96, 0x6c, 0x71, 0x73, 0xf7, 0xfb, 0x9d, 0x7b,
-        0xaf, 0x4c, 0x2b, 0x1a, 0x9a, 0x87, 0x3d, 0xde, 0x03, 0x08, 0xe7, 0x9e,
-        0x73, 0xbe, 0xf3, 0x9d, 0xef, 0xfb, 0xce, 0xf7, 0xf7, 0xd0, 0xfe, 0xc3,
-        0x76, 0x69, 0x13, 0xaf, 0x75, 0xe0, 0x2f, 0x75, 0xec, 0x99, 0xe3, 0x63,
-        0x0f, 0xa5, 0x1e, 0xe2, 0x38, 0xa4, 0xc2, 0x61, 0xf6, 0x86, 0x04, 0x2d,
-        0x68, 0x41, 0x0b, 0x5a, 0xd0, 0x82, 0x16, 0xb4, 0xa0, 0x05, 0x2d, 0x68,
-        0x41, 0x0b, 0x5a, 0xd0, 0x82, 0x16, 0xb4, 0xa0, 0x05, 0x2d, 0x68, 0x41,
-        0x0b, 0x5a, 0xd0, 0x82, 0x16, 0xb4, 0xa0, 0x05, 0x2d, 0x68, 0x41, 0x0b,
-        0x5a, 0xd0, 0x82, 0x16, 0xb4, 0xa0, 0x05, 0x2d, 0x68, 0x41, 0x0b, 0x5a,
-        0xd0, 0x82, 0x16, 0xb4, 0xa0, 0x05, 0x2d, 0x68, 0x41, 0x0b, 0x5a, 0xd0,
-        0x82, 0x16, 0xb4, 0xa0, 0x05, 0xed, 0xff, 0xb3, 0x85, 0x44, 0x4c, 0xf6,
-        0x1d, 0xde, 0x9f, 0x44, 0x54, 0x3a, 0x7e, 0x3c, 0x6b, 0x49, 0x24, 0x94,
-        0xbe, 0xf2, 0xf4, 0x8c, 0x25, 0x92, 0xa9, 0x0d, 0xc7, 0x73, 0xf2, 0x0b,
-        0xa7, 0x10, 0x0d, 0x0b, 0xe7, 0xef, 0x4b, 0xdf, 0x3a, 0x79, 0xe9, 0x91,
-        0xc4, 0x7b, 0x4b, 0x21, 0x89, 0x98, 0xe9, 0xb7, 0x46, 0xcd, 0x41, 0x89,
-        0xf4, 0x62, 0xcf, 0x4b, 0x43, 0x97, 0xbb, 0xa4, 0xd3, 0xc7, 0x25, 0x52,
-        0x2d, 0x25, 0xec, 0xfd, 0x32, 0x6c, 0x6e, 0x48, 0x58, 0x32, 0x38, 0xe3,
-        0x7c, 0x4d, 0xa4, 0x58, 0x32, 0x88, 0x43, 0x8a, 0xb5, 0x88, 0x5c, 0x0b,
-        0x11, 0xea, 0x7b, 0x46, 0xb6, 0xfc, 0xb1, 0x93, 0x09, 0xe3, 0x5c, 0x0b,
-        0xdf, 0x75, 0x7f, 0x3e, 0x22, 0x2a, 0x9d, 0x48, 0x66, 0x43, 0x93, 0x52,
-        0x5d, 0x74, 0x9c, 0x39, 0xfb, 0x5e, 0xe0, 0xe8, 0x91, 0x39, 0xcb, 0x1d,
-        0x67, 0xed, 0x07, 0xcd, 0x09, 0xb9, 0x1b, 0x73, 0x21, 0x51, 0xd6, 0x3d,
-        0xf8, 0x8b, 0x1b, 0xb9, 0xb3, 0xdf, 0x32, 0xb2, 0xcb, 0xed, 0x52, 0x2c,
-        0x3b, 0x32, 0x63, 0x4b, 0x26, 0x6b, 0xb7, 0x62, 0xfd, 0x63, 0x67, 0x66,
-        0x6b, 0xcf, 0xb0, 0x99, 0x93, 0x26, 0xc9, 0x44, 0x63, 0x80, 0x59, 0x34,
-        0x72, 0x17, 0xfe, 0xae, 0x5d, 0xda, 0x40, 0x4f, 0x8a, 0xe3, 0x8f, 0x9d,
-        0x90, 0x65, 0x61, 0x9d, 0xe7, 0x63, 0x5c, 0x27, 0x5e, 0x7e, 0x13, 0xe7,
-        0x35, 0xe7, 0xd2, 0x50, 0x4c, 0xbe, 0x5b, 0x8f, 0xca, 0x77, 0xea, 0xa6,
-        0xbc, 0x5a, 0xef, 0x95, 0xcb, 0x75, 0xc7, 0xf9, 0x8e, 0xed, 0x38, 0x6f,
-        0xe1, 0xef, 0x3f, 0xed, 0x2d, 0x1e, 0xd0, 0x0a, 0xc6, 0x44, 0xfd, 0x2f,
-        0xda, 0xa5, 0x33, 0x11, 0x17, 0xd5, 0x2e, 0xb3, 0xe5, 0x98, 0xcc, 0x95,
-        0x4b, 0xc6, 0x13, 0x17, 0x16, 0x8c, 0xa9, 0x0b, 0x15, 0x9c, 0x19, 0xc6,
-        0x9c, 0x14, 0x8a, 0xf6, 0x2b, 0x46, 0xae, 0x3e, 0x6f, 0x1c, 0xba, 0xd0,
-        0x09, 0x1a, 0x79, 0xfe, 0x1e, 0x23, 0x7b, 0xf6, 0x96, 0x64, 0x6d, 0xca,
-        0x38, 0x61, 0x7e, 0x0d, 0x62, 0xcf, 0x96, 0x48, 0x73, 0xb3, 0x47, 0xaf,
-        0xe3, 0xa8, 0xb4, 0x73, 0x32, 0x9b, 0xb2, 0xcc, 0xa2, 0x90, 0x3e, 0x3d,
-        0x77, 0xd9, 0xa5, 0xf9, 0xbc, 0x91, 0xbd, 0xd0, 0x6e, 0xe4, 0xce, 0x85,
-        0x41, 0x87, 0xf4, 0x86, 0x84, 0xfb, 0x06, 0x62, 0x79, 0xa9, 0xe1, 0x0c,
-        0x31, 0x55, 0x9a, 0x72, 0x05, 0xcd, 0xa0, 0xe5, 0xbb, 0x65, 0xf0, 0x50,
-        0x06, 0x0f, 0x65, 0xf2, 0x16, 0x97, 0x4b, 0x43, 0x3e, 0x6f, 0x8e, 0xf3,
-        0x23, 0x9b, 0xb4, 0x27, 0xe2, 0x19, 0xe5, 0xf3, 0xe9, 0x38, 0xff, 0x61,
-        0x93, 0x57, 0xf2, 0xe3, 0x38, 0xaf, 0xda, 0x31, 0xd0, 0xee, 0x5c, 0x56,
-        0x56, 0x09, 0xbc, 0x58, 0xc0, 0x4f, 0x59, 0x2f, 0x80, 0x87, 0x79, 0xf0,
-        0x77, 0x1e, 0xbc, 0x55, 0x40, 0xc7, 0x2f, 0x3b, 0xaf, 0x60, 0xe4, 0x86,
-        0xb6, 0xe4, 0x15, 0xa7, 0x8c, 0xf3, 0x2b, 0x0a, 0xb2, 0xde, 0x25, 0xf9,
-        0x25, 0x53, 0xa6, 0x57, 0xfc, 0xfd, 0xbe, 0x1e, 0x1c, 0x93, 0x83, 0xe5,
-        0x1e, 0xc8, 0x86, 0xb2, 0x4c, 0xd8, 0x22, 0x0e, 0x64, 0x54, 0x4c, 0x2a,
-        0x11, 0x23, 0x6f, 0x9f, 0xd4, 0xf7, 0xbf, 0x62, 0x49, 0x26, 0x6f, 0x53,
-        0x8e, 0x12, 0xcf, 0xdb, 0x85, 0x58, 0x18, 0xfa, 0xb6, 0x62, 0x15, 0xcc,
-        0xb0, 0x50, 0x8e, 0x89, 0xd8, 0x1f, 0x43, 0x96, 0x47, 0x4b, 0x92, 0xf9,
-        0x52, 0xc9, 0x97, 0xb1, 0x2b, 0xdf, 0xc7, 0x4b, 0x5f, 0xec, 0x90, 0x36,
-        0xf5, 0x99, 0x26, 0xf9, 0x3d, 0xec, 0x25, 0xee, 0x3b, 0xf6, 0x62, 0x9f,
-        0x0b, 0xe7, 0xee, 0x4d, 0x3c, 0x29, 0x42, 0xd8, 0x62, 0x7f, 0x93, 0xb6,
-        0x11, 0x31, 0xb2, 0x56, 0x21, 0x16, 0x02, 0x5c, 0x5e, 0x8a, 0xa3, 0xde,
-        0x5c, 0x53, 0xd6, 0xba, 0x15, 0x9a, 0xb3, 0x13, 0xf1, 0xa2, 0xdc, 0x0a,
-        0x5d, 0xb5, 0xf5, 0x5c, 0x6b, 0xd6, 0x72, 0x64, 0x15, 0xd8, 0x9f, 0x83,
-        0x3d, 0x6c, 0x80, 0xa3, 0xdf, 0x2d, 0xe9, 0xf9, 0x0e, 0xec, 0x4f, 0x36,
-        0x01, 0x67, 0x9b, 0x24, 0x92, 0x55, 0xcc, 0x5f, 0x75, 0xe7, 0xbb, 0x5d,
-        0xbc, 0xc5, 0xfe, 0x36, 0x8d, 0x5b, 0xe4, 0x15, 0x77, 0xfe, 0x2e, 0x17,
-        0x77, 0xf1, 0x01, 0xcc, 0x03, 0xff, 0xe0, 0xe4, 0x90, 0xa1, 0xe7, 0xf7,
-        0xd2, 0x9e, 0x7e, 0xa7, 0x74, 0x2b, 0xb4, 0x6a, 0x3b, 0x92, 0x1b, 0x1d,
-        0x9c, 0x1c, 0x34, 0x5c, 0x7c, 0xa7, 0xdc, 0x7d, 0xf7, 0xb9, 0xf8, 0x06,
-        0x27, 0x93, 0x86, 0x8b, 0x6f, 0xa5, 0xa4, 0xf7, 0x4a, 0xbe, 0x44, 0xd8,
-        0xc1, 0x49, 0xcb, 0xb8, 0x4f, 0xa6, 0xbb, 0x07, 0x27, 0xfb, 0x0c, 0xf5,
-        0x99, 0x5d, 0x2e, 0x1f, 0x09, 0x9f, 0x86, 0x5d, 0x9a, 0x06, 0x9e, 0xab,
-        0xe7, 0x07, 0xb2, 0x56, 0xf1, 0x81, 0x5d, 0xfa, 0x7c, 0x9e, 0xa9, 0xe7,
-        0x1e, 0x20, 0x5d, 0x3c, 0x7b, 0x66, 0xf4, 0x8e, 0x73, 0x7f, 0xe5, 0xb6,
-        0x7c, 0x76, 0x3a, 0x93, 0xe7, 0x49, 0x24, 0x9c, 0x0e, 0x8f, 0xce, 0x95,
-        0x8e, 0x49, 0xb6, 0x1c, 0x97, 0xd9, 0x91, 0x56, 0x99, 0x36, 0xfb, 0xa7,
-        0x0f, 0x0a, 0x7d, 0x4f, 0x64, 0x74, 0xc6, 0xbb, 0xc3, 0x9c, 0x18, 0x32,
-        0x0b, 0x1e, 0x0f, 0xd6, 0x24, 0x62, 0x00, 0xbe, 0xbf, 0x16, 0x96, 0xe7,
-        0xeb, 0x86, 0x34, 0x6b, 0xfb, 0x4c, 0x98, 0xeb, 0xd0, 0xc3, 0x67, 0xcb,
-        0xd4, 0x63, 0xea, 0xac, 0x64, 0xaa, 0x5a, 0x67, 0x7d, 0x7b, 0x6d, 0xe3,
-        0xdd, 0x16, 0x0a, 0x02, 0x73, 0x4c, 0x5b, 0x66, 0x55, 0x5a, 0x24, 0x33,
-        0x25, 0x85, 0xaa, 0xbd, 0x65, 0x3f, 0xb1, 0x65, 0xd9, 0x80, 0x1e, 0x88,
-        0x99, 0x4d, 0x71, 0x9e, 0xf0, 0x0d, 0xb0, 0xa6, 0x6b, 0x7b, 0x21, 0xd8,
-        0xde, 0x4c, 0x8a, 0xb0, 0x52, 0xd0, 0xfe, 0xa2, 0x0e, 0x7d, 0xac, 0xdf,
-        0xd7, 0xe1, 0xfa, 0xbb, 0x08, 0x6c, 0xb4, 0x1d, 0x76, 0xfe, 0x19, 0xd8,
-        0x60, 0xaf, 0x91, 0x3d, 0xe7, 0x38, 0xf0, 0x3f, 0x51, 0x25, 0xb4, 0x41,
-        0xd8, 0x7b, 0x9d, 0x6b, 0xed, 0x98, 0x17, 0x73, 0xd6, 0xee, 0x06, 0x8f,
-        0x8e, 0x33, 0x69, 0xc7, 0xa5, 0x68, 0x77, 0x61, 0x5f, 0x93, 0xf4, 0x58,
-        0xd4, 0x79, 0xda, 0xf5, 0x2e, 0x9c, 0x67, 0x70, 0xdc, 0x89, 0xf3, 0x3a,
-        0x30, 0x17, 0x9b, 0xa5, 0x2d, 0xa7, 0xe8, 0xb7, 0x5c, 0x1f, 0x2a, 0x72,
-        0x1d, 0xb4, 0x72, 0x8f, 0x86, 0x8b, 0xb4, 0xa4, 0x53, 0x72, 0xb3, 0xb4,
-        0x57, 0xae, 0x45, 0x29, 0x03, 0xe0, 0x2c, 0xc3, 0x27, 0x46, 0x0d, 0xd0,
-        0x4f, 0xba, 0xe9, 0x03, 0x77, 0x7b, 0x63, 0xe3, 0x7e, 0xf7, 0x0c, 0x31,
-        0x43, 0xe9, 0x4e, 0xc9, 0xe9, 0x39, 0x51, 0x6a, 0x74, 0x97, 0xb7, 0xde,
-        0x69, 0xec, 0x3f, 0xa7, 0xe4, 0xc0, 0xc3, 0xf0, 0x5b, 0x38, 0xeb, 0xaa,
-        0xe5, 0x38, 0x57, 0xed, 0xf7, 0x61, 0xf7, 0x4a, 0x9a, 0xac, 0x6b, 0x9d,
-        0xd2, 0x46, 0x7b, 0x36, 0x1a, 0x64, 0x18, 0x93, 0x53, 0x65, 0xee, 0x29,
-        0x48, 0xd8, 0x22, 0x0c, 0xe1, 0xff, 0x05, 0x70, 0x21, 0x69, 0x81, 0x3d,
-        0x6e, 0xd8, 0x51, 0xd2, 0xdb, 0xe5, 0xc2, 0x77, 0xe3, 0x0c, 0xd2, 0x4e,
-        0xfb, 0x73, 0xb4, 0xfd, 0x65, 0x43, 0x2a, 0x33, 0xb1, 0x08, 0x6b, 0x1a,
-        0xa1, 0xbc, 0xb3, 0xdd, 0x70, 0xff, 0x32, 0x3b, 0x54, 0x30, 0x95, 0xbe,
-        0x6f, 0x91, 0x5c, 0xe9, 0x7e, 0x99, 0xb3, 0x71, 0x9e, 0x15, 0x06, 0xcd,
-        0xf4, 0x35, 0x03, 0x85, 0x90, 0x82, 0x95, 0xf5, 0x50, 0x56, 0x3e, 0xad,
-        0xff, 0x8c, 0xf3, 0x0a, 0x46, 0xd8, 0xe2, 0x19, 0xbf, 0xe5, 0xc9, 0x87,
-        0xba, 0x67, 0x4b, 0xb6, 0xd4, 0xce, 0x31, 0xe8, 0x68, 0xd3, 0x74, 0x84,
-        0xd2, 0xfa, 0xee, 0x0c, 0x95, 0xf6, 0x63, 0x00, 0x41, 0xef, 0xc0, 0x03,
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+        0x55, 0x2e, 0x0d, 0x56, 0x8f, 0xdc, 0x6e, 0xfc, 0x6d, 0xf2, 0xab, 0xc0,
+        0x87, 0x89, 0xef, 0xa9, 0x0b, 0x3b, 0xbb, 0x7c, 0x26, 0x74, 0x66, 0xd9,
+        0x5a, 0x6d, 0x63, 0x0e, 0xec, 0x94, 0x27, 0xdd, 0x27, 0x83, 0x38, 0x15,
+        0xe3, 0x5a, 0x22, 0x9d, 0x9b, 0x13, 0x26, 0xe7, 0xb1, 0x69, 0x29, 0x17,
+        0xea, 0x7a, 0x89, 0xb1, 0xaa, 0xa8, 0x62, 0x43, 0xf7, 0x26, 0xeb, 0xc1,
+        0x7a, 0x64, 0x46, 0x31, 0xa3, 0x47, 0xf1, 0xc0, 0xe8, 0x5d, 0x97, 0xc6,
+        0x61, 0xc9, 0x97, 0xae, 0x2d, 0xbb, 0x03, 0xac, 0xe1, 0x79, 0x75, 0xf9,
+        0x09, 0xb4, 0x89, 0x33, 0xf7, 0x34, 0x9d, 0x6f, 0xcc, 0xc9, 0x26, 0xec,
+        0x41, 0xab, 0x39, 0x1f, 0xcb, 0x73, 0xcd, 0x79, 0xd8, 0x57, 0x25, 0xdf,
+        0xcb, 0xdc, 0x6b, 0x10, 0x6f, 0x77, 0xfd, 0x78, 0xfb, 0x87, 0x06, 0xa8,
+        0x83, 0xf0, 0x6f, 0xf2, 0x91, 0xb1, 0xb6, 0x91, 0xf9, 0x52, 0xf8, 0x1f,
+        0xbb, 0xb1, 0x53, 0xb4, 0x37, 0x76, 0xf2, 0xe3, 0xb8, 0xf6, 0x25, 0x70,
+        0x92, 0x22, 0xf8, 0x45, 0xc1, 0xaf, 0xc3, 0xe7, 0xf5, 0x9d, 0xfe, 0xb7,
+        0x98, 0xd3, 0x41, 0xcd, 0xad, 0x0f, 0xee, 0xc9, 0xad, 0xdf, 0x35, 0xc0,
+        0xda, 0xe3, 0xe2, 0xd6, 0x6e, 0xdf, 0x88, 0xdf, 0x77, 0xe2, 0x96, 0xef,
+        0x63, 0xf6, 0x4c, 0x51, 0xf7, 0xcc, 0x65, 0x8d, 0x11, 0xcf, 0x6f, 0x2d,
+        0xc9, 0x8c, 0xd3, 0x25, 0xb9, 0xd5, 0xc0, 0x4e, 0x78, 0xe3, 0xb3, 0x6e,
+        0xa1, 0x2f, 0x2c, 0xec, 0xcf, 0xe7, 0x29, 0x47, 0x8b, 0xe5, 0xc2, 0x1c,
+        0xff, 0x90, 0x44, 0xc6, 0x68, 0x3b, 0x68, 0x13, 0x3e, 0x05, 0x2c, 0x03,
+        0x4f, 0xdf, 0x6a, 0xcc, 0x7d, 0xbf, 0x9f, 0x1c, 0x29, 0xc3, 0xe0, 0x9d,
+        0x0b, 0x5e, 0x2b, 0xf6, 0xdf, 0x31, 0xd6, 0xb4, 0xec, 0xcc, 0x95, 0x36,
+        0x4b, 0x6d, 0x93, 0xbe, 0xc7, 0x94, 0xff, 0x1e, 0x61, 0xcc, 0x67, 0xb6,
+        0x14, 0xdc, 0x33, 0x27, 0xc7, 0x4f, 0x25, 0x62, 0x49, 0x4b, 0xe7, 0xa5,
+        0xf6, 0x2b, 0xeb, 0xce, 0xc1, 0x2e, 0xd1, 0x86, 0x29, 0xae, 0x81, 0xab,
+        0x12, 0xd7, 0x68, 0x9f, 0xd4, 0xa6, 0xc5, 0x8b, 0x98, 0x67, 0x6e, 0x4b,
+        0xf3, 0x0f, 0xb1, 0xd3, 0xe1, 0x44, 0x65, 0x46, 0xb1, 0x0e, 0x7c, 0x55,
+        0xe7, 0x0e, 0x7b, 0x1c, 0x6a, 0xcc, 0x2d, 0xd1, 0xbf, 0x64, 0x1e, 0xa6,
+        0x43, 0xb2, 0x15, 0x91, 0x57, 0xa0, 0xdf, 0x57, 0xd7, 0xb9, 0xe7, 0xc2,
+        0xbd, 0xc6, 0x47, 0xac, 0xdf, 0x63, 0x49, 0xaf, 0xe6, 0x6b, 0x8b, 0x58,
+        0x2f, 0xf0, 0xab, 0xf1, 0xf0, 0x29, 0xf8, 0x09, 0x5a, 0x27, 0xc1, 0x18,
+        0xeb, 0x2c, 0x7c, 0xca, 0xc6, 0xb8, 0x10, 0x30, 0x62, 0x9a, 0xe7, 0x67,
+        0xc0, 0x8b, 0x77, 0x73, 0x35, 0xc5, 0xea, 0x82, 0xc6, 0x63, 0x6b, 0xeb,
+        0x1d, 0x6a, 0x2f, 0x6a, 0xd5, 0x3e, 0xac, 0x8b, 0x1c, 0xb7, 0xc6, 0x8a,
+        0xfe, 0xf9, 0x16, 0xa9, 0x56, 0xd9, 0x96, 0x81, 0x56, 0xd5, 0x97, 0x20,
+        0x1f, 0x65, 0xcb, 0x1a, 0xb8, 0x6e, 0x75, 0xc3, 0xc1, 0x2f, 0x85, 0xdf,
+        0x08, 0x7e, 0x0f, 0x4a, 0xb6, 0x4c, 0xfe, 0xcd, 0xfc, 0x53, 0x47, 0xd3,
+        0xf3, 0x5b, 0xf4, 0xfb, 0x11, 0xd6, 0xb4, 0x15, 0x7d, 0x3f, 0xad, 0x58,
+        0xdd, 0x8f, 0x9b, 0x32, 0xbe, 0x9b, 0xf2, 0xb1, 0xee, 0xa7, 0x7e, 0x6d,
+        0xed, 0xbf, 0x01, 0x17, 0x24, 0x5e, 0x9d, 0xe0, 0x70, 0x00, 0x00, 0x00 };
 
 static const u32 bnx2_RXP_b06FwData[(0x0/4) + 1] = { 0x0 };
 static const u32 bnx2_RXP_b06FwRodata[(0x24/4) + 1] = {
-        0x0800458c, 0x0800458c, 0x08004504, 0x0800453c, 0x08004570, 0x08004594,
-        0x08004594, 0x08004594, 0x08004474, 0x00000000 };
+        0x08004c28, 0x08004c28, 0x08004ba0, 0x08004bd8, 0x08004c0c, 0x08004c30,
+        0x08004c30, 0x08004c30, 0x08004b10, 0x00000000 };
 
 static struct fw_info bnx2_rxp_fw_06 = {
-        /* Firmware version: 4.4.2 */
+        /* Firmware version: 4.6.16 */
         .ver_major                      = 0x4,
-        .ver_minor                      = 0x4,
-        .ver_fix                        = 0x2,
+        .ver_minor                      = 0x6,
+        .ver_fix                        = 0x10,
 
-        .start_addr                     = 0x080031d0,
+        .start_addr                     = 0x080031d8,
 
         .text_addr                      = 0x08000000,
-        .text_len                       = 0x71cc,
+        .text_len                       = 0x70dc,
         .text_index                     = 0x0,
         .gz_text                        = bnx2_RXP_b06FwText,
         .gz_text_len                    = sizeof(bnx2_RXP_b06FwText),
@@ -2966,15 +2935,15 @@ static struct fw_info bnx2_rxp_fw_06 = {
         .data_index                     = 0x0,
         .data                           = bnx2_RXP_b06FwData,
 
-        .sbss_addr                      = 0x08007220,
-        .sbss_len                       = 0x58,
+        .sbss_addr                      = 0x08007120,
+        .sbss_len                       = 0x54,
         .sbss_index                     = 0x0,
 
-        .bss_addr                       = 0x08007278,
-        .bss_len                        = 0x44c,
+        .bss_addr                       = 0x08007178,
+        .bss_len                        = 0x450,
         .bss_index                      = 0x0,
 
-        .rodata_addr                    = 0x080071cc,
+        .rodata_addr                    = 0x080070dc,
         .rodata_len                     = 0x24,
         .rodata_index                   = 0x0,
         .rodata                         = bnx2_RXP_b06FwRodata,
@@ -2997,639 +2966,571 @@ static const struct cpu_reg cpu_reg_rxp = {
 };
 
 static u8 bnx2_rv2p_proc1[] = {
-        /* Date:        05/13/2008 13:50 */
-        0xa5, 0x56, 0x4f, 0x48, 0x14, 0x61, 0x14, 0x7f, 0x3b, 0xfb, 0x67, 0xd6,
-        0xdd, 0xd9, 0x9d, 0x25, 0xff, 0x6d, 0x66, 0xb8, 0x49, 0x97, 0xd5, 0x15,
-        0xb5, 0x22, 0x3a, 0x18, 0x86, 0x17, 0x21, 0x3b, 0x84, 0x20, 0x45, 0x04,
-        0xd9, 0x12, 0xde, 0x82, 0x0e, 0xd1, 0x29, 0x68, 0xd1, 0x34, 0x8a, 0x0a,
-        0x16, 0x52, 0x30, 0xa2, 0xa4, 0x43, 0x85, 0x04, 0xed, 0x74, 0x0a, 0x12,
-        0x82, 0x8a, 0x88, 0xea, 0x12, 0x78, 0xa8, 0x4b, 0x16, 0x61, 0xd0, 0xa1,
-        0x83, 0x9d, 0xba, 0xe4, 0xf4, 0xbd, 0xef, 0xbd, 0xcf, 0x9d, 0xf9, 0x9c,
-        0x55, 0x21, 0x41, 0x7f, 0xbc, 0x6f, 0xde, 0x7b, 0xdf, 0x9b, 0xdf, 0x7b,
-        0xef, 0x37, 0x66, 0x00, 0xc0, 0x80, 0x92, 0xd3, 0x26, 0x10, 0x52, 0x46,
-        0x28, 0x2e, 0x20, 0x04, 0xf0, 0x18, 0xe8, 0x27, 0x6a, 0x49, 0xbb, 0xd4,
-        0xcd, 0x76, 0x27, 0x41, 0xa9, 0x33, 0x23, 0xfe, 0x9e, 0x85, 0xfe, 0x1c,
-        0x62, 0x18, 0xfa, 0x77, 0x21, 0x1e, 0x84, 0x17, 0xb9, 0xac, 0xc0, 0xbf,
-        0x2e, 0x94, 0xd0, 0x6e, 0xa8, 0x3c, 0x73, 0x92, 0x32, 0xff, 0x12, 0xc7,
-        0x7f, 0x0a, 0x13, 0x1e, 0x28, 0xc4, 0x29, 0x0f, 0x23, 0x74, 0x65, 0x24,
-        0x2c, 0x96, 0xd1, 0x1e, 0x19, 0x81, 0x18, 0xe6, 0x99, 0x12, 0x0e, 0x68,
-        0xb7, 0x86, 0x4a, 0x5d, 0x5c, 0x97, 0x41, 0x7e, 0x5f, 0xca, 0x36, 0x9e,
-        0xc3, 0xd7, 0x01, 0xb4, 0xb7, 0x27, 0x2e, 0x97, 0x11, 0xb3, 0x30, 0x16,
-        0xb7, 0xe8, 0x7d, 0xda, 0x28, 0xed, 0x52, 0x07, 0xc6, 0x09, 0xdf, 0x0e,
-        0xce, 0x1b, 0xc5, 0xbc, 0x3f, 0x5d, 0xca, 0x8b, 0xf9, 0xbc, 0x79, 0x5a,
-        0x45, 0x1e, 0x3c, 0x8f, 0x71, 0x5d, 0x31, 0xad, 0xae, 0x98, 0xa8, 0x83,
-        0x79, 0x00, 0x55, 0x07, 0x62, 0xa3, 0xb8, 0x17, 0xf3, 0xae, 0xf0, 0x7b,
-        0x03, 0x9c, 0xca, 0x71, 0x7e, 0x07, 0xb1, 0xc2, 0xf9, 0xc4, 0x2f, 0xbf,
-        0xc7, 0xfa, 0x3c, 0x8a, 0x27, 0x7f, 0xfd, 0x66, 0x41, 0x3d, 0x57, 0xfd,
-        0xc0, 0x7b, 0x3e, 0x8a, 0x7b, 0xbc, 0xfe, 0xb0, 0x89, 0xff, 0x7b, 0xe1,
-        0xef, 0xcf, 0x4b, 0xe7, 0x6f, 0xab, 0xe7, 0xf9, 0x20, 0xde, 0xa2, 0x1a,
-        0x6f, 0x2f, 0x99, 0xb7, 0x41, 0xd8, 0x6d, 0x64, 0xa5, 0x5f, 0x04, 0x10,
-        0x77, 0x88, 0x02, 0x10, 0x77, 0x32, 0x1e, 0x63, 0xbc, 0xc9, 0x78, 0x83,
-        0xb1, 0x91, 0xb1, 0x81, 0xb1, 0x9e, 0x71, 0x1b, 0xe3, 0x3b, 0xc6, 0x0c,
-        0xa3, 0xcd, 0x98, 0x66, 0x7c, 0xc3, 0x68, 0x31, 0x26, 0xb5, 0x7c, 0x2d,
-        0x8c, 0x71, 0xc6, 0xbb, 0x8c, 0xfb, 0xb5, 0xf8, 0xdf, 0x8c, 0x0b, 0x8c,
-        0xcd, 0x21, 0xc2, 0x43, 0x6c, 0x23, 0xa1, 0x3c, 0xf7, 0x3e, 0xbe, 0xee,
-        0xaf, 0xf5, 0x77, 0xb1, 0xcc, 0xcf, 0xf3, 0xca, 0x2f, 0x2e, 0xf9, 0x83,
-        0x0e, 0xaf, 0xff, 0x9d, 0x0d, 0xfc, 0xc9, 0x6d, 0x20, 0x1f, 0x14, 0x37,
-        0xed, 0x52, 0x1d, 0xb7, 0x38, 0xbe, 0xbe, 0xb2, 0x50, 0x63, 0x8f, 0xfa,
-        0x0a, 0xfa, 0x7c, 0x05, 0xed, 0xd1, 0x4e, 0xde, 0xa3, 0xa3, 0xeb, 0xe6,
-        0x97, 0xe6, 0xd4, 0xbb, 0x87, 0x32, 0x4f, 0x8d, 0x39, 0x7f, 0x1a, 0x2a,
-        0x16, 0xb2, 0x34, 0x17, 0xa5, 0x8d, 0xee, 0xc5, 0x78, 0x9e, 0xcb, 0xbc,
-        0x9a, 0x4f, 0xff, 0x5c, 0xd2, 0x7c, 0xc5, 0xb4, 0xf9, 0xba, 0xb0, 0x09,
-        0xbf, 0x49, 0x8d, 0xa7, 0x73, 0xae, 0xea, 0x97, 0xc1, 0xc7, 0xe3, 0xb1,
-        0x8c, 0xcc, 0x7b, 0xcd, 0x91, 0x66, 0x83, 0x35, 0x85, 0x76, 0x04, 0xae,
-        0x3b, 0x2a, 0x8e, 0xf7, 0xb2, 0x43, 0xdd, 0x43, 0xf1, 0x29, 0x20, 0x9e,
-        0xe7, 0x34, 0x9e, 0x73, 0x5b, 0xd2, 0xa9, 0x15, 0xb7, 0xaa, 0x53, 0xf4,
-        0xbc, 0x0d, 0xbc, 0x3a, 0x15, 0x87, 0xd1, 0x41, 0x5b, 0xde, 0x9b, 0x8e,
-        0x51, 0x9a, 0xe3, 0x36, 0xe1, 0x99, 0x04, 0xe1, 0x72, 0xa2, 0x4e, 0xfc,
-        0x75, 0xdd, 0xb1, 0x24, 0xd9, 0xa7, 0x53, 0x6a, 0x3f, 0x54, 0xbc, 0xaa,
-        0x6b, 0xa3, 0x7a, 0xf0, 0x7e, 0x75, 0x8f, 0xaa, 0x43, 0xdd, 0xe7, 0xe7,
-        0xbf, 0xf6, 0xbd, 0x84, 0x45, 0xc3, 0xcf, 0xc3, 0xed, 0x1e, 0xc2, 0x48,
-        0xaf, 0x84, 0xec, 0x8c, 0x45, 0x71, 0xb3, 0x56, 0x04, 0xed, 0x7d, 0xb3,
-        0x1f, 0x30, 0xbf, 0xb1, 0x67, 0xc6, 0xe1, 0xfa, 0x6c, 0xd5, 0x3f, 0x79,
-        0x0e, 0xed, 0x40, 0xf6, 0x30, 0xcf, 0xc3, 0xb0, 0x9c, 0x7b, 0xb1, 0xd7,
-        0x06, 0x62, 0x0b, 0x94, 0xa4, 0xae, 0x1b, 0x89, 0xd7, 0x32, 0x3e, 0xcc,
-        0xe7, 0xa2, 0x4f, 0xed, 0xfe, 0x7d, 0x59, 0xa2, 0xfe, 0xc7, 0xfd, 0x73,
-        0xd3, 0xed, 0x06, 0xcf, 0x63, 0xa2, 0x32, 0x57, 0x0e, 0xea, 0xd7, 0x73,
-        0xd6, 0xbd, 0x2c, 0x14, 0x7b, 0x6b, 0xe9, 0xb1, 0xfa, 0x0e, 0x2a, 0x3d,
-        0x92, 0xc7, 0x95, 0x52, 0xd8, 0xc7, 0xcb, 0x21, 0x28, 0x04, 0xe5, 0x7f,
-        0xa2, 0xbe, 0x2f, 0x01, 0x7b, 0xb4, 0xd9, 0xbd, 0xbe, 0xfc, 0x69, 0x28,
-        0x04, 0xed, 0x81, 0xa9, 0xed, 0x8d, 0xcd, 0x7b, 0xd3, 0xbc, 0x6e, 0x7e,
-        0x95, 0x4e, 0xe4, 0x36, 0xd4, 0x89, 0xff, 0xd5, 0x05, 0x03, 0x48, 0x17,
-        0x50, 0x8f, 0xfd, 0xf7, 0x9b, 0xaa, 0x7e, 0x6d, 0xff, 0xa9, 0xee, 0x3f,
-        0xab, 0x5b, 0xd3, 0x11, 0xef, 0xfb, 0x07, 0xe9, 0x48, 0x42, 0xd3, 0x85,
-        0x5f, 0xab, 0x55, 0x1d, 0xc1, 0xe7, 0xf3, 0xf3, 0xd4, 0x97, 0x8b, 0xee,
-        0x9a, 0xae, 0xfb, 0xf8, 0xac, 0x63, 0x3e, 0x85, 0x9f, 0x8c, 0x5f, 0xd6,
-        0xe2, 0x55, 0x5f, 0xcf, 0x33, 0xcf, 0x46, 0x1f, 0xcd, 0x95, 0x59, 0xfc,
-        0xa1, 0xf1, 0xdd, 0x5b, 0xc0, 0xbd, 0xb8, 0x04, 0x0e, 0xf3, 0xf6, 0xd9,
-        0xc7, 0x5f, 0x8a, 0xf5, 0xc1, 0x84, 0x47, 0x8e, 0xe2, 0x59, 0xf5, 0x87,
-        0xf0, 0xa1, 0xf4, 0xcf, 0x6c, 0xc2, 0x77, 0x06, 0x1e, 0x38, 0x6a, 0xbf,
-        0x6d, 0x99, 0xaf, 0x87, 0xf5, 0x64, 0x94, 0xf7, 0xfa, 0x5b, 0x82, 0x74,
-        0xa3, 0x38, 0x24, 0xf7, 0x14, 0x9a, 0x78, 0xbf, 0x8b, 0x29, 0xb2, 0x5b,
-        0x52, 0xf4, 0x7f, 0x5b, 0x8f, 0x69, 0x49, 0xbf, 0x96, 0x14, 0x61, 0x53,
-        0x12, 0xe3, 0xb2, 0xf0, 0xfd, 0x88, 0x74, 0x2f, 0x54, 0xf7, 0x5b, 0xdf,
-        0x6b, 0x7e, 0xdf, 0xbd, 0x78, 0xde, 0x24, 0xf6, 0xd4, 0xdb, 0x0f, 0x6b,
-        0x4d, 0x5f, 0xef, 0x71, 0xf5, 0x39, 0xdb, 0xcb, 0xb7, 0x9a, 0xdb, 0x67,
-        0x35, 0xfa, 0x34, 0xe8, 0x2a, 0xdd, 0x6b, 0x1f, 0xc4, 0x7a, 0x6d, 0x48,
-        0x9b, 0x34, 0x1f, 0x84, 0x22, 0x8f, 0x61, 0x62, 0x58, 0xeb, 0x24, 0xeb,
-        0xc4, 0xe4, 0xb8, 0x4c, 0x73, 0x64, 0x52, 0x9d, 0x0f, 0xc8, 0xc1, 0x1f,
-        0x9e, 0x7f, 0x25, 0xcf, 0xd3, 0x4e, 0x98, 0xce, 0xcd, 0x21, 0xc5, 0x97,
-        0x2d, 0xdf, 0x7f, 0x86, 0xf8, 0x3a, 0x39, 0x4d, 0x78, 0x02, 0x0e, 0x4b,
-        0x4c, 0x54, 0xf5, 0x2d, 0x2e, 0x11, 0x52, 0x5e, 0x7d, 0x8b, 0x8a, 0xf2,
-        0xd0, 0xae, 0xf3, 0xf4, 0x51, 0xff, 0x6e, 0x6c, 0xb5, 0x9f, 0x5e, 0x9d,
-        0xc4, 0x7e, 0xea, 0x7a, 0x27, 0xe7, 0x46, 0x9b, 0xcf, 0x72, 0x8d, 0xf9,
-        0xcc, 0xd5, 0x98, 0x6f, 0x5d, 0x2f, 0xae, 0xf2, 0xde, 0x45, 0x20, 0x1a,
-        0x96, 0x1f, 0x24, 0x2b, 0x32, 0x21, 0xfb, 0x6b, 0x4c, 0xd2, 0x87, 0xd4,
-        0x8a, 0x4e, 0x85, 0x24, 0x6f, 0xd6, 0x14, 0xf9, 0x45, 0xe8, 0x3c, 0xab,
-        0xf0, 0xca, 0x84, 0xfa, 0xee, 0xfe, 0x03, 0x65, 0x6c, 0x9a, 0x59, 0x40,
-        0x0c, 0x00, 0x00, 0x00 };
+        /* Date:        02/03/2009 14:20 */
+        0xa5, 0x56, 0x4f, 0x68, 0x14, 0x67, 0x14, 0x7f, 0x33, 0xbb, 0xb3, 0xb3,
+        0x99, 0x9d, 0xd9, 0xdd, 0x92, 0x18, 0x96, 0x18, 0xcc, 0x1a, 0x84, 0x92,
+        0x75, 0xb7, 0x6e, 0x6c, 0x0f, 0x42, 0x03, 0x29, 0xb9, 0x08, 0x35, 0x87,
+        0x12, 0x11, 0x8a, 0x2d, 0x68, 0xb7, 0x22, 0x14, 0x0a, 0xa5, 0x07, 0x8f,
+        0xa5, 0x83, 0x71, 0x53, 0x5a, 0xbc, 0xe4, 0xd0, 0x80, 0x42, 0x35, 0x27,
+        0x5b, 0x62, 0x0e, 0x3b, 0xe0, 0xa1, 0x88, 0xe0, 0x41, 0x8f, 0x7a, 0xaa,
+        0x7f, 0x5a, 0x28, 0x46, 0x29, 0xb5, 0x87, 0x82, 0xc7, 0xde, 0x9a, 0xe9,
+        0xf7, 0xfe, 0x7c, 0xbb, 0x33, 0x5f, 0x66, 0x13, 0xa1, 0x42, 0xfc, 0xf1,
+        0xbd, 0x79, 0xef, 0xfb, 0xde, 0x9f, 0xdf, 0x7b, 0x6f, 0xab, 0x00, 0x60,
+        0x43, 0x18, 0x4d, 0x29, 0x04, 0x2b, 0x67, 0x15, 0x11, 0x00, 0x36, 0x81,
+        0xff, 0x39, 0x3e, 0x9d, 0xc3, 0x23, 0x72, 0x3e, 0xcc, 0x10, 0x1e, 0xae,
+        0xaa, 0xff, 0x3f, 0x85, 0xf9, 0x3a, 0x62, 0x0e, 0xe6, 0x0f, 0x22, 0x1e,
+        0x85, 0xbb, 0xf5, 0x9a, 0xc2, 0x7f, 0x63, 0x08, 0xf1, 0x1c, 0xf4, 0x7e,
+        0x8e, 0x4a, 0x74, 0xff, 0x96, 0xd8, 0xff, 0x9a, 0x63, 0x3c, 0xd6, 0xac,
+        0x12, 0x3e, 0x5a, 0xc5, 0xf7, 0x4e, 0x9d, 0x82, 0x02, 0xda, 0x5d, 0x50,
+        0x17, 0x23, 0x96, 0xd4, 0x83, 0x45, 0xb2, 0x03, 0xbb, 0xa2, 0x70, 0x12,
+        0x9e, 0x2f, 0xa0, 0xfe, 0x1b, 0xde, 0xa5, 0x55, 0xc4, 0x12, 0x74, 0x9a,
+        0xa8, 0x77, 0x00, 0xb2, 0xf5, 0x6a, 0x4a, 0x0f, 0xe5, 0x11, 0x84, 0x4d,
+        0xc4, 0x11, 0x80, 0x56, 0xf2, 0x3d, 0xd7, 0x0a, 0x5b, 0x68, 0xff, 0x85,
+        0xbc, 0xb7, 0x4f, 0xee, 0x51, 0x71, 0x47, 0x88, 0x3d, 0xb1, 0x53, 0x7f,
+        0x2d, 0x96, 0xb3, 0xfe, 0x67, 0x4a, 0x4f, 0xc7, 0xe3, 0x73, 0xde, 0xa6,
+        0x38, 0x1e, 0x57, 0xe2, 0x79, 0xb6, 0xaa, 0xf3, 0x86, 0xfa, 0xbf, 0xc7,
+        0x69, 0x7d, 0xd8, 0x43, 0xff, 0x89, 0xd2, 0x4f, 0xdf, 0xcb, 0xf2, 0x5f,
+        0x06, 0xf2, 0x99, 0xf4, 0xf7, 0xad, 0x06, 0xfa, 0xe7, 0x00, 0x34, 0x24,
+        0x8f, 0xa4, 0xff, 0x30, 0xe6, 0x78, 0xe6, 0xe0, 0x90, 0x5d, 0x23, 0xbd,
+        0x3c, 0xd4, 0x28, 0x3f, 0x1c, 0xef, 0x01, 0xc1, 0x25, 0xc1, 0x6b, 0x82,
+        0x3f, 0x08, 0xc2, 0xff, 0xc4, 0xad, 0x21, 0xf2, 0x7d, 0x82, 0xfb, 0x0d,
+        0xf9, 0x2d, 0xc1, 0xb7, 0x0c, 0x7b, 0xcf, 0x62, 0x7c, 0xac, 0xbf, 0xcb,
+        0xf9, 0x5d, 0xc3, 0xfe, 0x4b, 0xe0, 0xfc, 0x58, 0x46, 0xde, 0x36, 0x85,
+        0x87, 0x58, 0x77, 0xf9, 0x3e, 0xa3, 0xf5, 0x84, 0x37, 0x8d, 0xa4, 0xfe,
+        0x8d, 0x5d, 0xf4, 0x59, 0x6d, 0x61, 0x26, 0xcb, 0xee, 0x7a, 0x2c, 0x79,
+        0x14, 0x7b, 0xaf, 0x77, 0x67, 0x08, 0xef, 0xe7, 0x32, 0x79, 0x3f, 0x2e,
+        0x71, 0xa8, 0xa6, 0x23, 0xfb, 0xdb, 0x16, 0xf3, 0xdb, 0x11, 0x5e, 0xee,
+        0xc6, 0x63, 0xe1, 0xd5, 0x8c, 0xe6, 0x57, 0x9a, 0x57, 0xcc, 0x8f, 0x82,
+        0xc1, 0x8f, 0x6f, 0xf7, 0xc8, 0x4b, 0xc9, 0x88, 0x6f, 0x39, 0xd6, 0xf9,
+        0xb6, 0x45, 0x7c, 0xb1, 0x50, 0xa5, 0x7b, 0xbf, 0x8b, 0xe8, 0x38, 0xe6,
+        0xaf, 0xe0, 0x39, 0x0f, 0x97, 0x23, 0x6d, 0x27, 0xfd, 0xd4, 0xd0, 0xef,
+        0xb0, 0x7d, 0x20, 0x9f, 0x6d, 0x47, 0xfb, 0xc9, 0x72, 0x0f, 0xf0, 0x3c,
+        0xda, 0x5b, 0x37, 0xf2, 0x56, 0xa7, 0xb8, 0x41, 0xe2, 0x07, 0x23, 0x7e,
+        0x9d, 0xbf, 0x57, 0xc2, 0xf7, 0x49, 0x95, 0x0f, 0xfe, 0x3e, 0x05, 0xfa,
+        0x7e, 0x9c, 0x0b, 0x45, 0x38, 0x7b, 0xbc, 0x42, 0xfe, 0x94, 0x0b, 0x7c,
+        0xcd, 0x87, 0x15, 0xc6, 0x73, 0x1e, 0xe3, 0x9f, 0x9e, 0xca, 0x2d, 0xc4,
+        0xf1, 0xf9, 0x12, 0x9f, 0x3f, 0x09, 0xf0, 0xde, 0x51, 0xf5, 0xb0, 0xb6,
+        0xd7, 0x7e, 0xed, 0xe6, 0x0f, 0xbe, 0xaf, 0xdf, 0xd1, 0x7e, 0xe8, 0xf7,
+        0xd2, 0x75, 0x19, 0xfe, 0x2e, 0x63, 0xc7, 0x4e, 0xe7, 0x21, 0x3f, 0xcb,
+        0x78, 0xb5, 0x4d, 0x50, 0x5b, 0xf3, 0xd9, 0xee, 0x8a, 0x9f, 0xc7, 0xf3,
+        0x3b, 0x57, 0x1e, 0xe0, 0xfd, 0xf6, 0xd1, 0xb5, 0x48, 0xfc, 0xab, 0xe8,
+        0xba, 0x92, 0x1c, 0xa6, 0x81, 0xcf, 0x4b, 0xc2, 0x93, 0x25, 0xe2, 0x71,
+        0x59, 0x7d, 0x42, 0x9c, 0x80, 0xd0, 0x26, 0x3d, 0xef, 0x3e, 0xd9, 0xe7,
+        0x44, 0xae, 0xea, 0x37, 0x9d, 0xe6, 0xff, 0x16, 0xf3, 0xa2, 0x98, 0xe6,
+        0xd3, 0x7c, 0x62, 0xce, 0x25, 0xf3, 0x61, 0xf5, 0x79, 0xb4, 0xb3, 0x8e,
+        0xe9, 0x7a, 0x3d, 0x5a, 0xd5, 0xf9, 0x61, 0xbe, 0xb2, 0x9e, 0x2a, 0x56,
+        0x8b, 0xd5, 0xc3, 0xb6, 0x24, 0x72, 0x56, 0xbe, 0xb7, 0x4c, 0xde, 0x66,
+        0xf1, 0xbe, 0x6a, 0xf0, 0xb8, 0x21, 0xbc, 0x1f, 0xe9, 0xad, 0xbf, 0xd6,
+        0x7e, 0xb8, 0x29, 0xbc, 0xaf, 0x0e, 0xf6, 0xc3, 0x26, 0xed, 0x27, 0x75,
+        0x26, 0xf5, 0x5e, 0x98, 0x4b, 0xd5, 0xe9, 0x3d, 0xc8, 0xec, 0xef, 0xab,
+        0x72, 0x4f, 0x5b, 0xfa, 0xbc, 0x90, 0xd8, 0x23, 0xa4, 0x5e, 0x06, 0xf2,
+        0xc3, 0x35, 0xfa, 0x74, 0x2c, 0x96, 0x77, 0x54, 0xbf, 0x65, 0xc5, 0xeb,
+        0xc2, 0x5f, 0xc2, 0x83, 0x0e, 0xf5, 0x93, 0x33, 0xf6, 0xf9, 0xed, 0x54,
+        0x9d, 0x00, 0x0e, 0xea, 0xfd, 0x90, 0xf4, 0x2b, 0xb9, 0xdf, 0xf0, 0xbe,
+        0x1a, 0x74, 0x66, 0x93, 0x7b, 0xee, 0x72, 0xbf, 0xdf, 0x03, 0xea, 0xa3,
+        0xf2, 0x8e, 0xbe, 0xd4, 0xf3, 0xac, 0xde, 0x4c, 0xf6, 0xf7, 0x98, 0xcc,
+        0x2f, 0x5b, 0xf6, 0x73, 0xc9, 0x8c, 0x53, 0xed, 0xbd, 0xec, 0x7a, 0x71,
+        0xbc, 0xff, 0x6c, 0xbf, 0xde, 0xbc, 0xdb, 0xab, 0xee, 0x9e, 0x51, 0xf7,
+        0xbf, 0xb7, 0x75, 0x1e, 0x6d, 0x27, 0x6b, 0xbf, 0x7f, 0xa0, 0xee, 0x15,
+        0x7d, 0x99, 0x1b, 0x67, 0xea, 0x59, 0x7c, 0x2d, 0xee, 0xd0, 0x4b, 0xcf,
+        0x2f, 0xed, 0xe7, 0xc6, 0x06, 0xd7, 0xfd, 0xa3, 0xb8, 0xbf, 0x97, 0x52,
+        0xf3, 0x75, 0x44, 0xea, 0xac, 0xf4, 0xc8, 0xbf, 0xa7, 0xdb, 0x83, 0x79,
+        0x9c, 0xe4, 0xcd, 0x49, 0xe1, 0xab, 0x3d, 0xb7, 0x4e, 0xfd, 0xe1, 0x76,
+        0x5e, 0x1a, 0x75, 0x98, 0x6d, 0x62, 0xfd, 0xbf, 0x86, 0x48, 0xfc, 0xfc,
+        0x2d, 0xe5, 0x6f, 0x20, 0xfd, 0x55, 0x80, 0x9f, 0x22, 0x1d, 0x97, 0xae,
+        0x1b, 0xe3, 0x8f, 0x4d, 0xe9, 0x93, 0x7e, 0x7c, 0xf8, 0xee, 0xa2, 0xbc,
+        0x5b, 0x85, 0x1b, 0x91, 0x9e, 0x63, 0x38, 0xd7, 0x5c, 0x68, 0xcb, 0xdc,
+        0x3c, 0x2b, 0xf3, 0xeb, 0x85, 0xc7, 0xf3, 0xb1, 0x73, 0x82, 0x78, 0x08,
+        0xe3, 0x32, 0xc7, 0x3a, 0x01, 0x9f, 0x27, 0x02, 0xfe, 0x7d, 0xd8, 0x76,
+        0x7d, 0xd2, 0x9b, 0x08, 0x18, 0xc7, 0x4b, 0x68, 0x57, 0x83, 0x3f, 0x16,
+        0x49, 0xbd, 0x39, 0x98, 0x63, 0xe6, 0xfc, 0x92, 0x38, 0xdf, 0x46, 0xb9,
+        0xda, 0x93, 0xd3, 0x7c, 0xe6, 0x3a, 0xfb, 0x7d, 0x5e, 0x5f, 0x97, 0xaa,
+        0xd4, 0x2b, 0xc9, 0x3c, 0xeb, 0x3e, 0xba, 0x69, 0xe4, 0x57, 0xd7, 0xe7,
+        0xcd, 0x58, 0xcf, 0xf7, 0xe9, 0xe3, 0xe8, 0x6f, 0x05, 0xca, 0x2e, 0xf3,
+        0x82, 0x51, 0xdd, 0x63, 0xbb, 0x68, 0x36, 0xd9, 0x95, 0x79, 0xd8, 0xbd,
+        0x48, 0xd7, 0x2c, 0x76, 0xb5, 0x7c, 0x81, 0x1a, 0x61, 0x69, 0xe3, 0x1e,
+        0xc9, 0xcb, 0x51, 0x8e, 0xe5, 0xee, 0x09, 0x9d, 0xaf, 0x0a, 0xc5, 0xbf,
+        0xc6, 0xf9, 0xfa, 0xf8, 0x7b, 0xc6, 0xd3, 0xf0, 0x3e, 0xa1, 0x37, 0x98,
+        0xe3, 0x45, 0x42, 0x08, 0x92, 0x73, 0xdc, 0x51, 0xee, 0x55, 0xc9, 0x9f,
+        0x41, 0xfd, 0xcc, 0xfd, 0xb8, 0x5b, 0x1d, 0x47, 0x13, 0xfc, 0xd3, 0x75,
+        0x34, 0xe7, 0x39, 0xf1, 0xc4, 0xe0, 0x63, 0x77, 0x08, 0x1f, 0xad, 0x21,
+        0x7c, 0x36, 0xe7, 0xd6, 0x57, 0xd2, 0xc7, 0x79, 0x70, 0x72, 0xb4, 0x70,
+        0xfd, 0xfc, 0x32, 0xd5, 0xd5, 0xee, 0xf2, 0x0f, 0x08, 0xdf, 0x59, 0xb1,
+        0x28, 0x5f, 0xfe, 0x0a, 0xeb, 0xe5, 0x59, 0x5e, 0xd3, 0xf8, 0xcd, 0xb2,
+        0xfe, 0xbd, 0xf1, 0x1f, 0xb6, 0x34, 0x9b, 0xb9, 0xa0, 0x0c, 0x00, 0x00,
+        0x00 };
 
 static u8 bnx2_rv2p_proc2[] = {
-        /* Date:        05/13/2008 13:50 */
-        0xad, 0x58, 0x4d, 0x6c, 0x54, 0x55, 0x14, 0xbe, 0x7d, 0xf3, 0xdb, 0x99,
-        0x37, 0x3f, 0xb4, 0xb5, 0xbf, 0x68, 0xa1, 0x95, 0xd2, 0x92, 0x29, 0x94,
-        0x69, 0x01, 0x95, 0x44, 0x49, 0x31, 0x05, 0x94, 0x84, 0x52, 0x5d, 0x10,
-        0x37, 0xd0, 0x22, 0xa5, 0x83, 0x2d, 0x69, 0x28, 0x61, 0xc1, 0xc6, 0x09,
-        0xc5, 0xe2, 0x62, 0x12, 0x2d, 0xb1, 0x14, 0x8c, 0xc1, 0x46, 0x37, 0xc4,
-        0xb8, 0x19, 0x83, 0x52, 0xd4, 0xc4, 0x84, 0x60, 0x43, 0x70, 0x01, 0x26,
-        0x9a, 0xe0, 0x42, 0x13, 0xa2, 0x50, 0x0b, 0x36, 0x58, 0x7e, 0x46, 0x17,
-        0xca, 0x78, 0xef, 0xf9, 0xce, 0x7d, 0x7d, 0x6f, 0x3a, 0xb5, 0x2c, 0xe8,
-        0xe6, 0xeb, 0xbd, 0xef, 0xdc, 0x73, 0xcf, 0xcf, 0x77, 0xcf, 0x39, 0x6d,
-        0x54, 0x08, 0xe1, 0x16, 0xc9, 0x74, 0xb5, 0x44, 0x11, 0x32, 0x0a, 0xfc,
-        0x12, 0xb2, 0x42, 0x78, 0xca, 0xd5, 0x5a, 0x18, 0x82, 0x7f, 0x56, 0x44,
-        0x09, 0x7e, 0x48, 0xab, 0xef, 0x3e, 0xf1, 0xaa, 0x81, 0xef, 0x6e, 0xa1,
-        0x30, 0x22, 0x44, 0x52, 0x61, 0x94, 0x71, 0x3d, 0x63, 0x86, 0x31, 0x58,
-        0x00, 0x6c, 0x66, 0x7c, 0xc0, 0xfb, 0x77, 0x78, 0x7d, 0x93, 0xf1, 0x6f,
-        0xde, 0x37, 0x19, 0x6f, 0xf3, 0xfe, 0xf3, 0x06, 0x30, 0xc1, 0xfb, 0x3f,
-        0x4b, 0xd4, 0x76, 0xa9, 0xf5, 0x74, 0x56, 0x24, 0xe5, 0x19, 0x21, 0xc5,
-        0x1b, 0xf4, 0xbe, 0x49, 0x90, 0x6c, 0x80, 0xdd, 0xaf, 0x2c, 0x51, 0x72,
-        0xbf, 0xe7, 0x91, 0x53, 0xfb, 0x37, 0xb2, 0xd0, 0x3b, 0xeb, 0xaf, 0xe1,
-        0x51, 0xe7, 0x96, 0xb6, 0x9c, 0x18, 0xc6, 0xf9, 0x9d, 0x4b, 0xb0, 0xff,
-        0x54, 0x4c, 0xf9, 0xef, 0x15, 0x49, 0x46, 0xd1, 0xa8, 0xd0, 0x28, 0x48,
-        0x36, 0xea, 0x40, 0x41, 0xfe, 0x97, 0x61, 0xac, 0x3a, 0x43, 0xd0, 0x1b,
-        0x70, 0xe8, 0x2d, 0x9d, 0xa3, 0xf7, 0x5a, 0xa1, 0x5d, 0xff, 0x67, 0xac,
-        0x3f, 0xb0, 0xa0, 0xfe, 0xae, 0x10, 0xb0, 0x38, 0x96, 0xef, 0x9e, 0xc2,
-        0x05, 0xec, 0xdf, 0xb7, 0xa0, 0xfe, 0xc3, 0x96, 0xfd, 0x3a, 0x6e, 0xfa,
-        0x3b, 0xb0, 0x1a, 0x62, 0x9f, 0x24, 0x57, 0xe9, 0x78, 0x6a, 0xbf, 0xd9,
-        0x3e, 0x17, 0x70, 0x43, 0x8c, 0x20, 0xb5, 0x9b, 0x03, 0xdc, 0x56, 0xa7,
-        0xee, 0x2d, 0x12, 0x6e, 0x43, 0xe9, 0x59, 0xee, 0xf7, 0x9e, 0xc7, 0xfe,
-        0x8e, 0x08, 0xf0, 0x75, 0x76, 0xe4, 0x46, 0x40, 0x05, 0x26, 0x9b, 0xed,
-        0x0e, 0xb2, 0x7e, 0xa4, 0x55, 0x24, 0x83, 0x38, 0x3f, 0x61, 0x2a, 0xfb,
-        0x2e, 0xcb, 0xfc, 0xa9, 0xb5, 0x4b, 0x24, 0x23, 0x4e, 0x3f, 0x3e, 0x14,
-        0x90, 0x5b, 0xb4, 0x1c, 0xbb, 0xef, 0x76, 0x63, 0x5d, 0xf5, 0x71, 0x94,
-        0xe4, 0x4f, 0xa6, 0xb5, 0x1f, 0x6a, 0x5f, 0xbe, 0x83, 0x08, 0xf4, 0x88,
-        0x1a, 0x3f, 0x5d, 0x86, 0x38, 0xc9, 0x4b, 0x1b, 0xb5, 0x3e, 0xfc, 0x9c,
-        0x58, 0xa6, 0xf9, 0x85, 0x75, 0xb7, 0x97, 0xa0, 0xbc, 0x73, 0x48, 0xd9,
-        0x1b, 0x11, 0xbb, 0x0c, 0x65, 0x88, 0xc1, 0xfe, 0xb9, 0xfc, 0xe6, 0x17,
-        0x90, 0xff, 0xa6, 0xda, 0x24, 0xdb, 0xba, 0x9b, 0x71, 0xae, 0x24, 0x0e,
-        0x1c, 0x89, 0x7b, 0x14, 0xc4, 0xba, 0x07, 0x68, 0xb9, 0xf2, 0xd7, 0xd5,
-        0x7e, 0x92, 0x4b, 0x36, 0x6a, 0xfe, 0xea, 0xb8, 0x2b, 0x7f, 0xdf, 0xc9,
-        0x5a, 0xfc, 0xaf, 0x45, 0x7c, 0x6e, 0x2e, 0x53, 0xf2, 0x32, 0x48, 0x35,
-        0xb8, 0xa7, 0x23, 0x91, 0x8f, 0xff, 0x6f, 0xdb, 0xf8, 0xff, 0x68, 0x79,
-        0xdc, 0x40, 0xfe, 0x6f, 0xe0, 0x38, 0x2c, 0x61, 0xbe, 0x2c, 0xce, 0xc3,
-        0x97, 0x08, 0xfd, 0x7e, 0xab, 0x35, 0x4a, 0x71, 0xdc, 0x86, 0xfd, 0xe3,
-        0x6d, 0xe7, 0x10, 0xef, 0x2d, 0x14, 0x07, 0x11, 0x38, 0xfa, 0x39, 0x4e,
-        0x75, 0x86, 0xd4, 0xfa, 0xb5, 0x96, 0xee, 0x2f, 0xb1, 0xee, 0x72, 0xa9,
-        0xf5, 0x0e, 0x73, 0xf7, 0x38, 0xe4, 0x3d, 0x83, 0x51, 0x8a, 0xdf, 0x36,
-        0xbe, 0x65, 0x8b, 0xab, 0x40, 0x41, 0xca, 0x3b, 0x48, 0x4b, 0x73, 0x82,
-        0xbe, 0x47, 0xc5, 0xb1, 0x34, 0xbe, 0xef, 0x0f, 0x52, 0x7d, 0x90, 0xfe,
-        0x91, 0x5c, 0x49, 0xc2, 0x8b, 0xf3, 0xa9, 0x61, 0x3f, 0xf9, 0x3b, 0x75,
-        0x56, 0xad, 0xb7, 0xc6, 0xa6, 0x20, 0x1f, 0x4b, 0x0c, 0xb1, 0x62, 0x03,
-        0xf1, 0xbb, 0x65, 0x40, 0x9e, 0xe9, 0x15, 0x70, 0x53, 0xfe, 0x0a, 0x84,
-        0xd9, 0x06, 0x7c, 0x8b, 0xbe, 0xff, 0x53, 0x90, 0xa2, 0x78, 0x6d, 0x0c,
-        0xbb, 0xcf, 0xe9, 0xf8, 0x30, 0x46, 0xb4, 0x5f, 0xc0, 0x47, 0xe5, 0xef,
-        0x90, 0xa9, 0x79, 0xcb, 0x79, 0x6b, 0x98, 0x8f, 0xb7, 0xc0, 0xb6, 0x3a,
-        0xa0, 0xb7, 0x56, 0xc9, 0x79, 0xf2, 0xf0, 0xd7, 0x99, 0x17, 0xce, 0xab,
-        0x8d, 0x67, 0x04, 0x92, 0x5f, 0x0e, 0xbe, 0x49, 0x3e, 0x53, 0x5d, 0x92,
-        0xf1, 0xd4, 0xbc, 0x51, 0x8a, 0x7c, 0xe2, 0x0d, 0xd6, 0x97, 0x60, 0xbf,
-        0x7a, 0xd9, 0xaf, 0xe9, 0x80, 0x8e, 0xbb, 0xf6, 0x07, 0x78, 0xcc, 0x04,
-        0xbf, 0x3a, 0x12, 0xda, 0x2f, 0x27, 0x7f, 0xd9, 0x9e, 0xd4, 0xb7, 0x35,
-        0xf8, 0xa5, 0xaa, 0x16, 0x68, 0xf9, 0x59, 0x47, 0xef, 0x25, 0x5c, 0x36,
-        0xae, 0xed, 0x50, 0x79, 0xfd, 0x4b, 0xe6, 0x15, 0xf9, 0x39, 0x99, 0xb6,
-        0xbf, 0xd3, 0xca, 0x3c, 0xef, 0xd4, 0xf9, 0x6e, 0xb4, 0xff, 0xfb, 0x43,
-        0x54, 0x88, 0x5a, 0xae, 0x4c, 0x3a, 0xdf, 0x05, 0xf8, 0xef, 0xb3, 0x78,
-        0x54, 0xb2, 0x96, 0xe3, 0xc4, 0x58, 0xba, 0x4e, 0xe9, 0x6b, 0x67, 0xfd,
-        0x4d, 0xac, 0xdf, 0xb4, 0xbd, 0x4b, 0x65, 0xdf, 0x93, 0xd6, 0x7b, 0xd4,
-        0xf9, 0x99, 0x7d, 0x97, 0x3a, 0x4e, 0x74, 0x7f, 0xec, 0xca, 0xa4, 0x3a,
-        0x5f, 0xb5, 0xc0, 0x3b, 0x2d, 0xb6, 0xf4, 0xfd, 0x68, 0xbd, 0x47, 0xf5,
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-        0xf3, 0xfd, 0x1f, 0xfe, 0xac, 0x5e, 0x92, 0x80, 0x14, 0x00, 0x00, 0x00 };
+        /* Date:        02/03/2009 14:20 */
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+        0x86, 0xb7, 0xc1, 0xba, 0x48, 0x5d, 0x7d, 0xfc, 0x62, 0x50, 0xbc, 0x0a,
+        0xf0, 0x4c, 0xf1, 0x98, 0xe7, 0x90, 0xca, 0xa7, 0xe1, 0x8b, 0x36, 0x14,
+        0xa7, 0x33, 0x62, 0xaf, 0x2a, 0x71, 0x9d, 0x95, 0xb8, 0x7e, 0x4f, 0x9a,
+        0xbc, 0x9b, 0x78, 0x80, 0x0b, 0x5e, 0x3c, 0x86, 0x6f, 0xb8, 0x1f, 0x66,
+        0xaa, 0x01, 0x7f, 0x6a, 0x37, 0x06, 0xf0, 0x47, 0xef, 0x20, 0xd0, 0x8b,
+        0x73, 0x88, 0xfb, 0xa4, 0xa3, 0xfb, 0xaa, 0xf1, 0x43, 0xd7, 0x75, 0x43,
+        0xf8, 0x6a, 0xa9, 0x78, 0xfd, 0xfd, 0xd9, 0xd3, 0xa6, 0x3f, 0x83, 0xfd,
+        0x62, 0xe2, 0x3f, 0x97, 0xe6, 0x01, 0x34, 0x71, 0x7b, 0x3d, 0xd8, 0x0f,
+        0xe0, 0x7f, 0xdc, 0xe3, 0x51, 0xd7, 0x3e, 0xc9, 0x93, 0x60, 0xee, 0x69,
+        0x6d, 0x6f, 0x5a, 0xec, 0x8f, 0x88, 0x7d, 0xc7, 0xd7, 0x8f, 0xda, 0xbf,
+        0x3e, 0xaf, 0x0f, 0x4d, 0x7d, 0x9a, 0xfd, 0x68, 0xf2, 0xc4, 0xe7, 0x17,
+        0x6f, 0xaf, 0xeb, 0xfd, 0xbd, 0xdb, 0xf4, 0xe7, 0x23, 0x9e, 0xbd, 0xef,
+        0xbc, 0x7e, 0xd4, 0xdf, 0x53, 0xf4, 0x9c, 0x88, 0xc1, 0x39, 0xf3, 0x87,
+        0x9a, 0x33, 0x1c, 0x87, 0xed, 0xac, 0xca, 0x5c, 0x99, 0xd3, 0xe7, 0xe4,
+        0xc5, 0xef, 0xbc, 0x99, 0xeb, 0xca, 0x6f, 0x99, 0x3f, 0xc7, 0xfd, 0x73,
+        0x24, 0xde, 0xe6, 0x3c, 0xc0, 0x64, 0xb1, 0x35, 0x5f, 0xc8, 0x3b, 0xec,
+        0xaa, 0xfc, 0x9b, 0x39, 0x30, 0x6e, 0xec, 0x43, 0x74, 0x47, 0xfd, 0xfa,
+        0xad, 0xf5, 0x89, 0x3c, 0x60, 0x9e, 0x6d, 0x6c, 0xe2, 0xde, 0xfd, 0x67,
+        0xb3, 0x79, 0x1f, 0x07, 0xea, 0xe8, 0x12, 0xd7, 0x3d, 0xae, 0xea, 0xcf,
+        0xef, 0x03, 0xef, 0x9e, 0xb7, 0xa2, 0x7a, 0x5d, 0xe5, 0x42, 0x78, 0xf5,
+        0xfa, 0xe3, 0xb2, 0xbf, 0x80, 0xb9, 0xf4, 0xda, 0x29, 0xce, 0xff, 0x7b,
+        0x67, 0x37, 0x78, 0x3e, 0x7d, 0xf8, 0xc6, 0x35, 0x1d, 0xd7, 0xa3, 0xb4,
+        0x3e, 0xe7, 0xb0, 0x3f, 0xa5, 0xdd, 0x50, 0xdf, 0x78, 0xb6, 0xb5, 0x1e,
+        0x78, 0xd7, 0xa0, 0x5e, 0x4a, 0x6f, 0x36, 0x78, 0xaf, 0x36, 0xfd, 0x43,
+        0xbf, 0xec, 0xcf, 0x40, 0xdf, 0xf4, 0x73, 0xb0, 0xae, 0x77, 0x36, 0x9b,
+        0x73, 0xd7, 0xe4, 0x3b, 0xc8, 0xd3, 0xa3, 0xe3, 0x7e, 0xbb, 0x83, 0xb4,
+        0x56, 0x87, 0xdd, 0x69, 0xe9, 0xc3, 0x13, 0x72, 0xf0, 0x4f, 0xc9, 0x0c,
+        0x9f, 0x53, 0x7e, 0x81, 0x79, 0x46, 0xb9, 0x14, 0xe2, 0x2c, 0x1f, 0xc6,
+        0xf7, 0x72, 0x1a, 0xeb, 0x3d, 0x69, 0xdc, 0x6f, 0xd3, 0x71, 0x87, 0xf5,
+        0x7b, 0xd2, 0xc0, 0x9c, 0xf4, 0xeb, 0x9a, 0x37, 0x8f, 0x80, 0x2b, 0x31,
+        0x7f, 0xff, 0x46, 0xe8, 0x7a, 0x4c, 0x2b, 0xa8, 0xcb, 0xba, 0x80, 0xfe,
+        0x2b, 0x0d, 0x39, 0xfc, 0x7d, 0xa6, 0x80, 0xb9, 0x4a, 0x03, 0xc1, 0xfb,
+        0x50, 0xfa, 0xb9, 0xa7, 0x39, 0xb7, 0xfc, 0x73, 0x2d, 0x31, 0xb6, 0x5c,
+        0x0f, 0xde, 0x97, 0x2b, 0x31, 0xff, 0x9c, 0xd0, 0x76, 0x59, 0x54, 0xf3,
+        0xc1, 0x3f, 0xd7, 0xc2, 0x52, 0xef, 0xbf, 0x64, 0x0e, 0xec, 0xa4, 0x9b,
+        0x75, 0xc4, 0xb5, 0x56, 0x6f, 0xcd, 0xb3, 0x39, 0xcf, 0xd8, 0x83, 0xdf,
+        0x26, 0x8e, 0xa6, 0x7d, 0x9c, 0x7f, 0x4a, 0xfc, 0xfc, 0x85, 0xdf, 0x21,
+        0x39, 0x89, 0x47, 0xdb, 0xc5, 0xfa, 0x01, 0x99, 0xb3, 0xae, 0x27, 0x07,
+        0xe7, 0xe3, 0x34, 0xfb, 0xd5, 0x49, 0x78, 0x77, 0xe4, 0xbc, 0xbe, 0x36,
+        0xf1, 0x75, 0x8d, 0x00, 0x97, 0x46, 0x4c, 0x1d, 0x4c, 0xbd, 0x4c, 0x7d,
+        0x50, 0xc7, 0xdc, 0x28, 0xab, 0x4d, 0x94, 0x47, 0x99, 0xa7, 0x23, 0xe5,
+        0x3f, 0x83, 0xef, 0xb4, 0xa3, 0x45, 0xad, 0xff, 0x16, 0x7d, 0xc3, 0x7d,
+        0x44, 0xf4, 0x83, 0x60, 0x73, 0x1e, 0x49, 0x01, 0x02, 0xef, 0xb2, 0x30,
+        0x5d, 0x8f, 0xca, 0xf2, 0xb8, 0xe9, 0x9b, 0x60, 0xdf, 0x5d, 0xe1, 0x77,
+        0xfa, 0xc2, 0xe6, 0xd6, 0xfe, 0x37, 0xf1, 0x69, 0xbd, 0x61, 0xe1, 0xa1,
+        0x4d, 0xa5, 0xfd, 0x78, 0xd7, 0x74, 0xc4, 0xc1, 0xf3, 0x8e, 0xb8, 0xbf,
+        0x4e, 0x8a, 0x0f, 0x89, 0xb8, 0x16, 0x77, 0x75, 0x26, 0x38, 0x8e, 0x4b,
+        0x5f, 0xdf, 0xe2, 0xcf, 0x1f, 0x2d, 0xa7, 0xb0, 0xde, 0x5d, 0x82, 0xf9,
+        0x08, 0xf3, 0x35, 0x4c, 0x17, 0xc0, 0xe7, 0x0f, 0x96, 0x80, 0xef, 0xd3,
+        0x21, 0xd8, 0xe9, 0x7c, 0x9b, 0xef, 0x71, 0xbb, 0x1b, 0xe9, 0xac, 0x2d,
+        0x0b, 0x4f, 0xf3, 0x16, 0xff, 0x3f, 0xd2, 0xa0, 0xb4, 0xbc, 0x5b, 0xa5,
+        0xcf, 0xc0, 0xcf, 0x88, 0xaf, 0xce, 0xdb, 0xf1, 0x55, 0xa3, 0xa3, 0xf8,
+        0x88, 0xed, 0xc2, 0x5b, 0xbb, 0x95, 0xb7, 0xa6, 0x8e, 0x79, 0xab, 0x2d,
+        0x4f, 0xf7, 0x05, 0x79, 0x1a, 0x13, 0x9e, 0xfe, 0xed, 0xcd, 0xd3, 0xad,
+        0x76, 0x31, 0xc7, 0x6f, 0xfe, 0x6f, 0xbc, 0x05, 0x1e, 0x18, 0xd4, 0xe7,
+        0x77, 0xfb, 0xf8, 0x67, 0xfc, 0xf2, 0xcf, 0x9f, 0x43, 0x6a, 0xae, 0xfe,
+        0x07, 0x92, 0xe2, 0x88, 0x7c, 0xe0, 0x0d, 0x00, 0x00, 0x00 };
 
 static u8 bnx2_TPAT_b06FwText[] = {
-        0xbd, 0x59, 0x6d, 0x70, 0x5b, 0x55, 0x7a, 0x7e, 0xae, 0x74, 0x25, 0x5d,
-        0xdb, 0xb2, 0x75, 0x8d, 0x95, 0x20, 0xb7, 0x2e, 0xd6, 0x8d, 0xaf, 0x6c,
-        0x11, 0xb9, 0xe1, 0x2a, 0x36, 0x45, 0x19, 0xee, 0x94, 0x1b, 0x7f, 0x21,
-        0x92, 0x10, 0x94, 0x42, 0x5b, 0x67, 0x96, 0x19, 0x4c, 0xe2, 0x4d, 0x4c,
-        0x08, 0x6c, 0xba, 0xcb, 0x4c, 0xdd, 0xd9, 0x4c, 0x23, 0xfc, 0x15, 0x93,
-        0xc8, 0x16, 0x6b, 0x20, 0x26, 0x3b, 0x3b, 0x43, 0xc6, 0xf9, 0x70, 0x0a,
-        0x72, 0x14, 0xda, 0x3f, 0x3b, 0xd3, 0x65, 0xf0, 0x6c, 0x12, 0x12, 0x58,
-        0xd8, 0xb4, 0xd3, 0x3f, 0xc9, 0xf4, 0xc7, 0x7a, 0x21, 0xa1, 0x81, 0x42,
-        0x36, 0xed, 0x0c, 0x9d, 0x50, 0x68, 0x4e, 0x9f, 0x73, 0x25, 0x07, 0x13,
-        0xb2, 0xfd, 0xd9, 0xcc, 0x08, 0x4b, 0xe7, 0xde, 0x73, 0xce, 0x7b, 0xce,
-        0xfb, 0x3c, 0xcf, 0xfb, 0x9c, 0xc3, 0x0a, 0x05, 0x95, 0x28, 0xff, 0xab,
-        0xe6, 0xa7, 0xfd, 0xc9, 0x5d, 0xcf, 0xad, 0x5e, 0xd5, 0xbe, 0x8a, 0x5f,
-        0x57, 0x2b, 0xcb, 0x55, 0x15, 0xff, 0x8f, 0xff, 0xbc, 0x80, 0xbe, 0x18,
-        0x87, 0xfc, 0x40, 0xf3, 0xd8, 0xf3, 0x77, 0x75, 0x98, 0xd0, 0xbc, 0xf6,
-        0x63, 0x4d, 0x5b, 0x4d, 0xc0, 0x29, 0x24, 0xa2, 0x9d, 0xf8, 0x1f, 0x91,
-        0x0d, 0xab, 0x90, 0xed, 0x7f, 0x64, 0x7f, 0x7d, 0xcf, 0x5b, 0xf7, 0x19,
-        0xd7, 0x0e, 0x79, 0xa1, 0xe9, 0xf6, 0xb8, 0xaa, 0x37, 0x43, 0x6b, 0x60,
-        0x9f, 0x9f, 0xb5, 0xf4, 0xfb, 0x50, 0xb3, 0x38, 0x16, 0x70, 0x38, 0x67,
-        0x58, 0xdb, 0x90, 0xd0, 0x4f, 0x41, 0x85, 0xc3, 0x39, 0x8e, 0x15, 0x80,
-        0xbd, 0x39, 0x05, 0x97, 0x39, 0xe6, 0x68, 0x41, 0xc3, 0x82, 0xd7, 0x9d,
-        0xae, 0xaf, 0xc2, 0x46, 0xc6, 0x9c, 0xd8, 0x23, 0x02, 0x26, 0xb2, 0x7f,
-        0x60, 0x9b, 0xf1, 0xbd, 0x08, 0xa6, 0x66, 0xda, 0x91, 0x59, 0x31, 0xa7,
-        0x61, 0x73, 0xbe, 0xa1, 0x4f, 0xb3, 0xc1, 0x77, 0x14, 0xa4, 0xee, 0xd3,
-        0xd0, 0x5b, 0x8c, 0x23, 0x5b, 0xcc, 0xc2, 0x29, 0x8e, 0xf0, 0xa3, 0x21,
-        0x30, 0xa1, 0x69, 0xf7, 0x4c, 0x2c, 0x97, 0xef, 0x20, 0x38, 0x71, 0x4d,
-        0x5c, 0x4d, 0xea, 0x78, 0x6f, 0x8d, 0x10, 0xd5, 0x36, 0xb2, 0x55, 0xed,
-        0x59, 0x78, 0x6d, 0xc3, 0x5a, 0xef, 0x55, 0xd0, 0xf5, 0xc7, 0x66, 0x7c,
-        0x42, 0x79, 0xf4, 0x51, 0x8f, 0x0d, 0x4d, 0xb1, 0xa3, 0x6a, 0x53, 0xa1,
-        0x01, 0x63, 0x45, 0x1d, 0x7b, 0x8b, 0x61, 0x8c, 0x14, 0xb1, 0xdb, 0x7b,
-        0xaf, 0x1f, 0x33, 0x3a, 0x9c, 0xef, 0xb5, 0xec, 0xc6, 0x8e, 0xdc, 0x20,
-        0xb6, 0xe6, 0x52, 0xd8, 0x57, 0x94, 0x31, 0x46, 0x31, 0x5c, 0x54, 0xe1,
-        0x9f, 0x30, 0x22, 0xef, 0xe2, 0x76, 0xcf, 0x84, 0x18, 0xb1, 0x02, 0x18,
-        0xb2, 0xe2, 0x18, 0xcd, 0x7b, 0xb8, 0xce, 0x00, 0x86, 0xcd, 0xeb, 0xa2,
-        0xdf, 0x32, 0xac, 0x51, 0x88, 0xc6, 0xd3, 0x96, 0x11, 0xe9, 0xf2, 0xc2,
-        0xf9, 0xb1, 0x19, 0xc1, 0x28, 0x63, 0x1f, 0x71, 0xfb, 0x8d, 0xa0, 0xeb,
-        0x66, 0x3f, 0x87, 0xfd, 0x74, 0x8c, 0x7d, 0xbb, 0x6f, 0x74, 0x14, 0x89,
-        0xc8, 0x18, 0x3c, 0xe8, 0x0b, 0xb7, 0xb2, 0x5f, 0x53, 0x74, 0x0c, 0x46,
-        0x9c, 0xe3, 0x64, 0xfd, 0xed, 0x0e, 0xc7, 0xc8, 0xb2, 0xbf, 0x11, 0x3d,
-        0x06, 0x39, 0x56, 0x03, 0x7f, 0xb7, 0xb3, 0xbf, 0x02, 0x8f, 0x1d, 0x8b,
-        0x0e, 0xb1, 0xcf, 0x29, 0x4b, 0xc5, 0x19, 0x7e, 0xfa, 0x74, 0x43, 0x66,
-        0x56, 0x09, 0xb0, 0x7d, 0x2f, 0xf8, 0xdc, 0xac, 0xc2, 0xa1, 0x8c, 0x85,
-        0x21, 0xae, 0x5b, 0x63, 0xdb, 0x38, 0xdb, 0x7c, 0xa6, 0xc5, 0xf1, 0xa1,
-        0x77, 0x15, 0x97, 0x62, 0x62, 0x31, 0x37, 0xbf, 0xaf, 0x9d, 0x63, 0xe4,
-        0x4b, 0x39, 0x95, 0xef, 0x74, 0xe6, 0x6f, 0x88, 0x27, 0xd5, 0xa5, 0xcf,
-        0x07, 0x95, 0x0e, 0xb6, 0x39, 0x6a, 0x03, 0xf6, 0xe6, 0xa1, 0xf9, 0x4d,
-        0x8d, 0xf3, 0x68, 0xf8, 0x28, 0x37, 0xa8, 0xf4, 0x14, 0x1d, 0xa5, 0x7b,
-        0xb6, 0x43, 0x71, 0x66, 0x55, 0xa5, 0x6b, 0x5a, 0xc6, 0x2d, 0xc4, 0x0b,
-        0x96, 0xc2, 0x98, 0x7f, 0x22, 0xe3, 0x75, 0xa2, 0xca, 0x0d, 0xb1, 0x32,
-        0xe6, 0x41, 0x95, 0xd9, 0xa3, 0xac, 0x9f, 0x15, 0x22, 0x9d, 0x4c, 0x2b,
-        0xeb, 0x66, 0xa1, 0x05, 0x6d, 0x5b, 0xcd, 0x4d, 0xec, 0x43, 0x76, 0x99,
-        0x89, 0x83, 0xf9, 0x28, 0x3e, 0xb0, 0x3c, 0x38, 0xb4, 0xac, 0x02, 0xaa,
-        0xa9, 0xf0, 0x83, 0xe0, 0x79, 0x0b, 0x6a, 0x0d, 0xbf, 0x5f, 0xdd, 0xa4,
-        0x62, 0xa4, 0x7d, 0x9d, 0xd2, 0xc5, 0x3e, 0x3e, 0xe6, 0xf9, 0x68, 0x2e,
-        0x8d, 0x20, 0xb1, 0x53, 0x65, 0xc7, 0x22, 0x05, 0xee, 0xcd, 0x7b, 0x56,
-        0x2c, 0xfe, 0xb4, 0xc4, 0x63, 0xad, 0x11, 0x91, 0x7b, 0x53, 0x6d, 0xc7,
-        0xe2, 0x73, 0xdc, 0x07, 0xaf, 0xa9, 0xe2, 0xd7, 0x96, 0x0f, 0xf3, 0x9b,
-        0x2c, 0xe6, 0x54, 0x87, 0x9f, 0xed, 0xc7, 0xdc, 0x76, 0xf9, 0x1b, 0x7a,
-        0xf7, 0xb7, 0xf6, 0xa1, 0xb4, 0x07, 0xc3, 0xf9, 0x26, 0xc6, 0x5c, 0xda,
-        0x83, 0x47, 0xb8, 0xde, 0xdf, 0xfa, 0xe4, 0xd7, 0xbb, 0x6e, 0xb6, 0x6d,
-        0x66, 0x9c, 0x1e, 0xdb, 0x9c, 0x5f, 0xe1, 0xad, 0x07, 0xea, 0xda, 0xb1,
-        0x8f, 0x39, 0xee, 0x4a, 0x2e, 0x47, 0xd6, 0x7d, 0x1e, 0xd6, 0xd7, 0x4f,
-        0xd7, 0xa1, 0x6f, 0x99, 0xbb, 0x6f, 0xfa, 0xc6, 0x69, 0x21, 0xce, 0x24,
-        0xfd, 0x98, 0x33, 0x87, 0x22, 0xd5, 0xc8, 0x5a, 0x5e, 0xe6, 0xfb, 0x2c,
-        0xe7, 0x2f, 0x24, 0xbd, 0x38, 0x9c, 0x3c, 0x84, 0x6c, 0x2d, 0x30, 0x93,
-        0x93, 0xbc, 0x32, 0xe6, 0xcf, 0xf2, 0xbf, 0x9e, 0xa2, 0x5c, 0x9f, 0xc5,
-        0xf5, 0x29, 0x38, 0x66, 0x4a, 0x4c, 0x5b, 0x6a, 0x33, 0xf9, 0xb5, 0x83,
-        0xfb, 0x59, 0xdf, 0x1e, 0x24, 0x3e, 0x81, 0x0f, 0x73, 0xfd, 0xd8, 0x5c,
-        0x8a, 0x05, 0xd7, 0x73, 0x50, 0x7c, 0x6d, 0x69, 0x1c, 0x2a, 0xfd, 0x26,
-        0xc7, 0xd3, 0x6a, 0x47, 0xce, 0xc8, 0xa4, 0x91, 0x38, 0xd7, 0xa1, 0xc8,
-        0xfe, 0x69, 0x75, 0x65, 0xc1, 0x8f, 0x68, 0x5d, 0xe9, 0x79, 0x95, 0xbd,
-        0x41, 0x7d, 0x7a, 0x42, 0xc1, 0xf6, 0x98, 0x7c, 0xb6, 0x41, 0x6d, 0x29,
-        0x40, 0xab, 0xb6, 0x77, 0xa9, 0x73, 0x13, 0x46, 0xdf, 0x71, 0x25, 0x11,
-        0x9d, 0x70, 0xfb, 0xec, 0x52, 0x5b, 0x0b, 0x01, 0xae, 0x27, 0xce, 0x9c,
-        0x40, 0xab, 0xb1, 0x9f, 0x53, 0x7f, 0xcd, 0x07, 0xe7, 0xdc, 0x3e, 0xcf,
-        0xa9, 0xf1, 0x82, 0x6c, 0x37, 0xac, 0xa8, 0x12, 0xc0, 0xdd, 0x49, 0x0d,
-        0x2b, 0x5b, 0x44, 0x63, 0x77, 0xd2, 0x98, 0xef, 0xf6, 0x46, 0x70, 0x90,
-        0x5c, 0x20, 0xee, 0x9c, 0x3f, 0x6c, 0x19, 0x41, 0x77, 0xd1, 0x8b, 0x68,
-        0xad, 0x83, 0xfd, 0xf9, 0x00, 0x7e, 0x49, 0xfc, 0xf7, 0x58, 0x3a, 0x46,
-        0xf2, 0x46, 0xfc, 0x57, 0x48, 0xa4, 0x8e, 0x30, 0x67, 0x0b, 0xe4, 0xc0,
-        0xfe, 0x62, 0x53, 0xfc, 0x08, 0x8c, 0x81, 0x6e, 0x72, 0x40, 0x6b, 0x97,
-        0x31, 0x40, 0x57, 0x6d, 0x72, 0xa7, 0xd8, 0x80, 0x1c, 0xf9, 0xd0, 0xed,
-        0xf2, 0x6a, 0x50, 0xe9, 0x2a, 0xbe, 0x4f, 0x6d, 0xed, 0x21, 0xbe, 0x10,
-        0x8a, 0x98, 0x7e, 0xa4, 0xea, 0xa2, 0x38, 0x4d, 0xac, 0x64, 0xc3, 0x15,
-        0xcc, 0xa5, 0xcc, 0xe7, 0x45, 0x3e, 0x5f, 0xa7, 0x74, 0xce, 0x46, 0xf1,
-        0x4b, 0xeb, 0x6b, 0xe1, 0x84, 0xab, 0xd9, 0xe6, 0x5b, 0xd2, 0xae, 0xe1,
-        0xf2, 0xcb, 0x95, 0xf8, 0xf4, 0xe5, 0x20, 0xbe, 0x7c, 0x99, 0xfc, 0xce,
-        0xa3, 0xbd, 0x12, 0x42, 0xa4, 0xda, 0x84, 0x28, 0x5a, 0xad, 0xf8, 0xa8,
-        0x36, 0x16, 0xbd, 0x00, 0xa9, 0x8d, 0x8e, 0xba, 0x35, 0x67, 0xec, 0x1a,
-        0x40, 0xc2, 0x39, 0xe5, 0xee, 0x85, 0xa3, 0xae, 0x2a, 0x9c, 0x16, 0xd8,
-        0x54, 0xda, 0x0b, 0xbf, 0xdd, 0xa5, 0xbe, 0xc3, 0xdc, 0x9c, 0x77, 0x73,
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+        0x78, 0x3d, 0xbe, 0x3d, 0x1e, 0xc3, 0xd6, 0xf1, 0x80, 0x9a, 0x02, 0xb7,
+        0x35, 0x72, 0xdf, 0x57, 0x89, 0xe7, 0xcd, 0x4b, 0xaf, 0xc3, 0x5a, 0x27,
+        0xe9, 0xde, 0xcd, 0xdc, 0xab, 0x3b, 0x08, 0xc7, 0x21, 0x8e, 0xfe, 0xd9,
+        0x5b, 0x2e, 0xd0, 0x44, 0xbd, 0xbf, 0xd4, 0x12, 0xeb, 0xc7, 0x57, 0x57,
+        0x9e, 0x47, 0xd2, 0x79, 0x6a, 0x0b, 0x62, 0xb2, 0x44, 0x4c, 0x32, 0x36,
+        0x4f, 0x97, 0x88, 0x4b, 0x6a, 0xc3, 0x93, 0x25, 0x8d, 0x6d, 0x1f, 0xcf,
+        0x75, 0x0c, 0xa9, 0x2a, 0x56, 0x3e, 0x55, 0x4f, 0x78, 0xaf, 0x45, 0x50,
+        0x6f, 0xe9, 0xdf, 0x76, 0xf0, 0x66, 0x31, 0xe1, 0x6c, 0x28, 0x6b, 0x3c,
+        0xfc, 0x6d, 0x0d, 0x0f, 0x6f, 0x47, 0xaa, 0xfa, 0x44, 0xce, 0x4c, 0x42,
+        0x73, 0xdd, 0x62, 0xe7, 0xa6, 0xd2, 0xf0, 0x34, 0x7d, 0x9f, 0xa7, 0xc6,
+        0x76, 0xdf, 0x67, 0xc8, 0xc7, 0xa6, 0x8c, 0x2e, 0xf6, 0xd4, 0xf4, 0x87,
+        0xbe, 0x33, 0xf3, 0x37, 0x2d, 0x3b, 0x75, 0x4c, 0x8e, 0x17, 0x71, 0x2b,
+        0xfb, 0x1e, 0x3f, 0x44, 0xf5, 0x6e, 0x53, 0xbc, 0xf3, 0x43, 0xbc, 0xf3,
+        0x0f, 0xf9, 0x3c, 0x51, 0x4a, 0x66, 0x7b, 0x78, 0xe7, 0x27, 0xf9, 0x3c,
+        0x59, 0x6a, 0xad, 0xd3, 0x67, 0x4c, 0x4e, 0x85, 0xac, 0x03, 0x2f, 0xab,
+        0x52, 0xbc, 0x12, 0x0e, 0xf6, 0xc0, 0x06, 0x1a, 0x0e, 0xce, 0xf1, 0xb3,
+        0xfe, 0x6d, 0x49, 0xd7, 0x38, 0xcd, 0xf9, 0x83, 0xba, 0x26, 0x67, 0xae,
+        0x14, 0x97, 0xd4, 0x47, 0x9e, 0x0c, 0x9f, 0xc6, 0x29, 0x35, 0x1f, 0xa9,
+        0x99, 0xf9, 0x42, 0x4e, 0xaf, 0x30, 0xa4, 0xbb, 0xc8, 0xac, 0x72, 0x75,
+        0x67, 0x8d, 0xab, 0xbd, 0xa9, 0x1b, 0xeb, 0xaa, 0x77, 0x48, 0x39, 0x47,
+        0x30, 0x8f, 0xd8, 0xd7, 0x35, 0x55, 0xf3, 0x8f, 0xfe, 0x4c, 0x7d, 0x67,
+        0x85, 0x09, 0x93, 0x7e, 0x08, 0x6f, 0xd5, 0x63, 0xd1, 0xda, 0x6f, 0x3e,
+        0x29, 0x5f, 0xf7, 0x82, 0xd3, 0xf1, 0x1e, 0x7e, 0xa7, 0x7b, 0xc1, 0x4f,
+        0x54, 0x2e, 0xde, 0xf3, 0x19, 0x67, 0x15, 0xd0, 0x45, 0xed, 0xf1, 0x3e,
+        0x39, 0xa1, 0x83, 0x2a, 0x4a, 0xe0, 0x14, 0xfb, 0xb0, 0x23, 0x5d, 0x49,
+        0x67, 0x17, 0xf7, 0x0b, 0x1d, 0x87, 0x5c, 0xb0, 0x93, 0x3a, 0x93, 0x73,
+        0xca, 0x1d, 0x5c, 0xa3, 0xb9, 0xf0, 0x3e, 0xfa, 0xe6, 0xb7, 0xed, 0x96,
+        0xe7, 0x63, 0x57, 0xe9, 0x39, 0xc3, 0xf2, 0xb4, 0x5f, 0x52, 0x99, 0x5d,
+        0xb4, 0xe7, 0x2c, 0xed, 0x89, 0x78, 0x21, 0xb9, 0x31, 0x55, 0x59, 0x5f,
+        0xb0, 0xb4, 0x1d, 0x15, 0x7b, 0x38, 0xa6, 0x39, 0x4f, 0xf6, 0x9f, 0x62,
+        0x8d, 0xdd, 0x02, 0xfd, 0x3b, 0x85, 0xb6, 0xa1, 0x2d, 0xb1, 0x85, 0xf6,
+        0x1c, 0x8e, 0x57, 0xf8, 0x94, 0xdf, 0xf1, 0xbc, 0x92, 0xb1, 0xbe, 0x9e,
+        0x78, 0xbf, 0x22, 0x9d, 0x60, 0x6c, 0xbb, 0xa8, 0xef, 0xab, 0x71, 0xde,
+        0x57, 0xc1, 0xf2, 0xff, 0x00, 0xb0, 0x60, 0x72, 0xf9, 0x60, 0x17, 0x00,
+        0x00, 0x00 };
 
 static const u32 bnx2_TPAT_b06FwData[(0x0/4) + 1] = { 0x0 };
 static const u32 bnx2_TPAT_b06FwRodata[(0x0/4) + 1] = { 0x0 };
 
 static struct fw_info bnx2_tpat_fw_06 = {
-        /* Firmware version: 4.4.22 */
+        /* Firmware version: 4.6.16 */
         .ver_major                      = 0x4,
-        .ver_minor                      = 0x4,
-        .ver_fix                        = 0x16,
+        .ver_minor                      = 0x6,
+        .ver_fix                        = 0x10,
 
         .start_addr                     = 0x08000488,
 
         .text_addr                      = 0x08000400,
-        .text_len                       = 0x1aa4,
+        .text_len                       = 0x175c,
         .text_index                     = 0x0,
         .gz_text                        = bnx2_TPAT_b06FwText,
         .gz_text_len                    = sizeof(bnx2_TPAT_b06FwText),
@@ -3639,11 +3540,11 @@ static struct fw_info bnx2_tpat_fw_06 = {
         .data_index                     = 0x0,
         .data                           = bnx2_TPAT_b06FwData,
 
-        .sbss_addr                      = 0x08001ec0,
+        .sbss_addr                      = 0x08001b80,
         .sbss_len                       = 0x44,
         .sbss_index                     = 0x0,
 
-        .bss_addr                       = 0x08001f04,
+        .bss_addr                       = 0x08001bc4,
         .bss_len                        = 0x450,
         .bss_index                      = 0x0,
 
@@ -3670,862 +3571,858 @@ static const struct cpu_reg cpu_reg_tpat = {
 };
 
 static u8 bnx2_TXP_b06FwText[] = {
-        0xad, 0x7b, 0x0d, 0x70, 0x94, 0xf7, 0x79, 0xe7, 0xef, 0xbf, 0x1f, 0xd2,
-        0xae, 0xb4, 0x5a, 0xad, 0xf0, 0x82, 0x57, 0x89, 0x52, 0xf6, 0xf5, 0xbe,
-        0x2b, 0x2d, 0x96, 0x80, 0x77, 0x41, 0x04, 0x11, 0x6d, 0xcd, 0x56, 0x08,
-        0x21, 0x40, 0xd8, 0x32, 0x56, 0x92, 0x25, 0xc7, 0xd4, 0x2a, 0xc8, 0x20,
-        0xdb, 0x18, 0x8b, 0x86, 0xe6, 0xe4, 0xd6, 0xad, 0xd6, 0x92, 0xc0, 0x60,
-        0x56, 0xbc, 0x22, 0x82, 0x08, 0x77, 0xee, 0x26, 0xb2, 0x25, 0x2c, 0xec,
-        0xac, 0x58, 0x3b, 0xbd, 0xeb, 0xc5, 0x33, 0xc9, 0x58, 0x67, 0x6c, 0x4c,
-        0x72, 0xfe, 0xc8, 0x75, 0x3a, 0x3d, 0xf7, 0xe6, 0xee, 0xca, 0xf8, 0x83,
-        0xd8, 0x6e, 0x8c, 0xdd, 0x4c, 0x3a, 0x27, 0x52, 0xdb, 0xef, 0xfd, 0x9e,
-        0xf7, 0xdd, 0x05, 0xe2, 0xba, 0xd3, 0x99, 0xce, 0x69, 0x66, 0x67, 0xa5,
-        0xf7, 0xe3, 0xf9, 0x3f, 0xdf, 0xcf, 0xef, 0x79, 0xfe, 0x7f, 0xd5, 0x03,
-        0x15, 0x28, 0xfe, 0x54, 0xf1, 0xd3, 0x3c, 0x30, 0x78, 0x70, 0xd5, 0x8a,
-        0xe6, 0x15, 0xf6, 0x05, 0x97, 0xc7, 0x23, 0x37, 0xbf, 0xaa, 0x80, 0xde,
-        0x0f, 0xf0, 0x6f, 0xfa, 0xf9, 0xca, 0xbf, 0xed, 0x35, 0xfb, 0xc7, 0x0d,
-        0x84, 0x4a, 0x7c, 0xc9, 0x07, 0x3e, 0x57, 0xea, 0xd2, 0xd7, 0xda, 0x74,
-        0xf8, 0xdc, 0xa9, 0x93, 0xa9, 0xdd, 0x3a, 0x90, 0xce, 0x37, 0x46, 0x37,
-        0xe0, 0x53, 0x2b, 0x1b, 0xf6, 0x40, 0xae, 0x7f, 0x25, 0xf5, 0xc9, 0xd0,
-        0x4f, 0xd6, 0x6a, 0x1f, 0x4f, 0xb9, 0xe1, 0x0b, 0xa5, 0x4e, 0x23, 0x54,
-        0x0f, 0x5f, 0x1d, 0xdf, 0xf9, 0x0f, 0x0d, 0xd5, 0x6e, 0x04, 0x4b, 0xb4,
-        0x5a, 0x30, 0x62, 0x22, 0xeb, 0x4b, 0x0d, 0xa0, 0x7c, 0x0d, 0xf0, 0x6e,
-        0x2e, 0x6e, 0x8c, 0x00, 0xe3, 0xae, 0x54, 0x3c, 0xfa, 0x22, 0x0c, 0x1c,
-        0x2a, 0x44, 0xd1, 0xce, 0xcf, 0x66, 0xf3, 0x33, 0x2b, 0xea, 0x45, 0xd6,
-        0xcd, 0xe7, 0x76, 0x35, 0x03, 0x1b, 0x73, 0x06, 0x0e, 0x9b, 0xf0, 0xd5,
-        0xa6, 0x1e, 0xc6, 0x3a, 0x7e, 0x07, 0x53, 0x83, 0x78, 0x7d, 0x2c, 0x16,
-        0x7d, 0x0a, 0x5a, 0x46, 0x77, 0x6b, 0x83, 0x40, 0x63, 0x7f, 0x9f, 0xd2,
-        0x7a, 0xdf, 0x50, 0x5a, 0xf7, 0x98, 0x82, 0x4f, 0xf1, 0xb9, 0xc6, 0xbc,
-        0x7c, 0x0f, 0xe2, 0xd6, 0xbc, 0x0f, 0x97, 0xdc, 0xb2, 0xfe, 0xef, 0x52,
-        0xdf, 0x0a, 0x1e, 0xbd, 0x05, 0xa3, 0xe4, 0xc1, 0x9b, 0x52, 0x78, 0xb2,
-        0x39, 0x1e, 0x19, 0x86, 0xdc, 0x8f, 0x62, 0x43, 0x41, 0xbe, 0x35, 0x4a,
-        0x6d, 0x59, 0xa3, 0x86, 0x65, 0x9d, 0x31, 0xca, 0x91, 0x0d, 0x69, 0x11,
-        0x40, 0x61, 0xd8, 0x70, 0x21, 0x1d, 0x6a, 0x8b, 0x7a, 0xa0, 0x45, 0xee,
-        0xc1, 0x3f, 0x51, 0xe6, 0x74, 0xc2, 0x0b, 0xe7, 0xf9, 0x5e, 0x94, 0x63,
-        0x3e, 0xe4, 0x68, 0xed, 0xc9, 0x9c, 0x65, 0x5d, 0xd0, 0x3d, 0x38, 0x43,
-        0xfd, 0x0c, 0xe7, 0xff, 0xc9, 0x9a, 0xa7, 0x6e, 0x46, 0xf5, 0xd2, 0xfa,
-        0x3e, 0x4c, 0x85, 0x2c, 0x6b, 0x9a, 0xf7, 0x0e, 0xe7, 0x4b, 0x7a, 0xb6,
-        0x2c, 0x97, 0x6e, 0x59, 0xbb, 0xf5, 0xdf, 0x58, 0xbb, 0x7e, 0xeb, 0x59,
-        0xcb, 0x7a, 0xcc, 0xb8, 0x09, 0x67, 0x27, 0xda, 0xd5, 0x96, 0xd9, 0x25,
-        0xc1, 0xcd, 0x93, 0x16, 0x2e, 0x18, 0x08, 0xb9, 0x52, 0x1d, 0x6a, 0xf3,
-        0x6c, 0xa7, 0xda, 0x58, 0xd8, 0xae, 0x3a, 0xa6, 0xbf, 0xa5, 0x3a, 0x67,
-        0x7b, 0xd5, 0xa6, 0x42, 0x04, 0x33, 0x66, 0x18, 0xd3, 0x66, 0x46, 0xb5,
-        0xcf, 0xf6, 0x28, 0x47, 0x8e, 0x41, 0xd5, 0x56, 0x28, 0xd1, 0xba, 0xae,
-        0xc7, 0xcd, 0xb9, 0x14, 0x8e, 0x98, 0xe5, 0x5c, 0x67, 0xc1, 0xfa, 0x49,
-        0xc3, 0x02, 0xe5, 0x34, 0x70, 0xb4, 0xf0, 0x18, 0xb6, 0x4d, 0x5a, 0x56,
-        0x3e, 0x09, 0xe4, 0x0b, 0xc0, 0x0f, 0xcc, 0x58, 0x77, 0xbf, 0xb2, 0xac,
-        0x4d, 0x71, 0x6b, 0xe9, 0x65, 0xa3, 0x31, 0xf1, 0x12, 0xfe, 0xaf, 0x35,
-        0x15, 0x46, 0x36, 0x40, 0x1a, 0xc7, 0x68, 0xb3, 0xfb, 0xc6, 0xe0, 0x2b,
-        0x4f, 0x8d, 0xe2, 0x17, 0x39, 0xf8, 0xca, 0x52, 0x59, 0x5c, 0xc8, 0x0d,
-        0x87, 0x7c, 0x88, 0x45, 0x36, 0xab, 0xec, 0xa0, 0x0b, 0xda, 0xc0, 0xdb,
-        0xd0, 0xa2, 0xb4, 0xc7, 0xc5, 0xf3, 0x4a, 0x9b, 0x7f, 0x09, 0x5a, 0xfa,
-        0x37, 0x4a, 0xeb, 0xac, 0x75, 0x23, 0xed, 0x8a, 0xfb, 0xf0, 0x93, 0x06,
-        0xb1, 0xc9, 0x28, 0x56, 0xd8, 0xb6, 0xc9, 0x62, 0xd9, 0x35, 0xdb, 0xa4,
-        0x30, 0x4c, 0xbe, 0x0e, 0x93, 0xaf, 0x97, 0x0d, 0x2d, 0xf2, 0x24, 0xac,
-        0xa5, 0x7d, 0x86, 0xdc, 0x4b, 0x61, 0xb4, 0x60, 0x45, 0x83, 0xa9, 0x4b,
-        0xe4, 0x17, 0xd9, 0x2f, 0xa5, 0x7c, 0xd9, 0xea, 0xd4, 0xa7, 0xd6, 0x6b,
-        0x6b, 0x22, 0x78, 0xa1, 0x10, 0xc6, 0x73, 0x85, 0x10, 0x9e, 0x2d, 0xb4,
-        0xc3, 0x2c, 0x20, 0xb8, 0xad, 0xf0, 0x45, 0x7e, 0x6c, 0x21, 0xc0, 0xe7,
-        0xc9, 0x77, 0x70, 0x6b, 0xc1, 0xd3, 0x5b, 0x96, 0x42, 0xf7, 0x4f, 0x73,
-        0x43, 0x56, 0x85, 0x8e, 0xde, 0x9a, 0x94, 0x9e, 0xbe, 0x55, 0x05, 0x5a,
-        0xe8, 0x87, 0xdd, 0xaf, 0xe4, 0x5b, 0x3c, 0xfa, 0x71, 0x3f, 0xbc, 0xd4,
-        0xff, 0xc6, 0x82, 0x65, 0x8d, 0x18, 0x07, 0x56, 0xee, 0x6a, 0xf9, 0x8b,
-        0xf9, 0x6e, 0xbd, 0x0b, 0xd9, 0x42, 0x1f, 0x10, 0x4c, 0xf1, 0x9b, 0xa1,
-        0xb8, 0xbd, 0xa9, 0x3d, 0x7a, 0xee, 0x01, 0x8f, 0xe3, 0xcf, 0xe4, 0x81,
-        0x7a, 0x7f, 0xce, 0x24, 0x0f, 0xe6, 0xe1, 0x20, 0x2a, 0xa2, 0x94, 0xef,
-        0xe7, 0xe4, 0x33, 0x81, 0x1f, 0x16, 0x74, 0xf2, 0xd6, 0x44, 0x1e, 0xa3,
-        0xe4, 0xcf, 0x87, 0x5d, 0x13, 0xda, 0x78, 0x16, 0xda, 0x91, 0x29, 0x2c,
-        0x47, 0x3a, 0x1c, 0xa2, 0x0f, 0xfe, 0x39, 0x1c, 0x1a, 0x5d, 0x38, 0x6e,
-        0x62, 0x55, 0x28, 0x45, 0xfb, 0x26, 0xf1, 0x70, 0x19, 0xe2, 0xbd, 0x1f,
-        0x2b, 0x85, 0xd7, 0xe2, 0x5d, 0x18, 0xa3, 0x3c, 0x5d, 0x79, 0x3f, 0xee,
-        0x9f, 0xa8, 0xc0, 0xbd, 0x13, 0x16, 0xee, 0x4b, 0x22, 0x55, 0x41, 0x79,
-        0x12, 0xc9, 0x78, 0xf4, 0x3d, 0x78, 0xd0, 0x9e, 0xef, 0x62, 0x2c, 0x6d,
-        0x40, 0xba, 0xcc, 0x87, 0x0d, 0xf9, 0x00, 0xe3, 0x31, 0x8d, 0xd3, 0x93,
-        0x3e, 0x78, 0x57, 0xbb, 0x30, 0x15, 0x2e, 0x43, 0xa2, 0xde, 0xc5, 0x4f,
-        0x38, 0xd8, 0x36, 0x59, 0x17, 0xdc, 0x68, 0x7a, 0xb0, 0xd7, 0x74, 0x61,
-        0x68, 0xc2, 0xb2, 0xda, 0x0d, 0x0b, 0x57, 0x57, 0x87, 0xf0, 0x3c, 0xf5,
-        0x77, 0xc0, 0x8c, 0xe0, 0x6c, 0xe1, 0x51, 0xf2, 0x12, 0x76, 0xf8, 0x35,
-        0xc9, 0xbb, 0x49, 0xde, 0x4d, 0xf2, 0x6d, 0x0a, 0x9f, 0xe7, 0x19, 0x33,
-        0x06, 0xe5, 0xf2, 0x93, 0x87, 0x4a, 0xf4, 0x93, 0x8f, 0x58, 0xd2, 0x82,
-        0x2b, 0xa9, 0x65, 0x77, 0x31, 0x79, 0x2d, 0xad, 0xb7, 0xac, 0x8f, 0x57,
-        0x8b, 0x2c, 0xb4, 0xb9, 0xab, 0x4b, 0x62, 0xf4, 0xf7, 0xaa, 0x18, 0x57,
-        0x7f, 0x4b, 0xbd, 0x3d, 0x5e, 0xf0, 0x63, 0x70, 0xc2, 0xf6, 0xdb, 0x83,
-        0x65, 0xe4, 0x5b, 0xf8, 0x2a, 0xe8, 0x71, 0xc6, 0x68, 0x3c, 0xc3, 0x18,
-        0xc5, 0x56, 0xf2, 0x7c, 0x9f, 0x19, 0x6f, 0xd9, 0xae, 0x3c, 0xd8, 0x94,
-        0x0f, 0x07, 0xdb, 0x6f, 0xe0, 0x93, 0xf2, 0x4a, 0x0c, 0x52, 0xd6, 0x10,
-        0xf9, 0x0b, 0x63, 0x37, 0xf9, 0x7c, 0xae, 0xc8, 0xe7, 0x74, 0x41, 0xd6,
-        0xfa, 0x3c, 0xaf, 0x25, 0x3e, 0x91, 0x5d, 0x94, 0x0a, 0x2b, 0x54, 0x04,
-        0xb0, 0x3d, 0xff, 0x26, 0x6d, 0x51, 0x87, 0xbf, 0xa0, 0x0d, 0x5e, 0x60,
-        0x8c, 0xfc, 0xf0, 0x9a, 0xbf, 0x88, 0x3d, 0x1e, 0xa1, 0x1d, 0xb4, 0xd3,
-        0x59, 0x04, 0xd0, 0x5b, 0x48, 0xe3, 0xd0, 0x24, 0xd2, 0x33, 0xc6, 0x31,
-        0xc6, 0xfb, 0x12, 0xb8, 0xf5, 0xf2, 0x74, 0x48, 0xaf, 0xc0, 0xee, 0xe9,
-        0x30, 0x06, 0x0a, 0x6d, 0x30, 0x27, 0xc2, 0xd8, 0x47, 0xdf, 0xbc, 0x92,
-        0x4c, 0xdf, 0x17, 0x84, 0xf0, 0x1e, 0xc6, 0xfd, 0x7c, 0xe7, 0xb1, 0xc9,
-        0x30, 0xfa, 0xa9, 0xa3, 0xcd, 0xc9, 0x78, 0x8b, 0x9f, 0xd7, 0xf6, 0xf2,
-        0xda, 0x61, 0xea, 0xff, 0xbc, 0x31, 0x86, 0xde, 0x6e, 0x2d, 0x01, 0x84,
-        0xb1, 0xc7, 0x44, 0x88, 0x2e, 0xfc, 0x08, 0xf3, 0x5b, 0xe2, 0x3c, 0xff,
-        0xbe, 0xa7, 0x50, 0x41, 0x39, 0x83, 0x88, 0xe8, 0x9f, 0x58, 0xde, 0x66,
-        0xcb, 0xfa, 0xbe, 0x11, 0xbf, 0xf8, 0x96, 0xdb, 0x83, 0x87, 0x0a, 0x2e,
-        0x0c, 0x4e, 0x57, 0xe0, 0x0f, 0x27, 0x3c, 0xb8, 0xb3, 0xbe, 0x02, 0x07,
-        0xa6, 0xd3, 0x18, 0x99, 0xac, 0x40, 0xdf, 0x04, 0x96, 0xee, 0x31, 0x46,
-        0x6a, 0xca, 0xa0, 0x2d, 0xb4, 0x23, 0x81, 0xab, 0xb4, 0xc3, 0x43, 0xd3,
-        0x81, 0x60, 0x66, 0x32, 0x84, 0xc1, 0x59, 0x3f, 0x9f, 0x77, 0xf1, 0xf9,
-        0x72, 0x18, 0xab, 0x62, 0x83, 0x21, 0x08, 0x8f, 0x95, 0xd8, 0x3f, 0xed,
-        0xc7, 0x03, 0x13, 0x21, 0xec, 0x9b, 0x6c, 0xc6, 0xb8, 0x99, 0xc6, 0x51,
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+        0x2e, 0x5e, 0x98, 0x29, 0xfb, 0xc5, 0x43, 0x6d, 0x6b, 0x66, 0x14, 0x8e,
+        0x55, 0x83, 0x0a, 0xea, 0xf9, 0x1d, 0xc3, 0x8b, 0x58, 0x89, 0xe3, 0x7a,
+        0x29, 0xa7, 0x9c, 0x7b, 0x10, 0xee, 0x1b, 0xcf, 0x1f, 0x0a, 0xb9, 0x3d,
+        0xb0, 0x10, 0x71, 0x74, 0x1c, 0x13, 0xd9, 0xa6, 0xe4, 0xfb, 0x72, 0x0e,
+        0x87, 0x35, 0xd9, 0x25, 0x8c, 0xe3, 0x44, 0xb6, 0x8c, 0xa1, 0x51, 0x39,
+        0x97, 0x9a, 0x8c, 0x79, 0x5c, 0x8c, 0x8c, 0x79, 0xb4, 0x4c, 0xcc, 0xe3,
+        0x0f, 0x09, 0x77, 0x18, 0x2d, 0xc4, 0xa3, 0x95, 0xf0, 0xe2, 0x3e, 0xc3,
+        0xf5, 0x8f, 0x86, 0x39, 0x3f, 0x62, 0x4b, 0x25, 0x2f, 0x4b, 0x4e, 0xf6,
+        0x31, 0x27, 0x2f, 0x23, 0xbf, 0xf6, 0xe1, 0x4d, 0x5d, 0xec, 0xb1, 0xa6,
+        0x6c, 0x0f, 0xe3, 0x1c, 0x1e, 0xb6, 0x8b, 0x3d, 0xe2, 0x4b, 0x7e, 0x1c,
+        0x6e, 0x9e, 0xb5, 0x67, 0x22, 0xa2, 0xbb, 0x17, 0xa7, 0x89, 0xaf, 0xb8,
+        0x39, 0x1e, 0x3d, 0xcd, 0x9c, 0x3d, 0xa6, 0x97, 0x7d, 0xfc, 0xb7, 0x4b,
+        0x72, 0xea, 0x7d, 0xf3, 0xb8, 0x9f, 0x7f, 0x37, 0x44, 0xf7, 0x2b, 0xee,
+        0x7c, 0xab, 0xe7, 0xfe, 0x26, 0x54, 0xee, 0x9f, 0xca, 0xb3, 0xb1, 0xfc,
+        0xe3, 0xfc, 0x2e, 0x63, 0x85, 0xe8, 0x9f, 0x95, 0xe8, 0x8f, 0xc8, 0xff,
+        0x89, 0x88, 0x5d, 0x64, 0x3f, 0x11, 0xb4, 0x87, 0x8d, 0xd7, 0x68, 0x8f,
+        0xc3, 0xd7, 0xce, 0x4c, 0xb9, 0xf8, 0x55, 0xc5, 0xeb, 0x3b, 0x52, 0xaf,
+        0x6c, 0x0a, 0xe2, 0x17, 0xf6, 0xa5, 0x48, 0x94, 0x98, 0x50, 0xe6, 0xa1,
+        0x62, 0x33, 0xc3, 0xb1, 0x99, 0x5b, 0x2b, 0x5e, 0xd3, 0xa3, 0x38, 0x40,
+        0xbe, 0xbd, 0x90, 0x2d, 0x9f, 0x15, 0x89, 0x13, 0x6b, 0x3e, 0x8f, 0xfe,
+        0x3a, 0x19, 0xaf, 0x9e, 0xfe, 0x95, 0xa4, 0x0d, 0xd4, 0xf0, 0xce, 0x69,
+        0xa9, 0xb5, 0xc9, 0x8f, 0x27, 0xe3, 0xc6, 0x43, 0xe4, 0x91, 0x13, 0x93,
+        0xb6, 0xfd, 0x96, 0x81, 0x3b, 0xc3, 0xcc, 0xef, 0x2f, 0x90, 0x4f, 0x90,
+        0x6f, 0xc4, 0x2a, 0x95, 0xa6, 0xe8, 0x2a, 0xe6, 0xfa, 0x31, 0xd6, 0x0a,
+        0x4f, 0x13, 0xe3, 0x4e, 0x2f, 0x54, 0xc1, 0x3a, 0x21, 0xfb, 0x82, 0x55,
+        0x98, 0x7c, 0x26, 0x49, 0xd9, 0x97, 0x72, 0x9c, 0x00, 0xaa, 0xcf, 0xb4,
+        0xa2, 0xea, 0x94, 0x82, 0x1d, 0x89, 0x56, 0x04, 0xcf, 0xd4, 0x30, 0xff,
+        0x06, 0x70, 0xa5, 0x85, 0x6b, 0xfc, 0x4c, 0x59, 0x0f, 0x67, 0x8f, 0x14,
+        0x4f, 0xe6, 0x62, 0xe4, 0xf1, 0x11, 0x2c, 0x58, 0xb2, 0x1f, 0x1c, 0x70,
+        0xb0, 0xf4, 0xc2, 0x86, 0x7a, 0x67, 0xcf, 0xea, 0xc5, 0x82, 0x1e, 0x3d,
+        0xab, 0xd4, 0xe0, 0xc7, 0x27, 0x8a, 0x37, 0x57, 0xc2, 0x7e, 0x79, 0x85,
+        0x99, 0xe8, 0xdb, 0x4b, 0xff, 0x5f, 0xb3, 0x3a, 0xc2, 0xfa, 0xc6, 0xb6,
+        0xaf, 0x6e, 0x94, 0x3a, 0xd8, 0x70, 0xea, 0x60, 0x77, 0x6f, 0x5f, 0x1f,
+        0x7c, 0x4c, 0xc9, 0x6c, 0x0f, 0xc3, 0xfe, 0xa8, 0xd2, 0xb4, 0x3f, 0xf6,
+        0x9b, 0x09, 0xbe, 0x2f, 0x7b, 0x7c, 0xb6, 0xfd, 0xc3, 0x16, 0xdb, 0xce,
+        0xb7, 0xc4, 0xfb, 0x54, 0xaf, 0x8a, 0x33, 0x8d, 0xb2, 0x2f, 0xe8, 0xc1,
+        0x8f, 0x13, 0x7a, 0x74, 0x2f, 0x64, 0x0f, 0x9e, 0x78, 0xbf, 0x4c, 0xce,
+        0x18, 0xd6, 0x87, 0x3b, 0xad, 0xa5, 0x78, 0x61, 0x7e, 0x23, 0xfa, 0xfd,
+        0x70, 0xce, 0xc5, 0xd8, 0x06, 0xde, 0x5e, 0x01, 0xc9, 0xe1, 0x89, 0xd6,
+        0xc7, 0x10, 0xc1, 0x7c, 0xe1, 0x30, 0x1e, 0x39, 0x21, 0xf5, 0xd7, 0xea,
+        0xb6, 0xc0, 0x09, 0xfb, 0x07, 0x51, 0xb3, 0x48, 0x8c, 0xb4, 0xed, 0xaa,
+        0x8d, 0x4d, 0x51, 0xa6, 0x26, 0xf2, 0x8d, 0x18, 0x79, 0xb3, 0x3e, 0xf8,
+        0x63, 0x2c, 0xc1, 0xd9, 0xd9, 0xf4, 0xcd, 0xe4, 0xf2, 0x9d, 0xcf, 0x2a,
+        0xc2, 0xdb, 0x23, 0x78, 0xbe, 0x20, 0x9c, 0x65, 0x6d, 0x5b, 0xd7, 0x89,
+        0xe5, 0x78, 0x79, 0x3e, 0x82, 0xb3, 0x96, 0x4e, 0xce, 0x04, 0xa5, 0xda,
+        0xb4, 0x6b, 0x6b, 0x29, 0x6b, 0xb5, 0xd7, 0x8b, 0xed, 0x29, 0xa9, 0x19,
+        0xf5, 0xc1, 0x90, 0x82, 0xe5, 0x95, 0xd0, 0x17, 0x1f, 0x06, 0x86, 0x82,
+        0x66, 0xe2, 0xc2, 0xb3, 0x4a, 0xa2, 0xef, 0x03, 0x6f, 0x04, 0xdf, 0x22,
+        0x16, 0x7d, 0xbd, 0x20, 0x67, 0xa5, 0x88, 0x37, 0xb3, 0x31, 0xae, 0x5b,
+        0x00, 0x9e, 0x86, 0x1a, 0x1c, 0x61, 0xec, 0xbc, 0x66, 0x54, 0x10, 0xaf,
+        0xe4, 0xec, 0x94, 0x60, 0x7d, 0xbd, 0x9c, 0x19, 0xb1, 0x5f, 0xd4, 0xdd,
+        0x7a, 0xdf, 0x98, 0xbb, 0xf1, 0x4c, 0xb1, 0x4a, 0x8c, 0x6f, 0xea, 0x89,
+        0x2a, 0x6f, 0xd8, 0xe9, 0x2f, 0x2a, 0xd4, 0xb3, 0xb7, 0x06, 0x55, 0x8e,
+        0xae, 0x18, 0xcd, 0x95, 0xf3, 0x4b, 0xad, 0xd4, 0x77, 0x3d, 0x99, 0x92,
+        0x3f, 0x56, 0x33, 0xee, 0x8f, 0x32, 0x5f, 0x57, 0x9e, 0x90, 0xbc, 0x42,
+        0xfe, 0xad, 0x6c, 0x26, 0x2f, 0x16, 0x0e, 0x11, 0xc0, 0x83, 0xaa, 0xf8,
+        0x86, 0x4a, 0xfd, 0x36, 0xf9, 0xe4, 0x2c, 0xd4, 0x0b, 0x05, 0xc9, 0xeb,
+        0x82, 0x0b, 0xe5, 0xf9, 0xa2, 0xa8, 0x9b, 0x94, 0x35, 0x52, 0xdb, 0x3e,
+        0x9a, 0x0c, 0xc9, 0xd9, 0xf7, 0x11, 0x0f, 0xeb, 0xef, 0x00, 0xfd, 0xeb,
+        0x9e, 0x16, 0x7d, 0x70, 0xb3, 0x57, 0x63, 0x0d, 0x1e, 0x67, 0x2d, 0xa1,
+        0xb5, 0x4e, 0x28, 0x37, 0x8e, 0xf3, 0x6c, 0x8d, 0xc4, 0x4b, 0x86, 0x7a,
+        0x3e, 0xe9, 0xe8, 0xb4, 0x86, 0x3a, 0x09, 0x5e, 0x27, 0x89, 0xd7, 0x35,
+        0xb8, 0x32, 0x05, 0x9d, 0x11, 0x8c, 0x57, 0x0d, 0x02, 0x95, 0x9a, 0x48,
+        0x77, 0x40, 0x62, 0x41, 0xeb, 0x17, 0x3e, 0x55, 0x4d, 0x7c, 0x9e, 0x9d,
+        0x92, 0x7c, 0xa3, 0x08, 0x57, 0xc9, 0xd4, 0x9a, 0x43, 0xf8, 0x70, 0x03,
+        0xf0, 0xc6, 0xa4, 0xbb, 0xef, 0xde, 0x27, 0x67, 0x6f, 0x2b, 0xdd, 0x33,
+        0x0d, 0x8f, 0x39, 0x67, 0x15, 0x64, 0xfc, 0x43, 0x38, 0x93, 0x15, 0x7e,
+        0x39, 0x44, 0x7e, 0x19, 0x1f, 0x26, 0xf7, 0x6c, 0x2d, 0x40, 0x62, 0xb2,
+        0xc9, 0xf8, 0x88, 0xbe, 0xff, 0x2c, 0x79, 0xeb, 0x11, 0xb8, 0xfb, 0xee,
+        0x8d, 0xa5, 0xb3, 0x08, 0xf1, 0x7c, 0xa7, 0xb2, 0xd3, 0x39, 0xcf, 0x64,
+        0x30, 0xde, 0x3a, 0x94, 0x1d, 0xf3, 0xdb, 0x94, 0xae, 0xf9, 0x6e, 0x65,
+        0x4f, 0x41, 0xea, 0xd8, 0xd5, 0x6d, 0x0f, 0x9e, 0xd8, 0xad, 0xec, 0x9c,
+        0xed, 0x55, 0xc8, 0x6f, 0xd5, 0x80, 0xd9, 0xa7, 0x74, 0xcf, 0xbb, 0xfd,
+        0xf4, 0x4e, 0xd6, 0x70, 0x3b, 0x2d, 0xf1, 0x07, 0xb5, 0xad, 0x6b, 0x52,
+        0xfe, 0x17, 0x2b, 0x22, 0xff, 0xf7, 0xd0, 0xbf, 0x55, 0xb1, 0xed, 0x55,
+        0xa9, 0xd7, 0x65, 0x3d, 0xec, 0xe7, 0x53, 0xcc, 0x93, 0x56, 0x0d, 0x06,
+        0x58, 0x83, 0x8c, 0x1a, 0xb7, 0x94, 0xf6, 0xcf, 0x44, 0x27, 0x39, 0x2f,
+        0x21, 0xfe, 0x8a, 0x4c, 0x25, 0x65, 0xf8, 0x07, 0xca, 0xbf, 0xbf, 0xa4,
+        0x57, 0xb7, 0x9c, 0x27, 0xf0, 0x23, 0x23, 0x3a, 0xe4, 0xa9, 0xef, 0xb1,
+        0xc9, 0xeb, 0x7a, 0xf9, 0x78, 0x6d, 0x9c, 0x5c, 0x75, 0xbf, 0xa2, 0x0d,
+        0x3f, 0xe7, 0xea, 0x75, 0xe1, 0x8a, 0xa2, 0x15, 0x47, 0x21, 0xb8, 0xe0,
+        0xea, 0xb5, 0xb6, 0xa4, 0xd7, 0x9a, 0x7c, 0xa7, 0x73, 0x4e, 0xab, 0x86,
+        0x7a, 0x2d, 0x4c, 0x76, 0x28, 0x9d, 0xf3, 0xd2, 0xcb, 0x14, 0xdd, 0x44,
+        0x8f, 0x13, 0x76, 0x95, 0xde, 0xad, 0xdc, 0xee, 0x9c, 0x2b, 0x93, 0xb3,
+        0x5d, 0xb2, 0xdf, 0x5f, 0xd6, 0x4b, 0x72, 0xfa, 0xd2, 0xf0, 0xb6, 0x69,
+        0x35, 0xbc, 0x75, 0xda, 0xb6, 0xbf, 0x6b, 0xfc, 0xb3, 0xa3, 0xcb, 0x59,
+        0x43, 0x74, 0x91, 0x73, 0x23, 0x65, 0x7d, 0xbe, 0x50, 0xd2, 0x47, 0xd6,
+        0xea, 0xfa, 0x3a, 0x95, 0xff, 0x87, 0xef, 0xdd, 0xac, 0x7b, 0xa6, 0xa4,
+        0xac, 0x4f, 0xd8, 0x2c, 0x9f, 0x2f, 0x1b, 0xc2, 0x1b, 0xbc, 0xff, 0x93,
+        0x6c, 0x59, 0x2f, 0x2f, 0xe6, 0x66, 0xc5, 0xfe, 0x43, 0xf2, 0x3f, 0x7c,
+        0xc4, 0x91, 0xb8, 0x31, 0x46, 0x3f, 0x72, 0xf5, 0xd3, 0x86, 0x57, 0x7a,
+        0x9b, 0x8a, 0x57, 0xa0, 0xf5, 0x2f, 0x2a, 0x89, 0x34, 0x6b, 0x70, 0x9c,
+        0x2d, 0xfc, 0xea, 0xfa, 0x35, 0xe7, 0xab, 0x94, 0x6d, 0x39, 0x19, 0xfb,
+        0x21, 0x8e, 0x2d, 0x67, 0x4a, 0x14, 0x3c, 0x37, 0x0b, 0xcc, 0x5a, 0x9c,
+        0xd6, 0x1c, 0xc1, 0xd3, 0x86, 0x6d, 0x3f, 0xdb, 0xa2, 0xcb, 0x59, 0xa0,
+        0xf3, 0x6e, 0xaf, 0x08, 0x46, 0x8d, 0x2e, 0x7b, 0x79, 0x72, 0x9e, 0xa4,
+        0x97, 0x36, 0x10, 0xdd, 0xc5, 0x07, 0xca, 0x6b, 0x2f, 0xe7, 0xdc, 0x32,
+        0xb4, 0x8f, 0xd8, 0xa6, 0x7c, 0xde, 0x4d, 0xfa, 0x30, 0x37, 0xda, 0x64,
+        0x6d, 0xd8, 0x59, 0x5f, 0x43, 0xfc, 0x95, 0xe8, 0x43, 0x5f, 0x9d, 0x23,
+        0x97, 0x18, 0x33, 0xfc, 0x0e, 0x6f, 0x3b, 0x42, 0xae, 0x32, 0xc1, 0xd8,
+        0x79, 0xd2, 0xba, 0x80, 0x0b, 0xf9, 0xd7, 0xf0, 0xc6, 0xb5, 0xff, 0x67,
+        0x13, 0x7f, 0xb9, 0xb8, 0xb1, 0xcb, 0x39, 0xd3, 0x74, 0xba, 0xf5, 0x96,
+        0x84, 0xe0, 0x50, 0x77, 0xb3, 0x9c, 0x71, 0xaa, 0x34, 0xf3, 0x9b, 0x64,
+        0xbf, 0xab, 0xc2, 0x34, 0x6f, 0x3d, 0xaf, 0x8b, 0x6d, 0xfe, 0x62, 0xfd,
+        0x19, 0x5d, 0xf4, 0xfa, 0x9f, 0x6b, 0xc7, 0x9d, 0xff, 0xaf, 0xfc, 0xbb,
+        0x5b, 0xf7, 0xe9, 0x12, 0x3b, 0x67, 0x5b, 0xda, 0x1d, 0x4c, 0x68, 0x35,
+        0x57, 0x39, 0x36, 0x68, 0x31, 0x6f, 0x71, 0x3e, 0x0d, 0x33, 0xe9, 0x7c,
+        0x9a, 0xa6, 0x6b, 0x9b, 0x6e, 0xb3, 0xc1, 0xf9, 0xec, 0x30, 0xdd, 0xf3,
+        0xcf, 0x69, 0x53, 0x77, 0x3e, 0x7b, 0xcc, 0xb8, 0xf3, 0xd9, 0x69, 0xae,
+        0xbc, 0x2e, 0x17, 0x7f, 0xfe, 0x1f, 0x9b, 0x97, 0x53, 0xd9, 0x78, 0x3a,
         0x00, 0x00, 0x00 };
 
 static const u32 bnx2_TXP_b06FwData[(0x0/4) + 1] = { 0x0 };
 static const u32 bnx2_TXP_b06FwRodata[(0x0/4) + 1] = { 0x0 };
 
 static struct fw_info bnx2_txp_fw_06 = {
-        /* Firmware version: 4.4.2 */
+        /* Firmware version: 4.6.16 */
         .ver_major                      = 0x4,
-        .ver_minor                      = 0x4,
-        .ver_fix                        = 0x2,
+        .ver_minor                      = 0x6,
+        .ver_fix                        = 0x10,
 
         .start_addr                     = 0x08000098,
 
         .text_addr                      = 0x08000000,
-        .text_len                       = 0x3ab0,
+        .text_len                       = 0x3a74,
         .text_index                     = 0x0,
         .gz_text                        = bnx2_TXP_b06FwText,
         .gz_text_len                    = sizeof(bnx2_TXP_b06FwText),
@@ -4535,11 +4432,11 @@ static struct fw_info bnx2_txp_fw_06 = {
         .data_index                     = 0x0,
         .data                           = bnx2_TXP_b06FwData,
 
-        .sbss_addr                      = 0x08003ae0,
+        .sbss_addr                      = 0x08003aa0,
         .sbss_len                       = 0x68,
         .sbss_index                     = 0x0,
 
-        .bss_addr                       = 0x08003b48,
+        .bss_addr                       = 0x08003b08,
         .bss_len                        = 0x14c,
         .bss_index                      = 0x0,
 
diff --git a/drivers/net/bnx2_fw2.h b/drivers/net/bnx2_fw2.h
index fe753b6bcb41..c54e4886b8bb 100644
--- a/drivers/net/bnx2_fw2.h
+++ b/drivers/net/bnx2_fw2.h
@@ -15,848 +15,847 @@
  */
 
 static u8 bnx2_COM_b09FwText[] = {
-        0xcd, 0x7c, 0x7f, 0x6c, 0x5c, 0xd7, 0x75, 0xe6, 0x79, 0x6f, 0xde, 0x90,
-        0x43, 0x8a, 0xa2, 0x1e, 0x99, 0x31, 0x33, 0x8e, 0xd8, 0x7a, 0x86, 0xf3,
-        0x48, 0xd1, 0x21, 0xe3, 0x3e, 0x33, 0x63, 0x99, 0x76, 0xa6, 0xd6, 0x64,
-        0x66, 0x28, 0x2b, 0x0e, 0x69, 0xd0, 0x8e, 0x82, 0x4d, 0x01, 0x03, 0xe5,
-        0x0e, 0xa9, 0x54, 0xd9, 0xf5, 0x22, 0xda, 0x34, 0x45, 0x8a, 0xa2, 0x88,
-        0x26, 0x24, 0xe5, 0x2a, 0xcd, 0x88, 0x1c, 0xcb, 0x34, 0x1b, 0x14, 0x5e,
-        0x64, 0x3c, 0xa4, 0x14, 0xb7, 0x1d, 0x89, 0x72, 0xe2, 0x2d, 0xbc, 0x58,
-        0x07, 0x66, 0xa9, 0x1f, 0x4e, 0x83, 0x14, 0xf0, 0x2e, 0xbc, 0x68, 0x60,
-        0xa4, 0x80, 0x20, 0xbb, 0x8d, 0xb3, 0xc8, 0x62, 0x83, 0xdd, 0x00, 0x71,
-        0x02, 0x27, 0x6f, 0xbf, 0xef, 0xde, 0xfb, 0xc8, 0xd1, 0x88, 0x76, 0xd2,
-        0xfc, 0xb5, 0x04, 0x06, 0xf7, 0xfd, 0xb8, 0x3f, 0xce, 0x3d, 0xf7, 0xdc,
-        0x73, 0xbe, 0x73, 0xee, 0x79, 0x7c, 0x40, 0xa4, 0x53, 0xcc, 0xdf, 0x5e,
-        0xfc, 0x32, 0xff, 0xe1, 0xb3, 0xb3, 0x63, 0x77, 0x65, 0xee, 0xc2, 0xe5,
-        0x87, 0xed, 0xf7, 0x3b, 0x0e, 0x9f, 0x47, 0xf0, 0x8b, 0xe3, 0x37, 0x66,
-        0xae, 0x77, 0xfb, 0x73, 0xf1, 0x3b, 0x68, 0x89, 0xcc, 0xfc, 0x4f, 0x11,
-        0xab, 0xe5, 0x5d, 0xec, 0x5d, 0xda, 0xbc, 0xd7, 0x9f, 0xfd, 0x1b, 0xb4,
-        0xf9, 0xd7, 0xfe, 0x45, 0x34, 0xd9, 0x6a, 0xde, 0xfc, 0x49, 0xcc, 0xce,
-        0xce, 0x4c, 0xe6, 0x3d, 0x89, 0x45, 0xb2, 0x47, 0xa7, 0x66, 0x3d, 0x91,
-        0x5c, 0x63, 0x24, 0x59, 0x90, 0x5f, 0x04, 0xe5, 0xb8, 0x23, 0x7c, 0xfe,
-        0x5b, 0xd9, 0x77, 0xbe, 0xf6, 0xad, 0x7b, 0x53, 0x3f, 0xae, 0x45, 0x24,
-        0xe6, 0x66, 0xdf, 0x16, 0x77, 0x48, 0x62, 0xfd, 0x68, 0xf3, 0xcc, 0x81,
-        0x57, 0x6d, 0xe9, 0x0e, 0xfb, 0x72, 0x67, 0x22, 0x59, 0x99, 0x3e, 0x56,
-        0x39, 0x19, 0xd8, 0x9e, 0x94, 0x9d, 0xac, 0x37, 0x5c, 0x97, 0xae, 0xf1,
-        0x73, 0x99, 0x7b, 0x05, 0xf7, 0xd3, 0xc7, 0x1a, 0x31, 0x99, 0x6f, 0x94,
-        0xbb, 0x6c, 0xcf, 0x43, 0x29, 0xb1, 0xb6, 0xec, 0x62, 0xec, 0x9a, 0xc7,
-        0xb1, 0xbf, 0x8a, 0xb1, 0xf7, 0x4b, 0xd4, 0x0b, 0x82, 0x73, 0x18, 0xfb,
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+        0x52, 0x86, 0xed, 0xf6, 0xd1, 0xf4, 0x67, 0xc5, 0x7e, 0xea, 0xa0, 0xac,
+        0xd5, 0x7a, 0x80, 0x0f, 0xea, 0x85, 0x90, 0xf2, 0xaf, 0x6f, 0x1f, 0xa7,
+        0xbe, 0xa3, 0x2e, 0xd1, 0x67, 0xb1, 0x5d, 0xff, 0xc4, 0x80, 0xfe, 0x7e,
+        0x65, 0xbf, 0x6c, 0xd5, 0x7d, 0x5d, 0x08, 0xff, 0xb0, 0x16, 0x32, 0x7a,
+        0xb9, 0x17, 0xb2, 0xfb, 0xaf, 0x43, 0x0d, 0xe5, 0xab, 0x73, 0xff, 0xd4,
+        0x41, 0xea, 0xff, 0x70, 0xf4, 0x36, 0x5c, 0xee, 0xbd, 0x53, 0x07, 0x69,
+        0xbb, 0xc3, 0x39, 0xcc, 0xf5, 0x78, 0x1f, 0xc7, 0x3d, 0x46, 0x25, 0x74,
+        0xf1, 0x84, 0xd8, 0xf0, 0x5b, 0x02, 0x4b, 0xb4, 0xf5, 0xee, 0xf4, 0x5d,
+        0x02, 0x97, 0x6d, 0xf3, 0xad, 0xed, 0xb0, 0xb6, 0x65, 0x32, 0x28, 0x1b,
+        0xfe, 0xf7, 0xb7, 0xfc, 0xdd, 0xe1, 0xdb, 0x1d, 0x78, 0x03, 0x5d, 0x8a,
+        0xbf, 0xff, 0x0b, 0xc4, 0xbf, 0x6d, 0x24, 0x80, 0x4a, 0x00, 0x00, 0x00 };
 
 static const u32 bnx2_COM_b09FwData[(0x0/4) + 1] = { 0x0 };
 static const u32 bnx2_COM_b09FwRodata[(0x30/4) + 1] = {
-        0x80080100, 0x80080080, 0x80080000, 0x80080240, 0x08000e20, 0x08000e78,
-        0x08000ebc, 0x08000f50, 0x08000f94, 0x80080100, 0x80080080, 0x80080000,
+        0x80080100, 0x80080080, 0x80080000, 0x80080240, 0x08000ea4, 0x08000efc,
+        0x08000f40, 0x08000fd4, 0x08001018, 0x80080100, 0x80080080, 0x80080000,
         0x00000000 };
 
 static struct fw_info bnx2_com_fw_09 = {
-        /* Firmware version: 4.4.23 */
+        /* Firmware version: 4.6.15 */
         .ver_major                      = 0x4,
-        .ver_minor                      = 0x4,
-        .ver_fix                        = 0x17,
+        .ver_minor                      = 0x6,
+        .ver_fix                        = 0xf,
 
         .start_addr                     = 0x080000f8,
 
         .text_addr                      = 0x08000000,
-        .text_len                       = 0x4c18,
+        .text_len                       = 0x4a7c,
         .text_index                     = 0x0,
         .gz_text                        = bnx2_COM_b09FwText,
         .gz_text_len                    = sizeof(bnx2_COM_b09FwText),
@@ -866,1210 +865,1189 @@ static struct fw_info bnx2_com_fw_09 = {
         .data_index                     = 0x0,
         .data                           = bnx2_COM_b09FwData,
 
-        .sbss_addr                      = 0x08004c60,
+        .sbss_addr                      = 0x08004ae0,
         .sbss_len                       = 0x38,
         .sbss_index                     = 0x0,
 
-        .bss_addr                       = 0x08004c98,
-        .bss_len                        = 0xbc,
+        .bss_addr                       = 0x08004b18,
+        .bss_len                        = 0xc0,
         .bss_index                      = 0x0,
 
-        .rodata_addr                    = 0x08004c18,
+        .rodata_addr                    = 0x08004a7c,
         .rodata_len                     = 0x30,
         .rodata_index                   = 0x0,
         .rodata                         = bnx2_COM_b09FwRodata,
 };
 
 static u8 bnx2_CP_b09FwText[] = {
-        0xad, 0xbc, 0x0b, 0x74, 0x1c, 0xd5, 0x95, 0x2e, 0xfc, 0x55, 0x75, 0xb7,
-        0xd4, 0x92, 0xda, 0x52, 0x4b, 0x6e, 0xcb, 0x6d, 0xd0, 0xe0, 0x6a, 0xab,
-        0xda, 0x6a, 0x2c, 0x01, 0xd5, 0xb2, 0x0c, 0x4d, 0xa6, 0xc0, 0x1d, 0x5b,
-        0x80, 0x0c, 0x26, 0x11, 0xc6, 0xb9, 0x23, 0xe6, 0x7a, 0xfe, 0xf4, 0x18,
-        0x03, 0x86, 0x90, 0x5c, 0x33, 0x93, 0x9b, 0x71, 0xb8, 0x9e, 0xeb, 0x8a,
-        0xe4, 0x87, 0xc0, 0xa5, 0xee, 0x96, 0x90, 0x1f, 0xac, 0x35, 0xeb, 0xa7,
-        0x2d, 0xcb, 0x92, 0x21, 0xad, 0x16, 0x49, 0x98, 0x19, 0xe7, 0xe6, 0x81,
-        0xc6, 0xd8, 0x60, 0x93, 0xf0, 0xc8, 0x6b, 0xfd, 0x4c, 0xfe, 0xb9, 0x7f,
-        0x3c, 0xb6, 0x79, 0x83, 0xe3, 0x3c, 0x47, 0x9e, 0xc1, 0xa9, 0xff, 0xdb,
-        0xd5, 0xdd, 0xb6, 0xec, 0x40, 0x1e, 0xeb, 0x8e, 0xd6, 0xaa, 0xa5, 0xee,
-        0xaa, 0x73, 0xf6, 0x39, 0x67, 0x9f, 0xbd, 0xbf, 0xfd, 0xed, 0x73, 0x4e,
-        0xb5, 0x06, 0x54, 0xa3, 0xf4, 0x37, 0x8b, 0xd7, 0xd5, 0x1d, 0x1b, 0xee,
-        0x5e, 0xdc, 0x7e, 0x75, 0x87, 0x7c, 0xf7, 0xce, 0xf5, 0x7a, 0xf1, 0x61,
-        0x7f, 0x26, 0x12, 0x97, 0xde, 0xd2, 0x3e, 0xb4, 0xe0, 0x47, 0xfc, 0x25,
-        0x10, 0x91, 0x7f, 0xad, 0xa5, 0xaf, 0x1e, 0x20, 0x58, 0x6e, 0x5f, 0x2e,
-        0xf8, 0x55, 0xb3, 0xf3, 0xbf, 0x2e, 0xd3, 0xe1, 0xf7, 0x98, 0x9f, 0xff,
-        0x8b, 0xbb, 0x75, 0x20, 0x99, 0x6f, 0xd5, 0x96, 0xe3, 0x9c, 0x63, 0x85,
-        0xbc, 0x90, 0xfb, 0x7f, 0x62, 0x7e, 0xf0, 0xc4, 0xb7, 0xae, 0x8b, 0x9c,
-        0xc9, 0x79, 0xe0, 0x0f, 0x9a, 0x16, 0x82, 0x0b, 0xe1, 0x6f, 0x62, 0x9d,
-        0xbf, 0x6b, 0xd9, 0xa6, 0xa2, 0xb6, 0x2c, 0x2b, 0x12, 0xce, 0x21, 0x12,
-        0xb4, 0x10, 0x89, 0x59, 0x40, 0xca, 0x6b, 0x22, 0x55, 0x69, 0xfa, 0x51,
-        0xa1, 0x57, 0x20, 0x15, 0xdc, 0xa8, 0x6d, 0xe1, 0x18, 0x97, 0xd9, 0x7e,
-        0xed, 0x44, 0x1e, 0xb8, 0xdb, 0xf6, 0xe3, 0xb8, 0x27, 0xa0, 0x9d, 0xcc,
-        0xef, 0xab, 0x2b, 0xea, 0x23, 0x09, 0x8f, 0x8e, 0x94, 0x6a, 0xca, 0x7d,
-        0x68, 0xcb, 0xf3, 0x48, 0xf9, 0xcc, 0xcf, 0x6b, 0xe3, 0x36, 0xd0, 0x9b,
-        0x69, 0x36, 0x4e, 0xa0, 0x35, 0x7c, 0x18, 0x95, 0x48, 0x85, 0x22, 0x31,
-        0xe0, 0x83, 0x73, 0x8f, 0x66, 0x14, 0xf8, 0xf4, 0xd9, 0xe8, 0xdc, 0x0b,
-        0x3c, 0x92, 0x89, 0x24, 0x75, 0x05, 0xe8, 0x9f, 0x94, 0xba, 0x91, 0x60,
-        0x8e, 0xcf, 0xb7, 0x64, 0x80, 0xad, 0x99, 0xd9, 0xd8, 0x96, 0x75, 0xf0,
-        0x9c, 0xd1, 0x1c, 0xdc, 0xc7, 0x16, 0x7a, 0xdd, 0xe7, 0xb3, 0x61, 0xe5,
-        0xe4, 0xf9, 0x5b, 0xce, 0xb7, 0x5a, 0x82, 0x78, 0x7a, 0x32, 0x84, 0x67,
-        0x27, 0xeb, 0xf1, 0x48, 0xb6, 0x1e, 0xdb, 0xb3, 0x31, 0xa8, 0xba, 0x83,
-        0x58, 0x3c, 0x86, 0x8a, 0xeb, 0x1d, 0x9c, 0x34, 0xda, 0xb0, 0x95, 0x82,
-        0x5f, 0x6d, 0x6b, 0xc4, 0xda, 0x60, 0x13, 0xb6, 0xe8, 0xd7, 0xa1, 0x38,
-        0xd6, 0x0f, 0xce, 0x65, 0x32, 0xd2, 0x3f, 0xaf, 0xaa, 0xea, 0x37, 0xe2,
-        0xf4, 0x4e, 0x13, 0xef, 0xef, 0xc4, 0x9a, 0x5a, 0x38, 0x4e, 0x3e, 0x1e,
-        0xed, 0x7e, 0x50, 0x09, 0x6a, 0x4f, 0xe5, 0xd9, 0xa1, 0x55, 0x5e, 0xca,
-        0x83, 0x36, 0x92, 0x9f, 0x39, 0x15, 0x6c, 0x2f, 0xc3, 0x76, 0x33, 0xd2,
-        0x97, 0x30, 0xbe, 0xd5, 0xf2, 0xdf, 0x68, 0x0f, 0xc5, 0x31, 0x6d, 0xcd,
-        0xbc, 0xc6, 0x3e, 0x69, 0xec, 0x4f, 0x13, 0xbe, 0x36, 0x19, 0xc6, 0x57,
-        0xd9, 0xb7, 0xaf, 0x4c, 0x4a, 0x1f, 0x23, 0x7b, 0x2c, 0xd4, 0x63, 0x34,
-        0xdb, 0x84, 0xa7, 0xf5, 0x36, 0x7c, 0x85, 0x7d, 0xec, 0x33, 0x62, 0x58,
-        0x9b, 0xb8, 0x8b, 0xfd, 0x51, 0xb0, 0xaa, 0xed, 0x2f, 0x4b, 0xfd, 0x8a,
-        0x68, 0x50, 0x55, 0x24, 0x1b, 0x22, 0x31, 0x4d, 0x15, 0x99, 0x17, 0xfa,
-        0x3b, 0x90, 0x81, 0xe5, 0x37, 0xa5, 0xcf, 0x37, 0x22, 0xcf, 0xfe, 0x7e,
-        0x79, 0x67, 0xd4, 0x58, 0xaf, 0x62, 0x65, 0x80, 0x7d, 0x7e, 0x20, 0x1e,
-        0x4d, 0x2c, 0x62, 0x9f, 0xc7, 0xf3, 0x2a, 0xc7, 0x13, 0xd2, 0xc6, 0xd8,
-        0xf7, 0xe4, 0x2a, 0x95, 0x7d, 0x67, 0x5f, 0x32, 0xec, 0x4b, 0x86, 0x7d,
-        0xc9, 0xb0, 0x2f, 0x6e, 0xbf, 0x63, 0xec, 0x73, 0x71, 0x8e, 0x46, 0xf2,
-        0xc7, 0xd9, 0xdf, 0x99, 0xfd, 0x6c, 0x62, 0xdf, 0x91, 0xaa, 0xe7, 0xbc,
-        0x35, 0xa7, 0x65, 0xde, 0x1c, 0xe7, 0x55, 0xc3, 0x71, 0x7e, 0x6e, 0x04,
-        0xa8, 0xbf, 0x0c, 0xed, 0xa0, 0xdc, 0x9f, 0xf9, 0x56, 0x85, 0x89, 0x4e,
-        0x9a, 0xa0, 0x73, 0xa4, 0x23, 0x9a, 0x68, 0x50, 0x54, 0x78, 0xf5, 0xa0,
-        0xd6, 0x52, 0x88, 0x18, 0xd4, 0x8f, 0x16, 0x2d, 0x40, 0xd3, 0x0b, 0x94,
-        0x75, 0x51, 0xbb, 0x91, 0xe0, 0x14, 0xa4, 0x5d, 0x8d, 0xed, 0x1f, 0x2f,
-        0xcd, 0x9d, 0xc8, 0x0f, 0xb3, 0x4d, 0x69, 0x5f, 0x64, 0x3b, 0xce, 0xcf,
-        0x0c, 0xe8, 0x41, 0x44, 0xad, 0x41, 0xda, 0x9f, 0xc7, 0x0c, 0x6a, 0x1b,
-        0xf2, 0x7c, 0x7e, 0x5e, 0x46, 0x71, 0x3e, 0xd6, 0xe6, 0xb5, 0xd2, 0x18,
-        0x22, 0xec, 0x82, 0xd8, 0x41, 0x38, 0x15, 0x30, 0x83, 0xd2, 0xf7, 0xee,
-        0x3d, 0x03, 0x9b, 0x9d, 0x79, 0xba, 0xe8, 0x4a, 0xdf, 0x38, 0xcf, 0x13,
-        0x48, 0x9c, 0x5e, 0xf2, 0x90, 0x35, 0xab, 0x23, 0x8e, 0x6a, 0x1d, 0x81,
-        0x2a, 0x1d, 0xdd, 0xe9, 0x89, 0x6a, 0xab, 0xc6, 0xfc, 0xe6, 0x9d, 0x03,
-        0x13, 0x7e, 0x54, 0x4f, 0xe8, 0xa8, 0x9a, 0x78, 0xdc, 0x8b, 0x5a, 0x03,
-        0x3b, 0x26, 0xff, 0xcc, 0x5b, 0x1c, 0xdb, 0xcd, 0xa5, 0x31, 0xba, 0xb6,
-        0xef, 0x7f, 0xdd, 0x3e, 0xe3, 0x54, 0xe8, 0x55, 0x7f, 0xe6, 0x31, 0x75,
-        0x6d, 0x0c, 0x38, 0xb3, 0xb6, 0x63, 0x39, 0x7a, 0x83, 0x0a, 0xe6, 0xeb,
-        0x7f, 0x32, 0x0b, 0xb5, 0x26, 0xac, 0xc9, 0xc6, 0x54, 0x85, 0x19, 0x4a,
-        0x71, 0x6e, 0xf0, 0x82, 0x9d, 0x83, 0x6f, 0xc0, 0x71, 0xa4, 0xec, 0x49,
-        0xdc, 0x79, 0xa7, 0x6a, 0x1e, 0xba, 0xc6, 0x87, 0x4e, 0x96, 0xc7, 0xa6,
-        0xa3, 0x1d, 0x3f, 0x57, 0xd4, 0x9d, 0xdd, 0xb0, 0xc6, 0x3d, 0x48, 0x06,
-        0x53, 0xfc, 0x7f, 0xc5, 0x15, 0x2b, 0x13, 0xdd, 0xb0, 0xc7, 0xa7, 0x79,
-        0xdf, 0xcb, 0x7b, 0x26, 0xd2, 0x99, 0x2b, 0xae, 0xb8, 0x3d, 0x91, 0xc2,
-        0xc0, 0xb8, 0x7c, 0xf6, 0x62, 0xaa, 0x3e, 0x85, 0xed, 0xbb, 0x35, 0xd4,
-        0xe9, 0xdd, 0xc8, 0x8c, 0xcb, 0x67, 0xc7, 0x39, 0x65, 0x7c, 0x09, 0x7b,
-        0xda, 0xe8, 0xff, 0x73, 0xbb, 0xb1, 0x6d, 0xb7, 0x85, 0x4a, 0xdd, 0xa2,
-        0xee, 0x15, 0xef, 0x3f, 0xb7, 0x29, 0xd0, 0xee, 0x84, 0xb7, 0x42, 0x17,
-        0xbd, 0x25, 0xbc, 0xf7, 0xd8, 0x66, 0x70, 0xbe, 0xee, 0x38, 0x23, 0xc6,
-        0x22, 0x7c, 0xba, 0x7b, 0x2d, 0xac, 0x7d, 0x01, 0x58, 0xab, 0xe5, 0x7f,
-        0x37, 0x75, 0xb8, 0x16, 0xbd, 0xfb, 0xd6, 0xa2, 0xff, 0x31, 0x3a, 0x6e,
-        0x7d, 0xd0, 0x9d, 0xa7, 0x6f, 0xb5, 0x48, 0x9f, 0xa4, 0x7f, 0x3d, 0xbc,
-        0x44, 0xb7, 0x5f, 0xe0, 0x7f, 0x29, 0x33, 0xed, 0x60, 0xce, 0x85, 0x32,
-        0xdb, 0x59, 0x66, 0xdb, 0x45, 0x65, 0x4c, 0x3c, 0x31, 0x29, 0xba, 0x10,
-        0x95, 0xfd, 0x3e, 0x5d, 0x7c, 0xdb, 0xe9, 0x0d, 0x89, 0x2e, 0xac, 0x1e,
-        0x1f, 0x22, 0xdd, 0xf7, 0x2a, 0x5e, 0xac, 0x18, 0x00, 0xeb, 0xd0, 0x09,
-        0xaa, 0x23, 0xc9, 0x85, 0x8a, 0x89, 0xea, 0x01, 0x05, 0x2b, 0xe2, 0x55,
-        0xd0, 0xea, 0x45, 0xde, 0x8f, 0x1c, 0x2b, 0x28, 0xfd, 0x3d, 0x8a, 0x1a,
-        0xde, 0x5f, 0x17, 0xff, 0x01, 0xf1, 0x4c, 0xfa, 0x14, 0x67, 0xf9, 0x3b,
-        0x78, 0xff, 0x95, 0x19, 0xdf, 0xa5, 0x9c, 0xe3, 0xf4, 0x19, 0x06, 0xfa,
-        0x33, 0x6d, 0xd8, 0x9e, 0x49, 0x46, 0xa8, 0x25, 0xcb, 0x67, 0xf2, 0xbe,
-        0x19, 0xed, 0xea, 0x85, 0xb4, 0x03, 0xa5, 0xda, 0x84, 0x37, 0xdf, 0x71,
-        0xdc, 0xff, 0x92, 0xad, 0xf7, 0x3c, 0xa5, 0xf8, 0x68, 0xec, 0xd2, 0xce,
-        0x71, 0xff, 0x2b, 0xb6, 0x82, 0x37, 0xf5, 0xe8, 0x86, 0x77, 0x94, 0xe3,
-        0xfe, 0x97, 0xf3, 0x41, 0xcc, 0x1b, 0x88, 0xf4, 0x58, 0x4a, 0x02, 0x5f,
-        0xcf, 0x87, 0x10, 0x1e, 0x30, 0x71, 0x30, 0x6f, 0xe0, 0xc9, 0x8b, 0x70,
-        0xe0, 0x43, 0xff, 0x2c, 0x0f, 0xc7, 0xbe, 0xce, 0xd6, 0xd0, 0x6b, 0x9c,
-        0x73, 0x92, 0x41, 0xa4, 0xea, 0xcc, 0xe3, 0xfe, 0xf7, 0x07, 0xa0, 0xd4,
-        0x9a, 0x7a, 0xb8, 0xa0, 0xfc, 0xab, 0x93, 0x0a, 0x49, 0x31, 0xf6, 0xcf,
-        0xc5, 0xb2, 0x24, 0xed, 0xce, 0x20, 0xce, 0x9d, 0x71, 0x6a, 0x68, 0xb3,
-        0x15, 0xe6, 0x65, 0x18, 0x1f, 0xd6, 0xf1, 0xa4, 0xed, 0x38, 0xef, 0x19,
-        0x53, 0x89, 0x00, 0xf4, 0xee, 0x77, 0x11, 0x49, 0x2e, 0xa2, 0x5e, 0x8e,
-        0xe6, 0x75, 0x8c, 0xda, 0x26, 0x9e, 0xb3, 0x9b, 0x83, 0x7d, 0x58, 0x8c,
-        0x64, 0xb8, 0x18, 0x43, 0x26, 0xd8, 0xef, 0x91, 0x68, 0x37, 0xea, 0xcc,
-        0x04, 0x0e, 0xb1, 0xdf, 0xa7, 0x97, 0x88, 0x1c, 0x03, 0x2f, 0xff, 0x01,
-        0x7d, 0x25, 0xbe, 0xe3, 0x71, 0xf6, 0x35, 0xb1, 0xf8, 0x9c, 0x83, 0xd9,
-        0x7e, 0x9c, 0x30, 0xe6, 0xd2, 0x0e, 0x61, 0x55, 0x99, 0x7e, 0x6f, 0xbf,
-        0x1d, 0xc4, 0x81, 0x7c, 0xc0, 0xdb, 0x67, 0x87, 0xb0, 0x8f, 0xfe, 0x36,
-        0x8f, 0xa6, 0x1e, 0xa6, 0xdc, 0x79, 0xc4, 0xb5, 0xc2, 0x70, 0x13, 0x26,
-        0x87, 0x23, 0xc6, 0x2b, 0x4a, 0x18, 0x63, 0xa3, 0x97, 0x61, 0x62, 0x58,
-        0xc1, 0x78, 0x94, 0x7d, 0xe7, 0xe7, 0x2f, 0x0f, 0x5f, 0x81, 0xfc, 0xb0,
-        0x07, 0x3b, 0x5c, 0xbd, 0xba, 0x38, 0x53, 0xfa, 0x7f, 0x19, 0x72, 0xa3,
-        0xf0, 0x2e, 0x1a, 0x08, 0xe2, 0xa9, 0xbc, 0xd7, 0xab, 0x0f, 0x84, 0x30,
-        0x9a, 0xff, 0x36, 0xe7, 0x4d, 0x64, 0x6b, 0x18, 0xb1, 0xc7, 0xdc, 0x39,
-        0xac, 0x33, 0x29, 0xac, 0x18, 0x5f, 0x19, 0xcb, 0x34, 0xc6, 0x99, 0x04,
-        0x71, 0x48, 0x7c, 0xdc, 0x4f, 0x0c, 0x12, 0x1f, 0x7f, 0x4d, 0x41, 0x6d,
-        0x02, 0x7d, 0x93, 0xe5, 0xe7, 0x0a, 0xed, 0xdf, 0x8b, 0x75, 0x41, 0x03,
-        0x76, 0x46, 0xec, 0xb4, 0x8c, 0xcb, 0xf2, 0x59, 0xe6, 0xbf, 0x1a, 0xd6,
-        0xfe, 0x6a, 0xec, 0xa0, 0x8f, 0x3d, 0xba, 0x53, 0xee, 0x3b, 0xce, 0x7d,
-        0xf1, 0x3a, 0xda, 0x18, 0x6e, 0xaa, 0x42, 0xd4, 0x78, 0xcb, 0xed, 0x9b,
-        0x85, 0xb1, 0xbc, 0xc4, 0x50, 0x8d, 0xf1, 0xed, 0x28, 0xdb, 0xea, 0x60,
-        0x3b, 0x06, 0xbe, 0x3d, 0xd9, 0x86, 0x7f, 0x9c, 0x8c, 0xe1, 0x1f, 0x26,
-        0x75, 0xfc, 0xfd, 0xa4, 0x86, 0x67, 0x2e, 0xc2, 0xf5, 0x3b, 0xa9, 0x2b,
-        0xc1, 0x30, 0x03, 0x5b, 0x32, 0x15, 0xd8, 0x36, 0x5c, 0x8d, 0xbe, 0xe1,
-        0xe6, 0xd8, 0x73, 0xc4, 0xe3, 0x7f, 0x30, 0x6e, 0xc7, 0x54, 0x43, 0x87,
-        0xeb, 0x33, 0x8f, 0xf0, 0xfe, 0xa3, 0xc3, 0xcd, 0x9c, 0x43, 0xc7, 0x51,
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+        0x9a, 0x46, 0x5d, 0xfb, 0x8d, 0x4d, 0x1c, 0xb7, 0x07, 0xd3, 0x99, 0xdb,
+        0x85, 0x6b, 0xeb, 0xdb, 0x1a, 0xd5, 0x6b, 0x10, 0xab, 0x08, 0x6a, 0x31,
+        0x72, 0xcd, 0x1e, 0xe7, 0xff, 0xed, 0xc8, 0xb9, 0x14, 0xab, 0xd5, 0x4b,
+        0x4c, 0x6f, 0x52, 0x14, 0x14, 0x84, 0xe0, 0x7e, 0x28, 0xe3, 0x86, 0x56,
+        0xfb, 0x5b, 0xfb, 0x17, 0x7e, 0x03, 0xdb, 0xc6, 0x6e, 0xb9, 0xf4, 0xff,
+        0x87, 0xfe, 0x63, 0xf6, 0xea, 0xec, 0x37, 0xdf, 0xe6, 0xc7, 0x76, 0x6c,
+        0xba, 0xf4, 0x2d, 0xed, 0xfe, 0x31, 0x59, 0xf3, 0xef, 0x7a, 0xd4, 0xe8,
+        0x2e, 0x94, 0x63, 0xab, 0xb9, 0xde, 0x2f, 0x67, 0xe5, 0xd6, 0x43, 0xf6,
+        0xff, 0x65, 0x0e, 0xe4, 0x1d, 0xc3, 0x08, 0xf3, 0x6e, 0xd1, 0x4b, 0x14,
+        0x0f, 0x66, 0xe4, 0x9d, 0xa0, 0x59, 0x90, 0xff, 0xfb, 0xf5, 0x60, 0x26,
+        0xa7, 0xbf, 0x47, 0x33, 0x3e, 0xe6, 0x00, 0x3e, 0xda, 0x60, 0x07, 0xf9,
+        0x0b, 0xf9, 0xd3, 0x25, 0x5d, 0xde, 0xeb, 0x97, 0x75, 0x85, 0xef, 0xd3,
+        0xa7, 0xdd, 0xb5, 0x72, 0x6d, 0xc9, 0xb9, 0x51, 0x25, 0x77, 0x7d, 0xde,
+        0x79, 0x37, 0x52, 0x8d, 0xae, 0xc3, 0xc2, 0xc4, 0x34, 0x39, 0x3f, 0x29,
+        0x6b, 0x36, 0x96, 0x3f, 0x2a, 0xef, 0x61, 0xf8, 0x88, 0xb1, 0x5f, 0xf5,
+        0x4f, 0xbe, 0x73, 0xd5, 0xba, 0x82, 0x38, 0x36, 0x27, 0x6c, 0xc4, 0x9a,
+        0x94, 0xa0, 0xbe, 0x52, 0x69, 0x63, 0xbd, 0x3a, 0xf4, 0x64, 0xa5, 0x0d,
+        0xc5, 0xf9, 0xdf, 0x92, 0x1e, 0xb6, 0x71, 0x30, 0x51, 0xaf, 0x7b, 0xd4,
+        0x4f, 0x6d, 0xcb, 0x39, 0x03, 0x29, 0xfb, 0xf6, 0x71, 0xbc, 0x94, 0x98,
+        0x4e, 0x94, 0xba, 0xba, 0xdd, 0x4b, 0xeb, 0xe7, 0x7f, 0xa3, 0x21, 0xc6,
+        0xb6, 0x82, 0x9d, 0x61, 0x57, 0x70, 0xc3, 0x05, 0xe2, 0x4a, 0x36, 0x6c,
+        0xc4, 0x7f, 0xc0, 0x3e, 0xfe, 0x56, 0xa9, 0x43, 0x62, 0x4a, 0xfb, 0xb9,
+        0xb6, 0xea, 0xdb, 0x0b, 0xd4, 0xf3, 0xce, 0xbb, 0xf8, 0xd2, 0xbe, 0x16,
+        0x5d, 0x0d, 0x2d, 0x69, 0xd9, 0x7e, 0xb6, 0x39, 0x33, 0x1a, 0xdc, 0x57,
+        0x41, 0x30, 0xfa, 0xb6, 0xda, 0x85, 0x35, 0x72, 0x3c, 0x24, 0x1a, 0xd4,
+        0x1f, 0xa0, 0x7d, 0x34, 0x3a, 0x6d, 0xc4, 0xea, 0x0a, 0x20, 0x9c, 0xf2,
+        0x4b, 0xed, 0x84, 0x39, 0x81, 0x70, 0x31, 0x96, 0x73, 0xce, 0x03, 0xc8,
+        0xb9, 0x49, 0xe6, 0x0d, 0x09, 0xf9, 0xbf, 0x7d, 0x4e, 0x37, 0x93, 0x7b,
+        0x5a, 0xcc, 0xd7, 0x19, 0xaf, 0xd7, 0xcb, 0xff, 0x48, 0x2a, 0xf6, 0xe1,
+        0xc1, 0x84, 0xac, 0x81, 0xfc, 0x1f, 0x05, 0x3f, 0x96, 0xb4, 0x1c, 0x54,
+        0x00, 0x00, 0x00 };
 
 static const u32 bnx2_CP_b09FwData[(0x84/4) + 1] = {
         0x00000000, 0x0000001b, 0x0000000f, 0x0000000a, 0x00000008, 0x00000006,
@@ -2079,1076 +2057,1088 @@ static const u32 bnx2_CP_b09FwData[(0x84/4) + 1] = {
         0x00000002, 0x00000002, 0x00000002, 0x00000002, 0x00000002, 0x00000002,
         0x00000001, 0x00000001, 0x00000001, 0x00000000 };
 static const u32 bnx2_CP_b09FwRodata[(0x16c/4) + 1] = {
-        0x80080100, 0x80080080, 0x80080000, 0x08001744, 0x08001744, 0x0800177c,
-        0x0800177c, 0x08001790, 0x08001760, 0x080019b8, 0x08001984, 0x08001a10,
-        0x08001a10, 0x08001a98, 0x080019c8, 0x80080240, 0x08003260, 0x080031cc,
-        0x08003288, 0x080032b0, 0x080032d8, 0x080032fc, 0x08003344, 0x08003320,
-        0x08003368, 0x08003234, 0x0800345c, 0x0800344c, 0x080031e8, 0x080031e8,
-        0x080031e8, 0x080033bc, 0x080033bc, 0x080031e8, 0x080031e8, 0x0800343c,
-        0x080031e8, 0x080031e8, 0x080031e8, 0x080031e8, 0x0800342c, 0x080031e8,
-        0x080031e8, 0x080031e8, 0x080031e8, 0x080031e8, 0x080031e8, 0x080031e8,
-        0x080031e8, 0x080031e8, 0x080031e8, 0x080031e8, 0x080031e8, 0x080031e8,
-        0x080031e8, 0x0800341c, 0x080031e8, 0x080031e8, 0x0800340c, 0x080031e8,
-        0x080031e8, 0x080031e8, 0x080031e8, 0x080031e8, 0x080031e8, 0x080031e8,
-        0x080031e8, 0x080031e8, 0x080031e8, 0x080031e8, 0x080031e8, 0x080031e8,
-        0x080031e8, 0x080031e8, 0x080031e8, 0x080031e8, 0x080033f4, 0x080031e8,
-        0x080031e8, 0x080033e4, 0x080033d4, 0x08003d6c, 0x08003d40, 0x08003d0c,
-        0x08003ce0, 0x08003cc0, 0x08003c74, 0x80080100, 0x80080080, 0x80080000,
+        0x80080100, 0x80080080, 0x80080000, 0x08001800, 0x08001800, 0x08001838,
+        0x08001838, 0x0800184c, 0x0800181c, 0x08001a74, 0x08001a40, 0x08001acc,
+        0x08001acc, 0x08001b54, 0x08001a84, 0x80080240, 0x080021c4, 0x08002010,
+        0x080021ec, 0x08002284, 0x080023d4, 0x08002420, 0x08002544, 0x0800244c,
+        0x080024d0, 0x08002080, 0x080029f8, 0x0800299c, 0x0800202c, 0x0800202c,
+        0x0800202c, 0x080025b8, 0x080025b8, 0x0800202c, 0x0800202c, 0x08002874,
+        0x0800202c, 0x0800202c, 0x0800202c, 0x0800202c, 0x080028d4, 0x0800202c,
+        0x0800202c, 0x0800202c, 0x0800202c, 0x0800202c, 0x0800202c, 0x0800202c,
+        0x0800202c, 0x0800202c, 0x0800202c, 0x0800202c, 0x0800202c, 0x0800202c,
+        0x0800202c, 0x08002440, 0x0800202c, 0x0800202c, 0x08002944, 0x0800202c,
+        0x0800202c, 0x0800202c, 0x0800202c, 0x0800202c, 0x0800202c, 0x0800202c,
+        0x0800202c, 0x0800202c, 0x0800202c, 0x0800202c, 0x0800202c, 0x0800202c,
+        0x0800202c, 0x0800202c, 0x0800202c, 0x0800202c, 0x08002798, 0x0800202c,
+        0x0800202c, 0x08002700, 0x0800265c, 0x080037c0, 0x08003794, 0x08003760,
+        0x08003734, 0x08003714, 0x080036c8, 0x80080100, 0x80080080, 0x80080000,
         0x80080080, 0x00000000 };
 
 static struct fw_info bnx2_cp_fw_09 = {
-        /* Firmware version: 4.4.23 */
+        /* Firmware version: 4.6.15 */
         .ver_major                      = 0x4,
-        .ver_minor                      = 0x4,
-        .ver_fix                        = 0x17,
+        .ver_minor                      = 0x6,
+        .ver_fix                        = 0xf,
 
         .start_addr                     = 0x08000080,
 
         .text_addr                      = 0x08000000,
-        .text_len                       = 0x5938,
+        .text_len                       = 0x5418,
         .text_index                     = 0x0,
         .gz_text                        = bnx2_CP_b09FwText,
         .gz_text_len                    = sizeof(bnx2_CP_b09FwText),
 
-        .data_addr                      = 0x08005ac0,
+        .data_addr                      = 0x080055a0,
         .data_len                       = 0x84,
         .data_index                     = 0x0,
         .data                           = bnx2_CP_b09FwData,
 
-        .sbss_addr                      = 0x08005b44,
+        .sbss_addr                      = 0x08005624,
         .sbss_len                       = 0x91,
         .sbss_index                     = 0x0,
 
-        .bss_addr                       = 0x08005bd8,
+        .bss_addr                       = 0x080056b8,
         .bss_len                        = 0x19c,
         .bss_index                      = 0x0,
 
-        .rodata_addr                    = 0x08005938,
+        .rodata_addr                    = 0x08005418,
         .rodata_len                     = 0x16c,
         .rodata_index                   = 0x0,
         .rodata                         = bnx2_CP_b09FwRodata,
 };
 
 static u8 bnx2_RXP_b09FwText[] = {
-        0xec, 0x5c, 0x7f, 0x70, 0x1c, 0xd5, 0x7d, 0xff, 0xbc, 0xbd, 0xbd, 0xbb,
-        0x95, 0x74, 0x3e, 0xed, 0x9d, 0x4e, 0xb2, 0x04, 0x06, 0xef, 0xa2, 0x95,
-        0x74, 0x58, 0xc6, 0xec, 0x9d, 0x4e, 0xb6, 0x48, 0xb7, 0xc9, 0xd5, 0x36,
-        0x20, 0x17, 0x52, 0x84, 0xa1, 0xc1, 0xcc, 0x30, 0x9d, 0x1b, 0x63, 0x8c,
-        0xb0, 0x1d, 0xa2, 0x00, 0x33, 0xc8, 0x29, 0x13, 0x16, 0xfc, 0xb3, 0xf8,
-        0xa4, 0x93, 0x8d, 0x8c, 0xc9, 0xf4, 0xd7, 0x21, 0xcb, 0x8a, 0x81, 0x93,
-        0xce, 0x04, 0xda, 0x98, 0x69, 0xa8, 0x15, 0x6c, 0x53, 0x87, 0x5f, 0x21,
-        0x19, 0x68, 0x4d, 0x9b, 0x99, 0xa8, 0x06, 0x1c, 0xd3, 0xa6, 0xd4, 0xb4,
-        0x0e, 0xb5, 0x8b, 0xeb, 0xd7, 0xef, 0x77, 0x4f, 0x97, 0x50, 0x42, 0xcb,
-        0x64, 0xa6, 0x7f, 0xee, 0x77, 0xe6, 0xe6, 0xf6, 0xde, 0xfb, 0xbe, 0xef,
-        0x7b, 0xdf, 0xdf, 0x9f, 0xb7, 0x1a, 0xfb, 0xbe, 0x08, 0x6a, 0x31, 0x4b,
-        0x73, 0xe8, 0x93, 0x19, 0x18, 0xbc, 0x27, 0xbd, 0x28, 0xb3, 0x88, 0x1e,
-        0xbb, 0x02, 0x73, 0x55, 0x95, 0xc7, 0x05, 0x7c, 0xf2, 0xc9, 0x27, 0x9f,
-        0x7c, 0xf2, 0xc9, 0x27, 0x9f, 0x7c, 0xf2, 0xc9, 0x27, 0x9f, 0x7c, 0xf2,
-        0xc9, 0x27, 0x9f, 0x7c, 0xf2, 0xc9, 0x27, 0x9f, 0x7c, 0xf2, 0xc9, 0x27,
-        0x9f, 0x7c, 0xf2, 0xc9, 0x27, 0x9f, 0x7c, 0xf2, 0xc9, 0x27, 0x9f, 0x7c,
-        0xf2, 0xc9, 0x27, 0x9f, 0x7c, 0xf2, 0xc9, 0x27, 0x9f, 0x7c, 0xf2, 0xc9,
-        0x27, 0x9f, 0x7c, 0xf2, 0xc9, 0x27, 0x9f, 0x7c, 0xfa, 0xff, 0xa4, 0x00,
-        0xa0, 0xf3, 0xf7, 0x9c, 0xd9, 0x0f, 0x34, 0xc5, 0x71, 0x37, 0x2e, 0xb5,
-        0xa0, 0x05, 0x9c, 0x33, 0x1b, 0x6f, 0xb7, 0x80, 0x6c, 0xa9, 0xd3, 0x58,
-        0x86, 0xff, 0x92, 0x6e, 0x42, 0x05, 0x8f, 0x5f, 0xe2, 0x9c, 0xff, 0xf3,
-        0x17, 0x96, 0x98, 0xa7, 0x8b, 0x01, 0x68, 0xba, 0xf3, 0x46, 0x4a, 0x6f,
-        0x87, 0x36, 0x8f, 0xd6, 0xfc, 0x49, 0xc7, 0x95, 0x71, 0x44, 0xab, 0xb2,
-        0xe0, 0x2a, 0x8e, 0x94, 0xfb, 0x6c, 0x89, 0x97, 0x6c, 0x57, 0xf4, 0x66,
-        0xe0, 0x06, 0x9c, 0x83, 0xe2, 0xae, 0xfc, 0x05, 0x69, 0x04, 0x2b, 0x3b,
-        0xab, 0x93, 0x1a, 0x82, 0xfb, 0xa0, 0xab, 0x8e, 0x82, 0xa0, 0x55, 0x8b,
-        0xd0, 0x13, 0x75, 0x08, 0x3e, 0xd1, 0x8c, 0xf0, 0xe4, 0x01, 0x91, 0x2b,
-        0x6a, 0x98, 0x09, 0x1c, 0x14, 0x6b, 0x4a, 0xc8, 0x05, 0x9d, 0xb3, 0x37,
-        0x8c, 0xd1, 0xba, 0xac, 0xf7, 0xef, 0x4b, 0xa6, 0x6f, 0x18, 0x2f, 0x41,
-        0x0f, 0x38, 0x50, 0x54, 0xe7, 0x08, 0x3d, 0x33, 0xdf, 0xd9, 0x1b, 0xf6,
-        0x96, 0x4e, 0xc9, 0x17, 0x3a, 0x12, 0x38, 0x54, 0xd6, 0x71, 0xa0, 0xfc,
-        0x10, 0x9d, 0xc3, 0x74, 0x5d, 0x68, 0xae, 0xea, 0xb8, 0xd8, 0x92, 0x09,
-        0x62, 0x62, 0xe4, 0x82, 0x0c, 0x58, 0xa6, 0x01, 0xc5, 0xd2, 0x0f, 0x83,
-        0xf8, 0x0a, 0xc4, 0x57, 0x08, 0x62, 0xac, 0xb8, 0x23, 0x8e, 0xda, 0x66,
-        0xbc, 0xd0, 0xc1, 0xeb, 0x79, 0x2d, 0xcb, 0xf8, 0x38, 0x5a, 0x5d, 0x1f,
-        0xa2, 0xf5, 0x47, 0x33, 0xc0, 0xf8, 0x48, 0x1f, 0x2d, 0x95, 0xd8, 0x64,
-        0x87, 0xb1, 0x5a, 0x87, 0x5b, 0xe3, 0xb0, 0xac, 0xaa, 0x1c, 0x57, 0x18,
-        0x93, 0xff, 0x5c, 0x5f, 0x91, 0x03, 0xa1, 0x59, 0x70, 0xc3, 0x9f, 0x9a,
-        0x3f, 0x55, 0xaa, 0xce, 0x6f, 0xa7, 0x7d, 0x34, 0x9a, 0xef, 0xc7, 0x5f,
-        0x96, 0xd7, 0xe0, 0x2f, 0xca, 0xb7, 0xe1, 0xd9, 0x72, 0x1f, 0xed, 0x7b,
-        0x1f, 0xed, 0x3b, 0x80, 0xbf, 0x2e, 0x6f, 0xc0, 0x77, 0xcb, 0x39, 0x3c,
-        0x57, 0x5e, 0x85, 0xef, 0x94, 0x6f, 0xc6, 0x33, 0x65, 0x78, 0x67, 0x38,
-        0x95, 0x49, 0x8a, 0x1f, 0xe5, 0x6b, 0xa0, 0xee, 0xdc, 0x8c, 0xe9, 0x52,
-        0x10, 0xc1, 0x9d, 0x12, 0x23, 0xb6, 0xf9, 0x38, 0xd0, 0xa1, 0x07, 0x21,
-        0xb0, 0xcc, 0x36, 0xf7, 0x03, 0x5f, 0x40, 0x2e, 0x61, 0x1e, 0x00, 0x9a,
-        0xc4, 0x8f, 0x47, 0x9b, 0xc4, 0x6b, 0xa3, 0xaa, 0x78, 0x3d, 0x2f, 0x50,
-        0xef, 0x20, 0xf2, 0x72, 0x46, 0xca, 0xeb, 0xd2, 0x52, 0x96, 0x52, 0x56,
-        0xef, 0x0f, 0x85, 0x69, 0x3f, 0x22, 0x2e, 0x85, 0xd1, 0x68, 0x66, 0xd7,
-        0x09, 0xcd, 0xad, 0x25, 0xf9, 0x2b, 0xba, 0x01, 0x6b, 0xa7, 0x41, 0x7e,
-        0x60, 0x1d, 0x37, 0xe1, 0x0e, 0x2f, 0x26, 0xfa, 0xd0, 0x60, 0x2d, 0xc5,
-        0xbd, 0x7d, 0x36, 0x8a, 0x65, 0x68, 0x31, 0xe7, 0x0c, 0x52, 0xc3, 0x02,
-        0x36, 0xf9, 0x5b, 0xd0, 0xb3, 0x5d, 0x5a, 0xdf, 0x50, 0xf1, 0x37, 0x9d,
-        0xbd, 0x40, 0x67, 0x2f, 0xd0, 0xd9, 0x0b, 0xa4, 0x57, 0x81, 0xf4, 0x2a,
-        0x90, 0x0e, 0x05, 0xd2, 0xad, 0x40, 0x7a, 0x14, 0x48, 0x8f, 0x02, 0xe9,
-        0x58, 0x60, 0x5f, 0x0d, 0x92, 0x0d, 0x22, 0xf8, 0xbb, 0xfc, 0x3c, 0x9c,
-        0xe1, 0xcf, 0x4a, 0x1d, 0xc7, 0xe9, 0x8c, 0x8a, 0xf5, 0x9b, 0xca, 0xf8,
-        0x6e, 0x84, 0x7c, 0x64, 0xfc, 0xe6, 0x7b, 0x2f, 0xc4, 0xc9, 0xfc, 0xbb,
-        0x32, 0x34, 0x97, 0xf7, 0xfc, 0x22, 0xe4, 0x28, 0x70, 0xe9, 0x6e, 0x29,
-        0xcf, 0x75, 0xcd, 0xc8, 0xb7, 0x6f, 0x61, 0x59, 0x0e, 0x4e, 0x8c, 0x2a,
-        0x08, 0xd0, 0xd8, 0xb5, 0xf6, 0xdf, 0xcb, 0x3b, 0x13, 0xcc, 0xf7, 0x51,
-        0x04, 0xb5, 0x6c, 0x27, 0x68, 0x0d, 0xce, 0xbb, 0x1b, 0xef, 0x6d, 0x87,
-        0x1b, 0x75, 0x54, 0xf1, 0xe6, 0x90, 0x81, 0xb9, 0x4e, 0x16, 0x73, 0x1c,
-        0x6b, 0x64, 0x8f, 0xd2, 0x39, 0x18, 0x47, 0xf6, 0xf2, 0x7a, 0xd8, 0xd8,
-        0x57, 0x56, 0xc5, 0xab, 0x43, 0x73, 0x10, 0xdf, 0x69, 0xad, 0x1a, 0x12,
-        0x0a, 0x72, 0x8d, 0x59, 0x8c, 0x67, 0x4c, 0xa3, 0x08, 0x03, 0xab, 0xd2,
-        0x0a, 0x30, 0xd7, 0xc5, 0xd6, 0x8c, 0x69, 0xbb, 0x78, 0x08, 0xd3, 0x09,
-        0x1b, 0x13, 0x65, 0x8d, 0x72, 0xc3, 0xc5, 0x9d, 0x19, 0x0d, 0x72, 0x24,
-        0x8b, 0x93, 0x5d, 0x21, 0x4c, 0xf7, 0x71, 0x8c, 0xa8, 0xb4, 0xf7, 0x56,
-        0x28, 0xf1, 0x38, 0xf9, 0xe5, 0xb0, 0x0c, 0xc6, 0x79, 0x0c, 0xe2, 0x5f,
-        0x32, 0xbc, 0xff, 0x45, 0xe2, 0xd5, 0xdd, 0x51, 0xd4, 0xee, 0xd6, 0xf0,
-        0xf4, 0x4e, 0x15, 0x2b, 0xc8, 0xb7, 0x7b, 0x52, 0xaa, 0xb1, 0x4e, 0x38,
-        0x18, 0x2f, 0xab, 0x48, 0x0c, 0xb5, 0xc0, 0x88, 0x69, 0xb8, 0x74, 0xc8,
-        0xc5, 0x3b, 0x24, 0x77, 0x90, 0xe4, 0xd6, 0x77, 0xe9, 0x98, 0x69, 0xac,
-        0xf8, 0xf5, 0xeb, 0xf9, 0x56, 0x77, 0xa7, 0x12, 0x02, 0x42, 0x70, 0x35,
-        0x27, 0x83, 0xfb, 0xf3, 0xad, 0xa4, 0xc3, 0xad, 0x58, 0x1a, 0xd2, 0xb0,
-        0x7a, 0x98, 0xc7, 0x96, 0x03, 0x93, 0x73, 0xe7, 0xa0, 0x96, 0xf5, 0xe7,
-        0x7c, 0x5e, 0x4a, 0xcf, 0x1c, 0x07, 0xbf, 0x9d, 0x60, 0xbb, 0xbb, 0xca,
-        0x7f, 0xc8, 0x6c, 0x82, 0xf9, 0x2a, 0x39, 0x72, 0x38, 0x93, 0xc1, 0xc6,
-        0x7c, 0x6b, 0xf6, 0x5b, 0x4a, 0x03, 0x10, 0x34, 0x0d, 0x43, 0x81, 0x96,
-        0x70, 0x90, 0x1a, 0xa5, 0x78, 0x79, 0xd4, 0x8b, 0x17, 0xa4, 0xba, 0x4a,
-        0x9c, 0x97, 0x9a, 0xab, 0x13, 0xff, 0xfc, 0xc5, 0x6d, 0xf8, 0xe8, 0x51,
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+        0xc4, 0x8d, 0x5e, 0x7d, 0x95, 0xa2, 0x79, 0x8a, 0x14, 0xa9, 0x87, 0x69,
+        0xf8, 0x55, 0xfa, 0x9f, 0xef, 0x90, 0x78, 0xb7, 0x67, 0xac, 0x12, 0x6b,
+        0x76, 0x9b, 0x4b, 0xe6, 0x2d, 0x34, 0x97, 0xa4, 0x43, 0x31, 0xf3, 0xa5,
+        0x6a, 0xd9, 0x4f, 0xa9, 0xf1, 0xc9, 0x33, 0x9a, 0xea, 0x63, 0x9c, 0xf9,
+        0x4d, 0x7d, 0xbb, 0xbc, 0xa3, 0x07, 0x79, 0x7f, 0xa9, 0x90, 0x63, 0x9c,
+        0x4c, 0x89, 0x8e, 0x6c, 0x6d, 0x77, 0x31, 0x16, 0x95, 0x77, 0x67, 0x0f,
+        0x73, 0xef, 0x0f, 0xa6, 0xfe, 0xd7, 0x1d, 0x72, 0x76, 0x5d, 0xce, 0x06,
+        0x00, 0xff, 0x1f, 0x17, 0x23, 0xca, 0x76, 0xf8, 0x78, 0x00, 0x00, 0x00 };
 
 static const u32 bnx2_RXP_b09FwData[(0x0/4) + 1] = { 0x0 };
-static const u32 bnx2_RXP_b09FwRodata[(0xf0/4) + 1] = {
+static const u32 bnx2_RXP_b09FwRodata[(0x124/4) + 1] = {
         0x5f865437, 0xe4ac62cc, 0x50103a45, 0x36621985, 0xbf14c0e8, 0x1bc27a1e,
         0x84f4b556, 0x094ea6fe, 0x7dda01e7, 0xc04d7481, 0x80080100, 0x80080080,
-        0x80080000, 0x08004efc, 0x08004efc, 0x08004fd8, 0x08004fac, 0x08004f90,
-        0x08004ecc, 0x08004ecc, 0x08004ecc, 0x08004f04, 0x08007220, 0x0800726c,
-        0x0800722c, 0x08007150, 0x0800722c, 0x0800725c, 0x0800722c, 0x08007150,
-        0x08007150, 0x08007150, 0x08007150, 0x08007150, 0x08007150, 0x08007150,
-        0x08007150, 0x08007150, 0x08007150, 0x0800724c, 0x0800723c, 0x08007150,
-        0x08007150, 0x08007150, 0x08007150, 0x08007150, 0x08007150, 0x08007150,
-        0x08007150, 0x08007150, 0x08007150, 0x08007150, 0x08007150, 0x0800723c,
-        0x080077f4, 0x080076bc, 0x080077bc, 0x08007718, 0x080076e8, 0x080075a4,
-        0x00000000 };
+        0x80080000, 0x08004fbc, 0x08004fbc, 0x08005098, 0x0800506c, 0x08005050,
+        0x08004f8c, 0x08004f8c, 0x08004f8c, 0x08004fc4, 0x080072ac, 0x080072f8,
+        0x080072b8, 0x080071dc, 0x080072b8, 0x080072e8, 0x080072b8, 0x080071dc,
+        0x080071dc, 0x080071dc, 0x080071dc, 0x080071dc, 0x080071dc, 0x080071dc,
+        0x080071dc, 0x080071dc, 0x080071dc, 0x080072d8, 0x080072c8, 0x080071dc,
+        0x080071dc, 0x080071dc, 0x080071dc, 0x080071dc, 0x080071dc, 0x080071dc,
+        0x080071dc, 0x080071dc, 0x080071dc, 0x080071dc, 0x080071dc, 0x080072c8,
+        0x0800787c, 0x08007748, 0x08007844, 0x08007748, 0x08007814, 0x08007630,
+        0x08007748, 0x08007748, 0x08007748, 0x08007748, 0x08007748, 0x08007748,
+        0x08007748, 0x08007748, 0x08007748, 0x08007748, 0x08007748, 0x08007748,
+        0x08007770, 0x00000000 };
 
 static struct fw_info bnx2_rxp_fw_09 = {
-        /* Firmware version: 4.4.23 */
+        /* Firmware version: 4.6.15 */
         .ver_major                      = 0x4,
-        .ver_minor                      = 0x4,
-        .ver_fix                        = 0x17,
+        .ver_minor                      = 0x6,
+        .ver_fix                        = 0xf,
 
-        .start_addr                     = 0x080031d0,
+        .start_addr                     = 0x080031d8,
 
         .text_addr                      = 0x08000000,
-        .text_len                       = 0x786c,
+        .text_len                       = 0x78f4,
         .text_index                     = 0x0,
         .gz_text                        = bnx2_RXP_b09FwText,
         .gz_text_len                    = sizeof(bnx2_RXP_b09FwText),
@@ -3158,548 +3148,492 @@ static struct fw_info bnx2_rxp_fw_09 = {
         .data_index                     = 0x0,
         .data                           = bnx2_RXP_b09FwData,
 
-        .sbss_addr                      = 0x08007980,
+        .sbss_addr                      = 0x08007a40,
         .sbss_len                       = 0x58,
         .sbss_index                     = 0x0,
 
-        .bss_addr                       = 0x080079d8,
-        .bss_len                        = 0x1c,
+        .bss_addr                       = 0x08007a98,
+        .bss_len                        = 0x20,
         .bss_index                      = 0x0,
 
-        .rodata_addr                    = 0x0800786c,
-        .rodata_len                     = 0xf0,
+        .rodata_addr                    = 0x080078f4,
+        .rodata_len                     = 0x124,
         .rodata_index                   = 0x0,
         .rodata                         = bnx2_RXP_b09FwRodata,
 };
 
 static u8 bnx2_xi_rv2p_proc1[] = {
-        /* Date:        06/17/2008 16:52 */
-        0xbd, 0x56, 0xcf, 0x6b, 0x1c, 0x75, 0x14, 0x7f, 0x3b, 0xbb, 0x33, 0x3b,
-        0x99, 0x9d, 0xdd, 0x99, 0xda, 0x34, 0x4c, 0xb7, 0x2b, 0xd9, 0x86, 0x5e,
-        0x36, 0x99, 0x62, 0xa2, 0x11, 0x0a, 0x46, 0x5b, 0x72, 0x09, 0xd8, 0x9e,
-        0x02, 0x95, 0x22, 0x82, 0x71, 0xa9, 0x3d, 0xd8, 0x96, 0xe2, 0x5f, 0xe0,
-        0x90, 0x9a, 0x08, 0x45, 0x0f, 0x0b, 0x36, 0x90, 0x20, 0x1a, 0x7b, 0x50,
-        0x09, 0x0a, 0x3b, 0x07, 0x41, 0x44, 0x2d, 0xa8, 0x88, 0x60, 0x3d, 0x08,
-        0x85, 0xda, 0x8b, 0x51, 0x8b, 0x8a, 0x07, 0x0f, 0x01, 0x8f, 0x9a, 0xf1,
-        0xfb, 0x7e, 0x7c, 0x37, 0x33, 0x93, 0xdd, 0x24, 0x27, 0x03, 0xed, 0x87,
-        0xf7, 0x9d, 0xf7, 0x7d, 0xdf, 0xf7, 0xde, 0xf7, 0xf3, 0x3e, 0xdf, 0xf5,
-        0x01, 0xc0, 0x80, 0x28, 0x1e, 0x55, 0x08, 0x87, 0x8c, 0xa2, 0xad, 0xa0,
-        0x00, 0xf0, 0x21, 0xf0, 0x9f, 0xe9, 0x92, 0x1d, 0x3d, 0x22, 0xf6, 0x04,
-        0x43, 0x34, 0xe1, 0xab, 0xff, 0xaf, 0xc2, 0xe9, 0x26, 0x62, 0x11, 0x4e,
-        0x1f, 0x47, 0x7c, 0x12, 0x6e, 0x37, 0x03, 0x85, 0xff, 0x26, 0x10, 0xa1,
-        0x3d, 0xdc, 0xfd, 0x24, 0xae, 0x50, 0xfc, 0x4d, 0xd9, 0xff, 0x63, 0x91,
-        0xf1, 0x54, 0x68, 0x73, 0x1c, 0x41, 0x38, 0xe9, 0x13, 0xdc, 0xed, 0xa0,
-        0x7d, 0xfe, 0x3c, 0x58, 0x18, 0xe7, 0x6d, 0xe5, 0x80, 0x76, 0xa3, 0x10,
-        0x9d, 0x94, 0xbc, 0x0c, 0xf6, 0xfb, 0xa9, 0xe3, 0xe1, 0x3a, 0xfc, 0x3c,
-        0x8b, 0xf6, 0x51, 0xe7, 0xd5, 0x0e, 0x62, 0x00, 0x97, 0x6c, 0x97, 0xeb,
-        0x19, 0xe5, 0xb0, 0x9b, 0xe3, 0xb8, 0x4f, 0xf9, 0x8e, 0x4b, 0x5c, 0x13,
-        0xe3, 0xfe, 0x99, 0x70, 0x5c, 0x8c, 0x97, 0x8e, 0xd3, 0x50, 0x71, 0x70,
-        0xdd, 0x92, 0xbc, 0xac, 0x5c, 0x5e, 0x96, 0xca, 0x43, 0xfa, 0x00, 0x3a,
-        0x0f, 0xc4, 0x23, 0xea, 0x5c, 0x8c, 0xbb, 0x25, 0x75, 0x03, 0x3c, 0xdf,
-        0x94, 0xf8, 0x31, 0xa2, 0x5b, 0xe0, 0x78, 0xea, 0x9f, 0xd4, 0xb1, 0x3b,
-        0x8e, 0xee, 0x53, 0x36, 0xff, 0x72, 0xa8, 0xbf, 0xeb, 0xfb, 0xc0, 0x73,
-        0x7e, 0x50, 0xe7, 0xa4, 0xfd, 0x61, 0x1f, 0xff, 0xef, 0x94, 0x7f, 0x36,
-        0x2e, 0xaf, 0x7f, 0xbb, 0xb3, 0xde, 0xea, 0xd7, 0x37, 0x33, 0xd7, 0xb7,
-        0x2f, 0xa5, 0x6f, 0x73, 0x70, 0xc2, 0x08, 0xc8, 0xaf, 0x04, 0x88, 0xc7,
-        0x54, 0x02, 0x88, 0x0f, 0x0b, 0x5e, 0x13, 0xbc, 0x25, 0xf8, 0xae, 0xe0,
-        0x11, 0xc1, 0x61, 0xc1, 0xc3, 0x82, 0x0f, 0x09, 0x6e, 0x09, 0xfa, 0x82,
-        0x9e, 0x60, 0x4d, 0xf0, 0x2f, 0x41, 0x57, 0xb0, 0x92, 0x8b, 0x57, 0x17,
-        0xb4, 0x05, 0x3f, 0x17, 0x7c, 0x22, 0xb7, 0xff, 0x68, 0x81, 0xf1, 0x81,
-        0xd8, 0x4f, 0x89, 0x7d, 0x41, 0x6c, 0x6c, 0xa8, 0xf0, 0x3e, 0xd3, 0xaf,
-        0x5b, 0xbd, 0xfb, 0xbd, 0xdb, 0x91, 0xef, 0x2d, 0xed, 0x67, 0x53, 0xff,
-        0x60, 0x3c, 0xed, 0xff, 0xd6, 0x1e, 0xfe, 0xec, 0x36, 0xdb, 0xea, 0xb7,
-        0xef, 0x66, 0xc2, 0x79, 0xbc, 0x29, 0xfb, 0x83, 0xee, 0x67, 0x03, 0xe6,
-        0x68, 0x26, 0xcc, 0xf3, 0xab, 0xdf, 0x1c, 0x3d, 0x2e, 0x73, 0x34, 0xbd,
-        0x8b, 0xbf, 0xcc, 0xd3, 0x33, 0xb2, 0x7f, 0x46, 0xf8, 0xd9, 0x18, 0xe0,
-        0x17, 0xa5, 0xe6, 0x95, 0xce, 0x1b, 0x30, 0x0f, 0x1f, 0x15, 0xda, 0x61,
-        0xc0, 0xfc, 0x89, 0xf6, 0xca, 0x0f, 0xf7, 0x0b, 0x7f, 0x5b, 0x9a, 0xc7,
-        0x59, 0xfe, 0x32, 0x0f, 0xad, 0x1c, 0x0f, 0x5f, 0xde, 0xe7, 0x1e, 0x2a,
-        0xb9, 0x7e, 0x5e, 0x56, 0xfe, 0x6c, 0x1a, 0x06, 0xe3, 0x1a, 0x63, 0xe8,
-        0x5a, 0x25, 0xc4, 0x69, 0xf7, 0x1b, 0x8e, 0x37, 0x4a, 0x75, 0xb8, 0xc1,
-        0x0a, 0xcd, 0x6d, 0x09, 0x56, 0xac, 0x21, 0x85, 0xff, 0x24, 0x6f, 0xb0,
-        0x5f, 0xdd, 0xfc, 0x9e, 0x30, 0x58, 0xbb, 0xc3, 0xfe, 0xf7, 0x9a, 0x9c,
-        0xf7, 0x33, 0x13, 0x90, 0xfb, 0xd3, 0xdf, 0x65, 0xde, 0x3d, 0xb4, 0xff,
-        0x2e, 0x44, 0xb1, 0x3e, 0x47, 0xf6, 0x5d, 0xd6, 0x73, 0xc4, 0x7f, 0x8b,
-        0x96, 0x4f, 0xf5, 0xde, 0x88, 0xc9, 0x1c, 0x76, 0x97, 0x7d, 0xfa, 0xfa,
-        0x7a, 0xac, 0xeb, 0x11, 0x5d, 0x19, 0xd7, 0xf5, 0xf3, 0xfe, 0x2a, 0x9d,
-        0x77, 0xb8, 0xbb, 0x9e, 0xe3, 0x49, 0xf3, 0x40, 0x3a, 0xbb, 0x95, 0xec,
-        0xe8, 0x6c, 0xba, 0x0f, 0x5a, 0x67, 0x6d, 0x58, 0x98, 0xf3, 0xe8, 0xdc,
-        0x9a, 0xc5, 0x61, 0x2e, 0x78, 0x8c, 0x17, 0x1d, 0xc6, 0xdf, 0x1c, 0xec,
-        0x53, 0x92, 0x5c, 0xaa, 0xb0, 0xfd, 0x42, 0x55, 0xcf, 0xb7, 0xde, 0xaf,
-        0xf3, 0xda, 0x2b, 0x1f, 0x3c, 0x5f, 0x9f, 0xa3, 0xf3, 0xd0, 0xe7, 0x65,
-        0x79, 0x31, 0xf8, 0x5c, 0xc6, 0xb6, 0x91, 0xed, 0xc3, 0xda, 0x24, 0x63,
-        0x69, 0x0a, 0xf3, 0xba, 0x9d, 0xf4, 0xe6, 0xbb, 0xe5, 0x93, 0xdf, 0x18,
-        0xb0, 0x3d, 0x2f, 0x3c, 0x9c, 0xa7, 0xb9, 0x54, 0xba, 0x63, 0x20, 0xd6,
-        0x21, 0xa2, 0x77, 0xc7, 0x70, 0xbe, 0x26, 0x5e, 0x14, 0x65, 0x5d, 0xdd,
-        0xc3, 0x58, 0x76, 0x9e, 0x37, 0x99, 0x77, 0x76, 0x96, 0xaf, 0xc7, 0x84,
-        0xaf, 0x4e, 0x77, 0xbd, 0xb3, 0xdf, 0x3c, 0x48, 0xc1, 0xbd, 0xfe, 0x6b,
-        0x3d, 0xd4, 0xef, 0xb2, 0xd6, 0x3d, 0xfa, 0xdc, 0x8d, 0x8a, 0x99, 0x3a,
-        0xcf, 0x40, 0xd8, 0xef, 0x7e, 0x3f, 0x16, 0x3d, 0x99, 0x16, 0x7d, 0x53,
-        0x97, 0x18, 0x65, 0xf6, 0xd5, 0x80, 0xf2, 0x29, 0xe7, 0xe6, 0xac, 0xd4,
-        0x9b, 0x9b, 0x45, 0x6b, 0x80, 0xde, 0x99, 0xfc, 0x7e, 0x2e, 0xcc, 0xe1,
-        0xb9, 0x76, 0xe3, 0x06, 0xcd, 0x7f, 0x19, 0xfe, 0x70, 0xf9, 0x5e, 0xda,
-        0x26, 0xda, 0xe6, 0xf0, 0x95, 0x4f, 0x33, 0xfd, 0x01, 0x38, 0xae, 0xdf,
-        0x97, 0xf4, 0x1c, 0x07, 0xd0, 0x9e, 0x3a, 0xe8, 0x7b, 0x99, 0xe6, 0x7d,
-        0x6d, 0x17, 0xef, 0xb5, 0x3e, 0x36, 0xc3, 0xf4, 0x9c, 0xe0, 0x3b, 0xc1,
-        0xf7, 0xcd, 0xfa, 0x54, 0xc9, 0xf7, 0x41, 0xbd, 0x9f, 0xba, 0xbe, 0x7e,
-        0xef, 0xe8, 0xaf, 0xdb, 0x07, 0xd3, 0xb3, 0x74, 0x9f, 0xfa, 0xe9, 0x99,
-        0x93, 0xd3, 0xa7, 0x7b, 0xdb, 0x3d, 0x7d, 0x32, 0xfb, 0xd5, 0xff, 0x7f,
-        0xe8, 0x36, 0xf7, 0xd3, 0x81, 0x74, 0x3d, 0x1b, 0x1b, 0xcc, 0x9f, 0xab,
-        0xa9, 0x79, 0x49, 0xdf, 0xff, 0x90, 0xf0, 0x45, 0xf9, 0x51, 0x1d, 0x5f,
-        0x6c, 0xef, 0xe8, 0x72, 0x9a, 0x7f, 0x2f, 0x0a, 0xff, 0x8d, 0x99, 0x75,
-        0xe6, 0x47, 0xfb, 0xf7, 0xdc, 0x7d, 0x4d, 0x85, 0xc8, 0x97, 0x57, 0x20,
-        0x96, 0x3c, 0xef, 0x67, 0xf2, 0xad, 0x8a, 0x2e, 0x95, 0xe1, 0x83, 0x58,
-        0xd7, 0xc5, 0x9f, 0x9b, 0x21, 0xe3, 0xfb, 0xe4, 0xef, 0xef, 0xf3, 0x2e,
-        0xf9, 0xf0, 0x5e, 0x4f, 0x7f, 0x3d, 0x8a, 0x37, 0x29, 0x3a, 0xb6, 0x20,
-        0x7a, 0xf2, 0x8b, 0xc3, 0x7a, 0xd5, 0x3e, 0x4b, 0xfc, 0x85, 0x11, 0xd1,
-        0x95, 0x76, 0x95, 0xed, 0x7a, 0x95, 0x7f, 0xef, 0x4e, 0x96, 0x5d, 0xf2,
-        0xab, 0x57, 0x19, 0x47, 0x2a, 0xb8, 0x2f, 0x80, 0x07, 0xe7, 0xc8, 0x3d,
-        0x5c, 0x75, 0xf9, 0x5d, 0x59, 0xbd, 0x23, 0x7a, 0xe7, 0xe9, 0xfe, 0x49,
-        0xbd, 0x8f, 0xe1, 0xfa, 0x88, 0xd2, 0x0f, 0xb6, 0x99, 0x17, 0x6e, 0x6f,
-        0x1e, 0xde, 0x91, 0xec, 0x9b, 0x5e, 0xba, 0xdf, 0x7a, 0x2e, 0x3b, 0xb9,
-        0x3e, 0xeb, 0x7b, 0x3a, 0x95, 0x68, 0xbd, 0x1d, 0x9b, 0xc3, 0x7c, 0x3d,
-        0xa8, 0x95, 0x99, 0x47, 0x8c, 0x2a, 0x8e, 0x51, 0xc6, 0x6d, 0x8d, 0x25,
-        0xd1, 0xaf, 0xa5, 0x45, 0x0a, 0x73, 0x6e, 0x49, 0xaf, 0xcf, 0xd2, 0xe0,
-        0xcc, 0x6f, 0x7c, 0x45, 0xeb, 0xb5, 0xb8, 0xc8, 0xeb, 0xe5, 0xb3, 0xba,
-        0x5f, 0x1e, 0xd5, 0xbf, 0xc2, 0xfd, 0x7a, 0xee, 0x26, 0xe3, 0xb3, 0xf0,
-        0x34, 0xa1, 0xb3, 0x22, 0x73, 0xbf, 0xea, 0xda, 0x84, 0x40, 0xfd, 0x32,
-        0x1e, 0xe5, 0xf7, 0xd4, 0x94, 0x77, 0x70, 0x28, 0x75, 0x8f, 0xf9, 0xf7,
-        0xea, 0xa0, 0xf7, 0x99, 0xd6, 0x6f, 0xfd, 0x9e, 0x16, 0x72, 0xbf, 0x5f,
-        0xab, 0x39, 0x7e, 0xbe, 0x34, 0x80, 0x9f, 0x87, 0x06, 0xf0, 0x3b, 0xaf,
-        0x87, 0x6d, 0x99, 0xff, 0x12, 0x98, 0x45, 0x7a, 0x08, 0xdd, 0xd2, 0x75,
-        0xba, 0x5f, 0x63, 0x89, 0x7f, 0x4f, 0xb8, 0xe6, 0x72, 0x81, 0xfa, 0xe6,
-        0x2e, 0xb3, 0x5f, 0x89, 0xd7, 0x03, 0x8d, 0xaf, 0x5d, 0xe7, 0x39, 0x33,
-        0xe0, 0x3f, 0xdd, 0xd1, 0x99, 0x07, 0x78, 0x0d, 0x00, 0x00, 0x00 };
+        /* Date:        01/27/2009 19:01 */
+#define XI_RV2P_PROC1_POST_WAIT_TIMEOUT_MSK     0xffff
+        0xa5, 0x56, 0xdd, 0x6b, 0x1c, 0x55, 0x14, 0x3f, 0x33, 0xbb, 0x33, 0xb3,
+        0xd9, 0x9d, 0xd9, 0x5d, 0x9a, 0x34, 0x8e, 0xb1, 0x34, 0xdb, 0x20, 0xca,
+        0xa6, 0x13, 0xdd, 0x68, 0x1f, 0x04, 0x03, 0x2d, 0x01, 0x29, 0x98, 0xe2,
+        0x43, 0xa0, 0x52, 0x8a, 0x60, 0x5c, 0xb4, 0x08, 0xf6, 0x2f, 0x10, 0xc1,
+        0x21, 0x31, 0x11, 0xc4, 0xaf, 0x7d, 0xe8, 0x42, 0x02, 0x6a, 0x40, 0x50,
+        0x09, 0x11, 0x77, 0xdf, 0x24, 0x16, 0x7c, 0x68, 0xf1, 0x41, 0xda, 0xa7,
+        0x16, 0xd4, 0x97, 0x46, 0x11, 0xbf, 0x5e, 0x04, 0xd1, 0xc7, 0x9a, 0xf1,
+        0x9e, 0x8f, 0xbb, 0x3b, 0x73, 0xb3, 0x9b, 0x14, 0x5c, 0x48, 0x7e, 0x9c,
+        0x7b, 0xcf, 0x39, 0xf7, 0x7c, 0x9f, 0xa9, 0x02, 0x80, 0x0d, 0x71, 0x77,
+        0x52, 0x21, 0x58, 0xb9, 0x5c, 0x01, 0x01, 0x60, 0x1b, 0xf8, 0xe7, 0xf8,
+        0x44, 0xc7, 0x8f, 0x0a, 0x7d, 0x92, 0x21, 0x3e, 0x59, 0x55, 0xff, 0x2f,
+        0xc3, 0xe9, 0x1a, 0x62, 0x0e, 0x4e, 0x9f, 0x40, 0x7c, 0x12, 0xbe, 0xae,
+        0x85, 0x0a, 0xff, 0x4d, 0x20, 0x46, 0xfa, 0x68, 0xe7, 0xcb, 0x6e, 0x89,
+        0xf4, 0xef, 0x8a, 0xfc, 0xf7, 0x39, 0xc6, 0x27, 0xa2, 0x02, 0xeb, 0x11,
+        0x84, 0x99, 0x2a, 0xc1, 0xed, 0x16, 0xd2, 0xe7, 0xcf, 0x83, 0x8b, 0x7a,
+        0xde, 0x53, 0x0c, 0x48, 0x1f, 0xb3, 0xe2, 0x19, 0xb1, 0xcb, 0x66, 0xbe,
+        0x3b, 0xad, 0x0a, 0x9e, 0xc3, 0x8f, 0xf3, 0x48, 0xdf, 0x57, 0x7c, 0xa3,
+        0x85, 0x38, 0x0e, 0x97, 0x0a, 0x3e, 0xfb, 0x53, 0x17, 0x9c, 0x64, 0xf5,
+        0xbb, 0xd3, 0x28, 0xaf, 0x64, 0xa6, 0x45, 0xbf, 0x83, 0xfa, 0x7f, 0x4f,
+        0x58, 0x3f, 0xea, 0x4d, 0xeb, 0xbb, 0x5f, 0xe9, 0xc3, 0x73, 0x57, 0xec,
+        0x73, 0x0d, 0xfb, 0x5c, 0x65, 0x0f, 0xca, 0xaf, 0x00, 0xfb, 0x39, 0xaa,
+        0xde, 0x45, 0xfa, 0xaf, 0xbe, 0xbe, 0x2e, 0xa2, 0x6f, 0xb1, 0xbc, 0xfa,
+        0x13, 0xfb, 0x59, 0xee, 0x35, 0x25, 0xa7, 0xe3, 0x92, 0xb5, 0xd3, 0x8b,
+        0xb4, 0x7f, 0x3a, 0xfe, 0xc8, 0x7f, 0x2b, 0xc9, 0xf2, 0xc3, 0x21, 0xfc,
+        0x37, 0x15, 0x7f, 0x56, 0x2f, 0x9f, 0x7f, 0xdb, 0x3f, 0x1f, 0x18, 0x1f,
+        0xc7, 0x88, 0xcf, 0x75, 0xf1, 0xe7, 0x29, 0x78, 0xd0, 0x0e, 0x89, 0x2f,
+        0x0f, 0x21, 0xc5, 0x09, 0x62, 0xc4, 0xe3, 0x82, 0x2f, 0x09, 0x7e, 0x2e,
+        0xb8, 0x2d, 0x08, 0xff, 0x13, 0xff, 0x1e, 0x72, 0x7e, 0x54, 0xf0, 0x01,
+        0xe3, 0xfc, 0x9a, 0xe0, 0x23, 0x86, 0xfc, 0x71, 0x8b, 0xf1, 0x0f, 0xa1,
+        0xe7, 0x85, 0x7e, 0xc6, 0x90, 0x8f, 0x81, 0xe3, 0x63, 0x19, 0x71, 0xfb,
+        0x58, 0xea, 0x19, 0xf3, 0x2f, 0xf7, 0x75, 0xcd, 0x57, 0xa0, 0x38, 0xc2,
+        0x74, 0x9a, 0xff, 0x83, 0x03, 0xf8, 0x99, 0x6d, 0xbe, 0x3e, 0x48, 0xae,
+        0x9d, 0xb0, 0x1d, 0x57, 0x44, 0xbe, 0xd8, 0xb9, 0x3a, 0xa4, 0x7f, 0xe6,
+        0xa2, 0x41, 0xfd, 0x52, 0x17, 0x3f, 0xbe, 0x92, 0xba, 0xdc, 0xb1, 0x9a,
+        0x51, 0xc8, 0x79, 0xa5, 0x3c, 0x06, 0x52, 0x8f, 0x23, 0x46, 0x3d, 0x7b,
+        0xaa, 0x9e, 0xa5, 0xae, 0xea, 0xba, 0xbe, 0xb2, 0x75, 0xc5, 0xf5, 0xe1,
+        0x1a, 0xf5, 0x11, 0x1f, 0x12, 0x97, 0x92, 0xe1, 0xdf, 0xab, 0x09, 0x86,
+        0x18, 0x7f, 0xb6, 0xcd, 0xb8, 0xc1, 0x18, 0xf9, 0x6e, 0x1e, 0xf1, 0x94,
+        0xff, 0x0d, 0xeb, 0x9b, 0x04, 0x44, 0x3f, 0x6c, 0x53, 0x1f, 0xe5, 0xa1,
+        0xed, 0x2a, 0x9b, 0xe1, 0x6e, 0xf2, 0x0e, 0xf3, 0x4d, 0x38, 0x37, 0x09,
+        0xc3, 0x8d, 0x1b, 0xcc, 0xff, 0x5d, 0x8d, 0xed, 0x7e, 0x56, 0xe6, 0x53,
+        0xff, 0xa7, 0xef, 0xa5, 0xff, 0x2a, 0x48, 0xff, 0x63, 0xc5, 0x5d, 0xfd,
+        0x8e, 0xc8, 0xbd, 0xa2, 0xeb, 0x9b, 0x7f, 0xcb, 0x6e, 0x95, 0xfc, 0x7d,
+        0xab, 0x4b, 0xe4, 0x98, 0xbf, 0x56, 0xa5, 0xdb, 0xb7, 0xbb, 0xda, 0x1f,
+        0xe9, 0xf3, 0x69, 0xed, 0x3f, 0xcb, 0x07, 0x72, 0x6d, 0x3b, 0x3a, 0x7e,
+        0x7c, 0x5e, 0x24, 0x3b, 0x46, 0x3b, 0x9b, 0x46, 0x3e, 0x6b, 0xf7, 0x34,
+        0x07, 0xff, 0x4c, 0xfa, 0x73, 0x30, 0x1d, 0x1f, 0x3d, 0x07, 0x0b, 0xb0,
+        0x74, 0xb6, 0x42, 0xf6, 0x94, 0x5d, 0x56, 0x73, 0xa1, 0xc2, 0xf8, 0x62,
+        0x91, 0xf1, 0x97, 0x22, 0xc6, 0x2f, 0x49, 0x2e, 0x95, 0x98, 0x7e, 0x21,
+        0x40, 0xbd, 0xa3, 0xea, 0x61, 0x2d, 0xaf, 0xed, 0x3a, 0xc8, 0x1e, 0x7c,
+        0x5f, 0xbf, 0xa3, 0xed, 0xd0, 0xef, 0x65, 0xeb, 0x65, 0xf8, 0xbb, 0x8c,
+        0x4d, 0x3b, 0x1b, 0x87, 0xfc, 0x2c, 0xe3, 0x46, 0x03, 0xed, 0xba, 0x9a,
+        0xf4, 0xfa, 0xb0, 0x5e, 0x25, 0xbe, 0x29, 0x60, 0x7a, 0x51, 0xea, 0x73,
+        0x91, 0xfa, 0xa7, 0xac, 0xae, 0x10, 0x27, 0x20, 0xa6, 0xbd, 0x60, 0x17,
+        0xaf, 0x53, 0xbd, 0xe4, 0xe4, 0x5c, 0xe5, 0x67, 0x2a, 0xdb, 0x77, 0xbb,
+        0x5c, 0x8f, 0x85, 0x6c, 0x1d, 0x3f, 0x9c, 0x9a, 0xaf, 0x69, 0x7f, 0xad,
+        0x5e, 0xfd, 0xee, 0xcf, 0x53, 0x36, 0x1f, 0xb7, 0x5b, 0xda, 0x7f, 0x73,
+        0x6f, 0x30, 0x7b, 0xdc, 0x90, 0x40, 0xcd, 0xca, 0xfd, 0x8c, 0xd9, 0x2f,
+        0x83, 0xfa, 0xad, 0x6a, 0xf4, 0xcf, 0x11, 0xe9, 0xb7, 0x91, 0xce, 0x66,
+        0xeb, 0xb0, 0x7e, 0x46, 0xfe, 0x2f, 0x64, 0x9e, 0x54, 0xa1, 0xb7, 0x97,
+        0xb6, 0x91, 0x2e, 0x81, 0xf4, 0x61, 0x27, 0xce, 0x65, 0xf2, 0x70, 0x06,
+        0x06, 0xce, 0x95, 0x0f, 0x45, 0x4f, 0x43, 0xe6, 0x8b, 0x9b, 0xda, 0x5f,
+        0xc4, 0x5e, 0x06, 0xb2, 0xc3, 0x33, 0xe6, 0xc3, 0xdd, 0x3d, 0xdd, 0xef,
+        0xcb, 0xee, 0x20, 0x7f, 0x3d, 0xf8, 0xcd, 0xe7, 0xfa, 0x68, 0x52, 0xbf,
+        0x38, 0x63, 0x97, 0x77, 0x32, 0x79, 0x02, 0x38, 0xa1, 0xf7, 0x52, 0xda,
+        0xae, 0xf4, 0x5e, 0x45, 0x7d, 0x21, 0x34, 0x67, 0xd3, 0xfb, 0xf5, 0xfd,
+        0x44, 0xcf, 0xf5, 0x80, 0xfa, 0xa4, 0xbc, 0xaf, 0xef, 0xf4, 0x1c, 0xad,
+        0x45, 0xe9, 0xfe, 0x1d, 0x93, 0xb9, 0x69, 0x03, 0xcf, 0xcd, 0x92, 0xe9,
+        0xa7, 0xda, 0xb7, 0x83, 0xf3, 0xc5, 0xfe, 0xde, 0xd9, 0xbb, 0xb7, 0x39,
+        0x7b, 0x58, 0xde, 0x8b, 0x46, 0xde, 0x6f, 0xf5, 0xe2, 0x68, 0x3b, 0x83,
+        0xbe, 0x2b, 0x4e, 0x29, 0xbd, 0xc2, 0x2f, 0x73, 0xe1, 0x79, 0x9a, 0x77,
+        0x67, 0x84, 0x6f, 0x2e, 0x55, 0xaf, 0x83, 0xf8, 0x62, 0xa3, 0xae, 0x0b,
+        0xfb, 0xf8, 0xb2, 0x73, 0x4c, 0xfb, 0xb3, 0xb5, 0xc5, 0xf5, 0x71, 0x31,
+        0xd5, 0xaf, 0xe9, 0xf9, 0x3f, 0x22, 0xf5, 0xa0, 0xf8, 0xc8, 0x8f, 0x9d,
+        0xbd, 0xfe, 0xbe, 0x48, 0xd7, 0xd7, 0xa2, 0xd4, 0xb5, 0x3d, 0xb7, 0x49,
+        0x7d, 0xe4, 0x35, 0x7f, 0x35, 0xf2, 0x35, 0x1b, 0x61, 0x9d, 0xbc, 0x0e,
+        0x5d, 0xb1, 0xf3, 0x87, 0x8c, 0xbd, 0x81, 0xf4, 0xa1, 0x0b, 0x9f, 0x75,
+        0xb5, 0x5f, 0x7c, 0x5d, 0x8b, 0x18, 0x3f, 0x8d, 0xa4, 0x9f, 0x7a, 0xfe,
+        0xe1, 0xbb, 0x0b, 0xf2, 0x6e, 0x15, 0x3e, 0xe9, 0xed, 0x03, 0x9c, 0x6f,
+        0x1e, 0x34, 0x64, 0x7e, 0x2e, 0xc9, 0x1c, 0xfb, 0xa9, 0xc8, 0x73, 0xb2,
+        0xb9, 0x40, 0xf5, 0x0a, 0xe3, 0x32, 0xcf, 0x9a, 0x01, 0xd3, 0x13, 0x01,
+        0x7f, 0x07, 0x37, 0x3c, 0x9f, 0xf8, 0x26, 0x02, 0xc6, 0xf1, 0x12, 0xca,
+        0x85, 0xf0, 0xf3, 0x39, 0x62, 0x8f, 0xd6, 0x7d, 0xde, 0x73, 0xeb, 0x37,
+        0x64, 0x9e, 0x54, 0x74, 0xdc, 0xc4, 0xcf, 0xc7, 0xf1, 0x7c, 0x5c, 0xcd,
+        0x2d, 0xa6, 0xb9, 0x1e, 0xfc, 0x5e, 0xfd, 0x7f, 0x24, 0x59, 0xa9, 0x55,
+        0xd2, 0x71, 0xd6, 0xfd, 0xf6, 0xae, 0x11, 0x5f, 0x9d, 0x9f, 0x87, 0x12,
+        0x3d, 0xe7, 0xa7, 0xce, 0xa2, 0xbd, 0x15, 0x28, 0x7b, 0x5c, 0x3f, 0x8c,
+        0x4a, 0x8f, 0xed, 0xa1, 0xd8, 0xb1, 0x55, 0x99, 0x9b, 0xab, 0xcb, 0xa4,
+        0xe6, 0xdc, 0xaa, 0x3e, 0x9f, 0xa7, 0x86, 0x59, 0xdc, 0xba, 0x46, 0xe7,
+        0xe5, 0x6e, 0x8e, 0xcf, 0xbd, 0x05, 0x1d, 0xaf, 0x0a, 0xf9, 0xdf, 0xe6,
+        0x78, 0x3d, 0x77, 0x85, 0xf1, 0x22, 0x3c, 0x4d, 0x58, 0x6c, 0x4b, 0x9f,
+        0xaf, 0xfb, 0x05, 0x42, 0xa0, 0x78, 0xd9, 0x8f, 0xf1, 0x7e, 0x77, 0x64,
+        0x2f, 0x17, 0x52, 0xf9, 0x33, 0xf7, 0xe4, 0x41, 0x79, 0x3c, 0x62, 0xec,
+        0x0b, 0xbd, 0xd7, 0x2d, 0xe3, 0xfb, 0x36, 0x30, 0xea, 0xf1, 0xe5, 0x21,
+        0xf5, 0x08, 0x43, 0xea, 0xd9, 0x9c, 0x6f, 0x4b, 0xd2, 0xef, 0x79, 0x70,
+        0x72, 0xb4, 0x78, 0xfd, 0xfc, 0x0a, 0xe5, 0xd5, 0x5e, 0xe5, 0xef, 0x1a,
+        0xdf, 0x59, 0xb3, 0x28, 0x5e, 0xfe, 0x1a, 0xf3, 0xe5, 0xf9, 0x3c, 0xd4,
+        0xf8, 0xe6, 0x0a, 0xf7, 0x95, 0x0d, 0xff, 0x01, 0xd7, 0x0e, 0x41, 0x60,
+        0x88, 0x0d, 0x00, 0x00, 0x00 };
 
 static u8 bnx2_xi_rv2p_proc2[] = {
-        /* Date:        06/17/2008 16:52 */
+        /* Date:        01/27/2009 19:01 */
 #define XI_RV2P_PROC2_MAX_BD_PAGE_LOC   5
 #define XI_RV2P_PROC2_BD_PAGE_SIZE_MSK  0xffff
 #define XI_RV2P_PROC2_BD_PAGE_SIZE      ((BCM_PAGE_SIZE / 16) - 1)
-        0xad, 0x58, 0x4d, 0x4c, 0x54, 0x57, 0x14, 0xbe, 0xf3, 0xc3, 0xcc, 0x30,
-        0xbc, 0x99, 0x41, 0x98, 0x0e, 0x7f, 0xa6, 0x22, 0x28, 0x82, 0x1d, 0x14,
-        0x06, 0xd4, 0xb6, 0x36, 0xa9, 0xc1, 0x06, 0xb5, 0xb5, 0x11, 0x69, 0x63,
-        0xba, 0x68, 0x8a, 0x60, 0x45, 0x06, 0xc1, 0x10, 0x31, 0x2e, 0xdc, 0x74,
-        0x02, 0x16, 0xbb, 0x98, 0x85, 0x98, 0xe2, 0x60, 0xd3, 0x18, 0x52, 0x37,
-        0xa6, 0x3b, 0x92, 0xb6, 0x62, 0xbb, 0x30, 0x31, 0x2d, 0xb1, 0xb6, 0x89,
-        0x36, 0xb1, 0x7f, 0x9b, 0xa6, 0xa6, 0x5a, 0x8a, 0x4a, 0x2d, 0xda, 0xb2,
-        0xaa, 0xd0, 0x77, 0xcf, 0x77, 0xee, 0x9b, 0x37, 0x33, 0x6f, 0x44, 0x53,
-        0xd9, 0x1c, 0xee, 0x7d, 0xe7, 0x9e, 0x7b, 0xce, 0x77, 0x7e, 0xef, 0xe4,
-        0x0b, 0x21, 0x9c, 0x22, 0x36, 0xbe, 0x4c, 0xa7, 0x62, 0x89, 0xdd, 0xe1,
-        0xd1, 0xc9, 0x82, 0x10, 0x39, 0xc5, 0x72, 0x2d, 0xec, 0x82, 0xff, 0x56,
-        0xe7, 0x13, 0xb9, 0x36, 0x2e, 0xbf, 0xbb, 0xc5, 0xeb, 0x76, 0x7c, 0x77,
-        0x0a, 0x49, 0x03, 0x42, 0xc4, 0x24, 0xcd, 0x67, 0xba, 0x9d, 0xe9, 0x4a,
-        0x1b, 0xe8, 0x46, 0xa6, 0x51, 0xa6, 0x2b, 0x98, 0xd6, 0xdb, 0x41, 0x57,
-        0x31, 0xad, 0xe6, 0x7d, 0x8d, 0xcf, 0xd7, 0xf2, 0xfe, 0x7b, 0x4c, 0x8f,
-        0xf2, 0xbe, 0xa6, 0xf3, 0x29, 0xbd, 0xe4, 0x7a, 0x66, 0x41, 0xc4, 0xf4,
-        0x33, 0x42, 0xdf, 0xae, 0x51, 0xfb, 0x1a, 0x91, 0x58, 0x0d, 0xf4, 0x7e,
-        0xad, 0x5c, 0xf2, 0xfd, 0x61, 0xc1, 0x27, 0xf7, 0x6f, 0x2e, 0x28, 0x79,
-        0x03, 0x0e, 0xb9, 0xfe, 0x55, 0x5f, 0xdb, 0xe4, 0x32, 0x18, 0x82, 0x98,
-        0x60, 0x71, 0x5c, 0xca, 0x71, 0x88, 0xd1, 0x61, 0x0f, 0xa1, 0x72, 0x52,
-        0xc3, 0x3a, 0x46, 0x78, 0xd8, 0xf4, 0x35, 0xcb, 0x63, 0x5a, 0xe2, 0xc3,
-        0xbd, 0xbb, 0xca, 0x71, 0xdf, 0x8f, 0xcf, 0x80, 0x2f, 0x16, 0x50, 0x80,
-        0xe2, 0xfb, 0x32, 0xc1, 0xdf, 0xf7, 0xcb, 0xf5, 0xac, 0xad, 0xd0, 0x06,
-        0x5c, 0xdd, 0xcc, 0x65, 0xcf, 0x91, 0xfb, 0xcb, 0x1b, 0x4f, 0x0e, 0x83,
-        0xbf, 0xad, 0x1c, 0xfb, 0x4f, 0x87, 0xa5, 0x3c, 0x97, 0x88, 0x31, 0x15,
-        0xb5, 0xa4, 0x97, 0x2d, 0x56, 0x9b, 0x2a, 0xff, 0x97, 0x61, 0xac, 0xda,
-        0x7d, 0x90, 0xeb, 0x4d, 0x91, 0x1b, 0xca, 0x90, 0xfb, 0x53, 0xae, 0x59,
-        0xbe, 0xdf, 0x06, 0xf9, 0xde, 0x45, 0xe5, 0x77, 0xf8, 0x40, 0x0b, 0xc3,
-        0x56, 0xf7, 0xe4, 0x2e, 0xa2, 0x7f, 0xf7, 0xa2, 0xf2, 0x8f, 0x18, 0xfa,
-        0x2b, 0xff, 0xa9, 0xef, 0xe9, 0x38, 0xd2, 0xf2, 0xe3, 0xd8, 0x5a, 0x16,
-        0xb3, 0x5a, 0xd9, 0xcf, 0x7a, 0x3a, 0x40, 0x37, 0x85, 0x89, 0xc4, 0xf7,
-        0x70, 0x80, 0x37, 0x57, 0xc9, 0xfb, 0x0b, 0x84, 0xd3, 0x2e, 0xe5, 0xd5,
-        0x79, 0x5c, 0xe7, 0xb1, 0xff, 0x06, 0xfb, 0xeb, 0x6d, 0x36, 0xe8, 0xa6,
-        0x57, 0x02, 0xb4, 0xb0, 0xd0, 0x99, 0xc7, 0xf2, 0xd9, 0xdf, 0xb1, 0x3c,
-        0x9c, 0x9f, 0xd4, 0xa4, 0x9e, 0x5f, 0xeb, 0xf1, 0x63, 0xe5, 0x7f, 0xc7,
-        0x43, 0xfc, 0x8f, 0xf3, 0x4b, 0x56, 0xe1, 0xeb, 0xf1, 0x4e, 0xac, 0xcb,
-        0xce, 0xe4, 0x13, 0x4e, 0xa3, 0xe3, 0x56, 0xf1, 0x92, 0x2e, 0x5f, 0xcf,
-        0xe3, 0x00, 0xee, 0x11, 0x15, 0x1e, 0x52, 0x0e, 0xf8, 0xea, 0x3c, 0xb5,
-        0x96, 0x38, 0x89, 0x93, 0x2b, 0xe5, 0xbe, 0x5d, 0xb4, 0x3a, 0x34, 0xba,
-        0xa7, 0x35, 0xaa, 0xf2, 0x06, 0xdf, 0x3b, 0x5d, 0x44, 0x8a, 0xdb, 0x87,
-        0xa4, 0xdd, 0x01, 0xb1, 0xdb, 0x1e, 0x20, 0x7e, 0xe0, 0xe4, 0xf0, 0x68,
-        0x9f, 0x81, 0xff, 0xc2, 0x32, 0x8d, 0x6c, 0xea, 0x6c, 0xc0, 0xb9, 0x60,
-        0x04, 0x74, 0x24, 0x92, 0x23, 0x49, 0xb8, 0xb3, 0x9f, 0x96, 0x6b, 0x7e,
-        0xab, 0xf7, 0x10, 0x5f, 0xac, 0x56, 0xe5, 0xa5, 0xf2, 0xa3, 0xc4, 0xed,
-        0x90, 0x91, 0x87, 0xa2, 0x12, 0x38, 0xff, 0xbe, 0x52, 0xf2, 0xeb, 0x60,
-        0x57, 0xe0, 0x9e, 0xa4, 0x7e, 0xe6, 0xbc, 0xee, 0x35, 0xe5, 0xf5, 0xe3,
-        0xc5, 0xc5, 0x26, 0xc2, 0x67, 0x13, 0xe3, 0x54, 0xce, 0x71, 0xb8, 0xd4,
-        0x22, 0x0e, 0x03, 0xf4, 0xff, 0xad, 0xa6, 0x7c, 0xc2, 0x79, 0x07, 0xf6,
-        0x4f, 0x34, 0x9f, 0x83, 0x9f, 0xb6, 0x11, 0x1e, 0xc2, 0x7b, 0xf4, 0x53,
-        0x9c, 0x6a, 0xa7, 0xfc, 0xef, 0x6d, 0xec, 0xfc, 0x1c, 0xeb, 0x0e, 0x87,
-        0x5c, 0xef, 0xd7, 0xf6, 0x4c, 0x80, 0x3f, 0x67, 0x10, 0xb8, 0xef, 0xe0,
-        0x5b, 0xb6, 0x39, 0xa8, 0xde, 0xc4, 0x5d, 0x83, 0xb4, 0xd4, 0x26, 0xe9,
-        0x7b, 0xbe, 0x38, 0x36, 0x8e, 0xef, 0x07, 0xf2, 0xa4, 0x9d, 0xaf, 0x1a,
-        0x75, 0x29, 0xea, 0xc2, 0xf9, 0xf8, 0x30, 0xea, 0xca, 0xf4, 0x27, 0x72,
-        0xdd, 0x16, 0x9e, 0x06, 0x7f, 0x38, 0x3a, 0xc4, 0x82, 0xed, 0xc0, 0xf1,
-        0x96, 0x1d, 0xfc, 0x1c, 0xae, 0x5e, 0x27, 0xf9, 0xd1, 0x26, 0xb4, 0x66,
-        0xd0, 0x77, 0xe9, 0xfb, 0xbf, 0xb6, 0x38, 0xe1, 0xb6, 0xcb, 0xef, 0x3c,
-        0xa7, 0xf0, 0x61, 0x1a, 0x50, 0x76, 0x81, 0x3e, 0x6a, 0x3e, 0x0c, 0x69,
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-        0xba, 0x2a, 0xa9, 0x9e, 0x3c, 0x46, 0x3e, 0xb0, 0x5e, 0x19, 0xf9, 0x86,
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+        0x2c, 0x97, 0xbd, 0x70, 0x52, 0xef, 0x5f, 0xce, 0x71, 0x02, 0x71, 0x44,
+        0xa7, 0x49, 0xc9, 0xa1, 0xae, 0xd2, 0x26, 0xe7, 0x59, 0x27, 0xb1, 0xb8,
+        0x4f, 0xcf, 0x05, 0xf4, 0x62, 0x88, 0x44, 0x7a, 0x62, 0x4e, 0x9d, 0x33,
+        0x21, 0xc6, 0xfd, 0x2a, 0x61, 0x3f, 0xd7, 0xc5, 0x30, 0xad, 0x4f, 0x60,
+        0xff, 0x45, 0xbb, 0x45, 0x67, 0x28, 0xf6, 0x61, 0x5f, 0x73, 0x2f, 0xe4,
+        0x42, 0x6f, 0x50, 0x89, 0x6c, 0x71, 0x86, 0xd4, 0x03, 0x3f, 0xf7, 0x98,
+        0x64, 0x67, 0xe7, 0xf4, 0xdc, 0xe9, 0xbe, 0xa9, 0x3a, 0xbd, 0x52, 0x9d,
+        0xbf, 0x2e, 0xd4, 0xf5, 0xee, 0x3e, 0x65, 0x2f, 0x8b, 0xdb, 0x89, 0x38,
+        0xa3, 0x93, 0x5e, 0x73, 0xfb, 0x92, 0x53, 0xdf, 0x9d, 0xf6, 0x7f, 0x90,
+        0xea, 0x30, 0xc8, 0xf5, 0xe8, 0x60, 0x9c, 0xed, 0xf1, 0xc0, 0x59, 0x82,
+        0xfe, 0x5f, 0x1b, 0x4a, 0x52, 0x3d, 0x4f, 0x60, 0xfd, 0xd2, 0xf0, 0x15,
+        0xf4, 0xe3, 0x18, 0xd5, 0x41, 0x44, 0x2f, 0x7c, 0x8c, 0x5d, 0x13, 0x34,
+        0xdf, 0xe7, 0xfa, 0x8b, 0x9f, 0x42, 0x2f, 0x18, 0x4a, 0x9f, 0xb2, 0x4e,
+        0x5f, 0x85, 0x7d, 0xf0, 0x7c, 0x92, 0xea, 0x77, 0x82, 0xa3, 0x1c, 0x33,
+        0x88, 0x4f, 0x4a, 0xa1, 0xf3, 0xa4, 0x5a, 0x2b, 0xf4, 0x3d, 0x29, 0x2e,
+        0x96, 0xf1, 0x7d, 0x3a, 0xa6, 0xce, 0x37, 0xe2, 0xf0, 0xce, 0x64, 0x08,
+        0xfb, 0x4b, 0xf3, 0xe0, 0x8d, 0x7b, 0x1f, 0x29, 0x7d, 0x2c, 0x7b, 0x0f,
+        0xf6, 0xd9, 0xc9, 0x39, 0x76, 0xec, 0x47, 0xfd, 0xd6, 0xfc, 0xb0, 0x67,
+        0x58, 0x46, 0x03, 0xd4, 0x3f, 0x9f, 0xb0, 0x86, 0x21, 0x5f, 0xa7, 0xef,
+        0x7f, 0xf9, 0x4a, 0x54, 0xb7, 0x53, 0x0d, 0x81, 0x2b, 0xba, 0x3e, 0x2c,
+        0x13, 0xfa, 0x5c, 0x90, 0x3b, 0xc5, 0xfd, 0x9c, 0xb5, 0x15, 0xde, 0xb9,
+        0x8f, 0x99, 0xed, 0xf0, 0x0e, 0x39, 0xdc, 0x0d, 0x19, 0xea, 0x22, 0xbe,
+        0xf8, 0x17, 0xb8, 0xe7, 0xbc, 0x36, 0xcd, 0x15, 0x56, 0xab, 0xf8, 0x24,
+        0x21, 0x71, 0xe9, 0xc2, 0xa9, 0x9c, 0x03, 0xe2, 0x57, 0xd9, 0x07, 0x8d,
+        0x37, 0xe5, 0x30, 0x2c, 0xa6, 0xd8, 0xef, 0x24, 0xd7, 0xe3, 0x2c, 0xd7,
+        0xe3, 0x37, 0x96, 0xd3, 0x31, 0x5d, 0x07, 0xc8, 0x8b, 0x34, 0xff, 0x69,
+        0x8f, 0x7b, 0x43, 0xdf, 0x0f, 0xe8, 0xcf, 0x32, 0xf7, 0xf3, 0x2d, 0xe7,
+        0x9e, 0xd0, 0x75, 0xdd, 0xea, 0xbe, 0xd0, 0xf8, 0xc7, 0xfa, 0xe8, 0xa4,
+        0xe7, 0x39, 0x4b, 0x5f, 0x76, 0xc2, 0x4d, 0x63, 0x17, 0xa4, 0x53, 0xdf,
+        0x6e, 0x9a, 0xdf, 0x86, 0x96, 0xab, 0xfa, 0x7c, 0x2a, 0xcf, 0x5f, 0xf5,
+        0xfc, 0x35, 0x2c, 0xcd, 0x92, 0x8c, 0x36, 0x5e, 0x56, 0xf1, 0x5a, 0x3d,
+        0xf8, 0xc3, 0x3d, 0xc7, 0xf5, 0xf5, 0x9d, 0x8e, 0x13, 0xb1, 0xf6, 0xdf,
+        0x5c, 0x75, 0xcf, 0x2b, 0xe6, 0x33, 0xec, 0xe0, 0xbb, 0x79, 0x80, 0xfb,
+        0xc0, 0x32, 0xf5, 0xa8, 0xf2, 0x3b, 0xc2, 0x71, 0xf2, 0x1c, 0xc7, 0xaa,
+        0xe1, 0x0b, 0x95, 0xe7, 0xfa, 0x86, 0xe6, 0x09, 0x8d, 0x8f, 0x2a, 0x5f,
+        0xe8, 0x3e, 0x50, 0xfc, 0xec, 0xcd, 0x55, 0xb5, 0xbf, 0x6d, 0x1b, 0xfe,
+        0x58, 0x75, 0xfc, 0xdd, 0x72, 0x78, 0x22, 0x49, 0x71, 0x0f, 0xb3, 0xea,
+        0xe6, 0xc1, 0x3f, 0x24, 0x0f, 0xaa, 0xef, 0xa6, 0x69, 0x39, 0xf3, 0xc2,
+        0xfc, 0x37, 0xa3, 0xe2, 0xa5, 0x39, 0xff, 0xb4, 0xbe, 0xbf, 0x64, 0xfe,
+        0xcc, 0x93, 0x63, 0xb5, 0x7c, 0x77, 0xdb, 0x23, 0xee, 0x7f, 0xf5, 0xc7,
+        0xf3, 0x95, 0x65, 0xbe, 0xcf, 0x51, 0x9e, 0x95, 0xf1, 0x3c, 0xe3, 0x25,
+        0x57, 0xdf, 0x07, 0xf4, 0x15, 0xf6, 0xb2, 0xbf, 0x9a, 0xf7, 0xfa, 0xb4,
+        0x7f, 0xa8, 0x76, 0x4f, 0xad, 0x7d, 0x7d, 0xff, 0x03, 0x5b, 0xf0, 0xf8,
+        0xe7, 0x1b, 0x78, 0x7f, 0x7d, 0xb6, 0x51, 0x7d, 0x4f, 0x79, 0xe2, 0xc4,
+        0x16, 0x74, 0x3f, 0x85, 0x25, 0x9e, 0xe9, 0xbd, 0x26, 0xb4, 0xbd, 0x3f,
+        0x88, 0xf7, 0xa4, 0x60, 0xfc, 0x9e, 0x7b, 0x98, 0xfd, 0x64, 0xc0, 0xc7,
+        0x2f, 0x9c, 0xa1, 0xfe, 0xbe, 0x79, 0xf6, 0x3e, 0xf1, 0xf2, 0x7b, 0x2f,
+        0x5f, 0x53, 0x7e, 0x77, 0x8b, 0xd5, 0x19, 0x8b, 0xf2, 0x1a, 0xda, 0x0b,
+        0xf3, 0xfb, 0x87, 0xea, 0xfb, 0xad, 0xfc, 0x9a, 0x8c, 0x07, 0x69, 0x37,
+        0xe1, 0x7e, 0x97, 0x6c, 0xce, 0x13, 0x73, 0x7f, 0x24, 0x81, 0x7d, 0x9a,
+        0xbf, 0xdc, 0xf8, 0x79, 0x77, 0xa3, 0x7a, 0xff, 0xc0, 0xcd, 0xad, 0x83,
+        0xde, 0x73, 0x71, 0xb2, 0xaf, 0x36, 0x4e, 0x46, 0xac, 0x94, 0xe1, 0x7f,
+        0x84, 0x79, 0x65, 0x9c, 0x13, 0xf9, 0x29, 0x9a, 0xa0, 0x78, 0x85, 0xe3,
+        0x84, 0x6b, 0x91, 0x8a, 0xe1, 0xdc, 0x85, 0xa7, 0xf0, 0xbd, 0x10, 0xc7,
+        0x7a, 0x6b, 0x1c, 0xef, 0xcd, 0x91, 0xb0, 0x45, 0xf6, 0xad, 0x71, 0xc8,
+        0x14, 0xf3, 0xcf, 0x8a, 0xc3, 0xcb, 0x90, 0xcb, 0xa1, 0xad, 0x78, 0x19,
+        0xf7, 0xdb, 0xf5, 0x90, 0x5a, 0x97, 0x8f, 0xa0, 0x0c, 0x78, 0x69, 0xa8,
+        0xdb, 0xa2, 0xef, 0xa3, 0x19, 0xe0, 0x48, 0x74, 0x7a, 0x9f, 0xab, 0x0d,
+        0xfc, 0xd2, 0x5a, 0xe5, 0xef, 0x5a, 0x9e, 0xb7, 0x7a, 0x97, 0x1c, 0x1e,
+        0x75, 0xe7, 0x01, 0xfe, 0x52, 0xfe, 0x49, 0x95, 0x7c, 0xb5, 0x13, 0x7e,
+        0x37, 0x18, 0x2f, 0xbf, 0xf3, 0xbd, 0xdf, 0x24, 0xbe, 0x2a, 0xa3, 0x0e,
+        0x2b, 0xe5, 0xfa, 0xfe, 0xe8, 0x3c, 0x74, 0x1c, 0x9c, 0x4b, 0x9f, 0xb3,
+        0x1a, 0x17, 0x79, 0x9d, 0xe1, 0xfc, 0xef, 0xd0, 0xfb, 0x2f, 0xc5, 0xe7,
+        0x55, 0x7e, 0xb1, 0x7e, 0x94, 0xee, 0xa1, 0xa0, 0x7c, 0xdf, 0x6b, 0xdd,
+        0x7d, 0x3f, 0x8c, 0x50, 0x5e, 0x8d, 0x72, 0x41, 0xef, 0x77, 0x9f, 0xbb,
+        0x39, 0x0f, 0xb9, 0x90, 0xd7, 0x7d, 0xd3, 0xfd, 0xd5, 0xfd, 0x44, 0xdf,
+        0x53, 0x3d, 0x64, 0xd6, 0x5f, 0xe8, 0x21, 0x9c, 0xe7, 0x0b, 0xeb, 0xee,
+        0x77, 0xf2, 0xc9, 0xac, 0xb2, 0x7f, 0x4d, 0x7c, 0x43, 0xf3, 0x28, 0xc4,
+        0xf7, 0x2c, 0xab, 0x7c, 0x29, 0xf8, 0xaf, 0x96, 0x77, 0x0d, 0x71, 0x3d,
+        0xc8, 0xcb, 0x7d, 0x7a, 0xee, 0xdc, 0xf3, 0x5b, 0xad, 0xbb, 0x3a, 0xc7,
+        0x13, 0x1e, 0xfc, 0xa4, 0xcf, 0xa9, 0xec, 0xf3, 0x8c, 0x5f, 0x53, 0x0c,
+        0x1d, 0xc1, 0xfb, 0xb0, 0x21, 0x8c, 0x39, 0x69, 0x08, 0x7b, 0xdd, 0xef,
+        0x12, 0x3f, 0x11, 0xfa, 0x05, 0xb3, 0xa7, 0x31, 0x42, 0xe7, 0xba, 0x74,
+        0xe3, 0x6b, 0x32, 0x7b, 0x7f, 0x29, 0x86, 0xf5, 0x96, 0x21, 0x84, 0x09,
+        0x10, 0xde, 0x0d, 0x71, 0x01, 0xf3, 0xf0, 0xce, 0x02, 0xe4, 0xdb, 0xe2,
+        0x49, 0xf8, 0x69, 0x9c, 0xa5, 0xfb, 0xd4, 0x6c, 0x41, 0x79, 0x4b, 0x4b,
+        0x8c, 0xf3, 0xb4, 0x9f, 0x7e, 0xaf, 0x56, 0x44, 0x9c, 0x7f, 0x47, 0xf0,
+        0xbc, 0x02, 0xcf, 0x81, 0x9a, 0xbe, 0xef, 0x14, 0xdf, 0x4a, 0x8f, 0x4b,
+        0xfc, 0xc2, 0x0d, 0xe3, 0xdc, 0xac, 0xc7, 0xb9, 0xee, 0x6f, 0xda, 0xef,
+        0x89, 0xeb, 0x81, 0xcd, 0xb8, 0xd6, 0xf9, 0xa9, 0x3a, 0xff, 0xe9, 0xbc,
+        0x7b, 0x37, 0xfb, 0x57, 0xfb, 0x62, 0x12, 0xdf, 0xff, 0x17, 0xae, 0x21,
+        0x8f, 0x76, 0xa9, 0xf8, 0x2d, 0x35, 0xf8, 0xf4, 0x9e, 0x3b, 0xf0, 0x9b,
+        0x21, 0x79, 0xfc, 0x6f, 0x6a, 0x8c, 0x09, 0xd0, 0x18, 0x10, 0x00, 0x00,
+        0x00 };
 
 static u8 bnx2_TPAT_b09FwText[] = {
-        0xbd, 0x58, 0x5d, 0x6c, 0x1c, 0x57, 0x15, 0x3e, 0x73, 0xe7, 0xee, 0x7a,
-        0x6d, 0x39, 0xf1, 0xb8, 0x99, 0x96, 0x4d, 0x63, 0xd4, 0x99, 0x78, 0xfc,
-        0x43, 0x6d, 0x95, 0x69, 0x59, 0x15, 0x17, 0x56, 0x68, 0xba, 0xbb, 0x71,
-        0xad, 0xaa, 0xaa, 0x5c, 0x29, 0x88, 0x4a, 0x8d, 0x90, 0x59, 0x37, 0x6d,
-        0x79, 0x4b, 0x11, 0x0f, 0x48, 0x45, 0xca, 0xb2, 0x76, 0xd2, 0x08, 0x2d,
-        0x99, 0xd6, 0x85, 0x44, 0x42, 0x7d, 0x88, 0x9c, 0x3a, 0xee, 0xc3, 0xca,
-        0x9b, 0x8a, 0x07, 0x24, 0xa4, 0xa8, 0x55, 0x80, 0xc0, 0x1b, 0x7d, 0xa8,
-        0xf8, 0x79, 0x22, 0x12, 0x0f, 0x54, 0x08, 0x90, 0x85, 0x04, 0x2a, 0xa5,
-        0xe4, 0xf2, 0x7d, 0x77, 0x67, 0x92, 0xc5, 0x4d, 0x41, 0xe5, 0x81, 0x95,
-        0x56, 0x77, 0xe6, 0xde, 0x73, 0xce, 0x3d, 0xf7, 0xfc, 0x7c, 0xe7, 0xdc,
-        0x39, 0xec, 0xc8, 0x88, 0x64, 0xbf, 0x7d, 0xf8, 0x57, 0xbe, 0x72, 0xe2,
-        0xeb, 0x0f, 0xdc, 0x57, 0xb9, 0x0f, 0x8f, 0x0f, 0x3a, 0x77, 0x6b, 0x2d,
-        0xff, 0xc7, 0x9f, 0x2b, 0xe2, 0xe5, 0x7a, 0xf0, 0x2f, 0x25, 0x55, 0x4d,
-        0x0e, 0xd6, 0x22, 0x29, 0xb9, 0xd5, 0xea, 0xfc, 0x6a, 0x24, 0x92, 0x74,
-        0xe7, 0x82, 0xba, 0xfc, 0xd3, 0xb4, 0x7c, 0x2d, 0x9c, 0xff, 0x64, 0xf5,
-        0x83, 0x4f, 0x5f, 0xf9, 0x6c, 0xb8, 0x7b, 0xc1, 0x95, 0x92, 0x57, 0x3d,
-        0xa3, 0xbd, 0x69, 0x29, 0x4d, 0x80, 0xe7, 0xd5, 0x99, 0x6f, 0x17, 0x64,
-        0x7f, 0x2e, 0xab, 0x65, 0x54, 0x74, 0xdd, 0x5c, 0x99, 0x89, 0xbc, 0x36,
-        0x36, 0xb8, 0xdc, 0x0b, 0xa4, 0xd6, 0x2b, 0xcb, 0x9b, 0x3d, 0x5f, 0xde,
-        0xe8, 0x69, 0x39, 0xfe, 0xca, 0x49, 0x59, 0x8f, 0xc3, 0x72, 0xc3, 0x2d,
-        0x89, 0xaa, 0x86, 0xe5, 0xa6, 0x04, 0xb2, 0x15, 0x87, 0xad, 0x15, 0x77,
-        0xdc, 0x29, 0x55, 0x4b, 0xf2, 0xc2, 0x8c, 0x92, 0x0b, 0xfe, 0x31, 0x79,
-        0x26, 0x7a, 0x12, 0x7f, 0x2d, 0x6a, 0x43, 0x3b, 0xf5, 0xf3, 0x5a, 0xf4,
-        0xc6, 0x98, 0x3c, 0x12, 0x1b, 0xb3, 0x1a, 0x27, 0xe0, 0x9f, 0x9c, 0x7d,
-        0x56, 0x86, 0xa5, 0xe5, 0x85, 0x4b, 0x22, 0x05, 0xd2, 0x48, 0x2d, 0x2e,
-        0x48, 0xe2, 0xf5, 0xcf, 0x75, 0xc1, 0x8e, 0x1f, 0x98, 0x2d, 0xf0, 0x0f,
-        0x47, 0xf9, 0xfa, 0x1d, 0xd9, 0xba, 0x97, 0xad, 0x2b, 0x51, 0xe7, 0xc2,
-        0x60, 0x5b, 0xa6, 0x12, 0xed, 0xdc, 0x30, 0xb5, 0xe8, 0x2e, 0xaf, 0xb6,
-        0xad, 0xc5, 0xdd, 0xa0, 0xfe, 0x91, 0x57, 0x17, 0x03, 0x1e, 0x97, 0x3c,
-        0x5a, 0x55, 0xbf, 0x06, 0xbf, 0x4d, 0x25, 0xca, 0x11, 0xb9, 0xda, 0x29,
-        0x7b, 0xb5, 0xde, 0x37, 0x9c, 0x5a, 0x7a, 0xc3, 0x24, 0x7a, 0x44, 0x54,
-        0x94, 0x38, 0xb5, 0x6d, 0xca, 0x1a, 0x16, 0x1d, 0x0d, 0x81, 0x67, 0xd2,
-        0x53, 0xc2, 0xb1, 0x96, 0xcd, 0x53, 0x76, 0x03, 0xcf, 0x8b, 0x4e, 0xb2,
-        0xad, 0x9d, 0xda, 0xf9, 0x25, 0x3c, 0x97, 0xc0, 0x0f, 0xbb, 0xc4, 0x8e,
-        0x24, 0xcb, 0x0e, 0xf8, 0x78, 0x4e, 0x0f, 0xef, 0x4a, 0x12, 0xdf, 0x93,
-        0xb5, 0x4a, 0x58, 0x6e, 0xc9, 0xa3, 0x4e, 0x7d, 0xfb, 0x43, 0x4e, 0xf3,
-        0x96, 0x7a, 0x1f, 0x9e, 0xa3, 0x2e, 0x0f, 0x6b, 0x63, 0xd4, 0xfd, 0x43,
-        0xd9, 0x19, 0x29, 0x2f, 0xe9, 0xeb, 0xef, 0xf3, 0x1d, 0x3a, 0xa7, 0xd0,
-        0xbd, 0x5b, 0x84, 0x3e, 0xc6, 0x70, 0x9f, 0x5a, 0x54, 0x87, 0x9e, 0x09,
-        0xfe, 0xe1, 0x99, 0x26, 0x42, 0xe1, 0xf0, 0xb9, 0x7d, 0x12, 0x8c, 0x1b,
-        0xd3, 0x88, 0x43, 0x6f, 0x5b, 0x26, 0x64, 0x2d, 0x9d, 0xf0, 0x8e, 0xa4,
-        0x6d, 0xac, 0xb7, 0x48, 0x03, 0x7b, 0x88, 0x1c, 0xe9, 0x1a, 0x73, 0x29,
-        0x3e, 0x50, 0x94, 0xfd, 0x6a, 0xbe, 0x20, 0x61, 0x90, 0x60, 0xee, 0xf0,
-        0xa5, 0xbd, 0x36, 0xbb, 0x27, 0xd3, 0x81, 0x76, 0xc7, 0x3e, 0xf1, 0xa1,
-        0xec, 0x7d, 0xd4, 0xab, 0x9d, 0xcf, 0xed, 0x6c, 0xf5, 0x86, 0x5d, 0x63,
-        0xa9, 0x55, 0xa0, 0xff, 0x47, 0x9e, 0x29, 0xe7, 0xa3, 0x2e, 0xd4, 0x1b,
-        0xf4, 0xd1, 0x2d, 0x9d, 0x9e, 0xfa, 0x90, 0x4e, 0xd4, 0x47, 0x89, 0x3e,
-        0x57, 0x92, 0xf5, 0xe8, 0x71, 0x25, 0xfb, 0x8d, 0x59, 0x8f, 0xb5, 0xd3,
-        0x38, 0x7f, 0x2c, 0x7b, 0x46, 0x1c, 0xa6, 0x88, 0xc3, 0x14, 0x71, 0x99,
-        0x8a, 0xa7, 0xaa, 0x81, 0x5c, 0x99, 0x29, 0xc9, 0x75, 0x17, 0xfe, 0xec,
-        0xcd, 0x79, 0xaf, 0x21, 0xa6, 0x12, 0xcf, 0x11, 0x37, 0x4a, 0x66, 0x0b,
-        0xc2, 0x77, 0xc4, 0x92, 0x4e, 0xca, 0x2e, 0x62, 0x29, 0x39, 0xca, 0xb9,
-        0x21, 0x59, 0xb1, 0x67, 0x99, 0xf3, 0x4e, 0x09, 0x7d, 0x55, 0xc3, 0xda,
-        0x64, 0x70, 0x4a, 0x76, 0x11, 0x1f, 0x35, 0xac, 0x53, 0x56, 0xe8, 0xb5,
-        0x40, 0xd1, 0x4e, 0xdf, 0x45, 0x0e, 0xf8, 0x88, 0xfb, 0x99, 0xb2, 0x12,
-        0x47, 0x56, 0xe7, 0x61, 0x8b, 0xf9, 0x29, 0xd8, 0x88, 0x39, 0xc1, 0xb8,
-        0xfa, 0xeb, 0xb4, 0x8e, 0x4e, 0x22, 0x7e, 0x40, 0x8b, 0xf3, 0x9f, 0x4a,
-        0x67, 0xc0, 0x1f, 0x15, 0xa9, 0xe7, 0x56, 0xac, 0x65, 0x3d, 0xbd, 0xa2,
-        0x0a, 0xd1, 0xef, 0x1d, 0xd9, 0x1f, 0xb6, 0x12, 0x09, 0x5b, 0x4a, 0x29,
-        0x9f, 0x5b, 0xbf, 0x84, 0x3c, 0x7a, 0xd3, 0xea, 0xaf, 0xc1, 0x57, 0xce,
-        0xf4, 0xa7, 0xdd, 0x45, 0x36, 0x3b, 0x61, 0xbc, 0x08, 0xdd, 0xae, 0xc2,
-        0xff, 0xb4, 0xf9, 0xa5, 0x2e, 0x64, 0x77, 0x1c, 0xe6, 0xae, 0xb4, 0xbb,
-        0xa4, 0xb3, 0x69, 0xbe, 0xa2, 0xab, 0xb2, 0xdc, 0xee, 0x9c, 0x34, 0x6e,
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+        0xc5, 0xd2, 0x7f, 0x93, 0xf9, 0x43, 0x22, 0x83, 0xba, 0x56, 0xe4, 0x7d,
+        0x89, 0x2a, 0x2d, 0xf6, 0x83, 0xdf, 0x85, 0x07, 0x1f, 0x78, 0x20, 0xaa,
+        0x36, 0xc1, 0x3f, 0xc4, 0x38, 0xc6, 0x1a, 0xd6, 0x8b, 0x22, 0x72, 0xaa,
+        0xc3, 0xb8, 0x66, 0xbc, 0x9f, 0x49, 0xf0, 0x3e, 0x0b, 0xbc, 0x7b, 0xe3,
+        0x37, 0xc0, 0xa3, 0x1b, 0x0f, 0xf1, 0xe8, 0x4c, 0x82, 0xf1, 0x59, 0x60,
+        0xfc, 0x97, 0xc0, 0x96, 0x85, 0x9a, 0x0e, 0xdc, 0x36, 0xc8, 0x88, 0x50,
+        0x1b, 0x80, 0x83, 0x44, 0xcf, 0xe9, 0x44, 0xcf, 0xcc, 0x63, 0xf4, 0x9c,
+        0x4e, 0xf4, 0xcc, 0x74, 0xeb, 0x81, 0x5c, 0x25, 0x91, 0x0b, 0x1f, 0x23,
+        0x57, 0x49, 0xe4, 0xc2, 0x2e, 0x39, 0x0b, 0x67, 0xe2, 0x73, 0x71, 0x1e,
+        0xdb, 0x45, 0x2c, 0x7c, 0x8a, 0xb1, 0x62, 0x87, 0x18, 0xef, 0x61, 0x04,
+        0x66, 0x9a, 0x37, 0xb1, 0x96, 0xfd, 0x90, 0x61, 0x0e, 0x3c, 0xe2, 0xbb,
+        0x3d, 0xf8, 0x6e, 0x1f, 0xef, 0xf8, 0xfb, 0x66, 0x82, 0x15, 0xae, 0x45,
+        0x5e, 0x2d, 0x7c, 0x68, 0x6d, 0x46, 0xb0, 0x9f, 0xc5, 0xd5, 0xc3, 0x62,
+        0x60, 0x61, 0x0e, 0x35, 0xa7, 0x69, 0x52, 0x59, 0x32, 0x57, 0x5f, 0x91,
+        0x31, 0x76, 0xb7, 0xb1, 0x7e, 0xbb, 0xc3, 0xab, 0x99, 0x46, 0x8e, 0x68,
+        0xbd, 0x97, 0x16, 0x50, 0x4f, 0xce, 0x03, 0x4b, 0xd7, 0x7d, 0xb0, 0x90,
+        0x86, 0x81, 0x0b, 0x0d, 0x5c, 0x7b, 0x71, 0x6c, 0x23, 0xb5, 0x08, 0x66,
+        0xfc, 0x88, 0x76, 0x26, 0xf3, 0x94, 0xd9, 0xec, 0xd4, 0x43, 0xb9, 0xde,
+        0xbd, 0x8f, 0x8b, 0x7d, 0x02, 0xd4, 0xe0, 0x3f, 0xa2, 0x17, 0x70, 0x48,
+        0x8e, 0x22, 0x97, 0x36, 0x39, 0x27, 0x80, 0xa3, 0x9b, 0x5c, 0xeb, 0x39,
+        0xe7, 0x5a, 0xc0, 0x62, 0x9a, 0x7f, 0x72, 0xe8, 0x5b, 0x3e, 0x41, 0xed,
+        0x10, 0x34, 0x5f, 0xd4, 0x7a, 0xca, 0xff, 0x04, 0xb8, 0xc2, 0xb7, 0x75,
+        0x9e, 0xdb, 0xc5, 0x77, 0xfe, 0x66, 0x51, 0x76, 0xf5, 0x49, 0xec, 0x89,
+        0xfd, 0xce, 0xf0, 0xfa, 0x1c, 0x7a, 0x1a, 0xce, 0xf3, 0x18, 0xd7, 0xf9,
+        0xdd, 0x48, 0x7c, 0x6a, 0x62, 0xfc, 0x02, 0x46, 0x3e, 0x4f, 0x0f, 0xce,
+        0xa7, 0xf5, 0x5d, 0x9f, 0x9f, 0xb5, 0x96, 0x41, 0x2f, 0x95, 0x1b, 0x0a,
+        0xf5, 0x7d, 0xa4, 0xb0, 0x00, 0x9e, 0x95, 0x5b, 0xe9, 0x3c, 0xcf, 0xd9,
+        0x5d, 0x73, 0x78, 0x6e, 0xf1, 0x77, 0x41, 0x3b, 0x6a, 0x11, 0x75, 0x11,
+        0xfd, 0xd3, 0x3a, 0xf7, 0x61, 0xdc, 0x53, 0xc5, 0xf5, 0x72, 0x9c, 0x7b,
+        0xb0, 0x77, 0x90, 0xff, 0xd7, 0xc1, 0x29, 0xf0, 0xfb, 0x29, 0x41, 0x4f,
+        0x50, 0xd9, 0x49, 0xcf, 0xa3, 0x35, 0x38, 0x5b, 0x30, 0x0d, 0xe6, 0xe2,
+        0xb0, 0x3d, 0x4d, 0xdc, 0x6b, 0x8d, 0x84, 0x55, 0x96, 0x69, 0x21, 0x1f,
+        0xac, 0x68, 0xaa, 0x76, 0xf4, 0xd8, 0xb3, 0xc8, 0xd1, 0xd1, 0x4f, 0xb8,
+        0xb6, 0xb1, 0x6f, 0x4f, 0xc0, 0x1e, 0xf4, 0x05, 0xeb, 0x92, 0xde, 0x6e,
+        0xb0, 0x9e, 0x3c, 0x99, 0xe8, 0x11, 0x97, 0xfd, 0x54, 0xcf, 0x9f, 0xa0,
+        0x87, 0x1c, 0x41, 0xdc, 0xff, 0x4a, 0xe8, 0x62, 0x1f, 0x64, 0xd0, 0x8f,
+        0x8f, 0xd3, 0xbc, 0x5a, 0x8c, 0x6b, 0xf1, 0x79, 0xd4, 0xde, 0xa8, 0x98,
+        0x85, 0xef, 0x72, 0xb1, 0x9e, 0x7a, 0xf3, 0x5f, 0x9a, 0xf3, 0x0f, 0xea,
+        0x24, 0xf4, 0xe3, 0xbd, 0x8d, 0xb9, 0x95, 0x80, 0xde, 0x6c, 0xc6, 0xb5,
+        0xdb, 0xbe, 0x88, 0x9e, 0xbf, 0xd2, 0xf8, 0x47, 0xda, 0xcb, 0x84, 0xc0,
+        0x71, 0xe1, 0x02, 0x7c, 0x23, 0xb7, 0x7b, 0xe9, 0x35, 0xf4, 0xa8, 0x99,
+        0x15, 0xd4, 0x65, 0xf8, 0x4d, 0x5c, 0xad, 0x8d, 0x73, 0x9f, 0x79, 0x03,
+        0x5c, 0x9f, 0x2f, 0x2a, 0xdf, 0x34, 0x46, 0x69, 0xf9, 0x67, 0x5c, 0x67,
+        0xe2, 0x7a, 0x0d, 0xfc, 0xb8, 0x74, 0xa5, 0xa5, 0x68, 0xb9, 0x65, 0xc3,
+        0x2e, 0xfb, 0x41, 0x2f, 0xae, 0x38, 0x1f, 0x57, 0xf0, 0x8b, 0xf3, 0x2d,
+        0xce, 0x04, 0x3e, 0x04, 0xec, 0x0f, 0xee, 0xbd, 0x39, 0x66, 0x9c, 0xff,
+        0x4e, 0xe1, 0x99, 0xcf, 0xca, 0xbd, 0x32, 0xfb, 0x81, 0x7b, 0xe2, 0xee,
+        0xfe, 0x9d, 0x73, 0x23, 0x74, 0x6e, 0x33, 0x87, 0xb8, 0x47, 0xa9, 0xc8,
+        0xf9, 0x86, 0x1d, 0xf3, 0xaa, 0xde, 0xee, 0xf8, 0x3b, 0xf2, 0x59, 0xa7,
+        0x57, 0x0a, 0xe9, 0xce, 0x8b, 0x22, 0xee, 0x3b, 0x42, 0xe4, 0x15, 0x3e,
+        0xcb, 0x04, 0xee, 0x27, 0x1e, 0x7c, 0xe7, 0xa1, 0x2f, 0xe9, 0xf0, 0x73,
+        0x38, 0xe1, 0xe7, 0x50, 0xeb, 0x44, 0x26, 0xed, 0xc7, 0x0e, 0x72, 0xee,
+        0x17, 0xe2, 0x7f, 0xe7, 0xdc, 0x46, 0xc2, 0xb9, 0x6c, 0x8c, 0x4d, 0xb1,
+        0xd2, 0x3d, 0xf7, 0x0e, 0xe6, 0x72, 0x5d, 0xf7, 0xa2, 0xc3, 0x62, 0x12,
+        0xf3, 0x03, 0x9c, 0xe4, 0x75, 0x88, 0xff, 0x4a, 0x2f, 0x99, 0x57, 0x99,
+        0x97, 0x29, 0x46, 0x5c, 0xe0, 0x31, 0xd5, 0xd1, 0x83, 0x3d, 0x70, 0xd7,
+        0x59, 0xcd, 0xc4, 0xf8, 0x37, 0x83, 0x74, 0x4d, 0x81, 0xa6, 0x1b, 0x9e,
+        0x7f, 0x87, 0xc7, 0x16, 0xcf, 0x4b, 0xca, 0xae, 0x58, 0xf4, 0xfa, 0x98,
+        0xe7, 0xba, 0xc2, 0xf3, 0x77, 0x60, 0xf7, 0x5d, 0xe5, 0x50, 0x66, 0x94,
+        0x39, 0xc9, 0x15, 0x2a, 0x0b, 0xdc, 0xe0, 0x0e, 0xd8, 0xd4, 0x97, 0xd0,
+        0x1f, 0xb9, 0x12, 0xb1, 0xfd, 0x29, 0x6c, 0xe1, 0x7c, 0x0b, 0xbb, 0xc6,
+        0xd7, 0x81, 0x83, 0x05, 0x7e, 0xdf, 0xc7, 0x18, 0xdf, 0x2d, 0x78, 0x7f,
+        0x07, 0x67, 0xb0, 0x28, 0xb7, 0xaa, 0x71, 0xf7, 0x7b, 0x20, 0x77, 0x25,
+        0xc1, 0x6b, 0x06, 0xdf, 0xe7, 0x63, 0xbc, 0x72, 0x1c, 0xd9, 0xe7, 0x5a,
+        0x7f, 0x80, 0x38, 0x96, 0xe9, 0x2f, 0x31, 0x8f, 0xef, 0xfa, 0x31, 0x7e,
+        0x61, 0x0f, 0x64, 0x5a, 0x9f, 0xca, 0x98, 0xe7, 0xe0, 0xc3, 0x65, 0x3f,
+        0xc6, 0xd7, 0xf8, 0x4d, 0x1c, 0xbb, 0x83, 0xfd, 0x6e, 0x3d, 0xc3, 0xf6,
+        0x49, 0x8a, 0x39, 0xe5, 0x2e, 0x72, 0x8f, 0xe9, 0x8f, 0x20, 0xdf, 0x62,
+        0x5d, 0x2b, 0xe5, 0x7d, 0x16, 0x7c, 0x67, 0x5f, 0x33, 0xf7, 0x07, 0x92,
+        0xe7, 0x2f, 0x22, 0xb6, 0x36, 0xfc, 0xd8, 0xe9, 0x05, 0xcc, 0x15, 0xb6,
+        0xad, 0x97, 0xd4, 0xd5, 0xd4, 0xae, 0x4f, 0x63, 0x7b, 0x1e, 0xd6, 0x89,
+        0xf9, 0xed, 0xc3, 0xe4, 0xec, 0x2e, 0xb9, 0xbf, 0x1f, 0x22, 0x87, 0xf9,
+        0x6d, 0x96, 0xc9, 0xef, 0xf7, 0x20, 0xe5, 0x7d, 0x3c, 0x87, 0xc0, 0x3b,
+        0xcb, 0x3e, 0x7a, 0xef, 0xec, 0xc6, 0x7e, 0x5a, 0xfb, 0x19, 0xdf, 0xbc,
+        0xa7, 0xe7, 0x72, 0xef, 0xde, 0xc1, 0x76, 0x1e, 0x79, 0x2f, 0xf6, 0x03,
+        0x72, 0xa6, 0x37, 0x3e, 0x47, 0x29, 0xfe, 0x1f, 0x60, 0x7c, 0x01, 0x76,
+        0x55, 0x68, 0xa2, 0xc4, 0xe3, 0xc9, 0x03, 0x18, 0xe7, 0xfb, 0x3a, 0xd7,
+        0xa6, 0x3c, 0xee, 0x61, 0x5c, 0xe7, 0xf9, 0x2e, 0xd6, 0xc9, 0x53, 0x95,
+        0x35, 0x7e, 0xff, 0x2c, 0x79, 0xe7, 0xbc, 0xcc, 0x7d, 0xd4, 0x0d, 0x9c,
+        0x9f, 0xeb, 0xd1, 0x18, 0xd5, 0x1d, 0xf8, 0xd5, 0x67, 0x1b, 0x2e, 0xd0,
+        0x83, 0x1e, 0xec, 0xb0, 0xba, 0xb2, 0x6a, 0x76, 0x71, 0xe5, 0xb0, 0x7e,
+        0x8c, 0xef, 0x27, 0x46, 0x79, 0xcd, 0x48, 0x7a, 0x78, 0xee, 0xbf, 0xf6,
+        0xb4, 0x19, 0xf7, 0x62, 0x9c, 0x17, 0xb8, 0x07, 0x7b, 0x0d, 0xfb, 0xf6,
+        0xc5, 0xef, 0xe1, 0x16, 0x8f, 0xec, 0x17, 0x8a, 0x79, 0xd1, 0xe1, 0x79,
+        0x6a, 0x77, 0x84, 0x75, 0xf0, 0x8f, 0x88, 0x52, 0x9b, 0xa8, 0xfa, 0x16,
+        0xd7, 0x54, 0x3b, 0xc9, 0xff, 0x17, 0x31, 0x3e, 0x9f, 0x60, 0x20, 0x3d,
+        0x4b, 0xec, 0x57, 0xec, 0xaf, 0xf5, 0x2c, 0x30, 0xf5, 0xba, 0x9f, 0xda,
+        0x0a, 0x6c, 0x7f, 0x23, 0xcd, 0x31, 0x88, 0x97, 0xda, 0xd3, 0x72, 0x34,
+        0x84, 0x2d, 0xfc, 0xff, 0x82, 0x0a, 0x7a, 0x3b, 0xb6, 0x65, 0xc6, 0x78,
+        0x79, 0xff, 0x7f, 0x04, 0x8f, 0xf6, 0x71, 0x1c, 0x3f, 0x8e, 0xef, 0x7e,
+        0xfc, 0xac, 0x1c, 0x7c, 0xff, 0x51, 0xc3, 0xb3, 0x07, 0x04, 0xe7, 0x23,
+        0xb2, 0xb2, 0x88, 0xc1, 0x5d, 0xc4, 0x28, 0x24, 0xaf, 0xf4, 0x41, 0xdc,
+        0x9b, 0x13, 0x38, 0x37, 0x11, 0xe2, 0x19, 0x1c, 0xc0, 0xd9, 0x46, 0x3d,
+        0xff, 0x3d, 0xe2, 0x38, 0x58, 0xb8, 0x6b, 0x74, 0x62, 0x37, 0x96, 0xc4,
+        0x6e, 0xb4, 0xf5, 0xf0, 0x99, 0x5d, 0xf1, 0x52, 0xf2, 0xce, 0x67, 0xe2,
+        0x5e, 0xc1, 0xe5, 0x1e, 0x09, 0x3e, 0x28, 0x19, 0x9d, 0x7b, 0x7b, 0x93,
+        0xef, 0x97, 0x35, 0xce, 0xe5, 0xdc, 0xcf, 0x81, 0x6b, 0xa8, 0x96, 0x23,
+        0xb8, 0x6b, 0x68, 0x5d, 0x2f, 0x31, 0x76, 0x27, 0xc6, 0xa7, 0x62, 0x0c,
+        0x8b, 0x41, 0x41, 0x29, 0xb7, 0xba, 0x9f, 0x31, 0x96, 0xf8, 0x9e, 0xc6,
+        0xef, 0x1d, 0x1d, 0x1b, 0xc0, 0x1d, 0x6e, 0x32, 0xb8, 0x1d, 0xb2, 0x7e,
+        0xa3, 0xd3, 0x13, 0xdb, 0x11, 0xf3, 0x1e, 0xb8, 0x7b, 0x1f, 0x76, 0x85,
+        0xe0, 0x6d, 0xe7, 0x6e, 0x37, 0x87, 0x9c, 0x72, 0x1b, 0xb1, 0xbd, 0xab,
+        0x3a, 0x75, 0x71, 0x83, 0xfb, 0xae, 0x16, 0xf2, 0x4d, 0x1e, 0xbd, 0xb2,
+        0x4a, 0xef, 0xa2, 0x16, 0x5d, 0xc3, 0x9a, 0xeb, 0x98, 0xbb, 0xd2, 0x4a,
+        0x71, 0x84, 0x1e, 0x0f, 0xd8, 0x9c, 0x57, 0xff, 0xd4, 0x55, 0xa7, 0x7b,
+        0x2d, 0xff, 0xfd, 0x07, 0x5d, 0xe7, 0x92, 0xbb, 0xa8, 0x13, 0x00, 0x00,
+        0x00 };
 
 static const u32 bnx2_TPAT_b09FwData[(0x0/4) + 1] = { 0x0 };
 static const u32 bnx2_TPAT_b09FwRodata[(0x4/4) + 1] = {
         0x00000001, 0x00000000 };
 
 static struct fw_info bnx2_tpat_fw_09 = {
-        /* Firmware version: 4.4.26 */
+        /* Firmware version: 4.6.15 */
         .ver_major                      = 0x4,
-        .ver_minor                      = 0x4,
-        .ver_fix                        = 0x1a,
+        .ver_minor                      = 0x6,
+        .ver_fix                        = 0xf,
 
         .start_addr                     = 0x08000488,
 
         .text_addr                      = 0x08000400,
-        .text_len                       = 0x1514,
+        .text_len                       = 0x13a4,
         .text_index                     = 0x0,
         .gz_text                        = bnx2_TPAT_b09FwText,
         .gz_text_len                    = sizeof(bnx2_TPAT_b09FwText),
@@ -3709,871 +3643,868 @@ static struct fw_info bnx2_tpat_fw_09 = {
         .data_index                     = 0x0,
         .data                           = bnx2_TPAT_b09FwData,
 
-        .sbss_addr                      = 0x08001940,
-        .sbss_len                       = 0x48,
+        .sbss_addr                      = 0x080017c0,
+        .sbss_len                       = 0x40,
         .sbss_index                     = 0x0,
 
-        .bss_addr                       = 0x08001988,
+        .bss_addr                       = 0x08001800,
         .bss_len                        = 0x12b4,
         .bss_index                      = 0x0,
 
-        .rodata_addr                    = 0x08001914,
+        .rodata_addr                    = 0x080017a4,
         .rodata_len                     = 0x4,
         .rodata_index                   = 0x0,
         .rodata                         = bnx2_TPAT_b09FwRodata,
 };
 
 static u8 bnx2_TXP_b09FwText[] = {
-        0xc5, 0x7b, 0x7b, 0x74, 0x1c, 0x55, 0x9a, 0xdf, 0xef, 0x56, 0x3f, 0x54,
-        0xdd, 0x6a, 0xb5, 0x4a, 0x72, 0xdb, 0x6e, 0xed, 0x68, 0xc6, 0x5d, 0xee,
-        0x6a, 0xb9, 0xb1, 0x84, 0x5d, 0x2d, 0xb5, 0xec, 0x66, 0x5d, 0xb1, 0x7b,
-        0x8c, 0xb0, 0x65, 0x10, 0x3b, 0xc2, 0xeb, 0x9d, 0x88, 0x09, 0x27, 0xf4,
-        0x18, 0x19, 0x64, 0x63, 0x40, 0x30, 0x64, 0xa3, 0xd9, 0x25, 0xeb, 0x1a,
-        0xf9, 0x81, 0x1f, 0xad, 0xee, 0xd6, 0xc3, 0xc8, 0xec, 0xd9, 0x13, 0x64,
-        0x49, 0xb6, 0xcc, 0xd0, 0x0f, 0x33, 0xc0, 0xcc, 0x30, 0x27, 0x13, 0x77,
-        0x8c, 0x01, 0x03, 0x63, 0x98, 0xdd, 0x6c, 0x92, 0x99, 0x3d, 0x49, 0xd6,
-        0x07, 0xf3, 0xb0, 0xc1, 0x60, 0x32, 0x43, 0x12, 0xb1, 0xcb, 0x4c, 0xe5,
-        0xfb, 0xaa, 0x25, 0x63, 0x58, 0xb2, 0x9b, 0x6c, 0xfe, 0x88, 0xce, 0xd1,
-        0xe9, 0xee, 0xaa, 0x5b, 0xf7, 0x7e, 0xef, 0xef, 0xf7, 0x7d, 0xf7, 0x56,
-        0x04, 0xf0, 0x62, 0xee, 0xaf, 0x86, 0xfe, 0xe3, 0xfd, 0x03, 0x0f, 0xb7,
-        0xae, 0x88, 0xaf, 0xa0, 0xaf, 0x6d, 0x58, 0xec, 0x74, 0xf2, 0xcd, 0x55,
-        0x02, 0x48, 0xbd, 0x87, 0x7f, 0xd4, 0xdf, 0x57, 0xff, 0x71, 0x8f, 0xc1,
-        0x01, 0x28, 0xf3, 0x34, 0xf1, 0x3f, 0x64, 0xc9, 0x30, 0xd7, 0xac, 0xd7,
-        0x20, 0x3b, 0x8c, 0xc4, 0xda, 0xbb, 0x34, 0x20, 0x99, 0x6f, 0x0e, 0xdd,
-        0x88, 0xdf, 0x58, 0x66, 0xc0, 0x09, 0xbe, 0xfe, 0x55, 0xe3, 0xd3, 0x5d,
-        0x3f, 0x5d, 0xad, 0x7e, 0x34, 0xe1, 0x80, 0xac, 0x18, 0x63, 0x50, 0x9a,
-        0x20, 0x37, 0xd2, 0x33, 0x7f, 0xb6, 0xec, 0x79, 0x27, 0xfc, 0xf3, 0x73,
-        0xc1, 0x74, 0x19, 0x3a, 0x76, 0x67, 0xfb, 0x31, 0x13, 0x07, 0x2e, 0xa6,
-        0x23, 0xfa, 0x6e, 0x20, 0x27, 0x19, 0x91, 0xd0, 0x69, 0x84, 0x30, 0x9d,
-        0x87, 0x59, 0x65, 0x68, 0xd8, 0x5f, 0x0a, 0xe1, 0x52, 0xfa, 0xb7, 0x56,
-        0xc8, 0xd5, 0x8f, 0xb7, 0xe2, 0x90, 0x83, 0xc6, 0x23, 0x08, 0x66, 0x21,
-        0xd7, 0x18, 0x03, 0x28, 0x0c, 0x01, 0x7b, 0xd3, 0x6a, 0x3f, 0xa0, 0xf6,
-        0x14, 0x45, 0xf8, 0xec, 0x09, 0xa8, 0xdd, 0x0d, 0x8e, 0xe6, 0xd4, 0xed,
-        0x42, 0x4d, 0xee, 0x14, 0x90, 0x05, 0x8d, 0x5d, 0x9e, 0xe7, 0xcf, 0x01,
-        0x44, 0xf3, 0x32, 0xce, 0x3b, 0x78, 0x59, 0x83, 0xe4, 0x2c, 0xe0, 0xd4,
-        0x74, 0xec, 0xcd, 0xc2, 0x74, 0x1a, 0x02, 0xbb, 0xe3, 0x11, 0x65, 0x0a,
-        0x7c, 0x3f, 0x84, 0x41, 0x7b, 0x9c, 0x4a, 0x1c, 0x5b, 0xd6, 0x1e, 0xdd,
-        0xb2, 0x8e, 0xe9, 0x55, 0x30, 0x15, 0x35, 0x08, 0x08, 0x0c, 0xea, 0x12,
-        0x92, 0xca, 0xfa, 0x90, 0x13, 0x6a, 0x70, 0x1b, 0xfe, 0x96, 0xf8, 0x4d,
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+        0x68, 0xf5, 0x9f, 0x54, 0xa5, 0x8f, 0x3f, 0x79, 0xef, 0x3f, 0xa8, 0x0f,
+        0xa1, 0x61, 0x25, 0x70, 0x7e, 0x94, 0xfb, 0x55, 0xbc, 0xcf, 0x35, 0x2c,
+        0xae, 0xf0, 0x7b, 0x61, 0xb5, 0x43, 0x78, 0x2f, 0xce, 0xef, 0x5b, 0xb1,
+        0xef, 0x3d, 0x0c, 0xf6, 0xbd, 0x06, 0x1a, 0xfb, 0xc9, 0x68, 0x38, 0xd4,
+        0x43, 0x7e, 0x33, 0x00, 0xeb, 0xbc, 0x90, 0x36, 0x6b, 0xf7, 0xc7, 0x93,
+        0xa7, 0xaa, 0xfb, 0x5b, 0x91, 0xea, 0xde, 0x5c, 0xb4, 0xd0, 0x23, 0x2e,
+        0x15, 0x98, 0xa6, 0xb7, 0x89, 0xa6, 0x6e, 0xf1, 0xe1, 0xec, 0x3a, 0x71,
+        0x71, 0xb6, 0x57, 0x9c, 0x2d, 0x70, 0x4c, 0xfe, 0x79, 0xd7, 0xae, 0x1c,
+        0xe7, 0xb3, 0x3b, 0xc5, 0xbb, 0xf9, 0x0d, 0xe2, 0x42, 0xa1, 0x5f, 0x7c,
+        0x34, 0x6b, 0xe0, 0xfe, 0x78, 0x2f, 0x0a, 0x63, 0xf0, 0xbb, 0xf5, 0xfb,
+        0xc5, 0xa5, 0xbc, 0xdd, 0x27, 0xbc, 0x50, 0x68, 0xf1, 0x15, 0xd2, 0x5c,
+        0x03, 0x1f, 0xa3, 0x1a, 0x78, 0x91, 0xef, 0x99, 0xc9, 0x80, 0xaf, 0x34,
+        0xa9, 0x0c, 0xde, 0x23, 0x4c, 0xf3, 0xb6, 0xd8, 0x69, 0xd6, 0xa1, 0xf9,
+        0x5a, 0xcc, 0xc6, 0x07, 0x3b, 0x49, 0x1e, 0x9b, 0x29, 0xb7, 0x4c, 0x6b,
+        0x6d, 0x55, 0x2c, 0xc2, 0xb6, 0xce, 0xbc, 0x72, 0xae, 0xe6, 0xfd, 0xa7,
+        0x21, 0x38, 0x3b, 0x81, 0xbd, 0xe9, 0xcf, 0x79, 0xbd, 0x44, 0xbc, 0x1a,
+        0xae, 0x21, 0x7c, 0x4c, 0xbc, 0xbe, 0x3e, 0xfa, 0xf9, 0x7e, 0x9e, 0x93,
+        0xc6, 0xee, 0x4a, 0x87, 0x53, 0x47, 0x84, 0x52, 0x29, 0xd8, 0xfb, 0x79,
+        0x9a, 0x57, 0x52, 0x4e, 0x8f, 0x50, 0x1d, 0xd1, 0x2a, 0xd9, 0xbc, 0x26,
+        0xaa, 0xbc, 0xde, 0x44, 0xbc, 0x5e, 0x2c, 0x70, 0x7d, 0xfe, 0x76, 0xd7,
+        0x1b, 0xa3, 0x63, 0x66, 0x3d, 0xd5, 0xff, 0x75, 0x6a, 0xb7, 0xb8, 0x40,
+        0x3c, 0x7f, 0x48, 0x3c, 0x7f, 0x5c, 0xb8, 0x53, 0x7c, 0x44, 0x7c, 0x5e,
+        0x2c, 0xf0, 0x1e, 0x9e, 0x5b, 0x7c, 0x98, 0xb3, 0x79, 0xfc, 0xf0, 0x2a,
+        0x8f, 0x41, 0xdf, 0xfe, 0x74, 0x93, 0xef, 0xd1, 0x49, 0xbf, 0x6f, 0xcf,
+        0xa4, 0x69, 0x7e, 0xa8, 0x49, 0x3e, 0xe6, 0xeb, 0x55, 0xed, 0x8b, 0x7c,
+        0xdd, 0x4c, 0x7c, 0xf1, 0xfe, 0xeb, 0x6f, 0xeb, 0x70, 0x9e, 0xaf, 0xc7,
+        0xac, 0x73, 0x6c, 0xf6, 0x19, 0xa9, 0x7a, 0xde, 0x83, 0x25, 0xbe, 0x7c,
+        0x74, 0xfd, 0x95, 0x7f, 0xcd, 0xd7, 0xe0, 0x05, 0xd2, 0x5f, 0xb1, 0xca,
+        0x57, 0xfd, 0xbf, 0xc9, 0x17, 0xd5, 0xba, 0x63, 0xcc, 0x57, 0xa3, 0xfe,
+        0xc6, 0x98, 0x49, 0xfa, 0x92, 0xac, 0x77, 0xc1, 0x8a, 0xd9, 0x1d, 0x78,
+        0x25, 0xc6, 0xef, 0xc7, 0x45, 0x42, 0x47, 0x28, 0x9e, 0xce, 0x96, 0x3d,
+        0xa2, 0xc6, 0xda, 0x87, 0xc5, 0x1b, 0xb5, 0x44, 0xd3, 0xe1, 0x19, 0x7e,
+        0xff, 0x0b, 0x1a, 0x61, 0x01, 0x3f, 0xbf, 0x37, 0x37, 0x0d, 0xee, 0x97,
+        0xf5, 0x8a, 0x86, 0x22, 0xef, 0xbb, 0x6e, 0x10, 0xbe, 0x22, 0x9f, 0xa3,
+        0xeb, 0x11, 0xde, 0x62, 0xb7, 0xf0, 0x1c, 0x32, 0x4c, 0x8f, 0xba, 0x4e,
+        0xd4, 0x1d, 0xba, 0x53, 0x78, 0xaa, 0x7b, 0xb0, 0xee, 0x62, 0xd0, 0x97,
+        0xbe, 0x46, 0x1e, 0x17, 0xb5, 0x9b, 0x2d, 0x79, 0xbc, 0xa6, 0xcd, 0xef,
+        0x1f, 0x5a, 0xe7, 0x10, 0xf9, 0x1c, 0x9c, 0x27, 0x48, 0xb5, 0x53, 0x43,
+        0xb5, 0x76, 0x7a, 0x37, 0xc6, 0xe7, 0x7b, 0x0c, 0x92, 0x3f, 0x42, 0x4e,
+        0x5d, 0xe9, 0x3f, 0x21, 0xd4, 0xd4, 0xfd, 0x22, 0x79, 0xab, 0x97, 0xea,
+        0x9f, 0xad, 0xb1, 0x48, 0xf2, 0x06, 0x11, 0x49, 0x38, 0x05, 0xe7, 0x15,
+        0x4d, 0xae, 0x2d, 0x19, 0xd8, 0x43, 0xf1, 0xed, 0xe5, 0x9c, 0x83, 0xb0,
+        0x03, 0xbf, 0x43, 0xe6, 0xc4, 0x5a, 0xbf, 0x17, 0x4f, 0x12, 0xee, 0x78,
+        0x22, 0x3b, 0x88, 0x27, 0x0b, 0x03, 0x78, 0xa2, 0xf0, 0xaf, 0xde, 0x95,
+        0x91, 0x3d, 0xfa, 0xf9, 0x95, 0xd5, 0x33, 0x08, 0x89, 0xeb, 0x23, 0x1c,
+        0xa3, 0x1f, 0x6e, 0x97, 0x23, 0x5c, 0xeb, 0xbe, 0x75, 0xf3, 0x07, 0x2a,
+        0xfb, 0xa2, 0xba, 0xe2, 0x94, 0x85, 0x45, 0x1e, 0x59, 0x7e, 0xc8, 0x3a,
+        0x1b, 0x95, 0xbe, 0x69, 0x97, 0xf5, 0x4e, 0xe7, 0x3b, 0x2b, 0x36, 0xa9,
+        0xec, 0x0f, 0x0f, 0xc7, 0xd7, 0x58, 0xf9, 0xf5, 0x6f, 0x56, 0xd9, 0x3d,
+        0x9a, 0x77, 0x56, 0x5d, 0x6f, 0xf7, 0xd1, 0x56, 0x45, 0xad, 0xcf, 0x33,
+        0xab, 0xec, 0xfd, 0xed, 0x4f, 0x57, 0xb5, 0x5a, 0x9f, 0xe7, 0x57, 0xd9,
+        0x3e, 0xf5, 0xee, 0x2a, 0xd5, 0xfa, 0xfc, 0x87, 0x55, 0x76, 0x5e, 0xbe,
+        0xb4, 0x6a, 0xc9, 0xd5, 0xf7, 0x63, 0xf8, 0xef, 0xff, 0x00, 0x88, 0xf4,
+        0x23, 0x6f, 0xec, 0x3a, 0x00, 0x00, 0x00 };
 
 static const u32 bnx2_TXP_b09FwData[(0x0/4) + 1] = { 0x0 };
 static const u32 bnx2_TXP_b09FwRodata[(0x30/4) + 1] = {
@@ -4582,15 +4513,15 @@ static const u32 bnx2_TXP_b09FwRodata[(0x30/4) + 1] = {
         0x00000000 };
 
 static struct fw_info bnx2_txp_fw_09 = {
-        /* Firmware version: 4.4.23 */
+        /* Firmware version: 4.6.15 */
         .ver_major                      = 0x4,
-        .ver_minor                      = 0x4,
-        .ver_fix                        = 0x17,
+        .ver_minor                      = 0x6,
+        .ver_fix                        = 0xf,
 
-        .start_addr                     = 0x08000094,
+        .start_addr                     = 0x08000098,
 
         .text_addr                      = 0x08000000,
-        .text_len                       = 0x3b1c,
+        .text_len                       = 0x3ae8,
         .text_index                     = 0x0,
         .gz_text                        = bnx2_TXP_b09FwText,
         .gz_text_len                    = sizeof(bnx2_TXP_b09FwText),
@@ -4600,15 +4531,15 @@ static struct fw_info bnx2_txp_fw_09 = {
         .data_index                     = 0x0,
         .data                           = bnx2_TXP_b09FwData,
 
-        .sbss_addr                      = 0x08003b80,
+        .sbss_addr                      = 0x08003b40,
         .sbss_len                       = 0x6c,
         .sbss_index                     = 0x0,
 
-        .bss_addr                       = 0x08003bec,
+        .bss_addr                       = 0x08003bac,
         .bss_len                        = 0x24c,
         .bss_index                      = 0x0,
 
-        .rodata_addr                    = 0x08003b1c,
+        .rodata_addr                    = 0x08003ae8,
         .rodata_len                     = 0x30,
         .rodata_index                   = 0x0,
         .rodata                         = bnx2_TXP_b09FwRodata,
diff --git a/drivers/net/bnx2x.h b/drivers/net/bnx2x.h
index 15a5cf0f676b..3cf2b92eef3b 100644
--- a/drivers/net/bnx2x.h
+++ b/drivers/net/bnx2x.h
@@ -152,7 +152,7 @@ struct sw_rx_page {
 #define PAGES_PER_SGE                   (1 << PAGES_PER_SGE_SHIFT)
 #define SGE_PAGE_SIZE                   PAGE_SIZE
 #define SGE_PAGE_SHIFT                  PAGE_SHIFT
-#define SGE_PAGE_ALIGN(addr)            PAGE_ALIGN(addr)
+#define SGE_PAGE_ALIGN(addr)            PAGE_ALIGN((typeof(PAGE_SIZE))addr)
 
 #define BCM_RX_ETH_PAYLOAD_ALIGN        64
 
diff --git a/drivers/net/bnx2x_init.h b/drivers/net/bnx2x_init.h
index a6c0b3abba29..3b0c2499ef17 100644
--- a/drivers/net/bnx2x_init.h
+++ b/drivers/net/bnx2x_init.h
@@ -150,7 +150,6 @@ static void bnx2x_init_ind_wr(struct bnx2x *bp, u32 addr, const u32 *data,
 
 static void bnx2x_write_big_buf(struct bnx2x *bp, u32 addr, u32 len)
 {
-#ifdef USE_DMAE
         int offset = 0;
 
         if (bp->dmae_ready) {
@@ -164,9 +163,6 @@ static void bnx2x_write_big_buf(struct bnx2x *bp, u32 addr, u32 len)
                                  addr + offset, len);
         } else
                 bnx2x_init_str_wr(bp, addr, bp->gunzip_buf, len);
-#else
-        bnx2x_init_str_wr(bp, addr, bp->gunzip_buf, len);
-#endif
 }
 
 static void bnx2x_init_fill(struct bnx2x *bp, u32 addr, int fill, u32 len)
diff --git a/drivers/net/bnx2x_main.c b/drivers/net/bnx2x_main.c
index d3e7775a9ccf..2e346a5e98cf 100644
--- a/drivers/net/bnx2x_main.c
+++ b/drivers/net/bnx2x_main.c
@@ -57,7 +57,7 @@
 #include "bnx2x.h"
 #include "bnx2x_init.h"
 
-#define DRV_MODULE_VERSION      "1.45.26"
+#define DRV_MODULE_VERSION      "1.45.27"
 #define DRV_MODULE_RELDATE      "2009/01/26"
 #define BNX2X_BC_VER            0x040200
 
@@ -4035,10 +4035,10 @@ static void bnx2x_zero_sb(struct bnx2x *bp, int sb_id)
 {
         int port = BP_PORT(bp);
 
-        bnx2x_init_fill(bp, BAR_USTRORM_INTMEM +
+        bnx2x_init_fill(bp, USTORM_INTMEM_ADDR +
                         USTORM_SB_HOST_STATUS_BLOCK_OFFSET(port, sb_id), 0,
                         sizeof(struct ustorm_status_block)/4);
-        bnx2x_init_fill(bp, BAR_CSTRORM_INTMEM +
+        bnx2x_init_fill(bp, CSTORM_INTMEM_ADDR +
                         CSTORM_SB_HOST_STATUS_BLOCK_OFFSET(port, sb_id), 0,
                         sizeof(struct cstorm_status_block)/4);
 }
@@ -4092,18 +4092,18 @@ static void bnx2x_zero_def_sb(struct bnx2x *bp)
 {
         int func = BP_FUNC(bp);
 
-        bnx2x_init_fill(bp, BAR_USTRORM_INTMEM +
+        bnx2x_init_fill(bp, TSTORM_INTMEM_ADDR +
+                        TSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(func), 0,
+                        sizeof(struct tstorm_def_status_block)/4);
+        bnx2x_init_fill(bp, USTORM_INTMEM_ADDR +
                         USTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(func), 0,
                         sizeof(struct ustorm_def_status_block)/4);
-        bnx2x_init_fill(bp, BAR_CSTRORM_INTMEM +
+        bnx2x_init_fill(bp, CSTORM_INTMEM_ADDR +
                         CSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(func), 0,
                         sizeof(struct cstorm_def_status_block)/4);
-        bnx2x_init_fill(bp, BAR_XSTRORM_INTMEM +
+        bnx2x_init_fill(bp, XSTORM_INTMEM_ADDR +
                         XSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(func), 0,
                         sizeof(struct xstorm_def_status_block)/4);
-        bnx2x_init_fill(bp, BAR_TSTRORM_INTMEM +
-                        TSTORM_DEF_SB_HOST_STATUS_BLOCK_OFFSET(func), 0,
-                        sizeof(struct tstorm_def_status_block)/4);
 }
 
 static void bnx2x_init_def_sb(struct bnx2x *bp,
@@ -4518,7 +4518,8 @@ static void bnx2x_init_context(struct bnx2x *bp)
                                 (USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_TPA |
                                  USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_SGE_RING);
                         context->ustorm_st_context.common.sge_buff_size =
-                                        (u16)(BCM_PAGE_SIZE*PAGES_PER_SGE);
+                                (u16)min((u32)SGE_PAGE_SIZE*PAGES_PER_SGE,
+                                         (u32)0xffff);
                         context->ustorm_st_context.common.sge_page_base_hi =
                                                 U64_HI(fp->rx_sge_mapping);
                         context->ustorm_st_context.common.sge_page_base_lo =
diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c
index 9fb388388fb7..3d76686dceca 100644
--- a/drivers/net/bonding/bond_main.c
+++ b/drivers/net/bonding/bond_main.c
@@ -3537,11 +3537,26 @@ static int bond_slave_netdev_event(unsigned long event, struct net_device *slave
                 }
                 break;
         case NETDEV_CHANGE:
-                /*
-                 * TODO: is this what we get if somebody
-                 * sets up a hierarchical bond, then rmmod's
-                 * one of the slave bonding devices?
-                 */
+                if (bond->params.mode == BOND_MODE_8023AD || bond_is_lb(bond)) {
+                        struct slave *slave;
+
+                        slave = bond_get_slave_by_dev(bond, slave_dev);
+                        if (slave) {
+                                u16 old_speed = slave->speed;
+                                u16 old_duplex = slave->duplex;
+
+                                bond_update_speed_duplex(slave);
+
+                                if (bond_is_lb(bond))
+                                        break;
+
+                                if (old_speed != slave->speed)
+                                        bond_3ad_adapter_speed_changed(slave);
+                                if (old_duplex != slave->duplex)
+                                        bond_3ad_adapter_duplex_changed(slave);
+                        }
+                }
+
                 break;
         case NETDEV_DOWN:
                 /*
@@ -4113,7 +4128,7 @@ static int bond_neigh_setup(struct net_device *dev, struct neigh_parms *parms)
                 const struct net_device_ops *slave_ops
                         = slave->dev->netdev_ops;
                 if (slave_ops->ndo_neigh_setup)
-                        return slave_ops->ndo_neigh_setup(dev, parms);
+                        return slave_ops->ndo_neigh_setup(slave->dev, parms);
         }
         return 0;
 }
diff --git a/drivers/net/cassini.c b/drivers/net/cassini.c
index 840b3d1a22f5..bbbc3bb08aa5 100644
--- a/drivers/net/cassini.c
+++ b/drivers/net/cassini.c
@@ -806,7 +806,7 @@ static int cas_reset_mii_phy(struct cas *cp)
 
         cas_phy_write(cp, MII_BMCR, BMCR_RESET);
         udelay(100);
-        while (limit--) {
+        while (--limit) {
                 val = cas_phy_read(cp, MII_BMCR);
                 if ((val & BMCR_RESET) == 0)
                         break;
@@ -979,7 +979,7 @@ static void cas_phy_init(struct cas *cp)
                 writel(val, cp->regs + REG_PCS_MII_CTRL);
 
                 limit = STOP_TRIES;
-                while (limit-- > 0) {
+                while (--limit > 0) {
                         udelay(10);
                         if ((readl(cp->regs + REG_PCS_MII_CTRL) &
                              PCS_MII_RESET) == 0)
diff --git a/drivers/net/cxgb3/cxgb3_main.c b/drivers/net/cxgb3/cxgb3_main.c
index 0089746b8d02..bab8a934c33d 100644
--- a/drivers/net/cxgb3/cxgb3_main.c
+++ b/drivers/net/cxgb3/cxgb3_main.c
@@ -90,6 +90,7 @@ static const struct pci_device_id cxgb3_pci_tbl[] = {
         CH_DEVICE(0x30, 2),     /* T3B10 */
         CH_DEVICE(0x31, 3),     /* T3B20 */
         CH_DEVICE(0x32, 1),     /* T3B02 */
+        CH_DEVICE(0x35, 6),     /* T3C20-derived T3C10 */
         {0,}
 };
 
diff --git a/drivers/net/cxgb3/sge.c b/drivers/net/cxgb3/sge.c
index 379a1324db4e..d31791f60292 100644
--- a/drivers/net/cxgb3/sge.c
+++ b/drivers/net/cxgb3/sge.c
@@ -2276,8 +2276,7 @@ no_mem:
                 } else if ((len = ntohl(r->len_cq)) != 0) {
                         struct sge_fl *fl;
 
-                        if (eth)
-                                lro = qs->lro_enabled && is_eth_tcp(rss_hi);
+                        lro &= eth && is_eth_tcp(rss_hi);
 
                         fl = (len & F_RSPD_FLQ) ? &qs->fl[1] : &qs->fl[0];
                         if (fl->use_pages) {
diff --git a/drivers/net/cxgb3/t3_hw.c b/drivers/net/cxgb3/t3_hw.c
index 2d1433077a8e..ac2a974dfe37 100644
--- a/drivers/net/cxgb3/t3_hw.c
+++ b/drivers/net/cxgb3/t3_hw.c
@@ -512,6 +512,13 @@ static const struct adapter_info t3_adap_info[] = {
          F_GPIO5_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL,
          { S_GPIO9, S_GPIO3 }, SUPPORTED_10000baseT_Full | SUPPORTED_AUI,
          &mi1_mdio_ext_ops, "Chelsio T320"},
+        {},
+        {},
+        {1, 0,
+         F_GPIO1_OEN | F_GPIO2_OEN | F_GPIO4_OEN | F_GPIO6_OEN | F_GPIO7_OEN |
+         F_GPIO10_OEN | F_GPIO1_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL,
+         { S_GPIO9 }, SUPPORTED_10000baseT_Full | SUPPORTED_AUI,
+         &mi1_mdio_ext_ops, "Chelsio T310" },
 };
 
 /*
diff --git a/drivers/net/dm9000.c b/drivers/net/dm9000.c
index bcf92917bbf3..254ec62b5f58 100644
--- a/drivers/net/dm9000.c
+++ b/drivers/net/dm9000.c
@@ -930,13 +930,15 @@ static irqreturn_t dm9000_interrupt(int irq, void *dev_id)
         struct net_device *dev = dev_id;
         board_info_t *db = netdev_priv(dev);
         int int_status;
+        unsigned long flags;
         u8 reg_save;
 
         dm9000_dbg(db, 3, "entering %s\n", __func__);
 
         /* A real interrupt coming */
 
-        spin_lock(&db->lock);
+        /* holders of db->lock must always block IRQs */
+        spin_lock_irqsave(&db->lock, flags);
 
         /* Save previous register address */
         reg_save = readb(db->io_addr);
@@ -972,7 +974,7 @@ static irqreturn_t dm9000_interrupt(int irq, void *dev_id)
         /* Restore previous register address */
         writeb(reg_save, db->io_addr);
 
-        spin_unlock(&db->lock);
+        spin_unlock_irqrestore(&db->lock, flags);
 
         return IRQ_HANDLED;
 }
diff --git a/drivers/net/dnet.c b/drivers/net/dnet.c
new file mode 100644
index 000000000000..1b4063222a82
--- /dev/null
+++ b/drivers/net/dnet.c
@@ -0,0 +1,994 @@
+/*
+ * Dave DNET Ethernet Controller driver
+ *
+ * Copyright (C) 2008 Dave S.r.l. <www.dave.eu>
+ * Copyright (C) 2009 Ilya Yanok, Emcraft Systems Ltd, <yanok@emcraft.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/kernel.h>
+#include <linux/types.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/dma-mapping.h>
+#include <linux/platform_device.h>
+#include <linux/phy.h>
+#include <linux/platform_device.h>
+
+#include "dnet.h"
+
+#undef DEBUG
+
+/* function for reading internal MAC register */
+u16 dnet_readw_mac(struct dnet *bp, u16 reg)
+{
+        u16 data_read;
+
+        /* issue a read */
+        dnet_writel(bp, reg, MACREG_ADDR);
+
+        /* since a read/write op to the MAC is very slow,
+         * we must wait before reading the data */
+        ndelay(500);
+
+        /* read data read from the MAC register */
+        data_read = dnet_readl(bp, MACREG_DATA);
+
+        /* all done */
+        return data_read;
+}
+
+/* function for writing internal MAC register */
+void dnet_writew_mac(struct dnet *bp, u16 reg, u16 val)
+{
+        /* load data to write */
+        dnet_writel(bp, val, MACREG_DATA);
+
+        /* issue a write */
+        dnet_writel(bp, reg | DNET_INTERNAL_WRITE, MACREG_ADDR);
+
+        /* since a read/write op to the MAC is very slow,
+         * we must wait before exiting */
+        ndelay(500);
+}
+
+static void __dnet_set_hwaddr(struct dnet *bp)
+{
+        u16 tmp;
+
+        tmp = cpu_to_be16(*((u16 *) bp->dev->dev_addr));
+        dnet_writew_mac(bp, DNET_INTERNAL_MAC_ADDR_0_REG, tmp);
+        tmp = cpu_to_be16(*((u16 *) (bp->dev->dev_addr + 2)));
+        dnet_writew_mac(bp, DNET_INTERNAL_MAC_ADDR_1_REG, tmp);
+        tmp = cpu_to_be16(*((u16 *) (bp->dev->dev_addr + 4)));
+        dnet_writew_mac(bp, DNET_INTERNAL_MAC_ADDR_2_REG, tmp);
+}
+
+static void __devinit dnet_get_hwaddr(struct dnet *bp)
+{
+        u16 tmp;
+        u8 addr[6];
+
+        /*
+         * from MAC docs:
+         * "Note that the MAC address is stored in the registers in Hexadecimal
+         * form. For example, to set the MAC Address to: AC-DE-48-00-00-80
+         * would require writing 0xAC (octet 0) to address 0x0B (high byte of
+         * Mac_addr[15:0]), 0xDE (octet 1) to address 0x0A (Low byte of
+         * Mac_addr[15:0]), 0x48 (octet 2) to address 0x0D (high byte of
+         * Mac_addr[15:0]), 0x00 (octet 3) to address 0x0C (Low byte of
+         * Mac_addr[15:0]), 0x00 (octet 4) to address 0x0F (high byte of
+         * Mac_addr[15:0]), and 0x80 (octet 5) to address * 0x0E (Low byte of
+         * Mac_addr[15:0]).
+         */
+        tmp = dnet_readw_mac(bp, DNET_INTERNAL_MAC_ADDR_0_REG);
+        *((u16 *) addr) = be16_to_cpu(tmp);
+        tmp = dnet_readw_mac(bp, DNET_INTERNAL_MAC_ADDR_1_REG);
+        *((u16 *) (addr + 2)) = be16_to_cpu(tmp);
+        tmp = dnet_readw_mac(bp, DNET_INTERNAL_MAC_ADDR_2_REG);
+        *((u16 *) (addr + 4)) = be16_to_cpu(tmp);
+
+        if (is_valid_ether_addr(addr))
+                memcpy(bp->dev->dev_addr, addr, sizeof(addr));
+}
+
+static int dnet_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
+{
+        struct dnet *bp = bus->priv;
+        u16 value;
+
+        while (!(dnet_readw_mac(bp, DNET_INTERNAL_GMII_MNG_CTL_REG)
+                                & DNET_INTERNAL_GMII_MNG_CMD_FIN))
+                cpu_relax();
+
+        /* only 5 bits allowed for phy-addr and reg_offset */
+        mii_id &= 0x1f;
+        regnum &= 0x1f;
+
+        /* prepare reg_value for a read */
+        value = (mii_id << 8);
+        value |= regnum;
+
+        /* write control word */
+        dnet_writew_mac(bp, DNET_INTERNAL_GMII_MNG_CTL_REG, value);
+
+        /* wait for end of transfer */
+        while (!(dnet_readw_mac(bp, DNET_INTERNAL_GMII_MNG_CTL_REG)
+                                & DNET_INTERNAL_GMII_MNG_CMD_FIN))
+                cpu_relax();
+
+        value = dnet_readw_mac(bp, DNET_INTERNAL_GMII_MNG_DAT_REG);
+
+        pr_debug("mdio_read %02x:%02x <- %04x\n", mii_id, regnum, value);
+
+        return value;
+}
+
+static int dnet_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
+                           u16 value)
+{
+        struct dnet *bp = bus->priv;
+        u16 tmp;
+
+        pr_debug("mdio_write %02x:%02x <- %04x\n", mii_id, regnum, value);
+
+        while (!(dnet_readw_mac(bp, DNET_INTERNAL_GMII_MNG_CTL_REG)
+                                & DNET_INTERNAL_GMII_MNG_CMD_FIN))
+                cpu_relax();
+
+        /* prepare for a write operation */
+        tmp = (1 << 13);
+
+        /* only 5 bits allowed for phy-addr and reg_offset */
+        mii_id &= 0x1f;
+        regnum &= 0x1f;
+
+        /* only 16 bits on data */
+        value &= 0xffff;
+
+        /* prepare reg_value for a write */
+        tmp |= (mii_id << 8);
+        tmp |= regnum;
+
+        /* write data to write first */
+        dnet_writew_mac(bp, DNET_INTERNAL_GMII_MNG_DAT_REG, value);
+
+        /* write control word */
+        dnet_writew_mac(bp, DNET_INTERNAL_GMII_MNG_CTL_REG, tmp);
+
+        while (!(dnet_readw_mac(bp, DNET_INTERNAL_GMII_MNG_CTL_REG)
+                                & DNET_INTERNAL_GMII_MNG_CMD_FIN))
+                cpu_relax();
+
+        return 0;
+}
+
+static int dnet_mdio_reset(struct mii_bus *bus)
+{
+        return 0;
+}
+
+static void dnet_handle_link_change(struct net_device *dev)
+{
+        struct dnet *bp = netdev_priv(dev);
+        struct phy_device *phydev = bp->phy_dev;
+        unsigned long flags;
+        u32 mode_reg, ctl_reg;
+
+        int status_change = 0;
+
+        spin_lock_irqsave(&bp->lock, flags);
+
+        mode_reg = dnet_readw_mac(bp, DNET_INTERNAL_MODE_REG);
+        ctl_reg = dnet_readw_mac(bp, DNET_INTERNAL_RXTX_CONTROL_REG);
+
+        if (phydev->link) {
+                if (bp->duplex != phydev->duplex) {
+                        if (phydev->duplex)
+                                ctl_reg &=
+                                    ~(DNET_INTERNAL_RXTX_CONTROL_ENABLEHALFDUP);
+                        else
+                                ctl_reg |=
+                                    DNET_INTERNAL_RXTX_CONTROL_ENABLEHALFDUP;
+
+                        bp->duplex = phydev->duplex;
+                        status_change = 1;
+                }
+
+                if (bp->speed != phydev->speed) {
+                        status_change = 1;
+                        switch (phydev->speed) {
+                        case 1000:
+                                mode_reg |= DNET_INTERNAL_MODE_GBITEN;
+                                break;
+                        case 100:
+                        case 10:
+                                mode_reg &= ~DNET_INTERNAL_MODE_GBITEN;
+                                break;
+                        default:
+                                printk(KERN_WARNING
+                                       "%s: Ack!  Speed (%d) is not "
+                                       "10/100/1000!\n", dev->name,
+                                       phydev->speed);
+                                break;
+                        }
+                        bp->speed = phydev->speed;
+                }
+        }
+
+        if (phydev->link != bp->link) {
+                if (phydev->link) {
+                        mode_reg |=
+                            (DNET_INTERNAL_MODE_RXEN | DNET_INTERNAL_MODE_TXEN);
+                } else {
+                        mode_reg &=
+                            ~(DNET_INTERNAL_MODE_RXEN |
+                              DNET_INTERNAL_MODE_TXEN);
+                        bp->speed = 0;
+                        bp->duplex = -1;
+                }
+                bp->link = phydev->link;
+
+                status_change = 1;
+        }
+
+        if (status_change) {
+                dnet_writew_mac(bp, DNET_INTERNAL_RXTX_CONTROL_REG, ctl_reg);
+                dnet_writew_mac(bp, DNET_INTERNAL_MODE_REG, mode_reg);
+        }
+
+        spin_unlock_irqrestore(&bp->lock, flags);
+
+        if (status_change) {
+                if (phydev->link)
+                        printk(KERN_INFO "%s: link up (%d/%s)\n",
+                               dev->name, phydev->speed,
+                               DUPLEX_FULL == phydev->duplex ? "Full" : "Half");
+                else
+                        printk(KERN_INFO "%s: link down\n", dev->name);
+        }
+}
+
+static int dnet_mii_probe(struct net_device *dev)
+{
+        struct dnet *bp = netdev_priv(dev);
+        struct phy_device *phydev = NULL;
+        int phy_addr;
+
+        /* find the first phy */
+        for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
+                if (bp->mii_bus->phy_map[phy_addr]) {
+                        phydev = bp->mii_bus->phy_map[phy_addr];
+                        break;
+                }
+        }
+
+        if (!phydev) {
+                printk(KERN_ERR "%s: no PHY found\n", dev->name);
+                return -ENODEV;
+        }
+
+        /* TODO : add pin_irq */
+
+        /* attach the mac to the phy */
+        if (bp->capabilities & DNET_HAS_RMII) {
+                phydev = phy_connect(dev, dev_name(&phydev->dev),
+                                     &dnet_handle_link_change, 0,
+                                     PHY_INTERFACE_MODE_RMII);
+        } else {
+                phydev = phy_connect(dev, dev_name(&phydev->dev),
+                                     &dnet_handle_link_change, 0,
+                                     PHY_INTERFACE_MODE_MII);
+        }
+
+        if (IS_ERR(phydev)) {
+                printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
+                return PTR_ERR(phydev);
+        }
+
+        /* mask with MAC supported features */
+        if (bp->capabilities & DNET_HAS_GIGABIT)
+                phydev->supported &= PHY_GBIT_FEATURES;
+        else
+                phydev->supported &= PHY_BASIC_FEATURES;
+
+        phydev->supported |= SUPPORTED_Asym_Pause | SUPPORTED_Pause;
+
+        phydev->advertising = phydev->supported;
+
+        bp->link = 0;
+        bp->speed = 0;
+        bp->duplex = -1;
+        bp->phy_dev = phydev;
+
+        return 0;
+}
+
+static int dnet_mii_init(struct dnet *bp)
+{
+        int err, i;
+
+        bp->mii_bus = mdiobus_alloc();
+        if (bp->mii_bus == NULL)
+                return -ENOMEM;
+
+        bp->mii_bus->name = "dnet_mii_bus";
+        bp->mii_bus->read = &dnet_mdio_read;
+        bp->mii_bus->write = &dnet_mdio_write;
+        bp->mii_bus->reset = &dnet_mdio_reset;
+
+        snprintf(bp->mii_bus->id, MII_BUS_ID_SIZE, "%x", 0);
+
+        bp->mii_bus->priv = bp;
+
+        bp->mii_bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
+        if (!bp->mii_bus->irq) {
+                err = -ENOMEM;
+                goto err_out;
+        }
+
+        for (i = 0; i < PHY_MAX_ADDR; i++)
+                bp->mii_bus->irq[i] = PHY_POLL;
+
+        platform_set_drvdata(bp->dev, bp->mii_bus);
+
+        if (mdiobus_register(bp->mii_bus)) {
+                err = -ENXIO;
+                goto err_out_free_mdio_irq;
+        }
+
+        if (dnet_mii_probe(bp->dev) != 0) {
+                err = -ENXIO;
+                goto err_out_unregister_bus;
+        }
+
+        return 0;
+
+err_out_unregister_bus:
+        mdiobus_unregister(bp->mii_bus);
+err_out_free_mdio_irq:
+        kfree(bp->mii_bus->irq);
+err_out:
+        mdiobus_free(bp->mii_bus);
+        return err;
+}
+
+/* For Neptune board: LINK1000 as Link LED and TX as activity LED */
+int dnet_phy_marvell_fixup(struct phy_device *phydev)
+{
+        return phy_write(phydev, 0x18, 0x4148);
+}
+
+static void dnet_update_stats(struct dnet *bp)
+{
+        u32 __iomem *reg = bp->regs + DNET_RX_PKT_IGNR_CNT;
+        u32 *p = &bp->hw_stats.rx_pkt_ignr;
+        u32 *end = &bp->hw_stats.rx_byte + 1;
+
+        WARN_ON((unsigned long)(end - p - 1) !=
+                (DNET_RX_BYTE_CNT - DNET_RX_PKT_IGNR_CNT) / 4);
+
+        for (; p < end; p++, reg++)
+                *p += readl(reg);
+
+        reg = bp->regs + DNET_TX_UNICAST_CNT;
+        p = &bp->hw_stats.tx_unicast;
+        end = &bp->hw_stats.tx_byte + 1;
+
+        WARN_ON((unsigned long)(end - p - 1) !=
+                (DNET_TX_BYTE_CNT - DNET_TX_UNICAST_CNT) / 4);
+
+        for (; p < end; p++, reg++)
+                *p += readl(reg);
+}
+
+static int dnet_poll(struct napi_struct *napi, int budget)
+{
+        struct dnet *bp = container_of(napi, struct dnet, napi);
+        struct net_device *dev = bp->dev;
+        int npackets = 0;
+        unsigned int pkt_len;
+        struct sk_buff *skb;
+        unsigned int *data_ptr;
+        u32 int_enable;
+        u32 cmd_word;
+        int i;
+
+        while (npackets < budget) {
+                /*
+                 * break out of while loop if there are no more
+                 * packets waiting
+                 */
+                if (!(dnet_readl(bp, RX_FIFO_WCNT) >> 16)) {
+                        napi_complete(napi);
+                        int_enable = dnet_readl(bp, INTR_ENB);
+                        int_enable |= DNET_INTR_SRC_RX_CMDFIFOAF;
+                        dnet_writel(bp, int_enable, INTR_ENB);
+                        return 0;
+                }
+
+                cmd_word = dnet_readl(bp, RX_LEN_FIFO);
+                pkt_len = cmd_word & 0xFFFF;
+
+                if (cmd_word & 0xDF180000)
+                        printk(KERN_ERR "%s packet receive error %x\n",
+                               __func__, cmd_word);
+
+                skb = dev_alloc_skb(pkt_len + 5);
+                if (skb != NULL) {
+                        /* Align IP on 16 byte boundaries */
+                        skb_reserve(skb, 2);
+                        /*
+                         * 'skb_put()' points to the start of sk_buff
+                         * data area.
+                         */
+                        data_ptr = (unsigned int *)skb_put(skb, pkt_len);
+                        for (i = 0; i < (pkt_len + 3) >> 2; i++)
+                                *data_ptr++ = dnet_readl(bp, RX_DATA_FIFO);
+                        skb->protocol = eth_type_trans(skb, dev);
+                        netif_receive_skb(skb);
+                        npackets++;
+                } else
+                        printk(KERN_NOTICE
+                               "%s: No memory to allocate a sk_buff of "
+                               "size %u.\n", dev->name, pkt_len);
+        }
+
+        budget -= npackets;
+
+        if (npackets < budget) {
+                /* We processed all packets available.  Tell NAPI it can
+                 * stop polling then re-enable rx interrupts */
+                napi_complete(napi);
+                int_enable = dnet_readl(bp, INTR_ENB);
+                int_enable |= DNET_INTR_SRC_RX_CMDFIFOAF;
+                dnet_writel(bp, int_enable, INTR_ENB);
+                return 0;
+        }
+
+        /* There are still packets waiting */
+        return 1;
+}
+
+static irqreturn_t dnet_interrupt(int irq, void *dev_id)
+{
+        struct net_device *dev = dev_id;
+        struct dnet *bp = netdev_priv(dev);
+        u32 int_src, int_enable, int_current;
+        unsigned long flags;
+        unsigned int handled = 0;
+
+        spin_lock_irqsave(&bp->lock, flags);
+
+        /* read and clear the DNET irq (clear on read) */
+        int_src = dnet_readl(bp, INTR_SRC);
+        int_enable = dnet_readl(bp, INTR_ENB);
+        int_current = int_src & int_enable;
+
+        /* restart the queue if we had stopped it for TX fifo almost full */
+        if (int_current & DNET_INTR_SRC_TX_FIFOAE) {
+                int_enable = dnet_readl(bp, INTR_ENB);
+                int_enable &= ~DNET_INTR_ENB_TX_FIFOAE;
+                dnet_writel(bp, int_enable, INTR_ENB);
+                netif_wake_queue(dev);
+                handled = 1;
+        }
+
+        /* RX FIFO error checking */
+        if (int_current &
+            (DNET_INTR_SRC_RX_CMDFIFOFF | DNET_INTR_SRC_RX_DATAFIFOFF)) {
+                printk(KERN_ERR "%s: RX fifo error %x, irq %x\n", __func__,
+                       dnet_readl(bp, RX_STATUS), int_current);
+                /* we can only flush the RX FIFOs */
+                dnet_writel(bp, DNET_SYS_CTL_RXFIFOFLUSH, SYS_CTL);
+                ndelay(500);
+                dnet_writel(bp, 0, SYS_CTL);
+                handled = 1;
+        }
+
+        /* TX FIFO error checking */
+        if (int_current &
+            (DNET_INTR_SRC_TX_FIFOFULL | DNET_INTR_SRC_TX_DISCFRM)) {
+                printk(KERN_ERR "%s: TX fifo error %x, irq %x\n", __func__,
+                       dnet_readl(bp, TX_STATUS), int_current);
+                /* we can only flush the TX FIFOs */
+                dnet_writel(bp, DNET_SYS_CTL_TXFIFOFLUSH, SYS_CTL);
+                ndelay(500);
+                dnet_writel(bp, 0, SYS_CTL);
+                handled = 1;
+        }
+
+        if (int_current & DNET_INTR_SRC_RX_CMDFIFOAF) {
+                if (napi_schedule_prep(&bp->napi)) {
+                        /*
+                         * There's no point taking any more interrupts
+                         * until we have processed the buffers
+                         */
+                        /* Disable Rx interrupts and schedule NAPI poll */
+                        int_enable = dnet_readl(bp, INTR_ENB);
+                        int_enable &= ~DNET_INTR_SRC_RX_CMDFIFOAF;
+                        dnet_writel(bp, int_enable, INTR_ENB);
+                        __napi_schedule(&bp->napi);
+                }
+                handled = 1;
+        }
+
+        if (!handled)
+                pr_debug("%s: irq %x remains\n", __func__, int_current);
+
+        spin_unlock_irqrestore(&bp->lock, flags);
+
+        return IRQ_RETVAL(handled);
+}
+
+#ifdef DEBUG
+static inline void dnet_print_skb(struct sk_buff *skb)
+{
+        int k;
+        printk(KERN_DEBUG PFX "data:");
+        for (k = 0; k < skb->len; k++)
+                printk(" %02x", (unsigned int)skb->data[k]);
+        printk("\n");
+}
+#else
+#define dnet_print_skb(skb)     do {} while (0)
+#endif
+
+static int dnet_start_xmit(struct sk_buff *skb, struct net_device *dev)
+{
+
+        struct dnet *bp = netdev_priv(dev);
+        u32 tx_status, irq_enable;
+        unsigned int len, i, tx_cmd, wrsz;
+        unsigned long flags;
+        unsigned int *bufp;
+
+        tx_status = dnet_readl(bp, TX_STATUS);
+
+        pr_debug("start_xmit: len %u head %p data %p\n",
+               skb->len, skb->head, skb->data);
+        dnet_print_skb(skb);
+
+        /* frame size (words) */
+        len = (skb->len + 3) >> 2;
+
+        spin_lock_irqsave(&bp->lock, flags);
+
+        tx_status = dnet_readl(bp, TX_STATUS);
+
+        bufp = (unsigned int *)(((unsigned long) skb->data) & ~0x3UL);
+        wrsz = (u32) skb->len + 3;
+        wrsz += ((unsigned long) skb->data) & 0x3;
+        wrsz >>= 2;
+        tx_cmd = ((((unsigned long)(skb->data)) & 0x03) << 16) | (u32) skb->len;
+
+        /* check if there is enough room for the current frame */
+        if (wrsz < (DNET_FIFO_SIZE - dnet_readl(bp, TX_FIFO_WCNT))) {
+                for (i = 0; i < wrsz; i++)
+                        dnet_writel(bp, *bufp++, TX_DATA_FIFO);
+
+                /*
+                 * inform MAC that a packet's written and ready to be
+                 * shipped out
+                 */
+                dnet_writel(bp, tx_cmd, TX_LEN_FIFO);
+        }
+
+        if (dnet_readl(bp, TX_FIFO_WCNT) > DNET_FIFO_TX_DATA_AF_TH) {
+                netif_stop_queue(dev);
+                tx_status = dnet_readl(bp, INTR_SRC);
+                irq_enable = dnet_readl(bp, INTR_ENB);
+                irq_enable |= DNET_INTR_ENB_TX_FIFOAE;
+                dnet_writel(bp, irq_enable, INTR_ENB);
+        }
+
+        /* free the buffer */
+        dev_kfree_skb(skb);
+
+        spin_unlock_irqrestore(&bp->lock, flags);
+
+        dev->trans_start = jiffies;
+
+        return 0;
+}
+
+static void dnet_reset_hw(struct dnet *bp)
+{
+        /* put ts_mac in IDLE state i.e. disable rx/tx */
+        dnet_writew_mac(bp, DNET_INTERNAL_MODE_REG, DNET_INTERNAL_MODE_FCEN);
+
+        /*
+         * RX FIFO almost full threshold: only cmd FIFO almost full is
+         * implemented for RX side
+         */
+        dnet_writel(bp, DNET_FIFO_RX_CMD_AF_TH, RX_FIFO_TH);
+        /*
+         * TX FIFO almost empty threshold: only data FIFO almost empty
+         * is implemented for TX side
+         */
+        dnet_writel(bp, DNET_FIFO_TX_DATA_AE_TH, TX_FIFO_TH);
+
+        /* flush rx/tx fifos */
+        dnet_writel(bp, DNET_SYS_CTL_RXFIFOFLUSH | DNET_SYS_CTL_TXFIFOFLUSH,
+                        SYS_CTL);
+        msleep(1);
+        dnet_writel(bp, 0, SYS_CTL);
+}
+
+static void dnet_init_hw(struct dnet *bp)
+{
+        u32 config;
+
+        dnet_reset_hw(bp);
+        __dnet_set_hwaddr(bp);
+
+        config = dnet_readw_mac(bp, DNET_INTERNAL_RXTX_CONTROL_REG);
+
+        if (bp->dev->flags & IFF_PROMISC)
+                /* Copy All Frames */
+                config |= DNET_INTERNAL_RXTX_CONTROL_ENPROMISC;
+        if (!(bp->dev->flags & IFF_BROADCAST))
+                /* No BroadCast */
+                config |= DNET_INTERNAL_RXTX_CONTROL_RXMULTICAST;
+
+        config |= DNET_INTERNAL_RXTX_CONTROL_RXPAUSE |
+            DNET_INTERNAL_RXTX_CONTROL_RXBROADCAST |
+            DNET_INTERNAL_RXTX_CONTROL_DROPCONTROL |
+            DNET_INTERNAL_RXTX_CONTROL_DISCFXFCS;
+
+        dnet_writew_mac(bp, DNET_INTERNAL_RXTX_CONTROL_REG, config);
+
+        /* clear irq before enabling them */
+        config = dnet_readl(bp, INTR_SRC);
+
+        /* enable RX/TX interrupt, recv packet ready interrupt */
+        dnet_writel(bp, DNET_INTR_ENB_GLOBAL_ENABLE | DNET_INTR_ENB_RX_SUMMARY |
+                        DNET_INTR_ENB_TX_SUMMARY | DNET_INTR_ENB_RX_FIFOERR |
+                        DNET_INTR_ENB_RX_ERROR | DNET_INTR_ENB_RX_FIFOFULL |
+                        DNET_INTR_ENB_TX_FIFOFULL | DNET_INTR_ENB_TX_DISCFRM |
+                        DNET_INTR_ENB_RX_PKTRDY, INTR_ENB);
+}
+
+static int dnet_open(struct net_device *dev)
+{
+        struct dnet *bp = netdev_priv(dev);
+
+        /* if the phy is not yet register, retry later */
+        if (!bp->phy_dev)
+                return -EAGAIN;
+
+        if (!is_valid_ether_addr(dev->dev_addr))
+                return -EADDRNOTAVAIL;
+
+        napi_enable(&bp->napi);
+        dnet_init_hw(bp);
+
+        phy_start_aneg(bp->phy_dev);
+
+        /* schedule a link state check */
+        phy_start(bp->phy_dev);
+
+        netif_start_queue(dev);
+
+        return 0;
+}
+
+static int dnet_close(struct net_device *dev)
+{
+        struct dnet *bp = netdev_priv(dev);
+
+        netif_stop_queue(dev);
+        napi_disable(&bp->napi);
+
+        if (bp->phy_dev)
+                phy_stop(bp->phy_dev);
+
+        dnet_reset_hw(bp);
+        netif_carrier_off(dev);
+
+        return 0;
+}
+
+static inline void dnet_print_pretty_hwstats(struct dnet_stats *hwstat)
+{
+        pr_debug("%s\n", __func__);
+        pr_debug("----------------------------- RX statistics "
+                 "-------------------------------\n");
+        pr_debug("RX_PKT_IGNR_CNT %-8x\n", hwstat->rx_pkt_ignr);
+        pr_debug("RX_LEN_CHK_ERR_CNT %-8x\n", hwstat->rx_len_chk_err);
+        pr_debug("RX_LNG_FRM_CNT %-8x\n", hwstat->rx_lng_frm);
+        pr_debug("RX_SHRT_FRM_CNT %-8x\n", hwstat->rx_shrt_frm);
+        pr_debug("RX_IPG_VIOL_CNT %-8x\n", hwstat->rx_ipg_viol);
+        pr_debug("RX_CRC_ERR_CNT %-8x\n", hwstat->rx_crc_err);
+        pr_debug("RX_OK_PKT_CNT %-8x\n", hwstat->rx_ok_pkt);
+        pr_debug("RX_CTL_FRM_CNT %-8x\n", hwstat->rx_ctl_frm);
+        pr_debug("RX_PAUSE_FRM_CNT %-8x\n", hwstat->rx_pause_frm);
+        pr_debug("RX_MULTICAST_CNT %-8x\n", hwstat->rx_multicast);
+        pr_debug("RX_BROADCAST_CNT %-8x\n", hwstat->rx_broadcast);
+        pr_debug("RX_VLAN_TAG_CNT %-8x\n", hwstat->rx_vlan_tag);
+        pr_debug("RX_PRE_SHRINK_CNT %-8x\n", hwstat->rx_pre_shrink);
+        pr_debug("RX_DRIB_NIB_CNT %-8x\n", hwstat->rx_drib_nib);
+        pr_debug("RX_UNSUP_OPCD_CNT %-8x\n", hwstat->rx_unsup_opcd);
+        pr_debug("RX_BYTE_CNT %-8x\n", hwstat->rx_byte);
+        pr_debug("----------------------------- TX statistics "
+                 "-------------------------------\n");
+        pr_debug("TX_UNICAST_CNT %-8x\n", hwstat->tx_unicast);
+        pr_debug("TX_PAUSE_FRM_CNT %-8x\n", hwstat->tx_pause_frm);
+        pr_debug("TX_MULTICAST_CNT %-8x\n", hwstat->tx_multicast);
+        pr_debug("TX_BRDCAST_CNT %-8x\n", hwstat->tx_brdcast);
+        pr_debug("TX_VLAN_TAG_CNT %-8x\n", hwstat->tx_vlan_tag);
+        pr_debug("TX_BAD_FCS_CNT %-8x\n", hwstat->tx_bad_fcs);
+        pr_debug("TX_JUMBO_CNT %-8x\n", hwstat->tx_jumbo);
+        pr_debug("TX_BYTE_CNT %-8x\n", hwstat->tx_byte);
+}
+
+static struct net_device_stats *dnet_get_stats(struct net_device *dev)
+{
+
+        struct dnet *bp = netdev_priv(dev);
+        struct net_device_stats *nstat = &dev->stats;
+        struct dnet_stats *hwstat = &bp->hw_stats;
+
+        /* read stats from hardware */
+        dnet_update_stats(bp);
+
+        /* Convert HW stats into netdevice stats */
+        nstat->rx_errors = (hwstat->rx_len_chk_err +
+                            hwstat->rx_lng_frm + hwstat->rx_shrt_frm +
+                            /* ignore IGP violation error
+                            hwstat->rx_ipg_viol + */
+                            hwstat->rx_crc_err +
+                            hwstat->rx_pre_shrink +
+                            hwstat->rx_drib_nib + hwstat->rx_unsup_opcd);
+        nstat->tx_errors = hwstat->tx_bad_fcs;
+        nstat->rx_length_errors = (hwstat->rx_len_chk_err +
+                                   hwstat->rx_lng_frm +
+                                   hwstat->rx_shrt_frm + hwstat->rx_pre_shrink);
+        nstat->rx_crc_errors = hwstat->rx_crc_err;
+        nstat->rx_frame_errors = hwstat->rx_pre_shrink + hwstat->rx_drib_nib;
+        nstat->rx_packets = hwstat->rx_ok_pkt;
+        nstat->tx_packets = (hwstat->tx_unicast +
+                             hwstat->tx_multicast + hwstat->tx_brdcast);
+        nstat->rx_bytes = hwstat->rx_byte;
+        nstat->tx_bytes = hwstat->tx_byte;
+        nstat->multicast = hwstat->rx_multicast;
+        nstat->rx_missed_errors = hwstat->rx_pkt_ignr;
+
+        dnet_print_pretty_hwstats(hwstat);
+
+        return nstat;
+}
+
+static int dnet_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
+{
+        struct dnet *bp = netdev_priv(dev);
+        struct phy_device *phydev = bp->phy_dev;
+
+        if (!phydev)
+                return -ENODEV;
+
+        return phy_ethtool_gset(phydev, cmd);
+}
+
+static int dnet_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
+{
+        struct dnet *bp = netdev_priv(dev);
+        struct phy_device *phydev = bp->phy_dev;
+
+        if (!phydev)
+                return -ENODEV;
+
+        return phy_ethtool_sset(phydev, cmd);
+}
+
+static int dnet_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
+{
+        struct dnet *bp = netdev_priv(dev);
+        struct phy_device *phydev = bp->phy_dev;
+
+        if (!netif_running(dev))
+                return -EINVAL;
+
+        if (!phydev)
+                return -ENODEV;
+
+        return phy_mii_ioctl(phydev, if_mii(rq), cmd);
+}
+
+static void dnet_get_drvinfo(struct net_device *dev,
+                             struct ethtool_drvinfo *info)
+{
+        strcpy(info->driver, DRV_NAME);
+        strcpy(info->version, DRV_VERSION);
+        strcpy(info->bus_info, "0");
+}
+
+static const struct ethtool_ops dnet_ethtool_ops = {
+        .get_settings           = dnet_get_settings,
+        .set_settings           = dnet_set_settings,
+        .get_drvinfo            = dnet_get_drvinfo,
+        .get_link               = ethtool_op_get_link,
+};
+
+static const struct net_device_ops dnet_netdev_ops = {
+        .ndo_open               = dnet_open,
+        .ndo_stop               = dnet_close,
+        .ndo_get_stats          = dnet_get_stats,
+        .ndo_start_xmit         = dnet_start_xmit,
+        .ndo_do_ioctl           = dnet_ioctl,
+        .ndo_set_mac_address    = eth_mac_addr,
+        .ndo_validate_addr      = eth_validate_addr,
+        .ndo_change_mtu         = eth_change_mtu,
+};
+
+static int __devinit dnet_probe(struct platform_device *pdev)
+{
+        struct resource *res;
+        struct net_device *dev;
+        struct dnet *bp;
+        struct phy_device *phydev;
+        int err = -ENXIO;
+        unsigned int mem_base, mem_size, irq;
+
+        res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (!res) {
+                dev_err(&pdev->dev, "no mmio resource defined\n");
+                goto err_out;
+        }
+        mem_base = res->start;
+        mem_size = resource_size(res);
+        irq = platform_get_irq(pdev, 0);
+
+        if (!request_mem_region(mem_base, mem_size, DRV_NAME)) {
+                dev_err(&pdev->dev, "no memory region available\n");
+                err = -EBUSY;
+                goto err_out;
+        }
+
+        err = -ENOMEM;
+        dev = alloc_etherdev(sizeof(*bp));
+        if (!dev) {
+                dev_err(&pdev->dev, "etherdev alloc failed, aborting.\n");
+                goto err_out;
+        }
+
+        /* TODO: Actually, we have some interesting features... */
+        dev->features |= 0;
+
+        bp = netdev_priv(dev);
+        bp->dev = dev;
+
+        SET_NETDEV_DEV(dev, &pdev->dev);
+
+        spin_lock_init(&bp->lock);
+
+        bp->regs = ioremap(mem_base, mem_size);
+        if (!bp->regs) {
+                dev_err(&pdev->dev, "failed to map registers, aborting.\n");
+                err = -ENOMEM;
+                goto err_out_free_dev;
+        }
+
+        dev->irq = irq;
+        err = request_irq(dev->irq, dnet_interrupt, 0, DRV_NAME, dev);
+        if (err) {
+                dev_err(&pdev->dev, "Unable to request IRQ %d (error %d)\n",
+                       irq, err);
+                goto err_out_iounmap;
+        }
+
+        dev->netdev_ops = &dnet_netdev_ops;
+        netif_napi_add(dev, &bp->napi, dnet_poll, 64);
+        dev->ethtool_ops = &dnet_ethtool_ops;
+
+        dev->base_addr = (unsigned long)bp->regs;
+
+        bp->capabilities = dnet_readl(bp, VERCAPS) & DNET_CAPS_MASK;
+
+        dnet_get_hwaddr(bp);
+
+        if (!is_valid_ether_addr(dev->dev_addr)) {
+                /* choose a random ethernet address */
+                random_ether_addr(dev->dev_addr);
+                __dnet_set_hwaddr(bp);
+        }
+
+        err = register_netdev(dev);
+        if (err) {
+                dev_err(&pdev->dev, "Cannot register net device, aborting.\n");
+                goto err_out_free_irq;
+        }
+
+        /* register the PHY board fixup (for Marvell 88E1111) */
+        err = phy_register_fixup_for_uid(0x01410cc0, 0xfffffff0,
+                                         dnet_phy_marvell_fixup);
+        /* we can live without it, so just issue a warning */
+        if (err)
+                dev_warn(&pdev->dev, "Cannot register PHY board fixup.\n");
+
+        if (dnet_mii_init(bp) != 0)
+                goto err_out_unregister_netdev;
+
+        dev_info(&pdev->dev, "Dave DNET at 0x%p (0x%08x) irq %d %pM\n",
+               bp->regs, mem_base, dev->irq, dev->dev_addr);
+        dev_info(&pdev->dev, "has %smdio, %sirq, %sgigabit, %sdma \n",
+               (bp->capabilities & DNET_HAS_MDIO) ? "" : "no ",
+               (bp->capabilities & DNET_HAS_IRQ) ? "" : "no ",
+               (bp->capabilities & DNET_HAS_GIGABIT) ? "" : "no ",
+               (bp->capabilities & DNET_HAS_DMA) ? "" : "no ");
+        phydev = bp->phy_dev;
+        dev_info(&pdev->dev, "attached PHY driver [%s] "
+               "(mii_bus:phy_addr=%s, irq=%d)\n",
+               phydev->drv->name, dev_name(&phydev->dev), phydev->irq);
+
+        return 0;
+
+err_out_unregister_netdev:
+        unregister_netdev(dev);
+err_out_free_irq:
+        free_irq(dev->irq, dev);
+err_out_iounmap:
+        iounmap(bp->regs);
+err_out_free_dev:
+        free_netdev(dev);
+err_out:
+        return err;
+}
+
+static int __devexit dnet_remove(struct platform_device *pdev)
+{
+
+        struct net_device *dev;
+        struct dnet *bp;
+
+        dev = platform_get_drvdata(pdev);
+
+        if (dev) {
+                bp = netdev_priv(dev);
+                if (bp->phy_dev)
+                        phy_disconnect(bp->phy_dev);
+                mdiobus_unregister(bp->mii_bus);
+                kfree(bp->mii_bus->irq);
+                mdiobus_free(bp->mii_bus);
+                unregister_netdev(dev);
+                free_irq(dev->irq, dev);
+                iounmap(bp->regs);
+                free_netdev(dev);
+        }
+
+        return 0;
+}
+
+static struct platform_driver dnet_driver = {
+        .probe          = dnet_probe,
+        .remove         = __devexit_p(dnet_remove),
+        .driver         = {
+                .name           = "dnet",
+        },
+};
+
+static int __init dnet_init(void)
+{
+        return platform_driver_register(&dnet_driver);
+}
+
+static void __exit dnet_exit(void)
+{
+        platform_driver_unregister(&dnet_driver);
+}
+
+module_init(dnet_init);
+module_exit(dnet_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("Dave DNET Ethernet driver");
+MODULE_AUTHOR("Ilya Yanok <yanok@emcraft.com>, "
+              "Matteo Vit <matteo.vit@dave.eu>");
diff --git a/drivers/net/dnet.h b/drivers/net/dnet.h
new file mode 100644
index 000000000000..37f5b30fa78b
--- /dev/null
+++ b/drivers/net/dnet.h
@@ -0,0 +1,225 @@
+/*
+ * Dave DNET Ethernet Controller driver
+ *
+ * Copyright (C) 2008 Dave S.r.l. <www.dave.eu>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#ifndef _DNET_H
+#define _DNET_H
+
+#define DRV_NAME                "dnet"
+#define DRV_VERSION             "0.9.1"
+#define PFX                             DRV_NAME ": "
+
+/* Register access macros */
+#define dnet_writel(port, value, reg)   \
+        writel((value), (port)->regs + DNET_##reg)
+#define dnet_readl(port, reg)   readl((port)->regs + DNET_##reg)
+
+/* ALL DNET FIFO REGISTERS */
+#define DNET_RX_LEN_FIFO                0x000   /* RX_LEN_FIFO */
+#define DNET_RX_DATA_FIFO               0x004   /* RX_DATA_FIFO */
+#define DNET_TX_LEN_FIFO                0x008   /* TX_LEN_FIFO */
+#define DNET_TX_DATA_FIFO               0x00C   /* TX_DATA_FIFO */
+
+/* ALL DNET CONTROL/STATUS REGISTERS OFFSETS */
+#define DNET_VERCAPS                    0x100   /* VERCAPS */
+#define DNET_INTR_SRC                   0x104   /* INTR_SRC */
+#define DNET_INTR_ENB                   0x108   /* INTR_ENB */
+#define DNET_RX_STATUS                  0x10C   /* RX_STATUS */
+#define DNET_TX_STATUS                  0x110   /* TX_STATUS */
+#define DNET_RX_FRAMES_CNT              0x114   /* RX_FRAMES_CNT */
+#define DNET_TX_FRAMES_CNT              0x118   /* TX_FRAMES_CNT */
+#define DNET_RX_FIFO_TH                 0x11C   /* RX_FIFO_TH */
+#define DNET_TX_FIFO_TH                 0x120   /* TX_FIFO_TH */
+#define DNET_SYS_CTL                    0x124   /* SYS_CTL */
+#define DNET_PAUSE_TMR                  0x128   /* PAUSE_TMR */
+#define DNET_RX_FIFO_WCNT               0x12C   /* RX_FIFO_WCNT */
+#define DNET_TX_FIFO_WCNT               0x130   /* TX_FIFO_WCNT */
+
+/* ALL DNET MAC REGISTERS */
+#define DNET_MACREG_DATA                0x200   /* Mac-Reg Data */
+#define DNET_MACREG_ADDR                0x204   /* Mac-Reg Addr  */
+
+/* ALL DNET RX STATISTICS COUNTERS  */
+#define DNET_RX_PKT_IGNR_CNT            0x300
+#define DNET_RX_LEN_CHK_ERR_CNT         0x304
+#define DNET_RX_LNG_FRM_CNT             0x308
+#define DNET_RX_SHRT_FRM_CNT            0x30C
+#define DNET_RX_IPG_VIOL_CNT            0x310
+#define DNET_RX_CRC_ERR_CNT             0x314
+#define DNET_RX_OK_PKT_CNT              0x318
+#define DNET_RX_CTL_FRM_CNT             0x31C
+#define DNET_RX_PAUSE_FRM_CNT           0x320
+#define DNET_RX_MULTICAST_CNT           0x324
+#define DNET_RX_BROADCAST_CNT           0x328
+#define DNET_RX_VLAN_TAG_CNT            0x32C
+#define DNET_RX_PRE_SHRINK_CNT          0x330
+#define DNET_RX_DRIB_NIB_CNT            0x334
+#define DNET_RX_UNSUP_OPCD_CNT          0x338
+#define DNET_RX_BYTE_CNT                0x33C
+
+/* DNET TX STATISTICS COUNTERS */
+#define DNET_TX_UNICAST_CNT             0x400
+#define DNET_TX_PAUSE_FRM_CNT           0x404
+#define DNET_TX_MULTICAST_CNT           0x408
+#define DNET_TX_BRDCAST_CNT             0x40C
+#define DNET_TX_VLAN_TAG_CNT            0x410
+#define DNET_TX_BAD_FCS_CNT             0x414
+#define DNET_TX_JUMBO_CNT               0x418
+#define DNET_TX_BYTE_CNT                0x41C
+
+/* SOME INTERNAL MAC-CORE REGISTER */
+#define DNET_INTERNAL_MODE_REG          0x0
+#define DNET_INTERNAL_RXTX_CONTROL_REG  0x2
+#define DNET_INTERNAL_MAX_PKT_SIZE_REG  0x4
+#define DNET_INTERNAL_IGP_REG           0x8
+#define DNET_INTERNAL_MAC_ADDR_0_REG    0xa
+#define DNET_INTERNAL_MAC_ADDR_1_REG    0xc
+#define DNET_INTERNAL_MAC_ADDR_2_REG    0xe
+#define DNET_INTERNAL_TX_RX_STS_REG     0x12
+#define DNET_INTERNAL_GMII_MNG_CTL_REG  0x14
+#define DNET_INTERNAL_GMII_MNG_DAT_REG  0x16
+
+#define DNET_INTERNAL_GMII_MNG_CMD_FIN  (1 << 14)
+
+#define DNET_INTERNAL_WRITE             (1 << 31)
+
+/* MAC-CORE REGISTER FIELDS */
+
+/* MAC-CORE MODE REGISTER FIELDS */
+#define DNET_INTERNAL_MODE_GBITEN                       (1 << 0)
+#define DNET_INTERNAL_MODE_FCEN                         (1 << 1)
+#define DNET_INTERNAL_MODE_RXEN                         (1 << 2)
+#define DNET_INTERNAL_MODE_TXEN                         (1 << 3)
+
+/* MAC-CORE RXTX CONTROL REGISTER FIELDS */
+#define DNET_INTERNAL_RXTX_CONTROL_RXSHORTFRAME         (1 << 8)
+#define DNET_INTERNAL_RXTX_CONTROL_RXBROADCAST          (1 << 7)
+#define DNET_INTERNAL_RXTX_CONTROL_RXMULTICAST          (1 << 4)
+#define DNET_INTERNAL_RXTX_CONTROL_RXPAUSE              (1 << 3)
+#define DNET_INTERNAL_RXTX_CONTROL_DISTXFCS             (1 << 2)
+#define DNET_INTERNAL_RXTX_CONTROL_DISCFXFCS            (1 << 1)
+#define DNET_INTERNAL_RXTX_CONTROL_ENPROMISC            (1 << 0)
+#define DNET_INTERNAL_RXTX_CONTROL_DROPCONTROL          (1 << 6)
+#define DNET_INTERNAL_RXTX_CONTROL_ENABLEHALFDUP        (1 << 5)
+
+/* SYSTEM CONTROL REGISTER FIELDS */
+#define DNET_SYS_CTL_IGNORENEXTPKT                      (1 << 0)
+#define DNET_SYS_CTL_SENDPAUSE                          (1 << 2)
+#define DNET_SYS_CTL_RXFIFOFLUSH                        (1 << 3)
+#define DNET_SYS_CTL_TXFIFOFLUSH                        (1 << 4)
+
+/* TX STATUS REGISTER FIELDS */
+#define DNET_TX_STATUS_FIFO_ALMOST_EMPTY                (1 << 2)
+#define DNET_TX_STATUS_FIFO_ALMOST_FULL                 (1 << 1)
+
+/* INTERRUPT SOURCE REGISTER FIELDS */
+#define DNET_INTR_SRC_TX_PKTSENT                        (1 << 0)
+#define DNET_INTR_SRC_TX_FIFOAF                         (1 << 1)
+#define DNET_INTR_SRC_TX_FIFOAE                         (1 << 2)
+#define DNET_INTR_SRC_TX_DISCFRM                        (1 << 3)
+#define DNET_INTR_SRC_TX_FIFOFULL                       (1 << 4)
+#define DNET_INTR_SRC_RX_CMDFIFOAF                      (1 << 8)
+#define DNET_INTR_SRC_RX_CMDFIFOFF                      (1 << 9)
+#define DNET_INTR_SRC_RX_DATAFIFOFF                     (1 << 10)
+#define DNET_INTR_SRC_TX_SUMMARY                        (1 << 16)
+#define DNET_INTR_SRC_RX_SUMMARY                        (1 << 17)
+#define DNET_INTR_SRC_PHY                               (1 << 19)
+
+/* INTERRUPT ENABLE REGISTER FIELDS */
+#define DNET_INTR_ENB_TX_PKTSENT                        (1 << 0)
+#define DNET_INTR_ENB_TX_FIFOAF                         (1 << 1)
+#define DNET_INTR_ENB_TX_FIFOAE                         (1 << 2)
+#define DNET_INTR_ENB_TX_DISCFRM                        (1 << 3)
+#define DNET_INTR_ENB_TX_FIFOFULL                       (1 << 4)
+#define DNET_INTR_ENB_RX_PKTRDY                         (1 << 8)
+#define DNET_INTR_ENB_RX_FIFOAF                         (1 << 9)
+#define DNET_INTR_ENB_RX_FIFOERR                        (1 << 10)
+#define DNET_INTR_ENB_RX_ERROR                          (1 << 11)
+#define DNET_INTR_ENB_RX_FIFOFULL                       (1 << 12)
+#define DNET_INTR_ENB_RX_FIFOAE                         (1 << 13)
+#define DNET_INTR_ENB_TX_SUMMARY                        (1 << 16)
+#define DNET_INTR_ENB_RX_SUMMARY                        (1 << 17)
+#define DNET_INTR_ENB_GLOBAL_ENABLE                     (1 << 18)
+
+/* default values:
+ * almost empty = less than one full sized ethernet frame (no jumbo) inside
+ * the fifo almost full = can write less than one full sized ethernet frame
+ * (no jumbo) inside the fifo
+ */
+#define DNET_CFG_TX_FIFO_FULL_THRES     25
+#define DNET_CFG_RX_FIFO_FULL_THRES     20
+
+/*
+ * Capabilities. Used by the driver to know the capabilities that the ethernet
+ * controller inside the FPGA have.
+ */
+
+#define DNET_HAS_MDIO           (1 << 0)
+#define DNET_HAS_IRQ            (1 << 1)
+#define DNET_HAS_GIGABIT        (1 << 2)
+#define DNET_HAS_DMA            (1 << 3)
+
+#define DNET_HAS_MII            (1 << 4) /* or GMII */
+#define DNET_HAS_RMII           (1 << 5) /* or RGMII */
+
+#define DNET_CAPS_MASK          0xFFFF
+
+#define DNET_FIFO_SIZE          1024 /* 1K x 32 bit */
+#define DNET_FIFO_TX_DATA_AF_TH (DNET_FIFO_SIZE - 384) /* 384 = 1536 / 4 */
+#define DNET_FIFO_TX_DATA_AE_TH 384
+
+#define DNET_FIFO_RX_CMD_AF_TH  (1 << 16) /* just one frame inside the FIFO */
+
+/*
+ * Hardware-collected statistics.
+ */
+struct dnet_stats {
+        u32 rx_pkt_ignr;
+        u32 rx_len_chk_err;
+        u32 rx_lng_frm;
+        u32 rx_shrt_frm;
+        u32 rx_ipg_viol;
+        u32 rx_crc_err;
+        u32 rx_ok_pkt;
+        u32 rx_ctl_frm;
+        u32 rx_pause_frm;
+        u32 rx_multicast;
+        u32 rx_broadcast;
+        u32 rx_vlan_tag;
+        u32 rx_pre_shrink;
+        u32 rx_drib_nib;
+        u32 rx_unsup_opcd;
+        u32 rx_byte;
+        u32 tx_unicast;
+        u32 tx_pause_frm;
+        u32 tx_multicast;
+        u32 tx_brdcast;
+        u32 tx_vlan_tag;
+        u32 tx_bad_fcs;
+        u32 tx_jumbo;
+        u32 tx_byte;
+};
+
+struct dnet {
+        void __iomem                    *regs;
+        spinlock_t                      lock;
+        struct platform_device          *pdev;
+        struct net_device               *dev;
+        struct dnet_stats               hw_stats;
+        unsigned int                    capabilities; /* read from FPGA */
+        struct napi_struct              napi;
+
+        /* PHY stuff */
+        struct mii_bus                  *mii_bus;
+        struct phy_device               *phy_dev;
+        unsigned int                    link;
+        unsigned int                    speed;
+        unsigned int                    duplex;
+};
+
+#endif /* _DNET_H */
diff --git a/drivers/net/e1000/e1000_main.c b/drivers/net/e1000/e1000_main.c
index 26474c92193f..6bd63cc67b3e 100644
--- a/drivers/net/e1000/e1000_main.c
+++ b/drivers/net/e1000/e1000_main.c
@@ -31,7 +31,7 @@
 
 char e1000_driver_name[] = "e1000";
 static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
-#define DRV_VERSION "7.3.20-k3-NAPI"
+#define DRV_VERSION "7.3.21-k3-NAPI"
 const char e1000_driver_version[] = DRV_VERSION;
 static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
 
@@ -940,7 +940,7 @@ static int __devinit e1000_probe(struct pci_dev *pdev,
                 err = pci_enable_device(pdev);
         } else {
                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
-                err = pci_enable_device(pdev);
+                err = pci_enable_device_mem(pdev);
         }
         if (err)
                 return err;
@@ -3712,7 +3712,7 @@ static irqreturn_t e1000_intr(int irq, void *data)
         struct e1000_hw *hw = &adapter->hw;
         u32 rctl, icr = er32(ICR);
 
-        if (unlikely(!icr))
+        if (unlikely((!icr) || test_bit(__E1000_RESETTING, &adapter->flags)))
                 return IRQ_NONE;  /* Not our interrupt */
 
         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c
index 5b910cf63740..b8251e827059 100644
--- a/drivers/net/forcedeth.c
+++ b/drivers/net/forcedeth.c
@@ -6011,9 +6011,20 @@ static void nv_shutdown(struct pci_dev *pdev)
         if (netif_running(dev))
                 nv_close(dev);
 
-        nv_restore_mac_addr(pdev);
+        /*
+         * Restore the MAC so a kernel started by kexec won't get confused.
+         * If we really go for poweroff, we must not restore the MAC,
+         * otherwise the MAC for WOL will be reversed at least on some boards.
+         */
+        if (system_state != SYSTEM_POWER_OFF) {
+                nv_restore_mac_addr(pdev);
+        }
 
         pci_disable_device(pdev);
+        /*
+         * Apparently it is not possible to reinitialise from D3 hot,
+         * only put the device into D3 if we really go for poweroff.
+         */
         if (system_state == SYSTEM_POWER_OFF) {
                 if (pci_enable_wake(pdev, PCI_D3cold, np->wolenabled))
                         pci_enable_wake(pdev, PCI_D3hot, np->wolenabled);
diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c
index 3f7eab42aef1..9831b3f408aa 100644
--- a/drivers/net/gianfar.c
+++ b/drivers/net/gianfar.c
@@ -351,6 +351,9 @@ static int gfar_probe(struct of_device *ofdev,
         /* Reset MAC layer */
         gfar_write(&priv->regs->maccfg1, MACCFG1_SOFT_RESET);
 
+        /* We need to delay at least 3 TX clocks */
+        udelay(2);
+
         tempval = (MACCFG1_TX_FLOW | MACCFG1_RX_FLOW);
         gfar_write(&priv->regs->maccfg1, tempval);
 
@@ -1281,7 +1284,7 @@ static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev)
         spin_lock_irqsave(&priv->txlock, flags);
 
         /* check if there is space to queue this packet */
-        if (nr_frags > priv->num_txbdfree) {
+        if ((nr_frags+1) > priv->num_txbdfree) {
                 /* no space, stop the queue */
                 netif_stop_queue(dev);
                 dev->stats.tx_fifo_errors++;
@@ -1626,6 +1629,12 @@ static void gfar_schedule_cleanup(struct net_device *dev)
         if (netif_rx_schedule_prep(&priv->napi)) {
                 gfar_write(&priv->regs->imask, IMASK_RTX_DISABLED);
                 __netif_rx_schedule(&priv->napi);
+        } else {
+                /*
+                 * Clear IEVENT, so interrupts aren't called again
+                 * because of the packets that have already arrived.
+                 */
+                gfar_write(&priv->regs->ievent, IEVENT_RTX_MASK);
         }
 
         spin_unlock(&priv->rxlock);
diff --git a/drivers/net/gianfar.h b/drivers/net/gianfar.h
index b1a83344acc7..eaa86897f5c3 100644
--- a/drivers/net/gianfar.h
+++ b/drivers/net/gianfar.h
@@ -312,7 +312,7 @@ extern const char gfar_driver_version[];
 #define ATTRELI_EI(x) (x)
 
 #define BD_LFLAG(flags) ((flags) << 16)
-#define BD_LENGTH_MASK          0x00ff
+#define BD_LENGTH_MASK          0x0000ffff
 
 /* TxBD status field bits */
 #define TXBD_READY              0x8000
diff --git a/drivers/net/gianfar_mii.c b/drivers/net/gianfar_mii.c
index f3706e415b45..f49a426ad681 100644
--- a/drivers/net/gianfar_mii.c
+++ b/drivers/net/gianfar_mii.c
@@ -234,6 +234,8 @@ static int gfar_mdio_probe(struct of_device *ofdev,
         if (NULL == new_bus)
                 return -ENOMEM;
 
+        device_init_wakeup(&ofdev->dev, 1);
+
         new_bus->name = "Gianfar MII Bus",
         new_bus->read = &gfar_mdio_read,
         new_bus->write = &gfar_mdio_write,
diff --git a/drivers/net/hp-plus.c b/drivers/net/hp-plus.c
index 5e070f446635..0486cbe01adb 100644
--- a/drivers/net/hp-plus.c
+++ b/drivers/net/hp-plus.c
@@ -467,7 +467,7 @@ init_module(void)
                         if (this_dev != 0) break; /* only autoprobe 1st one */
                         printk(KERN_NOTICE "hp-plus.c: Presently autoprobing (not recommended) for a single card.\n");
                 }
-                dev = alloc_ei_netdev();
+                dev = alloc_eip_netdev();
                 if (!dev)
                         break;
                 dev->irq = irq[this_dev];
diff --git a/drivers/net/ibm_newemac/core.c b/drivers/net/ibm_newemac/core.c
index 87a706694fb3..6fd7aa61736e 100644
--- a/drivers/net/ibm_newemac/core.c
+++ b/drivers/net/ibm_newemac/core.c
@@ -2594,6 +2594,9 @@ static int __devinit emac_init_config(struct emac_instance *dev)
                 if (of_device_is_compatible(np, "ibm,emac-460ex") ||
                     of_device_is_compatible(np, "ibm,emac-460gt"))
                         dev->features |= EMAC_FTR_460EX_PHY_CLK_FIX;
+                if (of_device_is_compatible(np, "ibm,emac-405ex") ||
+                    of_device_is_compatible(np, "ibm,emac-405exr"))
+                        dev->features |= EMAC_FTR_440EP_PHY_CLK_FIX;
         } else if (of_device_is_compatible(np, "ibm,emac4")) {
                 dev->features |= EMAC_FTR_EMAC4;
                 if (of_device_is_compatible(np, "ibm,emac-440gx"))
diff --git a/drivers/net/ibm_newemac/phy.c b/drivers/net/ibm_newemac/phy.c
index c40cd8df2212..ac9d964e59ec 100644
--- a/drivers/net/ibm_newemac/phy.c
+++ b/drivers/net/ibm_newemac/phy.c
@@ -60,7 +60,7 @@ int emac_mii_reset_phy(struct mii_phy *phy)
 
         udelay(300);
 
-        while (limit--) {
+        while (--limit) {
                 val = phy_read(phy, MII_BMCR);
                 if (val >= 0 && (val & BMCR_RESET) == 0)
                         break;
@@ -84,7 +84,7 @@ int emac_mii_reset_gpcs(struct mii_phy *phy)
 
         udelay(300);
 
-        while (limit--) {
+        while (--limit) {
                 val = gpcs_phy_read(phy, MII_BMCR);
                 if (val >= 0 && (val & BMCR_RESET) == 0)
                         break;
diff --git a/drivers/net/igb/e1000_82575.c b/drivers/net/igb/e1000_82575.c
index f5e2e7235fcb..13ca73f96ec6 100644
--- a/drivers/net/igb/e1000_82575.c
+++ b/drivers/net/igb/e1000_82575.c
@@ -699,11 +699,18 @@ static s32 igb_check_for_link_82575(struct e1000_hw *hw)
 
         /* SGMII link check is done through the PCS register. */
         if ((hw->phy.media_type != e1000_media_type_copper) ||
-            (igb_sgmii_active_82575(hw)))
+            (igb_sgmii_active_82575(hw))) {
                 ret_val = igb_get_pcs_speed_and_duplex_82575(hw, &speed,
                                                              &duplex);
-        else
+                /*
+                 * Use this flag to determine if link needs to be checked or
+                 * not.  If  we have link clear the flag so that we do not
+                 * continue to check for link.
+                 */
+                hw->mac.get_link_status = !hw->mac.serdes_has_link;
+        } else {
                 ret_val = igb_check_for_copper_link(hw);
+        }
 
         return ret_val;
 }
diff --git a/drivers/net/igb/igb.h b/drivers/net/igb/igb.h
index 5a27825cc48a..aebef8e48e76 100644
--- a/drivers/net/igb/igb.h
+++ b/drivers/net/igb/igb.h
@@ -300,11 +300,10 @@ struct igb_adapter {
 
 #define IGB_FLAG_HAS_MSI           (1 << 0)
 #define IGB_FLAG_MSI_ENABLE        (1 << 1)
-#define IGB_FLAG_HAS_DCA           (1 << 2)
-#define IGB_FLAG_DCA_ENABLED       (1 << 3)
-#define IGB_FLAG_IN_NETPOLL        (1 << 5)
-#define IGB_FLAG_QUAD_PORT_A       (1 << 6)
-#define IGB_FLAG_NEED_CTX_IDX      (1 << 7)
+#define IGB_FLAG_DCA_ENABLED       (1 << 2)
+#define IGB_FLAG_IN_NETPOLL        (1 << 3)
+#define IGB_FLAG_QUAD_PORT_A       (1 << 4)
+#define IGB_FLAG_NEED_CTX_IDX      (1 << 5)
 
 enum e1000_state_t {
         __IGB_TESTING,
diff --git a/drivers/net/igb/igb_main.c b/drivers/net/igb/igb_main.c
index b82b0fb2056c..9dd13ad12ce4 100644
--- a/drivers/net/igb/igb_main.c
+++ b/drivers/net/igb/igb_main.c
@@ -206,10 +206,11 @@ static int __init igb_init_module(void)
 
         global_quad_port_a = 0;
 
-        ret = pci_register_driver(&igb_driver);
 #ifdef CONFIG_IGB_DCA
         dca_register_notify(&dca_notifier);
 #endif
+
+        ret = pci_register_driver(&igb_driver);
         return ret;
 }
 
@@ -1022,11 +1023,10 @@ static int __devinit igb_probe(struct pci_dev *pdev,
         struct net_device *netdev;
         struct igb_adapter *adapter;
         struct e1000_hw *hw;
-        struct pci_dev *us_dev;
         const struct e1000_info *ei = igb_info_tbl[ent->driver_data];
         unsigned long mmio_start, mmio_len;
-        int i, err, pci_using_dac, pos;
-        u16 eeprom_data = 0, state = 0;
+        int i, err, pci_using_dac;
+        u16 eeprom_data = 0;
         u16 eeprom_apme_mask = IGB_EEPROM_APME;
         u32 part_num;
         int bars, need_ioport;
@@ -1061,27 +1061,6 @@ static int __devinit igb_probe(struct pci_dev *pdev,
                 }
         }
 
-        /* 82575 requires that the pci-e link partner disable the L0s state */
-        switch (pdev->device) {
-        case E1000_DEV_ID_82575EB_COPPER:
-        case E1000_DEV_ID_82575EB_FIBER_SERDES:
-        case E1000_DEV_ID_82575GB_QUAD_COPPER:
-                us_dev = pdev->bus->self;
-                pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
-                if (pos) {
-                        pci_read_config_word(us_dev, pos + PCI_EXP_LNKCTL,
-                                             &state);
-                        state &= ~PCIE_LINK_STATE_L0S;
-                        pci_write_config_word(us_dev, pos + PCI_EXP_LNKCTL,
-                                              state);
-                        dev_info(&pdev->dev,
-                                 "Disabling ASPM L0s upstream switch port %s\n",
-                                 pci_name(us_dev));
-                }
-        default:
-                break;
-        }
-
         err = pci_request_selected_regions(pdev, bars, igb_driver_name);
         if (err)
                 goto err_pci_reg;
@@ -1156,11 +1135,10 @@ static int __devinit igb_probe(struct pci_dev *pdev,
 
         /* set flags */
         switch (hw->mac.type) {
-        case e1000_82576:
         case e1000_82575:
-                adapter->flags |= IGB_FLAG_HAS_DCA;
                 adapter->flags |= IGB_FLAG_NEED_CTX_IDX;
                 break;
+        case e1000_82576:
         default:
                 break;
         }
@@ -1310,8 +1288,7 @@ static int __devinit igb_probe(struct pci_dev *pdev,
                 goto err_register;
 
 #ifdef CONFIG_IGB_DCA
-        if ((adapter->flags & IGB_FLAG_HAS_DCA) &&
-            (dca_add_requester(&pdev->dev) == 0)) {
+        if (dca_add_requester(&pdev->dev) == 0) {
                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
                 dev_info(&pdev->dev, "DCA enabled\n");
                 /* Always use CB2 mode, difference is masked
@@ -1835,11 +1812,11 @@ static void igb_setup_rctl(struct igb_adapter *adapter)
         rctl |= E1000_RCTL_SECRC;
 
         /*
-         * disable store bad packets, long packet enable, and clear size bits.
+         * disable store bad packets and clear size bits.
          */
-        rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_LPE | E1000_RCTL_SZ_256);
+        rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
 
-        if (adapter->netdev->mtu > ETH_DATA_LEN)
+        /* enable LPE when to prevent packets larger than max_frame_size */
                 rctl |= E1000_RCTL_LPE;
 
         /* Setup buffer sizes */
@@ -1865,7 +1842,7 @@ static void igb_setup_rctl(struct igb_adapter *adapter)
          */
         /* allocations using alloc_page take too long for regular MTU
          * so only enable packet split for jumbo frames */
-        if (rctl & E1000_RCTL_LPE) {
+        if (adapter->netdev->mtu > ETH_DATA_LEN) {
                 adapter->rx_ps_hdr_size = IGB_RXBUFFER_128;
                 srrctl |= adapter->rx_ps_hdr_size <<
                          E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
@@ -3473,19 +3450,16 @@ static int __igb_notify_dca(struct device *dev, void *data)
         struct e1000_hw *hw = &adapter->hw;
         unsigned long event = *(unsigned long *)data;
 
-        if (!(adapter->flags & IGB_FLAG_HAS_DCA))
-                goto out;
-
         switch (event) {
         case DCA_PROVIDER_ADD:
                 /* if already enabled, don't do it again */
                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
                         break;
-                adapter->flags |= IGB_FLAG_DCA_ENABLED;
                 /* Always use CB2 mode, difference is masked
                  * in the CB driver. */
                 wr32(E1000_DCA_CTRL, 2);
                 if (dca_add_requester(dev) == 0) {
+                        adapter->flags |= IGB_FLAG_DCA_ENABLED;
                         dev_info(&adapter->pdev->dev, "DCA enabled\n");
                         igb_setup_dca(adapter);
                         break;
@@ -3502,7 +3476,7 @@ static int __igb_notify_dca(struct device *dev, void *data)
                 }
                 break;
         }
-out:
+
         return 0;
 }
 
diff --git a/drivers/net/irda/mcs7780.c b/drivers/net/irda/mcs7780.c
index 7eafdca19f34..85e88daab21a 100644
--- a/drivers/net/irda/mcs7780.c
+++ b/drivers/net/irda/mcs7780.c
@@ -585,7 +585,7 @@ static int mcs_speed_change(struct mcs_cb *mcs)
                 mcs_get_reg(mcs, MCS_RESV_REG, &rval);
         } while(cnt++ < 100 && (rval & MCS_IRINTX));
 
-        if(cnt >= 100) {
+        if (cnt > 100) {
                 IRDA_ERROR("unable to change speed\n");
                 ret = -EIO;
                 goto error;
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index d2f4d5f508b7..5d364a96e35d 100644
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -3973,6 +3973,7 @@ static const struct net_device_ops ixgbe_netdev_ops = {
         .ndo_stop               = ixgbe_close,
         .ndo_start_xmit         = ixgbe_xmit_frame,
         .ndo_get_stats          = ixgbe_get_stats,
+        .ndo_set_rx_mode        = ixgbe_set_rx_mode,
         .ndo_set_multicast_list = ixgbe_set_rx_mode,
         .ndo_validate_addr      = eth_validate_addr,
         .ndo_set_mac_address    = ixgbe_set_mac,
diff --git a/drivers/net/jme.c b/drivers/net/jme.c
index 08b34051c646..a6e1a35a13cb 100644
--- a/drivers/net/jme.c
+++ b/drivers/net/jme.c
@@ -957,13 +957,14 @@ jme_process_receive(struct jme_adapter *jme, int limit)
                 goto out_inc;
 
         i = atomic_read(&rxring->next_to_clean);
-        while (limit-- > 0) {
+        while (limit > 0) {
                 rxdesc = rxring->desc;
                 rxdesc += i;
 
                 if ((rxdesc->descwb.flags & cpu_to_le16(RXWBFLAG_OWN)) ||
                 !(rxdesc->descwb.desccnt & RXWBDCNT_WBCPL))
                         goto out;
+                --limit;
 
                 desccnt = rxdesc->descwb.desccnt & RXWBDCNT_DCNT;
 
diff --git a/drivers/net/mv643xx_eth.c b/drivers/net/mv643xx_eth.c
index 5f31bbb614af..b0bc3bc18e9c 100644
--- a/drivers/net/mv643xx_eth.c
+++ b/drivers/net/mv643xx_eth.c
@@ -1175,7 +1175,7 @@ static void mib_counters_update(struct mv643xx_eth_private *mp)
 {
         struct mib_counters *p = &mp->mib_counters;
 
-        spin_lock(&mp->mib_counters_lock);
+        spin_lock_bh(&mp->mib_counters_lock);
         p->good_octets_received += mib_read(mp, 0x00);
         p->good_octets_received += (u64)mib_read(mp, 0x04) << 32;
         p->bad_octets_received += mib_read(mp, 0x08);
@@ -1208,7 +1208,7 @@ static void mib_counters_update(struct mv643xx_eth_private *mp)
         p->bad_crc_event += mib_read(mp, 0x74);
         p->collision += mib_read(mp, 0x78);
         p->late_collision += mib_read(mp, 0x7c);
-        spin_unlock(&mp->mib_counters_lock);
+        spin_unlock_bh(&mp->mib_counters_lock);
 
         mod_timer(&mp->mib_counters_timer, jiffies + 30 * HZ);
 }
@@ -1575,7 +1575,7 @@ oom:
                 return;
         }
 
-        mc_spec = kmalloc(0x200, GFP_KERNEL);
+        mc_spec = kmalloc(0x200, GFP_ATOMIC);
         if (mc_spec == NULL)
                 goto oom;
         mc_other = mc_spec + (0x100 >> 2);
@@ -2030,11 +2030,6 @@ static void port_start(struct mv643xx_eth_private *mp)
         }
 
         /*
-         * Add configured unicast address to address filter table.
-         */
-        mv643xx_eth_program_unicast_filter(mp->dev);
-
-        /*
          * Receive all unmatched unicast, TCP, UDP, BPDU and broadcast
          * frames to RX queue #0, and include the pseudo-header when
          * calculating receive checksums.
@@ -2047,6 +2042,11 @@ static void port_start(struct mv643xx_eth_private *mp)
         wrlp(mp, PORT_CONFIG_EXT, 0x00000000);
 
         /*
+         * Add configured unicast addresses to address filter table.
+         */
+        mv643xx_eth_program_unicast_filter(mp->dev);
+
+        /*
          * Enable the receive queues.
          */
         for (i = 0; i < mp->rxq_count; i++) {
@@ -2216,8 +2216,6 @@ static int mv643xx_eth_stop(struct net_device *dev)
         wrlp(mp, INT_MASK, 0x00000000);
         rdlp(mp, INT_MASK);
 
-        del_timer_sync(&mp->mib_counters_timer);
-
         napi_disable(&mp->napi);
 
         del_timer_sync(&mp->rx_oom);
@@ -2229,6 +2227,7 @@ static int mv643xx_eth_stop(struct net_device *dev)
         port_reset(mp);
         mv643xx_eth_get_stats(dev);
         mib_counters_update(mp);
+        del_timer_sync(&mp->mib_counters_timer);
 
         skb_queue_purge(&mp->rx_recycle);
 
diff --git a/drivers/net/netxen/netxen_nic.h b/drivers/net/netxen/netxen_nic.h
index a75a31005fd3..1ff066b2281a 100644
--- a/drivers/net/netxen/netxen_nic.h
+++ b/drivers/net/netxen/netxen_nic.h
@@ -210,7 +210,7 @@
 #define MAX_CMD_DESCRIPTORS_HOST        1024
 #define MAX_RCV_DESCRIPTORS_1G          2048
 #define MAX_RCV_DESCRIPTORS_10G         4096
-#define MAX_JUMBO_RCV_DESCRIPTORS       512
+#define MAX_JUMBO_RCV_DESCRIPTORS       1024
 #define MAX_LRO_RCV_DESCRIPTORS         8
 #define MAX_RCVSTATUS_DESCRIPTORS       MAX_RCV_DESCRIPTORS
 #define MAX_JUMBO_RCV_DESC      MAX_JUMBO_RCV_DESCRIPTORS
@@ -1203,7 +1203,7 @@ typedef struct {
 #define NETXEN_IS_MSI_FAMILY(adapter) \
         ((adapter)->flags & (NETXEN_NIC_MSI_ENABLED | NETXEN_NIC_MSIX_ENABLED))
 
-#define MSIX_ENTRIES_PER_ADAPTER        8
+#define MSIX_ENTRIES_PER_ADAPTER        1
 #define NETXEN_MSIX_TBL_SPACE           8192
 #define NETXEN_PCI_REG_MSIX_TBL         0x44
 
@@ -1595,7 +1595,6 @@ dma_watchdog_wakeup(struct netxen_adapter *adapter)
 }
 
 
-int netxen_is_flash_supported(struct netxen_adapter *adapter);
 int netxen_get_flash_mac_addr(struct netxen_adapter *adapter, __le64 *mac);
 int netxen_p3_get_mac_addr(struct netxen_adapter *adapter, __le64 *mac);
 extern void netxen_change_ringparam(struct netxen_adapter *adapter);
diff --git a/drivers/net/netxen/netxen_nic_hw.c b/drivers/net/netxen/netxen_nic_hw.c
index 821cff68b3f3..7fea77088108 100644
--- a/drivers/net/netxen/netxen_nic_hw.c
+++ b/drivers/net/netxen/netxen_nic_hw.c
@@ -706,28 +706,6 @@ int netxen_nic_change_mtu(struct net_device *netdev, int mtu)
         return rc;
 }
 
-int netxen_is_flash_supported(struct netxen_adapter *adapter)
-{
-        const int locs[] = { 0, 0x4, 0x100, 0x4000, 0x4128 };
-        int addr, val01, val02, i, j;
-
-        /* if the flash size less than 4Mb, make huge war cry and die */
-        for (j = 1; j < 4; j++) {
-                addr = j * NETXEN_NIC_WINDOW_MARGIN;
-                for (i = 0; i < ARRAY_SIZE(locs); i++) {
-                        if (netxen_rom_fast_read(adapter, locs[i], &val01) == 0
-                            && netxen_rom_fast_read(adapter, (addr + locs[i]),
-                                                    &val02) == 0) {
-                                if (val01 == val02)
-                                        return -1;
-                        } else
-                                return -1;
-                }
-        }
-
-        return 0;
-}
-
 static int netxen_get_flash_block(struct netxen_adapter *adapter, int base,
                                   int size, __le32 * buf)
 {
diff --git a/drivers/net/netxen/netxen_nic_init.c b/drivers/net/netxen/netxen_nic_init.c
index ca7c8d8050c9..ffd37bea1628 100644
--- a/drivers/net/netxen/netxen_nic_init.c
+++ b/drivers/net/netxen/netxen_nic_init.c
@@ -947,8 +947,10 @@ int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
         }
         for (i = 0; i < n; i++) {
                 if (netxen_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
-                netxen_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0)
+                netxen_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
+                        kfree(buf);
                         return -EIO;
+                }
 
                 buf[i].addr = addr;
                 buf[i].data = val;
diff --git a/drivers/net/netxen/netxen_nic_main.c b/drivers/net/netxen/netxen_nic_main.c
index 645d384fe87e..c172b6e24a96 100644
--- a/drivers/net/netxen/netxen_nic_main.c
+++ b/drivers/net/netxen/netxen_nic_main.c
@@ -76,6 +76,7 @@ static void netxen_nic_poll_controller(struct net_device *netdev);
 #endif
 static irqreturn_t netxen_intr(int irq, void *data);
 static irqreturn_t netxen_msi_intr(int irq, void *data);
+static irqreturn_t netxen_msix_intr(int irq, void *data);
 
 /*  PCI Device ID Table  */
 #define ENTRY(device) \
@@ -200,9 +201,9 @@ static int nx_set_dma_mask(struct netxen_adapter *adapter, uint8_t revision_id)
                 adapter->pci_using_dac = 1;
                 return 0;
         }
+set_32_bit_mask:
 #endif /* CONFIG_IA64 */
 
-set_32_bit_mask:
         err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
         if (!err)
                 err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
@@ -371,67 +372,6 @@ static void netxen_set_port_mode(struct netxen_adapter *adapter)
         }
 }
 
-#define PCI_CAP_ID_GEN  0x10
-
-static void netxen_pcie_strap_init(struct netxen_adapter *adapter)
-{
-        u32 pdevfuncsave;
-        u32 c8c9value = 0;
-        u32 chicken = 0;
-        u32 control = 0;
-        int i, pos;
-        struct pci_dev *pdev;
-
-        pdev = adapter->pdev;
-
-        adapter->hw_read_wx(adapter,
-                NETXEN_PCIE_REG(PCIE_CHICKEN3), &chicken, 4);
-        /* clear chicken3.25:24 */
-        chicken &= 0xFCFFFFFF;
-        /*
-         * if gen1 and B0, set F1020 - if gen 2, do nothing
-         * if gen2 set to F1000
-         */
-        pos = pci_find_capability(pdev, PCI_CAP_ID_GEN);
-        if (pos == 0xC0) {
-                pci_read_config_dword(pdev, pos + 0x10, &control);
-                if ((control & 0x000F0000) != 0x00020000) {
-                        /*  set chicken3.24 if gen1 */
-                        chicken |= 0x01000000;
-                }
-                printk(KERN_INFO "%s Gen2 strapping detected\n",
-                                netxen_nic_driver_name);
-                c8c9value = 0xF1000;
-        } else {
-                /* set chicken3.24 if gen1 */
-                chicken |= 0x01000000;
-                printk(KERN_INFO "%s Gen1 strapping detected\n",
-                                netxen_nic_driver_name);
-                if (adapter->ahw.revision_id == NX_P3_B0)
-                        c8c9value = 0xF1020;
-                else
-                        c8c9value = 0;
-
-        }
-        adapter->hw_write_wx(adapter,
-                NETXEN_PCIE_REG(PCIE_CHICKEN3), &chicken, 4);
-
-        if (!c8c9value)
-                return;
-
-        pdevfuncsave = pdev->devfn;
-        if (pdevfuncsave & 0x07)
-                return;
-
-        for (i = 0; i < 8; i++) {
-                pci_read_config_dword(pdev, pos + 8, &control);
-                pci_read_config_dword(pdev, pos + 8, &control);
-                pci_write_config_dword(pdev, pos + 8, c8c9value);
-                pdev->devfn++;
-        }
-        pdev->devfn = pdevfuncsave;
-}
-
 static void netxen_set_msix_bit(struct pci_dev *pdev, int enable)
 {
         u32 control;
@@ -465,9 +405,6 @@ netxen_read_mac_addr(struct netxen_adapter *adapter)
         struct net_device *netdev = adapter->netdev;
         struct pci_dev *pdev = adapter->pdev;
 
-        if (netxen_is_flash_supported(adapter) != 0)
-                return -EIO;
-
         if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
                 if (netxen_p3_get_mac_addr(adapter, &mac_addr) != 0)
                         return -EIO;
@@ -648,7 +585,12 @@ netxen_nic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
                 adapter->pci_mem_read = netxen_nic_pci_mem_read_2M;
                 adapter->pci_mem_write = netxen_nic_pci_mem_write_2M;
 
-                mem_ptr0 = ioremap(mem_base, mem_len);
+                mem_ptr0 = pci_ioremap_bar(pdev, 0);
+                if (mem_ptr0 == NULL) {
+                        dev_err(&pdev->dev, "failed to map PCI bar 0\n");
+                        return -EIO;
+                }
+
                 pci_len0 = mem_len;
                 first_page_group_start = 0;
                 first_page_group_end   = 0;
@@ -811,9 +753,6 @@ netxen_nic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
                 }
                 netxen_load_firmware(adapter);
 
-                if (NX_IS_REVISION_P3(revision_id))
-                        netxen_pcie_strap_init(adapter);
-
                 if (NX_IS_REVISION_P2(revision_id)) {
 
                         /* Initialize multicast addr pool owners */
@@ -858,9 +797,12 @@ netxen_nic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
          * See if the firmware gave us a virtual-physical port mapping.
          */
         adapter->physical_port = adapter->portnum;
-        i = adapter->pci_read_normalize(adapter, CRB_V2P(adapter->portnum));
-        if (i != 0x55555555)
-                adapter->physical_port = i;
+        if (adapter->fw_major < 4) {
+                i = adapter->pci_read_normalize(adapter,
+                                CRB_V2P(adapter->portnum));
+                if (i != 0x55555555)
+                        adapter->physical_port = i;
+        }
 
         adapter->flags &= ~(NETXEN_NIC_MSI_ENABLED | NETXEN_NIC_MSIX_ENABLED);
 
@@ -1084,7 +1026,9 @@ static int netxen_nic_open(struct net_device *netdev)
                         for (ring = 0; ring < adapter->max_rds_rings; ring++)
                                 netxen_post_rx_buffers(adapter, ctx, ring);
                 }
-                if (NETXEN_IS_MSI_FAMILY(adapter))
+                if (adapter->flags & NETXEN_NIC_MSIX_ENABLED)
+                        handler = netxen_msix_intr;
+                else if (adapter->flags & NETXEN_NIC_MSI_ENABLED)
                         handler = netxen_msi_intr;
                 else {
                         flags |= IRQF_SHARED;
@@ -1612,6 +1556,14 @@ static irqreturn_t netxen_msi_intr(int irq, void *data)
         return IRQ_HANDLED;
 }
 
+static irqreturn_t netxen_msix_intr(int irq, void *data)
+{
+        struct netxen_adapter *adapter = data;
+
+        napi_schedule(&adapter->napi);
+        return IRQ_HANDLED;
+}
+
 static int netxen_nic_poll(struct napi_struct *napi, int budget)
 {
         struct netxen_adapter *adapter = container_of(napi, struct netxen_adapter, napi);
diff --git a/drivers/net/pcmcia/3c574_cs.c b/drivers/net/pcmcia/3c574_cs.c
index e5cb6b1f0ebd..2404a838b1fe 100644
--- a/drivers/net/pcmcia/3c574_cs.c
+++ b/drivers/net/pcmcia/3c574_cs.c
@@ -1035,7 +1035,8 @@ static int el3_rx(struct net_device *dev, int worklimit)
         DEBUG(3, "%s: in rx_packet(), status %4.4x, rx_status %4.4x.\n",
                   dev->name, inw(ioaddr+EL3_STATUS), inw(ioaddr+RxStatus));
         while (!((rx_status = inw(ioaddr + RxStatus)) & 0x8000) &&
-                   (--worklimit >= 0)) {
+                        worklimit > 0) {
+                worklimit--;
                 if (rx_status & 0x4000) { /* Error, update stats. */
                         short error = rx_status & 0x3800;
                         dev->stats.rx_errors++;
diff --git a/drivers/net/pcmcia/3c589_cs.c b/drivers/net/pcmcia/3c589_cs.c
index 73ecc657999d..1e01b8a6dbf3 100644
--- a/drivers/net/pcmcia/3c589_cs.c
+++ b/drivers/net/pcmcia/3c589_cs.c
@@ -857,7 +857,8 @@ static int el3_rx(struct net_device *dev)
     DEBUG(3, "%s: in rx_packet(), status %4.4x, rx_status %4.4x.\n",
           dev->name, inw(ioaddr+EL3_STATUS), inw(ioaddr+RX_STATUS));
     while (!((rx_status = inw(ioaddr + RX_STATUS)) & 0x8000) &&
-           (--worklimit >= 0)) {
+                    worklimit > 0) {
+        worklimit--;
         if (rx_status & 0x4000) { /* Error, update stats. */
             short error = rx_status & 0x3800;
             dev->stats.rx_errors++;
diff --git a/drivers/net/pcmcia/pcnet_cs.c b/drivers/net/pcmcia/pcnet_cs.c
index c38ed777f0a8..a6999403f37b 100644
--- a/drivers/net/pcmcia/pcnet_cs.c
+++ b/drivers/net/pcmcia/pcnet_cs.c
@@ -586,7 +586,7 @@ static int pcnet_config(struct pcmcia_device *link)
     }
 
     if ((link->conf.ConfigBase == 0x03c0)
-        && (link->manf_id == 0x149) && (link->card_id = 0xc1ab)) {
+        && (link->manf_id == 0x149) && (link->card_id == 0xc1ab)) {
         printk(KERN_INFO "pcnet_cs: this is an AX88190 card!\n");
         printk(KERN_INFO "pcnet_cs: use axnet_cs instead.\n");
         goto failed;
diff --git a/drivers/net/phy/mdio-gpio.c b/drivers/net/phy/mdio-gpio.c
index a439ebeb4319..af28ff7ae176 100644
--- a/drivers/net/phy/mdio-gpio.c
+++ b/drivers/net/phy/mdio-gpio.c
@@ -125,6 +125,8 @@ static int __devinit mdio_gpio_bus_init(struct device *dev,
         if (gpio_request(bitbang->mdio, "mdio"))
                 goto out_free_mdc;
 
+        gpio_direction_output(bitbang->mdc, 0);
+
         dev_set_drvdata(dev, new_bus);
 
         ret = mdiobus_register(new_bus);
diff --git a/drivers/net/ps3_gelic_wireless.c b/drivers/net/ps3_gelic_wireless.c
index ec2314246682..335da4831ab3 100644
--- a/drivers/net/ps3_gelic_wireless.c
+++ b/drivers/net/ps3_gelic_wireless.c
@@ -2168,7 +2168,7 @@ static void gelic_wl_connected_event(struct gelic_wl_info *wl,
                 complete(&wl->assoc_done);
                 netif_carrier_on(port_to_netdev(wl_port(wl)));
         } else
-                pr_debug("%s: event %#lx under wpa\n",
+                pr_debug("%s: event %#llx under wpa\n",
                                  __func__, event);
 }
 
diff --git a/drivers/net/qlge/qlge.h b/drivers/net/qlge/qlge.h
index c1dadadfab18..aff9c5fec738 100644
--- a/drivers/net/qlge/qlge.h
+++ b/drivers/net/qlge/qlge.h
@@ -787,12 +787,12 @@ struct mbox_params {
 
 struct flash_params {
         u8 dev_id_str[4];
-        u16 size;
-        u16 csum;
-        u16 ver;
-        u16 sub_dev_id;
+        __le16 size;
+        __le16 csum;
+        __le16 ver;
+        __le16 sub_dev_id;
         u8 mac_addr[6];
-        u16 res;
+        __le16 res;
 };
 
 
@@ -927,6 +927,7 @@ struct ib_mac_iocb_rsp {
         u8 flags1;
 #define IB_MAC_IOCB_RSP_OI      0x01    /* Overide intr delay */
 #define IB_MAC_IOCB_RSP_I       0x02    /* Disble Intr Generation */
+#define IB_MAC_CSUM_ERR_MASK 0x1c       /* A mask to use for csum errs */
 #define IB_MAC_IOCB_RSP_TE      0x04    /* Checksum error */
 #define IB_MAC_IOCB_RSP_NU      0x08    /* No checksum rcvd */
 #define IB_MAC_IOCB_RSP_IE      0x10    /* IPv4 checksum error */
diff --git a/drivers/net/qlge/qlge_main.c b/drivers/net/qlge/qlge_main.c
index 45421c8b6010..91191f761fba 100644
--- a/drivers/net/qlge/qlge_main.c
+++ b/drivers/net/qlge/qlge_main.c
@@ -641,7 +641,7 @@ static void ql_enable_all_completion_interrupts(struct ql_adapter *qdev)
 
 }
 
-static int ql_read_flash_word(struct ql_adapter *qdev, int offset, u32 *data)
+static int ql_read_flash_word(struct ql_adapter *qdev, int offset, __le32 *data)
 {
         int status = 0;
         /* wait for reg to come ready */
@@ -656,8 +656,11 @@ static int ql_read_flash_word(struct ql_adapter *qdev, int offset, u32 *data)
                         FLASH_ADDR, FLASH_ADDR_RDY, FLASH_ADDR_ERR);
         if (status)
                 goto exit;
-        /* get the data */
-        *data = ql_read32(qdev, FLASH_DATA);
+         /* This data is stored on flash as an array of
+         * __le32.  Since ql_read32() returns cpu endian
+         * we need to swap it back.
+         */
+        *data = cpu_to_le32(ql_read32(qdev, FLASH_DATA));
 exit:
         return status;
 }
@@ -666,13 +669,20 @@ static int ql_get_flash_params(struct ql_adapter *qdev)
 {
         int i;
         int status;
-        u32 *p = (u32 *)&qdev->flash;
+        __le32 *p = (__le32 *)&qdev->flash;
+        u32 offset = 0;
+
+        /* Second function's parameters follow the first
+         * function's.
+         */
+        if (qdev->func)
+                offset = sizeof(qdev->flash) / sizeof(u32);
 
         if (ql_sem_spinlock(qdev, SEM_FLASH_MASK))
                 return -ETIMEDOUT;
 
         for (i = 0; i < sizeof(qdev->flash) / sizeof(u32); i++, p++) {
-                status = ql_read_flash_word(qdev, i, p);
+                status = ql_read_flash_word(qdev, i+offset, p);
                 if (status) {
                         QPRINTK(qdev, IFUP, ERR, "Error reading flash.\n");
                         goto exit;
@@ -888,6 +898,7 @@ static void ql_update_lbq(struct ql_adapter *qdev, struct rx_ring *rx_ring)
                                         lbq_desc->index);
                                 lbq_desc->p.lbq_page = alloc_page(GFP_ATOMIC);
                                 if (lbq_desc->p.lbq_page == NULL) {
+                                        rx_ring->lbq_clean_idx = clean_idx;
                                         QPRINTK(qdev, RX_STATUS, ERR,
                                                 "Couldn't get a page.\n");
                                         return;
@@ -897,6 +908,9 @@ static void ql_update_lbq(struct ql_adapter *qdev, struct rx_ring *rx_ring)
                                                    0, PAGE_SIZE,
                                                    PCI_DMA_FROMDEVICE);
                                 if (pci_dma_mapping_error(qdev->pdev, map)) {
+                                        rx_ring->lbq_clean_idx = clean_idx;
+                                        put_page(lbq_desc->p.lbq_page);
+                                        lbq_desc->p.lbq_page = NULL;
                                         QPRINTK(qdev, RX_STATUS, ERR,
                                                 "PCI mapping failed.\n");
                                         return;
@@ -958,6 +972,8 @@ static void ql_update_sbq(struct ql_adapter *qdev, struct rx_ring *rx_ring)
                                 if (pci_dma_mapping_error(qdev->pdev, map)) {
                                         QPRINTK(qdev, IFUP, ERR, "PCI mapping failed.\n");
                                         rx_ring->sbq_clean_idx = clean_idx;
+                                        dev_kfree_skb_any(sbq_desc->p.skb);
+                                        sbq_desc->p.skb = NULL;
                                         return;
                                 }
                                 pci_unmap_addr_set(sbq_desc, mapaddr, map);
@@ -1420,18 +1436,32 @@ static void ql_process_mac_rx_intr(struct ql_adapter *qdev,
         if (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_P) {
                 QPRINTK(qdev, RX_STATUS, DEBUG, "Promiscuous Packet.\n");
         }
-        if (ib_mac_rsp->flags1 & (IB_MAC_IOCB_RSP_IE | IB_MAC_IOCB_RSP_TE)) {
-                QPRINTK(qdev, RX_STATUS, ERR,
-                        "Bad checksum for this %s packet.\n",
-                        ((ib_mac_rsp->
-                          flags2 & IB_MAC_IOCB_RSP_T) ? "TCP" : "UDP"));
-                skb->ip_summed = CHECKSUM_NONE;
-        } else if (qdev->rx_csum &&
-                   ((ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_T) ||
-                    ((ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_U) &&
-                     !(ib_mac_rsp->flags1 & IB_MAC_IOCB_RSP_NU)))) {
-                QPRINTK(qdev, RX_STATUS, DEBUG, "RX checksum done!\n");
-                skb->ip_summed = CHECKSUM_UNNECESSARY;
+
+        skb->protocol = eth_type_trans(skb, ndev);
+        skb->ip_summed = CHECKSUM_NONE;
+
+        /* If rx checksum is on, and there are no
+         * csum or frame errors.
+         */
+        if (qdev->rx_csum &&
+                !(ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_ERR_MASK) &&
+                !(ib_mac_rsp->flags1 & IB_MAC_CSUM_ERR_MASK)) {
+                /* TCP frame. */
+                if (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_T) {
+                        QPRINTK(qdev, RX_STATUS, DEBUG,
+                                        "TCP checksum done!\n");
+                        skb->ip_summed = CHECKSUM_UNNECESSARY;
+                } else if ((ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_U) &&
+                                (ib_mac_rsp->flags3 & IB_MAC_IOCB_RSP_V4)) {
+                /* Unfragmented ipv4 UDP frame. */
+                        struct iphdr *iph = (struct iphdr *) skb->data;
+                        if (!(iph->frag_off &
+                                cpu_to_be16(IP_MF|IP_OFFSET))) {
+                                skb->ip_summed = CHECKSUM_UNNECESSARY;
+                                QPRINTK(qdev, RX_STATUS, DEBUG,
+                                                "TCP checksum done!\n");
+                        }
+                }
         }
         qdev->stats.rx_packets++;
         qdev->stats.rx_bytes += skb->len;
@@ -1439,12 +1469,12 @@ static void ql_process_mac_rx_intr(struct ql_adapter *qdev,
         if (qdev->vlgrp && (ib_mac_rsp->flags2 & IB_MAC_IOCB_RSP_V)) {
                 QPRINTK(qdev, RX_STATUS, DEBUG,
                         "Passing a VLAN packet upstream.\n");
-                vlan_hwaccel_rx(skb, qdev->vlgrp,
+                vlan_hwaccel_receive_skb(skb, qdev->vlgrp,
                                 le16_to_cpu(ib_mac_rsp->vlan_id));
         } else {
                 QPRINTK(qdev, RX_STATUS, DEBUG,
                         "Passing a normal packet upstream.\n");
-                netif_rx(skb);
+                netif_receive_skb(skb);
         }
 }
 
@@ -1501,6 +1531,11 @@ void ql_queue_asic_error(struct ql_adapter *qdev)
         netif_stop_queue(qdev->ndev);
         netif_carrier_off(qdev->ndev);
         ql_disable_interrupts(qdev);
+        /* Clear adapter up bit to signal the recovery
+         * process that it shouldn't kill the reset worker
+         * thread
+         */
+        clear_bit(QL_ADAPTER_UP, &qdev->flags);
         queue_delayed_work(qdev->workqueue, &qdev->asic_reset_work, 0);
 }
 
@@ -1906,6 +1941,9 @@ static int qlge_send(struct sk_buff *skb, struct net_device *ndev)
 
         tx_ring = &qdev->tx_ring[tx_ring_idx];
 
+        if (skb_padto(skb, ETH_ZLEN))
+                return NETDEV_TX_OK;
+
         if (unlikely(atomic_read(&tx_ring->tx_count) < 2)) {
                 QPRINTK(qdev, TX_QUEUED, INFO,
                         "%s: shutting down tx queue %d du to lack of resources.\n",
@@ -1917,10 +1955,6 @@ static int qlge_send(struct sk_buff *skb, struct net_device *ndev)
         tx_ring_desc = &tx_ring->q[tx_ring->prod_idx];
         mac_iocb_ptr = tx_ring_desc->queue_entry;
         memset((void *)mac_iocb_ptr, 0, sizeof(mac_iocb_ptr));
-        if (ql_map_send(qdev, mac_iocb_ptr, skb, tx_ring_desc) != NETDEV_TX_OK) {
-                QPRINTK(qdev, TX_QUEUED, ERR, "Could not map the segments.\n");
-                return NETDEV_TX_BUSY;
-        }
 
         mac_iocb_ptr->opcode = OPCODE_OB_MAC_IOCB;
         mac_iocb_ptr->tid = tx_ring_desc->index;
@@ -1946,6 +1980,12 @@ static int qlge_send(struct sk_buff *skb, struct net_device *ndev)
                 ql_hw_csum_setup(skb,
                                  (struct ob_mac_tso_iocb_req *)mac_iocb_ptr);
         }
+        if (ql_map_send(qdev, mac_iocb_ptr, skb, tx_ring_desc) !=
+                        NETDEV_TX_OK) {
+                QPRINTK(qdev, TX_QUEUED, ERR,
+                                "Could not map the segments.\n");
+                return NETDEV_TX_BUSY;
+        }
         QL_DUMP_OB_MAC_IOCB(mac_iocb_ptr);
         tx_ring->prod_idx++;
         if (tx_ring->prod_idx == tx_ring->wq_len)
@@ -2863,8 +2903,8 @@ static int ql_start_rss(struct ql_adapter *qdev)
         /*
          * Fill out the Indirection Table.
          */
-        for (i = 0; i < 32; i++)
-                hash_id[i] = i & 1;
+        for (i = 0; i < 256; i++)
+                hash_id[i] = i & (qdev->rss_ring_count - 1);
 
         /*
          * Random values for the IPv6 and IPv4 Hash Keys.
@@ -2947,9 +2987,9 @@ static int ql_adapter_initialize(struct ql_adapter *qdev)
         mask = value << 16;
         ql_write32(qdev, SYS, mask | value);
 
-        /* Set the default queue. */
-        value = NIC_RCV_CFG_DFQ;
-        mask = NIC_RCV_CFG_DFQ_MASK;
+        /* Set the default queue, and VLAN behavior. */
+        value = NIC_RCV_CFG_DFQ | NIC_RCV_CFG_RV;
+        mask = NIC_RCV_CFG_DFQ_MASK | (NIC_RCV_CFG_RV << 16);
         ql_write32(qdev, NIC_RCV_CFG, (mask | value));
 
         /* Set the MPI interrupt to enabled. */
@@ -3090,7 +3130,11 @@ static int ql_adapter_down(struct ql_adapter *qdev)
         netif_stop_queue(ndev);
         netif_carrier_off(ndev);
 
-        cancel_delayed_work_sync(&qdev->asic_reset_work);
+        /* Don't kill the reset worker thread if we
+         * are in the process of recovery.
+         */
+        if (test_bit(QL_ADAPTER_UP, &qdev->flags))
+                cancel_delayed_work_sync(&qdev->asic_reset_work);
         cancel_delayed_work_sync(&qdev->mpi_reset_work);
         cancel_delayed_work_sync(&qdev->mpi_work);
 
@@ -3122,6 +3166,11 @@ static int ql_adapter_down(struct ql_adapter *qdev)
 
         ql_tx_ring_clean(qdev);
 
+        /* Call netif_napi_del() from common point.
+         */
+        for (i = qdev->rss_ring_first_cq_id; i < qdev->rx_ring_count; i++)
+                netif_napi_del(&qdev->rx_ring[i].napi);
+
         spin_lock(&qdev->hw_lock);
         status = ql_adapter_reset(qdev);
         if (status)
@@ -3491,7 +3540,7 @@ static int qlge_set_mac_address(struct net_device *ndev, void *p)
 static void qlge_tx_timeout(struct net_device *ndev)
 {
         struct ql_adapter *qdev = (struct ql_adapter *)netdev_priv(ndev);
-        queue_delayed_work(qdev->workqueue, &qdev->asic_reset_work, 0);
+        ql_queue_asic_error(qdev);
 }
 
 static void ql_asic_reset_work(struct work_struct *work)
diff --git a/drivers/net/r6040.c b/drivers/net/r6040.c
index 72fd9e97c190..b2dcdb5ed8bd 100644
--- a/drivers/net/r6040.c
+++ b/drivers/net/r6040.c
@@ -438,7 +438,6 @@ static void r6040_down(struct net_device *dev)
 {
         struct r6040_private *lp = netdev_priv(dev);
         void __iomem *ioaddr = lp->base;
-        struct pci_dev *pdev = lp->pdev;
         int limit = 2048;
         u16 *adrp;
         u16 cmd;
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
index 2c73ca606b35..43fedb9ecedb 100644
--- a/drivers/net/r8169.c
+++ b/drivers/net/r8169.c
@@ -437,6 +437,22 @@ enum features {
         RTL_FEATURE_GMII        = (1 << 2),
 };
 
+struct rtl8169_counters {
+        __le64  tx_packets;
+        __le64  rx_packets;
+        __le64  tx_errors;
+        __le32  rx_errors;
+        __le16  rx_missed;
+        __le16  align_errors;
+        __le32  tx_one_collision;
+        __le32  tx_multi_collision;
+        __le64  rx_unicast;
+        __le64  rx_broadcast;
+        __le32  rx_multicast;
+        __le16  tx_aborted;
+        __le16  tx_underun;
+};
+
 struct rtl8169_private {
         void __iomem *mmio_addr;        /* memory map physical address */
         struct pci_dev *pci_dev;        /* Index of PCI device */
@@ -480,6 +496,7 @@ struct rtl8169_private {
         unsigned features;
 
         struct mii_if_info mii;
+        struct rtl8169_counters counters;
 };
 
 MODULE_AUTHOR("Realtek and the Linux r8169 crew <netdev@vger.kernel.org>");
@@ -1100,22 +1117,6 @@ static const char rtl8169_gstrings[][ETH_GSTRING_LEN] = {
         "tx_underrun",
 };
 
-struct rtl8169_counters {
-        __le64  tx_packets;
-        __le64  rx_packets;
-        __le64  tx_errors;
-        __le32  rx_errors;
-        __le16  rx_missed;
-        __le16  align_errors;
-        __le32  tx_one_collision;
-        __le32  tx_multi_collision;
-        __le64  rx_unicast;
-        __le64  rx_broadcast;
-        __le32  rx_multicast;
-        __le16  tx_aborted;
-        __le16  tx_underun;
-};
-
 static int rtl8169_get_sset_count(struct net_device *dev, int sset)
 {
         switch (sset) {
@@ -1126,16 +1127,21 @@ static int rtl8169_get_sset_count(struct net_device *dev, int sset)
         }
 }
 
-static void rtl8169_get_ethtool_stats(struct net_device *dev,
-                                      struct ethtool_stats *stats, u64 *data)
+static void rtl8169_update_counters(struct net_device *dev)
 {
         struct rtl8169_private *tp = netdev_priv(dev);
         void __iomem *ioaddr = tp->mmio_addr;
         struct rtl8169_counters *counters;
         dma_addr_t paddr;
         u32 cmd;
+        int wait = 1000;
 
-        ASSERT_RTNL();
+        /*
+         * Some chips are unable to dump tally counters when the receiver
+         * is disabled.
+         */
+        if ((RTL_R8(ChipCmd) & CmdRxEnb) == 0)
+                return;
 
         counters = pci_alloc_consistent(tp->pci_dev, sizeof(*counters), &paddr);
         if (!counters)
@@ -1146,31 +1152,45 @@ static void rtl8169_get_ethtool_stats(struct net_device *dev,
         RTL_W32(CounterAddrLow, cmd);
         RTL_W32(CounterAddrLow, cmd | CounterDump);
 
-        while (RTL_R32(CounterAddrLow) & CounterDump) {
-                if (msleep_interruptible(1))
+        while (wait--) {
+                if ((RTL_R32(CounterAddrLow) & CounterDump) == 0) {
+                        /* copy updated counters */
+                        memcpy(&tp->counters, counters, sizeof(*counters));
                         break;
+                }
+                udelay(10);
         }
 
         RTL_W32(CounterAddrLow, 0);
         RTL_W32(CounterAddrHigh, 0);
 
-        data[0] = le64_to_cpu(counters->tx_packets);
-        data[1] = le64_to_cpu(counters->rx_packets);
-        data[2] = le64_to_cpu(counters->tx_errors);
-        data[3] = le32_to_cpu(counters->rx_errors);
-        data[4] = le16_to_cpu(counters->rx_missed);
-        data[5] = le16_to_cpu(counters->align_errors);
-        data[6] = le32_to_cpu(counters->tx_one_collision);
-        data[7] = le32_to_cpu(counters->tx_multi_collision);
-        data[8] = le64_to_cpu(counters->rx_unicast);
-        data[9] = le64_to_cpu(counters->rx_broadcast);
-        data[10] = le32_to_cpu(counters->rx_multicast);
-        data[11] = le16_to_cpu(counters->tx_aborted);
-        data[12] = le16_to_cpu(counters->tx_underun);
-
         pci_free_consistent(tp->pci_dev, sizeof(*counters), counters, paddr);
 }
 
+static void rtl8169_get_ethtool_stats(struct net_device *dev,
+                                      struct ethtool_stats *stats, u64 *data)
+{
+        struct rtl8169_private *tp = netdev_priv(dev);
+
+        ASSERT_RTNL();
+
+        rtl8169_update_counters(dev);
+
+        data[0] = le64_to_cpu(tp->counters.tx_packets);
+        data[1] = le64_to_cpu(tp->counters.rx_packets);
+        data[2] = le64_to_cpu(tp->counters.tx_errors);
+        data[3] = le32_to_cpu(tp->counters.rx_errors);
+        data[4] = le16_to_cpu(tp->counters.rx_missed);
+        data[5] = le16_to_cpu(tp->counters.align_errors);
+        data[6] = le32_to_cpu(tp->counters.tx_one_collision);
+        data[7] = le32_to_cpu(tp->counters.tx_multi_collision);
+        data[8] = le64_to_cpu(tp->counters.rx_unicast);
+        data[9] = le64_to_cpu(tp->counters.rx_broadcast);
+        data[10] = le32_to_cpu(tp->counters.rx_multicast);
+        data[11] = le16_to_cpu(tp->counters.tx_aborted);
+        data[12] = le16_to_cpu(tp->counters.tx_underun);
+}
+
 static void rtl8169_get_strings(struct net_device *dev, u32 stringset, u8 *data)
 {
         switch(stringset) {
@@ -3233,13 +3253,6 @@ static int rtl8169_start_xmit(struct sk_buff *skb, struct net_device *dev)
                 opts1 |= FirstFrag;
         } else {
                 len = skb->len;
-
-                if (unlikely(len < ETH_ZLEN)) {
-                        if (skb_padto(skb, ETH_ZLEN))
-                                goto err_update_stats;
-                        len = ETH_ZLEN;
-                }
-
                 opts1 |= FirstFrag | LastFrag;
                 tp->tx_skb[entry].skb = skb;
         }
@@ -3277,7 +3290,6 @@ out:
 err_stop:
         netif_stop_queue(dev);
         ret = NETDEV_TX_BUSY;
-err_update_stats:
         dev->stats.tx_dropped++;
         goto out;
 }
@@ -3682,6 +3694,9 @@ static int rtl8169_close(struct net_device *dev)
         struct rtl8169_private *tp = netdev_priv(dev);
         struct pci_dev *pdev = tp->pci_dev;
 
+        /* update counters before going down */
+        rtl8169_update_counters(dev);
+
         rtl8169_down(dev);
 
         free_irq(dev->irq, dev);
diff --git a/drivers/net/sfc/efx.c b/drivers/net/sfc/efx.c
index 7673fd92eaf5..ab0e09bf154d 100644
--- a/drivers/net/sfc/efx.c
+++ b/drivers/net/sfc/efx.c
@@ -676,9 +676,8 @@ static int efx_init_port(struct efx_nic *efx)
         rc = efx->phy_op->init(efx);
         if (rc)
                 return rc;
-        efx->phy_op->reconfigure(efx);
-
         mutex_lock(&efx->mac_lock);
+        efx->phy_op->reconfigure(efx);
         rc = falcon_switch_mac(efx);
         mutex_unlock(&efx->mac_lock);
         if (rc)
@@ -686,7 +685,7 @@ static int efx_init_port(struct efx_nic *efx)
         efx->mac_op->reconfigure(efx);
 
         efx->port_initialized = true;
-        efx->stats_enabled = true;
+        efx_stats_enable(efx);
         return 0;
 
 fail:
@@ -735,6 +734,7 @@ static void efx_fini_port(struct efx_nic *efx)
         if (!efx->port_initialized)
                 return;
 
+        efx_stats_disable(efx);
         efx->phy_op->fini(efx);
         efx->port_initialized = false;
 
@@ -1361,6 +1361,20 @@ static int efx_net_stop(struct net_device *net_dev)
         return 0;
 }
 
+void efx_stats_disable(struct efx_nic *efx)
+{
+        spin_lock(&efx->stats_lock);
+        ++efx->stats_disable_count;
+        spin_unlock(&efx->stats_lock);
+}
+
+void efx_stats_enable(struct efx_nic *efx)
+{
+        spin_lock(&efx->stats_lock);
+        --efx->stats_disable_count;
+        spin_unlock(&efx->stats_lock);
+}
+
 /* Context: process, dev_base_lock or RTNL held, non-blocking. */
 static struct net_device_stats *efx_net_stats(struct net_device *net_dev)
 {
@@ -1369,12 +1383,12 @@ static struct net_device_stats *efx_net_stats(struct net_device *net_dev)
         struct net_device_stats *stats = &net_dev->stats;
 
         /* Update stats if possible, but do not wait if another thread
-         * is updating them (or resetting the NIC); slightly stale
-         * stats are acceptable.
+         * is updating them or if MAC stats fetches are temporarily
+         * disabled; slightly stale stats are acceptable.
          */
         if (!spin_trylock(&efx->stats_lock))
                 return stats;
-        if (efx->stats_enabled) {
+        if (!efx->stats_disable_count) {
                 efx->mac_op->update_stats(efx);
                 falcon_update_nic_stats(efx);
         }
@@ -1622,16 +1636,12 @@ static void efx_unregister_netdev(struct efx_nic *efx)
 
 /* Tears down the entire software state and most of the hardware state
  * before reset.  */
-void efx_reset_down(struct efx_nic *efx, struct ethtool_cmd *ecmd)
+void efx_reset_down(struct efx_nic *efx, enum reset_type method,
+                    struct ethtool_cmd *ecmd)
 {
         EFX_ASSERT_RESET_SERIALISED(efx);
 
-        /* The net_dev->get_stats handler is quite slow, and will fail
-         * if a fetch is pending over reset. Serialise against it. */
-        spin_lock(&efx->stats_lock);
-        efx->stats_enabled = false;
-        spin_unlock(&efx->stats_lock);
-
+        efx_stats_disable(efx);
         efx_stop_all(efx);
         mutex_lock(&efx->mac_lock);
         mutex_lock(&efx->spi_lock);
@@ -1639,6 +1649,8 @@ void efx_reset_down(struct efx_nic *efx, struct ethtool_cmd *ecmd)
         efx->phy_op->get_settings(efx, ecmd);
 
         efx_fini_channels(efx);
+        if (efx->port_initialized && method != RESET_TYPE_INVISIBLE)
+                efx->phy_op->fini(efx);
 }
 
 /* This function will always ensure that the locks acquired in
@@ -1646,7 +1658,8 @@ void efx_reset_down(struct efx_nic *efx, struct ethtool_cmd *ecmd)
  * that we were unable to reinitialise the hardware, and the
  * driver should be disabled. If ok is false, then the rx and tx
  * engines are not restarted, pending a RESET_DISABLE. */
-int efx_reset_up(struct efx_nic *efx, struct ethtool_cmd *ecmd, bool ok)
+int efx_reset_up(struct efx_nic *efx, enum reset_type method,
+                 struct ethtool_cmd *ecmd, bool ok)
 {
         int rc;
 
@@ -1658,6 +1671,15 @@ int efx_reset_up(struct efx_nic *efx, struct ethtool_cmd *ecmd, bool ok)
                 ok = false;
         }
 
+        if (efx->port_initialized && method != RESET_TYPE_INVISIBLE) {
+                if (ok) {
+                        rc = efx->phy_op->init(efx);
+                        if (rc)
+                                ok = false;
+                } else
+                        efx->port_initialized = false;
+        }
+
         if (ok) {
                 efx_init_channels(efx);
 
@@ -1670,7 +1692,7 @@ int efx_reset_up(struct efx_nic *efx, struct ethtool_cmd *ecmd, bool ok)
 
         if (ok) {
                 efx_start_all(efx);
-                efx->stats_enabled = true;
+                efx_stats_enable(efx);
         }
         return rc;
 }
@@ -1702,7 +1724,7 @@ static int efx_reset(struct efx_nic *efx)
 
         EFX_INFO(efx, "resetting (%d)\n", method);
 
-        efx_reset_down(efx, &ecmd);
+        efx_reset_down(efx, method, &ecmd);
 
         rc = falcon_reset_hw(efx, method);
         if (rc) {
@@ -1721,10 +1743,10 @@ static int efx_reset(struct efx_nic *efx)
 
         /* Leave device stopped if necessary */
         if (method == RESET_TYPE_DISABLE) {
-                efx_reset_up(efx, &ecmd, false);
+                efx_reset_up(efx, method, &ecmd, false);
                 rc = -EIO;
         } else {
-                rc = efx_reset_up(efx, &ecmd, true);
+                rc = efx_reset_up(efx, method, &ecmd, true);
         }
 
 out_disable:
@@ -1876,6 +1898,7 @@ static int efx_init_struct(struct efx_nic *efx, struct efx_nic_type *type,
         efx->rx_checksum_enabled = true;
         spin_lock_init(&efx->netif_stop_lock);
         spin_lock_init(&efx->stats_lock);
+        efx->stats_disable_count = 1;
         mutex_init(&efx->mac_lock);
         efx->mac_op = &efx_dummy_mac_operations;
         efx->phy_op = &efx_dummy_phy_operations;
diff --git a/drivers/net/sfc/efx.h b/drivers/net/sfc/efx.h
index 0dd7a532c78a..55d0f131b0e9 100644
--- a/drivers/net/sfc/efx.h
+++ b/drivers/net/sfc/efx.h
@@ -36,13 +36,16 @@ extern void efx_process_channel_now(struct efx_channel *channel);
 extern void efx_flush_queues(struct efx_nic *efx);
 
 /* Ports */
+extern void efx_stats_disable(struct efx_nic *efx);
+extern void efx_stats_enable(struct efx_nic *efx);
 extern void efx_reconfigure_port(struct efx_nic *efx);
 extern void __efx_reconfigure_port(struct efx_nic *efx);
 
 /* Reset handling */
-extern void efx_reset_down(struct efx_nic *efx, struct ethtool_cmd *ecmd);
-extern int efx_reset_up(struct efx_nic *efx, struct ethtool_cmd *ecmd,
-                        bool ok);
+extern void efx_reset_down(struct efx_nic *efx, enum reset_type method,
+                           struct ethtool_cmd *ecmd);
+extern int efx_reset_up(struct efx_nic *efx, enum reset_type method,
+                        struct ethtool_cmd *ecmd, bool ok);
 
 /* Global */
 extern void efx_schedule_reset(struct efx_nic *efx, enum reset_type type);
diff --git a/drivers/net/sfc/ethtool.c b/drivers/net/sfc/ethtool.c
index 53d259e90187..7b5924c039b3 100644
--- a/drivers/net/sfc/ethtool.c
+++ b/drivers/net/sfc/ethtool.c
@@ -219,9 +219,6 @@ int efx_ethtool_set_settings(struct net_device *net_dev,
         struct efx_nic *efx = netdev_priv(net_dev);
         int rc;
 
-        if (EFX_WORKAROUND_13963(efx) && !ecmd->autoneg)
-                return -EINVAL;
-
         /* Falcon GMAC does not support 1000Mbps HD */
         if (ecmd->speed == SPEED_1000 && ecmd->duplex != DUPLEX_FULL) {
                 EFX_LOG(efx, "rejecting unsupported 1000Mbps HD"
diff --git a/drivers/net/sfc/falcon.c b/drivers/net/sfc/falcon.c
index 5b9f2d9cc4ed..d5378e60fcdd 100644
--- a/drivers/net/sfc/falcon.c
+++ b/drivers/net/sfc/falcon.c
@@ -824,10 +824,6 @@ static void falcon_handle_rx_not_ok(struct efx_rx_queue *rx_queue,
                             rx_ev_pause_frm ? " [PAUSE]" : "");
         }
 #endif
-
-        if (unlikely(rx_ev_eth_crc_err && EFX_WORKAROUND_10750(efx) &&
-                     efx->phy_type == PHY_TYPE_SFX7101))
-                tenxpress_crc_err(efx);
 }
 
 /* Handle receive events that are not in-order. */
@@ -1887,7 +1883,7 @@ static int falcon_reset_macs(struct efx_nic *efx)
 
         /* MAC stats will fail whilst the TX fifo is draining. Serialise
          * the drain sequence with the statistics fetch */
-        spin_lock(&efx->stats_lock);
+        efx_stats_disable(efx);
 
         falcon_read(efx, &reg, MAC0_CTRL_REG_KER);
         EFX_SET_OWORD_FIELD(reg, TXFIFO_DRAIN_EN_B0, 1);
@@ -1917,7 +1913,7 @@ static int falcon_reset_macs(struct efx_nic *efx)
                 udelay(10);
         }
 
-        spin_unlock(&efx->stats_lock);
+        efx_stats_enable(efx);
 
         /* If we've reset the EM block and the link is up, then
          * we'll have to kick the XAUI link so the PHY can recover */
@@ -2277,6 +2273,10 @@ int falcon_switch_mac(struct efx_nic *efx)
         struct efx_mac_operations *old_mac_op = efx->mac_op;
         efx_oword_t nic_stat;
         unsigned strap_val;
+        int rc = 0;
+
+        /* Don't try to fetch MAC stats while we're switching MACs */
+        efx_stats_disable(efx);
 
         /* Internal loopbacks override the phy speed setting */
         if (efx->loopback_mode == LOOPBACK_GMAC) {
@@ -2287,16 +2287,12 @@ int falcon_switch_mac(struct efx_nic *efx)
                 efx->link_fd = true;
         }
 
+        WARN_ON(!mutex_is_locked(&efx->mac_lock));
         efx->mac_op = (EFX_IS10G(efx) ?
                        &falcon_xmac_operations : &falcon_gmac_operations);
-        if (old_mac_op == efx->mac_op)
-                return 0;
-
-        WARN_ON(!mutex_is_locked(&efx->mac_lock));
-
-        /* Not all macs support a mac-level link state */
-        efx->mac_up = true;
 
+        /* Always push the NIC_STAT_REG setting even if the mac hasn't
+         * changed, because this function is run post online reset */
         falcon_read(efx, &nic_stat, NIC_STAT_REG);
         strap_val = EFX_IS10G(efx) ? 5 : 3;
         if (falcon_rev(efx) >= FALCON_REV_B0) {
@@ -2309,9 +2305,17 @@ int falcon_switch_mac(struct efx_nic *efx)
                 BUG_ON(EFX_OWORD_FIELD(nic_stat, STRAP_PINS) != strap_val);
         }
 
+        if (old_mac_op == efx->mac_op)
+                goto out;
 
         EFX_LOG(efx, "selected %cMAC\n", EFX_IS10G(efx) ? 'X' : 'G');
-        return falcon_reset_macs(efx);
+        /* Not all macs support a mac-level link state */
+        efx->mac_up = true;
+
+        rc = falcon_reset_macs(efx);
+out:
+        efx_stats_enable(efx);
+        return rc;
 }
 
 /* This call is responsible for hooking in the MAC and PHY operations */
diff --git a/drivers/net/sfc/mdio_10g.c b/drivers/net/sfc/mdio_10g.c
index f6a16428113d..f9e2f95c3b48 100644
--- a/drivers/net/sfc/mdio_10g.c
+++ b/drivers/net/sfc/mdio_10g.c
@@ -15,6 +15,7 @@
 #include "net_driver.h"
 #include "mdio_10g.h"
 #include "boards.h"
+#include "workarounds.h"
 
 int mdio_clause45_reset_mmd(struct efx_nic *port, int mmd,
                             int spins, int spintime)
@@ -179,17 +180,12 @@ bool mdio_clause45_links_ok(struct efx_nic *efx, unsigned int mmd_mask)
                 return false;
         else if (efx_phy_mode_disabled(efx->phy_mode))
                 return false;
-        else if (efx->loopback_mode == LOOPBACK_PHYXS) {
+        else if (efx->loopback_mode == LOOPBACK_PHYXS)
                 mmd_mask &= ~(MDIO_MMDREG_DEVS_PHYXS |
                               MDIO_MMDREG_DEVS_PCS |
                               MDIO_MMDREG_DEVS_PMAPMD |
                               MDIO_MMDREG_DEVS_AN);
-                if (!mmd_mask) {
-                        reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_PHYXS,
-                                                 MDIO_PHYXS_STATUS2);
-                        return !(reg & (1 << MDIO_PHYXS_STATUS2_RX_FAULT_LBN));
-                }
-        } else if (efx->loopback_mode == LOOPBACK_PCS)
+        else if (efx->loopback_mode == LOOPBACK_PCS)
                 mmd_mask &= ~(MDIO_MMDREG_DEVS_PCS |
                               MDIO_MMDREG_DEVS_PMAPMD |
                               MDIO_MMDREG_DEVS_AN);
@@ -197,6 +193,13 @@ bool mdio_clause45_links_ok(struct efx_nic *efx, unsigned int mmd_mask)
                 mmd_mask &= ~(MDIO_MMDREG_DEVS_PMAPMD |
                               MDIO_MMDREG_DEVS_AN);
 
+        if (!mmd_mask) {
+                /* Use presence of XGMII faults in leui of link state */
+                reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_PHYXS,
+                                         MDIO_PHYXS_STATUS2);
+                return !(reg & (1 << MDIO_PHYXS_STATUS2_RX_FAULT_LBN));
+        }
+
         while (mmd_mask) {
                 if (mmd_mask & 1) {
                         /* Double reads because link state is latched, and a
@@ -263,7 +266,7 @@ void mdio_clause45_set_mmds_lpower(struct efx_nic *efx,
         }
 }
 
-static u32 mdio_clause45_get_an(struct efx_nic *efx, u16 addr, u32 xnp)
+static u32 mdio_clause45_get_an(struct efx_nic *efx, u16 addr)
 {
         int phy_id = efx->mii.phy_id;
         u32 result = 0;
@@ -278,9 +281,6 @@ static u32 mdio_clause45_get_an(struct efx_nic *efx, u16 addr, u32 xnp)
                 result |= ADVERTISED_100baseT_Half;
         if (reg & ADVERTISE_100FULL)
                 result |= ADVERTISED_100baseT_Full;
-        if (reg & LPA_RESV)
-                result |= xnp;
-
         return result;
 }
 
@@ -310,7 +310,7 @@ void mdio_clause45_get_settings(struct efx_nic *efx,
  */
 void mdio_clause45_get_settings_ext(struct efx_nic *efx,
                                     struct ethtool_cmd *ecmd,
-                                    u32 xnp, u32 xnp_lpa)
+                                    u32 npage_adv, u32 npage_lpa)
 {
         int phy_id = efx->mii.phy_id;
         int reg;
@@ -361,8 +361,8 @@ void mdio_clause45_get_settings_ext(struct efx_nic *efx,
                         ecmd->autoneg = AUTONEG_ENABLE;
                         ecmd->advertising |=
                                 ADVERTISED_Autoneg |
-                                mdio_clause45_get_an(efx,
-                                                     MDIO_AN_ADVERTISE, xnp);
+                                mdio_clause45_get_an(efx, MDIO_AN_ADVERTISE) |
+                                npage_adv;
                 } else
                         ecmd->autoneg = AUTONEG_DISABLE;
         } else
@@ -371,27 +371,30 @@ void mdio_clause45_get_settings_ext(struct efx_nic *efx,
         if (ecmd->autoneg) {
                 /* If AN is complete, report best common mode,
                  * otherwise report best advertised mode. */
-                u32 common = ecmd->advertising;
+                u32 modes = 0;
                 if (mdio_clause45_read(efx, phy_id, MDIO_MMD_AN,
                                        MDIO_MMDREG_STAT1) &
-                    (1 << MDIO_AN_STATUS_AN_DONE_LBN)) {
-                        common &= mdio_clause45_get_an(efx, MDIO_AN_LPA,
-                                                       xnp_lpa);
-                }
-                if (common & ADVERTISED_10000baseT_Full) {
+                    (1 << MDIO_AN_STATUS_AN_DONE_LBN))
+                        modes = (ecmd->advertising &
+                                 (mdio_clause45_get_an(efx, MDIO_AN_LPA) |
+                                  npage_lpa));
+                if (modes == 0)
+                        modes = ecmd->advertising;
+
+                if (modes & ADVERTISED_10000baseT_Full) {
                         ecmd->speed = SPEED_10000;
                         ecmd->duplex = DUPLEX_FULL;
-                } else if (common & (ADVERTISED_1000baseT_Full |
-                                     ADVERTISED_1000baseT_Half)) {
+                } else if (modes & (ADVERTISED_1000baseT_Full |
+                                    ADVERTISED_1000baseT_Half)) {
                         ecmd->speed = SPEED_1000;
-                        ecmd->duplex = !!(common & ADVERTISED_1000baseT_Full);
-                } else if (common & (ADVERTISED_100baseT_Full |
-                                     ADVERTISED_100baseT_Half)) {
+                        ecmd->duplex = !!(modes & ADVERTISED_1000baseT_Full);
+                } else if (modes & (ADVERTISED_100baseT_Full |
+                                    ADVERTISED_100baseT_Half)) {
                         ecmd->speed = SPEED_100;
-                        ecmd->duplex = !!(common & ADVERTISED_100baseT_Full);
+                        ecmd->duplex = !!(modes & ADVERTISED_100baseT_Full);
                 } else {
                         ecmd->speed = SPEED_10;
-                        ecmd->duplex = !!(common & ADVERTISED_10baseT_Full);
+                        ecmd->duplex = !!(modes & ADVERTISED_10baseT_Full);
                 }
         } else {
                 /* Report forced settings */
@@ -415,7 +418,7 @@ int mdio_clause45_set_settings(struct efx_nic *efx,
         int phy_id = efx->mii.phy_id;
         struct ethtool_cmd prev;
         u32 required;
-        int ctrl1_bits, reg;
+        int reg;
 
         efx->phy_op->get_settings(efx, &prev);
 
@@ -430,99 +433,83 @@ int mdio_clause45_set_settings(struct efx_nic *efx,
         if (prev.port != PORT_TP || ecmd->port != PORT_TP)
                 return -EINVAL;
 
-        /* Check that PHY supports these settings and work out the
-         * basic control bits */
-        if (ecmd->duplex) {
+        /* Check that PHY supports these settings */
+        if (ecmd->autoneg) {
+                required = SUPPORTED_Autoneg;
+        } else if (ecmd->duplex) {
                 switch (ecmd->speed) {
-                case SPEED_10:
-                        ctrl1_bits = BMCR_FULLDPLX;
-                        required = SUPPORTED_10baseT_Full;
-                        break;
-                case SPEED_100:
-                        ctrl1_bits = BMCR_SPEED100 | BMCR_FULLDPLX;
-                        required = SUPPORTED_100baseT_Full;
-                        break;
-                case SPEED_1000:
-                        ctrl1_bits = BMCR_SPEED1000 | BMCR_FULLDPLX;
-                        required = SUPPORTED_1000baseT_Full;
-                        break;
-                case SPEED_10000:
-                        ctrl1_bits = (BMCR_SPEED1000 | BMCR_SPEED100 |
-                                      BMCR_FULLDPLX);
-                        required = SUPPORTED_10000baseT_Full;
-                        break;
-                default:
-                        return -EINVAL;
+                case SPEED_10:  required = SUPPORTED_10baseT_Full;  break;
+                case SPEED_100: required = SUPPORTED_100baseT_Full; break;
+                default:        return -EINVAL;
                 }
         } else {
                 switch (ecmd->speed) {
-                case SPEED_10:
-                        ctrl1_bits = 0;
-                        required = SUPPORTED_10baseT_Half;
-                        break;
-                case SPEED_100:
-                        ctrl1_bits = BMCR_SPEED100;
-                        required = SUPPORTED_100baseT_Half;
-                        break;
-                case SPEED_1000:
-                        ctrl1_bits = BMCR_SPEED1000;
-                        required = SUPPORTED_1000baseT_Half;
-                        break;
-                default:
-                        return -EINVAL;
+                case SPEED_10:  required = SUPPORTED_10baseT_Half;  break;
+                case SPEED_100: required = SUPPORTED_100baseT_Half; break;
+                default:        return -EINVAL;
                 }
         }
-        if (ecmd->autoneg)
-                required |= SUPPORTED_Autoneg;
         required |= ecmd->advertising;
         if (required & ~prev.supported)
                 return -EINVAL;
 
-        /* Set the basic control bits */
-        reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_PMAPMD,
-                                 MDIO_MMDREG_CTRL1);
-        reg &= ~(BMCR_SPEED1000 | BMCR_SPEED100 | BMCR_FULLDPLX | 0x003c);
-        reg |= ctrl1_bits;
-        mdio_clause45_write(efx, phy_id, MDIO_MMD_PMAPMD, MDIO_MMDREG_CTRL1,
-                            reg);
-
-        /* Set the AN registers */
-        if (ecmd->autoneg != prev.autoneg ||
-            ecmd->advertising != prev.advertising) {
-                bool xnp = false;
-
-                if (efx->phy_op->set_xnp_advertise)
-                        xnp = efx->phy_op->set_xnp_advertise(efx,
-                                                             ecmd->advertising);
-
-                if (ecmd->autoneg) {
-                        reg = 0;
-                        if (ecmd->advertising & ADVERTISED_10baseT_Half)
-                                reg |= ADVERTISE_10HALF;
-                        if (ecmd->advertising & ADVERTISED_10baseT_Full)
-                                reg |= ADVERTISE_10FULL;
-                        if (ecmd->advertising & ADVERTISED_100baseT_Half)
-                                reg |= ADVERTISE_100HALF;
-                        if (ecmd->advertising & ADVERTISED_100baseT_Full)
-                                reg |= ADVERTISE_100FULL;
-                        if (xnp)
-                                reg |= ADVERTISE_RESV;
-                        mdio_clause45_write(efx, phy_id, MDIO_MMD_AN,
-                                            MDIO_AN_ADVERTISE, reg);
-                }
+        if (ecmd->autoneg) {
+                bool xnp = (ecmd->advertising & ADVERTISED_10000baseT_Full
+                            || EFX_WORKAROUND_13204(efx));
+
+                /* Set up the base page */
+                reg = ADVERTISE_CSMA;
+                if (ecmd->advertising & ADVERTISED_10baseT_Half)
+                        reg |= ADVERTISE_10HALF;
+                if (ecmd->advertising & ADVERTISED_10baseT_Full)
+                        reg |= ADVERTISE_10FULL;
+                if (ecmd->advertising & ADVERTISED_100baseT_Half)
+                        reg |= ADVERTISE_100HALF;
+                if (ecmd->advertising & ADVERTISED_100baseT_Full)
+                        reg |= ADVERTISE_100FULL;
+                if (xnp)
+                        reg |= ADVERTISE_RESV;
+                else if (ecmd->advertising & (ADVERTISED_1000baseT_Half |
+                                              ADVERTISED_1000baseT_Full))
+                        reg |= ADVERTISE_NPAGE;
+                reg |= efx_fc_advertise(efx->wanted_fc);
+                mdio_clause45_write(efx, phy_id, MDIO_MMD_AN,
+                                    MDIO_AN_ADVERTISE, reg);
+
+                /* Set up the (extended) next page if necessary */
+                if (efx->phy_op->set_npage_adv)
+                        efx->phy_op->set_npage_adv(efx, ecmd->advertising);
 
+                /* Enable and restart AN */
                 reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_AN,
                                          MDIO_MMDREG_CTRL1);
-                if (ecmd->autoneg)
-                        reg |= BMCR_ANENABLE | BMCR_ANRESTART;
-                else
-                        reg &= ~BMCR_ANENABLE;
+                reg |= BMCR_ANENABLE;
+                if (!(EFX_WORKAROUND_15195(efx) &&
+                      LOOPBACK_MASK(efx) & efx->phy_op->loopbacks))
+                        reg |= BMCR_ANRESTART;
                 if (xnp)
                         reg |= 1 << MDIO_AN_CTRL_XNP_LBN;
                 else
                         reg &= ~(1 << MDIO_AN_CTRL_XNP_LBN);
                 mdio_clause45_write(efx, phy_id, MDIO_MMD_AN,
                                     MDIO_MMDREG_CTRL1, reg);
+        } else {
+                /* Disable AN */
+                mdio_clause45_set_flag(efx, phy_id, MDIO_MMD_AN,
+                                       MDIO_MMDREG_CTRL1,
+                                       __ffs(BMCR_ANENABLE), false);
+
+                /* Set the basic control bits */
+                reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_PMAPMD,
+                                         MDIO_MMDREG_CTRL1);
+                reg &= ~(BMCR_SPEED1000 | BMCR_SPEED100 | BMCR_FULLDPLX |
+                         0x003c);
+                if (ecmd->speed == SPEED_100)
+                        reg |= BMCR_SPEED100;
+                if (ecmd->duplex)
+                        reg |= BMCR_FULLDPLX;
+                mdio_clause45_write(efx, phy_id, MDIO_MMD_PMAPMD,
+                                    MDIO_MMDREG_CTRL1, reg);
         }
 
         return 0;
diff --git a/drivers/net/sfc/mdio_10g.h b/drivers/net/sfc/mdio_10g.h
index 09bf801d0569..8ba49773ce7e 100644
--- a/drivers/net/sfc/mdio_10g.h
+++ b/drivers/net/sfc/mdio_10g.h
@@ -155,7 +155,8 @@
 #define MDIO_AN_XNP                     22
 #define MDIO_AN_LPA_XNP                 25
 
-#define MDIO_AN_10GBT_ADVERTISE         32
+#define MDIO_AN_10GBT_CTRL              32
+#define MDIO_AN_10GBT_CTRL_ADV_10G_LBN  12
 #define MDIO_AN_10GBT_STATUS            (33)
 #define MDIO_AN_10GBT_STATUS_MS_FLT_LBN (15) /* MASTER/SLAVE config fault */
 #define MDIO_AN_10GBT_STATUS_MS_LBN     (14) /* MASTER/SLAVE config */
diff --git a/drivers/net/sfc/net_driver.h b/drivers/net/sfc/net_driver.h
index 5f255f75754e..e019ad1fb9a0 100644
--- a/drivers/net/sfc/net_driver.h
+++ b/drivers/net/sfc/net_driver.h
@@ -566,7 +566,7 @@ struct efx_mac_operations {
  * @poll: Poll for hardware state. Serialised by the mac_lock.
  * @get_settings: Get ethtool settings. Serialised by the mac_lock.
  * @set_settings: Set ethtool settings. Serialised by the mac_lock.
- * @set_xnp_advertise: Set abilities advertised in Extended Next Page
+ * @set_npage_adv: Set abilities advertised in (Extended) Next Page
  *      (only needed where AN bit is set in mmds)
  * @num_tests: Number of PHY-specific tests/results
  * @test_names: Names of the tests/results
@@ -586,7 +586,7 @@ struct efx_phy_operations {
                               struct ethtool_cmd *ecmd);
         int (*set_settings) (struct efx_nic *efx,
                              struct ethtool_cmd *ecmd);
-        bool (*set_xnp_advertise) (struct efx_nic *efx, u32);
+        void (*set_npage_adv) (struct efx_nic *efx, u32);
         u32 num_tests;
         const char *const *test_names;
         int (*run_tests) (struct efx_nic *efx, int *results, unsigned flags);
@@ -754,8 +754,7 @@ union efx_multicast_hash {
  *      &struct net_device_stats.
  * @stats_buffer: DMA buffer for statistics
  * @stats_lock: Statistics update lock. Serialises statistics fetches
- * @stats_enabled: Temporarily disable statistics fetches.
- *      Serialised by @stats_lock
+ * @stats_disable_count: Nest count for disabling statistics fetches
  * @mac_op: MAC interface
  * @mac_address: Permanent MAC address
  * @phy_type: PHY type
@@ -837,7 +836,7 @@ struct efx_nic {
         struct efx_mac_stats mac_stats;
         struct efx_buffer stats_buffer;
         spinlock_t stats_lock;
-        bool stats_enabled;
+        unsigned int stats_disable_count;
 
         struct efx_mac_operations *mac_op;
         unsigned char mac_address[ETH_ALEN];
diff --git a/drivers/net/sfc/phy.h b/drivers/net/sfc/phy.h
index 58c493ef81bb..07e855c148bc 100644
--- a/drivers/net/sfc/phy.h
+++ b/drivers/net/sfc/phy.h
@@ -17,7 +17,6 @@ extern struct efx_phy_operations falcon_sfx7101_phy_ops;
 extern struct efx_phy_operations falcon_sft9001_phy_ops;
 
 extern void tenxpress_phy_blink(struct efx_nic *efx, bool blink);
-extern void tenxpress_crc_err(struct efx_nic *efx);
 
 /****************************************************************************
  * Exported functions from the driver for XFP optical PHYs
diff --git a/drivers/net/sfc/selftest.c b/drivers/net/sfc/selftest.c
index dba0d64d50cd..0a598084c513 100644
--- a/drivers/net/sfc/selftest.c
+++ b/drivers/net/sfc/selftest.c
@@ -665,6 +665,7 @@ int efx_selftest(struct efx_nic *efx, struct efx_self_tests *tests,
 {
         enum efx_loopback_mode loopback_mode = efx->loopback_mode;
         int phy_mode = efx->phy_mode;
+        enum reset_type reset_method = RESET_TYPE_INVISIBLE;
         struct ethtool_cmd ecmd;
         struct efx_channel *channel;
         int rc_test = 0, rc_reset = 0, rc;
@@ -718,21 +719,21 @@ int efx_selftest(struct efx_nic *efx, struct efx_self_tests *tests,
         mutex_unlock(&efx->mac_lock);
 
         /* free up all consumers of SRAM (including all the queues) */
-        efx_reset_down(efx, &ecmd);
+        efx_reset_down(efx, reset_method, &ecmd);
 
         rc = efx_test_chip(efx, tests);
         if (rc && !rc_test)
                 rc_test = rc;
 
         /* reset the chip to recover from the register test */
-        rc_reset = falcon_reset_hw(efx, RESET_TYPE_ALL);
+        rc_reset = falcon_reset_hw(efx, reset_method);
 
         /* Ensure that the phy is powered and out of loopback
          * for the bist and loopback tests */
         efx->phy_mode &= ~PHY_MODE_LOW_POWER;
         efx->loopback_mode = LOOPBACK_NONE;
 
-        rc = efx_reset_up(efx, &ecmd, rc_reset == 0);
+        rc = efx_reset_up(efx, reset_method, &ecmd, rc_reset == 0);
         if (rc && !rc_reset)
                 rc_reset = rc;
 
diff --git a/drivers/net/sfc/sfe4001.c b/drivers/net/sfc/sfe4001.c
index 16b80acb9992..cb25ae5b257a 100644
--- a/drivers/net/sfc/sfe4001.c
+++ b/drivers/net/sfc/sfe4001.c
@@ -186,19 +186,22 @@ static int sfn4111t_reset(struct efx_nic *efx)
 {
         efx_oword_t reg;
 
-        /* GPIO pins are also used for I2C, so block that temporarily */
+        /* GPIO 3 and the GPIO register are shared with I2C, so block that */
         mutex_lock(&efx->i2c_adap.bus_lock);
 
+        /* Pull RST_N (GPIO 2) low then let it up again, setting the
+         * FLASH_CFG_1 strap (GPIO 3) appropriately.  Only change the
+         * output enables; the output levels should always be 0 (low)
+         * and we rely on external pull-ups. */
         falcon_read(efx, &reg, GPIO_CTL_REG_KER);
         EFX_SET_OWORD_FIELD(reg, GPIO2_OEN, true);
-        EFX_SET_OWORD_FIELD(reg, GPIO2_OUT, false);
         falcon_write(efx, &reg, GPIO_CTL_REG_KER);
         msleep(1000);
-        EFX_SET_OWORD_FIELD(reg, GPIO2_OUT, true);
-        EFX_SET_OWORD_FIELD(reg, GPIO3_OEN, true);
-        EFX_SET_OWORD_FIELD(reg, GPIO3_OUT,
-                            !(efx->phy_mode & PHY_MODE_SPECIAL));
+        EFX_SET_OWORD_FIELD(reg, GPIO2_OEN, false);
+        EFX_SET_OWORD_FIELD(reg, GPIO3_OEN,
+                            !!(efx->phy_mode & PHY_MODE_SPECIAL));
         falcon_write(efx, &reg, GPIO_CTL_REG_KER);
+        msleep(1);
 
         mutex_unlock(&efx->i2c_adap.bus_lock);
 
@@ -232,12 +235,18 @@ static ssize_t set_phy_flash_cfg(struct device *dev,
         } else if (efx->state != STATE_RUNNING || netif_running(efx->net_dev)) {
                 err = -EBUSY;
         } else {
+                /* Reset the PHY, reconfigure the MAC and enable/disable
+                 * MAC stats accordingly. */
                 efx->phy_mode = new_mode;
+                if (new_mode & PHY_MODE_SPECIAL)
+                        efx_stats_disable(efx);
                 if (efx->board_info.type == EFX_BOARD_SFE4001)
                         err = sfe4001_poweron(efx);
                 else
                         err = sfn4111t_reset(efx);
                 efx_reconfigure_port(efx);
+                if (!(new_mode & PHY_MODE_SPECIAL))
+                        efx_stats_enable(efx);
         }
         rtnl_unlock();
 
@@ -326,6 +335,11 @@ int sfe4001_init(struct efx_nic *efx)
         efx->board_info.monitor = sfe4001_check_hw;
         efx->board_info.fini = sfe4001_fini;
 
+        if (efx->phy_mode & PHY_MODE_SPECIAL) {
+                /* PHY won't generate a 156.25 MHz clock and MAC stats fetch
+                 * will fail. */
+                efx_stats_disable(efx);
+        }
         rc = sfe4001_poweron(efx);
         if (rc)
                 goto fail_ioexp;
@@ -372,17 +386,25 @@ static void sfn4111t_fini(struct efx_nic *efx)
         i2c_unregister_device(efx->board_info.hwmon_client);
 }
 
-static struct i2c_board_info sfn4111t_hwmon_info = {
+static struct i2c_board_info sfn4111t_a0_hwmon_info = {
         I2C_BOARD_INFO("max6647", 0x4e),
         .irq            = -1,
 };
 
+static struct i2c_board_info sfn4111t_r5_hwmon_info = {
+        I2C_BOARD_INFO("max6646", 0x4d),
+        .irq            = -1,
+};
+
 int sfn4111t_init(struct efx_nic *efx)
 {
         int rc;
 
         efx->board_info.hwmon_client =
-                i2c_new_device(&efx->i2c_adap, &sfn4111t_hwmon_info);
+                i2c_new_device(&efx->i2c_adap,
+                               (efx->board_info.minor < 5) ?
+                               &sfn4111t_a0_hwmon_info :
+                               &sfn4111t_r5_hwmon_info);
         if (!efx->board_info.hwmon_client)
                 return -EIO;
 
@@ -394,8 +416,10 @@ int sfn4111t_init(struct efx_nic *efx)
         if (rc)
                 goto fail_hwmon;
 
-        if (efx->phy_mode & PHY_MODE_SPECIAL)
+        if (efx->phy_mode & PHY_MODE_SPECIAL) {
+                efx_stats_disable(efx);
                 sfn4111t_reset(efx);
+        }
 
         return 0;
 
diff --git a/drivers/net/sfc/tenxpress.c b/drivers/net/sfc/tenxpress.c
index 9ecb77da9545..f0efd246962c 100644
--- a/drivers/net/sfc/tenxpress.c
+++ b/drivers/net/sfc/tenxpress.c
@@ -67,6 +67,8 @@
 #define PMA_PMD_EXT_CLK312_WIDTH 1
 #define PMA_PMD_EXT_LPOWER_LBN  12
 #define PMA_PMD_EXT_LPOWER_WIDTH 1
+#define PMA_PMD_EXT_ROBUST_LBN  14
+#define PMA_PMD_EXT_ROBUST_WIDTH 1
 #define PMA_PMD_EXT_SSR_LBN     15
 #define PMA_PMD_EXT_SSR_WIDTH   1
 
@@ -177,35 +179,24 @@
 #define C22EXT_STATUS_LINK_LBN  2
 #define C22EXT_STATUS_LINK_WIDTH 1
 
-#define C22EXT_MSTSLV_REG       49162
-#define C22EXT_MSTSLV_1000_HD_LBN 10
-#define C22EXT_MSTSLV_1000_HD_WIDTH 1
-#define C22EXT_MSTSLV_1000_FD_LBN 11
-#define C22EXT_MSTSLV_1000_FD_WIDTH 1
+#define C22EXT_MSTSLV_CTRL                      49161
+#define C22EXT_MSTSLV_CTRL_ADV_1000_HD_LBN      8
+#define C22EXT_MSTSLV_CTRL_ADV_1000_FD_LBN      9
+
+#define C22EXT_MSTSLV_STATUS                    49162
+#define C22EXT_MSTSLV_STATUS_LP_1000_HD_LBN     10
+#define C22EXT_MSTSLV_STATUS_LP_1000_FD_LBN     11
 
 /* Time to wait between powering down the LNPGA and turning off the power
  * rails */
 #define LNPGA_PDOWN_WAIT        (HZ / 5)
 
-static int crc_error_reset_threshold = 100;
-module_param(crc_error_reset_threshold, int, 0644);
-MODULE_PARM_DESC(crc_error_reset_threshold,
-                 "Max number of CRC errors before XAUI reset");
-
 struct tenxpress_phy_data {
         enum efx_loopback_mode loopback_mode;
-        atomic_t bad_crc_count;
         enum efx_phy_mode phy_mode;
         int bad_lp_tries;
 };
 
-void tenxpress_crc_err(struct efx_nic *efx)
-{
-        struct tenxpress_phy_data *phy_data = efx->phy_data;
-        if (phy_data != NULL)
-                atomic_inc(&phy_data->bad_crc_count);
-}
-
 static ssize_t show_phy_short_reach(struct device *dev,
                                     struct device_attribute *attr, char *buf)
 {
@@ -284,7 +275,9 @@ static int tenxpress_init(struct efx_nic *efx)
                                          PMA_PMD_XCONTROL_REG);
                 reg |= ((1 << PMA_PMD_EXT_GMII_EN_LBN) |
                         (1 << PMA_PMD_EXT_CLK_OUT_LBN) |
-                        (1 << PMA_PMD_EXT_CLK312_LBN));
+                        (1 << PMA_PMD_EXT_CLK312_LBN) |
+                        (1 << PMA_PMD_EXT_ROBUST_LBN));
+
                 mdio_clause45_write(efx, phy_id, MDIO_MMD_PMAPMD,
                                     PMA_PMD_XCONTROL_REG, reg);
                 mdio_clause45_set_flag(efx, phy_id, MDIO_MMD_C22EXT,
@@ -346,6 +339,7 @@ static int tenxpress_phy_init(struct efx_nic *efx)
         rc = tenxpress_init(efx);
         if (rc < 0)
                 goto fail;
+        mdio_clause45_set_pause(efx);
 
         if (efx->phy_type == PHY_TYPE_SFT9001B) {
                 rc = device_create_file(&efx->pci_dev->dev,
@@ -376,8 +370,8 @@ static int tenxpress_special_reset(struct efx_nic *efx)
 
         /* The XGMAC clock is driven from the SFC7101/SFT9001 312MHz clock, so
          * a special software reset can glitch the XGMAC sufficiently for stats
-         * requests to fail. Since we don't often special_reset, just lock. */
-        spin_lock(&efx->stats_lock);
+         * requests to fail. */
+        efx_stats_disable(efx);
 
         /* Initiate reset */
         reg = mdio_clause45_read(efx, efx->mii.phy_id,
@@ -392,17 +386,17 @@ static int tenxpress_special_reset(struct efx_nic *efx)
         rc = mdio_clause45_wait_reset_mmds(efx,
                                            TENXPRESS_REQUIRED_DEVS);
         if (rc < 0)
-                goto unlock;
+                goto out;
 
         /* Try and reconfigure the device */
         rc = tenxpress_init(efx);
         if (rc < 0)
-                goto unlock;
+                goto out;
 
         /* Wait for the XGXS state machine to churn */
         mdelay(10);
-unlock:
-        spin_unlock(&efx->stats_lock);
+out:
+        efx_stats_enable(efx);
         return rc;
 }
 
@@ -520,7 +514,7 @@ static void tenxpress_phy_reconfigure(struct efx_nic *efx)
 {
         struct tenxpress_phy_data *phy_data = efx->phy_data;
         struct ethtool_cmd ecmd;
-        bool phy_mode_change, loop_reset, loop_toggle, loopback;
+        bool phy_mode_change, loop_reset;
 
         if (efx->phy_mode & (PHY_MODE_OFF | PHY_MODE_SPECIAL)) {
                 phy_data->phy_mode = efx->phy_mode;
@@ -531,12 +525,10 @@ static void tenxpress_phy_reconfigure(struct efx_nic *efx)
 
         phy_mode_change = (efx->phy_mode == PHY_MODE_NORMAL &&
                            phy_data->phy_mode != PHY_MODE_NORMAL);
-        loopback = LOOPBACK_MASK(efx) & efx->phy_op->loopbacks;
-        loop_toggle = LOOPBACK_CHANGED(phy_data, efx, efx->phy_op->loopbacks);
         loop_reset = (LOOPBACK_OUT_OF(phy_data, efx, efx->phy_op->loopbacks) ||
                       LOOPBACK_CHANGED(phy_data, efx, 1 << LOOPBACK_GPHY));
 
-        if (loop_reset || loop_toggle || loopback || phy_mode_change) {
+        if (loop_reset || phy_mode_change) {
                 int rc;
 
                 efx->phy_op->get_settings(efx, &ecmd);
@@ -551,20 +543,6 @@ static void tenxpress_phy_reconfigure(struct efx_nic *efx)
                                 falcon_reset_xaui(efx);
                 }
 
-                if (efx->phy_type != PHY_TYPE_SFX7101) {
-                        /* Only change autoneg once, on coming out or
-                         * going into loopback */
-                        if (loop_toggle)
-                                ecmd.autoneg = !loopback;
-                        if (loopback) {
-                                ecmd.duplex = DUPLEX_FULL;
-                                if (efx->loopback_mode == LOOPBACK_GPHY)
-                                        ecmd.speed = SPEED_1000;
-                                else
-                                        ecmd.speed = SPEED_10000;
-                        }
-                }
-
                 rc = efx->phy_op->set_settings(efx, &ecmd);
                 WARN_ON(rc);
         }
@@ -623,13 +601,6 @@ static void tenxpress_phy_poll(struct efx_nic *efx)
 
         if (phy_data->phy_mode != PHY_MODE_NORMAL)
                 return;
-
-        if (EFX_WORKAROUND_10750(efx) &&
-            atomic_read(&phy_data->bad_crc_count) > crc_error_reset_threshold) {
-                EFX_ERR(efx, "Resetting XAUI due to too many CRC errors\n");
-                falcon_reset_xaui(efx);
-                atomic_set(&phy_data->bad_crc_count, 0);
-        }
 }
 
 static void tenxpress_phy_fini(struct efx_nic *efx)
@@ -772,107 +743,76 @@ reset:
         return rc;
 }
 
-static u32 tenxpress_get_xnp_lpa(struct efx_nic *efx)
+static void
+tenxpress_get_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd)
 {
-        int phy = efx->mii.phy_id;
-        u32 lpa = 0;
+        int phy_id = efx->mii.phy_id;
+        u32 adv = 0, lpa = 0;
         int reg;
 
         if (efx->phy_type != PHY_TYPE_SFX7101) {
-                reg = mdio_clause45_read(efx, phy, MDIO_MMD_C22EXT,
-                                         C22EXT_MSTSLV_REG);
-                if (reg & (1 << C22EXT_MSTSLV_1000_HD_LBN))
+                reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_C22EXT,
+                                         C22EXT_MSTSLV_CTRL);
+                if (reg & (1 << C22EXT_MSTSLV_CTRL_ADV_1000_FD_LBN))
+                        adv |= ADVERTISED_1000baseT_Full;
+                reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_C22EXT,
+                                         C22EXT_MSTSLV_STATUS);
+                if (reg & (1 << C22EXT_MSTSLV_STATUS_LP_1000_HD_LBN))
                         lpa |= ADVERTISED_1000baseT_Half;
-                if (reg & (1 << C22EXT_MSTSLV_1000_FD_LBN))
+                if (reg & (1 << C22EXT_MSTSLV_STATUS_LP_1000_FD_LBN))
                         lpa |= ADVERTISED_1000baseT_Full;
         }
-        reg = mdio_clause45_read(efx, phy, MDIO_MMD_AN, MDIO_AN_10GBT_STATUS);
+        reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_AN,
+                                 MDIO_AN_10GBT_CTRL);
+        if (reg & (1 << MDIO_AN_10GBT_CTRL_ADV_10G_LBN))
+                adv |= ADVERTISED_10000baseT_Full;
+        reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_AN,
+                                 MDIO_AN_10GBT_STATUS);
         if (reg & (1 << MDIO_AN_10GBT_STATUS_LP_10G_LBN))
                 lpa |= ADVERTISED_10000baseT_Full;
-        return lpa;
-}
 
-static void sfx7101_get_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd)
-{
-        mdio_clause45_get_settings_ext(efx, ecmd, ADVERTISED_10000baseT_Full,
-                                       tenxpress_get_xnp_lpa(efx));
-        ecmd->supported |= SUPPORTED_10000baseT_Full;
-        ecmd->advertising |= ADVERTISED_10000baseT_Full;
+        mdio_clause45_get_settings_ext(efx, ecmd, adv, lpa);
+
+        if (efx->phy_type != PHY_TYPE_SFX7101)
+                ecmd->supported |= (SUPPORTED_100baseT_Full |
+                                    SUPPORTED_1000baseT_Full);
+
+        /* In loopback, the PHY automatically brings up the correct interface,
+         * but doesn't advertise the correct speed. So override it */
+        if (efx->loopback_mode == LOOPBACK_GPHY)
+                ecmd->speed = SPEED_1000;
+        else if (LOOPBACK_MASK(efx) & efx->phy_op->loopbacks)
+                ecmd->speed = SPEED_10000;
 }
 
-static void sft9001_get_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd)
+static int tenxpress_set_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd)
 {
-        int phy_id = efx->mii.phy_id;
-        u32 xnp_adv = 0;
-        int reg;
-
-        reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_PMAPMD,
-                                 PMA_PMD_SPEED_ENABLE_REG);
-        if (EFX_WORKAROUND_13204(efx) && (reg & (1 << PMA_PMD_100TX_ADV_LBN)))
-                xnp_adv |= ADVERTISED_100baseT_Full;
-        if (reg & (1 << PMA_PMD_1000T_ADV_LBN))
-                xnp_adv |= ADVERTISED_1000baseT_Full;
-        if (reg & (1 << PMA_PMD_10000T_ADV_LBN))
-                xnp_adv |= ADVERTISED_10000baseT_Full;
-
-        mdio_clause45_get_settings_ext(efx, ecmd, xnp_adv,
-                                       tenxpress_get_xnp_lpa(efx));
-
-        ecmd->supported |= (SUPPORTED_100baseT_Half |
-                            SUPPORTED_100baseT_Full |
-                            SUPPORTED_1000baseT_Full);
+        if (!ecmd->autoneg)
+                return -EINVAL;
 
-        /* Use the vendor defined C22ext register for duplex settings */
-        if (ecmd->speed != SPEED_10000 && !ecmd->autoneg) {
-                reg = mdio_clause45_read(efx, phy_id, MDIO_MMD_C22EXT,
-                                         GPHY_XCONTROL_REG);
-                ecmd->duplex = (reg & (1 << GPHY_DUPLEX_LBN) ?
-                                DUPLEX_FULL : DUPLEX_HALF);
-        }
+        return mdio_clause45_set_settings(efx, ecmd);
 }
 
-static int sft9001_set_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd)
+static void sfx7101_set_npage_adv(struct efx_nic *efx, u32 advertising)
 {
-        int phy_id = efx->mii.phy_id;
-        int rc;
-
-        rc = mdio_clause45_set_settings(efx, ecmd);
-        if (rc)
-                return rc;
-
-        if (ecmd->speed != SPEED_10000 && !ecmd->autoneg)
-                mdio_clause45_set_flag(efx, phy_id, MDIO_MMD_C22EXT,
-                                       GPHY_XCONTROL_REG, GPHY_DUPLEX_LBN,
-                                       ecmd->duplex == DUPLEX_FULL);
-
-        return rc;
+        mdio_clause45_set_flag(efx, efx->mii.phy_id, MDIO_MMD_AN,
+                               MDIO_AN_10GBT_CTRL,
+                               MDIO_AN_10GBT_CTRL_ADV_10G_LBN,
+                               advertising & ADVERTISED_10000baseT_Full);
 }
 
-static bool sft9001_set_xnp_advertise(struct efx_nic *efx, u32 advertising)
+static void sft9001_set_npage_adv(struct efx_nic *efx, u32 advertising)
 {
-        int phy = efx->mii.phy_id;
-        int reg = mdio_clause45_read(efx, phy, MDIO_MMD_PMAPMD,
-                                     PMA_PMD_SPEED_ENABLE_REG);
-        bool enabled;
-
-        reg &= ~((1 << 2) | (1 << 3));
-        if (EFX_WORKAROUND_13204(efx) &&
-            (advertising & ADVERTISED_100baseT_Full))
-                reg |= 1 << PMA_PMD_100TX_ADV_LBN;
-        if (advertising & ADVERTISED_1000baseT_Full)
-                reg |= 1 << PMA_PMD_1000T_ADV_LBN;
-        if (advertising & ADVERTISED_10000baseT_Full)
-                reg |= 1 << PMA_PMD_10000T_ADV_LBN;
-        mdio_clause45_write(efx, phy, MDIO_MMD_PMAPMD,
-                            PMA_PMD_SPEED_ENABLE_REG, reg);
-
-        enabled = (advertising &
-                   (ADVERTISED_1000baseT_Half |
-                    ADVERTISED_1000baseT_Full |
-                    ADVERTISED_10000baseT_Full));
-        if (EFX_WORKAROUND_13204(efx))
-                enabled |= (advertising & ADVERTISED_100baseT_Full);
-        return enabled;
+        int phy_id = efx->mii.phy_id;
+
+        mdio_clause45_set_flag(efx, phy_id, MDIO_MMD_C22EXT,
+                               C22EXT_MSTSLV_CTRL,
+                               C22EXT_MSTSLV_CTRL_ADV_1000_FD_LBN,
+                               advertising & ADVERTISED_1000baseT_Full);
+        mdio_clause45_set_flag(efx, phy_id, MDIO_MMD_AN,
+                               MDIO_AN_10GBT_CTRL,
+                               MDIO_AN_10GBT_CTRL_ADV_10G_LBN,
+                               advertising & ADVERTISED_10000baseT_Full);
 }
 
 struct efx_phy_operations falcon_sfx7101_phy_ops = {
@@ -882,8 +822,9 @@ struct efx_phy_operations falcon_sfx7101_phy_ops = {
         .poll             = tenxpress_phy_poll,
         .fini             = tenxpress_phy_fini,
         .clear_interrupt  = efx_port_dummy_op_void,
-        .get_settings     = sfx7101_get_settings,
-        .set_settings     = mdio_clause45_set_settings,
+        .get_settings     = tenxpress_get_settings,
+        .set_settings     = tenxpress_set_settings,
+        .set_npage_adv    = sfx7101_set_npage_adv,
         .num_tests        = ARRAY_SIZE(sfx7101_test_names),
         .test_names       = sfx7101_test_names,
         .run_tests        = sfx7101_run_tests,
@@ -898,9 +839,9 @@ struct efx_phy_operations falcon_sft9001_phy_ops = {
         .poll             = tenxpress_phy_poll,
         .fini             = tenxpress_phy_fini,
         .clear_interrupt  = efx_port_dummy_op_void,
-        .get_settings     = sft9001_get_settings,
-        .set_settings     = sft9001_set_settings,
-        .set_xnp_advertise = sft9001_set_xnp_advertise,
+        .get_settings     = tenxpress_get_settings,
+        .set_settings     = tenxpress_set_settings,
+        .set_npage_adv    = sft9001_set_npage_adv,
         .num_tests        = ARRAY_SIZE(sft9001_test_names),
         .test_names       = sft9001_test_names,
         .run_tests        = sft9001_run_tests,
diff --git a/drivers/net/sfc/workarounds.h b/drivers/net/sfc/workarounds.h
index 82e03e1d7371..78de68f4a95b 100644
--- a/drivers/net/sfc/workarounds.h
+++ b/drivers/net/sfc/workarounds.h
@@ -18,8 +18,8 @@
 #define EFX_WORKAROUND_ALWAYS(efx) 1
 #define EFX_WORKAROUND_FALCON_A(efx) (falcon_rev(efx) <= FALCON_REV_A1)
 #define EFX_WORKAROUND_10G(efx) EFX_IS10G(efx)
-#define EFX_WORKAROUND_SFX7101(efx) ((efx)->phy_type == PHY_TYPE_SFX7101)
-#define EFX_WORKAROUND_SFT9001A(efx) ((efx)->phy_type == PHY_TYPE_SFT9001A)
+#define EFX_WORKAROUND_SFT9001(efx) ((efx)->phy_type == PHY_TYPE_SFT9001A || \
+                                     (efx)->phy_type == PHY_TYPE_SFT9001B)
 
 /* XAUI resets if link not detected */
 #define EFX_WORKAROUND_5147 EFX_WORKAROUND_ALWAYS
@@ -29,8 +29,6 @@
 #define EFX_WORKAROUND_7884 EFX_WORKAROUND_10G
 /* TX pkt parser problem with <= 16 byte TXes */
 #define EFX_WORKAROUND_9141 EFX_WORKAROUND_ALWAYS
-/* Low rate CRC errors require XAUI reset */
-#define EFX_WORKAROUND_10750 EFX_WORKAROUND_SFX7101
 /* TX_EV_PKT_ERR can be caused by a dangling TX descriptor
  * or a PCIe error (bug 11028) */
 #define EFX_WORKAROUND_10727 EFX_WORKAROUND_ALWAYS
@@ -55,8 +53,8 @@
 #define EFX_WORKAROUND_8071 EFX_WORKAROUND_FALCON_A
 
 /* Need to send XNP pages for 100BaseT */
-#define EFX_WORKAROUND_13204 EFX_WORKAROUND_SFT9001A
-/* Need to keep AN enabled */
-#define EFX_WORKAROUND_13963 EFX_WORKAROUND_SFT9001A
+#define EFX_WORKAROUND_13204 EFX_WORKAROUND_SFT9001
+/* Don't restart AN in near-side loopback */
+#define EFX_WORKAROUND_15195 EFX_WORKAROUND_SFT9001
 
 #endif /* EFX_WORKAROUNDS_H */
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index 7f8e514eb5e9..7b1882765a0c 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -687,6 +687,7 @@ static irqreturn_t sh_eth_interrupt(int irq, void *netdev)
 {
         struct net_device *ndev = netdev;
         struct sh_eth_private *mdp = netdev_priv(ndev);
+        irqreturn_t ret = IRQ_NONE;
         u32 ioaddr, boguscnt = RX_RING_SIZE;
         u32 intr_status = 0;
 
@@ -696,7 +697,13 @@ static irqreturn_t sh_eth_interrupt(int irq, void *netdev)
         /* Get interrpt stat */
         intr_status = ctrl_inl(ioaddr + EESR);
         /* Clear interrupt */
-        ctrl_outl(intr_status, ioaddr + EESR);
+        if (intr_status & (EESR_FRC | EESR_RMAF | EESR_RRF |
+                        EESR_RTLF | EESR_RTSF | EESR_PRE | EESR_CERF |
+                        TX_CHECK | EESR_ERR_CHECK)) {
+                ctrl_outl(intr_status, ioaddr + EESR);
+                ret = IRQ_HANDLED;
+        } else
+                goto other_irq;
 
         if (intr_status & (EESR_FRC | /* Frame recv*/
                         EESR_RMAF | /* Multi cast address recv*/
@@ -723,9 +730,10 @@ static irqreturn_t sh_eth_interrupt(int irq, void *netdev)
                        ndev->name, intr_status);
         }
 
+other_irq:
         spin_unlock(&mdp->lock);
 
-        return IRQ_HANDLED;
+        return ret;
 }
 
 static void sh_eth_timer(unsigned long data)
@@ -844,7 +852,13 @@ static int sh_eth_open(struct net_device *ndev)
         int ret = 0;
         struct sh_eth_private *mdp = netdev_priv(ndev);
 
-        ret = request_irq(ndev->irq, &sh_eth_interrupt, 0, ndev->name, ndev);
+        ret = request_irq(ndev->irq, &sh_eth_interrupt,
+#if defined(CONFIG_CPU_SUBTYPE_SH7763) || defined(CONFIG_CPU_SUBTYPE_SH7764)
+                                IRQF_SHARED,
+#else
+                                0,
+#endif
+                                ndev->name, ndev);
         if (ret) {
                 printk(KERN_ERR "Can not assign IRQ number to %s\n", CARDNAME);
                 return ret;
diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h
index 73bc7181cc18..1537e13e623d 100644
--- a/drivers/net/sh_eth.h
+++ b/drivers/net/sh_eth.h
@@ -43,8 +43,8 @@
 
 #define SH7763_SKB_ALIGN 32
 /* Chip Base Address */
-# define SH_TSU_ADDR  0xFFE01800
-# define ARSTR            0xFFE01800
+# define SH_TSU_ADDR    0xFEE01800
+# define ARSTR                  SH_TSU_ADDR
 
 /* Chip Registers */
 /* E-DMAC */
diff --git a/drivers/net/skfp/skfddi.c b/drivers/net/skfp/skfddi.c
index 607efeaf0bc5..9a00e5566af7 100644
--- a/drivers/net/skfp/skfddi.c
+++ b/drivers/net/skfp/skfddi.c
@@ -1003,9 +1003,9 @@ static int skfp_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
                 break;
         case SKFP_CLR_STATS:    /* Zero out the driver statistics */
                 if (!capable(CAP_NET_ADMIN)) {
-                        memset(&lp->MacStat, 0, sizeof(lp->MacStat));
-                } else {
                         status = -EPERM;
+                } else {
+                        memset(&lp->MacStat, 0, sizeof(lp->MacStat));
                 }
                 break;
         default:
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index 3668e81e474d..994703cc0db3 100644
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -1403,9 +1403,6 @@ static int sky2_up(struct net_device *dev)
 
         }
 
-        if (netif_msg_ifup(sky2))
-                printk(KERN_INFO PFX "%s: enabling interface\n", dev->name);
-
         netif_carrier_off(dev);
 
         /* must be power of 2 */
@@ -1484,6 +1481,9 @@ static int sky2_up(struct net_device *dev)
         sky2_write32(hw, B0_IMSK, imask);
 
         sky2_set_multicast(dev);
+
+        if (netif_msg_ifup(sky2))
+                printk(KERN_INFO PFX "%s: enabling interface\n", dev->name);
         return 0;
 
 err_out:
diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c
index bf3aa2a1effe..223cde0d43be 100644
--- a/drivers/net/smc911x.c
+++ b/drivers/net/smc911x.c
@@ -220,9 +220,9 @@ static void smc911x_reset(struct net_device *dev)
 
         /* make sure EEPROM has finished loading before setting GPIO_CFG */
         timeout=1000;
-        while ( timeout-- && (SMC_GET_E2P_CMD(lp) & E2P_CMD_EPC_BUSY_)) {
+        while (--timeout && (SMC_GET_E2P_CMD(lp) & E2P_CMD_EPC_BUSY_))
                 udelay(10);
-        }
+
         if (timeout == 0){
                 PRINTK("%s: smc911x_reset timeout waiting for EEPROM busy\n", dev->name);
                 return;
diff --git a/drivers/net/smc911x.h b/drivers/net/smc911x.h
index 870b4c33f108..a45952e72018 100644
--- a/drivers/net/smc911x.h
+++ b/drivers/net/smc911x.h
@@ -42,6 +42,16 @@
   #define SMC_USE_16BIT         0
   #define SMC_USE_32BIT         1
   #define SMC_IRQ_SENSE         IRQF_TRIGGER_LOW
+#elif defined(CONFIG_ARCH_OMAP34XX)
+  #define SMC_USE_16BIT         0
+  #define SMC_USE_32BIT         1
+  #define SMC_IRQ_SENSE         IRQF_TRIGGER_LOW
+  #define SMC_MEM_RESERVED      1
+#elif defined(CONFIG_ARCH_OMAP24XX)
+  #define SMC_USE_16BIT         0
+  #define SMC_USE_32BIT         1
+  #define SMC_IRQ_SENSE         IRQF_TRIGGER_LOW
+  #define SMC_MEM_RESERVED      1
 #else
 /*
  * Default configuration
@@ -675,6 +685,7 @@ smc_pxa_dma_outsl(struct smc911x_local *lp, u_long physaddr,
 #define CHIP_9116       0x0116
 #define CHIP_9117       0x0117
 #define CHIP_9118       0x0118
+#define CHIP_9211       0x9211
 #define CHIP_9215       0x115A
 #define CHIP_9217       0x117A
 #define CHIP_9218       0x118A
@@ -689,6 +700,7 @@ static const struct chip_id chip_ids[] =  {
         { CHIP_9116, "LAN9116" },
         { CHIP_9117, "LAN9117" },
         { CHIP_9118, "LAN9118" },
+        { CHIP_9211, "LAN9211" },
         { CHIP_9215, "LAN9215" },
         { CHIP_9217, "LAN9217" },
         { CHIP_9218, "LAN9218" },
diff --git a/drivers/net/smsc911x.c b/drivers/net/smsc911x.c
index f513bdf1c887..d1590ac55e4b 100644
--- a/drivers/net/smsc911x.c
+++ b/drivers/net/smsc911x.c
@@ -953,7 +953,7 @@ smsc911x_rx_fastforward(struct smsc911x_data *pdata, unsigned int pktbytes)
                 do {
                         udelay(1);
                         val = smsc911x_reg_read(pdata, RX_DP_CTRL);
-                } while (timeout-- && (val & RX_DP_CTRL_RX_FFWD_));
+                } while (--timeout && (val & RX_DP_CTRL_RX_FFWD_));
 
                 if (unlikely(timeout == 0))
                         SMSC_WARNING(HW, "Timed out waiting for "
@@ -1225,6 +1225,10 @@ static int smsc911x_open(struct net_device *dev)
         dev_info(&dev->dev, "SMSC911x/921x identified at %#08lx, IRQ: %d\n",
                  (unsigned long)pdata->ioaddr, dev->irq);
 
+        /* Reset the last known duplex and carrier */
+        pdata->last_duplex = -1;
+        pdata->last_carrier = -1;
+
         /* Bring the PHY up */
         phy_start(pdata->phy_dev);
 
@@ -1624,7 +1628,7 @@ static int smsc911x_eeprom_send_cmd(struct smsc911x_data *pdata, u32 op)
         do {
                 msleep(1);
                 e2cmd = smsc911x_reg_read(pdata, E2P_CMD);
-        } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (timeout--));
+        } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout));
 
         if (!timeout) {
                 SMSC_TRACE(DRV, "TIMED OUT");
diff --git a/drivers/net/smsc9420.c b/drivers/net/smsc9420.c
index c14a4c6452c7..4e15ae068b3f 100644
--- a/drivers/net/smsc9420.c
+++ b/drivers/net/smsc9420.c
@@ -341,7 +341,7 @@ static int smsc9420_eeprom_send_cmd(struct smsc9420_pdata *pd, u32 op)
         do {
                 msleep(1);
                 e2cmd = smsc9420_reg_read(pd, E2P_CMD);
-        } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (timeout--));
+        } while ((e2cmd & E2P_CMD_EPC_BUSY_) && (--timeout));
 
         if (!timeout) {
                 smsc_info(HW, "TIMED OUT");
@@ -413,6 +413,7 @@ static int smsc9420_ethtool_get_eeprom(struct net_device *dev,
         }
 
         memcpy(data, &eeprom_data[eeprom->offset], len);
+        eeprom->magic = SMSC9420_EEPROM_MAGIC;
         eeprom->len = len;
         return 0;
 }
@@ -423,6 +424,9 @@ static int smsc9420_ethtool_set_eeprom(struct net_device *dev,
         struct smsc9420_pdata *pd = netdev_priv(dev);
         int ret;
 
+        if (eeprom->magic != SMSC9420_EEPROM_MAGIC)
+                return -EINVAL;
+
         smsc9420_eeprom_enable_access(pd);
         smsc9420_eeprom_send_cmd(pd, E2P_CMD_EPC_CMD_EWEN_);
         ret = smsc9420_eeprom_write_location(pd, eeprom->offset, *data);
@@ -498,7 +502,7 @@ static void smsc9420_check_mac_address(struct net_device *dev)
 static void smsc9420_stop_tx(struct smsc9420_pdata *pd)
 {
         u32 dmac_control, mac_cr, dma_intr_ena;
-        int timeOut = 1000;
+        int timeout = 1000;
 
         /* disable TX DMAC */
         dmac_control = smsc9420_reg_read(pd, DMAC_CONTROL);
@@ -506,13 +510,13 @@ static void smsc9420_stop_tx(struct smsc9420_pdata *pd)
         smsc9420_reg_write(pd, DMAC_CONTROL, dmac_control);
 
         /* Wait max 10ms for transmit process to stop */
-        while (timeOut--) {
+        while (--timeout) {
                 if (smsc9420_reg_read(pd, DMAC_STATUS) & DMAC_STS_TS_)
                         break;
                 udelay(10);
         }
 
-        if (!timeOut)
+        if (!timeout)
                 smsc_warn(IFDOWN, "TX DMAC failed to stop");
 
         /* ACK Tx DMAC stop bit */
@@ -596,7 +600,7 @@ static void smsc9420_free_rx_ring(struct smsc9420_pdata *pd)
 
 static void smsc9420_stop_rx(struct smsc9420_pdata *pd)
 {
-        int timeOut = 1000;
+        int timeout = 1000;
         u32 mac_cr, dmac_control, dma_intr_ena;
 
         /* mask RX DMAC interrupts */
@@ -617,13 +621,13 @@ static void smsc9420_stop_rx(struct smsc9420_pdata *pd)
         smsc9420_pci_flush_write(pd);
 
         /* wait up to 10ms for receive to stop */
-        while (timeOut--) {
+        while (--timeout) {
                 if (smsc9420_reg_read(pd, DMAC_STATUS) & DMAC_STS_RS_)
                         break;
                 udelay(10);
         }
 
-        if (!timeOut)
+        if (!timeout)
                 smsc_warn(IFDOWN, "RX DMAC did not stop! timeout.");
 
         /* ACK the Rx DMAC stop bit */
@@ -1378,6 +1382,7 @@ static int smsc9420_open(struct net_device *dev)
 
         /* test the IRQ connection to the ISR */
         smsc_dbg(IFUP, "Testing ISR using IRQ %d", dev->irq);
+        pd->software_irq_signal = false;
 
         spin_lock_irqsave(&pd->int_lock, flags);
         /* configure interrupt deassertion timer and enable interrupts */
@@ -1393,8 +1398,6 @@ static int smsc9420_open(struct net_device *dev)
         smsc9420_pci_flush_write(pd);
 
         timeout = 1000;
-        pd->software_irq_signal = false;
-        smp_wmb();
         while (timeout--) {
                 if (pd->software_irq_signal)
                         break;
diff --git a/drivers/net/smsc9420.h b/drivers/net/smsc9420.h
index 69c351f93f86..e441402f77a2 100644
--- a/drivers/net/smsc9420.h
+++ b/drivers/net/smsc9420.h
@@ -44,6 +44,7 @@
 #define LAN_REGISTER_EXTENT             (0x400)
 
 #define SMSC9420_EEPROM_SIZE            ((u32)11)
+#define SMSC9420_EEPROM_MAGIC           (0x9420)
 
 #define PKT_BUF_SZ                      (VLAN_ETH_FRAME_LEN + NET_IP_ALIGN + 4)
 
diff --git a/drivers/net/sun3lance.c b/drivers/net/sun3lance.c
index 4bb8f72c65cc..e5beb299cbd0 100644
--- a/drivers/net/sun3lance.c
+++ b/drivers/net/sun3lance.c
@@ -428,7 +428,7 @@ static int lance_open( struct net_device *dev )
         while (--i > 0)
                 if (DREG & CSR0_IDON)
                         break;
-        if (i < 0 || (DREG & CSR0_ERR)) {
+        if (i <= 0 || (DREG & CSR0_ERR)) {
                 DPRINTK( 2, ( "lance_open(): opening %s failed, i=%d, csr0=%04x\n",
                                           dev->name, i, DREG ));
                 DREG = CSR0_STOP;
diff --git a/drivers/net/sundance.c b/drivers/net/sundance.c
index feaf0e0577d7..43695b76606f 100644
--- a/drivers/net/sundance.c
+++ b/drivers/net/sundance.c
@@ -909,7 +909,7 @@ static void check_duplex(struct net_device *dev)
                         printk(KERN_INFO "%s: Setting %s-duplex based on MII #%d "
                                    "negotiated capability %4.4x.\n", dev->name,
                                    duplex ? "full" : "half", np->phys[0], negotiated);
-                iowrite16(ioread16(ioaddr + MACCtrl0) | duplex ? 0x20 : 0, ioaddr + MACCtrl0);
+                iowrite16(ioread16(ioaddr + MACCtrl0) | (duplex ? 0x20 : 0), ioaddr + MACCtrl0);
         }
 }
 
diff --git a/drivers/net/sungem.c b/drivers/net/sungem.c
index 86c765d83de1..c9c7650826c0 100644
--- a/drivers/net/sungem.c
+++ b/drivers/net/sungem.c
@@ -148,7 +148,7 @@ static u16 __phy_read(struct gem *gp, int phy_addr, int reg)
         cmd |= (MIF_FRAME_TAMSB);
         writel(cmd, gp->regs + MIF_FRAME);
 
-        while (limit--) {
+        while (--limit) {
                 cmd = readl(gp->regs + MIF_FRAME);
                 if (cmd & MIF_FRAME_TALSB)
                         break;
@@ -1157,7 +1157,7 @@ static void gem_pcs_reset(struct gem *gp)
                 if (limit-- <= 0)
                         break;
         }
-        if (limit <= 0)
+        if (limit < 0)
                 printk(KERN_WARNING "%s: PCS reset bit would not clear.\n",
                        gp->dev->name);
 }
@@ -1229,7 +1229,7 @@ static void gem_reset(struct gem *gp)
                         break;
         } while (val & (GREG_SWRST_TXRST | GREG_SWRST_RXRST));
 
-        if (limit <= 0)
+        if (limit < 0)
                 printk(KERN_ERR "%s: SW reset is ghetto.\n", gp->dev->name);
 
         if (gp->phy_type == phy_serialink || gp->phy_type == phy_serdes)
@@ -2221,6 +2221,8 @@ static int gem_do_start(struct net_device *dev)
 
         gp->running = 1;
 
+        napi_enable(&gp->napi);
+
         if (gp->lstate == link_up) {
                 netif_carrier_on(gp->dev);
                 gem_set_link_modes(gp);
@@ -2238,6 +2240,8 @@ static int gem_do_start(struct net_device *dev)
                 spin_lock_irqsave(&gp->lock, flags);
                 spin_lock(&gp->tx_lock);
 
+                napi_disable(&gp->napi);
+
                 gp->running =  0;
                 gem_reset(gp);
                 gem_clean_rings(gp);
@@ -2338,8 +2342,6 @@ static int gem_open(struct net_device *dev)
         if (!gp->asleep)
                 rc = gem_do_start(dev);
         gp->opened = (rc == 0);
-        if (gp->opened)
-                napi_enable(&gp->napi);
 
         mutex_unlock(&gp->pm_mutex);
 
@@ -2476,8 +2478,6 @@ static int gem_resume(struct pci_dev *pdev)
 
                 /* Re-attach net device */
                 netif_device_attach(dev);
-
-                napi_enable(&gp->napi);
         }
 
         spin_lock_irqsave(&gp->lock, flags);
@@ -2998,8 +2998,11 @@ static const struct net_device_ops gem_netdev_ops = {
         .ndo_do_ioctl           = gem_ioctl,
         .ndo_tx_timeout         = gem_tx_timeout,
         .ndo_change_mtu         = gem_change_mtu,
-        .ndo_set_mac_address    = eth_mac_addr,
         .ndo_validate_addr      = eth_validate_addr,
+        .ndo_set_mac_address    = gem_set_mac_address,
+#ifdef CONFIG_NET_POLL_CONTROLLER
+        .ndo_poll_controller    = gem_poll_controller,
+#endif
 };
 
 static int __devinit gem_init_one(struct pci_dev *pdev,
@@ -3161,10 +3164,6 @@ static int __devinit gem_init_one(struct pci_dev *pdev,
         dev->watchdog_timeo = 5 * HZ;
         dev->irq = pdev->irq;
         dev->dma = 0;
-        dev->set_mac_address = gem_set_mac_address;
-#ifdef CONFIG_NET_POLL_CONTROLLER
-        dev->poll_controller = gem_poll_controller;
-#endif
 
         /* Set that now, in case PM kicks in now */
         pci_set_drvdata(pdev, dev);
diff --git a/drivers/net/sungem_phy.c b/drivers/net/sungem_phy.c
index 61843fd57525..78f8cee5fd74 100644
--- a/drivers/net/sungem_phy.c
+++ b/drivers/net/sungem_phy.c
@@ -79,7 +79,7 @@ static int reset_one_mii_phy(struct mii_phy* phy, int phy_id)
 
         udelay(100);
 
-        while (limit--) {
+        while (--limit) {
                 val = __phy_read(phy, phy_id, MII_BMCR);
                 if ((val & BMCR_RESET) == 0)
                         break;
diff --git a/drivers/net/sunhme.c b/drivers/net/sunhme.c
index 7a72a3112f0a..4e9bd380a5c2 100644
--- a/drivers/net/sunhme.c
+++ b/drivers/net/sunhme.c
@@ -2543,25 +2543,36 @@ static struct quattro * __devinit quattro_sbus_find(struct of_device *child)
 }
 
 /* After all quattro cards have been probed, we call these functions
- * to register the IRQ handlers.
+ * to register the IRQ handlers for the cards that have been
+ * successfully probed and skip the cards that failed to initialize
  */
-static void __init quattro_sbus_register_irqs(void)
+static int __init quattro_sbus_register_irqs(void)
 {
         struct quattro *qp;
 
         for (qp = qfe_sbus_list; qp != NULL; qp = qp->next) {
                 struct of_device *op = qp->quattro_dev;
-                int err;
+                int err, qfe_slot, skip = 0;
+
+                for (qfe_slot = 0; qfe_slot < 4; qfe_slot++) {
+                        if (!qp->happy_meals[qfe_slot])
+                                skip = 1;
+                }
+                if (skip)
+                        continue;
 
                 err = request_irq(op->irqs[0],
                                   quattro_sbus_interrupt,
                                   IRQF_SHARED, "Quattro",
                                   qp);
                 if (err != 0) {
-                        printk(KERN_ERR "Quattro: Fatal IRQ registery error %d.\n", err);
-                        panic("QFE request irq");
+                        printk(KERN_ERR "Quattro HME: IRQ registration "
+                               "error %d.\n", err);
+                        return err;
                 }
         }
+
+        return 0;
 }
 
 static void quattro_sbus_free_irqs(void)
@@ -2570,6 +2581,14 @@ static void quattro_sbus_free_irqs(void)
 
         for (qp = qfe_sbus_list; qp != NULL; qp = qp->next) {
                 struct of_device *op = qp->quattro_dev;
+                int qfe_slot, skip = 0;
+
+                for (qfe_slot = 0; qfe_slot < 4; qfe_slot++) {
+                        if (!qp->happy_meals[qfe_slot])
+                                skip = 1;
+                }
+                if (skip)
+                        continue;
 
                 free_irq(op->irqs[0], qp);
         }
@@ -2629,6 +2648,12 @@ static int __devinit happy_meal_sbus_probe_one(struct of_device *op, int is_qfe)
         int i, qfe_slot = -1;
         int err = -ENODEV;
 
+        sbus_dp = to_of_device(op->dev.parent)->node;
+
+        /* We can match PCI devices too, do not accept those here. */
+        if (strcmp(sbus_dp->name, "sbus"))
+                return err;
+
         if (is_qfe) {
                 qp = quattro_sbus_find(op);
                 if (qp == NULL)
@@ -2734,10 +2759,6 @@ static int __devinit happy_meal_sbus_probe_one(struct of_device *op, int is_qfe)
         if (qp != NULL)
                 hp->happy_flags |= HFLAG_QUATTRO;
 
-        sbus_dp = to_of_device(op->dev.parent)->node;
-        if (is_qfe)
-                sbus_dp = to_of_device(op->dev.parent->parent)->node;
-
         /* Get the supported DVMA burst sizes from our Happy SBUS. */
         hp->happy_bursts = of_getintprop_default(sbus_dp,
                                                  "burst-sizes", 0x00);
@@ -2824,6 +2845,9 @@ err_out_iounmap:
         if (hp->tcvregs)
                 of_iounmap(&op->resource[4], hp->tcvregs, TCVR_REG_SIZE);
 
+        if (qp)
+                qp->happy_meals[qfe_slot] = NULL;
+
 err_out_free_netdev:
         free_netdev(dev);
 
@@ -3281,7 +3305,7 @@ static int __init happy_meal_sbus_init(void)
 
         err = of_register_driver(&hme_sbus_driver, &of_bus_type);
         if (!err)
-                quattro_sbus_register_irqs();
+                err = quattro_sbus_register_irqs();
 
         return err;
 }
diff --git a/drivers/net/sunlance.c b/drivers/net/sunlance.c
index 281373281756..16c528db7251 100644
--- a/drivers/net/sunlance.c
+++ b/drivers/net/sunlance.c
@@ -343,7 +343,7 @@ static void lance_init_ring_dvma(struct net_device *dev)
         ib->phys_addr [5] = dev->dev_addr [4];
 
         /* Setup the Tx ring entries */
-        for (i = 0; i <= TX_RING_SIZE; i++) {
+        for (i = 0; i < TX_RING_SIZE; i++) {
                 leptr = LANCE_ADDR(aib + libbuff_offset(tx_buf, i));
                 ib->btx_ring [i].tmd0      = leptr;
                 ib->btx_ring [i].tmd1_hadr = leptr >> 16;
@@ -399,7 +399,7 @@ static void lance_init_ring_pio(struct net_device *dev)
         sbus_writeb(dev->dev_addr[4], &ib->phys_addr[5]);
 
         /* Setup the Tx ring entries */
-        for (i = 0; i <= TX_RING_SIZE; i++) {
+        for (i = 0; i < TX_RING_SIZE; i++) {
                 leptr = libbuff_offset(tx_buf, i);
                 sbus_writew(leptr,      &ib->btx_ring [i].tmd0);
                 sbus_writeb(leptr >> 16,&ib->btx_ring [i].tmd1_hadr);
diff --git a/drivers/net/sunqe.c b/drivers/net/sunqe.c
index 6e8f377355fe..fe0c3f244562 100644
--- a/drivers/net/sunqe.c
+++ b/drivers/net/sunqe.c
@@ -227,7 +227,7 @@ static int qe_init(struct sunqe *qep, int from_irq)
         if (!(sbus_readb(mregs + MREGS_PHYCONFIG) & MREGS_PHYCONFIG_LTESTDIS)) {
                 int tries = 50;
 
-                while (tries--) {
+                while (--tries) {
                         u8 tmp;
 
                         mdelay(5);
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 8b3f84685387..dabdf59f8016 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -852,7 +852,7 @@ static int tg3_bmcr_reset(struct tg3 *tp)
                 }
                 udelay(10);
         }
-        if (limit <= 0)
+        if (limit < 0)
                 return -EBUSY;
 
         return 0;
@@ -1473,7 +1473,8 @@ static void tg3_phy_toggle_apd(struct tg3 *tp, bool enable)
 {
         u32 reg;
 
-        if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS))
+        if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS) ||
+            GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
                 return;
 
         reg = MII_TG3_MISC_SHDW_WREN |
@@ -1603,7 +1604,7 @@ static int tg3_wait_macro_done(struct tg3 *tp)
                                 break;
                 }
         }
-        if (limit <= 0)
+        if (limit < 0)
                 return -EBUSY;
 
         return 0;
@@ -2237,8 +2238,8 @@ static int tg3_set_power_state(struct tg3 *tp, pci_power_t state)
                         phyid = phydev->drv->phy_id & phydev->drv->phy_id_mask;
                         if (phyid != TG3_PHY_ID_BCMAC131) {
                                 phyid &= TG3_PHY_OUI_MASK;
-                                if (phyid == TG3_PHY_OUI_1 &&
-                                    phyid == TG3_PHY_OUI_2 &&
+                                if (phyid == TG3_PHY_OUI_1 ||
+                                    phyid == TG3_PHY_OUI_2 ||
                                     phyid == TG3_PHY_OUI_3)
                                         do_low_power = true;
                         }
diff --git a/drivers/net/tokenring/tmspci.c b/drivers/net/tokenring/tmspci.c
index 5f601773c260..e2150b3c83d9 100644
--- a/drivers/net/tokenring/tmspci.c
+++ b/drivers/net/tokenring/tmspci.c
@@ -121,11 +121,6 @@ static int __devinit tms_pci_attach(struct pci_dev *pdev, const struct pci_devic
                 goto err_out_trdev;
         }
 
-        ret = request_irq(pdev->irq, tms380tr_interrupt, IRQF_SHARED,
-                          dev->name, dev);
-        if (ret)
-                goto err_out_region;
-
         dev->base_addr  = pci_ioaddr;
         dev->irq        = pci_irq_line;
         dev->dma        = 0;
@@ -142,7 +137,7 @@ static int __devinit tms_pci_attach(struct pci_dev *pdev, const struct pci_devic
         ret = tmsdev_init(dev, &pdev->dev);
         if (ret) {
                 printk("%s: unable to get memory for dev->priv.\n", dev->name);
-                goto err_out_irq;
+                goto err_out_region;
         }
 
         tp = netdev_priv(dev);
@@ -157,6 +152,11 @@ static int __devinit tms_pci_attach(struct pci_dev *pdev, const struct pci_devic
 
         tp->tmspriv = cardinfo;
 
+        ret = request_irq(pdev->irq, tms380tr_interrupt, IRQF_SHARED,
+                          dev->name, dev);
+        if (ret)
+                goto err_out_tmsdev;
+
         dev->open = tms380tr_open;
         dev->stop = tms380tr_close;
         pci_set_drvdata(pdev, dev);
@@ -164,15 +164,15 @@ static int __devinit tms_pci_attach(struct pci_dev *pdev, const struct pci_devic
 
         ret = register_netdev(dev);
         if (ret)
-                goto err_out_tmsdev;
+                goto err_out_irq;
         
         return 0;
 
+err_out_irq:
+        free_irq(pdev->irq, dev);
 err_out_tmsdev:
         pci_set_drvdata(pdev, NULL);
         tmsdev_term(dev);
-err_out_irq:
-        free_irq(pdev->irq, dev);
 err_out_region:
         release_region(pci_ioaddr, TMS_PCI_IO_EXTENT);
 err_out_trdev:
diff --git a/drivers/net/tsi108_eth.c b/drivers/net/tsi108_eth.c
index 75461dbd4876..a9fd2b2ccaf6 100644
--- a/drivers/net/tsi108_eth.c
+++ b/drivers/net/tsi108_eth.c
@@ -1237,7 +1237,7 @@ static void tsi108_init_phy(struct net_device *dev)
         spin_lock_irqsave(&phy_lock, flags);
 
         tsi108_write_mii(data, MII_BMCR, BMCR_RESET);
-        while (i--){
+        while (--i) {
                 if(!(tsi108_read_mii(data, MII_BMCR) & BMCR_RESET))
                         break;
                 udelay(10);
diff --git a/drivers/net/tulip/21142.c b/drivers/net/tulip/21142.c
index 1210fb3748a7..db7d5e11855d 100644
--- a/drivers/net/tulip/21142.c
+++ b/drivers/net/tulip/21142.c
@@ -9,6 +9,11 @@
 
         Please refer to Documentation/DocBook/tulip-user.{pdf,ps,html}
         for more information on this driver.
+
+        DC21143 manual "21143 PCI/CardBus 10/100Mb/s Ethernet LAN Controller
+        Hardware Reference Manual" is currently available at :
+        http://developer.intel.com/design/network/manuals/278074.htm
+
         Please submit bugs to http://bugzilla.kernel.org/ .
 */
 
@@ -32,7 +37,11 @@ void t21142_media_task(struct work_struct *work)
         int csr12 = ioread32(ioaddr + CSR12);
         int next_tick = 60*HZ;
         int new_csr6 = 0;
+        int csr14 = ioread32(ioaddr + CSR14);
 
+        /* CSR12[LS10,LS100] are not reliable during autonegotiation */
+        if ((csr14 & 0x80) && (csr12 & 0x7000) != 0x5000)
+                csr12 |= 6;
         if (tulip_debug > 2)
                 printk(KERN_INFO"%s: 21143 negotiation status %8.8x, %s.\n",
                            dev->name, csr12, medianame[dev->if_port]);
@@ -76,7 +85,7 @@ void t21142_media_task(struct work_struct *work)
                         new_csr6 = 0x83860000;
                         dev->if_port = 3;
                         iowrite32(0, ioaddr + CSR13);
-                        iowrite32(0x0003FF7F, ioaddr + CSR14);
+                        iowrite32(0x0003FFFF, ioaddr + CSR14);
                         iowrite16(8, ioaddr + CSR15);
                         iowrite32(1, ioaddr + CSR13);
                 }
@@ -132,10 +141,14 @@ void t21142_lnk_change(struct net_device *dev, int csr5)
         struct tulip_private *tp = netdev_priv(dev);
         void __iomem *ioaddr = tp->base_addr;
         int csr12 = ioread32(ioaddr + CSR12);
+        int csr14 = ioread32(ioaddr + CSR14);
 
+        /* CSR12[LS10,LS100] are not reliable during autonegotiation */
+        if ((csr14 & 0x80) && (csr12 & 0x7000) != 0x5000)
+                csr12 |= 6;
         if (tulip_debug > 1)
                 printk(KERN_INFO"%s: 21143 link status interrupt %8.8x, CSR5 %x, "
-                           "%8.8x.\n", dev->name, csr12, csr5, ioread32(ioaddr + CSR14));
+                           "%8.8x.\n", dev->name, csr12, csr5, csr14);
 
         /* If NWay finished and we have a negotiated partner capability. */
         if (tp->nway  &&  !tp->nwayset  &&  (csr12 & 0x7000) == 0x5000) {
@@ -143,7 +156,9 @@ void t21142_lnk_change(struct net_device *dev, int csr5)
                 int negotiated = tp->sym_advertise & (csr12 >> 16);
                 tp->lpar = csr12 >> 16;
                 tp->nwayset = 1;
-                if (negotiated & 0x0100)                dev->if_port = 5;
+                /* If partner cannot negotiate, it is 10Mbps Half Duplex */
+                if (!(csr12 & 0x8000))          dev->if_port = 0;
+                else if (negotiated & 0x0100)   dev->if_port = 5;
                 else if (negotiated & 0x0080)   dev->if_port = 3;
                 else if (negotiated & 0x0040)   dev->if_port = 4;
                 else if (negotiated & 0x0020)   dev->if_port = 0;
@@ -214,7 +229,7 @@ void t21142_lnk_change(struct net_device *dev, int csr5)
                         tp->timer.expires = RUN_AT(3*HZ);
                         add_timer(&tp->timer);
                 } else if (dev->if_port == 5)
-                        iowrite32(ioread32(ioaddr + CSR14) & ~0x080, ioaddr + CSR14);
+                        iowrite32(csr14 & ~0x080, ioaddr + CSR14);
         } else if (dev->if_port == 0  ||  dev->if_port == 4) {
                 if ((csr12 & 4) == 0)
                         printk(KERN_INFO"%s: 21143 10baseT link beat good.\n",
diff --git a/drivers/net/tulip/de2104x.c b/drivers/net/tulip/de2104x.c
index d5d53b633cf8..d4c5ecc51f77 100644
--- a/drivers/net/tulip/de2104x.c
+++ b/drivers/net/tulip/de2104x.c
@@ -392,7 +392,7 @@ static void de_rx (struct de_private *de)
         unsigned drop = 0;
         int rc;
 
-        while (rx_work--) {
+        while (--rx_work) {
                 u32 status, len;
                 dma_addr_t mapping;
                 struct sk_buff *skb, *copy_skb;
@@ -464,13 +464,14 @@ static void de_rx (struct de_private *de)
                         drop = 1;
 
 rx_next:
-                de->rx_ring[rx_tail].opts1 = cpu_to_le32(DescOwn);
                 if (rx_tail == (DE_RX_RING_SIZE - 1))
                         de->rx_ring[rx_tail].opts2 =
                                 cpu_to_le32(RingEnd | de->rx_buf_sz);
                 else
                         de->rx_ring[rx_tail].opts2 = cpu_to_le32(de->rx_buf_sz);
                 de->rx_ring[rx_tail].addr1 = cpu_to_le32(mapping);
+                wmb();
+                de->rx_ring[rx_tail].opts1 = cpu_to_le32(DescOwn);
                 rx_tail = NEXT_RX(rx_tail);
         }
 
diff --git a/drivers/net/tulip/tulip_core.c b/drivers/net/tulip/tulip_core.c
index bee75fa87a9c..2abb5d3becc6 100644
--- a/drivers/net/tulip/tulip_core.c
+++ b/drivers/net/tulip/tulip_core.c
@@ -255,6 +255,7 @@ const char tulip_media_cap[32] =
 
 static void tulip_tx_timeout(struct net_device *dev);
 static void tulip_init_ring(struct net_device *dev);
+static void tulip_free_ring(struct net_device *dev);
 static int tulip_start_xmit(struct sk_buff *skb, struct net_device *dev);
 static int tulip_open(struct net_device *dev);
 static int tulip_close(struct net_device *dev);
@@ -502,16 +503,21 @@ tulip_open(struct net_device *dev)
 {
         int retval;
 
-        if ((retval = request_irq(dev->irq, &tulip_interrupt, IRQF_SHARED, dev->name, dev)))
-                return retval;
-
         tulip_init_ring (dev);
 
+        retval = request_irq(dev->irq, &tulip_interrupt, IRQF_SHARED, dev->name, dev);
+        if (retval)
+                goto free_ring;
+
         tulip_up (dev);
 
         netif_start_queue (dev);
 
         return 0;
+
+free_ring:
+        tulip_free_ring (dev);
+        return retval;
 }
 
 
@@ -768,23 +774,11 @@ static void tulip_down (struct net_device *dev)
         tulip_set_power_state (tp, 0, 1);
 }
 
-
-static int tulip_close (struct net_device *dev)
+static void tulip_free_ring (struct net_device *dev)
 {
         struct tulip_private *tp = netdev_priv(dev);
-        void __iomem *ioaddr = tp->base_addr;
         int i;
 
-        netif_stop_queue (dev);
-
-        tulip_down (dev);
-
-        if (tulip_debug > 1)
-                printk (KERN_DEBUG "%s: Shutting down ethercard, status was %2.2x.\n",
-                        dev->name, ioread32 (ioaddr + CSR5));
-
-        free_irq (dev->irq, dev);
-
         /* Free all the skbuffs in the Rx queue. */
         for (i = 0; i < RX_RING_SIZE; i++) {
                 struct sk_buff *skb = tp->rx_buffers[i].skb;
@@ -803,6 +797,7 @@ static int tulip_close (struct net_device *dev)
                         dev_kfree_skb (skb);
                 }
         }
+
         for (i = 0; i < TX_RING_SIZE; i++) {
                 struct sk_buff *skb = tp->tx_buffers[i].skb;
 
@@ -814,6 +809,24 @@ static int tulip_close (struct net_device *dev)
                 tp->tx_buffers[i].skb = NULL;
                 tp->tx_buffers[i].mapping = 0;
         }
+}
+
+static int tulip_close (struct net_device *dev)
+{
+        struct tulip_private *tp = netdev_priv(dev);
+        void __iomem *ioaddr = tp->base_addr;
+
+        netif_stop_queue (dev);
+
+        tulip_down (dev);
+
+        if (tulip_debug > 1)
+                printk (KERN_DEBUG "%s: Shutting down ethercard, status was %2.2x.\n",
+                        dev->name, ioread32 (ioaddr + CSR5));
+
+        free_irq (dev->irq, dev);
+
+        tulip_free_ring (dev);
 
         return 0;
 }
diff --git a/drivers/net/tun.c b/drivers/net/tun.c
index d7b81e4fdd56..09fea31d3e36 100644
--- a/drivers/net/tun.c
+++ b/drivers/net/tun.c
@@ -157,10 +157,16 @@ static int update_filter(struct tap_filter *filter, void __user *arg)
 
         nexact = n;
 
-        /* The rest is hashed */
+        /* Remaining multicast addresses are hashed,
+         * unicast will leave the filter disabled. */
         memset(filter->mask, 0, sizeof(filter->mask));
-        for (; n < uf.count; n++)
+        for (; n < uf.count; n++) {
+                if (!is_multicast_ether_addr(addr[n].u)) {
+                        err = 0; /* no filter */
+                        goto done;
+                }
                 addr_hash_set(filter->mask, addr[n].u);
+        }
 
         /* For ALLMULTI just set the mask to all ones.
          * This overrides the mask populated above. */
diff --git a/drivers/net/ucc_geth.c b/drivers/net/ucc_geth.c
index 11441225bf41..1f61e42c641d 100644
--- a/drivers/net/ucc_geth.c
+++ b/drivers/net/ucc_geth.c
@@ -1536,17 +1536,15 @@ static void adjust_link(struct net_device *dev)
 static int init_phy(struct net_device *dev)
 {
         struct ucc_geth_private *priv = netdev_priv(dev);
+        struct ucc_geth_info *ug_info = priv->ug_info;
         struct phy_device *phydev;
-        char phy_id[BUS_ID_SIZE];
 
         priv->oldlink = 0;
         priv->oldspeed = 0;
         priv->oldduplex = -1;
 
-        snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT, priv->ug_info->mdio_bus,
-                 priv->ug_info->phy_address);
-
-        phydev = phy_connect(dev, phy_id, &adjust_link, 0, priv->phy_interface);
+        phydev = phy_connect(dev, ug_info->phy_bus_id, &adjust_link, 0,
+                             priv->phy_interface);
 
         if (IS_ERR(phydev)) {
                 printk("%s: Could not attach to PHY\n", dev->name);
@@ -3614,10 +3612,12 @@ static int ucc_geth_probe(struct of_device* ofdev, const struct of_device_id *ma
         ug_info->uf_info.irq = irq_of_parse_and_map(np, 0);
         fixed_link = of_get_property(np, "fixed-link", NULL);
         if (fixed_link) {
-                snprintf(ug_info->mdio_bus, MII_BUS_ID_SIZE, "0");
-                ug_info->phy_address = fixed_link[0];
+                snprintf(ug_info->phy_bus_id, sizeof(ug_info->phy_bus_id),
+                         PHY_ID_FMT, "0", fixed_link[0]);
                 phy = NULL;
         } else {
+                char bus_name[MII_BUS_ID_SIZE];
+
                 ph = of_get_property(np, "phy-handle", NULL);
                 phy = of_find_node_by_phandle(*ph);
 
@@ -3628,7 +3628,6 @@ static int ucc_geth_probe(struct of_device* ofdev, const struct of_device_id *ma
                 prop = of_get_property(phy, "reg", NULL);
                 if (prop == NULL)
                         return -1;
-                ug_info->phy_address = *prop;
 
                 /* Set the bus id */
                 mdio = of_get_parent(phy);
@@ -3642,7 +3641,9 @@ static int ucc_geth_probe(struct of_device* ofdev, const struct of_device_id *ma
                 if (err)
                         return -1;
 
-                snprintf(ug_info->mdio_bus, MII_BUS_ID_SIZE, "%x", res.start);
+                uec_mdio_bus_name(bus_name, mdio);
+                snprintf(ug_info->phy_bus_id, sizeof(ug_info->phy_bus_id),
+                        "%s:%02x", bus_name, *prop);
         }
 
         /* get the phy interface type, or default to MII */
@@ -3748,6 +3749,7 @@ static int ucc_geth_probe(struct of_device* ofdev, const struct of_device_id *ma
 
         ugeth->ug_info = ug_info;
         ugeth->dev = dev;
+        ugeth->node = np;
 
         return 0;
 }
diff --git a/drivers/net/ucc_geth.h b/drivers/net/ucc_geth.h
index 8f699cb773ee..611bdef2402b 100644
--- a/drivers/net/ucc_geth.h
+++ b/drivers/net/ucc_geth.h
@@ -1091,8 +1091,7 @@ struct ucc_geth_info {
         u32 eventRegMask;
         u16 pausePeriod;
         u16 extensionField;
-        u8 phy_address;
-        char mdio_bus[MII_BUS_ID_SIZE];
+        char phy_bus_id[BUS_ID_SIZE];
         u8 weightfactor[NUM_TX_QUEUES];
         u8 interruptcoalescingmaxvalue[NUM_RX_QUEUES];
         u8 l2qt[UCC_GETH_VLAN_PRIORITY_MAX];
@@ -1186,6 +1185,8 @@ struct ucc_geth_private {
         int oldspeed;
         int oldduplex;
         int oldlink;
+
+        struct device_node *node;
 };
 
 void uec_set_ethtool_ops(struct net_device *netdev);
diff --git a/drivers/net/ucc_geth_mii.c b/drivers/net/ucc_geth_mii.c
index c001d261366b..0ada4edd56eb 100644
--- a/drivers/net/ucc_geth_mii.c
+++ b/drivers/net/ucc_geth_mii.c
@@ -107,7 +107,7 @@ int uec_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
 static int uec_mdio_reset(struct mii_bus *bus)
 {
         struct ucc_mii_mng __iomem *regs = (void __iomem *)bus->priv;
-        unsigned int timeout = PHY_INIT_TIMEOUT;
+        int timeout = PHY_INIT_TIMEOUT;
 
         mutex_lock(&bus->mdio_lock);
 
@@ -123,7 +123,7 @@ static int uec_mdio_reset(struct mii_bus *bus)
 
         mutex_unlock(&bus->mdio_lock);
 
-        if (timeout <= 0) {
+        if (timeout < 0) {
                 printk(KERN_ERR "%s: The MII Bus is stuck!\n", bus->name);
                 return -EBUSY;
         }
@@ -156,7 +156,7 @@ static int uec_mdio_probe(struct of_device *ofdev, const struct of_device_id *ma
         if (err)
                 goto reg_map_fail;
 
-        snprintf(new_bus->id, MII_BUS_ID_SIZE, "%x", res.start);
+        uec_mdio_bus_name(new_bus->id, np);
 
         new_bus->irq = kmalloc(32 * sizeof(int), GFP_KERNEL);
 
@@ -283,3 +283,13 @@ void uec_mdio_exit(void)
 {
         of_unregister_platform_driver(&uec_mdio_driver);
 }
+
+void uec_mdio_bus_name(char *name, struct device_node *np)
+{
+        const u32 *reg;
+
+        reg = of_get_property(np, "reg", NULL);
+
+        snprintf(name, MII_BUS_ID_SIZE, "%s@%x", np->name, reg ? *reg : 0);
+}
+
diff --git a/drivers/net/ucc_geth_mii.h b/drivers/net/ucc_geth_mii.h
index 1e45b2028a50..840cf80235b7 100644
--- a/drivers/net/ucc_geth_mii.h
+++ b/drivers/net/ucc_geth_mii.h
@@ -97,4 +97,5 @@ int uec_mdio_read(struct mii_bus *bus, int mii_id, int regnum);
 int uec_mdio_write(struct mii_bus *bus, int mii_id, int regnum, u16 value);
 int __init uec_mdio_init(void);
 void uec_mdio_exit(void);
+void uec_mdio_bus_name(char *name, struct device_node *np);
 #endif                          /* __UEC_MII_H */
diff --git a/drivers/net/usb/asix.c b/drivers/net/usb/asix.c
index e009481c606c..396f821b5ff0 100644
--- a/drivers/net/usb/asix.c
+++ b/drivers/net/usb/asix.c
@@ -1451,6 +1451,14 @@ static const struct usb_device_id	products [] = {
         // Cables-to-Go USB Ethernet Adapter
         USB_DEVICE(0x0b95, 0x772a),
         .driver_info = (unsigned long) &ax88772_info,
+}, {
+        // ABOCOM for pci
+        USB_DEVICE(0x14ea, 0xab11),
+        .driver_info = (unsigned long) &ax88178_info,
+}, {
+        // ASIX 88772a
+        USB_DEVICE(0x0db0, 0xa877),
+        .driver_info = (unsigned long) &ax88772_info,
 },
         { },            // END
 };
diff --git a/drivers/net/usb/cdc_ether.c b/drivers/net/usb/cdc_ether.c
index 0e061dfea78d..55e8ecc3a9e5 100644
--- a/drivers/net/usb/cdc_ether.c
+++ b/drivers/net/usb/cdc_ether.c
@@ -559,6 +559,11 @@ static const struct usb_device_id	products [] = {
         USB_INTERFACE_INFO(USB_CLASS_COMM, USB_CDC_SUBCLASS_ETHERNET,
                         USB_CDC_PROTO_NONE),
         .driver_info = (unsigned long) &cdc_info,
+}, {
+        /* Ericsson F3507g */
+        USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x1900, USB_CLASS_COMM,
+                        USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
+        .driver_info = (unsigned long) &cdc_info,
 },
         { },            // END
 };
diff --git a/drivers/net/usb/dm9601.c b/drivers/net/usb/dm9601.c
index 5b67bbf1987e..81682c6defa0 100644
--- a/drivers/net/usb/dm9601.c
+++ b/drivers/net/usb/dm9601.c
@@ -635,6 +635,10 @@ static const struct usb_device_id products[] = {
         USB_DEVICE(0x0a47, 0x9601),     /* Hirose USB-100 */
         .driver_info = (unsigned long)&dm9601_info,
          },
+        {
+        USB_DEVICE(0x0fe6, 0x8101),     /* DM9601 USB to Fast Ethernet Adapter */
+        .driver_info = (unsigned long)&dm9601_info,
+         },
         {},                     // END
 };
 
diff --git a/drivers/net/usb/hso.c b/drivers/net/usb/hso.c
index 0d0fa91c0251..fe98acaead97 100644
--- a/drivers/net/usb/hso.c
+++ b/drivers/net/usb/hso.c
@@ -455,6 +455,7 @@ static const struct usb_device_id hso_ids[] = {
         {icon321_port_device(0x0af0, 0xd033)},  /* Icon-322 */
         {USB_DEVICE(0x0af0, 0x7301)},           /* GE40x */
         {USB_DEVICE(0x0af0, 0x7361)},           /* GE40x */
+        {USB_DEVICE(0x0af0, 0x7381)},           /* GE40x */
         {USB_DEVICE(0x0af0, 0x7401)},           /* GI 0401 */
         {USB_DEVICE(0x0af0, 0x7501)},           /* GTM 382 */
         {USB_DEVICE(0x0af0, 0x7601)},           /* GE40x */
@@ -462,7 +463,8 @@ static const struct usb_device_id hso_ids[] = {
         {USB_DEVICE(0x0af0, 0x7801)},
         {USB_DEVICE(0x0af0, 0x7901)},
         {USB_DEVICE(0x0af0, 0x7361)},
-        {icon321_port_device(0x0af0, 0xd051)},
+        {USB_DEVICE(0x0af0, 0xd057)},
+        {USB_DEVICE(0x0af0, 0xd055)},
         {}
 };
 MODULE_DEVICE_TABLE(usb, hso_ids);
diff --git a/drivers/net/usb/usbnet.c b/drivers/net/usb/usbnet.c
index aa3149078888..c32284ff3f54 100644
--- a/drivers/net/usb/usbnet.c
+++ b/drivers/net/usb/usbnet.c
@@ -723,8 +723,8 @@ u32 usbnet_get_link (struct net_device *net)
         if (dev->mii.mdio_read)
                 return mii_link_ok(&dev->mii);
 
-        /* Otherwise, say we're up (to avoid breaking scripts) */
-        return 1;
+        /* Otherwise, dtrt for drivers calling netif_carrier_{on,off} */
+        return ethtool_op_get_link(net);
 }
 EXPORT_SYMBOL_GPL(usbnet_get_link);
 
diff --git a/drivers/net/usb/zaurus.c b/drivers/net/usb/zaurus.c
index e24f7b3ace4b..04882c8f9bf1 100644
--- a/drivers/net/usb/zaurus.c
+++ b/drivers/net/usb/zaurus.c
@@ -341,6 +341,11 @@ static const struct usb_device_id	products [] = {
         USB_INTERFACE_INFO(USB_CLASS_COMM, USB_CDC_SUBCLASS_MDLM,
                         USB_CDC_PROTO_NONE),
         .driver_info = (unsigned long) &bogus_mdlm_info,
+}, {
+        /* Motorola MOTOMAGX phones */
+        USB_DEVICE_AND_INTERFACE_INFO(0x22b8, 0x6425, USB_CLASS_COMM,
+                        USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
+        .driver_info = (unsigned long) &bogus_mdlm_info,
 },
 
 /* Olympus has some models with a Zaurus-compatible option.
diff --git a/drivers/net/veth.c b/drivers/net/veth.c
index 852d0e7c4e62..124fe75b8a8a 100644
--- a/drivers/net/veth.c
+++ b/drivers/net/veth.c
@@ -239,6 +239,16 @@ static int veth_open(struct net_device *dev)
         return 0;
 }
 
+static int veth_close(struct net_device *dev)
+{
+        struct veth_priv *priv = netdev_priv(dev);
+
+        netif_carrier_off(dev);
+        netif_carrier_off(priv->peer);
+
+        return 0;
+}
+
 static int veth_dev_init(struct net_device *dev)
 {
         struct veth_net_stats *stats;
@@ -263,10 +273,12 @@ static void veth_dev_free(struct net_device *dev)
 }
 
 static const struct net_device_ops veth_netdev_ops = {
-        .ndo_init       = veth_dev_init,
-        .ndo_open       = veth_open,
-        .ndo_start_xmit = veth_xmit,
-        .ndo_get_stats  = veth_get_stats,
+        .ndo_init            = veth_dev_init,
+        .ndo_open            = veth_open,
+        .ndo_stop            = veth_close,
+        .ndo_start_xmit      = veth_xmit,
+        .ndo_get_stats       = veth_get_stats,
+        .ndo_set_mac_address = eth_mac_addr,
 };
 
 static void veth_setup(struct net_device *dev)
@@ -279,44 +291,6 @@ static void veth_setup(struct net_device *dev)
         dev->destructor = veth_dev_free;
 }
 
-static void veth_change_state(struct net_device *dev)
-{
-        struct net_device *peer;
-        struct veth_priv *priv;
-
-        priv = netdev_priv(dev);
-        peer = priv->peer;
-
-        if (netif_carrier_ok(peer)) {
-                if (!netif_carrier_ok(dev))
-                        netif_carrier_on(dev);
-        } else {
-                if (netif_carrier_ok(dev))
-                        netif_carrier_off(dev);
-        }
-}
-
-static int veth_device_event(struct notifier_block *unused,
-                             unsigned long event, void *ptr)
-{
-        struct net_device *dev = ptr;
-
-        if (dev->netdev_ops->ndo_open != veth_open)
-                goto out;
-
-        switch (event) {
-        case NETDEV_CHANGE:
-                veth_change_state(dev);
-                break;
-        }
-out:
-        return NOTIFY_DONE;
-}
-
-static struct notifier_block veth_notifier_block __read_mostly = {
-        .notifier_call  = veth_device_event,
-};
-
 /*
  * netlink interface
  */
@@ -467,14 +441,12 @@ static struct rtnl_link_ops veth_link_ops = {
 
 static __init int veth_init(void)
 {
-        register_netdevice_notifier(&veth_notifier_block);
         return rtnl_link_register(&veth_link_ops);
 }
 
 static __exit void veth_exit(void)
 {
         rtnl_link_unregister(&veth_link_ops);
-        unregister_netdevice_notifier(&veth_notifier_block);
 }
 
 module_init(veth_init);
diff --git a/drivers/net/via-velocity.c b/drivers/net/via-velocity.c
index c5691fdb7079..fb53ef872df3 100644
--- a/drivers/net/via-velocity.c
+++ b/drivers/net/via-velocity.c
@@ -1838,17 +1838,19 @@ static void velocity_free_tx_buf(struct velocity_info *vptr, struct velocity_td_
 {
         struct sk_buff *skb = tdinfo->skb;
         int i;
+        int pktlen;
 
         /*
          *      Don't unmap the pre-allocated tx_bufs
          */
         if (tdinfo->skb_dma) {
 
+                pktlen = (skb->len > ETH_ZLEN ? : ETH_ZLEN);
                 for (i = 0; i < tdinfo->nskb_dma; i++) {
 #ifdef VELOCITY_ZERO_COPY_SUPPORT
                         pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], le16_to_cpu(td->tdesc1.len), PCI_DMA_TODEVICE);
 #else
-                        pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], skb->len, PCI_DMA_TODEVICE);
+                        pci_unmap_single(vptr->pdev, tdinfo->skb_dma[i], pktlen, PCI_DMA_TODEVICE);
 #endif
                         tdinfo->skb_dma[i] = 0;
                 }
@@ -2080,17 +2082,14 @@ static int velocity_xmit(struct sk_buff *skb, struct net_device *dev)
         struct tx_desc *td_ptr;
         struct velocity_td_info *tdinfo;
         unsigned long flags;
-        int pktlen = skb->len;
+        int pktlen;
         __le16 len;
         int index;
 
 
-
-        if (skb->len < ETH_ZLEN) {
-                if (skb_padto(skb, ETH_ZLEN))
-                        goto out;
-                pktlen = ETH_ZLEN;
-        }
+        if (skb_padto(skb, ETH_ZLEN))
+                goto out;
+        pktlen = max_t(unsigned int, skb->len, ETH_ZLEN);
 
         len = cpu_to_le16(pktlen);
 
diff --git a/drivers/net/virtio_net.c b/drivers/net/virtio_net.c
index 63ef2a8905fb..e67d16c2e5f3 100644
--- a/drivers/net/virtio_net.c
+++ b/drivers/net/virtio_net.c
@@ -287,7 +287,7 @@ static void try_fill_recv_maxbufs(struct virtnet_info *vi)
                 skb_put(skb, MAX_PACKET_LEN);
 
                 hdr = skb_vnet_hdr(skb);
-                sg_init_one(sg, hdr, sizeof(*hdr));
+                sg_set_buf(sg, hdr, sizeof(*hdr));
 
                 if (vi->big_packets) {
                         for (i = 0; i < MAX_SKB_FRAGS; i++) {
@@ -488,9 +488,9 @@ static int xmit_skb(struct virtnet_info *vi, struct sk_buff *skb)
 
         /* Encode metadata header at front. */
         if (vi->mergeable_rx_bufs)
-                sg_init_one(sg, mhdr, sizeof(*mhdr));
+                sg_set_buf(sg, mhdr, sizeof(*mhdr));
         else
-                sg_init_one(sg, hdr, sizeof(*hdr));
+                sg_set_buf(sg, hdr, sizeof(*hdr));
 
         num = skb_to_sgvec(skb, sg+1, 0, skb->len) + 1;
 
@@ -612,6 +612,7 @@ static struct ethtool_ops virtnet_ethtool_ops = {
         .set_tx_csum = virtnet_set_tx_csum,
         .set_sg = ethtool_op_set_sg,
         .set_tso = ethtool_op_set_tso,
+        .get_link = ethtool_op_get_link,
 };
 
 #define MIN_MTU 68
@@ -739,6 +740,8 @@ static int virtnet_probe(struct virtio_device *vdev)
                 goto unregister;
         }
 
+        netif_carrier_on(dev);
+
         pr_debug("virtnet: registered device %s\n", dev->name);
         return 0;
 
diff --git a/drivers/net/wimax/i2400m/debugfs.c b/drivers/net/wimax/i2400m/debugfs.c
index 626632985977..9b81af3f80a9 100644
--- a/drivers/net/wimax/i2400m/debugfs.c
+++ b/drivers/net/wimax/i2400m/debugfs.c
@@ -234,20 +234,6 @@ struct dentry *debugfs_create_i2400m_reset(
                                    &fops_i2400m_reset);
 }
 
-/*
- * Debug levels control; see debug.h
- */
-struct d_level D_LEVEL[] = {
-        D_SUBMODULE_DEFINE(control),
-        D_SUBMODULE_DEFINE(driver),
-        D_SUBMODULE_DEFINE(debugfs),
-        D_SUBMODULE_DEFINE(fw),
-        D_SUBMODULE_DEFINE(netdev),
-        D_SUBMODULE_DEFINE(rfkill),
-        D_SUBMODULE_DEFINE(rx),
-        D_SUBMODULE_DEFINE(tx),
-};
-size_t D_LEVEL_SIZE = ARRAY_SIZE(D_LEVEL);
 
 #define __debugfs_register(prefix, name, parent)                        \
 do {                                                                    \
diff --git a/drivers/net/wimax/i2400m/driver.c b/drivers/net/wimax/i2400m/driver.c
index 5f98047e18cf..e80a0b65a754 100644
--- a/drivers/net/wimax/i2400m/driver.c
+++ b/drivers/net/wimax/i2400m/driver.c
@@ -707,6 +707,22 @@ void i2400m_release(struct i2400m *i2400m)
 EXPORT_SYMBOL_GPL(i2400m_release);
 
 
+/*
+ * Debug levels control; see debug.h
+ */
+struct d_level D_LEVEL[] = {
+        D_SUBMODULE_DEFINE(control),
+        D_SUBMODULE_DEFINE(driver),
+        D_SUBMODULE_DEFINE(debugfs),
+        D_SUBMODULE_DEFINE(fw),
+        D_SUBMODULE_DEFINE(netdev),
+        D_SUBMODULE_DEFINE(rfkill),
+        D_SUBMODULE_DEFINE(rx),
+        D_SUBMODULE_DEFINE(tx),
+};
+size_t D_LEVEL_SIZE = ARRAY_SIZE(D_LEVEL);
+
+
 static
 int __init i2400m_driver_init(void)
 {
diff --git a/drivers/net/wimax/i2400m/i2400m.h b/drivers/net/wimax/i2400m/i2400m.h
index 067c871cc226..3b9d27ea2950 100644
--- a/drivers/net/wimax/i2400m/i2400m.h
+++ b/drivers/net/wimax/i2400m/i2400m.h
@@ -157,7 +157,7 @@ enum {
 
 
 /* Firmware version we request when pulling the fw image file */
-#define I2400M_FW_VERSION "1.3"
+#define I2400M_FW_VERSION "1.4"
 
 
 /**
diff --git a/drivers/net/wireless/ath5k/base.c b/drivers/net/wireless/ath5k/base.c
index 8ef87356e083..1d77ee9d6e99 100644
--- a/drivers/net/wireless/ath5k/base.c
+++ b/drivers/net/wireless/ath5k/base.c
@@ -1028,6 +1028,8 @@ ath5k_setup_bands(struct ieee80211_hw *hw)
  * it's done by reseting the chip.  To accomplish this we must
  * first cleanup any pending DMA, then restart stuff after a la
  * ath5k_init.
+ *
+ * Called with sc->lock.
  */
 static int
 ath5k_chan_set(struct ath5k_softc *sc, struct ieee80211_channel *chan)
@@ -1096,6 +1098,42 @@ ath5k_hw_to_driver_rix(struct ath5k_softc *sc, int hw_rix)
 * Buffers setup *
 \***************/
 
+static
+struct sk_buff *ath5k_rx_skb_alloc(struct ath5k_softc *sc, dma_addr_t *skb_addr)
+{
+        struct sk_buff *skb;
+        unsigned int off;
+
+        /*
+         * Allocate buffer with headroom_needed space for the
+         * fake physical layer header at the start.
+         */
+        skb = dev_alloc_skb(sc->rxbufsize + sc->cachelsz - 1);
+
+        if (!skb) {
+                ATH5K_ERR(sc, "can't alloc skbuff of size %u\n",
+                                sc->rxbufsize + sc->cachelsz - 1);
+                return NULL;
+        }
+        /*
+         * Cache-line-align.  This is important (for the
+         * 5210 at least) as not doing so causes bogus data
+         * in rx'd frames.
+         */
+        off = ((unsigned long)skb->data) % sc->cachelsz;
+        if (off != 0)
+                skb_reserve(skb, sc->cachelsz - off);
+
+        *skb_addr = pci_map_single(sc->pdev,
+                skb->data, sc->rxbufsize, PCI_DMA_FROMDEVICE);
+        if (unlikely(pci_dma_mapping_error(sc->pdev, *skb_addr))) {
+                ATH5K_ERR(sc, "%s: DMA mapping failed\n", __func__);
+                dev_kfree_skb(skb);
+                return NULL;
+        }
+        return skb;
+}
+
 static int
 ath5k_rxbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
 {
@@ -1103,37 +1141,11 @@ ath5k_rxbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
         struct sk_buff *skb = bf->skb;
         struct ath5k_desc *ds;
 
-        if (likely(skb == NULL)) {
-                unsigned int off;
-
-                /*
-                 * Allocate buffer with headroom_needed space for the
-                 * fake physical layer header at the start.
-                 */
-                skb = dev_alloc_skb(sc->rxbufsize + sc->cachelsz - 1);
-                if (unlikely(skb == NULL)) {
-                        ATH5K_ERR(sc, "can't alloc skbuff of size %u\n",
-                                        sc->rxbufsize + sc->cachelsz - 1);
+        if (!skb) {
+                skb = ath5k_rx_skb_alloc(sc, &bf->skbaddr);
+                if (!skb)
                         return -ENOMEM;
-                }
-                /*
-                 * Cache-line-align.  This is important (for the
-                 * 5210 at least) as not doing so causes bogus data
-                 * in rx'd frames.
-                 */
-                off = ((unsigned long)skb->data) % sc->cachelsz;
-                if (off != 0)
-                        skb_reserve(skb, sc->cachelsz - off);
-
                 bf->skb = skb;
-                bf->skbaddr = pci_map_single(sc->pdev,
-                        skb->data, sc->rxbufsize, PCI_DMA_FROMDEVICE);
-                if (unlikely(pci_dma_mapping_error(sc->pdev, bf->skbaddr))) {
-                        ATH5K_ERR(sc, "%s: DMA mapping failed\n", __func__);
-                        dev_kfree_skb(skb);
-                        bf->skb = NULL;
-                        return -ENOMEM;
-                }
         }
 
         /*
@@ -1662,7 +1674,8 @@ ath5k_tasklet_rx(unsigned long data)
 {
         struct ieee80211_rx_status rxs = {};
         struct ath5k_rx_status rs = {};
-        struct sk_buff *skb;
+        struct sk_buff *skb, *next_skb;
+        dma_addr_t next_skb_addr;
         struct ath5k_softc *sc = (void *)data;
         struct ath5k_buf *bf, *bf_last;
         struct ath5k_desc *ds;
@@ -1747,10 +1760,17 @@ ath5k_tasklet_rx(unsigned long data)
                                 goto next;
                 }
 accept:
+                next_skb = ath5k_rx_skb_alloc(sc, &next_skb_addr);
+
+                /*
+                 * If we can't replace bf->skb with a new skb under memory
+                 * pressure, just skip this packet
+                 */
+                if (!next_skb)
+                        goto next;
+
                 pci_unmap_single(sc->pdev, bf->skbaddr, sc->rxbufsize,
                                 PCI_DMA_FROMDEVICE);
-                bf->skb = NULL;
-
                 skb_put(skb, rs.rs_datalen);
 
                 /* The MAC header is padded to have 32-bit boundary if the
@@ -1823,6 +1843,9 @@ accept:
                         ath5k_check_ibss_tsf(sc, skb, &rxs);
 
                 __ieee80211_rx(sc->hw, skb, &rxs);
+
+                bf->skb = next_skb;
+                bf->skbaddr = next_skb_addr;
 next:
                 list_move_tail(&bf->list, &sc->rxbuf);
         } while (ath5k_rxbuf_setup(sc, bf) == 0);
@@ -2814,11 +2837,17 @@ ath5k_config(struct ieee80211_hw *hw, u32 changed)
 {
         struct ath5k_softc *sc = hw->priv;
         struct ieee80211_conf *conf = &hw->conf;
+        int ret;
+
+        mutex_lock(&sc->lock);
 
         sc->bintval = conf->beacon_int;
         sc->power_level = conf->power_level;
 
-        return ath5k_chan_set(sc, conf->channel);
+        ret = ath5k_chan_set(sc, conf->channel);
+
+        mutex_unlock(&sc->lock);
+        return ret;
 }
 
 static int
diff --git a/drivers/net/wireless/ath9k/ath9k.h b/drivers/net/wireless/ath9k/ath9k.h
index d27813502953..6650f609ece4 100644
--- a/drivers/net/wireless/ath9k/ath9k.h
+++ b/drivers/net/wireless/ath9k/ath9k.h
@@ -587,8 +587,8 @@ struct ath9k_country_entry {
         u8 iso[3];
 };
 
-#define REG_WRITE(_ah, _reg, _val) iowrite32(_val, _ah->ah_sh + _reg)
-#define REG_READ(_ah, _reg) ioread32(_ah->ah_sh + _reg)
+#define REG_WRITE(_ah, _reg, _val) ath9k_iowrite32((_ah), (_reg), (_val))
+#define REG_READ(_ah, _reg) ath9k_ioread32((_ah), (_reg))
 
 #define SM(_v, _f)  (((_v) << _f##_S) & _f)
 #define MS(_v, _f)  (((_v) & _f) >> _f##_S)
diff --git a/drivers/net/wireless/ath9k/core.h b/drivers/net/wireless/ath9k/core.h
index 4ca2aed236e0..139566cbbf65 100644
--- a/drivers/net/wireless/ath9k/core.h
+++ b/drivers/net/wireless/ath9k/core.h
@@ -701,6 +701,7 @@ struct ath_softc {
         struct ath_hal *sc_ah;
         void __iomem *mem;
         spinlock_t sc_resetlock;
+        spinlock_t sc_serial_rw;
         struct mutex mutex;
 
         u8 sc_curbssid[ETH_ALEN];
@@ -751,4 +752,36 @@ int ath_get_hal_qnum(u16 queue, struct ath_softc *sc);
 int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc);
 int ath_cabq_update(struct ath_softc *);
 
+/*
+ * Read and write, they both share the same lock. We do this to serialize
+ * reads and writes on Atheros 802.11n PCI devices only. This is required
+ * as the FIFO on these devices can only accept sanely 2 requests. After
+ * that the device goes bananas. Serializing the reads/writes prevents this
+ * from happening.
+ */
+
+static inline void ath9k_iowrite32(struct ath_hal *ah, u32 reg_offset, u32 val)
+{
+        if (ah->ah_config.serialize_regmode == SER_REG_MODE_ON) {
+                unsigned long flags;
+                spin_lock_irqsave(&ah->ah_sc->sc_serial_rw, flags);
+                iowrite32(val, ah->ah_sc->mem + reg_offset);
+                spin_unlock_irqrestore(&ah->ah_sc->sc_serial_rw, flags);
+        } else
+                iowrite32(val, ah->ah_sc->mem + reg_offset);
+}
+
+static inline unsigned int ath9k_ioread32(struct ath_hal *ah, u32 reg_offset)
+{
+        u32 val;
+        if (ah->ah_config.serialize_regmode == SER_REG_MODE_ON) {
+                unsigned long flags;
+                spin_lock_irqsave(&ah->ah_sc->sc_serial_rw, flags);
+                val = ioread32(ah->ah_sc->mem + reg_offset);
+                spin_unlock_irqrestore(&ah->ah_sc->sc_serial_rw, flags);
+        } else
+                val = ioread32(ah->ah_sc->mem + reg_offset);
+        return val;
+}
+
 #endif /* CORE_H */
diff --git a/drivers/net/wireless/ath9k/hw.c b/drivers/net/wireless/ath9k/hw.c
index 34474edefc97..c38a00bbce64 100644
--- a/drivers/net/wireless/ath9k/hw.c
+++ b/drivers/net/wireless/ath9k/hw.c
@@ -437,6 +437,25 @@ static void ath9k_hw_set_defaults(struct ath_hal *ah)
         }
 
         ah->ah_config.intr_mitigation = 1;
+
+        /*
+         * We need this for PCI devices only (Cardbus, PCI, miniPCI)
+         * _and_ if on non-uniprocessor systems (Multiprocessor/HT).
+         * This means we use it for all AR5416 devices, and the few
+         * minor PCI AR9280 devices out there.
+         *
+         * Serialization is required because these devices do not handle
+         * well the case of two concurrent reads/writes due to the latency
+         * involved. During one read/write another read/write can be issued
+         * on another CPU while the previous read/write may still be working
+         * on our hardware, if we hit this case the hardware poops in a loop.
+         * We prevent this by serializing reads and writes.
+         *
+         * This issue is not present on PCI-Express devices or pre-AR5416
+         * devices (legacy, 802.11abg).
+         */
+        if (num_possible_cpus() > 1)
+                ah->ah_config.serialize_regmode = SER_REG_MODE_AUTO;
 }
 
 static struct ath_hal_5416 *ath9k_hw_newstate(u16 devid,
@@ -668,7 +687,8 @@ static struct ath_hal *ath9k_hw_do_attach(u16 devid, struct ath_softc *sc,
         }
 
         if (ah->ah_config.serialize_regmode == SER_REG_MODE_AUTO) {
-                if (ah->ah_macVersion == AR_SREV_VERSION_5416_PCI) {
+                if (ah->ah_macVersion == AR_SREV_VERSION_5416_PCI ||
+                    (AR_SREV_9280(ah) && !ah->ah_isPciExpress)) {
                         ah->ah_config.serialize_regmode =
                                 SER_REG_MODE_ON;
                 } else {
diff --git a/drivers/net/wireless/ath9k/main.c b/drivers/net/wireless/ath9k/main.c
index 727f067aca4f..3c04044a60bd 100644
--- a/drivers/net/wireless/ath9k/main.c
+++ b/drivers/net/wireless/ath9k/main.c
@@ -1336,6 +1336,7 @@ static int ath_init(u16 devid, struct ath_softc *sc)
                 printk(KERN_ERR "Unable to create debugfs files\n");
 
         spin_lock_init(&sc->sc_resetlock);
+        spin_lock_init(&sc->sc_serial_rw);
         mutex_init(&sc->mutex);
         tasklet_init(&sc->intr_tq, ath9k_tasklet, (unsigned long)sc);
         tasklet_init(&sc->bcon_tasklet, ath9k_beacon_tasklet,
@@ -1538,6 +1539,7 @@ bad2:
 bad:
         if (ah)
                 ath9k_hw_detach(ah);
+        ath9k_exit_debug(sc);
 
         return error;
 }
@@ -1545,7 +1547,7 @@ bad:
 static int ath_attach(u16 devid, struct ath_softc *sc)
 {
         struct ieee80211_hw *hw = sc->hw;
-        int error = 0;
+        int error = 0, i;
 
         DPRINTF(sc, ATH_DBG_CONFIG, "Attach ATH hw\n");
 
@@ -1589,11 +1591,11 @@ static int ath_attach(u16 devid, struct ath_softc *sc)
         /* initialize tx/rx engine */
         error = ath_tx_init(sc, ATH_TXBUF);
         if (error != 0)
-                goto detach;
+                goto error_attach;
 
         error = ath_rx_init(sc, ATH_RXBUF);
         if (error != 0)
-                goto detach;
+                goto error_attach;
 
 #if defined(CONFIG_RFKILL) || defined(CONFIG_RFKILL_MODULE)
         /* Initialze h/w Rfkill */
@@ -1601,8 +1603,9 @@ static int ath_attach(u16 devid, struct ath_softc *sc)
                 INIT_DELAYED_WORK(&sc->rf_kill.rfkill_poll, ath_rfkill_poll);
 
         /* Initialize s/w rfkill */
-        if (ath_init_sw_rfkill(sc))
-                goto detach;
+        error = ath_init_sw_rfkill(sc);
+        if (error)
+                goto error_attach;
 #endif
 
         error = ieee80211_register_hw(hw);
@@ -1611,8 +1614,16 @@ static int ath_attach(u16 devid, struct ath_softc *sc)
         ath_init_leds(sc);
 
         return 0;
-detach:
-        ath_detach(sc);
+
+error_attach:
+        /* cleanup tx queues */
+        for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
+                if (ATH_TXQ_SETUP(sc, i))
+                        ath_tx_cleanupq(sc, &sc->tx.txq[i]);
+
+        ath9k_hw_detach(sc->sc_ah);
+        ath9k_exit_debug(sc);
+
         return error;
 }
 
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.c b/drivers/net/wireless/iwlwifi/iwl-agn.c
index 0dc8eed16404..129e2d330abb 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn.c
@@ -1719,6 +1719,10 @@ static int iwl_read_ucode(struct iwl_priv *priv)
         priv->ucode_data_backup.len = data_size;
         iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
 
+        if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
+            !priv->ucode_data_backup.v_addr)
+                goto err_pci_alloc;
+
         /* Initialization instructions and data */
         if (init_size && init_data_size) {
                 priv->ucode_init.len = init_size;
@@ -3864,7 +3868,7 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
         }
         err = iwl_eeprom_check_version(priv);
         if (err)
-                goto out_iounmap;
+                goto out_free_eeprom;
 
         /* extract MAC Address */
         iwl_eeprom_get_mac(priv, priv->mac_addr);
@@ -3941,6 +3945,8 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
         return 0;
 
  out_remove_sysfs:
+        destroy_workqueue(priv->workqueue);
+        priv->workqueue = NULL;
         sysfs_remove_group(&pdev->dev.kobj, &iwl_attribute_group);
  out_uninit_drv:
         iwl_uninit_drv(priv);
@@ -3949,8 +3955,8 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  out_iounmap:
         pci_iounmap(pdev, priv->hw_base);
  out_pci_release_regions:
-        pci_release_regions(pdev);
         pci_set_drvdata(pdev, NULL);
+        pci_release_regions(pdev);
  out_pci_disable_device:
         pci_disable_device(pdev);
  out_ieee80211_free_hw:
@@ -4038,6 +4044,19 @@ static int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
                 priv->is_open = 1;
         }
 
+        /* pci driver assumes state will be saved in this function.
+         * pci state is saved and device disabled when interface is
+         * stopped, so at this time pci device will always be disabled -
+         * whether interface was started or not. saving pci state now will
+         * cause saved state be that of a disabled device, which will cause
+         * problems during resume in that we will end up with a disabled device.
+         *
+         * indicate that the current saved state (from when interface was
+         * stopped) is valid. if interface was never up at time of suspend
+         * then the saved state will still be valid as it was saved during
+         * .probe. */
+        pdev->state_saved = true;
+
         pci_set_power_state(pdev, PCI_D3hot);
 
         return 0;
diff --git a/drivers/net/wireless/iwlwifi/iwl-sta.c b/drivers/net/wireless/iwlwifi/iwl-sta.c
index 412f66bac1af..70a8b21ca39b 100644
--- a/drivers/net/wireless/iwlwifi/iwl-sta.c
+++ b/drivers/net/wireless/iwlwifi/iwl-sta.c
@@ -480,6 +480,9 @@ void iwl_clear_stations_table(struct iwl_priv *priv)
         priv->num_stations = 0;
         memset(priv->stations, 0, sizeof(priv->stations));
 
+        /* clean ucode key table bit map */
+        priv->ucode_key_table = 0;
+
         spin_unlock_irqrestore(&priv->sta_lock, flags);
 }
 EXPORT_SYMBOL(iwl_clear_stations_table);
diff --git a/drivers/net/wireless/iwlwifi/iwl-tx.c b/drivers/net/wireless/iwlwifi/iwl-tx.c
index b0ee86c62685..ab13ff22a8c0 100644
--- a/drivers/net/wireless/iwlwifi/iwl-tx.c
+++ b/drivers/net/wireless/iwlwifi/iwl-tx.c
@@ -148,7 +148,7 @@ static void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
                 pci_unmap_single(dev,
                                 pci_unmap_addr(&txq->cmd[index]->meta, mapping),
                                 pci_unmap_len(&txq->cmd[index]->meta, len),
-                                PCI_DMA_TODEVICE);
+                                PCI_DMA_BIDIRECTIONAL);
 
         /* Unmap chunks, if any. */
         for (i = 1; i < num_tbs; i++) {
@@ -964,7 +964,7 @@ int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
          * within command buffer array. */
         txcmd_phys = pci_map_single(priv->pci_dev,
                                     out_cmd, sizeof(struct iwl_cmd),
-                                    PCI_DMA_TODEVICE);
+                                    PCI_DMA_BIDIRECTIONAL);
         pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys);
         pci_unmap_len_set(&out_cmd->meta, len, sizeof(struct iwl_cmd));
         /* Add buffer containing Tx command and MAC(!) header to TFD's
@@ -1115,7 +1115,7 @@ int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
                         IWL_MAX_SCAN_SIZE : sizeof(struct iwl_cmd);
 
         phys_addr = pci_map_single(priv->pci_dev, out_cmd,
-                                   len, PCI_DMA_TODEVICE);
+                                   len, PCI_DMA_BIDIRECTIONAL);
         pci_unmap_addr_set(&out_cmd->meta, mapping, phys_addr);
         pci_unmap_len_set(&out_cmd->meta, len, len);
         phys_addr += offsetof(struct iwl_cmd, hdr);
@@ -1212,7 +1212,7 @@ static void iwl_hcmd_queue_reclaim(struct iwl_priv *priv, int txq_id,
         pci_unmap_single(priv->pci_dev,
                 pci_unmap_addr(&txq->cmd[cmd_idx]->meta, mapping),
                 pci_unmap_len(&txq->cmd[cmd_idx]->meta, len),
-                PCI_DMA_TODEVICE);
+                PCI_DMA_BIDIRECTIONAL);
 
         for (idx = iwl_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx;
              q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
diff --git a/drivers/net/wireless/iwlwifi/iwl3945-base.c b/drivers/net/wireless/iwlwifi/iwl3945-base.c
index 95d01984c80e..57dd34e256d8 100644
--- a/drivers/net/wireless/iwlwifi/iwl3945-base.c
+++ b/drivers/net/wireless/iwlwifi/iwl3945-base.c
@@ -7911,7 +7911,7 @@ static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e
                                 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
         if (err < 0) {
                 IWL_DEBUG_INFO("Failed to init the card\n");
-                goto out_remove_sysfs;
+                goto out_iounmap;
         }
 
         /***********************
@@ -7921,7 +7921,7 @@ static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e
         err = iwl3945_eeprom_init(priv);
         if (err) {
                 IWL_ERROR("Unable to init EEPROM\n");
-                goto out_remove_sysfs;
+                goto out_iounmap;
         }
         /* MAC Address location in EEPROM same for 3945/4965 */
         get_eeprom_mac(priv, priv->mac_addr);
@@ -7975,7 +7975,7 @@ static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e
         err = iwl3945_init_channel_map(priv);
         if (err) {
                 IWL_ERROR("initializing regulatory failed: %d\n", err);
-                goto out_release_irq;
+                goto out_unset_hw_setting;
         }
 
         err = iwl3945_init_geos(priv);
@@ -8045,25 +8045,22 @@ static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e
         return 0;
 
  out_remove_sysfs:
+        destroy_workqueue(priv->workqueue);
+        priv->workqueue = NULL;
         sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  out_free_geos:
         iwl3945_free_geos(priv);
  out_free_channel_map:
         iwl3945_free_channel_map(priv);
-
-
- out_release_irq:
-        destroy_workqueue(priv->workqueue);
-        priv->workqueue = NULL;
+ out_unset_hw_setting:
         iwl3945_unset_hw_setting(priv);
-
  out_iounmap:
         pci_iounmap(pdev, priv->hw_base);
  out_pci_release_regions:
         pci_release_regions(pdev);
  out_pci_disable_device:
-        pci_disable_device(pdev);
         pci_set_drvdata(pdev, NULL);
+        pci_disable_device(pdev);
  out_ieee80211_free_hw:
         ieee80211_free_hw(priv->hw);
  out:
@@ -8143,6 +8140,19 @@ static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
                 priv->is_open = 1;
         }
 
+        /* pci driver assumes state will be saved in this function.
+         * pci state is saved and device disabled when interface is
+         * stopped, so at this time pci device will always be disabled -
+         * whether interface was started or not. saving pci state now will
+         * cause saved state be that of a disabled device, which will cause
+         * problems during resume in that we will end up with a disabled device.
+         *
+         * indicate that the current saved state (from when interface was
+         * stopped) is valid. if interface was never up at time of suspend
+         * then the saved state will still be valid as it was saved during
+         * .probe. */
+        pdev->state_saved = true;
+
         pci_set_power_state(pdev, PCI_D3hot);
 
         return 0;
diff --git a/drivers/net/wireless/libertas/ethtool.c b/drivers/net/wireless/libertas/ethtool.c
index 61d2f50470c8..b118a35ec605 100644
--- a/drivers/net/wireless/libertas/ethtool.c
+++ b/drivers/net/wireless/libertas/ethtool.c
@@ -23,7 +23,7 @@ static const char * mesh_stat_strings[]= {
 static void lbs_ethtool_get_drvinfo(struct net_device *dev,
                                          struct ethtool_drvinfo *info)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
 
         snprintf(info->fw_version, 32, "%u.%u.%u.p%u",
                 priv->fwrelease >> 24 & 0xff,
@@ -47,7 +47,7 @@ static int lbs_ethtool_get_eeprom_len(struct net_device *dev)
 static int lbs_ethtool_get_eeprom(struct net_device *dev,
                                   struct ethtool_eeprom *eeprom, u8 * bytes)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
         struct cmd_ds_802_11_eeprom_access cmd;
         int ret;
 
@@ -76,7 +76,7 @@ out:
 static void lbs_ethtool_get_stats(struct net_device *dev,
                                   struct ethtool_stats *stats, uint64_t *data)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
         struct cmd_ds_mesh_access mesh_access;
         int ret;
 
@@ -113,7 +113,7 @@ static void lbs_ethtool_get_stats(struct net_device *dev,
 
 static int lbs_ethtool_get_sset_count(struct net_device *dev, int sset)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
 
         if (sset == ETH_SS_STATS && dev == priv->mesh_dev)
                 return MESH_STATS_NUM;
@@ -143,7 +143,7 @@ static void lbs_ethtool_get_strings(struct net_device *dev,
 static void lbs_ethtool_get_wol(struct net_device *dev,
                                 struct ethtool_wolinfo *wol)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
 
         if (priv->wol_criteria == 0xffffffff) {
                 /* Interface driver didn't configure wake */
@@ -166,7 +166,7 @@ static void lbs_ethtool_get_wol(struct net_device *dev,
 static int lbs_ethtool_set_wol(struct net_device *dev,
                                struct ethtool_wolinfo *wol)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
         uint32_t criteria = 0;
 
         if (priv->wol_criteria == 0xffffffff && wol->wolopts)
diff --git a/drivers/net/wireless/libertas/if_usb.c b/drivers/net/wireless/libertas/if_usb.c
index 2fc637ad85c7..ea3dc038be76 100644
--- a/drivers/net/wireless/libertas/if_usb.c
+++ b/drivers/net/wireless/libertas/if_usb.c
@@ -59,7 +59,7 @@ static int if_usb_reset_device(struct if_usb_card *cardp);
 static ssize_t if_usb_firmware_set(struct device *dev,
                 struct device_attribute *attr, const char *buf, size_t count)
 {
-        struct lbs_private *priv = netdev_priv(to_net_dev(dev));
+        struct lbs_private *priv = to_net_dev(dev)->ml_priv;
         struct if_usb_card *cardp = priv->card;
         char fwname[FIRMWARE_NAME_MAX];
         int ret;
@@ -86,7 +86,7 @@ static DEVICE_ATTR(lbs_flash_fw, 0200, NULL, if_usb_firmware_set);
 static ssize_t if_usb_boot2_set(struct device *dev,
                 struct device_attribute *attr, const char *buf, size_t count)
 {
-        struct lbs_private *priv = netdev_priv(to_net_dev(dev));
+        struct lbs_private *priv = to_net_dev(dev)->ml_priv;
         struct if_usb_card *cardp = priv->card;
         char fwname[FIRMWARE_NAME_MAX];
         int ret;
diff --git a/drivers/net/wireless/libertas/main.c b/drivers/net/wireless/libertas/main.c
index 4e0007d20030..f76623e0ff9a 100644
--- a/drivers/net/wireless/libertas/main.c
+++ b/drivers/net/wireless/libertas/main.c
@@ -222,7 +222,7 @@ u8 lbs_data_rate_to_fw_index(u32 rate)
 static ssize_t lbs_anycast_get(struct device *dev,
                 struct device_attribute *attr, char * buf)
 {
-        struct lbs_private *priv = netdev_priv(to_net_dev(dev));
+        struct lbs_private *priv = to_net_dev(dev)->ml_priv;
         struct cmd_ds_mesh_access mesh_access;
         int ret;
 
@@ -241,7 +241,7 @@ static ssize_t lbs_anycast_get(struct device *dev,
 static ssize_t lbs_anycast_set(struct device *dev,
                 struct device_attribute *attr, const char * buf, size_t count)
 {
-        struct lbs_private *priv = netdev_priv(to_net_dev(dev));
+        struct lbs_private *priv = to_net_dev(dev)->ml_priv;
         struct cmd_ds_mesh_access mesh_access;
         uint32_t datum;
         int ret;
@@ -263,7 +263,7 @@ static ssize_t lbs_anycast_set(struct device *dev,
 static ssize_t lbs_prb_rsp_limit_get(struct device *dev,
                 struct device_attribute *attr, char *buf)
 {
-        struct lbs_private *priv = netdev_priv(to_net_dev(dev));
+        struct lbs_private *priv = to_net_dev(dev)->ml_priv;
         struct cmd_ds_mesh_access mesh_access;
         int ret;
         u32 retry_limit;
@@ -286,7 +286,7 @@ static ssize_t lbs_prb_rsp_limit_get(struct device *dev,
 static ssize_t lbs_prb_rsp_limit_set(struct device *dev,
                 struct device_attribute *attr, const char *buf, size_t count)
 {
-        struct lbs_private *priv = netdev_priv(to_net_dev(dev));
+        struct lbs_private *priv = to_net_dev(dev)->ml_priv;
         struct cmd_ds_mesh_access mesh_access;
         int ret;
         unsigned long retry_limit;
@@ -321,7 +321,7 @@ static void lbs_remove_mesh(struct lbs_private *priv);
 static ssize_t lbs_rtap_get(struct device *dev,
                 struct device_attribute *attr, char * buf)
 {
-        struct lbs_private *priv = netdev_priv(to_net_dev(dev));
+        struct lbs_private *priv = to_net_dev(dev)->ml_priv;
         return snprintf(buf, 5, "0x%X\n", priv->monitormode);
 }
 
@@ -332,7 +332,7 @@ static ssize_t lbs_rtap_set(struct device *dev,
                 struct device_attribute *attr, const char * buf, size_t count)
 {
         int monitor_mode;
-        struct lbs_private *priv = netdev_priv(to_net_dev(dev));
+        struct lbs_private *priv = to_net_dev(dev)->ml_priv;
 
         sscanf(buf, "%x", &monitor_mode);
         if (monitor_mode) {
@@ -383,7 +383,7 @@ static DEVICE_ATTR(lbs_rtap, 0644, lbs_rtap_get, lbs_rtap_set );
 static ssize_t lbs_mesh_get(struct device *dev,
                 struct device_attribute *attr, char * buf)
 {
-        struct lbs_private *priv = netdev_priv(to_net_dev(dev));
+        struct lbs_private *priv = to_net_dev(dev)->ml_priv;
         return snprintf(buf, 5, "0x%X\n", !!priv->mesh_dev);
 }
 
@@ -393,7 +393,7 @@ static ssize_t lbs_mesh_get(struct device *dev,
 static ssize_t lbs_mesh_set(struct device *dev,
                 struct device_attribute *attr, const char * buf, size_t count)
 {
-        struct lbs_private *priv = netdev_priv(to_net_dev(dev));
+        struct lbs_private *priv = to_net_dev(dev)->ml_priv;
         int enable;
         int ret, action = CMD_ACT_MESH_CONFIG_STOP;
 
@@ -452,7 +452,7 @@ static struct attribute_group lbs_mesh_attr_group = {
  */
 static int lbs_dev_open(struct net_device *dev)
 {
-        struct lbs_private *priv = netdev_priv(dev) ;
+        struct lbs_private *priv = dev->ml_priv;
         int ret = 0;
 
         lbs_deb_enter(LBS_DEB_NET);
@@ -521,7 +521,7 @@ static int lbs_mesh_stop(struct net_device *dev)
  */
 static int lbs_eth_stop(struct net_device *dev)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
 
         lbs_deb_enter(LBS_DEB_NET);
 
@@ -538,7 +538,7 @@ static int lbs_eth_stop(struct net_device *dev)
 
 static void lbs_tx_timeout(struct net_device *dev)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
 
         lbs_deb_enter(LBS_DEB_TX);
 
@@ -590,7 +590,7 @@ EXPORT_SYMBOL_GPL(lbs_host_to_card_done);
  */
 static struct net_device_stats *lbs_get_stats(struct net_device *dev)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
 
         lbs_deb_enter(LBS_DEB_NET);
         return &priv->stats;
@@ -599,7 +599,7 @@ static struct net_device_stats *lbs_get_stats(struct net_device *dev)
 static int lbs_set_mac_address(struct net_device *dev, void *addr)
 {
         int ret = 0;
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
         struct sockaddr *phwaddr = addr;
         struct cmd_ds_802_11_mac_address cmd;
 
@@ -732,7 +732,7 @@ static void lbs_set_mcast_worker(struct work_struct *work)
 
 static void lbs_set_multicast_list(struct net_device *dev)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
 
         schedule_work(&priv->mcast_work);
 }
@@ -748,7 +748,7 @@ static void lbs_set_multicast_list(struct net_device *dev)
 static int lbs_thread(void *data)
 {
         struct net_device *dev = data;
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
         wait_queue_t wait;
 
         lbs_deb_enter(LBS_DEB_THREAD);
@@ -1184,6 +1184,7 @@ struct lbs_private *lbs_add_card(void *card, struct device *dmdev)
                 goto done;
         }
         priv = netdev_priv(dev);
+        dev->ml_priv = priv;
 
         if (lbs_init_adapter(priv)) {
                 lbs_pr_err("failed to initialize adapter structure.\n");
diff --git a/drivers/net/wireless/libertas/persistcfg.c b/drivers/net/wireless/libertas/persistcfg.c
index d42b7a5a1b3f..18fe29faf99b 100644
--- a/drivers/net/wireless/libertas/persistcfg.c
+++ b/drivers/net/wireless/libertas/persistcfg.c
@@ -18,7 +18,7 @@
 static int mesh_get_default_parameters(struct device *dev,
                                        struct mrvl_mesh_defaults *defs)
 {
-        struct lbs_private *priv = netdev_priv(to_net_dev(dev));
+        struct lbs_private *priv = to_net_dev(dev)->ml_priv;
         struct cmd_ds_mesh_config cmd;
         int ret;
 
@@ -57,7 +57,7 @@ static ssize_t bootflag_get(struct device *dev,
 static ssize_t bootflag_set(struct device *dev, struct device_attribute *attr,
                             const char *buf, size_t count)
 {
-        struct lbs_private *priv = netdev_priv(to_net_dev(dev));
+        struct lbs_private *priv = to_net_dev(dev)->ml_priv;
         struct cmd_ds_mesh_config cmd;
         uint32_t datum;
         int ret;
@@ -100,7 +100,7 @@ static ssize_t boottime_get(struct device *dev,
 static ssize_t boottime_set(struct device *dev,
                 struct device_attribute *attr, const char *buf, size_t count)
 {
-        struct lbs_private *priv = netdev_priv(to_net_dev(dev));
+        struct lbs_private *priv = to_net_dev(dev)->ml_priv;
         struct cmd_ds_mesh_config cmd;
         uint32_t datum;
         int ret;
@@ -152,7 +152,7 @@ static ssize_t channel_get(struct device *dev,
 static ssize_t channel_set(struct device *dev, struct device_attribute *attr,
                            const char *buf, size_t count)
 {
-        struct lbs_private *priv = netdev_priv(to_net_dev(dev));
+        struct lbs_private *priv = to_net_dev(dev)->ml_priv;
         struct cmd_ds_mesh_config cmd;
         uint32_t datum;
         int ret;
@@ -210,7 +210,7 @@ static ssize_t mesh_id_set(struct device *dev, struct device_attribute *attr,
         struct cmd_ds_mesh_config cmd;
         struct mrvl_mesh_defaults defs;
         struct mrvl_meshie *ie;
-        struct lbs_private *priv = netdev_priv(to_net_dev(dev));
+        struct lbs_private *priv = to_net_dev(dev)->ml_priv;
         int len;
         int ret;
 
@@ -269,7 +269,7 @@ static ssize_t protocol_id_set(struct device *dev,
         struct cmd_ds_mesh_config cmd;
         struct mrvl_mesh_defaults defs;
         struct mrvl_meshie *ie;
-        struct lbs_private *priv = netdev_priv(to_net_dev(dev));
+        struct lbs_private *priv = to_net_dev(dev)->ml_priv;
         uint32_t datum;
         int ret;
 
@@ -323,7 +323,7 @@ static ssize_t metric_id_set(struct device *dev, struct device_attribute *attr,
         struct cmd_ds_mesh_config cmd;
         struct mrvl_mesh_defaults defs;
         struct mrvl_meshie *ie;
-        struct lbs_private *priv = netdev_priv(to_net_dev(dev));
+        struct lbs_private *priv = to_net_dev(dev)->ml_priv;
         uint32_t datum;
         int ret;
 
@@ -377,7 +377,7 @@ static ssize_t capability_set(struct device *dev, struct device_attribute *attr,
         struct cmd_ds_mesh_config cmd;
         struct mrvl_mesh_defaults defs;
         struct mrvl_meshie *ie;
-        struct lbs_private *priv = netdev_priv(to_net_dev(dev));
+        struct lbs_private *priv = to_net_dev(dev)->ml_priv;
         uint32_t datum;
         int ret;
 
diff --git a/drivers/net/wireless/libertas/scan.c b/drivers/net/wireless/libertas/scan.c
index 57f6c12cda20..9014950f4328 100644
--- a/drivers/net/wireless/libertas/scan.c
+++ b/drivers/net/wireless/libertas/scan.c
@@ -945,7 +945,7 @@ int lbs_set_scan(struct net_device *dev, struct iw_request_info *info,
                  union iwreq_data *wrqu, char *extra)
 {
         DECLARE_SSID_BUF(ssid);
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
         int ret = 0;
 
         lbs_deb_enter(LBS_DEB_WEXT);
@@ -1008,7 +1008,7 @@ int lbs_get_scan(struct net_device *dev, struct iw_request_info *info,
                  struct iw_point *dwrq, char *extra)
 {
 #define SCAN_ITEM_SIZE 128
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
         int err = 0;
         char *ev = extra;
         char *stop = ev + dwrq->length;
diff --git a/drivers/net/wireless/libertas/tx.c b/drivers/net/wireless/libertas/tx.c
index dac462641170..68bec31ae03b 100644
--- a/drivers/net/wireless/libertas/tx.c
+++ b/drivers/net/wireless/libertas/tx.c
@@ -60,7 +60,7 @@ static u32 convert_radiotap_rate_to_mv(u8 rate)
 int lbs_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
 {
         unsigned long flags;
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
         struct txpd *txpd;
         char *p802x_hdr;
         uint16_t pkt_len;
diff --git a/drivers/net/wireless/libertas/wext.c b/drivers/net/wireless/libertas/wext.c
index c6102e08179e..f16d136ab4bb 100644
--- a/drivers/net/wireless/libertas/wext.c
+++ b/drivers/net/wireless/libertas/wext.c
@@ -163,7 +163,7 @@ static int lbs_get_name(struct net_device *dev, struct iw_request_info *info,
 static int lbs_get_freq(struct net_device *dev, struct iw_request_info *info,
                          struct iw_freq *fwrq, char *extra)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
         struct chan_freq_power *cfp;
 
         lbs_deb_enter(LBS_DEB_WEXT);
@@ -189,7 +189,7 @@ static int lbs_get_freq(struct net_device *dev, struct iw_request_info *info,
 static int lbs_get_wap(struct net_device *dev, struct iw_request_info *info,
                         struct sockaddr *awrq, char *extra)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
 
         lbs_deb_enter(LBS_DEB_WEXT);
 
@@ -207,7 +207,7 @@ static int lbs_get_wap(struct net_device *dev, struct iw_request_info *info,
 static int lbs_set_nick(struct net_device *dev, struct iw_request_info *info,
                          struct iw_point *dwrq, char *extra)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
 
         lbs_deb_enter(LBS_DEB_WEXT);
 
@@ -231,7 +231,7 @@ static int lbs_set_nick(struct net_device *dev, struct iw_request_info *info,
 static int lbs_get_nick(struct net_device *dev, struct iw_request_info *info,
                          struct iw_point *dwrq, char *extra)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
 
         lbs_deb_enter(LBS_DEB_WEXT);
 
@@ -248,7 +248,7 @@ static int lbs_get_nick(struct net_device *dev, struct iw_request_info *info,
 static int mesh_get_nick(struct net_device *dev, struct iw_request_info *info,
                          struct iw_point *dwrq, char *extra)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
 
         lbs_deb_enter(LBS_DEB_WEXT);
 
@@ -273,7 +273,7 @@ static int lbs_set_rts(struct net_device *dev, struct iw_request_info *info,
                         struct iw_param *vwrq, char *extra)
 {
         int ret = 0;
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
         u32 val = vwrq->value;
 
         lbs_deb_enter(LBS_DEB_WEXT);
@@ -293,7 +293,7 @@ static int lbs_set_rts(struct net_device *dev, struct iw_request_info *info,
 static int lbs_get_rts(struct net_device *dev, struct iw_request_info *info,
                         struct iw_param *vwrq, char *extra)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
         int ret = 0;
         u16 val = 0;
 
@@ -315,7 +315,7 @@ out:
 static int lbs_set_frag(struct net_device *dev, struct iw_request_info *info,
                          struct iw_param *vwrq, char *extra)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
         int ret = 0;
         u32 val = vwrq->value;
 
@@ -336,7 +336,7 @@ static int lbs_set_frag(struct net_device *dev, struct iw_request_info *info,
 static int lbs_get_frag(struct net_device *dev, struct iw_request_info *info,
                          struct iw_param *vwrq, char *extra)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
         int ret = 0;
         u16 val = 0;
 
@@ -359,7 +359,7 @@ out:
 static int lbs_get_mode(struct net_device *dev,
                          struct iw_request_info *info, u32 * uwrq, char *extra)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
 
         lbs_deb_enter(LBS_DEB_WEXT);
 
@@ -385,7 +385,7 @@ static int lbs_get_txpow(struct net_device *dev,
                           struct iw_request_info *info,
                           struct iw_param *vwrq, char *extra)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
         s16 curlevel = 0;
         int ret = 0;
 
@@ -418,7 +418,7 @@ out:
 static int lbs_set_retry(struct net_device *dev, struct iw_request_info *info,
                           struct iw_param *vwrq, char *extra)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
         int ret = 0;
         u16 slimit = 0, llimit = 0;
 
@@ -466,7 +466,7 @@ out:
 static int lbs_get_retry(struct net_device *dev, struct iw_request_info *info,
                           struct iw_param *vwrq, char *extra)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
         int ret = 0;
         u16 val = 0;
 
@@ -542,7 +542,7 @@ static int lbs_get_range(struct net_device *dev, struct iw_request_info *info,
                           struct iw_point *dwrq, char *extra)
 {
         int i, j;
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
         struct iw_range *range = (struct iw_range *)extra;
         struct chan_freq_power *cfp;
         u8 rates[MAX_RATES + 1];
@@ -708,7 +708,7 @@ out:
 static int lbs_set_power(struct net_device *dev, struct iw_request_info *info,
                           struct iw_param *vwrq, char *extra)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
 
         lbs_deb_enter(LBS_DEB_WEXT);
 
@@ -758,7 +758,7 @@ static int lbs_set_power(struct net_device *dev, struct iw_request_info *info,
 static int lbs_get_power(struct net_device *dev, struct iw_request_info *info,
                           struct iw_param *vwrq, char *extra)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
 
         lbs_deb_enter(LBS_DEB_WEXT);
 
@@ -781,7 +781,7 @@ static struct iw_statistics *lbs_get_wireless_stats(struct net_device *dev)
                 EXCELLENT = 95,
                 PERFECT = 100
         };
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
         u32 rssi_qual;
         u32 tx_qual;
         u32 quality = 0;
@@ -886,7 +886,7 @@ static int lbs_set_freq(struct net_device *dev, struct iw_request_info *info,
                   struct iw_freq *fwrq, char *extra)
 {
         int ret = -EINVAL;
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
         struct chan_freq_power *cfp;
         struct assoc_request * assoc_req;
 
@@ -943,7 +943,7 @@ static int lbs_mesh_set_freq(struct net_device *dev,
                              struct iw_request_info *info,
                              struct iw_freq *fwrq, char *extra)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
         struct chan_freq_power *cfp;
         int ret = -EINVAL;
 
@@ -994,7 +994,7 @@ out:
 static int lbs_set_rate(struct net_device *dev, struct iw_request_info *info,
                   struct iw_param *vwrq, char *extra)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
         u8 new_rate = 0;
         int ret = -EINVAL;
         u8 rates[MAX_RATES + 1];
@@ -1054,7 +1054,7 @@ out:
 static int lbs_get_rate(struct net_device *dev, struct iw_request_info *info,
                   struct iw_param *vwrq, char *extra)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
 
         lbs_deb_enter(LBS_DEB_WEXT);
 
@@ -1079,7 +1079,7 @@ static int lbs_set_mode(struct net_device *dev,
                   struct iw_request_info *info, u32 * uwrq, char *extra)
 {
         int ret = 0;
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
         struct assoc_request * assoc_req;
 
         lbs_deb_enter(LBS_DEB_WEXT);
@@ -1124,7 +1124,7 @@ static int lbs_get_encode(struct net_device *dev,
                            struct iw_request_info *info,
                            struct iw_point *dwrq, u8 * extra)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
         int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
 
         lbs_deb_enter(LBS_DEB_WEXT);
@@ -1319,7 +1319,7 @@ static int lbs_set_encode(struct net_device *dev,
                     struct iw_point *dwrq, char *extra)
 {
         int ret = 0;
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
         struct assoc_request * assoc_req;
         u16 is_default = 0, index = 0, set_tx_key = 0;
 
@@ -1395,7 +1395,7 @@ static int lbs_get_encodeext(struct net_device *dev,
                               char *extra)
 {
         int ret = -EINVAL;
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
         struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
         int index, max_key_len;
 
@@ -1501,7 +1501,7 @@ static int lbs_set_encodeext(struct net_device *dev,
                               char *extra)
 {
         int ret = 0;
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
         struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
         int alg = ext->alg;
         struct assoc_request * assoc_req;
@@ -1639,7 +1639,7 @@ static int lbs_set_genie(struct net_device *dev,
                           struct iw_point *dwrq,
                           char *extra)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
         int ret = 0;
         struct assoc_request * assoc_req;
 
@@ -1685,7 +1685,7 @@ static int lbs_get_genie(struct net_device *dev,
                           char *extra)
 {
         int ret = 0;
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
 
         lbs_deb_enter(LBS_DEB_WEXT);
 
@@ -1713,7 +1713,7 @@ static int lbs_set_auth(struct net_device *dev,
                          struct iw_param *dwrq,
                          char *extra)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
         struct assoc_request * assoc_req;
         int ret = 0;
         int updated = 0;
@@ -1816,7 +1816,7 @@ static int lbs_get_auth(struct net_device *dev,
                          char *extra)
 {
         int ret = 0;
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
 
         lbs_deb_enter(LBS_DEB_WEXT);
 
@@ -1857,7 +1857,7 @@ static int lbs_set_txpow(struct net_device *dev, struct iw_request_info *info,
                    struct iw_param *vwrq, char *extra)
 {
         int ret = 0;
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
         s16 dbm = (s16) vwrq->value;
 
         lbs_deb_enter(LBS_DEB_WEXT);
@@ -1936,7 +1936,7 @@ out:
 static int lbs_get_essid(struct net_device *dev, struct iw_request_info *info,
                    struct iw_point *dwrq, char *extra)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
 
         lbs_deb_enter(LBS_DEB_WEXT);
 
@@ -1971,7 +1971,7 @@ static int lbs_get_essid(struct net_device *dev, struct iw_request_info *info,
 static int lbs_set_essid(struct net_device *dev, struct iw_request_info *info,
                    struct iw_point *dwrq, char *extra)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
         int ret = 0;
         u8 ssid[IW_ESSID_MAX_SIZE];
         u8 ssid_len = 0;
@@ -2040,7 +2040,7 @@ static int lbs_mesh_get_essid(struct net_device *dev,
                               struct iw_request_info *info,
                               struct iw_point *dwrq, char *extra)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
 
         lbs_deb_enter(LBS_DEB_WEXT);
 
@@ -2058,7 +2058,7 @@ static int lbs_mesh_set_essid(struct net_device *dev,
                               struct iw_request_info *info,
                               struct iw_point *dwrq, char *extra)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
         int ret = 0;
 
         lbs_deb_enter(LBS_DEB_WEXT);
@@ -2102,7 +2102,7 @@ static int lbs_mesh_set_essid(struct net_device *dev,
 static int lbs_set_wap(struct net_device *dev, struct iw_request_info *info,
                  struct sockaddr *awrq, char *extra)
 {
-        struct lbs_private *priv = netdev_priv(dev);
+        struct lbs_private *priv = dev->ml_priv;
         struct assoc_request * assoc_req;
         int ret = 0;
 
diff --git a/drivers/net/wireless/orinoco/orinoco.c b/drivers/net/wireless/orinoco/orinoco.c
index 45a04faa7818..067d1a9c728b 100644
--- a/drivers/net/wireless/orinoco/orinoco.c
+++ b/drivers/net/wireless/orinoco/orinoco.c
@@ -3157,8 +3157,20 @@ static int orinoco_pm_notifier(struct notifier_block *notifier,
 
         return NOTIFY_DONE;
 }
+
+static void orinoco_register_pm_notifier(struct orinoco_private *priv)
+{
+        priv->pm_notifier.notifier_call = orinoco_pm_notifier;
+        register_pm_notifier(&priv->pm_notifier);
+}
+
+static void orinoco_unregister_pm_notifier(struct orinoco_private *priv)
+{
+        unregister_pm_notifier(&priv->pm_notifier);
+}
 #else /* !PM_SLEEP || HERMES_CACHE_FW_ON_INIT */
-#define orinoco_pm_notifier NULL
+#define orinoco_register_pm_notifier(priv) do { } while(0)
+#define orinoco_unregister_pm_notifier(priv) do { } while(0)
 #endif
 
 /********************************************************************/
@@ -3648,8 +3660,7 @@ struct net_device
         priv->cached_fw = NULL;
 
         /* Register PM notifiers */
-        priv->pm_notifier.notifier_call = orinoco_pm_notifier;
-        register_pm_notifier(&priv->pm_notifier);
+        orinoco_register_pm_notifier(priv);
 
         return dev;
 }
@@ -3673,7 +3684,7 @@ void free_orinocodev(struct net_device *dev)
                 kfree(rx_data);
         }
 
-        unregister_pm_notifier(&priv->pm_notifier);
+        orinoco_unregister_pm_notifier(priv);
         orinoco_uncache_fw(priv);
 
         priv->wpa_ie_len = 0;
diff --git a/drivers/net/wireless/p54/p54common.c b/drivers/net/wireless/p54/p54common.c
index 34561e6e816b..f170106bf0ae 100644
--- a/drivers/net/wireless/p54/p54common.c
+++ b/drivers/net/wireless/p54/p54common.c
@@ -710,10 +710,11 @@ static struct sk_buff *p54_find_tx_entry(struct ieee80211_hw *dev,
                                            __le32 req_id)
 {
         struct p54_common *priv = dev->priv;
-        struct sk_buff *entry = priv->tx_queue.next;
+        struct sk_buff *entry;
         unsigned long flags;
 
         spin_lock_irqsave(&priv->tx_queue.lock, flags);
+        entry = priv->tx_queue.next;
         while (entry != (struct sk_buff *)&priv->tx_queue) {
                 struct p54_hdr *hdr = (struct p54_hdr *) entry->data;
 
@@ -732,7 +733,7 @@ static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
         struct p54_common *priv = dev->priv;
         struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
         struct p54_frame_sent *payload = (struct p54_frame_sent *) hdr->data;
-        struct sk_buff *entry = (struct sk_buff *) priv->tx_queue.next;
+        struct sk_buff *entry;
         u32 addr = le32_to_cpu(hdr->req_id) - priv->headroom;
         struct memrecord *range = NULL;
         u32 freed = 0;
@@ -741,6 +742,7 @@ static void p54_rx_frame_sent(struct ieee80211_hw *dev, struct sk_buff *skb)
         int count, idx;
 
         spin_lock_irqsave(&priv->tx_queue.lock, flags);
+        entry = (struct sk_buff *) priv->tx_queue.next;
         while (entry != (struct sk_buff *)&priv->tx_queue) {
                 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(entry);
                 struct p54_hdr *entry_hdr;
@@ -976,7 +978,7 @@ static int p54_assign_address(struct ieee80211_hw *dev, struct sk_buff *skb,
                                struct p54_hdr *data, u32 len)
 {
         struct p54_common *priv = dev->priv;
-        struct sk_buff *entry = priv->tx_queue.next;
+        struct sk_buff *entry;
         struct sk_buff *target_skb = NULL;
         struct ieee80211_tx_info *info;
         struct memrecord *range;
@@ -1014,6 +1016,7 @@ static int p54_assign_address(struct ieee80211_hw *dev, struct sk_buff *skb,
                 }
         }
 
+        entry = priv->tx_queue.next;
         while (left--) {
                 u32 hole_size;
                 info = IEEE80211_SKB_CB(entry);
diff --git a/drivers/net/wireless/rt2x00/rt2500usb.c b/drivers/net/wireless/rt2x00/rt2500usb.c
index af6b5847be5c..3e2ac2bbb12f 100644
--- a/drivers/net/wireless/rt2x00/rt2500usb.c
+++ b/drivers/net/wireless/rt2x00/rt2500usb.c
@@ -1952,6 +1952,8 @@ static struct usb_device_id rt2500usb_device_table[] = {
         { USB_DEVICE(0x13b1, 0x000d), USB_DEVICE_DATA(&rt2500usb_ops) },
         { USB_DEVICE(0x13b1, 0x0011), USB_DEVICE_DATA(&rt2500usb_ops) },
         { USB_DEVICE(0x13b1, 0x001a), USB_DEVICE_DATA(&rt2500usb_ops) },
+        /* CNet */
+        { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt2500usb_ops) },
         /* Conceptronic */
         { USB_DEVICE(0x14b2, 0x3c02), USB_DEVICE_DATA(&rt2500usb_ops) },
         /* D-LINK */
@@ -1976,14 +1978,20 @@ static struct usb_device_id rt2500usb_device_table[] = {
         { USB_DEVICE(0x148f, 0x2570), USB_DEVICE_DATA(&rt2500usb_ops) },
         { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt2500usb_ops) },
         { USB_DEVICE(0x148f, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
+        /* Sagem */
+        { USB_DEVICE(0x079b, 0x004b), USB_DEVICE_DATA(&rt2500usb_ops) },
         /* Siemens */
         { USB_DEVICE(0x0681, 0x3c06), USB_DEVICE_DATA(&rt2500usb_ops) },
         /* SMC */
         { USB_DEVICE(0x0707, 0xee13), USB_DEVICE_DATA(&rt2500usb_ops) },
         /* Spairon */
         { USB_DEVICE(0x114b, 0x0110), USB_DEVICE_DATA(&rt2500usb_ops) },
+        /* SURECOM */
+        { USB_DEVICE(0x0769, 0x11f3), USB_DEVICE_DATA(&rt2500usb_ops) },
         /* Trust */
         { USB_DEVICE(0x0eb0, 0x9020), USB_DEVICE_DATA(&rt2500usb_ops) },
+        /* VTech */
+        { USB_DEVICE(0x0f88, 0x3012), USB_DEVICE_DATA(&rt2500usb_ops) },
         /* Zinwell */
         { USB_DEVICE(0x5a57, 0x0260), USB_DEVICE_DATA(&rt2500usb_ops) },
         { 0, }
diff --git a/drivers/net/wireless/rt2x00/rt73usb.c b/drivers/net/wireless/rt2x00/rt73usb.c
index 96a8d69f8790..cefee1b26cd8 100644
--- a/drivers/net/wireless/rt2x00/rt73usb.c
+++ b/drivers/net/wireless/rt2x00/rt73usb.c
@@ -2281,7 +2281,18 @@ static const struct rt2x00_ops rt73usb_ops = {
  */
 static struct usb_device_id rt73usb_device_table[] = {
         /* AboCom */
+        { USB_DEVICE(0x07b8, 0xb21b), USB_DEVICE_DATA(&rt73usb_ops) },
+        { USB_DEVICE(0x07b8, 0xb21c), USB_DEVICE_DATA(&rt73usb_ops) },
         { USB_DEVICE(0x07b8, 0xb21d), USB_DEVICE_DATA(&rt73usb_ops) },
+        { USB_DEVICE(0x07b8, 0xb21e), USB_DEVICE_DATA(&rt73usb_ops) },
+        { USB_DEVICE(0x07b8, 0xb21f), USB_DEVICE_DATA(&rt73usb_ops) },
+        /* AL */
+        { USB_DEVICE(0x14b2, 0x3c10), USB_DEVICE_DATA(&rt73usb_ops) },
+        /* Amigo */
+        { USB_DEVICE(0x148f, 0x9021), USB_DEVICE_DATA(&rt73usb_ops) },
+        { USB_DEVICE(0x0eb0, 0x9021), USB_DEVICE_DATA(&rt73usb_ops) },
+        /* AMIT  */
+        { USB_DEVICE(0x18c5, 0x0002), USB_DEVICE_DATA(&rt73usb_ops) },
         /* Askey */
         { USB_DEVICE(0x1690, 0x0722), USB_DEVICE_DATA(&rt73usb_ops) },
         /* ASUS */
@@ -2294,7 +2305,9 @@ static struct usb_device_id rt73usb_device_table[] = {
         { USB_DEVICE(0x050d, 0x905c), USB_DEVICE_DATA(&rt73usb_ops) },
         /* Billionton */
         { USB_DEVICE(0x1631, 0xc019), USB_DEVICE_DATA(&rt73usb_ops) },
+        { USB_DEVICE(0x08dd, 0x0120), USB_DEVICE_DATA(&rt73usb_ops) },
         /* Buffalo */
+        { USB_DEVICE(0x0411, 0x00d8), USB_DEVICE_DATA(&rt73usb_ops) },
         { USB_DEVICE(0x0411, 0x00f4), USB_DEVICE_DATA(&rt73usb_ops) },
         /* CNet */
         { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt73usb_ops) },
@@ -2308,6 +2321,11 @@ static struct usb_device_id rt73usb_device_table[] = {
         { USB_DEVICE(0x07d1, 0x3c04), USB_DEVICE_DATA(&rt73usb_ops) },
         { USB_DEVICE(0x07d1, 0x3c06), USB_DEVICE_DATA(&rt73usb_ops) },
         { USB_DEVICE(0x07d1, 0x3c07), USB_DEVICE_DATA(&rt73usb_ops) },
+        /* Edimax */
+        { USB_DEVICE(0x7392, 0x7318), USB_DEVICE_DATA(&rt73usb_ops) },
+        { USB_DEVICE(0x7392, 0x7618), USB_DEVICE_DATA(&rt73usb_ops) },
+        /* EnGenius */
+        { USB_DEVICE(0x1740, 0x3701), USB_DEVICE_DATA(&rt73usb_ops) },
         /* Gemtek */
         { USB_DEVICE(0x15a9, 0x0004), USB_DEVICE_DATA(&rt73usb_ops) },
         /* Gigabyte */
@@ -2328,22 +2346,34 @@ static struct usb_device_id rt73usb_device_table[] = {
         { USB_DEVICE(0x0db0, 0xa861), USB_DEVICE_DATA(&rt73usb_ops) },
         { USB_DEVICE(0x0db0, 0xa874), USB_DEVICE_DATA(&rt73usb_ops) },
         /* Ralink */
+        { USB_DEVICE(0x04bb, 0x093d), USB_DEVICE_DATA(&rt73usb_ops) },
         { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt73usb_ops) },
         { USB_DEVICE(0x148f, 0x2671), USB_DEVICE_DATA(&rt73usb_ops) },
         /* Qcom */
         { USB_DEVICE(0x18e8, 0x6196), USB_DEVICE_DATA(&rt73usb_ops) },
         { USB_DEVICE(0x18e8, 0x6229), USB_DEVICE_DATA(&rt73usb_ops) },
         { USB_DEVICE(0x18e8, 0x6238), USB_DEVICE_DATA(&rt73usb_ops) },
+        /* Samsung */
+        { USB_DEVICE(0x04e8, 0x4471), USB_DEVICE_DATA(&rt73usb_ops) },
         /* Senao */
         { USB_DEVICE(0x1740, 0x7100), USB_DEVICE_DATA(&rt73usb_ops) },
         /* Sitecom */
-        { USB_DEVICE(0x0df6, 0x9712), USB_DEVICE_DATA(&rt73usb_ops) },
+        { USB_DEVICE(0x0df6, 0x0024), USB_DEVICE_DATA(&rt73usb_ops) },
+        { USB_DEVICE(0x0df6, 0x0027), USB_DEVICE_DATA(&rt73usb_ops) },
+        { USB_DEVICE(0x0df6, 0x002f), USB_DEVICE_DATA(&rt73usb_ops) },
         { USB_DEVICE(0x0df6, 0x90ac), USB_DEVICE_DATA(&rt73usb_ops) },
+        { USB_DEVICE(0x0df6, 0x9712), USB_DEVICE_DATA(&rt73usb_ops) },
         /* Surecom */
         { USB_DEVICE(0x0769, 0x31f3), USB_DEVICE_DATA(&rt73usb_ops) },
+        /* Philips */
+        { USB_DEVICE(0x0471, 0x200a), USB_DEVICE_DATA(&rt73usb_ops) },
         /* Planex */
         { USB_DEVICE(0x2019, 0xab01), USB_DEVICE_DATA(&rt73usb_ops) },
         { USB_DEVICE(0x2019, 0xab50), USB_DEVICE_DATA(&rt73usb_ops) },
+        /* Zcom */
+        { USB_DEVICE(0x0cde, 0x001c), USB_DEVICE_DATA(&rt73usb_ops) },
+        /* ZyXEL */
+        { USB_DEVICE(0x0586, 0x3415), USB_DEVICE_DATA(&rt73usb_ops) },
         { 0, }
 };
 
diff --git a/drivers/net/wireless/rtl818x/rtl8187_dev.c b/drivers/net/wireless/rtl818x/rtl8187_dev.c
index 22bc07ef2f37..f4747a1134ba 100644
--- a/drivers/net/wireless/rtl818x/rtl8187_dev.c
+++ b/drivers/net/wireless/rtl818x/rtl8187_dev.c
@@ -48,6 +48,10 @@ static struct usb_device_id rtl8187_table[] __devinitdata = {
         {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B},
         {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B},
         {USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B},
+        /* Surecom */
+        {USB_DEVICE(0x0769, 0x11F2), .driver_info = DEVICE_RTL8187},
+        /* Logitech */
+        {USB_DEVICE(0x0789, 0x010C), .driver_info = DEVICE_RTL8187},
         /* Netgear */
         {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187},
         {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187},
@@ -57,8 +61,16 @@ static struct usb_device_id rtl8187_table[] __devinitdata = {
         /* Sitecom */
         {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187},
         {USB_DEVICE(0x0df6, 0x0028), .driver_info = DEVICE_RTL8187B},
+        /* Sphairon Access Systems GmbH */
+        {USB_DEVICE(0x114B, 0x0150), .driver_info = DEVICE_RTL8187},
+        /* Dick Smith Electronics */
+        {USB_DEVICE(0x1371, 0x9401), .driver_info = DEVICE_RTL8187},
         /* Abocom */
         {USB_DEVICE(0x13d1, 0xabe6), .driver_info = DEVICE_RTL8187},
+        /* Qcom */
+        {USB_DEVICE(0x18E8, 0x6232), .driver_info = DEVICE_RTL8187},
+        /* AirLive */
+        {USB_DEVICE(0x1b75, 0x8187), .driver_info = DEVICE_RTL8187},
         {}
 };
 
diff --git a/drivers/net/wireless/rtl818x/rtl8187_rtl8225.c b/drivers/net/wireless/rtl818x/rtl8187_rtl8225.c
index 4e75e8e7fa90..78df281b297a 100644
--- a/drivers/net/wireless/rtl818x/rtl8187_rtl8225.c
+++ b/drivers/net/wireless/rtl818x/rtl8187_rtl8225.c
@@ -285,7 +285,10 @@ static void rtl8225_rf_set_tx_power(struct ieee80211_hw *dev, int channel)
         ofdm_power = priv->channels[channel - 1].hw_value >> 4;
 
         cck_power = min(cck_power, (u8)11);
-        ofdm_power = min(ofdm_power, (u8)35);
+        if (ofdm_power > (u8)15)
+                ofdm_power = 25;
+        else
+                ofdm_power += 10;
 
         rtl818x_iowrite8(priv, &priv->map->TX_GAIN_CCK,
                          rtl8225_tx_gain_cck_ofdm[cck_power / 6] >> 1);
@@ -536,7 +539,10 @@ static void rtl8225z2_rf_set_tx_power(struct ieee80211_hw *dev, int channel)
         cck_power += priv->txpwr_base & 0xF;
         cck_power = min(cck_power, (u8)35);
 
-        ofdm_power = min(ofdm_power, (u8)15);
+        if (ofdm_power > (u8)15)
+                ofdm_power = 25;
+        else
+                ofdm_power += 10;
         ofdm_power += priv->txpwr_base >> 4;
         ofdm_power = min(ofdm_power, (u8)35);
 
diff --git a/drivers/net/wireless/zd1211rw/zd_mac.c b/drivers/net/wireless/zd1211rw/zd_mac.c
index a611ad857983..847057d682b1 100644
--- a/drivers/net/wireless/zd1211rw/zd_mac.c
+++ b/drivers/net/wireless/zd1211rw/zd_mac.c
@@ -575,13 +575,17 @@ static int zd_op_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
 
         r = fill_ctrlset(mac, skb);
         if (r)
-                return r;
+                goto fail;
 
         info->rate_driver_data[0] = hw;
 
         r = zd_usb_tx(&mac->chip.usb, skb);
         if (r)
-                return r;
+                goto fail;
+        return 0;
+
+fail:
+        dev_kfree_skb(skb);
         return 0;
 }
 
diff --git a/drivers/net/wireless/zd1211rw/zd_rf.c b/drivers/net/wireless/zd1211rw/zd_rf.c
index 7207bfd2e6cd..c875ee05e22e 100644
--- a/drivers/net/wireless/zd1211rw/zd_rf.c
+++ b/drivers/net/wireless/zd1211rw/zd_rf.c
@@ -86,6 +86,7 @@ int zd_rf_init_hw(struct zd_rf *rf, u8 type)
         case AL7230B_RF:
                 r = zd_rf_init_al7230b(rf);
                 break;
+        case MAXIM_NEW_RF:
         case UW2453_RF:
                 r = zd_rf_init_uw2453(rf);
                 break;
diff --git a/drivers/net/wireless/zd1211rw/zd_usb.c b/drivers/net/wireless/zd1211rw/zd_usb.c
index 17527f765b39..f0e5e943f6e3 100644
--- a/drivers/net/wireless/zd1211rw/zd_usb.c
+++ b/drivers/net/wireless/zd1211rw/zd_usb.c
@@ -37,6 +37,7 @@
 static struct usb_device_id usb_ids[] = {
         /* ZD1211 */
         { USB_DEVICE(0x0ace, 0x1211), .driver_info = DEVICE_ZD1211 },
+        { USB_DEVICE(0x0ace, 0xa211), .driver_info = DEVICE_ZD1211 },
         { USB_DEVICE(0x07b8, 0x6001), .driver_info = DEVICE_ZD1211 },
         { USB_DEVICE(0x126f, 0xa006), .driver_info = DEVICE_ZD1211 },
         { USB_DEVICE(0x6891, 0xa727), .driver_info = DEVICE_ZD1211 },