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-rw-r--r--drivers/net/wireless/zd1211rw/Makefile4
-rw-r--r--drivers/net/wireless/zd1211rw/zd_chip.c439
-rw-r--r--drivers/net/wireless/zd1211rw/zd_chip.h538
-rw-r--r--drivers/net/wireless/zd1211rw/zd_def.h2
-rw-r--r--drivers/net/wireless/zd1211rw/zd_mac.c456
-rw-r--r--drivers/net/wireless/zd1211rw/zd_mac.h24
-rw-r--r--drivers/net/wireless/zd1211rw/zd_rf.h2
-rw-r--r--drivers/net/wireless/zd1211rw/zd_rf_al2230.c198
-rw-r--r--drivers/net/wireless/zd1211rw/zd_rf_al7230b.c240
-rw-r--r--drivers/net/wireless/zd1211rw/zd_rf_rf2959.c80
-rw-r--r--drivers/net/wireless/zd1211rw/zd_rf_uw2453.c88
-rw-r--r--drivers/net/wireless/zd1211rw/zd_usb.c651
-rw-r--r--drivers/net/wireless/zd1211rw/zd_usb.h40
13 files changed, 1760 insertions, 1002 deletions
diff --git a/drivers/net/wireless/zd1211rw/Makefile b/drivers/net/wireless/zd1211rw/Makefile
index 1907eafb9b16..5728a918e508 100644
--- a/drivers/net/wireless/zd1211rw/Makefile
+++ b/drivers/net/wireless/zd1211rw/Makefile
@@ -5,7 +5,5 @@ zd1211rw-objs := zd_chip.o zd_mac.o \
5 zd_rf_al7230b.o zd_rf_uw2453.o \ 5 zd_rf_al7230b.o zd_rf_uw2453.o \
6 zd_rf.o zd_usb.o 6 zd_rf.o zd_usb.o
7 7
8ifeq ($(CONFIG_ZD1211RW_DEBUG),y) 8ccflags-$(CONFIG_ZD1211RW_DEBUG) := -DDEBUG
9EXTRA_CFLAGS += -DDEBUG
10endif
11 9
diff --git a/drivers/net/wireless/zd1211rw/zd_chip.c b/drivers/net/wireless/zd1211rw/zd_chip.c
index b2af3c549bb3..ff306d763e37 100644
--- a/drivers/net/wireless/zd1211rw/zd_chip.c
+++ b/drivers/net/wireless/zd1211rw/zd_chip.c
@@ -108,24 +108,17 @@ int zd_ioread32v_locked(struct zd_chip *chip, u32 *values, const zd_addr_t *addr
108{ 108{
109 int r; 109 int r;
110 int i; 110 int i;
111 zd_addr_t *a16; 111 zd_addr_t a16[USB_MAX_IOREAD32_COUNT * 2];
112 u16 *v16; 112 u16 v16[USB_MAX_IOREAD32_COUNT * 2];
113 unsigned int count16; 113 unsigned int count16;
114 114
115 if (count > USB_MAX_IOREAD32_COUNT) 115 if (count > USB_MAX_IOREAD32_COUNT)
116 return -EINVAL; 116 return -EINVAL;
117 117
118 /* Allocate a single memory block for values and addresses. */ 118 /* Use stack for values and addresses. */
119 count16 = 2*count; 119 count16 = 2 * count;
120 a16 = (zd_addr_t *) kmalloc(count16 * (sizeof(zd_addr_t) + sizeof(u16)), 120 BUG_ON(count16 * sizeof(zd_addr_t) > sizeof(a16));
121 GFP_KERNEL); 121 BUG_ON(count16 * sizeof(u16) > sizeof(v16));
122 if (!a16) {
123 dev_dbg_f(zd_chip_dev(chip),
124 "error ENOMEM in allocation of a16\n");
125 r = -ENOMEM;
126 goto out;
127 }
128 v16 = (u16 *)(a16 + count16);
129 122
130 for (i = 0; i < count; i++) { 123 for (i = 0; i < count; i++) {
131 int j = 2*i; 124 int j = 2*i;
@@ -138,7 +131,7 @@ int zd_ioread32v_locked(struct zd_chip *chip, u32 *values, const zd_addr_t *addr
138 if (r) { 131 if (r) {
139 dev_dbg_f(zd_chip_dev(chip), 132 dev_dbg_f(zd_chip_dev(chip),
140 "error: zd_ioread16v_locked. Error number %d\n", r); 133 "error: zd_ioread16v_locked. Error number %d\n", r);
141 goto out; 134 return r;
142 } 135 }
143 136
144 for (i = 0; i < count; i++) { 137 for (i = 0; i < count; i++) {
@@ -146,18 +139,19 @@ int zd_ioread32v_locked(struct zd_chip *chip, u32 *values, const zd_addr_t *addr
146 values[i] = (v16[j] << 16) | v16[j+1]; 139 values[i] = (v16[j] << 16) | v16[j+1];
147 } 140 }
148 141
149out: 142 return 0;
150 kfree((void *)a16);
151 return r;
152} 143}
153 144
154int _zd_iowrite32v_locked(struct zd_chip *chip, const struct zd_ioreq32 *ioreqs, 145static int _zd_iowrite32v_async_locked(struct zd_chip *chip,
155 unsigned int count) 146 const struct zd_ioreq32 *ioreqs,
147 unsigned int count)
156{ 148{
157 int i, j, r; 149 int i, j, r;
158 struct zd_ioreq16 *ioreqs16; 150 struct zd_ioreq16 ioreqs16[USB_MAX_IOWRITE32_COUNT * 2];
159 unsigned int count16; 151 unsigned int count16;
160 152
153 /* Use stack for values and addresses. */
154
161 ZD_ASSERT(mutex_is_locked(&chip->mutex)); 155 ZD_ASSERT(mutex_is_locked(&chip->mutex));
162 156
163 if (count == 0) 157 if (count == 0)
@@ -165,15 +159,8 @@ int _zd_iowrite32v_locked(struct zd_chip *chip, const struct zd_ioreq32 *ioreqs,
165 if (count > USB_MAX_IOWRITE32_COUNT) 159 if (count > USB_MAX_IOWRITE32_COUNT)
166 return -EINVAL; 160 return -EINVAL;
167 161
168 /* Allocate a single memory block for values and addresses. */ 162 count16 = 2 * count;
169 count16 = 2*count; 163 BUG_ON(count16 * sizeof(struct zd_ioreq16) > sizeof(ioreqs16));
170 ioreqs16 = kmalloc(count16 * sizeof(struct zd_ioreq16), GFP_KERNEL);
171 if (!ioreqs16) {
172 r = -ENOMEM;
173 dev_dbg_f(zd_chip_dev(chip),
174 "error %d in ioreqs16 allocation\n", r);
175 goto out;
176 }
177 164
178 for (i = 0; i < count; i++) { 165 for (i = 0; i < count; i++) {
179 j = 2*i; 166 j = 2*i;
@@ -184,18 +171,30 @@ int _zd_iowrite32v_locked(struct zd_chip *chip, const struct zd_ioreq32 *ioreqs,
184 ioreqs16[j+1].addr = ioreqs[i].addr; 171 ioreqs16[j+1].addr = ioreqs[i].addr;
185 } 172 }
186 173
187 r = zd_usb_iowrite16v(&chip->usb, ioreqs16, count16); 174 r = zd_usb_iowrite16v_async(&chip->usb, ioreqs16, count16);
188#ifdef DEBUG 175#ifdef DEBUG
189 if (r) { 176 if (r) {
190 dev_dbg_f(zd_chip_dev(chip), 177 dev_dbg_f(zd_chip_dev(chip),
191 "error %d in zd_usb_write16v\n", r); 178 "error %d in zd_usb_write16v\n", r);
192 } 179 }
193#endif /* DEBUG */ 180#endif /* DEBUG */
194out:
195 kfree(ioreqs16);
196 return r; 181 return r;
197} 182}
198 183
184int _zd_iowrite32v_locked(struct zd_chip *chip, const struct zd_ioreq32 *ioreqs,
185 unsigned int count)
186{
187 int r;
188
189 zd_usb_iowrite16v_async_start(&chip->usb);
190 r = _zd_iowrite32v_async_locked(chip, ioreqs, count);
191 if (r) {
192 zd_usb_iowrite16v_async_end(&chip->usb, 0);
193 return r;
194 }
195 return zd_usb_iowrite16v_async_end(&chip->usb, 50 /* ms */);
196}
197
199int zd_iowrite16a_locked(struct zd_chip *chip, 198int zd_iowrite16a_locked(struct zd_chip *chip,
200 const struct zd_ioreq16 *ioreqs, unsigned int count) 199 const struct zd_ioreq16 *ioreqs, unsigned int count)
201{ 200{
@@ -203,6 +202,8 @@ int zd_iowrite16a_locked(struct zd_chip *chip,
203 unsigned int i, j, t, max; 202 unsigned int i, j, t, max;
204 203
205 ZD_ASSERT(mutex_is_locked(&chip->mutex)); 204 ZD_ASSERT(mutex_is_locked(&chip->mutex));
205 zd_usb_iowrite16v_async_start(&chip->usb);
206
206 for (i = 0; i < count; i += j + t) { 207 for (i = 0; i < count; i += j + t) {
207 t = 0; 208 t = 0;
208 max = count-i; 209 max = count-i;
@@ -215,8 +216,9 @@ int zd_iowrite16a_locked(struct zd_chip *chip,
215 } 216 }
216 } 217 }
217 218
218 r = zd_usb_iowrite16v(&chip->usb, &ioreqs[i], j); 219 r = zd_usb_iowrite16v_async(&chip->usb, &ioreqs[i], j);
219 if (r) { 220 if (r) {
221 zd_usb_iowrite16v_async_end(&chip->usb, 0);
220 dev_dbg_f(zd_chip_dev(chip), 222 dev_dbg_f(zd_chip_dev(chip),
221 "error zd_usb_iowrite16v. Error number %d\n", 223 "error zd_usb_iowrite16v. Error number %d\n",
222 r); 224 r);
@@ -224,7 +226,7 @@ int zd_iowrite16a_locked(struct zd_chip *chip,
224 } 226 }
225 } 227 }
226 228
227 return 0; 229 return zd_usb_iowrite16v_async_end(&chip->usb, 50 /* ms */);
228} 230}
229 231
230/* Writes a variable number of 32 bit registers. The functions will split 232/* Writes a variable number of 32 bit registers. The functions will split
@@ -237,6 +239,8 @@ int zd_iowrite32a_locked(struct zd_chip *chip,
237 int r; 239 int r;
238 unsigned int i, j, t, max; 240 unsigned int i, j, t, max;
239 241
242 zd_usb_iowrite16v_async_start(&chip->usb);
243
240 for (i = 0; i < count; i += j + t) { 244 for (i = 0; i < count; i += j + t) {
241 t = 0; 245 t = 0;
242 max = count-i; 246 max = count-i;
@@ -249,8 +253,9 @@ int zd_iowrite32a_locked(struct zd_chip *chip,
249 } 253 }
250 } 254 }
251 255
252 r = _zd_iowrite32v_locked(chip, &ioreqs[i], j); 256 r = _zd_iowrite32v_async_locked(chip, &ioreqs[i], j);
253 if (r) { 257 if (r) {
258 zd_usb_iowrite16v_async_end(&chip->usb, 0);
254 dev_dbg_f(zd_chip_dev(chip), 259 dev_dbg_f(zd_chip_dev(chip),
255 "error _zd_iowrite32v_locked." 260 "error _zd_iowrite32v_locked."
256 " Error number %d\n", r); 261 " Error number %d\n", r);
@@ -258,7 +263,7 @@ int zd_iowrite32a_locked(struct zd_chip *chip,
258 } 263 }
259 } 264 }
260 265
261 return 0; 266 return zd_usb_iowrite16v_async_end(&chip->usb, 50 /* ms */);
262} 267}
263 268
264int zd_ioread16(struct zd_chip *chip, zd_addr_t addr, u16 *value) 269int zd_ioread16(struct zd_chip *chip, zd_addr_t addr, u16 *value)
@@ -369,16 +374,12 @@ error:
369 return r; 374 return r;
370} 375}
371 376
372/* MAC address: if custom mac addresses are to be used CR_MAC_ADDR_P1 and 377static int zd_write_mac_addr_common(struct zd_chip *chip, const u8 *mac_addr,
373 * CR_MAC_ADDR_P2 must be overwritten 378 const struct zd_ioreq32 *in_reqs,
374 */ 379 const char *type)
375int zd_write_mac_addr(struct zd_chip *chip, const u8 *mac_addr)
376{ 380{
377 int r; 381 int r;
378 struct zd_ioreq32 reqs[2] = { 382 struct zd_ioreq32 reqs[2] = {in_reqs[0], in_reqs[1]};
379 [0] = { .addr = CR_MAC_ADDR_P1 },
380 [1] = { .addr = CR_MAC_ADDR_P2 },
381 };
382 383
383 if (mac_addr) { 384 if (mac_addr) {
384 reqs[0].value = (mac_addr[3] << 24) 385 reqs[0].value = (mac_addr[3] << 24)
@@ -387,9 +388,9 @@ int zd_write_mac_addr(struct zd_chip *chip, const u8 *mac_addr)
387 | mac_addr[0]; 388 | mac_addr[0];
388 reqs[1].value = (mac_addr[5] << 8) 389 reqs[1].value = (mac_addr[5] << 8)
389 | mac_addr[4]; 390 | mac_addr[4];
390 dev_dbg_f(zd_chip_dev(chip), "mac addr %pM\n", mac_addr); 391 dev_dbg_f(zd_chip_dev(chip), "%s addr %pM\n", type, mac_addr);
391 } else { 392 } else {
392 dev_dbg_f(zd_chip_dev(chip), "set NULL mac\n"); 393 dev_dbg_f(zd_chip_dev(chip), "set NULL %s\n", type);
393 } 394 }
394 395
395 mutex_lock(&chip->mutex); 396 mutex_lock(&chip->mutex);
@@ -398,6 +399,29 @@ int zd_write_mac_addr(struct zd_chip *chip, const u8 *mac_addr)
398 return r; 399 return r;
399} 400}
400 401
402/* MAC address: if custom mac addresses are to be used CR_MAC_ADDR_P1 and
403 * CR_MAC_ADDR_P2 must be overwritten
404 */
405int zd_write_mac_addr(struct zd_chip *chip, const u8 *mac_addr)
406{
407 static const struct zd_ioreq32 reqs[2] = {
408 [0] = { .addr = CR_MAC_ADDR_P1 },
409 [1] = { .addr = CR_MAC_ADDR_P2 },
410 };
411
412 return zd_write_mac_addr_common(chip, mac_addr, reqs, "mac");
413}
414
415int zd_write_bssid(struct zd_chip *chip, const u8 *bssid)
416{
417 static const struct zd_ioreq32 reqs[2] = {
418 [0] = { .addr = CR_BSSID_P1 },
419 [1] = { .addr = CR_BSSID_P2 },
420 };
421
422 return zd_write_mac_addr_common(chip, bssid, reqs, "bssid");
423}
424
401int zd_read_regdomain(struct zd_chip *chip, u8 *regdomain) 425int zd_read_regdomain(struct zd_chip *chip, u8 *regdomain)
402{ 426{
403 int r; 427 int r;
@@ -533,7 +557,7 @@ int zd_chip_unlock_phy_regs(struct zd_chip *chip)
533 return r; 557 return r;
534} 558}
535 559
536/* CR157 can be optionally patched by the EEPROM for original ZD1211 */ 560/* ZD_CR157 can be optionally patched by the EEPROM for original ZD1211 */
537static int patch_cr157(struct zd_chip *chip) 561static int patch_cr157(struct zd_chip *chip)
538{ 562{
539 int r; 563 int r;
@@ -547,7 +571,7 @@ static int patch_cr157(struct zd_chip *chip)
547 return r; 571 return r;
548 572
549 dev_dbg_f(zd_chip_dev(chip), "patching value %x\n", value >> 8); 573 dev_dbg_f(zd_chip_dev(chip), "patching value %x\n", value >> 8);
550 return zd_iowrite32_locked(chip, value >> 8, CR157); 574 return zd_iowrite32_locked(chip, value >> 8, ZD_CR157);
551} 575}
552 576
553/* 577/*
@@ -569,8 +593,8 @@ static int patch_6m_band_edge(struct zd_chip *chip, u8 channel)
569int zd_chip_generic_patch_6m_band(struct zd_chip *chip, int channel) 593int zd_chip_generic_patch_6m_band(struct zd_chip *chip, int channel)
570{ 594{
571 struct zd_ioreq16 ioreqs[] = { 595 struct zd_ioreq16 ioreqs[] = {
572 { CR128, 0x14 }, { CR129, 0x12 }, { CR130, 0x10 }, 596 { ZD_CR128, 0x14 }, { ZD_CR129, 0x12 }, { ZD_CR130, 0x10 },
573 { CR47, 0x1e }, 597 { ZD_CR47, 0x1e },
574 }; 598 };
575 599
576 /* FIXME: Channel 11 is not the edge for all regulatory domains. */ 600 /* FIXME: Channel 11 is not the edge for all regulatory domains. */
@@ -584,69 +608,69 @@ int zd_chip_generic_patch_6m_band(struct zd_chip *chip, int channel)
584static int zd1211_hw_reset_phy(struct zd_chip *chip) 608static int zd1211_hw_reset_phy(struct zd_chip *chip)
585{ 609{
586 static const struct zd_ioreq16 ioreqs[] = { 610 static const struct zd_ioreq16 ioreqs[] = {
587 { CR0, 0x0a }, { CR1, 0x06 }, { CR2, 0x26 }, 611 { ZD_CR0, 0x0a }, { ZD_CR1, 0x06 }, { ZD_CR2, 0x26 },
588 { CR3, 0x38 }, { CR4, 0x80 }, { CR9, 0xa0 }, 612 { ZD_CR3, 0x38 }, { ZD_CR4, 0x80 }, { ZD_CR9, 0xa0 },
589 { CR10, 0x81 }, { CR11, 0x00 }, { CR12, 0x7f }, 613 { ZD_CR10, 0x81 }, { ZD_CR11, 0x00 }, { ZD_CR12, 0x7f },
590 { CR13, 0x8c }, { CR14, 0x80 }, { CR15, 0x3d }, 614 { ZD_CR13, 0x8c }, { ZD_CR14, 0x80 }, { ZD_CR15, 0x3d },
591 { CR16, 0x20 }, { CR17, 0x1e }, { CR18, 0x0a }, 615 { ZD_CR16, 0x20 }, { ZD_CR17, 0x1e }, { ZD_CR18, 0x0a },
592 { CR19, 0x48 }, { CR20, 0x0c }, { CR21, 0x0c }, 616 { ZD_CR19, 0x48 }, { ZD_CR20, 0x0c }, { ZD_CR21, 0x0c },
593 { CR22, 0x23 }, { CR23, 0x90 }, { CR24, 0x14 }, 617 { ZD_CR22, 0x23 }, { ZD_CR23, 0x90 }, { ZD_CR24, 0x14 },
594 { CR25, 0x40 }, { CR26, 0x10 }, { CR27, 0x19 }, 618 { ZD_CR25, 0x40 }, { ZD_CR26, 0x10 }, { ZD_CR27, 0x19 },
595 { CR28, 0x7f }, { CR29, 0x80 }, { CR30, 0x4b }, 619 { ZD_CR28, 0x7f }, { ZD_CR29, 0x80 }, { ZD_CR30, 0x4b },
596 { CR31, 0x60 }, { CR32, 0x43 }, { CR33, 0x08 }, 620 { ZD_CR31, 0x60 }, { ZD_CR32, 0x43 }, { ZD_CR33, 0x08 },
597 { CR34, 0x06 }, { CR35, 0x0a }, { CR36, 0x00 }, 621 { ZD_CR34, 0x06 }, { ZD_CR35, 0x0a }, { ZD_CR36, 0x00 },
598 { CR37, 0x00 }, { CR38, 0x38 }, { CR39, 0x0c }, 622 { ZD_CR37, 0x00 }, { ZD_CR38, 0x38 }, { ZD_CR39, 0x0c },
599 { CR40, 0x84 }, { CR41, 0x2a }, { CR42, 0x80 }, 623 { ZD_CR40, 0x84 }, { ZD_CR41, 0x2a }, { ZD_CR42, 0x80 },
600 { CR43, 0x10 }, { CR44, 0x12 }, { CR46, 0xff }, 624 { ZD_CR43, 0x10 }, { ZD_CR44, 0x12 }, { ZD_CR46, 0xff },
601 { CR47, 0x1E }, { CR48, 0x26 }, { CR49, 0x5b }, 625 { ZD_CR47, 0x1E }, { ZD_CR48, 0x26 }, { ZD_CR49, 0x5b },
602 { CR64, 0xd0 }, { CR65, 0x04 }, { CR66, 0x58 }, 626 { ZD_CR64, 0xd0 }, { ZD_CR65, 0x04 }, { ZD_CR66, 0x58 },
603 { CR67, 0xc9 }, { CR68, 0x88 }, { CR69, 0x41 }, 627 { ZD_CR67, 0xc9 }, { ZD_CR68, 0x88 }, { ZD_CR69, 0x41 },
604 { CR70, 0x23 }, { CR71, 0x10 }, { CR72, 0xff }, 628 { ZD_CR70, 0x23 }, { ZD_CR71, 0x10 }, { ZD_CR72, 0xff },
605 { CR73, 0x32 }, { CR74, 0x30 }, { CR75, 0x65 }, 629 { ZD_CR73, 0x32 }, { ZD_CR74, 0x30 }, { ZD_CR75, 0x65 },
606 { CR76, 0x41 }, { CR77, 0x1b }, { CR78, 0x30 }, 630 { ZD_CR76, 0x41 }, { ZD_CR77, 0x1b }, { ZD_CR78, 0x30 },
607 { CR79, 0x68 }, { CR80, 0x64 }, { CR81, 0x64 }, 631 { ZD_CR79, 0x68 }, { ZD_CR80, 0x64 }, { ZD_CR81, 0x64 },
608 { CR82, 0x00 }, { CR83, 0x00 }, { CR84, 0x00 }, 632 { ZD_CR82, 0x00 }, { ZD_CR83, 0x00 }, { ZD_CR84, 0x00 },
609 { CR85, 0x02 }, { CR86, 0x00 }, { CR87, 0x00 }, 633 { ZD_CR85, 0x02 }, { ZD_CR86, 0x00 }, { ZD_CR87, 0x00 },
610 { CR88, 0xff }, { CR89, 0xfc }, { CR90, 0x00 }, 634 { ZD_CR88, 0xff }, { ZD_CR89, 0xfc }, { ZD_CR90, 0x00 },
611 { CR91, 0x00 }, { CR92, 0x00 }, { CR93, 0x08 }, 635 { ZD_CR91, 0x00 }, { ZD_CR92, 0x00 }, { ZD_CR93, 0x08 },
612 { CR94, 0x00 }, { CR95, 0x00 }, { CR96, 0xff }, 636 { ZD_CR94, 0x00 }, { ZD_CR95, 0x00 }, { ZD_CR96, 0xff },
613 { CR97, 0xe7 }, { CR98, 0x00 }, { CR99, 0x00 }, 637 { ZD_CR97, 0xe7 }, { ZD_CR98, 0x00 }, { ZD_CR99, 0x00 },
614 { CR100, 0x00 }, { CR101, 0xae }, { CR102, 0x02 }, 638 { ZD_CR100, 0x00 }, { ZD_CR101, 0xae }, { ZD_CR102, 0x02 },
615 { CR103, 0x00 }, { CR104, 0x03 }, { CR105, 0x65 }, 639 { ZD_CR103, 0x00 }, { ZD_CR104, 0x03 }, { ZD_CR105, 0x65 },
616 { CR106, 0x04 }, { CR107, 0x00 }, { CR108, 0x0a }, 640 { ZD_CR106, 0x04 }, { ZD_CR107, 0x00 }, { ZD_CR108, 0x0a },
617 { CR109, 0xaa }, { CR110, 0xaa }, { CR111, 0x25 }, 641 { ZD_CR109, 0xaa }, { ZD_CR110, 0xaa }, { ZD_CR111, 0x25 },
618 { CR112, 0x25 }, { CR113, 0x00 }, { CR119, 0x1e }, 642 { ZD_CR112, 0x25 }, { ZD_CR113, 0x00 }, { ZD_CR119, 0x1e },
619 { CR125, 0x90 }, { CR126, 0x00 }, { CR127, 0x00 }, 643 { ZD_CR125, 0x90 }, { ZD_CR126, 0x00 }, { ZD_CR127, 0x00 },
620 { }, 644 { },
621 { CR5, 0x00 }, { CR6, 0x00 }, { CR7, 0x00 }, 645 { ZD_CR5, 0x00 }, { ZD_CR6, 0x00 }, { ZD_CR7, 0x00 },
622 { CR8, 0x00 }, { CR9, 0x20 }, { CR12, 0xf0 }, 646 { ZD_CR8, 0x00 }, { ZD_CR9, 0x20 }, { ZD_CR12, 0xf0 },
623 { CR20, 0x0e }, { CR21, 0x0e }, { CR27, 0x10 }, 647 { ZD_CR20, 0x0e }, { ZD_CR21, 0x0e }, { ZD_CR27, 0x10 },
624 { CR44, 0x33 }, { CR47, 0x1E }, { CR83, 0x24 }, 648 { ZD_CR44, 0x33 }, { ZD_CR47, 0x1E }, { ZD_CR83, 0x24 },
625 { CR84, 0x04 }, { CR85, 0x00 }, { CR86, 0x0C }, 649 { ZD_CR84, 0x04 }, { ZD_CR85, 0x00 }, { ZD_CR86, 0x0C },
626 { CR87, 0x12 }, { CR88, 0x0C }, { CR89, 0x00 }, 650 { ZD_CR87, 0x12 }, { ZD_CR88, 0x0C }, { ZD_CR89, 0x00 },
627 { CR90, 0x10 }, { CR91, 0x08 }, { CR93, 0x00 }, 651 { ZD_CR90, 0x10 }, { ZD_CR91, 0x08 }, { ZD_CR93, 0x00 },
628 { CR94, 0x01 }, { CR95, 0x00 }, { CR96, 0x50 }, 652 { ZD_CR94, 0x01 }, { ZD_CR95, 0x00 }, { ZD_CR96, 0x50 },
629 { CR97, 0x37 }, { CR98, 0x35 }, { CR101, 0x13 }, 653 { ZD_CR97, 0x37 }, { ZD_CR98, 0x35 }, { ZD_CR101, 0x13 },
630 { CR102, 0x27 }, { CR103, 0x27 }, { CR104, 0x18 }, 654 { ZD_CR102, 0x27 }, { ZD_CR103, 0x27 }, { ZD_CR104, 0x18 },
631 { CR105, 0x12 }, { CR109, 0x27 }, { CR110, 0x27 }, 655 { ZD_CR105, 0x12 }, { ZD_CR109, 0x27 }, { ZD_CR110, 0x27 },
632 { CR111, 0x27 }, { CR112, 0x27 }, { CR113, 0x27 }, 656 { ZD_CR111, 0x27 }, { ZD_CR112, 0x27 }, { ZD_CR113, 0x27 },
633 { CR114, 0x27 }, { CR115, 0x26 }, { CR116, 0x24 }, 657 { ZD_CR114, 0x27 }, { ZD_CR115, 0x26 }, { ZD_CR116, 0x24 },
634 { CR117, 0xfc }, { CR118, 0xfa }, { CR120, 0x4f }, 658 { ZD_CR117, 0xfc }, { ZD_CR118, 0xfa }, { ZD_CR120, 0x4f },
635 { CR125, 0xaa }, { CR127, 0x03 }, { CR128, 0x14 }, 659 { ZD_CR125, 0xaa }, { ZD_CR127, 0x03 }, { ZD_CR128, 0x14 },
636 { CR129, 0x12 }, { CR130, 0x10 }, { CR131, 0x0C }, 660 { ZD_CR129, 0x12 }, { ZD_CR130, 0x10 }, { ZD_CR131, 0x0C },
637 { CR136, 0xdf }, { CR137, 0x40 }, { CR138, 0xa0 }, 661 { ZD_CR136, 0xdf }, { ZD_CR137, 0x40 }, { ZD_CR138, 0xa0 },
638 { CR139, 0xb0 }, { CR140, 0x99 }, { CR141, 0x82 }, 662 { ZD_CR139, 0xb0 }, { ZD_CR140, 0x99 }, { ZD_CR141, 0x82 },
639 { CR142, 0x54 }, { CR143, 0x1c }, { CR144, 0x6c }, 663 { ZD_CR142, 0x54 }, { ZD_CR143, 0x1c }, { ZD_CR144, 0x6c },
640 { CR147, 0x07 }, { CR148, 0x4c }, { CR149, 0x50 }, 664 { ZD_CR147, 0x07 }, { ZD_CR148, 0x4c }, { ZD_CR149, 0x50 },
641 { CR150, 0x0e }, { CR151, 0x18 }, { CR160, 0xfe }, 665 { ZD_CR150, 0x0e }, { ZD_CR151, 0x18 }, { ZD_CR160, 0xfe },
642 { CR161, 0xee }, { CR162, 0xaa }, { CR163, 0xfa }, 666 { ZD_CR161, 0xee }, { ZD_CR162, 0xaa }, { ZD_CR163, 0xfa },
643 { CR164, 0xfa }, { CR165, 0xea }, { CR166, 0xbe }, 667 { ZD_CR164, 0xfa }, { ZD_CR165, 0xea }, { ZD_CR166, 0xbe },
644 { CR167, 0xbe }, { CR168, 0x6a }, { CR169, 0xba }, 668 { ZD_CR167, 0xbe }, { ZD_CR168, 0x6a }, { ZD_CR169, 0xba },
645 { CR170, 0xba }, { CR171, 0xba }, 669 { ZD_CR170, 0xba }, { ZD_CR171, 0xba },
646 /* Note: CR204 must lead the CR203 */ 670 /* Note: ZD_CR204 must lead the ZD_CR203 */
647 { CR204, 0x7d }, 671 { ZD_CR204, 0x7d },
648 { }, 672 { },
649 { CR203, 0x30 }, 673 { ZD_CR203, 0x30 },
650 }; 674 };
651 675
652 int r, t; 676 int r, t;
@@ -673,62 +697,62 @@ out:
673static int zd1211b_hw_reset_phy(struct zd_chip *chip) 697static int zd1211b_hw_reset_phy(struct zd_chip *chip)
674{ 698{
675 static const struct zd_ioreq16 ioreqs[] = { 699 static const struct zd_ioreq16 ioreqs[] = {
676 { CR0, 0x14 }, { CR1, 0x06 }, { CR2, 0x26 }, 700 { ZD_CR0, 0x14 }, { ZD_CR1, 0x06 }, { ZD_CR2, 0x26 },
677 { CR3, 0x38 }, { CR4, 0x80 }, { CR9, 0xe0 }, 701 { ZD_CR3, 0x38 }, { ZD_CR4, 0x80 }, { ZD_CR9, 0xe0 },
678 { CR10, 0x81 }, 702 { ZD_CR10, 0x81 },
679 /* power control { { CR11, 1 << 6 }, */ 703 /* power control { { ZD_CR11, 1 << 6 }, */
680 { CR11, 0x00 }, 704 { ZD_CR11, 0x00 },
681 { CR12, 0xf0 }, { CR13, 0x8c }, { CR14, 0x80 }, 705 { ZD_CR12, 0xf0 }, { ZD_CR13, 0x8c }, { ZD_CR14, 0x80 },
682 { CR15, 0x3d }, { CR16, 0x20 }, { CR17, 0x1e }, 706 { ZD_CR15, 0x3d }, { ZD_CR16, 0x20 }, { ZD_CR17, 0x1e },
683 { CR18, 0x0a }, { CR19, 0x48 }, 707 { ZD_CR18, 0x0a }, { ZD_CR19, 0x48 },
684 { CR20, 0x10 }, /* Org:0x0E, ComTrend:RalLink AP */ 708 { ZD_CR20, 0x10 }, /* Org:0x0E, ComTrend:RalLink AP */
685 { CR21, 0x0e }, { CR22, 0x23 }, { CR23, 0x90 }, 709 { ZD_CR21, 0x0e }, { ZD_CR22, 0x23 }, { ZD_CR23, 0x90 },
686 { CR24, 0x14 }, { CR25, 0x40 }, { CR26, 0x10 }, 710 { ZD_CR24, 0x14 }, { ZD_CR25, 0x40 }, { ZD_CR26, 0x10 },
687 { CR27, 0x10 }, { CR28, 0x7f }, { CR29, 0x80 }, 711 { ZD_CR27, 0x10 }, { ZD_CR28, 0x7f }, { ZD_CR29, 0x80 },
688 { CR30, 0x4b }, /* ASIC/FWT, no jointly decoder */ 712 { ZD_CR30, 0x4b }, /* ASIC/FWT, no jointly decoder */
689 { CR31, 0x60 }, { CR32, 0x43 }, { CR33, 0x08 }, 713 { ZD_CR31, 0x60 }, { ZD_CR32, 0x43 }, { ZD_CR33, 0x08 },
690 { CR34, 0x06 }, { CR35, 0x0a }, { CR36, 0x00 }, 714 { ZD_CR34, 0x06 }, { ZD_CR35, 0x0a }, { ZD_CR36, 0x00 },
691 { CR37, 0x00 }, { CR38, 0x38 }, { CR39, 0x0c }, 715 { ZD_CR37, 0x00 }, { ZD_CR38, 0x38 }, { ZD_CR39, 0x0c },
692 { CR40, 0x84 }, { CR41, 0x2a }, { CR42, 0x80 }, 716 { ZD_CR40, 0x84 }, { ZD_CR41, 0x2a }, { ZD_CR42, 0x80 },
693 { CR43, 0x10 }, { CR44, 0x33 }, { CR46, 0xff }, 717 { ZD_CR43, 0x10 }, { ZD_CR44, 0x33 }, { ZD_CR46, 0xff },
694 { CR47, 0x1E }, { CR48, 0x26 }, { CR49, 0x5b }, 718 { ZD_CR47, 0x1E }, { ZD_CR48, 0x26 }, { ZD_CR49, 0x5b },
695 { CR64, 0xd0 }, { CR65, 0x04 }, { CR66, 0x58 }, 719 { ZD_CR64, 0xd0 }, { ZD_CR65, 0x04 }, { ZD_CR66, 0x58 },
696 { CR67, 0xc9 }, { CR68, 0x88 }, { CR69, 0x41 }, 720 { ZD_CR67, 0xc9 }, { ZD_CR68, 0x88 }, { ZD_CR69, 0x41 },
697 { CR70, 0x23 }, { CR71, 0x10 }, { CR72, 0xff }, 721 { ZD_CR70, 0x23 }, { ZD_CR71, 0x10 }, { ZD_CR72, 0xff },
698 { CR73, 0x32 }, { CR74, 0x30 }, { CR75, 0x65 }, 722 { ZD_CR73, 0x32 }, { ZD_CR74, 0x30 }, { ZD_CR75, 0x65 },
699 { CR76, 0x41 }, { CR77, 0x1b }, { CR78, 0x30 }, 723 { ZD_CR76, 0x41 }, { ZD_CR77, 0x1b }, { ZD_CR78, 0x30 },
700 { CR79, 0xf0 }, { CR80, 0x64 }, { CR81, 0x64 }, 724 { ZD_CR79, 0xf0 }, { ZD_CR80, 0x64 }, { ZD_CR81, 0x64 },
701 { CR82, 0x00 }, { CR83, 0x24 }, { CR84, 0x04 }, 725 { ZD_CR82, 0x00 }, { ZD_CR83, 0x24 }, { ZD_CR84, 0x04 },
702 { CR85, 0x00 }, { CR86, 0x0c }, { CR87, 0x12 }, 726 { ZD_CR85, 0x00 }, { ZD_CR86, 0x0c }, { ZD_CR87, 0x12 },
703 { CR88, 0x0c }, { CR89, 0x00 }, { CR90, 0x58 }, 727 { ZD_CR88, 0x0c }, { ZD_CR89, 0x00 }, { ZD_CR90, 0x58 },
704 { CR91, 0x04 }, { CR92, 0x00 }, { CR93, 0x00 }, 728 { ZD_CR91, 0x04 }, { ZD_CR92, 0x00 }, { ZD_CR93, 0x00 },
705 { CR94, 0x01 }, 729 { ZD_CR94, 0x01 },
706 { CR95, 0x20 }, /* ZD1211B */ 730 { ZD_CR95, 0x20 }, /* ZD1211B */
707 { CR96, 0x50 }, { CR97, 0x37 }, { CR98, 0x35 }, 731 { ZD_CR96, 0x50 }, { ZD_CR97, 0x37 }, { ZD_CR98, 0x35 },
708 { CR99, 0x00 }, { CR100, 0x01 }, { CR101, 0x13 }, 732 { ZD_CR99, 0x00 }, { ZD_CR100, 0x01 }, { ZD_CR101, 0x13 },
709 { CR102, 0x27 }, { CR103, 0x27 }, { CR104, 0x18 }, 733 { ZD_CR102, 0x27 }, { ZD_CR103, 0x27 }, { ZD_CR104, 0x18 },
710 { CR105, 0x12 }, { CR106, 0x04 }, { CR107, 0x00 }, 734 { ZD_CR105, 0x12 }, { ZD_CR106, 0x04 }, { ZD_CR107, 0x00 },
711 { CR108, 0x0a }, { CR109, 0x27 }, { CR110, 0x27 }, 735 { ZD_CR108, 0x0a }, { ZD_CR109, 0x27 }, { ZD_CR110, 0x27 },
712 { CR111, 0x27 }, { CR112, 0x27 }, { CR113, 0x27 }, 736 { ZD_CR111, 0x27 }, { ZD_CR112, 0x27 }, { ZD_CR113, 0x27 },
713 { CR114, 0x27 }, { CR115, 0x26 }, { CR116, 0x24 }, 737 { ZD_CR114, 0x27 }, { ZD_CR115, 0x26 }, { ZD_CR116, 0x24 },
714 { CR117, 0xfc }, { CR118, 0xfa }, { CR119, 0x1e }, 738 { ZD_CR117, 0xfc }, { ZD_CR118, 0xfa }, { ZD_CR119, 0x1e },
715 { CR125, 0x90 }, { CR126, 0x00 }, { CR127, 0x00 }, 739 { ZD_CR125, 0x90 }, { ZD_CR126, 0x00 }, { ZD_CR127, 0x00 },
716 { CR128, 0x14 }, { CR129, 0x12 }, { CR130, 0x10 }, 740 { ZD_CR128, 0x14 }, { ZD_CR129, 0x12 }, { ZD_CR130, 0x10 },
717 { CR131, 0x0c }, { CR136, 0xdf }, { CR137, 0xa0 }, 741 { ZD_CR131, 0x0c }, { ZD_CR136, 0xdf }, { ZD_CR137, 0xa0 },
718 { CR138, 0xa8 }, { CR139, 0xb4 }, { CR140, 0x98 }, 742 { ZD_CR138, 0xa8 }, { ZD_CR139, 0xb4 }, { ZD_CR140, 0x98 },
719 { CR141, 0x82 }, { CR142, 0x53 }, { CR143, 0x1c }, 743 { ZD_CR141, 0x82 }, { ZD_CR142, 0x53 }, { ZD_CR143, 0x1c },
720 { CR144, 0x6c }, { CR147, 0x07 }, { CR148, 0x40 }, 744 { ZD_CR144, 0x6c }, { ZD_CR147, 0x07 }, { ZD_CR148, 0x40 },
721 { CR149, 0x40 }, /* Org:0x50 ComTrend:RalLink AP */ 745 { ZD_CR149, 0x40 }, /* Org:0x50 ComTrend:RalLink AP */
722 { CR150, 0x14 }, /* Org:0x0E ComTrend:RalLink AP */ 746 { ZD_CR150, 0x14 }, /* Org:0x0E ComTrend:RalLink AP */
723 { CR151, 0x18 }, { CR159, 0x70 }, { CR160, 0xfe }, 747 { ZD_CR151, 0x18 }, { ZD_CR159, 0x70 }, { ZD_CR160, 0xfe },
724 { CR161, 0xee }, { CR162, 0xaa }, { CR163, 0xfa }, 748 { ZD_CR161, 0xee }, { ZD_CR162, 0xaa }, { ZD_CR163, 0xfa },
725 { CR164, 0xfa }, { CR165, 0xea }, { CR166, 0xbe }, 749 { ZD_CR164, 0xfa }, { ZD_CR165, 0xea }, { ZD_CR166, 0xbe },
726 { CR167, 0xbe }, { CR168, 0x6a }, { CR169, 0xba }, 750 { ZD_CR167, 0xbe }, { ZD_CR168, 0x6a }, { ZD_CR169, 0xba },
727 { CR170, 0xba }, { CR171, 0xba }, 751 { ZD_CR170, 0xba }, { ZD_CR171, 0xba },
728 /* Note: CR204 must lead the CR203 */ 752 /* Note: ZD_CR204 must lead the ZD_CR203 */
729 { CR204, 0x7d }, 753 { ZD_CR204, 0x7d },
730 {}, 754 {},
731 { CR203, 0x30 }, 755 { ZD_CR203, 0x30 },
732 }; 756 };
733 757
734 int r, t; 758 int r, t;
@@ -848,11 +872,12 @@ static int get_aw_pt_bi(struct zd_chip *chip, struct aw_pt_bi *s)
848static int set_aw_pt_bi(struct zd_chip *chip, struct aw_pt_bi *s) 872static int set_aw_pt_bi(struct zd_chip *chip, struct aw_pt_bi *s)
849{ 873{
850 struct zd_ioreq32 reqs[3]; 874 struct zd_ioreq32 reqs[3];
875 u16 b_interval = s->beacon_interval & 0xffff;
851 876
852 if (s->beacon_interval <= 5) 877 if (b_interval <= 5)
853 s->beacon_interval = 5; 878 b_interval = 5;
854 if (s->pre_tbtt < 4 || s->pre_tbtt >= s->beacon_interval) 879 if (s->pre_tbtt < 4 || s->pre_tbtt >= b_interval)
855 s->pre_tbtt = s->beacon_interval - 1; 880 s->pre_tbtt = b_interval - 1;
856 if (s->atim_wnd_period >= s->pre_tbtt) 881 if (s->atim_wnd_period >= s->pre_tbtt)
857 s->atim_wnd_period = s->pre_tbtt - 1; 882 s->atim_wnd_period = s->pre_tbtt - 1;
858 883
@@ -861,31 +886,57 @@ static int set_aw_pt_bi(struct zd_chip *chip, struct aw_pt_bi *s)
861 reqs[1].addr = CR_PRE_TBTT; 886 reqs[1].addr = CR_PRE_TBTT;
862 reqs[1].value = s->pre_tbtt; 887 reqs[1].value = s->pre_tbtt;
863 reqs[2].addr = CR_BCN_INTERVAL; 888 reqs[2].addr = CR_BCN_INTERVAL;
864 reqs[2].value = s->beacon_interval; 889 reqs[2].value = (s->beacon_interval & ~0xffff) | b_interval;
865 890
866 return zd_iowrite32a_locked(chip, reqs, ARRAY_SIZE(reqs)); 891 return zd_iowrite32a_locked(chip, reqs, ARRAY_SIZE(reqs));
867} 892}
868 893
869 894
870static int set_beacon_interval(struct zd_chip *chip, u32 interval) 895static int set_beacon_interval(struct zd_chip *chip, u16 interval,
896 u8 dtim_period, int type)
871{ 897{
872 int r; 898 int r;
873 struct aw_pt_bi s; 899 struct aw_pt_bi s;
900 u32 b_interval, mode_flag;
874 901
875 ZD_ASSERT(mutex_is_locked(&chip->mutex)); 902 ZD_ASSERT(mutex_is_locked(&chip->mutex));
903
904 if (interval > 0) {
905 switch (type) {
906 case NL80211_IFTYPE_ADHOC:
907 case NL80211_IFTYPE_MESH_POINT:
908 mode_flag = BCN_MODE_IBSS;
909 break;
910 case NL80211_IFTYPE_AP:
911 mode_flag = BCN_MODE_AP;
912 break;
913 default:
914 mode_flag = 0;
915 break;
916 }
917 } else {
918 dtim_period = 0;
919 mode_flag = 0;
920 }
921
922 b_interval = mode_flag | (dtim_period << 16) | interval;
923
924 r = zd_iowrite32_locked(chip, b_interval, CR_BCN_INTERVAL);
925 if (r)
926 return r;
876 r = get_aw_pt_bi(chip, &s); 927 r = get_aw_pt_bi(chip, &s);
877 if (r) 928 if (r)
878 return r; 929 return r;
879 s.beacon_interval = interval;
880 return set_aw_pt_bi(chip, &s); 930 return set_aw_pt_bi(chip, &s);
881} 931}
882 932
883int zd_set_beacon_interval(struct zd_chip *chip, u32 interval) 933int zd_set_beacon_interval(struct zd_chip *chip, u16 interval, u8 dtim_period,
934 int type)
884{ 935{
885 int r; 936 int r;
886 937
887 mutex_lock(&chip->mutex); 938 mutex_lock(&chip->mutex);
888 r = set_beacon_interval(chip, interval); 939 r = set_beacon_interval(chip, interval, dtim_period, type);
889 mutex_unlock(&chip->mutex); 940 mutex_unlock(&chip->mutex);
890 return r; 941 return r;
891} 942}
@@ -904,7 +955,7 @@ static int hw_init(struct zd_chip *chip)
904 if (r) 955 if (r)
905 return r; 956 return r;
906 957
907 return set_beacon_interval(chip, 100); 958 return set_beacon_interval(chip, 100, 0, NL80211_IFTYPE_UNSPECIFIED);
908} 959}
909 960
910static zd_addr_t fw_reg_addr(struct zd_chip *chip, u16 offset) 961static zd_addr_t fw_reg_addr(struct zd_chip *chip, u16 offset)
@@ -973,6 +1024,7 @@ static void dump_fw_registers(struct zd_chip *chip)
973 1024
974static int print_fw_version(struct zd_chip *chip) 1025static int print_fw_version(struct zd_chip *chip)
975{ 1026{
1027 struct wiphy *wiphy = zd_chip_to_mac(chip)->hw->wiphy;
976 int r; 1028 int r;
977 u16 version; 1029 u16 version;
978 1030
@@ -982,6 +1034,10 @@ static int print_fw_version(struct zd_chip *chip)
982 return r; 1034 return r;
983 1035
984 dev_info(zd_chip_dev(chip),"firmware version %04hx\n", version); 1036 dev_info(zd_chip_dev(chip),"firmware version %04hx\n", version);
1037
1038 snprintf(wiphy->fw_version, sizeof(wiphy->fw_version),
1039 "%04hx", version);
1040
985 return 0; 1041 return 0;
986} 1042}
987 1043
@@ -1144,24 +1200,24 @@ out:
1144static int update_pwr_int(struct zd_chip *chip, u8 channel) 1200static int update_pwr_int(struct zd_chip *chip, u8 channel)
1145{ 1201{
1146 u8 value = chip->pwr_int_values[channel - 1]; 1202 u8 value = chip->pwr_int_values[channel - 1];
1147 return zd_iowrite16_locked(chip, value, CR31); 1203 return zd_iowrite16_locked(chip, value, ZD_CR31);
1148} 1204}
1149 1205
1150static int update_pwr_cal(struct zd_chip *chip, u8 channel) 1206static int update_pwr_cal(struct zd_chip *chip, u8 channel)
1151{ 1207{
1152 u8 value = chip->pwr_cal_values[channel-1]; 1208 u8 value = chip->pwr_cal_values[channel-1];
1153 return zd_iowrite16_locked(chip, value, CR68); 1209 return zd_iowrite16_locked(chip, value, ZD_CR68);
1154} 1210}
1155 1211
1156static int update_ofdm_cal(struct zd_chip *chip, u8 channel) 1212static int update_ofdm_cal(struct zd_chip *chip, u8 channel)
1157{ 1213{
1158 struct zd_ioreq16 ioreqs[3]; 1214 struct zd_ioreq16 ioreqs[3];
1159 1215
1160 ioreqs[0].addr = CR67; 1216 ioreqs[0].addr = ZD_CR67;
1161 ioreqs[0].value = chip->ofdm_cal_values[OFDM_36M_INDEX][channel-1]; 1217 ioreqs[0].value = chip->ofdm_cal_values[OFDM_36M_INDEX][channel-1];
1162 ioreqs[1].addr = CR66; 1218 ioreqs[1].addr = ZD_CR66;
1163 ioreqs[1].value = chip->ofdm_cal_values[OFDM_48M_INDEX][channel-1]; 1219 ioreqs[1].value = chip->ofdm_cal_values[OFDM_48M_INDEX][channel-1];
1164 ioreqs[2].addr = CR65; 1220 ioreqs[2].addr = ZD_CR65;
1165 ioreqs[2].value = chip->ofdm_cal_values[OFDM_54M_INDEX][channel-1]; 1221 ioreqs[2].value = chip->ofdm_cal_values[OFDM_54M_INDEX][channel-1];
1166 1222
1167 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); 1223 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
@@ -1180,9 +1236,9 @@ static int update_channel_integration_and_calibration(struct zd_chip *chip,
1180 return r; 1236 return r;
1181 if (zd_chip_is_zd1211b(chip)) { 1237 if (zd_chip_is_zd1211b(chip)) {
1182 static const struct zd_ioreq16 ioreqs[] = { 1238 static const struct zd_ioreq16 ioreqs[] = {
1183 { CR69, 0x28 }, 1239 { ZD_CR69, 0x28 },
1184 {}, 1240 {},
1185 { CR69, 0x2a }, 1241 { ZD_CR69, 0x2a },
1186 }; 1242 };
1187 1243
1188 r = update_ofdm_cal(chip, channel); 1244 r = update_ofdm_cal(chip, channel);
@@ -1213,7 +1269,7 @@ static int patch_cck_gain(struct zd_chip *chip)
1213 if (r) 1269 if (r)
1214 return r; 1270 return r;
1215 dev_dbg_f(zd_chip_dev(chip), "patching value %x\n", value & 0xff); 1271 dev_dbg_f(zd_chip_dev(chip), "patching value %x\n", value & 0xff);
1216 return zd_iowrite16_locked(chip, value & 0xff, CR47); 1272 return zd_iowrite16_locked(chip, value & 0xff, ZD_CR47);
1217} 1273}
1218 1274
1219int zd_chip_set_channel(struct zd_chip *chip, u8 channel) 1275int zd_chip_set_channel(struct zd_chip *chip, u8 channel)
@@ -1401,6 +1457,9 @@ void zd_chip_disable_int(struct zd_chip *chip)
1401 mutex_lock(&chip->mutex); 1457 mutex_lock(&chip->mutex);
1402 zd_usb_disable_int(&chip->usb); 1458 zd_usb_disable_int(&chip->usb);
1403 mutex_unlock(&chip->mutex); 1459 mutex_unlock(&chip->mutex);
1460
1461 /* cancel pending interrupt work */
1462 cancel_work_sync(&zd_chip_to_mac(chip)->process_intr);
1404} 1463}
1405 1464
1406int zd_chip_enable_rxtx(struct zd_chip *chip) 1465int zd_chip_enable_rxtx(struct zd_chip *chip)
@@ -1410,6 +1469,7 @@ int zd_chip_enable_rxtx(struct zd_chip *chip)
1410 mutex_lock(&chip->mutex); 1469 mutex_lock(&chip->mutex);
1411 zd_usb_enable_tx(&chip->usb); 1470 zd_usb_enable_tx(&chip->usb);
1412 r = zd_usb_enable_rx(&chip->usb); 1471 r = zd_usb_enable_rx(&chip->usb);
1472 zd_tx_watchdog_enable(&chip->usb);
1413 mutex_unlock(&chip->mutex); 1473 mutex_unlock(&chip->mutex);
1414 return r; 1474 return r;
1415} 1475}
@@ -1417,6 +1477,7 @@ int zd_chip_enable_rxtx(struct zd_chip *chip)
1417void zd_chip_disable_rxtx(struct zd_chip *chip) 1477void zd_chip_disable_rxtx(struct zd_chip *chip)
1418{ 1478{
1419 mutex_lock(&chip->mutex); 1479 mutex_lock(&chip->mutex);
1480 zd_tx_watchdog_disable(&chip->usb);
1420 zd_usb_disable_rx(&chip->usb); 1481 zd_usb_disable_rx(&chip->usb);
1421 zd_usb_disable_tx(&chip->usb); 1482 zd_usb_disable_tx(&chip->usb);
1422 mutex_unlock(&chip->mutex); 1483 mutex_unlock(&chip->mutex);
@@ -1443,10 +1504,10 @@ int zd_rfwritev_locked(struct zd_chip *chip,
1443 */ 1504 */
1444int zd_rfwrite_cr_locked(struct zd_chip *chip, u32 value) 1505int zd_rfwrite_cr_locked(struct zd_chip *chip, u32 value)
1445{ 1506{
1446 struct zd_ioreq16 ioreqs[] = { 1507 const struct zd_ioreq16 ioreqs[] = {
1447 { CR244, (value >> 16) & 0xff }, 1508 { ZD_CR244, (value >> 16) & 0xff },
1448 { CR243, (value >> 8) & 0xff }, 1509 { ZD_CR243, (value >> 8) & 0xff },
1449 { CR242, value & 0xff }, 1510 { ZD_CR242, value & 0xff },
1450 }; 1511 };
1451 ZD_ASSERT(mutex_is_locked(&chip->mutex)); 1512 ZD_ASSERT(mutex_is_locked(&chip->mutex));
1452 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); 1513 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
@@ -1470,7 +1531,7 @@ int zd_rfwritev_cr_locked(struct zd_chip *chip,
1470int zd_chip_set_multicast_hash(struct zd_chip *chip, 1531int zd_chip_set_multicast_hash(struct zd_chip *chip,
1471 struct zd_mc_hash *hash) 1532 struct zd_mc_hash *hash)
1472{ 1533{
1473 struct zd_ioreq32 ioreqs[] = { 1534 const struct zd_ioreq32 ioreqs[] = {
1474 { CR_GROUP_HASH_P1, hash->low }, 1535 { CR_GROUP_HASH_P1, hash->low },
1475 { CR_GROUP_HASH_P2, hash->high }, 1536 { CR_GROUP_HASH_P2, hash->high },
1476 }; 1537 };
diff --git a/drivers/net/wireless/zd1211rw/zd_chip.h b/drivers/net/wireless/zd1211rw/zd_chip.h
index f8bbf7d302ae..4be7c3b5b265 100644
--- a/drivers/net/wireless/zd1211rw/zd_chip.h
+++ b/drivers/net/wireless/zd1211rw/zd_chip.h
@@ -61,277 +61,288 @@ enum {
61#define FWRAW_DATA(offset) ((zd_addr_t)(FW_START + (offset))) 61#define FWRAW_DATA(offset) ((zd_addr_t)(FW_START + (offset)))
62 62
63/* 8-bit hardware registers */ 63/* 8-bit hardware registers */
64#define CR0 CTL_REG(0x0000) 64#define ZD_CR0 CTL_REG(0x0000)
65#define CR1 CTL_REG(0x0004) 65#define ZD_CR1 CTL_REG(0x0004)
66#define CR2 CTL_REG(0x0008) 66#define ZD_CR2 CTL_REG(0x0008)
67#define CR3 CTL_REG(0x000C) 67#define ZD_CR3 CTL_REG(0x000C)
68 68
69#define CR5 CTL_REG(0x0010) 69#define ZD_CR5 CTL_REG(0x0010)
70/* bit 5: if set short preamble used 70/* bit 5: if set short preamble used
71 * bit 6: filter band - Japan channel 14 on, else off 71 * bit 6: filter band - Japan channel 14 on, else off
72 */ 72 */
73#define CR6 CTL_REG(0x0014) 73#define ZD_CR6 CTL_REG(0x0014)
74#define CR7 CTL_REG(0x0018) 74#define ZD_CR7 CTL_REG(0x0018)
75#define CR8 CTL_REG(0x001C) 75#define ZD_CR8 CTL_REG(0x001C)
76 76
77#define CR4 CTL_REG(0x0020) 77#define ZD_CR4 CTL_REG(0x0020)
78 78
79#define CR9 CTL_REG(0x0024) 79#define ZD_CR9 CTL_REG(0x0024)
80/* bit 2: antenna switch (together with CR10) */ 80/* bit 2: antenna switch (together with ZD_CR10) */
81#define CR10 CTL_REG(0x0028) 81#define ZD_CR10 CTL_REG(0x0028)
82/* bit 1: antenna switch (together with CR9) 82/* bit 1: antenna switch (together with ZD_CR9)
83 * RF2959 controls with CR11 radion on and off 83 * RF2959 controls with ZD_CR11 radion on and off
84 */ 84 */
85#define CR11 CTL_REG(0x002C) 85#define ZD_CR11 CTL_REG(0x002C)
86/* bit 6: TX power control for OFDM 86/* bit 6: TX power control for OFDM
87 * RF2959 controls with CR10 radio on and off 87 * RF2959 controls with ZD_CR10 radio on and off
88 */ 88 */
89#define CR12 CTL_REG(0x0030) 89#define ZD_CR12 CTL_REG(0x0030)
90#define CR13 CTL_REG(0x0034) 90#define ZD_CR13 CTL_REG(0x0034)
91#define CR14 CTL_REG(0x0038) 91#define ZD_CR14 CTL_REG(0x0038)
92#define CR15 CTL_REG(0x003C) 92#define ZD_CR15 CTL_REG(0x003C)
93#define CR16 CTL_REG(0x0040) 93#define ZD_CR16 CTL_REG(0x0040)
94#define CR17 CTL_REG(0x0044) 94#define ZD_CR17 CTL_REG(0x0044)
95#define CR18 CTL_REG(0x0048) 95#define ZD_CR18 CTL_REG(0x0048)
96#define CR19 CTL_REG(0x004C) 96#define ZD_CR19 CTL_REG(0x004C)
97#define CR20 CTL_REG(0x0050) 97#define ZD_CR20 CTL_REG(0x0050)
98#define CR21 CTL_REG(0x0054) 98#define ZD_CR21 CTL_REG(0x0054)
99#define CR22 CTL_REG(0x0058) 99#define ZD_CR22 CTL_REG(0x0058)
100#define CR23 CTL_REG(0x005C) 100#define ZD_CR23 CTL_REG(0x005C)
101#define CR24 CTL_REG(0x0060) /* CCA threshold */ 101#define ZD_CR24 CTL_REG(0x0060) /* CCA threshold */
102#define CR25 CTL_REG(0x0064) 102#define ZD_CR25 CTL_REG(0x0064)
103#define CR26 CTL_REG(0x0068) 103#define ZD_CR26 CTL_REG(0x0068)
104#define CR27 CTL_REG(0x006C) 104#define ZD_CR27 CTL_REG(0x006C)
105#define CR28 CTL_REG(0x0070) 105#define ZD_CR28 CTL_REG(0x0070)
106#define CR29 CTL_REG(0x0074) 106#define ZD_CR29 CTL_REG(0x0074)
107#define CR30 CTL_REG(0x0078) 107#define ZD_CR30 CTL_REG(0x0078)
108#define CR31 CTL_REG(0x007C) /* TX power control for RF in CCK mode */ 108#define ZD_CR31 CTL_REG(0x007C) /* TX power control for RF in
109#define CR32 CTL_REG(0x0080) 109 * CCK mode
110#define CR33 CTL_REG(0x0084) 110 */
111#define CR34 CTL_REG(0x0088) 111#define ZD_CR32 CTL_REG(0x0080)
112#define CR35 CTL_REG(0x008C) 112#define ZD_CR33 CTL_REG(0x0084)
113#define CR36 CTL_REG(0x0090) 113#define ZD_CR34 CTL_REG(0x0088)
114#define CR37 CTL_REG(0x0094) 114#define ZD_CR35 CTL_REG(0x008C)
115#define CR38 CTL_REG(0x0098) 115#define ZD_CR36 CTL_REG(0x0090)
116#define CR39 CTL_REG(0x009C) 116#define ZD_CR37 CTL_REG(0x0094)
117#define CR40 CTL_REG(0x00A0) 117#define ZD_CR38 CTL_REG(0x0098)
118#define CR41 CTL_REG(0x00A4) 118#define ZD_CR39 CTL_REG(0x009C)
119#define CR42 CTL_REG(0x00A8) 119#define ZD_CR40 CTL_REG(0x00A0)
120#define CR43 CTL_REG(0x00AC) 120#define ZD_CR41 CTL_REG(0x00A4)
121#define CR44 CTL_REG(0x00B0) 121#define ZD_CR42 CTL_REG(0x00A8)
122#define CR45 CTL_REG(0x00B4) 122#define ZD_CR43 CTL_REG(0x00AC)
123#define CR46 CTL_REG(0x00B8) 123#define ZD_CR44 CTL_REG(0x00B0)
124#define CR47 CTL_REG(0x00BC) /* CCK baseband gain 124#define ZD_CR45 CTL_REG(0x00B4)
125 * (patch value might be in EEPROM) 125#define ZD_CR46 CTL_REG(0x00B8)
126 */ 126#define ZD_CR47 CTL_REG(0x00BC) /* CCK baseband gain
127#define CR48 CTL_REG(0x00C0) 127 * (patch value might be in EEPROM)
128#define CR49 CTL_REG(0x00C4) 128 */
129#define CR50 CTL_REG(0x00C8) 129#define ZD_CR48 CTL_REG(0x00C0)
130#define CR51 CTL_REG(0x00CC) /* TX power control for RF in 6-36M modes */ 130#define ZD_CR49 CTL_REG(0x00C4)
131#define CR52 CTL_REG(0x00D0) /* TX power control for RF in 48M mode */ 131#define ZD_CR50 CTL_REG(0x00C8)
132#define CR53 CTL_REG(0x00D4) /* TX power control for RF in 54M mode */ 132#define ZD_CR51 CTL_REG(0x00CC) /* TX power control for RF in
133#define CR54 CTL_REG(0x00D8) 133 * 6-36M modes
134#define CR55 CTL_REG(0x00DC) 134 */
135#define CR56 CTL_REG(0x00E0) 135#define ZD_CR52 CTL_REG(0x00D0) /* TX power control for RF in
136#define CR57 CTL_REG(0x00E4) 136 * 48M mode
137#define CR58 CTL_REG(0x00E8) 137 */
138#define CR59 CTL_REG(0x00EC) 138#define ZD_CR53 CTL_REG(0x00D4) /* TX power control for RF in
139#define CR60 CTL_REG(0x00F0) 139 * 54M mode
140#define CR61 CTL_REG(0x00F4) 140 */
141#define CR62 CTL_REG(0x00F8) 141#define ZD_CR54 CTL_REG(0x00D8)
142#define CR63 CTL_REG(0x00FC) 142#define ZD_CR55 CTL_REG(0x00DC)
143#define CR64 CTL_REG(0x0100) 143#define ZD_CR56 CTL_REG(0x00E0)
144#define CR65 CTL_REG(0x0104) /* OFDM 54M calibration */ 144#define ZD_CR57 CTL_REG(0x00E4)
145#define CR66 CTL_REG(0x0108) /* OFDM 48M calibration */ 145#define ZD_CR58 CTL_REG(0x00E8)
146#define CR67 CTL_REG(0x010C) /* OFDM 36M calibration */ 146#define ZD_CR59 CTL_REG(0x00EC)
147#define CR68 CTL_REG(0x0110) /* CCK calibration */ 147#define ZD_CR60 CTL_REG(0x00F0)
148#define CR69 CTL_REG(0x0114) 148#define ZD_CR61 CTL_REG(0x00F4)
149#define CR70 CTL_REG(0x0118) 149#define ZD_CR62 CTL_REG(0x00F8)
150#define CR71 CTL_REG(0x011C) 150#define ZD_CR63 CTL_REG(0x00FC)
151#define CR72 CTL_REG(0x0120) 151#define ZD_CR64 CTL_REG(0x0100)
152#define CR73 CTL_REG(0x0124) 152#define ZD_CR65 CTL_REG(0x0104) /* OFDM 54M calibration */
153#define CR74 CTL_REG(0x0128) 153#define ZD_CR66 CTL_REG(0x0108) /* OFDM 48M calibration */
154#define CR75 CTL_REG(0x012C) 154#define ZD_CR67 CTL_REG(0x010C) /* OFDM 36M calibration */
155#define CR76 CTL_REG(0x0130) 155#define ZD_CR68 CTL_REG(0x0110) /* CCK calibration */
156#define CR77 CTL_REG(0x0134) 156#define ZD_CR69 CTL_REG(0x0114)
157#define CR78 CTL_REG(0x0138) 157#define ZD_CR70 CTL_REG(0x0118)
158#define CR79 CTL_REG(0x013C) 158#define ZD_CR71 CTL_REG(0x011C)
159#define CR80 CTL_REG(0x0140) 159#define ZD_CR72 CTL_REG(0x0120)
160#define CR81 CTL_REG(0x0144) 160#define ZD_CR73 CTL_REG(0x0124)
161#define CR82 CTL_REG(0x0148) 161#define ZD_CR74 CTL_REG(0x0128)
162#define CR83 CTL_REG(0x014C) 162#define ZD_CR75 CTL_REG(0x012C)
163#define CR84 CTL_REG(0x0150) 163#define ZD_CR76 CTL_REG(0x0130)
164#define CR85 CTL_REG(0x0154) 164#define ZD_CR77 CTL_REG(0x0134)
165#define CR86 CTL_REG(0x0158) 165#define ZD_CR78 CTL_REG(0x0138)
166#define CR87 CTL_REG(0x015C) 166#define ZD_CR79 CTL_REG(0x013C)
167#define CR88 CTL_REG(0x0160) 167#define ZD_CR80 CTL_REG(0x0140)
168#define CR89 CTL_REG(0x0164) 168#define ZD_CR81 CTL_REG(0x0144)
169#define CR90 CTL_REG(0x0168) 169#define ZD_CR82 CTL_REG(0x0148)
170#define CR91 CTL_REG(0x016C) 170#define ZD_CR83 CTL_REG(0x014C)
171#define CR92 CTL_REG(0x0170) 171#define ZD_CR84 CTL_REG(0x0150)
172#define CR93 CTL_REG(0x0174) 172#define ZD_CR85 CTL_REG(0x0154)
173#define CR94 CTL_REG(0x0178) 173#define ZD_CR86 CTL_REG(0x0158)
174#define CR95 CTL_REG(0x017C) 174#define ZD_CR87 CTL_REG(0x015C)
175#define CR96 CTL_REG(0x0180) 175#define ZD_CR88 CTL_REG(0x0160)
176#define CR97 CTL_REG(0x0184) 176#define ZD_CR89 CTL_REG(0x0164)
177#define CR98 CTL_REG(0x0188) 177#define ZD_CR90 CTL_REG(0x0168)
178#define CR99 CTL_REG(0x018C) 178#define ZD_CR91 CTL_REG(0x016C)
179#define CR100 CTL_REG(0x0190) 179#define ZD_CR92 CTL_REG(0x0170)
180#define CR101 CTL_REG(0x0194) 180#define ZD_CR93 CTL_REG(0x0174)
181#define CR102 CTL_REG(0x0198) 181#define ZD_CR94 CTL_REG(0x0178)
182#define CR103 CTL_REG(0x019C) 182#define ZD_CR95 CTL_REG(0x017C)
183#define CR104 CTL_REG(0x01A0) 183#define ZD_CR96 CTL_REG(0x0180)
184#define CR105 CTL_REG(0x01A4) 184#define ZD_CR97 CTL_REG(0x0184)
185#define CR106 CTL_REG(0x01A8) 185#define ZD_CR98 CTL_REG(0x0188)
186#define CR107 CTL_REG(0x01AC) 186#define ZD_CR99 CTL_REG(0x018C)
187#define CR108 CTL_REG(0x01B0) 187#define ZD_CR100 CTL_REG(0x0190)
188#define CR109 CTL_REG(0x01B4) 188#define ZD_CR101 CTL_REG(0x0194)
189#define CR110 CTL_REG(0x01B8) 189#define ZD_CR102 CTL_REG(0x0198)
190#define CR111 CTL_REG(0x01BC) 190#define ZD_CR103 CTL_REG(0x019C)
191#define CR112 CTL_REG(0x01C0) 191#define ZD_CR104 CTL_REG(0x01A0)
192#define CR113 CTL_REG(0x01C4) 192#define ZD_CR105 CTL_REG(0x01A4)
193#define CR114 CTL_REG(0x01C8) 193#define ZD_CR106 CTL_REG(0x01A8)
194#define CR115 CTL_REG(0x01CC) 194#define ZD_CR107 CTL_REG(0x01AC)
195#define CR116 CTL_REG(0x01D0) 195#define ZD_CR108 CTL_REG(0x01B0)
196#define CR117 CTL_REG(0x01D4) 196#define ZD_CR109 CTL_REG(0x01B4)
197#define CR118 CTL_REG(0x01D8) 197#define ZD_CR110 CTL_REG(0x01B8)
198#define CR119 CTL_REG(0x01DC) 198#define ZD_CR111 CTL_REG(0x01BC)
199#define CR120 CTL_REG(0x01E0) 199#define ZD_CR112 CTL_REG(0x01C0)
200#define CR121 CTL_REG(0x01E4) 200#define ZD_CR113 CTL_REG(0x01C4)
201#define CR122 CTL_REG(0x01E8) 201#define ZD_CR114 CTL_REG(0x01C8)
202#define CR123 CTL_REG(0x01EC) 202#define ZD_CR115 CTL_REG(0x01CC)
203#define CR124 CTL_REG(0x01F0) 203#define ZD_CR116 CTL_REG(0x01D0)
204#define CR125 CTL_REG(0x01F4) 204#define ZD_CR117 CTL_REG(0x01D4)
205#define CR126 CTL_REG(0x01F8) 205#define ZD_CR118 CTL_REG(0x01D8)
206#define CR127 CTL_REG(0x01FC) 206#define ZD_CR119 CTL_REG(0x01DC)
207#define CR128 CTL_REG(0x0200) 207#define ZD_CR120 CTL_REG(0x01E0)
208#define CR129 CTL_REG(0x0204) 208#define ZD_CR121 CTL_REG(0x01E4)
209#define CR130 CTL_REG(0x0208) 209#define ZD_CR122 CTL_REG(0x01E8)
210#define CR131 CTL_REG(0x020C) 210#define ZD_CR123 CTL_REG(0x01EC)
211#define CR132 CTL_REG(0x0210) 211#define ZD_CR124 CTL_REG(0x01F0)
212#define CR133 CTL_REG(0x0214) 212#define ZD_CR125 CTL_REG(0x01F4)
213#define CR134 CTL_REG(0x0218) 213#define ZD_CR126 CTL_REG(0x01F8)
214#define CR135 CTL_REG(0x021C) 214#define ZD_CR127 CTL_REG(0x01FC)
215#define CR136 CTL_REG(0x0220) 215#define ZD_CR128 CTL_REG(0x0200)
216#define CR137 CTL_REG(0x0224) 216#define ZD_CR129 CTL_REG(0x0204)
217#define CR138 CTL_REG(0x0228) 217#define ZD_CR130 CTL_REG(0x0208)
218#define CR139 CTL_REG(0x022C) 218#define ZD_CR131 CTL_REG(0x020C)
219#define CR140 CTL_REG(0x0230) 219#define ZD_CR132 CTL_REG(0x0210)
220#define CR141 CTL_REG(0x0234) 220#define ZD_CR133 CTL_REG(0x0214)
221#define CR142 CTL_REG(0x0238) 221#define ZD_CR134 CTL_REG(0x0218)
222#define CR143 CTL_REG(0x023C) 222#define ZD_CR135 CTL_REG(0x021C)
223#define CR144 CTL_REG(0x0240) 223#define ZD_CR136 CTL_REG(0x0220)
224#define CR145 CTL_REG(0x0244) 224#define ZD_CR137 CTL_REG(0x0224)
225#define CR146 CTL_REG(0x0248) 225#define ZD_CR138 CTL_REG(0x0228)
226#define CR147 CTL_REG(0x024C) 226#define ZD_CR139 CTL_REG(0x022C)
227#define CR148 CTL_REG(0x0250) 227#define ZD_CR140 CTL_REG(0x0230)
228#define CR149 CTL_REG(0x0254) 228#define ZD_CR141 CTL_REG(0x0234)
229#define CR150 CTL_REG(0x0258) 229#define ZD_CR142 CTL_REG(0x0238)
230#define CR151 CTL_REG(0x025C) 230#define ZD_CR143 CTL_REG(0x023C)
231#define CR152 CTL_REG(0x0260) 231#define ZD_CR144 CTL_REG(0x0240)
232#define CR153 CTL_REG(0x0264) 232#define ZD_CR145 CTL_REG(0x0244)
233#define CR154 CTL_REG(0x0268) 233#define ZD_CR146 CTL_REG(0x0248)
234#define CR155 CTL_REG(0x026C) 234#define ZD_CR147 CTL_REG(0x024C)
235#define CR156 CTL_REG(0x0270) 235#define ZD_CR148 CTL_REG(0x0250)
236#define CR157 CTL_REG(0x0274) 236#define ZD_CR149 CTL_REG(0x0254)
237#define CR158 CTL_REG(0x0278) 237#define ZD_CR150 CTL_REG(0x0258)
238#define CR159 CTL_REG(0x027C) 238#define ZD_CR151 CTL_REG(0x025C)
239#define CR160 CTL_REG(0x0280) 239#define ZD_CR152 CTL_REG(0x0260)
240#define CR161 CTL_REG(0x0284) 240#define ZD_CR153 CTL_REG(0x0264)
241#define CR162 CTL_REG(0x0288) 241#define ZD_CR154 CTL_REG(0x0268)
242#define CR163 CTL_REG(0x028C) 242#define ZD_CR155 CTL_REG(0x026C)
243#define CR164 CTL_REG(0x0290) 243#define ZD_CR156 CTL_REG(0x0270)
244#define CR165 CTL_REG(0x0294) 244#define ZD_CR157 CTL_REG(0x0274)
245#define CR166 CTL_REG(0x0298) 245#define ZD_CR158 CTL_REG(0x0278)
246#define CR167 CTL_REG(0x029C) 246#define ZD_CR159 CTL_REG(0x027C)
247#define CR168 CTL_REG(0x02A0) 247#define ZD_CR160 CTL_REG(0x0280)
248#define CR169 CTL_REG(0x02A4) 248#define ZD_CR161 CTL_REG(0x0284)
249#define CR170 CTL_REG(0x02A8) 249#define ZD_CR162 CTL_REG(0x0288)
250#define CR171 CTL_REG(0x02AC) 250#define ZD_CR163 CTL_REG(0x028C)
251#define CR172 CTL_REG(0x02B0) 251#define ZD_CR164 CTL_REG(0x0290)
252#define CR173 CTL_REG(0x02B4) 252#define ZD_CR165 CTL_REG(0x0294)
253#define CR174 CTL_REG(0x02B8) 253#define ZD_CR166 CTL_REG(0x0298)
254#define CR175 CTL_REG(0x02BC) 254#define ZD_CR167 CTL_REG(0x029C)
255#define CR176 CTL_REG(0x02C0) 255#define ZD_CR168 CTL_REG(0x02A0)
256#define CR177 CTL_REG(0x02C4) 256#define ZD_CR169 CTL_REG(0x02A4)
257#define CR178 CTL_REG(0x02C8) 257#define ZD_CR170 CTL_REG(0x02A8)
258#define CR179 CTL_REG(0x02CC) 258#define ZD_CR171 CTL_REG(0x02AC)
259#define CR180 CTL_REG(0x02D0) 259#define ZD_CR172 CTL_REG(0x02B0)
260#define CR181 CTL_REG(0x02D4) 260#define ZD_CR173 CTL_REG(0x02B4)
261#define CR182 CTL_REG(0x02D8) 261#define ZD_CR174 CTL_REG(0x02B8)
262#define CR183 CTL_REG(0x02DC) 262#define ZD_CR175 CTL_REG(0x02BC)
263#define CR184 CTL_REG(0x02E0) 263#define ZD_CR176 CTL_REG(0x02C0)
264#define CR185 CTL_REG(0x02E4) 264#define ZD_CR177 CTL_REG(0x02C4)
265#define CR186 CTL_REG(0x02E8) 265#define ZD_CR178 CTL_REG(0x02C8)
266#define CR187 CTL_REG(0x02EC) 266#define ZD_CR179 CTL_REG(0x02CC)
267#define CR188 CTL_REG(0x02F0) 267#define ZD_CR180 CTL_REG(0x02D0)
268#define CR189 CTL_REG(0x02F4) 268#define ZD_CR181 CTL_REG(0x02D4)
269#define CR190 CTL_REG(0x02F8) 269#define ZD_CR182 CTL_REG(0x02D8)
270#define CR191 CTL_REG(0x02FC) 270#define ZD_CR183 CTL_REG(0x02DC)
271#define CR192 CTL_REG(0x0300) 271#define ZD_CR184 CTL_REG(0x02E0)
272#define CR193 CTL_REG(0x0304) 272#define ZD_CR185 CTL_REG(0x02E4)
273#define CR194 CTL_REG(0x0308) 273#define ZD_CR186 CTL_REG(0x02E8)
274#define CR195 CTL_REG(0x030C) 274#define ZD_CR187 CTL_REG(0x02EC)
275#define CR196 CTL_REG(0x0310) 275#define ZD_CR188 CTL_REG(0x02F0)
276#define CR197 CTL_REG(0x0314) 276#define ZD_CR189 CTL_REG(0x02F4)
277#define CR198 CTL_REG(0x0318) 277#define ZD_CR190 CTL_REG(0x02F8)
278#define CR199 CTL_REG(0x031C) 278#define ZD_CR191 CTL_REG(0x02FC)
279#define CR200 CTL_REG(0x0320) 279#define ZD_CR192 CTL_REG(0x0300)
280#define CR201 CTL_REG(0x0324) 280#define ZD_CR193 CTL_REG(0x0304)
281#define CR202 CTL_REG(0x0328) 281#define ZD_CR194 CTL_REG(0x0308)
282#define CR203 CTL_REG(0x032C) /* I2C bus template value & flash control */ 282#define ZD_CR195 CTL_REG(0x030C)
283#define CR204 CTL_REG(0x0330) 283#define ZD_CR196 CTL_REG(0x0310)
284#define CR205 CTL_REG(0x0334) 284#define ZD_CR197 CTL_REG(0x0314)
285#define CR206 CTL_REG(0x0338) 285#define ZD_CR198 CTL_REG(0x0318)
286#define CR207 CTL_REG(0x033C) 286#define ZD_CR199 CTL_REG(0x031C)
287#define CR208 CTL_REG(0x0340) 287#define ZD_CR200 CTL_REG(0x0320)
288#define CR209 CTL_REG(0x0344) 288#define ZD_CR201 CTL_REG(0x0324)
289#define CR210 CTL_REG(0x0348) 289#define ZD_CR202 CTL_REG(0x0328)
290#define CR211 CTL_REG(0x034C) 290#define ZD_CR203 CTL_REG(0x032C) /* I2C bus template value & flash
291#define CR212 CTL_REG(0x0350) 291 * control
292#define CR213 CTL_REG(0x0354) 292 */
293#define CR214 CTL_REG(0x0358) 293#define ZD_CR204 CTL_REG(0x0330)
294#define CR215 CTL_REG(0x035C) 294#define ZD_CR205 CTL_REG(0x0334)
295#define CR216 CTL_REG(0x0360) 295#define ZD_CR206 CTL_REG(0x0338)
296#define CR217 CTL_REG(0x0364) 296#define ZD_CR207 CTL_REG(0x033C)
297#define CR218 CTL_REG(0x0368) 297#define ZD_CR208 CTL_REG(0x0340)
298#define CR219 CTL_REG(0x036C) 298#define ZD_CR209 CTL_REG(0x0344)
299#define CR220 CTL_REG(0x0370) 299#define ZD_CR210 CTL_REG(0x0348)
300#define CR221 CTL_REG(0x0374) 300#define ZD_CR211 CTL_REG(0x034C)
301#define CR222 CTL_REG(0x0378) 301#define ZD_CR212 CTL_REG(0x0350)
302#define CR223 CTL_REG(0x037C) 302#define ZD_CR213 CTL_REG(0x0354)
303#define CR224 CTL_REG(0x0380) 303#define ZD_CR214 CTL_REG(0x0358)
304#define CR225 CTL_REG(0x0384) 304#define ZD_CR215 CTL_REG(0x035C)
305#define CR226 CTL_REG(0x0388) 305#define ZD_CR216 CTL_REG(0x0360)
306#define CR227 CTL_REG(0x038C) 306#define ZD_CR217 CTL_REG(0x0364)
307#define CR228 CTL_REG(0x0390) 307#define ZD_CR218 CTL_REG(0x0368)
308#define CR229 CTL_REG(0x0394) 308#define ZD_CR219 CTL_REG(0x036C)
309#define CR230 CTL_REG(0x0398) 309#define ZD_CR220 CTL_REG(0x0370)
310#define CR231 CTL_REG(0x039C) 310#define ZD_CR221 CTL_REG(0x0374)
311#define CR232 CTL_REG(0x03A0) 311#define ZD_CR222 CTL_REG(0x0378)
312#define CR233 CTL_REG(0x03A4) 312#define ZD_CR223 CTL_REG(0x037C)
313#define CR234 CTL_REG(0x03A8) 313#define ZD_CR224 CTL_REG(0x0380)
314#define CR235 CTL_REG(0x03AC) 314#define ZD_CR225 CTL_REG(0x0384)
315#define CR236 CTL_REG(0x03B0) 315#define ZD_CR226 CTL_REG(0x0388)
316 316#define ZD_CR227 CTL_REG(0x038C)
317#define CR240 CTL_REG(0x03C0) 317#define ZD_CR228 CTL_REG(0x0390)
318/* bit 7: host-controlled RF register writes 318#define ZD_CR229 CTL_REG(0x0394)
319 * CR241-CR245: for hardware controlled writing of RF bits, not needed for 319#define ZD_CR230 CTL_REG(0x0398)
320 * USB 320#define ZD_CR231 CTL_REG(0x039C)
321#define ZD_CR232 CTL_REG(0x03A0)
322#define ZD_CR233 CTL_REG(0x03A4)
323#define ZD_CR234 CTL_REG(0x03A8)
324#define ZD_CR235 CTL_REG(0x03AC)
325#define ZD_CR236 CTL_REG(0x03B0)
326
327#define ZD_CR240 CTL_REG(0x03C0)
328/* bit 7: host-controlled RF register writes
329 * ZD_CR241-ZD_CR245: for hardware controlled writing of RF bits, not needed for
330 * USB
321 */ 331 */
322#define CR241 CTL_REG(0x03C4) 332#define ZD_CR241 CTL_REG(0x03C4)
323#define CR242 CTL_REG(0x03C8) 333#define ZD_CR242 CTL_REG(0x03C8)
324#define CR243 CTL_REG(0x03CC) 334#define ZD_CR243 CTL_REG(0x03CC)
325#define CR244 CTL_REG(0x03D0) 335#define ZD_CR244 CTL_REG(0x03D0)
326#define CR245 CTL_REG(0x03D4) 336#define ZD_CR245 CTL_REG(0x03D4)
327 337
328#define CR251 CTL_REG(0x03EC) /* only used for activation and deactivation of 338#define ZD_CR251 CTL_REG(0x03EC) /* only used for activation and
329 * Airoha RFs AL2230 and AL7230B 339 * deactivation of Airoha RFs AL2230
330 */ 340 * and AL7230B
331#define CR252 CTL_REG(0x03F0) 341 */
332#define CR253 CTL_REG(0x03F4) 342#define ZD_CR252 CTL_REG(0x03F0)
333#define CR254 CTL_REG(0x03F8) 343#define ZD_CR253 CTL_REG(0x03F4)
334#define CR255 CTL_REG(0x03FC) 344#define ZD_CR254 CTL_REG(0x03F8)
345#define ZD_CR255 CTL_REG(0x03FC)
335 346
336#define CR_MAX_PHY_REG 255 347#define CR_MAX_PHY_REG 255
337 348
@@ -546,6 +557,7 @@ enum {
546#define RX_FILTER_CTRL (RX_FILTER_RTS | RX_FILTER_CTS | \ 557#define RX_FILTER_CTRL (RX_FILTER_RTS | RX_FILTER_CTS | \
547 RX_FILTER_CFEND | RX_FILTER_CFACK) 558 RX_FILTER_CFEND | RX_FILTER_CFACK)
548 559
560#define BCN_MODE_AP 0x1000000
549#define BCN_MODE_IBSS 0x2000000 561#define BCN_MODE_IBSS 0x2000000
550 562
551/* Monitor mode sets filter to 0xfffff */ 563/* Monitor mode sets filter to 0xfffff */
@@ -881,6 +893,7 @@ static inline u8 _zd_chip_get_channel(struct zd_chip *chip)
881u8 zd_chip_get_channel(struct zd_chip *chip); 893u8 zd_chip_get_channel(struct zd_chip *chip);
882int zd_read_regdomain(struct zd_chip *chip, u8 *regdomain); 894int zd_read_regdomain(struct zd_chip *chip, u8 *regdomain);
883int zd_write_mac_addr(struct zd_chip *chip, const u8 *mac_addr); 895int zd_write_mac_addr(struct zd_chip *chip, const u8 *mac_addr);
896int zd_write_bssid(struct zd_chip *chip, const u8 *bssid);
884int zd_chip_switch_radio_on(struct zd_chip *chip); 897int zd_chip_switch_radio_on(struct zd_chip *chip);
885int zd_chip_switch_radio_off(struct zd_chip *chip); 898int zd_chip_switch_radio_off(struct zd_chip *chip);
886int zd_chip_enable_int(struct zd_chip *chip); 899int zd_chip_enable_int(struct zd_chip *chip);
@@ -920,7 +933,8 @@ enum led_status {
920 933
921int zd_chip_control_leds(struct zd_chip *chip, enum led_status status); 934int zd_chip_control_leds(struct zd_chip *chip, enum led_status status);
922 935
923int zd_set_beacon_interval(struct zd_chip *chip, u32 interval); 936int zd_set_beacon_interval(struct zd_chip *chip, u16 interval, u8 dtim_period,
937 int type);
924 938
925static inline int zd_get_beacon_interval(struct zd_chip *chip, u32 *interval) 939static inline int zd_get_beacon_interval(struct zd_chip *chip, u32 *interval)
926{ 940{
diff --git a/drivers/net/wireless/zd1211rw/zd_def.h b/drivers/net/wireless/zd1211rw/zd_def.h
index 6ac597ffd3b9..5463ca9ebc01 100644
--- a/drivers/net/wireless/zd1211rw/zd_def.h
+++ b/drivers/net/wireless/zd1211rw/zd_def.h
@@ -45,7 +45,7 @@ typedef u16 __nocast zd_addr_t;
45#ifdef DEBUG 45#ifdef DEBUG
46# define ZD_ASSERT(x) \ 46# define ZD_ASSERT(x) \
47do { \ 47do { \
48 if (!(x)) { \ 48 if (unlikely(!(x))) { \
49 pr_debug("%s:%d ASSERT %s VIOLATED!\n", \ 49 pr_debug("%s:%d ASSERT %s VIOLATED!\n", \
50 __FILE__, __LINE__, __stringify(x)); \ 50 __FILE__, __LINE__, __stringify(x)); \
51 dump_stack(); \ 51 dump_stack(); \
diff --git a/drivers/net/wireless/zd1211rw/zd_mac.c b/drivers/net/wireless/zd1211rw/zd_mac.c
index 43307bd42a69..5037c8b2b415 100644
--- a/drivers/net/wireless/zd1211rw/zd_mac.c
+++ b/drivers/net/wireless/zd1211rw/zd_mac.c
@@ -138,6 +138,12 @@ static const struct ieee80211_channel zd_channels[] = {
138static void housekeeping_init(struct zd_mac *mac); 138static void housekeeping_init(struct zd_mac *mac);
139static void housekeeping_enable(struct zd_mac *mac); 139static void housekeeping_enable(struct zd_mac *mac);
140static void housekeeping_disable(struct zd_mac *mac); 140static void housekeeping_disable(struct zd_mac *mac);
141static void beacon_init(struct zd_mac *mac);
142static void beacon_enable(struct zd_mac *mac);
143static void beacon_disable(struct zd_mac *mac);
144static void set_rts_cts(struct zd_mac *mac, unsigned int short_preamble);
145static int zd_mac_config_beacon(struct ieee80211_hw *hw,
146 struct sk_buff *beacon);
141 147
142static int zd_reg2alpha2(u8 regdomain, char *alpha2) 148static int zd_reg2alpha2(u8 regdomain, char *alpha2)
143{ 149{
@@ -231,6 +237,26 @@ static int set_rx_filter(struct zd_mac *mac)
231 return zd_iowrite32(&mac->chip, CR_RX_FILTER, filter); 237 return zd_iowrite32(&mac->chip, CR_RX_FILTER, filter);
232} 238}
233 239
240static int set_mac_and_bssid(struct zd_mac *mac)
241{
242 int r;
243
244 if (!mac->vif)
245 return -1;
246
247 r = zd_write_mac_addr(&mac->chip, mac->vif->addr);
248 if (r)
249 return r;
250
251 /* Vendor driver after setting MAC either sets BSSID for AP or
252 * filter for other modes.
253 */
254 if (mac->type != NL80211_IFTYPE_AP)
255 return set_rx_filter(mac);
256 else
257 return zd_write_bssid(&mac->chip, mac->vif->addr);
258}
259
234static int set_mc_hash(struct zd_mac *mac) 260static int set_mc_hash(struct zd_mac *mac)
235{ 261{
236 struct zd_mc_hash hash; 262 struct zd_mc_hash hash;
@@ -238,7 +264,7 @@ static int set_mc_hash(struct zd_mac *mac)
238 return zd_chip_set_multicast_hash(&mac->chip, &hash); 264 return zd_chip_set_multicast_hash(&mac->chip, &hash);
239} 265}
240 266
241static int zd_op_start(struct ieee80211_hw *hw) 267int zd_op_start(struct ieee80211_hw *hw)
242{ 268{
243 struct zd_mac *mac = zd_hw_mac(hw); 269 struct zd_mac *mac = zd_hw_mac(hw);
244 struct zd_chip *chip = &mac->chip; 270 struct zd_chip *chip = &mac->chip;
@@ -275,6 +301,8 @@ static int zd_op_start(struct ieee80211_hw *hw)
275 goto disable_rxtx; 301 goto disable_rxtx;
276 302
277 housekeeping_enable(mac); 303 housekeeping_enable(mac);
304 beacon_enable(mac);
305 set_bit(ZD_DEVICE_RUNNING, &mac->flags);
278 return 0; 306 return 0;
279disable_rxtx: 307disable_rxtx:
280 zd_chip_disable_rxtx(chip); 308 zd_chip_disable_rxtx(chip);
@@ -286,19 +314,22 @@ out:
286 return r; 314 return r;
287} 315}
288 316
289static void zd_op_stop(struct ieee80211_hw *hw) 317void zd_op_stop(struct ieee80211_hw *hw)
290{ 318{
291 struct zd_mac *mac = zd_hw_mac(hw); 319 struct zd_mac *mac = zd_hw_mac(hw);
292 struct zd_chip *chip = &mac->chip; 320 struct zd_chip *chip = &mac->chip;
293 struct sk_buff *skb; 321 struct sk_buff *skb;
294 struct sk_buff_head *ack_wait_queue = &mac->ack_wait_queue; 322 struct sk_buff_head *ack_wait_queue = &mac->ack_wait_queue;
295 323
324 clear_bit(ZD_DEVICE_RUNNING, &mac->flags);
325
296 /* The order here deliberately is a little different from the open() 326 /* The order here deliberately is a little different from the open()
297 * method, since we need to make sure there is no opportunity for RX 327 * method, since we need to make sure there is no opportunity for RX
298 * frames to be processed by mac80211 after we have stopped it. 328 * frames to be processed by mac80211 after we have stopped it.
299 */ 329 */
300 330
301 zd_chip_disable_rxtx(chip); 331 zd_chip_disable_rxtx(chip);
332 beacon_disable(mac);
302 housekeeping_disable(mac); 333 housekeeping_disable(mac);
303 flush_workqueue(zd_workqueue); 334 flush_workqueue(zd_workqueue);
304 335
@@ -311,6 +342,68 @@ static void zd_op_stop(struct ieee80211_hw *hw)
311 dev_kfree_skb_any(skb); 342 dev_kfree_skb_any(skb);
312} 343}
313 344
345int zd_restore_settings(struct zd_mac *mac)
346{
347 struct sk_buff *beacon;
348 struct zd_mc_hash multicast_hash;
349 unsigned int short_preamble;
350 int r, beacon_interval, beacon_period;
351 u8 channel;
352
353 dev_dbg_f(zd_mac_dev(mac), "\n");
354
355 spin_lock_irq(&mac->lock);
356 multicast_hash = mac->multicast_hash;
357 short_preamble = mac->short_preamble;
358 beacon_interval = mac->beacon.interval;
359 beacon_period = mac->beacon.period;
360 channel = mac->channel;
361 spin_unlock_irq(&mac->lock);
362
363 r = set_mac_and_bssid(mac);
364 if (r < 0) {
365 dev_dbg_f(zd_mac_dev(mac), "set_mac_and_bssid failed, %d\n", r);
366 return r;
367 }
368
369 r = zd_chip_set_channel(&mac->chip, channel);
370 if (r < 0) {
371 dev_dbg_f(zd_mac_dev(mac), "zd_chip_set_channel failed, %d\n",
372 r);
373 return r;
374 }
375
376 set_rts_cts(mac, short_preamble);
377
378 r = zd_chip_set_multicast_hash(&mac->chip, &multicast_hash);
379 if (r < 0) {
380 dev_dbg_f(zd_mac_dev(mac),
381 "zd_chip_set_multicast_hash failed, %d\n", r);
382 return r;
383 }
384
385 if (mac->type == NL80211_IFTYPE_MESH_POINT ||
386 mac->type == NL80211_IFTYPE_ADHOC ||
387 mac->type == NL80211_IFTYPE_AP) {
388 if (mac->vif != NULL) {
389 beacon = ieee80211_beacon_get(mac->hw, mac->vif);
390 if (beacon) {
391 zd_mac_config_beacon(mac->hw, beacon);
392 kfree_skb(beacon);
393 }
394 }
395
396 zd_set_beacon_interval(&mac->chip, beacon_interval,
397 beacon_period, mac->type);
398
399 spin_lock_irq(&mac->lock);
400 mac->beacon.last_update = jiffies;
401 spin_unlock_irq(&mac->lock);
402 }
403
404 return 0;
405}
406
314/** 407/**
315 * zd_mac_tx_status - reports tx status of a packet if required 408 * zd_mac_tx_status - reports tx status of a packet if required
316 * @hw - a &struct ieee80211_hw pointer 409 * @hw - a &struct ieee80211_hw pointer
@@ -574,64 +667,120 @@ static void cs_set_control(struct zd_mac *mac, struct zd_ctrlset *cs,
574static int zd_mac_config_beacon(struct ieee80211_hw *hw, struct sk_buff *beacon) 667static int zd_mac_config_beacon(struct ieee80211_hw *hw, struct sk_buff *beacon)
575{ 668{
576 struct zd_mac *mac = zd_hw_mac(hw); 669 struct zd_mac *mac = zd_hw_mac(hw);
577 int r; 670 int r, ret, num_cmds, req_pos = 0;
578 u32 tmp, j = 0; 671 u32 tmp, j = 0;
579 /* 4 more bytes for tail CRC */ 672 /* 4 more bytes for tail CRC */
580 u32 full_len = beacon->len + 4; 673 u32 full_len = beacon->len + 4;
674 unsigned long end_jiffies, message_jiffies;
675 struct zd_ioreq32 *ioreqs;
581 676
582 r = zd_iowrite32(&mac->chip, CR_BCN_FIFO_SEMAPHORE, 0); 677 /* Alloc memory for full beacon write at once. */
678 num_cmds = 1 + zd_chip_is_zd1211b(&mac->chip) + full_len;
679 ioreqs = kmalloc(num_cmds * sizeof(struct zd_ioreq32), GFP_KERNEL);
680 if (!ioreqs)
681 return -ENOMEM;
682
683 mutex_lock(&mac->chip.mutex);
684
685 r = zd_iowrite32_locked(&mac->chip, 0, CR_BCN_FIFO_SEMAPHORE);
583 if (r < 0) 686 if (r < 0)
584 return r; 687 goto out;
585 r = zd_ioread32(&mac->chip, CR_BCN_FIFO_SEMAPHORE, &tmp); 688 r = zd_ioread32_locked(&mac->chip, &tmp, CR_BCN_FIFO_SEMAPHORE);
586 if (r < 0) 689 if (r < 0)
587 return r; 690 goto release_sema;
588 691
692 end_jiffies = jiffies + HZ / 2; /*~500ms*/
693 message_jiffies = jiffies + HZ / 10; /*~100ms*/
589 while (tmp & 0x2) { 694 while (tmp & 0x2) {
590 r = zd_ioread32(&mac->chip, CR_BCN_FIFO_SEMAPHORE, &tmp); 695 r = zd_ioread32_locked(&mac->chip, &tmp, CR_BCN_FIFO_SEMAPHORE);
591 if (r < 0) 696 if (r < 0)
592 return r; 697 goto release_sema;
593 if ((++j % 100) == 0) { 698 if (time_is_before_eq_jiffies(message_jiffies)) {
594 printk(KERN_ERR "CR_BCN_FIFO_SEMAPHORE not ready\n"); 699 message_jiffies = jiffies + HZ / 10;
595 if (j >= 500) { 700 dev_err(zd_mac_dev(mac),
596 printk(KERN_ERR "Giving up beacon config.\n"); 701 "CR_BCN_FIFO_SEMAPHORE not ready\n");
597 return -ETIMEDOUT; 702 if (time_is_before_eq_jiffies(end_jiffies)) {
703 dev_err(zd_mac_dev(mac),
704 "Giving up beacon config.\n");
705 r = -ETIMEDOUT;
706 goto reset_device;
598 } 707 }
599 } 708 }
600 msleep(1); 709 msleep(20);
601 } 710 }
602 711
603 r = zd_iowrite32(&mac->chip, CR_BCN_FIFO, full_len - 1); 712 ioreqs[req_pos].addr = CR_BCN_FIFO;
604 if (r < 0) 713 ioreqs[req_pos].value = full_len - 1;
605 return r; 714 req_pos++;
606 if (zd_chip_is_zd1211b(&mac->chip)) { 715 if (zd_chip_is_zd1211b(&mac->chip)) {
607 r = zd_iowrite32(&mac->chip, CR_BCN_LENGTH, full_len - 1); 716 ioreqs[req_pos].addr = CR_BCN_LENGTH;
608 if (r < 0) 717 ioreqs[req_pos].value = full_len - 1;
609 return r; 718 req_pos++;
610 } 719 }
611 720
612 for (j = 0 ; j < beacon->len; j++) { 721 for (j = 0 ; j < beacon->len; j++) {
613 r = zd_iowrite32(&mac->chip, CR_BCN_FIFO, 722 ioreqs[req_pos].addr = CR_BCN_FIFO;
614 *((u8 *)(beacon->data + j))); 723 ioreqs[req_pos].value = *((u8 *)(beacon->data + j));
615 if (r < 0) 724 req_pos++;
616 return r;
617 } 725 }
618 726
619 for (j = 0; j < 4; j++) { 727 for (j = 0; j < 4; j++) {
620 r = zd_iowrite32(&mac->chip, CR_BCN_FIFO, 0x0); 728 ioreqs[req_pos].addr = CR_BCN_FIFO;
621 if (r < 0) 729 ioreqs[req_pos].value = 0x0;
622 return r; 730 req_pos++;
623 } 731 }
624 732
625 r = zd_iowrite32(&mac->chip, CR_BCN_FIFO_SEMAPHORE, 1); 733 BUG_ON(req_pos != num_cmds);
626 if (r < 0) 734
627 return r; 735 r = zd_iowrite32a_locked(&mac->chip, ioreqs, num_cmds);
736
737release_sema:
738 /*
739 * Try very hard to release device beacon semaphore, as otherwise
740 * device/driver can be left in unusable state.
741 */
742 end_jiffies = jiffies + HZ / 2; /*~500ms*/
743 ret = zd_iowrite32_locked(&mac->chip, 1, CR_BCN_FIFO_SEMAPHORE);
744 while (ret < 0) {
745 if (time_is_before_eq_jiffies(end_jiffies)) {
746 ret = -ETIMEDOUT;
747 break;
748 }
749
750 msleep(20);
751 ret = zd_iowrite32_locked(&mac->chip, 1, CR_BCN_FIFO_SEMAPHORE);
752 }
753
754 if (ret < 0)
755 dev_err(zd_mac_dev(mac), "Could not release "
756 "CR_BCN_FIFO_SEMAPHORE!\n");
757 if (r < 0 || ret < 0) {
758 if (r >= 0)
759 r = ret;
760 goto out;
761 }
628 762
629 /* 802.11b/g 2.4G CCK 1Mb 763 /* 802.11b/g 2.4G CCK 1Mb
630 * 802.11a, not yet implemented, uses different values (see GPL vendor 764 * 802.11a, not yet implemented, uses different values (see GPL vendor
631 * driver) 765 * driver)
632 */ 766 */
633 return zd_iowrite32(&mac->chip, CR_BCN_PLCP_CFG, 0x00000400 | 767 r = zd_iowrite32_locked(&mac->chip, 0x00000400 | (full_len << 19),
634 (full_len << 19)); 768 CR_BCN_PLCP_CFG);
769out:
770 mutex_unlock(&mac->chip.mutex);
771 kfree(ioreqs);
772 return r;
773
774reset_device:
775 mutex_unlock(&mac->chip.mutex);
776 kfree(ioreqs);
777
778 /* semaphore stuck, reset device to avoid fw freeze later */
779 dev_warn(zd_mac_dev(mac), "CR_BCN_FIFO_SEMAPHORE stuck, "
780 "reseting device...");
781 usb_queue_reset_device(mac->chip.usb.intf);
782
783 return r;
635} 784}
636 785
637static int fill_ctrlset(struct zd_mac *mac, 786static int fill_ctrlset(struct zd_mac *mac,
@@ -701,7 +850,7 @@ static int fill_ctrlset(struct zd_mac *mac,
701 * control block of the skbuff will be initialized. If necessary the incoming 850 * control block of the skbuff will be initialized. If necessary the incoming
702 * mac80211 queues will be stopped. 851 * mac80211 queues will be stopped.
703 */ 852 */
704static int zd_op_tx(struct ieee80211_hw *hw, struct sk_buff *skb) 853static void zd_op_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
705{ 854{
706 struct zd_mac *mac = zd_hw_mac(hw); 855 struct zd_mac *mac = zd_hw_mac(hw);
707 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 856 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
@@ -716,11 +865,10 @@ static int zd_op_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
716 r = zd_usb_tx(&mac->chip.usb, skb); 865 r = zd_usb_tx(&mac->chip.usb, skb);
717 if (r) 866 if (r)
718 goto fail; 867 goto fail;
719 return 0; 868 return;
720 869
721fail: 870fail:
722 dev_kfree_skb(skb); 871 dev_kfree_skb(skb);
723 return 0;
724} 872}
725 873
726/** 874/**
@@ -779,6 +927,13 @@ static int filter_ack(struct ieee80211_hw *hw, struct ieee80211_hdr *rx_hdr,
779 927
780 mac->ack_pending = 1; 928 mac->ack_pending = 1;
781 mac->ack_signal = stats->signal; 929 mac->ack_signal = stats->signal;
930
931 /* Prevent pending tx-packet on AP-mode */
932 if (mac->type == NL80211_IFTYPE_AP) {
933 skb = __skb_dequeue(q);
934 zd_mac_tx_status(hw, skb, mac->ack_signal, NULL);
935 mac->ack_pending = 0;
936 }
782 } 937 }
783 938
784 spin_unlock_irqrestore(&q->lock, flags); 939 spin_unlock_irqrestore(&q->lock, flags);
@@ -882,13 +1037,16 @@ static int zd_op_add_interface(struct ieee80211_hw *hw,
882 case NL80211_IFTYPE_MESH_POINT: 1037 case NL80211_IFTYPE_MESH_POINT:
883 case NL80211_IFTYPE_STATION: 1038 case NL80211_IFTYPE_STATION:
884 case NL80211_IFTYPE_ADHOC: 1039 case NL80211_IFTYPE_ADHOC:
1040 case NL80211_IFTYPE_AP:
885 mac->type = vif->type; 1041 mac->type = vif->type;
886 break; 1042 break;
887 default: 1043 default:
888 return -EOPNOTSUPP; 1044 return -EOPNOTSUPP;
889 } 1045 }
890 1046
891 return zd_write_mac_addr(&mac->chip, vif->addr); 1047 mac->vif = vif;
1048
1049 return set_mac_and_bssid(mac);
892} 1050}
893 1051
894static void zd_op_remove_interface(struct ieee80211_hw *hw, 1052static void zd_op_remove_interface(struct ieee80211_hw *hw,
@@ -896,7 +1054,8 @@ static void zd_op_remove_interface(struct ieee80211_hw *hw,
896{ 1054{
897 struct zd_mac *mac = zd_hw_mac(hw); 1055 struct zd_mac *mac = zd_hw_mac(hw);
898 mac->type = NL80211_IFTYPE_UNSPECIFIED; 1056 mac->type = NL80211_IFTYPE_UNSPECIFIED;
899 zd_set_beacon_interval(&mac->chip, 0); 1057 mac->vif = NULL;
1058 zd_set_beacon_interval(&mac->chip, 0, 0, NL80211_IFTYPE_UNSPECIFIED);
900 zd_write_mac_addr(&mac->chip, NULL); 1059 zd_write_mac_addr(&mac->chip, NULL);
901} 1060}
902 1061
@@ -905,49 +1064,67 @@ static int zd_op_config(struct ieee80211_hw *hw, u32 changed)
905 struct zd_mac *mac = zd_hw_mac(hw); 1064 struct zd_mac *mac = zd_hw_mac(hw);
906 struct ieee80211_conf *conf = &hw->conf; 1065 struct ieee80211_conf *conf = &hw->conf;
907 1066
1067 spin_lock_irq(&mac->lock);
1068 mac->channel = conf->channel->hw_value;
1069 spin_unlock_irq(&mac->lock);
1070
908 return zd_chip_set_channel(&mac->chip, conf->channel->hw_value); 1071 return zd_chip_set_channel(&mac->chip, conf->channel->hw_value);
909} 1072}
910 1073
911static void zd_process_intr(struct work_struct *work) 1074static void zd_beacon_done(struct zd_mac *mac)
912{ 1075{
913 u16 int_status; 1076 struct sk_buff *skb, *beacon;
914 struct zd_mac *mac = container_of(work, struct zd_mac, process_intr);
915 1077
916 int_status = le16_to_cpu(*(__le16 *)(mac->intr_buffer+4)); 1078 if (!test_bit(ZD_DEVICE_RUNNING, &mac->flags))
917 if (int_status & INT_CFG_NEXT_BCN) 1079 return;
918 dev_dbg_f_limit(zd_mac_dev(mac), "INT_CFG_NEXT_BCN\n"); 1080 if (!mac->vif || mac->vif->type != NL80211_IFTYPE_AP)
919 else 1081 return;
920 dev_dbg_f(zd_mac_dev(mac), "Unsupported interrupt\n");
921
922 zd_chip_enable_hwint(&mac->chip);
923}
924 1082
1083 /*
1084 * Send out buffered broad- and multicast frames.
1085 */
1086 while (!ieee80211_queue_stopped(mac->hw, 0)) {
1087 skb = ieee80211_get_buffered_bc(mac->hw, mac->vif);
1088 if (!skb)
1089 break;
1090 zd_op_tx(mac->hw, skb);
1091 }
925 1092
926static void set_multicast_hash_handler(struct work_struct *work) 1093 /*
927{ 1094 * Fetch next beacon so that tim_count is updated.
928 struct zd_mac *mac = 1095 */
929 container_of(work, struct zd_mac, set_multicast_hash_work); 1096 beacon = ieee80211_beacon_get(mac->hw, mac->vif);
930 struct zd_mc_hash hash; 1097 if (beacon) {
1098 zd_mac_config_beacon(mac->hw, beacon);
1099 kfree_skb(beacon);
1100 }
931 1101
932 spin_lock_irq(&mac->lock); 1102 spin_lock_irq(&mac->lock);
933 hash = mac->multicast_hash; 1103 mac->beacon.last_update = jiffies;
934 spin_unlock_irq(&mac->lock); 1104 spin_unlock_irq(&mac->lock);
935
936 zd_chip_set_multicast_hash(&mac->chip, &hash);
937} 1105}
938 1106
939static void set_rx_filter_handler(struct work_struct *work) 1107static void zd_process_intr(struct work_struct *work)
940{ 1108{
941 struct zd_mac *mac = 1109 u16 int_status;
942 container_of(work, struct zd_mac, set_rx_filter_work); 1110 unsigned long flags;
943 int r; 1111 struct zd_mac *mac = container_of(work, struct zd_mac, process_intr);
944 1112
945 dev_dbg_f(zd_mac_dev(mac), "\n"); 1113 spin_lock_irqsave(&mac->lock, flags);
946 r = set_rx_filter(mac); 1114 int_status = le16_to_cpu(*(__le16 *)(mac->intr_buffer + 4));
947 if (r) 1115 spin_unlock_irqrestore(&mac->lock, flags);
948 dev_err(zd_mac_dev(mac), "set_rx_filter_handler error %d\n", r); 1116
1117 if (int_status & INT_CFG_NEXT_BCN) {
1118 /*dev_dbg_f_limit(zd_mac_dev(mac), "INT_CFG_NEXT_BCN\n");*/
1119 zd_beacon_done(mac);
1120 } else {
1121 dev_dbg_f(zd_mac_dev(mac), "Unsupported interrupt\n");
1122 }
1123
1124 zd_chip_enable_hwint(&mac->chip);
949} 1125}
950 1126
1127
951static u64 zd_op_prepare_multicast(struct ieee80211_hw *hw, 1128static u64 zd_op_prepare_multicast(struct ieee80211_hw *hw,
952 struct netdev_hw_addr_list *mc_list) 1129 struct netdev_hw_addr_list *mc_list)
953{ 1130{
@@ -979,6 +1156,7 @@ static void zd_op_configure_filter(struct ieee80211_hw *hw,
979 }; 1156 };
980 struct zd_mac *mac = zd_hw_mac(hw); 1157 struct zd_mac *mac = zd_hw_mac(hw);
981 unsigned long flags; 1158 unsigned long flags;
1159 int r;
982 1160
983 /* Only deal with supported flags */ 1161 /* Only deal with supported flags */
984 changed_flags &= SUPPORTED_FIF_FLAGS; 1162 changed_flags &= SUPPORTED_FIF_FLAGS;
@@ -1000,11 +1178,13 @@ static void zd_op_configure_filter(struct ieee80211_hw *hw,
1000 mac->multicast_hash = hash; 1178 mac->multicast_hash = hash;
1001 spin_unlock_irqrestore(&mac->lock, flags); 1179 spin_unlock_irqrestore(&mac->lock, flags);
1002 1180
1003 /* XXX: these can be called here now, can sleep now! */ 1181 zd_chip_set_multicast_hash(&mac->chip, &hash);
1004 queue_work(zd_workqueue, &mac->set_multicast_hash_work);
1005 1182
1006 if (changed_flags & FIF_CONTROL) 1183 if (changed_flags & FIF_CONTROL) {
1007 queue_work(zd_workqueue, &mac->set_rx_filter_work); 1184 r = set_rx_filter(mac);
1185 if (r)
1186 dev_err(zd_mac_dev(mac), "set_rx_filter error %d\n", r);
1187 }
1008 1188
1009 /* no handling required for FIF_OTHER_BSS as we don't currently 1189 /* no handling required for FIF_OTHER_BSS as we don't currently
1010 * do BSSID filtering */ 1190 * do BSSID filtering */
@@ -1016,20 +1196,9 @@ static void zd_op_configure_filter(struct ieee80211_hw *hw,
1016 * time. */ 1196 * time. */
1017} 1197}
1018 1198
1019static void set_rts_cts_work(struct work_struct *work) 1199static void set_rts_cts(struct zd_mac *mac, unsigned int short_preamble)
1020{ 1200{
1021 struct zd_mac *mac =
1022 container_of(work, struct zd_mac, set_rts_cts_work);
1023 unsigned long flags;
1024 unsigned int short_preamble;
1025
1026 mutex_lock(&mac->chip.mutex); 1201 mutex_lock(&mac->chip.mutex);
1027
1028 spin_lock_irqsave(&mac->lock, flags);
1029 mac->updating_rts_rate = 0;
1030 short_preamble = mac->short_preamble;
1031 spin_unlock_irqrestore(&mac->lock, flags);
1032
1033 zd_chip_set_rts_cts_rate_locked(&mac->chip, short_preamble); 1202 zd_chip_set_rts_cts_rate_locked(&mac->chip, short_preamble);
1034 mutex_unlock(&mac->chip.mutex); 1203 mutex_unlock(&mac->chip.mutex);
1035} 1204}
@@ -1040,33 +1209,42 @@ static void zd_op_bss_info_changed(struct ieee80211_hw *hw,
1040 u32 changes) 1209 u32 changes)
1041{ 1210{
1042 struct zd_mac *mac = zd_hw_mac(hw); 1211 struct zd_mac *mac = zd_hw_mac(hw);
1043 unsigned long flags;
1044 int associated; 1212 int associated;
1045 1213
1046 dev_dbg_f(zd_mac_dev(mac), "changes: %x\n", changes); 1214 dev_dbg_f(zd_mac_dev(mac), "changes: %x\n", changes);
1047 1215
1048 if (mac->type == NL80211_IFTYPE_MESH_POINT || 1216 if (mac->type == NL80211_IFTYPE_MESH_POINT ||
1049 mac->type == NL80211_IFTYPE_ADHOC) { 1217 mac->type == NL80211_IFTYPE_ADHOC ||
1218 mac->type == NL80211_IFTYPE_AP) {
1050 associated = true; 1219 associated = true;
1051 if (changes & BSS_CHANGED_BEACON) { 1220 if (changes & BSS_CHANGED_BEACON) {
1052 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif); 1221 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
1053 1222
1054 if (beacon) { 1223 if (beacon) {
1224 zd_chip_disable_hwint(&mac->chip);
1055 zd_mac_config_beacon(hw, beacon); 1225 zd_mac_config_beacon(hw, beacon);
1226 zd_chip_enable_hwint(&mac->chip);
1056 kfree_skb(beacon); 1227 kfree_skb(beacon);
1057 } 1228 }
1058 } 1229 }
1059 1230
1060 if (changes & BSS_CHANGED_BEACON_ENABLED) { 1231 if (changes & BSS_CHANGED_BEACON_ENABLED) {
1061 u32 interval; 1232 u16 interval = 0;
1233 u8 period = 0;
1062 1234
1063 if (bss_conf->enable_beacon) 1235 if (bss_conf->enable_beacon) {
1064 interval = BCN_MODE_IBSS | 1236 period = bss_conf->dtim_period;
1065 bss_conf->beacon_int; 1237 interval = bss_conf->beacon_int;
1066 else 1238 }
1067 interval = 0;
1068 1239
1069 zd_set_beacon_interval(&mac->chip, interval); 1240 spin_lock_irq(&mac->lock);
1241 mac->beacon.period = period;
1242 mac->beacon.interval = interval;
1243 mac->beacon.last_update = jiffies;
1244 spin_unlock_irq(&mac->lock);
1245
1246 zd_set_beacon_interval(&mac->chip, interval, period,
1247 mac->type);
1070 } 1248 }
1071 } else 1249 } else
1072 associated = is_valid_ether_addr(bss_conf->bssid); 1250 associated = is_valid_ether_addr(bss_conf->bssid);
@@ -1078,15 +1256,11 @@ static void zd_op_bss_info_changed(struct ieee80211_hw *hw,
1078 /* TODO: do hardware bssid filtering */ 1256 /* TODO: do hardware bssid filtering */
1079 1257
1080 if (changes & BSS_CHANGED_ERP_PREAMBLE) { 1258 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
1081 spin_lock_irqsave(&mac->lock, flags); 1259 spin_lock_irq(&mac->lock);
1082 mac->short_preamble = bss_conf->use_short_preamble; 1260 mac->short_preamble = bss_conf->use_short_preamble;
1083 if (!mac->updating_rts_rate) { 1261 spin_unlock_irq(&mac->lock);
1084 mac->updating_rts_rate = 1; 1262
1085 /* FIXME: should disable TX here, until work has 1263 set_rts_cts(mac, bss_conf->use_short_preamble);
1086 * completed and RTS_CTS reg is updated */
1087 queue_work(zd_workqueue, &mac->set_rts_cts_work);
1088 }
1089 spin_unlock_irqrestore(&mac->lock, flags);
1090 } 1264 }
1091} 1265}
1092 1266
@@ -1138,12 +1312,14 @@ struct ieee80211_hw *zd_mac_alloc_hw(struct usb_interface *intf)
1138 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &mac->band; 1312 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &mac->band;
1139 1313
1140 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS | 1314 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
1141 IEEE80211_HW_SIGNAL_UNSPEC; 1315 IEEE80211_HW_SIGNAL_UNSPEC |
1316 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING;
1142 1317
1143 hw->wiphy->interface_modes = 1318 hw->wiphy->interface_modes =
1144 BIT(NL80211_IFTYPE_MESH_POINT) | 1319 BIT(NL80211_IFTYPE_MESH_POINT) |
1145 BIT(NL80211_IFTYPE_STATION) | 1320 BIT(NL80211_IFTYPE_STATION) |
1146 BIT(NL80211_IFTYPE_ADHOC); 1321 BIT(NL80211_IFTYPE_ADHOC) |
1322 BIT(NL80211_IFTYPE_AP);
1147 1323
1148 hw->max_signal = 100; 1324 hw->max_signal = 100;
1149 hw->queues = 1; 1325 hw->queues = 1;
@@ -1160,15 +1336,82 @@ struct ieee80211_hw *zd_mac_alloc_hw(struct usb_interface *intf)
1160 1336
1161 zd_chip_init(&mac->chip, hw, intf); 1337 zd_chip_init(&mac->chip, hw, intf);
1162 housekeeping_init(mac); 1338 housekeeping_init(mac);
1163 INIT_WORK(&mac->set_multicast_hash_work, set_multicast_hash_handler); 1339 beacon_init(mac);
1164 INIT_WORK(&mac->set_rts_cts_work, set_rts_cts_work);
1165 INIT_WORK(&mac->set_rx_filter_work, set_rx_filter_handler);
1166 INIT_WORK(&mac->process_intr, zd_process_intr); 1340 INIT_WORK(&mac->process_intr, zd_process_intr);
1167 1341
1168 SET_IEEE80211_DEV(hw, &intf->dev); 1342 SET_IEEE80211_DEV(hw, &intf->dev);
1169 return hw; 1343 return hw;
1170} 1344}
1171 1345
1346#define BEACON_WATCHDOG_DELAY round_jiffies_relative(HZ)
1347
1348static void beacon_watchdog_handler(struct work_struct *work)
1349{
1350 struct zd_mac *mac =
1351 container_of(work, struct zd_mac, beacon.watchdog_work.work);
1352 struct sk_buff *beacon;
1353 unsigned long timeout;
1354 int interval, period;
1355
1356 if (!test_bit(ZD_DEVICE_RUNNING, &mac->flags))
1357 goto rearm;
1358 if (mac->type != NL80211_IFTYPE_AP || !mac->vif)
1359 goto rearm;
1360
1361 spin_lock_irq(&mac->lock);
1362 interval = mac->beacon.interval;
1363 period = mac->beacon.period;
1364 timeout = mac->beacon.last_update + msecs_to_jiffies(interval) + HZ;
1365 spin_unlock_irq(&mac->lock);
1366
1367 if (interval > 0 && time_is_before_jiffies(timeout)) {
1368 dev_dbg_f(zd_mac_dev(mac), "beacon interrupt stalled, "
1369 "restarting. "
1370 "(interval: %d, dtim: %d)\n",
1371 interval, period);
1372
1373 zd_chip_disable_hwint(&mac->chip);
1374
1375 beacon = ieee80211_beacon_get(mac->hw, mac->vif);
1376 if (beacon) {
1377 zd_mac_config_beacon(mac->hw, beacon);
1378 kfree_skb(beacon);
1379 }
1380
1381 zd_set_beacon_interval(&mac->chip, interval, period, mac->type);
1382
1383 zd_chip_enable_hwint(&mac->chip);
1384
1385 spin_lock_irq(&mac->lock);
1386 mac->beacon.last_update = jiffies;
1387 spin_unlock_irq(&mac->lock);
1388 }
1389
1390rearm:
1391 queue_delayed_work(zd_workqueue, &mac->beacon.watchdog_work,
1392 BEACON_WATCHDOG_DELAY);
1393}
1394
1395static void beacon_init(struct zd_mac *mac)
1396{
1397 INIT_DELAYED_WORK(&mac->beacon.watchdog_work, beacon_watchdog_handler);
1398}
1399
1400static void beacon_enable(struct zd_mac *mac)
1401{
1402 dev_dbg_f(zd_mac_dev(mac), "\n");
1403
1404 mac->beacon.last_update = jiffies;
1405 queue_delayed_work(zd_workqueue, &mac->beacon.watchdog_work,
1406 BEACON_WATCHDOG_DELAY);
1407}
1408
1409static void beacon_disable(struct zd_mac *mac)
1410{
1411 dev_dbg_f(zd_mac_dev(mac), "\n");
1412 cancel_delayed_work_sync(&mac->beacon.watchdog_work);
1413}
1414
1172#define LINK_LED_WORK_DELAY HZ 1415#define LINK_LED_WORK_DELAY HZ
1173 1416
1174static void link_led_handler(struct work_struct *work) 1417static void link_led_handler(struct work_struct *work)
@@ -1179,6 +1422,9 @@ static void link_led_handler(struct work_struct *work)
1179 int is_associated; 1422 int is_associated;
1180 int r; 1423 int r;
1181 1424
1425 if (!test_bit(ZD_DEVICE_RUNNING, &mac->flags))
1426 goto requeue;
1427
1182 spin_lock_irq(&mac->lock); 1428 spin_lock_irq(&mac->lock);
1183 is_associated = mac->associated; 1429 is_associated = mac->associated;
1184 spin_unlock_irq(&mac->lock); 1430 spin_unlock_irq(&mac->lock);
@@ -1188,6 +1434,7 @@ static void link_led_handler(struct work_struct *work)
1188 if (r) 1434 if (r)
1189 dev_dbg_f(zd_mac_dev(mac), "zd_chip_control_leds error %d\n", r); 1435 dev_dbg_f(zd_mac_dev(mac), "zd_chip_control_leds error %d\n", r);
1190 1436
1437requeue:
1191 queue_delayed_work(zd_workqueue, &mac->housekeeping.link_led_work, 1438 queue_delayed_work(zd_workqueue, &mac->housekeeping.link_led_work,
1192 LINK_LED_WORK_DELAY); 1439 LINK_LED_WORK_DELAY);
1193} 1440}
@@ -1207,7 +1454,6 @@ static void housekeeping_enable(struct zd_mac *mac)
1207static void housekeeping_disable(struct zd_mac *mac) 1454static void housekeeping_disable(struct zd_mac *mac)
1208{ 1455{
1209 dev_dbg_f(zd_mac_dev(mac), "\n"); 1456 dev_dbg_f(zd_mac_dev(mac), "\n");
1210 cancel_rearming_delayed_workqueue(zd_workqueue, 1457 cancel_delayed_work_sync(&mac->housekeeping.link_led_work);
1211 &mac->housekeeping.link_led_work);
1212 zd_chip_control_leds(&mac->chip, ZD_LED_OFF); 1458 zd_chip_control_leds(&mac->chip, ZD_LED_OFF);
1213} 1459}
diff --git a/drivers/net/wireless/zd1211rw/zd_mac.h b/drivers/net/wireless/zd1211rw/zd_mac.h
index a6d86b996c79..f8c93c3fe755 100644
--- a/drivers/net/wireless/zd1211rw/zd_mac.h
+++ b/drivers/net/wireless/zd1211rw/zd_mac.h
@@ -163,6 +163,17 @@ struct housekeeping {
163 struct delayed_work link_led_work; 163 struct delayed_work link_led_work;
164}; 164};
165 165
166struct beacon {
167 struct delayed_work watchdog_work;
168 unsigned long last_update;
169 u16 interval;
170 u8 period;
171};
172
173enum zd_device_flags {
174 ZD_DEVICE_RUNNING,
175};
176
166#define ZD_MAC_STATS_BUFFER_SIZE 16 177#define ZD_MAC_STATS_BUFFER_SIZE 16
167 178
168#define ZD_MAC_MAX_ACK_WAITERS 50 179#define ZD_MAC_MAX_ACK_WAITERS 50
@@ -172,17 +183,19 @@ struct zd_mac {
172 spinlock_t lock; 183 spinlock_t lock;
173 spinlock_t intr_lock; 184 spinlock_t intr_lock;
174 struct ieee80211_hw *hw; 185 struct ieee80211_hw *hw;
186 struct ieee80211_vif *vif;
175 struct housekeeping housekeeping; 187 struct housekeeping housekeeping;
176 struct work_struct set_multicast_hash_work; 188 struct beacon beacon;
177 struct work_struct set_rts_cts_work; 189 struct work_struct set_rts_cts_work;
178 struct work_struct set_rx_filter_work;
179 struct work_struct process_intr; 190 struct work_struct process_intr;
180 struct zd_mc_hash multicast_hash; 191 struct zd_mc_hash multicast_hash;
181 u8 intr_buffer[USB_MAX_EP_INT_BUFFER]; 192 u8 intr_buffer[USB_MAX_EP_INT_BUFFER];
182 u8 regdomain; 193 u8 regdomain;
183 u8 default_regdomain; 194 u8 default_regdomain;
195 u8 channel;
184 int type; 196 int type;
185 int associated; 197 int associated;
198 unsigned long flags;
186 struct sk_buff_head ack_wait_queue; 199 struct sk_buff_head ack_wait_queue;
187 struct ieee80211_channel channels[14]; 200 struct ieee80211_channel channels[14];
188 struct ieee80211_rate rates[12]; 201 struct ieee80211_rate rates[12];
@@ -191,9 +204,6 @@ struct zd_mac {
191 /* Short preamble (used for RTS/CTS) */ 204 /* Short preamble (used for RTS/CTS) */
192 unsigned int short_preamble:1; 205 unsigned int short_preamble:1;
193 206
194 /* flags to indicate update in progress */
195 unsigned int updating_rts_rate:1;
196
197 /* whether to pass frames with CRC errors to stack */ 207 /* whether to pass frames with CRC errors to stack */
198 unsigned int pass_failed_fcs:1; 208 unsigned int pass_failed_fcs:1;
199 209
@@ -304,6 +314,10 @@ int zd_mac_rx(struct ieee80211_hw *hw, const u8 *buffer, unsigned int length);
304void zd_mac_tx_failed(struct urb *urb); 314void zd_mac_tx_failed(struct urb *urb);
305void zd_mac_tx_to_dev(struct sk_buff *skb, int error); 315void zd_mac_tx_to_dev(struct sk_buff *skb, int error);
306 316
317int zd_op_start(struct ieee80211_hw *hw);
318void zd_op_stop(struct ieee80211_hw *hw);
319int zd_restore_settings(struct zd_mac *mac);
320
307#ifdef DEBUG 321#ifdef DEBUG
308void zd_dump_rx_status(const struct rx_status *status); 322void zd_dump_rx_status(const struct rx_status *status);
309#else 323#else
diff --git a/drivers/net/wireless/zd1211rw/zd_rf.h b/drivers/net/wireless/zd1211rw/zd_rf.h
index 79dc1035592d..725b7c99b23d 100644
--- a/drivers/net/wireless/zd1211rw/zd_rf.h
+++ b/drivers/net/wireless/zd1211rw/zd_rf.h
@@ -55,7 +55,7 @@ struct zd_rf {
55 * defaults to 1 (yes) */ 55 * defaults to 1 (yes) */
56 u8 update_channel_int:1; 56 u8 update_channel_int:1;
57 57
58 /* whether CR47 should be patched from the EEPROM, if the appropriate 58 /* whether ZD_CR47 should be patched from the EEPROM, if the appropriate
59 * flag is set in the POD. The vendor driver suggests that this should 59 * flag is set in the POD. The vendor driver suggests that this should
60 * be done for all RF's, but a bug in their code prevents but their 60 * be done for all RF's, but a bug in their code prevents but their
61 * HW_OverWritePhyRegFromE2P() routine from ever taking effect. */ 61 * HW_OverWritePhyRegFromE2P() routine from ever taking effect. */
diff --git a/drivers/net/wireless/zd1211rw/zd_rf_al2230.c b/drivers/net/wireless/zd1211rw/zd_rf_al2230.c
index 74a8f7a55591..12babcb633c3 100644
--- a/drivers/net/wireless/zd1211rw/zd_rf_al2230.c
+++ b/drivers/net/wireless/zd1211rw/zd_rf_al2230.c
@@ -61,31 +61,31 @@ static const u32 zd1211b_al2230_table[][3] = {
61}; 61};
62 62
63static const struct zd_ioreq16 zd1211b_ioreqs_shared_1[] = { 63static const struct zd_ioreq16 zd1211b_ioreqs_shared_1[] = {
64 { CR240, 0x57 }, { CR9, 0xe0 }, 64 { ZD_CR240, 0x57 }, { ZD_CR9, 0xe0 },
65}; 65};
66 66
67static const struct zd_ioreq16 ioreqs_init_al2230s[] = { 67static const struct zd_ioreq16 ioreqs_init_al2230s[] = {
68 { CR47, 0x1e }, /* MARK_002 */ 68 { ZD_CR47, 0x1e }, /* MARK_002 */
69 { CR106, 0x22 }, 69 { ZD_CR106, 0x22 },
70 { CR107, 0x2a }, /* MARK_002 */ 70 { ZD_CR107, 0x2a }, /* MARK_002 */
71 { CR109, 0x13 }, /* MARK_002 */ 71 { ZD_CR109, 0x13 }, /* MARK_002 */
72 { CR118, 0xf8 }, /* MARK_002 */ 72 { ZD_CR118, 0xf8 }, /* MARK_002 */
73 { CR119, 0x12 }, { CR122, 0xe0 }, 73 { ZD_CR119, 0x12 }, { ZD_CR122, 0xe0 },
74 { CR128, 0x10 }, /* MARK_001 from 0xe->0x10 */ 74 { ZD_CR128, 0x10 }, /* MARK_001 from 0xe->0x10 */
75 { CR129, 0x0e }, /* MARK_001 from 0xd->0x0e */ 75 { ZD_CR129, 0x0e }, /* MARK_001 from 0xd->0x0e */
76 { CR130, 0x10 }, /* MARK_001 from 0xb->0x0d */ 76 { ZD_CR130, 0x10 }, /* MARK_001 from 0xb->0x0d */
77}; 77};
78 78
79static int zd1211b_al2230_finalize_rf(struct zd_chip *chip) 79static int zd1211b_al2230_finalize_rf(struct zd_chip *chip)
80{ 80{
81 int r; 81 int r;
82 static const struct zd_ioreq16 ioreqs[] = { 82 static const struct zd_ioreq16 ioreqs[] = {
83 { CR80, 0x30 }, { CR81, 0x30 }, { CR79, 0x58 }, 83 { ZD_CR80, 0x30 }, { ZD_CR81, 0x30 }, { ZD_CR79, 0x58 },
84 { CR12, 0xf0 }, { CR77, 0x1b }, { CR78, 0x58 }, 84 { ZD_CR12, 0xf0 }, { ZD_CR77, 0x1b }, { ZD_CR78, 0x58 },
85 { CR203, 0x06 }, 85 { ZD_CR203, 0x06 },
86 { }, 86 { },
87 87
88 { CR240, 0x80 }, 88 { ZD_CR240, 0x80 },
89 }; 89 };
90 90
91 r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); 91 r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
@@ -94,12 +94,12 @@ static int zd1211b_al2230_finalize_rf(struct zd_chip *chip)
94 94
95 /* related to antenna selection? */ 95 /* related to antenna selection? */
96 if (chip->new_phy_layout) { 96 if (chip->new_phy_layout) {
97 r = zd_iowrite16_locked(chip, 0xe1, CR9); 97 r = zd_iowrite16_locked(chip, 0xe1, ZD_CR9);
98 if (r) 98 if (r)
99 return r; 99 return r;
100 } 100 }
101 101
102 return zd_iowrite16_locked(chip, 0x06, CR203); 102 return zd_iowrite16_locked(chip, 0x06, ZD_CR203);
103} 103}
104 104
105static int zd1211_al2230_init_hw(struct zd_rf *rf) 105static int zd1211_al2230_init_hw(struct zd_rf *rf)
@@ -108,40 +108,40 @@ static int zd1211_al2230_init_hw(struct zd_rf *rf)
108 struct zd_chip *chip = zd_rf_to_chip(rf); 108 struct zd_chip *chip = zd_rf_to_chip(rf);
109 109
110 static const struct zd_ioreq16 ioreqs_init[] = { 110 static const struct zd_ioreq16 ioreqs_init[] = {
111 { CR15, 0x20 }, { CR23, 0x40 }, { CR24, 0x20 }, 111 { ZD_CR15, 0x20 }, { ZD_CR23, 0x40 }, { ZD_CR24, 0x20 },
112 { CR26, 0x11 }, { CR28, 0x3e }, { CR29, 0x00 }, 112 { ZD_CR26, 0x11 }, { ZD_CR28, 0x3e }, { ZD_CR29, 0x00 },
113 { CR44, 0x33 }, { CR106, 0x2a }, { CR107, 0x1a }, 113 { ZD_CR44, 0x33 }, { ZD_CR106, 0x2a }, { ZD_CR107, 0x1a },
114 { CR109, 0x09 }, { CR110, 0x27 }, { CR111, 0x2b }, 114 { ZD_CR109, 0x09 }, { ZD_CR110, 0x27 }, { ZD_CR111, 0x2b },
115 { CR112, 0x2b }, { CR119, 0x0a }, { CR10, 0x89 }, 115 { ZD_CR112, 0x2b }, { ZD_CR119, 0x0a }, { ZD_CR10, 0x89 },
116 /* for newest (3rd cut) AL2300 */ 116 /* for newest (3rd cut) AL2300 */
117 { CR17, 0x28 }, 117 { ZD_CR17, 0x28 },
118 { CR26, 0x93 }, { CR34, 0x30 }, 118 { ZD_CR26, 0x93 }, { ZD_CR34, 0x30 },
119 /* for newest (3rd cut) AL2300 */ 119 /* for newest (3rd cut) AL2300 */
120 { CR35, 0x3e }, 120 { ZD_CR35, 0x3e },
121 { CR41, 0x24 }, { CR44, 0x32 }, 121 { ZD_CR41, 0x24 }, { ZD_CR44, 0x32 },
122 /* for newest (3rd cut) AL2300 */ 122 /* for newest (3rd cut) AL2300 */
123 { CR46, 0x96 }, 123 { ZD_CR46, 0x96 },
124 { CR47, 0x1e }, { CR79, 0x58 }, { CR80, 0x30 }, 124 { ZD_CR47, 0x1e }, { ZD_CR79, 0x58 }, { ZD_CR80, 0x30 },
125 { CR81, 0x30 }, { CR87, 0x0a }, { CR89, 0x04 }, 125 { ZD_CR81, 0x30 }, { ZD_CR87, 0x0a }, { ZD_CR89, 0x04 },
126 { CR92, 0x0a }, { CR99, 0x28 }, { CR100, 0x00 }, 126 { ZD_CR92, 0x0a }, { ZD_CR99, 0x28 }, { ZD_CR100, 0x00 },
127 { CR101, 0x13 }, { CR102, 0x27 }, { CR106, 0x24 }, 127 { ZD_CR101, 0x13 }, { ZD_CR102, 0x27 }, { ZD_CR106, 0x24 },
128 { CR107, 0x2a }, { CR109, 0x09 }, { CR110, 0x13 }, 128 { ZD_CR107, 0x2a }, { ZD_CR109, 0x09 }, { ZD_CR110, 0x13 },
129 { CR111, 0x1f }, { CR112, 0x1f }, { CR113, 0x27 }, 129 { ZD_CR111, 0x1f }, { ZD_CR112, 0x1f }, { ZD_CR113, 0x27 },
130 { CR114, 0x27 }, 130 { ZD_CR114, 0x27 },
131 /* for newest (3rd cut) AL2300 */ 131 /* for newest (3rd cut) AL2300 */
132 { CR115, 0x24 }, 132 { ZD_CR115, 0x24 },
133 { CR116, 0x24 }, { CR117, 0xf4 }, { CR118, 0xfc }, 133 { ZD_CR116, 0x24 }, { ZD_CR117, 0xf4 }, { ZD_CR118, 0xfc },
134 { CR119, 0x10 }, { CR120, 0x4f }, { CR121, 0x77 }, 134 { ZD_CR119, 0x10 }, { ZD_CR120, 0x4f }, { ZD_CR121, 0x77 },
135 { CR122, 0xe0 }, { CR137, 0x88 }, { CR252, 0xff }, 135 { ZD_CR122, 0xe0 }, { ZD_CR137, 0x88 }, { ZD_CR252, 0xff },
136 { CR253, 0xff }, 136 { ZD_CR253, 0xff },
137 }; 137 };
138 138
139 static const struct zd_ioreq16 ioreqs_pll[] = { 139 static const struct zd_ioreq16 ioreqs_pll[] = {
140 /* shdnb(PLL_ON)=0 */ 140 /* shdnb(PLL_ON)=0 */
141 { CR251, 0x2f }, 141 { ZD_CR251, 0x2f },
142 /* shdnb(PLL_ON)=1 */ 142 /* shdnb(PLL_ON)=1 */
143 { CR251, 0x3f }, 143 { ZD_CR251, 0x3f },
144 { CR138, 0x28 }, { CR203, 0x06 }, 144 { ZD_CR138, 0x28 }, { ZD_CR203, 0x06 },
145 }; 145 };
146 146
147 static const u32 rv1[] = { 147 static const u32 rv1[] = {
@@ -161,7 +161,7 @@ static int zd1211_al2230_init_hw(struct zd_rf *rf)
161 0x0805b6, 161 0x0805b6,
162 0x011687, 162 0x011687,
163 0x000688, 163 0x000688,
164 0x0403b9, /* external control TX power (CR31) */ 164 0x0403b9, /* external control TX power (ZD_CR31) */
165 0x00dbba, 165 0x00dbba,
166 0x00099b, 166 0x00099b,
167 0x0bdffc, 167 0x0bdffc,
@@ -221,52 +221,54 @@ static int zd1211b_al2230_init_hw(struct zd_rf *rf)
221 struct zd_chip *chip = zd_rf_to_chip(rf); 221 struct zd_chip *chip = zd_rf_to_chip(rf);
222 222
223 static const struct zd_ioreq16 ioreqs1[] = { 223 static const struct zd_ioreq16 ioreqs1[] = {
224 { CR10, 0x89 }, { CR15, 0x20 }, 224 { ZD_CR10, 0x89 }, { ZD_CR15, 0x20 },
225 { CR17, 0x2B }, /* for newest(3rd cut) AL2230 */ 225 { ZD_CR17, 0x2B }, /* for newest(3rd cut) AL2230 */
226 { CR23, 0x40 }, { CR24, 0x20 }, { CR26, 0x93 }, 226 { ZD_CR23, 0x40 }, { ZD_CR24, 0x20 }, { ZD_CR26, 0x93 },
227 { CR28, 0x3e }, { CR29, 0x00 }, 227 { ZD_CR28, 0x3e }, { ZD_CR29, 0x00 },
228 { CR33, 0x28 }, /* 5621 */ 228 { ZD_CR33, 0x28 }, /* 5621 */
229 { CR34, 0x30 }, 229 { ZD_CR34, 0x30 },
230 { CR35, 0x3e }, /* for newest(3rd cut) AL2230 */ 230 { ZD_CR35, 0x3e }, /* for newest(3rd cut) AL2230 */
231 { CR41, 0x24 }, { CR44, 0x32 }, 231 { ZD_CR41, 0x24 }, { ZD_CR44, 0x32 },
232 { CR46, 0x99 }, /* for newest(3rd cut) AL2230 */ 232 { ZD_CR46, 0x99 }, /* for newest(3rd cut) AL2230 */
233 { CR47, 0x1e }, 233 { ZD_CR47, 0x1e },
234 234
235 /* ZD1211B 05.06.10 */ 235 /* ZD1211B 05.06.10 */
236 { CR48, 0x06 }, { CR49, 0xf9 }, { CR51, 0x01 }, 236 { ZD_CR48, 0x06 }, { ZD_CR49, 0xf9 }, { ZD_CR51, 0x01 },
237 { CR52, 0x80 }, { CR53, 0x7e }, { CR65, 0x00 }, 237 { ZD_CR52, 0x80 }, { ZD_CR53, 0x7e }, { ZD_CR65, 0x00 },
238 { CR66, 0x00 }, { CR67, 0x00 }, { CR68, 0x00 }, 238 { ZD_CR66, 0x00 }, { ZD_CR67, 0x00 }, { ZD_CR68, 0x00 },
239 { CR69, 0x28 }, 239 { ZD_CR69, 0x28 },
240 240
241 { CR79, 0x58 }, { CR80, 0x30 }, { CR81, 0x30 }, 241 { ZD_CR79, 0x58 }, { ZD_CR80, 0x30 }, { ZD_CR81, 0x30 },
242 { CR87, 0x0a }, { CR89, 0x04 }, 242 { ZD_CR87, 0x0a }, { ZD_CR89, 0x04 },
243 { CR91, 0x00 }, /* 5621 */ 243 { ZD_CR91, 0x00 }, /* 5621 */
244 { CR92, 0x0a }, 244 { ZD_CR92, 0x0a },
245 { CR98, 0x8d }, /* 4804, for 1212 new algorithm */ 245 { ZD_CR98, 0x8d }, /* 4804, for 1212 new algorithm */
246 { CR99, 0x00 }, /* 5621 */ 246 { ZD_CR99, 0x00 }, /* 5621 */
247 { CR101, 0x13 }, { CR102, 0x27 }, 247 { ZD_CR101, 0x13 }, { ZD_CR102, 0x27 },
248 { CR106, 0x24 }, /* for newest(3rd cut) AL2230 */ 248 { ZD_CR106, 0x24 }, /* for newest(3rd cut) AL2230 */
249 { CR107, 0x2a }, 249 { ZD_CR107, 0x2a },
250 { CR109, 0x13 }, /* 4804, for 1212 new algorithm */ 250 { ZD_CR109, 0x13 }, /* 4804, for 1212 new algorithm */
251 { CR110, 0x1f }, /* 4804, for 1212 new algorithm */ 251 { ZD_CR110, 0x1f }, /* 4804, for 1212 new algorithm */
252 { CR111, 0x1f }, { CR112, 0x1f }, { CR113, 0x27 }, 252 { ZD_CR111, 0x1f }, { ZD_CR112, 0x1f }, { ZD_CR113, 0x27 },
253 { CR114, 0x27 }, 253 { ZD_CR114, 0x27 },
254 { CR115, 0x26 }, /* 24->26 at 4902 for newest(3rd cut) AL2230 */ 254 { ZD_CR115, 0x26 }, /* 24->26 at 4902 for newest(3rd cut)
255 { CR116, 0x24 }, 255 * AL2230
256 { CR117, 0xfa }, /* for 1211b */ 256 */
257 { CR118, 0xfa }, /* for 1211b */ 257 { ZD_CR116, 0x24 },
258 { CR119, 0x10 }, 258 { ZD_CR117, 0xfa }, /* for 1211b */
259 { CR120, 0x4f }, 259 { ZD_CR118, 0xfa }, /* for 1211b */
260 { CR121, 0x6c }, /* for 1211b */ 260 { ZD_CR119, 0x10 },
261 { CR122, 0xfc }, /* E0->FC at 4902 */ 261 { ZD_CR120, 0x4f },
262 { CR123, 0x57 }, /* 5623 */ 262 { ZD_CR121, 0x6c }, /* for 1211b */
263 { CR125, 0xad }, /* 4804, for 1212 new algorithm */ 263 { ZD_CR122, 0xfc }, /* E0->FC at 4902 */
264 { CR126, 0x6c }, /* 5614 */ 264 { ZD_CR123, 0x57 }, /* 5623 */
265 { CR127, 0x03 }, /* 4804, for 1212 new algorithm */ 265 { ZD_CR125, 0xad }, /* 4804, for 1212 new algorithm */
266 { CR137, 0x50 }, /* 5614 */ 266 { ZD_CR126, 0x6c }, /* 5614 */
267 { CR138, 0xa8 }, 267 { ZD_CR127, 0x03 }, /* 4804, for 1212 new algorithm */
268 { CR144, 0xac }, /* 5621 */ 268 { ZD_CR137, 0x50 }, /* 5614 */
269 { CR150, 0x0d }, { CR252, 0x34 }, { CR253, 0x34 }, 269 { ZD_CR138, 0xa8 },
270 { ZD_CR144, 0xac }, /* 5621 */
271 { ZD_CR150, 0x0d }, { ZD_CR252, 0x34 }, { ZD_CR253, 0x34 },
270 }; 272 };
271 273
272 static const u32 rv1[] = { 274 static const u32 rv1[] = {
@@ -284,7 +286,7 @@ static int zd1211b_al2230_init_hw(struct zd_rf *rf)
284 0x6da010, /* Reg6 update for MP versio */ 286 0x6da010, /* Reg6 update for MP versio */
285 0xe36280, /* Modified by jxiao for Bor-Chin on 2004/08/02 */ 287 0xe36280, /* Modified by jxiao for Bor-Chin on 2004/08/02 */
286 0x116000, 288 0x116000,
287 0x9dc020, /* External control TX power (CR31) */ 289 0x9dc020, /* External control TX power (ZD_CR31) */
288 0x5ddb00, /* RegA update for MP version */ 290 0x5ddb00, /* RegA update for MP version */
289 0xd99000, /* RegB update for MP version */ 291 0xd99000, /* RegB update for MP version */
290 0x3ffbd0, /* RegC update for MP version */ 292 0x3ffbd0, /* RegC update for MP version */
@@ -295,8 +297,8 @@ static int zd1211b_al2230_init_hw(struct zd_rf *rf)
295 }; 297 };
296 298
297 static const struct zd_ioreq16 ioreqs2[] = { 299 static const struct zd_ioreq16 ioreqs2[] = {
298 { CR251, 0x2f }, /* shdnb(PLL_ON)=0 */ 300 { ZD_CR251, 0x2f }, /* shdnb(PLL_ON)=0 */
299 { CR251, 0x7f }, /* shdnb(PLL_ON)=1 */ 301 { ZD_CR251, 0x7f }, /* shdnb(PLL_ON)=1 */
300 }; 302 };
301 303
302 static const u32 rv3[] = { 304 static const u32 rv3[] = {
@@ -308,7 +310,7 @@ static int zd1211b_al2230_init_hw(struct zd_rf *rf)
308 310
309 static const struct zd_ioreq16 ioreqs3[] = { 311 static const struct zd_ioreq16 ioreqs3[] = {
310 /* related to 6M band edge patching, happens unconditionally */ 312 /* related to 6M band edge patching, happens unconditionally */
311 { CR128, 0x14 }, { CR129, 0x12 }, { CR130, 0x10 }, 313 { ZD_CR128, 0x14 }, { ZD_CR129, 0x12 }, { ZD_CR130, 0x10 },
312 }; 314 };
313 315
314 r = zd_iowrite16a_locked(chip, zd1211b_ioreqs_shared_1, 316 r = zd_iowrite16a_locked(chip, zd1211b_ioreqs_shared_1,
@@ -361,8 +363,8 @@ static int zd1211_al2230_set_channel(struct zd_rf *rf, u8 channel)
361 const u32 *rv = zd1211_al2230_table[channel-1]; 363 const u32 *rv = zd1211_al2230_table[channel-1];
362 struct zd_chip *chip = zd_rf_to_chip(rf); 364 struct zd_chip *chip = zd_rf_to_chip(rf);
363 static const struct zd_ioreq16 ioreqs[] = { 365 static const struct zd_ioreq16 ioreqs[] = {
364 { CR138, 0x28 }, 366 { ZD_CR138, 0x28 },
365 { CR203, 0x06 }, 367 { ZD_CR203, 0x06 },
366 }; 368 };
367 369
368 r = zd_rfwritev_locked(chip, rv, 3, RF_RV_BITS); 370 r = zd_rfwritev_locked(chip, rv, 3, RF_RV_BITS);
@@ -393,8 +395,8 @@ static int zd1211_al2230_switch_radio_on(struct zd_rf *rf)
393{ 395{
394 struct zd_chip *chip = zd_rf_to_chip(rf); 396 struct zd_chip *chip = zd_rf_to_chip(rf);
395 static const struct zd_ioreq16 ioreqs[] = { 397 static const struct zd_ioreq16 ioreqs[] = {
396 { CR11, 0x00 }, 398 { ZD_CR11, 0x00 },
397 { CR251, 0x3f }, 399 { ZD_CR251, 0x3f },
398 }; 400 };
399 401
400 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); 402 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
@@ -404,8 +406,8 @@ static int zd1211b_al2230_switch_radio_on(struct zd_rf *rf)
404{ 406{
405 struct zd_chip *chip = zd_rf_to_chip(rf); 407 struct zd_chip *chip = zd_rf_to_chip(rf);
406 static const struct zd_ioreq16 ioreqs[] = { 408 static const struct zd_ioreq16 ioreqs[] = {
407 { CR11, 0x00 }, 409 { ZD_CR11, 0x00 },
408 { CR251, 0x7f }, 410 { ZD_CR251, 0x7f },
409 }; 411 };
410 412
411 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); 413 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
@@ -415,8 +417,8 @@ static int al2230_switch_radio_off(struct zd_rf *rf)
415{ 417{
416 struct zd_chip *chip = zd_rf_to_chip(rf); 418 struct zd_chip *chip = zd_rf_to_chip(rf);
417 static const struct zd_ioreq16 ioreqs[] = { 419 static const struct zd_ioreq16 ioreqs[] = {
418 { CR11, 0x04 }, 420 { ZD_CR11, 0x04 },
419 { CR251, 0x2f }, 421 { ZD_CR251, 0x2f },
420 }; 422 };
421 423
422 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); 424 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
diff --git a/drivers/net/wireless/zd1211rw/zd_rf_al7230b.c b/drivers/net/wireless/zd1211rw/zd_rf_al7230b.c
index 65095d661e6b..385c670d1293 100644
--- a/drivers/net/wireless/zd1211rw/zd_rf_al7230b.c
+++ b/drivers/net/wireless/zd1211rw/zd_rf_al7230b.c
@@ -68,19 +68,19 @@ static const u32 rv_init2[] = {
68}; 68};
69 69
70static const struct zd_ioreq16 ioreqs_sw[] = { 70static const struct zd_ioreq16 ioreqs_sw[] = {
71 { CR128, 0x14 }, { CR129, 0x12 }, { CR130, 0x10 }, 71 { ZD_CR128, 0x14 }, { ZD_CR129, 0x12 }, { ZD_CR130, 0x10 },
72 { CR38, 0x38 }, { CR136, 0xdf }, 72 { ZD_CR38, 0x38 }, { ZD_CR136, 0xdf },
73}; 73};
74 74
75static int zd1211b_al7230b_finalize(struct zd_chip *chip) 75static int zd1211b_al7230b_finalize(struct zd_chip *chip)
76{ 76{
77 int r; 77 int r;
78 static const struct zd_ioreq16 ioreqs[] = { 78 static const struct zd_ioreq16 ioreqs[] = {
79 { CR80, 0x30 }, { CR81, 0x30 }, { CR79, 0x58 }, 79 { ZD_CR80, 0x30 }, { ZD_CR81, 0x30 }, { ZD_CR79, 0x58 },
80 { CR12, 0xf0 }, { CR77, 0x1b }, { CR78, 0x58 }, 80 { ZD_CR12, 0xf0 }, { ZD_CR77, 0x1b }, { ZD_CR78, 0x58 },
81 { CR203, 0x04 }, 81 { ZD_CR203, 0x04 },
82 { }, 82 { },
83 { CR240, 0x80 }, 83 { ZD_CR240, 0x80 },
84 }; 84 };
85 85
86 r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); 86 r = zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
@@ -89,12 +89,12 @@ static int zd1211b_al7230b_finalize(struct zd_chip *chip)
89 89
90 if (chip->new_phy_layout) { 90 if (chip->new_phy_layout) {
91 /* antenna selection? */ 91 /* antenna selection? */
92 r = zd_iowrite16_locked(chip, 0xe5, CR9); 92 r = zd_iowrite16_locked(chip, 0xe5, ZD_CR9);
93 if (r) 93 if (r)
94 return r; 94 return r;
95 } 95 }
96 96
97 return zd_iowrite16_locked(chip, 0x04, CR203); 97 return zd_iowrite16_locked(chip, 0x04, ZD_CR203);
98} 98}
99 99
100static int zd1211_al7230b_init_hw(struct zd_rf *rf) 100static int zd1211_al7230b_init_hw(struct zd_rf *rf)
@@ -106,66 +106,66 @@ static int zd1211_al7230b_init_hw(struct zd_rf *rf)
106 * specified */ 106 * specified */
107 static const struct zd_ioreq16 ioreqs_1[] = { 107 static const struct zd_ioreq16 ioreqs_1[] = {
108 /* This one is 7230-specific, and happens before the rest */ 108 /* This one is 7230-specific, and happens before the rest */
109 { CR240, 0x57 }, 109 { ZD_CR240, 0x57 },
110 { }, 110 { },
111 111
112 { CR15, 0x20 }, { CR23, 0x40 }, { CR24, 0x20 }, 112 { ZD_CR15, 0x20 }, { ZD_CR23, 0x40 }, { ZD_CR24, 0x20 },
113 { CR26, 0x11 }, { CR28, 0x3e }, { CR29, 0x00 }, 113 { ZD_CR26, 0x11 }, { ZD_CR28, 0x3e }, { ZD_CR29, 0x00 },
114 { CR44, 0x33 }, 114 { ZD_CR44, 0x33 },
115 /* This value is different for 7230 (was: 0x2a) */ 115 /* This value is different for 7230 (was: 0x2a) */
116 { CR106, 0x22 }, 116 { ZD_CR106, 0x22 },
117 { CR107, 0x1a }, { CR109, 0x09 }, { CR110, 0x27 }, 117 { ZD_CR107, 0x1a }, { ZD_CR109, 0x09 }, { ZD_CR110, 0x27 },
118 { CR111, 0x2b }, { CR112, 0x2b }, { CR119, 0x0a }, 118 { ZD_CR111, 0x2b }, { ZD_CR112, 0x2b }, { ZD_CR119, 0x0a },
119 /* This happened further down in AL2230, 119 /* This happened further down in AL2230,
120 * and the value changed (was: 0xe0) */ 120 * and the value changed (was: 0xe0) */
121 { CR122, 0xfc }, 121 { ZD_CR122, 0xfc },
122 { CR10, 0x89 }, 122 { ZD_CR10, 0x89 },
123 /* for newest (3rd cut) AL2300 */ 123 /* for newest (3rd cut) AL2300 */
124 { CR17, 0x28 }, 124 { ZD_CR17, 0x28 },
125 { CR26, 0x93 }, { CR34, 0x30 }, 125 { ZD_CR26, 0x93 }, { ZD_CR34, 0x30 },
126 /* for newest (3rd cut) AL2300 */ 126 /* for newest (3rd cut) AL2300 */
127 { CR35, 0x3e }, 127 { ZD_CR35, 0x3e },
128 { CR41, 0x24 }, { CR44, 0x32 }, 128 { ZD_CR41, 0x24 }, { ZD_CR44, 0x32 },
129 /* for newest (3rd cut) AL2300 */ 129 /* for newest (3rd cut) AL2300 */
130 { CR46, 0x96 }, 130 { ZD_CR46, 0x96 },
131 { CR47, 0x1e }, { CR79, 0x58 }, { CR80, 0x30 }, 131 { ZD_CR47, 0x1e }, { ZD_CR79, 0x58 }, { ZD_CR80, 0x30 },
132 { CR81, 0x30 }, { CR87, 0x0a }, { CR89, 0x04 }, 132 { ZD_CR81, 0x30 }, { ZD_CR87, 0x0a }, { ZD_CR89, 0x04 },
133 { CR92, 0x0a }, { CR99, 0x28 }, 133 { ZD_CR92, 0x0a }, { ZD_CR99, 0x28 },
134 /* This value is different for 7230 (was: 0x00) */ 134 /* This value is different for 7230 (was: 0x00) */
135 { CR100, 0x02 }, 135 { ZD_CR100, 0x02 },
136 { CR101, 0x13 }, { CR102, 0x27 }, 136 { ZD_CR101, 0x13 }, { ZD_CR102, 0x27 },
137 /* This value is different for 7230 (was: 0x24) */ 137 /* This value is different for 7230 (was: 0x24) */
138 { CR106, 0x22 }, 138 { ZD_CR106, 0x22 },
139 /* This value is different for 7230 (was: 0x2a) */ 139 /* This value is different for 7230 (was: 0x2a) */
140 { CR107, 0x3f }, 140 { ZD_CR107, 0x3f },
141 { CR109, 0x09 }, 141 { ZD_CR109, 0x09 },
142 /* This value is different for 7230 (was: 0x13) */ 142 /* This value is different for 7230 (was: 0x13) */
143 { CR110, 0x1f }, 143 { ZD_CR110, 0x1f },
144 { CR111, 0x1f }, { CR112, 0x1f }, { CR113, 0x27 }, 144 { ZD_CR111, 0x1f }, { ZD_CR112, 0x1f }, { ZD_CR113, 0x27 },
145 { CR114, 0x27 }, 145 { ZD_CR114, 0x27 },
146 /* for newest (3rd cut) AL2300 */ 146 /* for newest (3rd cut) AL2300 */
147 { CR115, 0x24 }, 147 { ZD_CR115, 0x24 },
148 /* This value is different for 7230 (was: 0x24) */ 148 /* This value is different for 7230 (was: 0x24) */
149 { CR116, 0x3f }, 149 { ZD_CR116, 0x3f },
150 /* This value is different for 7230 (was: 0xf4) */ 150 /* This value is different for 7230 (was: 0xf4) */
151 { CR117, 0xfa }, 151 { ZD_CR117, 0xfa },
152 { CR118, 0xfc }, { CR119, 0x10 }, { CR120, 0x4f }, 152 { ZD_CR118, 0xfc }, { ZD_CR119, 0x10 }, { ZD_CR120, 0x4f },
153 { CR121, 0x77 }, { CR137, 0x88 }, 153 { ZD_CR121, 0x77 }, { ZD_CR137, 0x88 },
154 /* This one is 7230-specific */ 154 /* This one is 7230-specific */
155 { CR138, 0xa8 }, 155 { ZD_CR138, 0xa8 },
156 /* This value is different for 7230 (was: 0xff) */ 156 /* This value is different for 7230 (was: 0xff) */
157 { CR252, 0x34 }, 157 { ZD_CR252, 0x34 },
158 /* This value is different for 7230 (was: 0xff) */ 158 /* This value is different for 7230 (was: 0xff) */
159 { CR253, 0x34 }, 159 { ZD_CR253, 0x34 },
160 160
161 /* PLL_OFF */ 161 /* PLL_OFF */
162 { CR251, 0x2f }, 162 { ZD_CR251, 0x2f },
163 }; 163 };
164 164
165 static const struct zd_ioreq16 ioreqs_2[] = { 165 static const struct zd_ioreq16 ioreqs_2[] = {
166 { CR251, 0x3f }, /* PLL_ON */ 166 { ZD_CR251, 0x3f }, /* PLL_ON */
167 { CR128, 0x14 }, { CR129, 0x12 }, { CR130, 0x10 }, 167 { ZD_CR128, 0x14 }, { ZD_CR129, 0x12 }, { ZD_CR130, 0x10 },
168 { CR38, 0x38 }, { CR136, 0xdf }, 168 { ZD_CR38, 0x38 }, { ZD_CR136, 0xdf },
169 }; 169 };
170 170
171 r = zd_iowrite16a_locked(chip, ioreqs_1, ARRAY_SIZE(ioreqs_1)); 171 r = zd_iowrite16a_locked(chip, ioreqs_1, ARRAY_SIZE(ioreqs_1));
@@ -192,10 +192,10 @@ static int zd1211_al7230b_init_hw(struct zd_rf *rf)
192 if (r) 192 if (r)
193 return r; 193 return r;
194 194
195 r = zd_iowrite16_locked(chip, 0x06, CR203); 195 r = zd_iowrite16_locked(chip, 0x06, ZD_CR203);
196 if (r) 196 if (r)
197 return r; 197 return r;
198 r = zd_iowrite16_locked(chip, 0x80, CR240); 198 r = zd_iowrite16_locked(chip, 0x80, ZD_CR240);
199 if (r) 199 if (r)
200 return r; 200 return r;
201 201
@@ -208,79 +208,79 @@ static int zd1211b_al7230b_init_hw(struct zd_rf *rf)
208 struct zd_chip *chip = zd_rf_to_chip(rf); 208 struct zd_chip *chip = zd_rf_to_chip(rf);
209 209
210 static const struct zd_ioreq16 ioreqs_1[] = { 210 static const struct zd_ioreq16 ioreqs_1[] = {
211 { CR240, 0x57 }, { CR9, 0x9 }, 211 { ZD_CR240, 0x57 }, { ZD_CR9, 0x9 },
212 { }, 212 { },
213 { CR10, 0x8b }, { CR15, 0x20 }, 213 { ZD_CR10, 0x8b }, { ZD_CR15, 0x20 },
214 { CR17, 0x2B }, /* for newest (3rd cut) AL2230 */ 214 { ZD_CR17, 0x2B }, /* for newest (3rd cut) AL2230 */
215 { CR20, 0x10 }, /* 4N25->Stone Request */ 215 { ZD_CR20, 0x10 }, /* 4N25->Stone Request */
216 { CR23, 0x40 }, { CR24, 0x20 }, { CR26, 0x93 }, 216 { ZD_CR23, 0x40 }, { ZD_CR24, 0x20 }, { ZD_CR26, 0x93 },
217 { CR28, 0x3e }, { CR29, 0x00 }, 217 { ZD_CR28, 0x3e }, { ZD_CR29, 0x00 },
218 { CR33, 0x28 }, /* 5613 */ 218 { ZD_CR33, 0x28 }, /* 5613 */
219 { CR34, 0x30 }, 219 { ZD_CR34, 0x30 },
220 { CR35, 0x3e }, /* for newest (3rd cut) AL2230 */ 220 { ZD_CR35, 0x3e }, /* for newest (3rd cut) AL2230 */
221 { CR41, 0x24 }, { CR44, 0x32 }, 221 { ZD_CR41, 0x24 }, { ZD_CR44, 0x32 },
222 { CR46, 0x99 }, /* for newest (3rd cut) AL2230 */ 222 { ZD_CR46, 0x99 }, /* for newest (3rd cut) AL2230 */
223 { CR47, 0x1e }, 223 { ZD_CR47, 0x1e },
224 224
225 /* ZD1215 5610 */ 225 /* ZD1215 5610 */
226 { CR48, 0x00 }, { CR49, 0x00 }, { CR51, 0x01 }, 226 { ZD_CR48, 0x00 }, { ZD_CR49, 0x00 }, { ZD_CR51, 0x01 },
227 { CR52, 0x80 }, { CR53, 0x7e }, { CR65, 0x00 }, 227 { ZD_CR52, 0x80 }, { ZD_CR53, 0x7e }, { ZD_CR65, 0x00 },
228 { CR66, 0x00 }, { CR67, 0x00 }, { CR68, 0x00 }, 228 { ZD_CR66, 0x00 }, { ZD_CR67, 0x00 }, { ZD_CR68, 0x00 },
229 { CR69, 0x28 }, 229 { ZD_CR69, 0x28 },
230 230
231 { CR79, 0x58 }, { CR80, 0x30 }, { CR81, 0x30 }, 231 { ZD_CR79, 0x58 }, { ZD_CR80, 0x30 }, { ZD_CR81, 0x30 },
232 { CR87, 0x0A }, { CR89, 0x04 }, 232 { ZD_CR87, 0x0A }, { ZD_CR89, 0x04 },
233 { CR90, 0x58 }, /* 5112 */ 233 { ZD_CR90, 0x58 }, /* 5112 */
234 { CR91, 0x00 }, /* 5613 */ 234 { ZD_CR91, 0x00 }, /* 5613 */
235 { CR92, 0x0a }, 235 { ZD_CR92, 0x0a },
236 { CR98, 0x8d }, /* 4804, for 1212 new algorithm */ 236 { ZD_CR98, 0x8d }, /* 4804, for 1212 new algorithm */
237 { CR99, 0x00 }, { CR100, 0x02 }, { CR101, 0x13 }, 237 { ZD_CR99, 0x00 }, { ZD_CR100, 0x02 }, { ZD_CR101, 0x13 },
238 { CR102, 0x27 }, 238 { ZD_CR102, 0x27 },
239 { CR106, 0x20 }, /* change to 0x24 for AL7230B */ 239 { ZD_CR106, 0x20 }, /* change to 0x24 for AL7230B */
240 { CR109, 0x13 }, /* 4804, for 1212 new algorithm */ 240 { ZD_CR109, 0x13 }, /* 4804, for 1212 new algorithm */
241 { CR112, 0x1f }, 241 { ZD_CR112, 0x1f },
242 }; 242 };
243 243
244 static const struct zd_ioreq16 ioreqs_new_phy[] = { 244 static const struct zd_ioreq16 ioreqs_new_phy[] = {
245 { CR107, 0x28 }, 245 { ZD_CR107, 0x28 },
246 { CR110, 0x1f }, /* 5127, 0x13->0x1f */ 246 { ZD_CR110, 0x1f }, /* 5127, 0x13->0x1f */
247 { CR111, 0x1f }, /* 0x13 to 0x1f for AL7230B */ 247 { ZD_CR111, 0x1f }, /* 0x13 to 0x1f for AL7230B */
248 { CR116, 0x2a }, { CR118, 0xfa }, { CR119, 0x12 }, 248 { ZD_CR116, 0x2a }, { ZD_CR118, 0xfa }, { ZD_CR119, 0x12 },
249 { CR121, 0x6c }, /* 5613 */ 249 { ZD_CR121, 0x6c }, /* 5613 */
250 }; 250 };
251 251
252 static const struct zd_ioreq16 ioreqs_old_phy[] = { 252 static const struct zd_ioreq16 ioreqs_old_phy[] = {
253 { CR107, 0x24 }, 253 { ZD_CR107, 0x24 },
254 { CR110, 0x13 }, /* 5127, 0x13->0x1f */ 254 { ZD_CR110, 0x13 }, /* 5127, 0x13->0x1f */
255 { CR111, 0x13 }, /* 0x13 to 0x1f for AL7230B */ 255 { ZD_CR111, 0x13 }, /* 0x13 to 0x1f for AL7230B */
256 { CR116, 0x24 }, { CR118, 0xfc }, { CR119, 0x11 }, 256 { ZD_CR116, 0x24 }, { ZD_CR118, 0xfc }, { ZD_CR119, 0x11 },
257 { CR121, 0x6a }, /* 5613 */ 257 { ZD_CR121, 0x6a }, /* 5613 */
258 }; 258 };
259 259
260 static const struct zd_ioreq16 ioreqs_2[] = { 260 static const struct zd_ioreq16 ioreqs_2[] = {
261 { CR113, 0x27 }, { CR114, 0x27 }, { CR115, 0x24 }, 261 { ZD_CR113, 0x27 }, { ZD_CR114, 0x27 }, { ZD_CR115, 0x24 },
262 { CR117, 0xfa }, { CR120, 0x4f }, 262 { ZD_CR117, 0xfa }, { ZD_CR120, 0x4f },
263 { CR122, 0xfc }, /* E0->FCh at 4901 */ 263 { ZD_CR122, 0xfc }, /* E0->FCh at 4901 */
264 { CR123, 0x57 }, /* 5613 */ 264 { ZD_CR123, 0x57 }, /* 5613 */
265 { CR125, 0xad }, /* 4804, for 1212 new algorithm */ 265 { ZD_CR125, 0xad }, /* 4804, for 1212 new algorithm */
266 { CR126, 0x6c }, /* 5613 */ 266 { ZD_CR126, 0x6c }, /* 5613 */
267 { CR127, 0x03 }, /* 4804, for 1212 new algorithm */ 267 { ZD_CR127, 0x03 }, /* 4804, for 1212 new algorithm */
268 { CR130, 0x10 }, 268 { ZD_CR130, 0x10 },
269 { CR131, 0x00 }, /* 5112 */ 269 { ZD_CR131, 0x00 }, /* 5112 */
270 { CR137, 0x50 }, /* 5613 */ 270 { ZD_CR137, 0x50 }, /* 5613 */
271 { CR138, 0xa8 }, /* 5112 */ 271 { ZD_CR138, 0xa8 }, /* 5112 */
272 { CR144, 0xac }, /* 5613 */ 272 { ZD_CR144, 0xac }, /* 5613 */
273 { CR148, 0x40 }, /* 5112 */ 273 { ZD_CR148, 0x40 }, /* 5112 */
274 { CR149, 0x40 }, /* 4O07, 50->40 */ 274 { ZD_CR149, 0x40 }, /* 4O07, 50->40 */
275 { CR150, 0x1a }, /* 5112, 0C->1A */ 275 { ZD_CR150, 0x1a }, /* 5112, 0C->1A */
276 { CR252, 0x34 }, { CR253, 0x34 }, 276 { ZD_CR252, 0x34 }, { ZD_CR253, 0x34 },
277 { CR251, 0x2f }, /* PLL_OFF */ 277 { ZD_CR251, 0x2f }, /* PLL_OFF */
278 }; 278 };
279 279
280 static const struct zd_ioreq16 ioreqs_3[] = { 280 static const struct zd_ioreq16 ioreqs_3[] = {
281 { CR251, 0x7f }, /* PLL_ON */ 281 { ZD_CR251, 0x7f }, /* PLL_ON */
282 { CR128, 0x14 }, { CR129, 0x12 }, { CR130, 0x10 }, 282 { ZD_CR128, 0x14 }, { ZD_CR129, 0x12 }, { ZD_CR130, 0x10 },
283 { CR38, 0x38 }, { CR136, 0xdf }, 283 { ZD_CR38, 0x38 }, { ZD_CR136, 0xdf },
284 }; 284 };
285 285
286 r = zd_iowrite16a_locked(chip, ioreqs_1, ARRAY_SIZE(ioreqs_1)); 286 r = zd_iowrite16a_locked(chip, ioreqs_1, ARRAY_SIZE(ioreqs_1));
@@ -331,16 +331,16 @@ static int zd1211_al7230b_set_channel(struct zd_rf *rf, u8 channel)
331 331
332 static const struct zd_ioreq16 ioreqs[] = { 332 static const struct zd_ioreq16 ioreqs[] = {
333 /* PLL_ON */ 333 /* PLL_ON */
334 { CR251, 0x3f }, 334 { ZD_CR251, 0x3f },
335 { CR203, 0x06 }, { CR240, 0x08 }, 335 { ZD_CR203, 0x06 }, { ZD_CR240, 0x08 },
336 }; 336 };
337 337
338 r = zd_iowrite16_locked(chip, 0x57, CR240); 338 r = zd_iowrite16_locked(chip, 0x57, ZD_CR240);
339 if (r) 339 if (r)
340 return r; 340 return r;
341 341
342 /* PLL_OFF */ 342 /* PLL_OFF */
343 r = zd_iowrite16_locked(chip, 0x2f, CR251); 343 r = zd_iowrite16_locked(chip, 0x2f, ZD_CR251);
344 if (r) 344 if (r)
345 return r; 345 return r;
346 346
@@ -376,15 +376,15 @@ static int zd1211b_al7230b_set_channel(struct zd_rf *rf, u8 channel)
376 const u32 *rv = chan_rv[channel-1]; 376 const u32 *rv = chan_rv[channel-1];
377 struct zd_chip *chip = zd_rf_to_chip(rf); 377 struct zd_chip *chip = zd_rf_to_chip(rf);
378 378
379 r = zd_iowrite16_locked(chip, 0x57, CR240); 379 r = zd_iowrite16_locked(chip, 0x57, ZD_CR240);
380 if (r) 380 if (r)
381 return r; 381 return r;
382 r = zd_iowrite16_locked(chip, 0xe4, CR9); 382 r = zd_iowrite16_locked(chip, 0xe4, ZD_CR9);
383 if (r) 383 if (r)
384 return r; 384 return r;
385 385
386 /* PLL_OFF */ 386 /* PLL_OFF */
387 r = zd_iowrite16_locked(chip, 0x2f, CR251); 387 r = zd_iowrite16_locked(chip, 0x2f, ZD_CR251);
388 if (r) 388 if (r)
389 return r; 389 return r;
390 r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv)); 390 r = zd_rfwritev_cr_locked(chip, std_rv, ARRAY_SIZE(std_rv));
@@ -410,7 +410,7 @@ static int zd1211b_al7230b_set_channel(struct zd_rf *rf, u8 channel)
410 if (r) 410 if (r)
411 return r; 411 return r;
412 412
413 r = zd_iowrite16_locked(chip, 0x7f, CR251); 413 r = zd_iowrite16_locked(chip, 0x7f, ZD_CR251);
414 if (r) 414 if (r)
415 return r; 415 return r;
416 416
@@ -421,8 +421,8 @@ static int zd1211_al7230b_switch_radio_on(struct zd_rf *rf)
421{ 421{
422 struct zd_chip *chip = zd_rf_to_chip(rf); 422 struct zd_chip *chip = zd_rf_to_chip(rf);
423 static const struct zd_ioreq16 ioreqs[] = { 423 static const struct zd_ioreq16 ioreqs[] = {
424 { CR11, 0x00 }, 424 { ZD_CR11, 0x00 },
425 { CR251, 0x3f }, 425 { ZD_CR251, 0x3f },
426 }; 426 };
427 427
428 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); 428 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
@@ -432,8 +432,8 @@ static int zd1211b_al7230b_switch_radio_on(struct zd_rf *rf)
432{ 432{
433 struct zd_chip *chip = zd_rf_to_chip(rf); 433 struct zd_chip *chip = zd_rf_to_chip(rf);
434 static const struct zd_ioreq16 ioreqs[] = { 434 static const struct zd_ioreq16 ioreqs[] = {
435 { CR11, 0x00 }, 435 { ZD_CR11, 0x00 },
436 { CR251, 0x7f }, 436 { ZD_CR251, 0x7f },
437 }; 437 };
438 438
439 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); 439 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
@@ -443,8 +443,8 @@ static int al7230b_switch_radio_off(struct zd_rf *rf)
443{ 443{
444 struct zd_chip *chip = zd_rf_to_chip(rf); 444 struct zd_chip *chip = zd_rf_to_chip(rf);
445 static const struct zd_ioreq16 ioreqs[] = { 445 static const struct zd_ioreq16 ioreqs[] = {
446 { CR11, 0x04 }, 446 { ZD_CR11, 0x04 },
447 { CR251, 0x2f }, 447 { ZD_CR251, 0x2f },
448 }; 448 };
449 449
450 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs)); 450 return zd_iowrite16a_locked(chip, ioreqs, ARRAY_SIZE(ioreqs));
@@ -456,7 +456,7 @@ static int zd1211b_al7230b_patch_6m(struct zd_rf *rf, u8 channel)
456{ 456{
457 struct zd_chip *chip = zd_rf_to_chip(rf); 457 struct zd_chip *chip = zd_rf_to_chip(rf);
458 struct zd_ioreq16 ioreqs[] = { 458 struct zd_ioreq16 ioreqs[] = {
459 { CR128, 0x14 }, { CR129, 0x12 }, 459 { ZD_CR128, 0x14 }, { ZD_CR129, 0x12 },
460 }; 460 };
461 461
462 /* FIXME: Channel 11 is not the edge for all regulatory domains. */ 462 /* FIXME: Channel 11 is not the edge for all regulatory domains. */
diff --git a/drivers/net/wireless/zd1211rw/zd_rf_rf2959.c b/drivers/net/wireless/zd1211rw/zd_rf_rf2959.c
index 0597d862fbd2..784d9ccb8fef 100644
--- a/drivers/net/wireless/zd1211rw/zd_rf_rf2959.c
+++ b/drivers/net/wireless/zd1211rw/zd_rf_rf2959.c
@@ -152,44 +152,44 @@ static int rf2959_init_hw(struct zd_rf *rf)
152 struct zd_chip *chip = zd_rf_to_chip(rf); 152 struct zd_chip *chip = zd_rf_to_chip(rf);
153 153
154 static const struct zd_ioreq16 ioreqs[] = { 154 static const struct zd_ioreq16 ioreqs[] = {
155 { CR2, 0x1E }, { CR9, 0x20 }, { CR10, 0x89 }, 155 { ZD_CR2, 0x1E }, { ZD_CR9, 0x20 }, { ZD_CR10, 0x89 },
156 { CR11, 0x00 }, { CR15, 0xD0 }, { CR17, 0x68 }, 156 { ZD_CR11, 0x00 }, { ZD_CR15, 0xD0 }, { ZD_CR17, 0x68 },
157 { CR19, 0x4a }, { CR20, 0x0c }, { CR21, 0x0E }, 157 { ZD_CR19, 0x4a }, { ZD_CR20, 0x0c }, { ZD_CR21, 0x0E },
158 { CR23, 0x48 }, 158 { ZD_CR23, 0x48 },
159 /* normal size for cca threshold */ 159 /* normal size for cca threshold */
160 { CR24, 0x14 }, 160 { ZD_CR24, 0x14 },
161 /* { CR24, 0x20 }, */ 161 /* { ZD_CR24, 0x20 }, */
162 { CR26, 0x90 }, { CR27, 0x30 }, { CR29, 0x20 }, 162 { ZD_CR26, 0x90 }, { ZD_CR27, 0x30 }, { ZD_CR29, 0x20 },
163 { CR31, 0xb2 }, { CR32, 0x43 }, { CR33, 0x28 }, 163 { ZD_CR31, 0xb2 }, { ZD_CR32, 0x43 }, { ZD_CR33, 0x28 },
164 { CR38, 0x30 }, { CR34, 0x0f }, { CR35, 0xF0 }, 164 { ZD_CR38, 0x30 }, { ZD_CR34, 0x0f }, { ZD_CR35, 0xF0 },
165 { CR41, 0x2a }, { CR46, 0x7F }, { CR47, 0x1E }, 165 { ZD_CR41, 0x2a }, { ZD_CR46, 0x7F }, { ZD_CR47, 0x1E },
166 { CR51, 0xc5 }, { CR52, 0xc5 }, { CR53, 0xc5 }, 166 { ZD_CR51, 0xc5 }, { ZD_CR52, 0xc5 }, { ZD_CR53, 0xc5 },
167 { CR79, 0x58 }, { CR80, 0x30 }, { CR81, 0x30 }, 167 { ZD_CR79, 0x58 }, { ZD_CR80, 0x30 }, { ZD_CR81, 0x30 },
168 { CR82, 0x00 }, { CR83, 0x24 }, { CR84, 0x04 }, 168 { ZD_CR82, 0x00 }, { ZD_CR83, 0x24 }, { ZD_CR84, 0x04 },
169 { CR85, 0x00 }, { CR86, 0x10 }, { CR87, 0x2A }, 169 { ZD_CR85, 0x00 }, { ZD_CR86, 0x10 }, { ZD_CR87, 0x2A },
170 { CR88, 0x10 }, { CR89, 0x24 }, { CR90, 0x18 }, 170 { ZD_CR88, 0x10 }, { ZD_CR89, 0x24 }, { ZD_CR90, 0x18 },
171 /* { CR91, 0x18 }, */ 171 /* { ZD_CR91, 0x18 }, */
172 /* should solve continous CTS frame problems */ 172 /* should solve continuous CTS frame problems */
173 { CR91, 0x00 }, 173 { ZD_CR91, 0x00 },
174 { CR92, 0x0a }, { CR93, 0x00 }, { CR94, 0x01 }, 174 { ZD_CR92, 0x0a }, { ZD_CR93, 0x00 }, { ZD_CR94, 0x01 },
175 { CR95, 0x00 }, { CR96, 0x40 }, { CR97, 0x37 }, 175 { ZD_CR95, 0x00 }, { ZD_CR96, 0x40 }, { ZD_CR97, 0x37 },
176 { CR98, 0x05 }, { CR99, 0x28 }, { CR100, 0x00 }, 176 { ZD_CR98, 0x05 }, { ZD_CR99, 0x28 }, { ZD_CR100, 0x00 },
177 { CR101, 0x13 }, { CR102, 0x27 }, { CR103, 0x27 }, 177 { ZD_CR101, 0x13 }, { ZD_CR102, 0x27 }, { ZD_CR103, 0x27 },
178 { CR104, 0x18 }, { CR105, 0x12 }, 178 { ZD_CR104, 0x18 }, { ZD_CR105, 0x12 },
179 /* normal size */ 179 /* normal size */
180 { CR106, 0x1a }, 180 { ZD_CR106, 0x1a },
181 /* { CR106, 0x22 }, */ 181 /* { ZD_CR106, 0x22 }, */
182 { CR107, 0x24 }, { CR108, 0x0a }, { CR109, 0x13 }, 182 { ZD_CR107, 0x24 }, { ZD_CR108, 0x0a }, { ZD_CR109, 0x13 },
183 { CR110, 0x2F }, { CR111, 0x27 }, { CR112, 0x27 }, 183 { ZD_CR110, 0x2F }, { ZD_CR111, 0x27 }, { ZD_CR112, 0x27 },
184 { CR113, 0x27 }, { CR114, 0x27 }, { CR115, 0x40 }, 184 { ZD_CR113, 0x27 }, { ZD_CR114, 0x27 }, { ZD_CR115, 0x40 },
185 { CR116, 0x40 }, { CR117, 0xF0 }, { CR118, 0xF0 }, 185 { ZD_CR116, 0x40 }, { ZD_CR117, 0xF0 }, { ZD_CR118, 0xF0 },
186 { CR119, 0x16 }, 186 { ZD_CR119, 0x16 },
187 /* no TX continuation */ 187 /* no TX continuation */
188 { CR122, 0x00 }, 188 { ZD_CR122, 0x00 },
189 /* { CR122, 0xff }, */ 189 /* { ZD_CR122, 0xff }, */
190 { CR127, 0x03 }, { CR131, 0x08 }, { CR138, 0x28 }, 190 { ZD_CR127, 0x03 }, { ZD_CR131, 0x08 }, { ZD_CR138, 0x28 },
191 { CR148, 0x44 }, { CR150, 0x10 }, { CR169, 0xBB }, 191 { ZD_CR148, 0x44 }, { ZD_CR150, 0x10 }, { ZD_CR169, 0xBB },
192 { CR170, 0xBB }, 192 { ZD_CR170, 0xBB },
193 }; 193 };
194 194
195 static const u32 rv[] = { 195 static const u32 rv[] = {
@@ -210,7 +210,7 @@ static int rf2959_init_hw(struct zd_rf *rf)
210 */ 210 */
211 0x294128, /* internal power */ 211 0x294128, /* internal power */
212 /* 0x28252c, */ /* External control TX power */ 212 /* 0x28252c, */ /* External control TX power */
213 /* CR31_CCK, CR51_6-36M, CR52_48M, CR53_54M */ 213 /* ZD_CR31_CCK, ZD_CR51_6-36M, ZD_CR52_48M, ZD_CR53_54M */
214 0x2c0000, 214 0x2c0000,
215 0x300000, 215 0x300000,
216 0x340000, /* REG13(0xD) */ 216 0x340000, /* REG13(0xD) */
@@ -245,8 +245,8 @@ static int rf2959_set_channel(struct zd_rf *rf, u8 channel)
245static int rf2959_switch_radio_on(struct zd_rf *rf) 245static int rf2959_switch_radio_on(struct zd_rf *rf)
246{ 246{
247 static const struct zd_ioreq16 ioreqs[] = { 247 static const struct zd_ioreq16 ioreqs[] = {
248 { CR10, 0x89 }, 248 { ZD_CR10, 0x89 },
249 { CR11, 0x00 }, 249 { ZD_CR11, 0x00 },
250 }; 250 };
251 struct zd_chip *chip = zd_rf_to_chip(rf); 251 struct zd_chip *chip = zd_rf_to_chip(rf);
252 252
@@ -256,8 +256,8 @@ static int rf2959_switch_radio_on(struct zd_rf *rf)
256static int rf2959_switch_radio_off(struct zd_rf *rf) 256static int rf2959_switch_radio_off(struct zd_rf *rf)
257{ 257{
258 static const struct zd_ioreq16 ioreqs[] = { 258 static const struct zd_ioreq16 ioreqs[] = {
259 { CR10, 0x15 }, 259 { ZD_CR10, 0x15 },
260 { CR11, 0x81 }, 260 { ZD_CR11, 0x81 },
261 }; 261 };
262 struct zd_chip *chip = zd_rf_to_chip(rf); 262 struct zd_chip *chip = zd_rf_to_chip(rf);
263 263
diff --git a/drivers/net/wireless/zd1211rw/zd_rf_uw2453.c b/drivers/net/wireless/zd1211rw/zd_rf_uw2453.c
index 9e74eb1b67d5..c4d324e19c24 100644
--- a/drivers/net/wireless/zd1211rw/zd_rf_uw2453.c
+++ b/drivers/net/wireless/zd1211rw/zd_rf_uw2453.c
@@ -314,46 +314,48 @@ static int uw2453_init_hw(struct zd_rf *rf)
314 struct zd_chip *chip = zd_rf_to_chip(rf); 314 struct zd_chip *chip = zd_rf_to_chip(rf);
315 315
316 static const struct zd_ioreq16 ioreqs[] = { 316 static const struct zd_ioreq16 ioreqs[] = {
317 { CR10, 0x89 }, { CR15, 0x20 }, 317 { ZD_CR10, 0x89 }, { ZD_CR15, 0x20 },
318 { CR17, 0x28 }, /* 6112 no change */ 318 { ZD_CR17, 0x28 }, /* 6112 no change */
319 { CR23, 0x38 }, { CR24, 0x20 }, { CR26, 0x93 }, 319 { ZD_CR23, 0x38 }, { ZD_CR24, 0x20 }, { ZD_CR26, 0x93 },
320 { CR27, 0x15 }, { CR28, 0x3e }, { CR29, 0x00 }, 320 { ZD_CR27, 0x15 }, { ZD_CR28, 0x3e }, { ZD_CR29, 0x00 },
321 { CR33, 0x28 }, { CR34, 0x30 }, 321 { ZD_CR33, 0x28 }, { ZD_CR34, 0x30 },
322 { CR35, 0x43 }, /* 6112 3e->43 */ 322 { ZD_CR35, 0x43 }, /* 6112 3e->43 */
323 { CR41, 0x24 }, { CR44, 0x32 }, 323 { ZD_CR41, 0x24 }, { ZD_CR44, 0x32 },
324 { CR46, 0x92 }, /* 6112 96->92 */ 324 { ZD_CR46, 0x92 }, /* 6112 96->92 */
325 { CR47, 0x1e }, 325 { ZD_CR47, 0x1e },
326 { CR48, 0x04 }, /* 5602 Roger */ 326 { ZD_CR48, 0x04 }, /* 5602 Roger */
327 { CR49, 0xfa }, { CR79, 0x58 }, { CR80, 0x30 }, 327 { ZD_CR49, 0xfa }, { ZD_CR79, 0x58 }, { ZD_CR80, 0x30 },
328 { CR81, 0x30 }, { CR87, 0x0a }, { CR89, 0x04 }, 328 { ZD_CR81, 0x30 }, { ZD_CR87, 0x0a }, { ZD_CR89, 0x04 },
329 { CR91, 0x00 }, { CR92, 0x0a }, { CR98, 0x8d }, 329 { ZD_CR91, 0x00 }, { ZD_CR92, 0x0a }, { ZD_CR98, 0x8d },
330 { CR99, 0x28 }, { CR100, 0x02 }, 330 { ZD_CR99, 0x28 }, { ZD_CR100, 0x02 },
331 { CR101, 0x09 }, /* 6112 13->1f 6220 1f->13 6407 13->9 */ 331 { ZD_CR101, 0x09 }, /* 6112 13->1f 6220 1f->13 6407 13->9 */
332 { CR102, 0x27 }, 332 { ZD_CR102, 0x27 },
333 { CR106, 0x1c }, /* 5d07 5112 1f->1c 6220 1c->1f 6221 1f->1c */ 333 { ZD_CR106, 0x1c }, /* 5d07 5112 1f->1c 6220 1c->1f
334 { CR107, 0x1c }, /* 6220 1c->1a 5221 1a->1c */ 334 * 6221 1f->1c
335 { CR109, 0x13 }, 335 */
336 { CR110, 0x1f }, /* 6112 13->1f 6221 1f->13 6407 13->0x09 */ 336 { ZD_CR107, 0x1c }, /* 6220 1c->1a 5221 1a->1c */
337 { CR111, 0x13 }, { CR112, 0x1f }, { CR113, 0x27 }, 337 { ZD_CR109, 0x13 },
338 { CR114, 0x23 }, /* 6221 27->23 */ 338 { ZD_CR110, 0x1f }, /* 6112 13->1f 6221 1f->13 6407 13->0x09 */
339 { CR115, 0x24 }, /* 6112 24->1c 6220 1c->24 */ 339 { ZD_CR111, 0x13 }, { ZD_CR112, 0x1f }, { ZD_CR113, 0x27 },
340 { CR116, 0x24 }, /* 6220 1c->24 */ 340 { ZD_CR114, 0x23 }, /* 6221 27->23 */
341 { CR117, 0xfa }, /* 6112 fa->f8 6220 f8->f4 6220 f4->fa */ 341 { ZD_CR115, 0x24 }, /* 6112 24->1c 6220 1c->24 */
342 { CR118, 0xf0 }, /* 5d07 6112 f0->f2 6220 f2->f0 */ 342 { ZD_CR116, 0x24 }, /* 6220 1c->24 */
343 { CR119, 0x1a }, /* 6112 1a->10 6220 10->14 6220 14->1a */ 343 { ZD_CR117, 0xfa }, /* 6112 fa->f8 6220 f8->f4 6220 f4->fa */
344 { CR120, 0x4f }, 344 { ZD_CR118, 0xf0 }, /* 5d07 6112 f0->f2 6220 f2->f0 */
345 { CR121, 0x1f }, /* 6220 4f->1f */ 345 { ZD_CR119, 0x1a }, /* 6112 1a->10 6220 10->14 6220 14->1a */
346 { CR122, 0xf0 }, { CR123, 0x57 }, { CR125, 0xad }, 346 { ZD_CR120, 0x4f },
347 { CR126, 0x6c }, { CR127, 0x03 }, 347 { ZD_CR121, 0x1f }, /* 6220 4f->1f */
348 { CR128, 0x14 }, /* 6302 12->11 */ 348 { ZD_CR122, 0xf0 }, { ZD_CR123, 0x57 }, { ZD_CR125, 0xad },
349 { CR129, 0x12 }, /* 6301 10->0f */ 349 { ZD_CR126, 0x6c }, { ZD_CR127, 0x03 },
350 { CR130, 0x10 }, { CR137, 0x50 }, { CR138, 0xa8 }, 350 { ZD_CR128, 0x14 }, /* 6302 12->11 */
351 { CR144, 0xac }, { CR146, 0x20 }, { CR252, 0xff }, 351 { ZD_CR129, 0x12 }, /* 6301 10->0f */
352 { CR253, 0xff }, 352 { ZD_CR130, 0x10 }, { ZD_CR137, 0x50 }, { ZD_CR138, 0xa8 },
353 { ZD_CR144, 0xac }, { ZD_CR146, 0x20 }, { ZD_CR252, 0xff },
354 { ZD_CR253, 0xff },
353 }; 355 };
354 356
355 static const u32 rv[] = { 357 static const u32 rv[] = {
356 UW2453_REGWRITE(4, 0x2b), /* configure reciever gain */ 358 UW2453_REGWRITE(4, 0x2b), /* configure receiver gain */
357 UW2453_REGWRITE(5, 0x19e4f), /* configure transmitter gain */ 359 UW2453_REGWRITE(5, 0x19e4f), /* configure transmitter gain */
358 UW2453_REGWRITE(6, 0xf81ad), /* enable RX/TX filter tuning */ 360 UW2453_REGWRITE(6, 0xf81ad), /* enable RX/TX filter tuning */
359 UW2453_REGWRITE(7, 0x3fffe), /* disable TX gain in test mode */ 361 UW2453_REGWRITE(7, 0x3fffe), /* disable TX gain in test mode */
@@ -433,7 +435,7 @@ static int uw2453_init_hw(struct zd_rf *rf)
433 * the one that produced a lock. */ 435 * the one that produced a lock. */
434 UW2453_PRIV(rf)->config = found_config + 1; 436 UW2453_PRIV(rf)->config = found_config + 1;
435 437
436 return zd_iowrite16_locked(chip, 0x06, CR203); 438 return zd_iowrite16_locked(chip, 0x06, ZD_CR203);
437} 439}
438 440
439static int uw2453_set_channel(struct zd_rf *rf, u8 channel) 441static int uw2453_set_channel(struct zd_rf *rf, u8 channel)
@@ -445,8 +447,8 @@ static int uw2453_set_channel(struct zd_rf *rf, u8 channel)
445 struct zd_chip *chip = zd_rf_to_chip(rf); 447 struct zd_chip *chip = zd_rf_to_chip(rf);
446 448
447 static const struct zd_ioreq16 ioreqs[] = { 449 static const struct zd_ioreq16 ioreqs[] = {
448 { CR80, 0x30 }, { CR81, 0x30 }, { CR79, 0x58 }, 450 { ZD_CR80, 0x30 }, { ZD_CR81, 0x30 }, { ZD_CR79, 0x58 },
449 { CR12, 0xf0 }, { CR77, 0x1b }, { CR78, 0x58 }, 451 { ZD_CR12, 0xf0 }, { ZD_CR77, 0x1b }, { ZD_CR78, 0x58 },
450 }; 452 };
451 453
452 r = uw2453_synth_set_channel(chip, channel, autocal); 454 r = uw2453_synth_set_channel(chip, channel, autocal);
@@ -474,7 +476,7 @@ static int uw2453_set_channel(struct zd_rf *rf, u8 channel)
474 if (r) 476 if (r)
475 return r; 477 return r;
476 478
477 return zd_iowrite16_locked(chip, 0x06, CR203); 479 return zd_iowrite16_locked(chip, 0x06, ZD_CR203);
478} 480}
479 481
480static int uw2453_switch_radio_on(struct zd_rf *rf) 482static int uw2453_switch_radio_on(struct zd_rf *rf)
@@ -482,7 +484,7 @@ static int uw2453_switch_radio_on(struct zd_rf *rf)
482 int r; 484 int r;
483 struct zd_chip *chip = zd_rf_to_chip(rf); 485 struct zd_chip *chip = zd_rf_to_chip(rf);
484 struct zd_ioreq16 ioreqs[] = { 486 struct zd_ioreq16 ioreqs[] = {
485 { CR11, 0x00 }, { CR251, 0x3f }, 487 { ZD_CR11, 0x00 }, { ZD_CR251, 0x3f },
486 }; 488 };
487 489
488 /* enter RXTX mode */ 490 /* enter RXTX mode */
@@ -501,7 +503,7 @@ static int uw2453_switch_radio_off(struct zd_rf *rf)
501 int r; 503 int r;
502 struct zd_chip *chip = zd_rf_to_chip(rf); 504 struct zd_chip *chip = zd_rf_to_chip(rf);
503 static const struct zd_ioreq16 ioreqs[] = { 505 static const struct zd_ioreq16 ioreqs[] = {
504 { CR11, 0x04 }, { CR251, 0x2f }, 506 { ZD_CR11, 0x04 }, { ZD_CR251, 0x2f },
505 }; 507 };
506 508
507 /* enter IDLE mode */ 509 /* enter IDLE mode */
diff --git a/drivers/net/wireless/zd1211rw/zd_usb.c b/drivers/net/wireless/zd1211rw/zd_usb.c
index 818e1480ca93..631194d49828 100644
--- a/drivers/net/wireless/zd1211rw/zd_usb.c
+++ b/drivers/net/wireless/zd1211rw/zd_usb.c
@@ -55,10 +55,12 @@ static struct usb_device_id usb_ids[] = {
55 { USB_DEVICE(0x129b, 0x1666), .driver_info = DEVICE_ZD1211 }, 55 { USB_DEVICE(0x129b, 0x1666), .driver_info = DEVICE_ZD1211 },
56 { USB_DEVICE(0x13b1, 0x001e), .driver_info = DEVICE_ZD1211 }, 56 { USB_DEVICE(0x13b1, 0x001e), .driver_info = DEVICE_ZD1211 },
57 { USB_DEVICE(0x1435, 0x0711), .driver_info = DEVICE_ZD1211 }, 57 { USB_DEVICE(0x1435, 0x0711), .driver_info = DEVICE_ZD1211 },
58 { USB_DEVICE(0x14ea, 0xab10), .driver_info = DEVICE_ZD1211 },
58 { USB_DEVICE(0x14ea, 0xab13), .driver_info = DEVICE_ZD1211 }, 59 { USB_DEVICE(0x14ea, 0xab13), .driver_info = DEVICE_ZD1211 },
59 { USB_DEVICE(0x157e, 0x300a), .driver_info = DEVICE_ZD1211 }, 60 { USB_DEVICE(0x157e, 0x300a), .driver_info = DEVICE_ZD1211 },
60 { USB_DEVICE(0x157e, 0x300b), .driver_info = DEVICE_ZD1211 }, 61 { USB_DEVICE(0x157e, 0x300b), .driver_info = DEVICE_ZD1211 },
61 { USB_DEVICE(0x157e, 0x3204), .driver_info = DEVICE_ZD1211 }, 62 { USB_DEVICE(0x157e, 0x3204), .driver_info = DEVICE_ZD1211 },
63 { USB_DEVICE(0x157e, 0x3207), .driver_info = DEVICE_ZD1211 },
62 { USB_DEVICE(0x1740, 0x2000), .driver_info = DEVICE_ZD1211 }, 64 { USB_DEVICE(0x1740, 0x2000), .driver_info = DEVICE_ZD1211 },
63 { USB_DEVICE(0x6891, 0xa727), .driver_info = DEVICE_ZD1211 }, 65 { USB_DEVICE(0x6891, 0xa727), .driver_info = DEVICE_ZD1211 },
64 /* ZD1211B */ 66 /* ZD1211B */
@@ -92,6 +94,7 @@ static struct usb_device_id usb_ids[] = {
92 { USB_DEVICE(0x157e, 0x300d), .driver_info = DEVICE_ZD1211B }, 94 { USB_DEVICE(0x157e, 0x300d), .driver_info = DEVICE_ZD1211B },
93 { USB_DEVICE(0x1582, 0x6003), .driver_info = DEVICE_ZD1211B }, 95 { USB_DEVICE(0x1582, 0x6003), .driver_info = DEVICE_ZD1211B },
94 { USB_DEVICE(0x2019, 0x5303), .driver_info = DEVICE_ZD1211B }, 96 { USB_DEVICE(0x2019, 0x5303), .driver_info = DEVICE_ZD1211B },
97 { USB_DEVICE(0x2019, 0xed01), .driver_info = DEVICE_ZD1211B },
95 /* "Driverless" devices that need ejecting */ 98 /* "Driverless" devices that need ejecting */
96 { USB_DEVICE(0x0ace, 0x2011), .driver_info = DEVICE_INSTALLER }, 99 { USB_DEVICE(0x0ace, 0x2011), .driver_info = DEVICE_INSTALLER },
97 { USB_DEVICE(0x0ace, 0x20ff), .driver_info = DEVICE_INSTALLER }, 100 { USB_DEVICE(0x0ace, 0x20ff), .driver_info = DEVICE_INSTALLER },
@@ -375,8 +378,10 @@ static inline void handle_regs_int(struct urb *urb)
375 int_num = le16_to_cpu(*(__le16 *)(urb->transfer_buffer+2)); 378 int_num = le16_to_cpu(*(__le16 *)(urb->transfer_buffer+2));
376 if (int_num == CR_INTERRUPT) { 379 if (int_num == CR_INTERRUPT) {
377 struct zd_mac *mac = zd_hw_mac(zd_usb_to_hw(urb->context)); 380 struct zd_mac *mac = zd_hw_mac(zd_usb_to_hw(urb->context));
381 spin_lock(&mac->lock);
378 memcpy(&mac->intr_buffer, urb->transfer_buffer, 382 memcpy(&mac->intr_buffer, urb->transfer_buffer,
379 USB_MAX_EP_INT_BUFFER); 383 USB_MAX_EP_INT_BUFFER);
384 spin_unlock(&mac->lock);
380 schedule_work(&mac->process_intr); 385 schedule_work(&mac->process_intr);
381 } else if (intr->read_regs_enabled) { 386 } else if (intr->read_regs_enabled) {
382 intr->read_regs.length = len = urb->actual_length; 387 intr->read_regs.length = len = urb->actual_length;
@@ -407,8 +412,10 @@ static void int_urb_complete(struct urb *urb)
407 case -ENOENT: 412 case -ENOENT:
408 case -ECONNRESET: 413 case -ECONNRESET:
409 case -EPIPE: 414 case -EPIPE:
410 goto kfree; 415 dev_dbg_f(urb_dev(urb), "urb %p error %d\n", urb, urb->status);
416 return;
411 default: 417 default:
418 dev_dbg_f(urb_dev(urb), "urb %p error %d\n", urb, urb->status);
412 goto resubmit; 419 goto resubmit;
413 } 420 }
414 421
@@ -439,12 +446,11 @@ static void int_urb_complete(struct urb *urb)
439resubmit: 446resubmit:
440 r = usb_submit_urb(urb, GFP_ATOMIC); 447 r = usb_submit_urb(urb, GFP_ATOMIC);
441 if (r) { 448 if (r) {
442 dev_dbg_f(urb_dev(urb), "resubmit urb %p\n", urb); 449 dev_dbg_f(urb_dev(urb), "error: resubmit urb %p err code %d\n",
443 goto kfree; 450 urb, r);
451 /* TODO: add worker to reset intr->urb */
444 } 452 }
445 return; 453 return;
446kfree:
447 kfree(urb->transfer_buffer);
448} 454}
449 455
450static inline int int_urb_interval(struct usb_device *udev) 456static inline int int_urb_interval(struct usb_device *udev)
@@ -475,9 +481,8 @@ static inline int usb_int_enabled(struct zd_usb *usb)
475int zd_usb_enable_int(struct zd_usb *usb) 481int zd_usb_enable_int(struct zd_usb *usb)
476{ 482{
477 int r; 483 int r;
478 struct usb_device *udev; 484 struct usb_device *udev = zd_usb_to_usbdev(usb);
479 struct zd_usb_interrupt *intr = &usb->intr; 485 struct zd_usb_interrupt *intr = &usb->intr;
480 void *transfer_buffer = NULL;
481 struct urb *urb; 486 struct urb *urb;
482 487
483 dev_dbg_f(zd_usb_dev(usb), "\n"); 488 dev_dbg_f(zd_usb_dev(usb), "\n");
@@ -498,20 +503,21 @@ int zd_usb_enable_int(struct zd_usb *usb)
498 intr->urb = urb; 503 intr->urb = urb;
499 spin_unlock_irq(&intr->lock); 504 spin_unlock_irq(&intr->lock);
500 505
501 /* TODO: make it a DMA buffer */
502 r = -ENOMEM; 506 r = -ENOMEM;
503 transfer_buffer = kmalloc(USB_MAX_EP_INT_BUFFER, GFP_KERNEL); 507 intr->buffer = usb_alloc_coherent(udev, USB_MAX_EP_INT_BUFFER,
504 if (!transfer_buffer) { 508 GFP_KERNEL, &intr->buffer_dma);
509 if (!intr->buffer) {
505 dev_dbg_f(zd_usb_dev(usb), 510 dev_dbg_f(zd_usb_dev(usb),
506 "couldn't allocate transfer_buffer\n"); 511 "couldn't allocate transfer_buffer\n");
507 goto error_set_urb_null; 512 goto error_set_urb_null;
508 } 513 }
509 514
510 udev = zd_usb_to_usbdev(usb);
511 usb_fill_int_urb(urb, udev, usb_rcvintpipe(udev, EP_INT_IN), 515 usb_fill_int_urb(urb, udev, usb_rcvintpipe(udev, EP_INT_IN),
512 transfer_buffer, USB_MAX_EP_INT_BUFFER, 516 intr->buffer, USB_MAX_EP_INT_BUFFER,
513 int_urb_complete, usb, 517 int_urb_complete, usb,
514 intr->interval); 518 intr->interval);
519 urb->transfer_dma = intr->buffer_dma;
520 urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
515 521
516 dev_dbg_f(zd_usb_dev(usb), "submit urb %p\n", intr->urb); 522 dev_dbg_f(zd_usb_dev(usb), "submit urb %p\n", intr->urb);
517 r = usb_submit_urb(urb, GFP_KERNEL); 523 r = usb_submit_urb(urb, GFP_KERNEL);
@@ -523,7 +529,8 @@ int zd_usb_enable_int(struct zd_usb *usb)
523 529
524 return 0; 530 return 0;
525error: 531error:
526 kfree(transfer_buffer); 532 usb_free_coherent(udev, USB_MAX_EP_INT_BUFFER,
533 intr->buffer, intr->buffer_dma);
527error_set_urb_null: 534error_set_urb_null:
528 spin_lock_irq(&intr->lock); 535 spin_lock_irq(&intr->lock);
529 intr->urb = NULL; 536 intr->urb = NULL;
@@ -537,8 +544,11 @@ out:
537void zd_usb_disable_int(struct zd_usb *usb) 544void zd_usb_disable_int(struct zd_usb *usb)
538{ 545{
539 unsigned long flags; 546 unsigned long flags;
547 struct usb_device *udev = zd_usb_to_usbdev(usb);
540 struct zd_usb_interrupt *intr = &usb->intr; 548 struct zd_usb_interrupt *intr = &usb->intr;
541 struct urb *urb; 549 struct urb *urb;
550 void *buffer;
551 dma_addr_t buffer_dma;
542 552
543 spin_lock_irqsave(&intr->lock, flags); 553 spin_lock_irqsave(&intr->lock, flags);
544 urb = intr->urb; 554 urb = intr->urb;
@@ -547,11 +557,18 @@ void zd_usb_disable_int(struct zd_usb *usb)
547 return; 557 return;
548 } 558 }
549 intr->urb = NULL; 559 intr->urb = NULL;
560 buffer = intr->buffer;
561 buffer_dma = intr->buffer_dma;
562 intr->buffer = NULL;
550 spin_unlock_irqrestore(&intr->lock, flags); 563 spin_unlock_irqrestore(&intr->lock, flags);
551 564
552 usb_kill_urb(urb); 565 usb_kill_urb(urb);
553 dev_dbg_f(zd_usb_dev(usb), "urb %p killed\n", urb); 566 dev_dbg_f(zd_usb_dev(usb), "urb %p killed\n", urb);
554 usb_free_urb(urb); 567 usb_free_urb(urb);
568
569 if (buffer)
570 usb_free_coherent(udev, USB_MAX_EP_INT_BUFFER,
571 buffer, buffer_dma);
555} 572}
556 573
557static void handle_rx_packet(struct zd_usb *usb, const u8 *buffer, 574static void handle_rx_packet(struct zd_usb *usb, const u8 *buffer,
@@ -599,6 +616,7 @@ static void handle_rx_packet(struct zd_usb *usb, const u8 *buffer,
599 616
600static void rx_urb_complete(struct urb *urb) 617static void rx_urb_complete(struct urb *urb)
601{ 618{
619 int r;
602 struct zd_usb *usb; 620 struct zd_usb *usb;
603 struct zd_usb_rx *rx; 621 struct zd_usb_rx *rx;
604 const u8 *buffer; 622 const u8 *buffer;
@@ -613,6 +631,7 @@ static void rx_urb_complete(struct urb *urb)
613 case -ENOENT: 631 case -ENOENT:
614 case -ECONNRESET: 632 case -ECONNRESET:
615 case -EPIPE: 633 case -EPIPE:
634 dev_dbg_f(urb_dev(urb), "urb %p error %d\n", urb, urb->status);
616 return; 635 return;
617 default: 636 default:
618 dev_dbg_f(urb_dev(urb), "urb %p error %d\n", urb, urb->status); 637 dev_dbg_f(urb_dev(urb), "urb %p error %d\n", urb, urb->status);
@@ -624,6 +643,8 @@ static void rx_urb_complete(struct urb *urb)
624 usb = urb->context; 643 usb = urb->context;
625 rx = &usb->rx; 644 rx = &usb->rx;
626 645
646 tasklet_schedule(&rx->reset_timer_tasklet);
647
627 if (length%rx->usb_packet_size > rx->usb_packet_size-4) { 648 if (length%rx->usb_packet_size > rx->usb_packet_size-4) {
628 /* If there is an old first fragment, we don't care. */ 649 /* If there is an old first fragment, we don't care. */
629 dev_dbg_f(urb_dev(urb), "*** first fragment ***\n"); 650 dev_dbg_f(urb_dev(urb), "*** first fragment ***\n");
@@ -652,7 +673,9 @@ static void rx_urb_complete(struct urb *urb)
652 } 673 }
653 674
654resubmit: 675resubmit:
655 usb_submit_urb(urb, GFP_ATOMIC); 676 r = usb_submit_urb(urb, GFP_ATOMIC);
677 if (r)
678 dev_dbg_f(urb_dev(urb), "urb %p resubmit error %d\n", urb, r);
656} 679}
657 680
658static struct urb *alloc_rx_urb(struct zd_usb *usb) 681static struct urb *alloc_rx_urb(struct zd_usb *usb)
@@ -688,7 +711,7 @@ static void free_rx_urb(struct urb *urb)
688 usb_free_urb(urb); 711 usb_free_urb(urb);
689} 712}
690 713
691int zd_usb_enable_rx(struct zd_usb *usb) 714static int __zd_usb_enable_rx(struct zd_usb *usb)
692{ 715{
693 int i, r; 716 int i, r;
694 struct zd_usb_rx *rx = &usb->rx; 717 struct zd_usb_rx *rx = &usb->rx;
@@ -740,7 +763,21 @@ error:
740 return r; 763 return r;
741} 764}
742 765
743void zd_usb_disable_rx(struct zd_usb *usb) 766int zd_usb_enable_rx(struct zd_usb *usb)
767{
768 int r;
769 struct zd_usb_rx *rx = &usb->rx;
770
771 mutex_lock(&rx->setup_mutex);
772 r = __zd_usb_enable_rx(usb);
773 mutex_unlock(&rx->setup_mutex);
774
775 zd_usb_reset_rx_idle_timer(usb);
776
777 return r;
778}
779
780static void __zd_usb_disable_rx(struct zd_usb *usb)
744{ 781{
745 int i; 782 int i;
746 unsigned long flags; 783 unsigned long flags;
@@ -767,6 +804,41 @@ void zd_usb_disable_rx(struct zd_usb *usb)
767 spin_unlock_irqrestore(&rx->lock, flags); 804 spin_unlock_irqrestore(&rx->lock, flags);
768} 805}
769 806
807void zd_usb_disable_rx(struct zd_usb *usb)
808{
809 struct zd_usb_rx *rx = &usb->rx;
810
811 mutex_lock(&rx->setup_mutex);
812 __zd_usb_disable_rx(usb);
813 mutex_unlock(&rx->setup_mutex);
814
815 tasklet_kill(&rx->reset_timer_tasklet);
816 cancel_delayed_work_sync(&rx->idle_work);
817}
818
819static void zd_usb_reset_rx(struct zd_usb *usb)
820{
821 bool do_reset;
822 struct zd_usb_rx *rx = &usb->rx;
823 unsigned long flags;
824
825 mutex_lock(&rx->setup_mutex);
826
827 spin_lock_irqsave(&rx->lock, flags);
828 do_reset = rx->urbs != NULL;
829 spin_unlock_irqrestore(&rx->lock, flags);
830
831 if (do_reset) {
832 __zd_usb_disable_rx(usb);
833 __zd_usb_enable_rx(usb);
834 }
835
836 mutex_unlock(&rx->setup_mutex);
837
838 if (do_reset)
839 zd_usb_reset_rx_idle_timer(usb);
840}
841
770/** 842/**
771 * zd_usb_disable_tx - disable transmission 843 * zd_usb_disable_tx - disable transmission
772 * @usb: the zd1211rw-private USB structure 844 * @usb: the zd1211rw-private USB structure
@@ -777,19 +849,21 @@ void zd_usb_disable_tx(struct zd_usb *usb)
777{ 849{
778 struct zd_usb_tx *tx = &usb->tx; 850 struct zd_usb_tx *tx = &usb->tx;
779 unsigned long flags; 851 unsigned long flags;
780 struct list_head *pos, *n; 852
853 atomic_set(&tx->enabled, 0);
854
855 /* kill all submitted tx-urbs */
856 usb_kill_anchored_urbs(&tx->submitted);
781 857
782 spin_lock_irqsave(&tx->lock, flags); 858 spin_lock_irqsave(&tx->lock, flags);
783 list_for_each_safe(pos, n, &tx->free_urb_list) { 859 WARN_ON(!skb_queue_empty(&tx->submitted_skbs));
784 list_del(pos); 860 WARN_ON(tx->submitted_urbs != 0);
785 usb_free_urb(list_entry(pos, struct urb, urb_list));
786 }
787 tx->enabled = 0;
788 tx->submitted_urbs = 0; 861 tx->submitted_urbs = 0;
862 spin_unlock_irqrestore(&tx->lock, flags);
863
789 /* The stopped state is ignored, relying on ieee80211_wake_queues() 864 /* The stopped state is ignored, relying on ieee80211_wake_queues()
790 * in a potentionally following zd_usb_enable_tx(). 865 * in a potentionally following zd_usb_enable_tx().
791 */ 866 */
792 spin_unlock_irqrestore(&tx->lock, flags);
793} 867}
794 868
795/** 869/**
@@ -805,63 +879,13 @@ void zd_usb_enable_tx(struct zd_usb *usb)
805 struct zd_usb_tx *tx = &usb->tx; 879 struct zd_usb_tx *tx = &usb->tx;
806 880
807 spin_lock_irqsave(&tx->lock, flags); 881 spin_lock_irqsave(&tx->lock, flags);
808 tx->enabled = 1; 882 atomic_set(&tx->enabled, 1);
809 tx->submitted_urbs = 0; 883 tx->submitted_urbs = 0;
810 ieee80211_wake_queues(zd_usb_to_hw(usb)); 884 ieee80211_wake_queues(zd_usb_to_hw(usb));
811 tx->stopped = 0; 885 tx->stopped = 0;
812 spin_unlock_irqrestore(&tx->lock, flags); 886 spin_unlock_irqrestore(&tx->lock, flags);
813} 887}
814 888
815/**
816 * alloc_tx_urb - provides an tx URB
817 * @usb: a &struct zd_usb pointer
818 *
819 * Allocates a new URB. If possible takes the urb from the free list in
820 * usb->tx.
821 */
822static struct urb *alloc_tx_urb(struct zd_usb *usb)
823{
824 struct zd_usb_tx *tx = &usb->tx;
825 unsigned long flags;
826 struct list_head *entry;
827 struct urb *urb;
828
829 spin_lock_irqsave(&tx->lock, flags);
830 if (list_empty(&tx->free_urb_list)) {
831 urb = usb_alloc_urb(0, GFP_ATOMIC);
832 goto out;
833 }
834 entry = tx->free_urb_list.next;
835 list_del(entry);
836 urb = list_entry(entry, struct urb, urb_list);
837out:
838 spin_unlock_irqrestore(&tx->lock, flags);
839 return urb;
840}
841
842/**
843 * free_tx_urb - frees a used tx URB
844 * @usb: a &struct zd_usb pointer
845 * @urb: URB to be freed
846 *
847 * Frees the transmission URB, which means to put it on the free URB
848 * list.
849 */
850static void free_tx_urb(struct zd_usb *usb, struct urb *urb)
851{
852 struct zd_usb_tx *tx = &usb->tx;
853 unsigned long flags;
854
855 spin_lock_irqsave(&tx->lock, flags);
856 if (!tx->enabled) {
857 usb_free_urb(urb);
858 goto out;
859 }
860 list_add(&urb->urb_list, &tx->free_urb_list);
861out:
862 spin_unlock_irqrestore(&tx->lock, flags);
863}
864
865static void tx_dec_submitted_urbs(struct zd_usb *usb) 889static void tx_dec_submitted_urbs(struct zd_usb *usb)
866{ 890{
867 struct zd_usb_tx *tx = &usb->tx; 891 struct zd_usb_tx *tx = &usb->tx;
@@ -903,6 +927,16 @@ static void tx_urb_complete(struct urb *urb)
903 struct sk_buff *skb; 927 struct sk_buff *skb;
904 struct ieee80211_tx_info *info; 928 struct ieee80211_tx_info *info;
905 struct zd_usb *usb; 929 struct zd_usb *usb;
930 struct zd_usb_tx *tx;
931
932 skb = (struct sk_buff *)urb->context;
933 info = IEEE80211_SKB_CB(skb);
934 /*
935 * grab 'usb' pointer before handing off the skb (since
936 * it might be freed by zd_mac_tx_to_dev or mac80211)
937 */
938 usb = &zd_hw_mac(info->rate_driver_data[0])->chip.usb;
939 tx = &usb->tx;
906 940
907 switch (urb->status) { 941 switch (urb->status) {
908 case 0: 942 case 0:
@@ -920,20 +954,16 @@ static void tx_urb_complete(struct urb *urb)
920 goto resubmit; 954 goto resubmit;
921 } 955 }
922free_urb: 956free_urb:
923 skb = (struct sk_buff *)urb->context; 957 skb_unlink(skb, &usb->tx.submitted_skbs);
924 /*
925 * grab 'usb' pointer before handing off the skb (since
926 * it might be freed by zd_mac_tx_to_dev or mac80211)
927 */
928 info = IEEE80211_SKB_CB(skb);
929 usb = &zd_hw_mac(info->rate_driver_data[0])->chip.usb;
930 zd_mac_tx_to_dev(skb, urb->status); 958 zd_mac_tx_to_dev(skb, urb->status);
931 free_tx_urb(usb, urb); 959 usb_free_urb(urb);
932 tx_dec_submitted_urbs(usb); 960 tx_dec_submitted_urbs(usb);
933 return; 961 return;
934resubmit: 962resubmit:
963 usb_anchor_urb(urb, &tx->submitted);
935 r = usb_submit_urb(urb, GFP_ATOMIC); 964 r = usb_submit_urb(urb, GFP_ATOMIC);
936 if (r) { 965 if (r) {
966 usb_unanchor_urb(urb);
937 dev_dbg_f(urb_dev(urb), "error resubmit urb %p %d\n", urb, r); 967 dev_dbg_f(urb_dev(urb), "error resubmit urb %p %d\n", urb, r);
938 goto free_urb; 968 goto free_urb;
939 } 969 }
@@ -954,10 +984,17 @@ resubmit:
954int zd_usb_tx(struct zd_usb *usb, struct sk_buff *skb) 984int zd_usb_tx(struct zd_usb *usb, struct sk_buff *skb)
955{ 985{
956 int r; 986 int r;
987 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
957 struct usb_device *udev = zd_usb_to_usbdev(usb); 988 struct usb_device *udev = zd_usb_to_usbdev(usb);
958 struct urb *urb; 989 struct urb *urb;
990 struct zd_usb_tx *tx = &usb->tx;
991
992 if (!atomic_read(&tx->enabled)) {
993 r = -ENOENT;
994 goto out;
995 }
959 996
960 urb = alloc_tx_urb(usb); 997 urb = usb_alloc_urb(0, GFP_ATOMIC);
961 if (!urb) { 998 if (!urb) {
962 r = -ENOMEM; 999 r = -ENOMEM;
963 goto out; 1000 goto out;
@@ -966,17 +1003,125 @@ int zd_usb_tx(struct zd_usb *usb, struct sk_buff *skb)
966 usb_fill_bulk_urb(urb, udev, usb_sndbulkpipe(udev, EP_DATA_OUT), 1003 usb_fill_bulk_urb(urb, udev, usb_sndbulkpipe(udev, EP_DATA_OUT),
967 skb->data, skb->len, tx_urb_complete, skb); 1004 skb->data, skb->len, tx_urb_complete, skb);
968 1005
1006 info->rate_driver_data[1] = (void *)jiffies;
1007 skb_queue_tail(&tx->submitted_skbs, skb);
1008 usb_anchor_urb(urb, &tx->submitted);
1009
969 r = usb_submit_urb(urb, GFP_ATOMIC); 1010 r = usb_submit_urb(urb, GFP_ATOMIC);
970 if (r) 1011 if (r) {
1012 dev_dbg_f(zd_usb_dev(usb), "error submit urb %p %d\n", urb, r);
1013 usb_unanchor_urb(urb);
1014 skb_unlink(skb, &tx->submitted_skbs);
971 goto error; 1015 goto error;
1016 }
972 tx_inc_submitted_urbs(usb); 1017 tx_inc_submitted_urbs(usb);
973 return 0; 1018 return 0;
974error: 1019error:
975 free_tx_urb(usb, urb); 1020 usb_free_urb(urb);
976out: 1021out:
977 return r; 1022 return r;
978} 1023}
979 1024
1025static bool zd_tx_timeout(struct zd_usb *usb)
1026{
1027 struct zd_usb_tx *tx = &usb->tx;
1028 struct sk_buff_head *q = &tx->submitted_skbs;
1029 struct sk_buff *skb, *skbnext;
1030 struct ieee80211_tx_info *info;
1031 unsigned long flags, trans_start;
1032 bool have_timedout = false;
1033
1034 spin_lock_irqsave(&q->lock, flags);
1035 skb_queue_walk_safe(q, skb, skbnext) {
1036 info = IEEE80211_SKB_CB(skb);
1037 trans_start = (unsigned long)info->rate_driver_data[1];
1038
1039 if (time_is_before_jiffies(trans_start + ZD_TX_TIMEOUT)) {
1040 have_timedout = true;
1041 break;
1042 }
1043 }
1044 spin_unlock_irqrestore(&q->lock, flags);
1045
1046 return have_timedout;
1047}
1048
1049static void zd_tx_watchdog_handler(struct work_struct *work)
1050{
1051 struct zd_usb *usb =
1052 container_of(work, struct zd_usb, tx.watchdog_work.work);
1053 struct zd_usb_tx *tx = &usb->tx;
1054
1055 if (!atomic_read(&tx->enabled) || !tx->watchdog_enabled)
1056 goto out;
1057 if (!zd_tx_timeout(usb))
1058 goto out;
1059
1060 /* TX halted, try reset */
1061 dev_warn(zd_usb_dev(usb), "TX-stall detected, reseting device...");
1062
1063 usb_queue_reset_device(usb->intf);
1064
1065 /* reset will stop this worker, don't rearm */
1066 return;
1067out:
1068 queue_delayed_work(zd_workqueue, &tx->watchdog_work,
1069 ZD_TX_WATCHDOG_INTERVAL);
1070}
1071
1072void zd_tx_watchdog_enable(struct zd_usb *usb)
1073{
1074 struct zd_usb_tx *tx = &usb->tx;
1075
1076 if (!tx->watchdog_enabled) {
1077 dev_dbg_f(zd_usb_dev(usb), "\n");
1078 queue_delayed_work(zd_workqueue, &tx->watchdog_work,
1079 ZD_TX_WATCHDOG_INTERVAL);
1080 tx->watchdog_enabled = 1;
1081 }
1082}
1083
1084void zd_tx_watchdog_disable(struct zd_usb *usb)
1085{
1086 struct zd_usb_tx *tx = &usb->tx;
1087
1088 if (tx->watchdog_enabled) {
1089 dev_dbg_f(zd_usb_dev(usb), "\n");
1090 tx->watchdog_enabled = 0;
1091 cancel_delayed_work_sync(&tx->watchdog_work);
1092 }
1093}
1094
1095static void zd_rx_idle_timer_handler(struct work_struct *work)
1096{
1097 struct zd_usb *usb =
1098 container_of(work, struct zd_usb, rx.idle_work.work);
1099 struct zd_mac *mac = zd_usb_to_mac(usb);
1100
1101 if (!test_bit(ZD_DEVICE_RUNNING, &mac->flags))
1102 return;
1103
1104 dev_dbg_f(zd_usb_dev(usb), "\n");
1105
1106 /* 30 seconds since last rx, reset rx */
1107 zd_usb_reset_rx(usb);
1108}
1109
1110static void zd_usb_reset_rx_idle_timer_tasklet(unsigned long param)
1111{
1112 struct zd_usb *usb = (struct zd_usb *)param;
1113
1114 zd_usb_reset_rx_idle_timer(usb);
1115}
1116
1117void zd_usb_reset_rx_idle_timer(struct zd_usb *usb)
1118{
1119 struct zd_usb_rx *rx = &usb->rx;
1120
1121 cancel_delayed_work(&rx->idle_work);
1122 queue_delayed_work(zd_workqueue, &rx->idle_work, ZD_RX_IDLE_INTERVAL);
1123}
1124
980static inline void init_usb_interrupt(struct zd_usb *usb) 1125static inline void init_usb_interrupt(struct zd_usb *usb)
981{ 1126{
982 struct zd_usb_interrupt *intr = &usb->intr; 1127 struct zd_usb_interrupt *intr = &usb->intr;
@@ -990,23 +1135,32 @@ static inline void init_usb_interrupt(struct zd_usb *usb)
990static inline void init_usb_rx(struct zd_usb *usb) 1135static inline void init_usb_rx(struct zd_usb *usb)
991{ 1136{
992 struct zd_usb_rx *rx = &usb->rx; 1137 struct zd_usb_rx *rx = &usb->rx;
1138
993 spin_lock_init(&rx->lock); 1139 spin_lock_init(&rx->lock);
1140 mutex_init(&rx->setup_mutex);
994 if (interface_to_usbdev(usb->intf)->speed == USB_SPEED_HIGH) { 1141 if (interface_to_usbdev(usb->intf)->speed == USB_SPEED_HIGH) {
995 rx->usb_packet_size = 512; 1142 rx->usb_packet_size = 512;
996 } else { 1143 } else {
997 rx->usb_packet_size = 64; 1144 rx->usb_packet_size = 64;
998 } 1145 }
999 ZD_ASSERT(rx->fragment_length == 0); 1146 ZD_ASSERT(rx->fragment_length == 0);
1147 INIT_DELAYED_WORK(&rx->idle_work, zd_rx_idle_timer_handler);
1148 rx->reset_timer_tasklet.func = zd_usb_reset_rx_idle_timer_tasklet;
1149 rx->reset_timer_tasklet.data = (unsigned long)usb;
1000} 1150}
1001 1151
1002static inline void init_usb_tx(struct zd_usb *usb) 1152static inline void init_usb_tx(struct zd_usb *usb)
1003{ 1153{
1004 struct zd_usb_tx *tx = &usb->tx; 1154 struct zd_usb_tx *tx = &usb->tx;
1155
1005 spin_lock_init(&tx->lock); 1156 spin_lock_init(&tx->lock);
1006 tx->enabled = 0; 1157 atomic_set(&tx->enabled, 0);
1007 tx->stopped = 0; 1158 tx->stopped = 0;
1008 INIT_LIST_HEAD(&tx->free_urb_list); 1159 skb_queue_head_init(&tx->submitted_skbs);
1160 init_usb_anchor(&tx->submitted);
1009 tx->submitted_urbs = 0; 1161 tx->submitted_urbs = 0;
1162 tx->watchdog_enabled = 0;
1163 INIT_DELAYED_WORK(&tx->watchdog_work, zd_tx_watchdog_handler);
1010} 1164}
1011 1165
1012void zd_usb_init(struct zd_usb *usb, struct ieee80211_hw *hw, 1166void zd_usb_init(struct zd_usb *usb, struct ieee80211_hw *hw,
@@ -1015,6 +1169,7 @@ void zd_usb_init(struct zd_usb *usb, struct ieee80211_hw *hw,
1015 memset(usb, 0, sizeof(*usb)); 1169 memset(usb, 0, sizeof(*usb));
1016 usb->intf = usb_get_intf(intf); 1170 usb->intf = usb_get_intf(intf);
1017 usb_set_intfdata(usb->intf, hw); 1171 usb_set_intfdata(usb->intf, hw);
1172 init_usb_anchor(&usb->submitted_cmds);
1018 init_usb_interrupt(usb); 1173 init_usb_interrupt(usb);
1019 init_usb_tx(usb); 1174 init_usb_tx(usb);
1020 init_usb_rx(usb); 1175 init_usb_rx(usb);
@@ -1238,6 +1393,7 @@ static void disconnect(struct usb_interface *intf)
1238 ieee80211_unregister_hw(hw); 1393 ieee80211_unregister_hw(hw);
1239 1394
1240 /* Just in case something has gone wrong! */ 1395 /* Just in case something has gone wrong! */
1396 zd_usb_disable_tx(usb);
1241 zd_usb_disable_rx(usb); 1397 zd_usb_disable_rx(usb);
1242 zd_usb_disable_int(usb); 1398 zd_usb_disable_int(usb);
1243 1399
@@ -1253,11 +1409,92 @@ static void disconnect(struct usb_interface *intf)
1253 dev_dbg(&intf->dev, "disconnected\n"); 1409 dev_dbg(&intf->dev, "disconnected\n");
1254} 1410}
1255 1411
1412static void zd_usb_resume(struct zd_usb *usb)
1413{
1414 struct zd_mac *mac = zd_usb_to_mac(usb);
1415 int r;
1416
1417 dev_dbg_f(zd_usb_dev(usb), "\n");
1418
1419 r = zd_op_start(zd_usb_to_hw(usb));
1420 if (r < 0) {
1421 dev_warn(zd_usb_dev(usb), "Device resume failed "
1422 "with error code %d. Retrying...\n", r);
1423 if (usb->was_running)
1424 set_bit(ZD_DEVICE_RUNNING, &mac->flags);
1425 usb_queue_reset_device(usb->intf);
1426 return;
1427 }
1428
1429 if (mac->type != NL80211_IFTYPE_UNSPECIFIED) {
1430 r = zd_restore_settings(mac);
1431 if (r < 0) {
1432 dev_dbg(zd_usb_dev(usb),
1433 "failed to restore settings, %d\n", r);
1434 return;
1435 }
1436 }
1437}
1438
1439static void zd_usb_stop(struct zd_usb *usb)
1440{
1441 dev_dbg_f(zd_usb_dev(usb), "\n");
1442
1443 zd_op_stop(zd_usb_to_hw(usb));
1444
1445 zd_usb_disable_tx(usb);
1446 zd_usb_disable_rx(usb);
1447 zd_usb_disable_int(usb);
1448
1449 usb->initialized = 0;
1450}
1451
1452static int pre_reset(struct usb_interface *intf)
1453{
1454 struct ieee80211_hw *hw = usb_get_intfdata(intf);
1455 struct zd_mac *mac;
1456 struct zd_usb *usb;
1457
1458 if (!hw || intf->condition != USB_INTERFACE_BOUND)
1459 return 0;
1460
1461 mac = zd_hw_mac(hw);
1462 usb = &mac->chip.usb;
1463
1464 usb->was_running = test_bit(ZD_DEVICE_RUNNING, &mac->flags);
1465
1466 zd_usb_stop(usb);
1467
1468 mutex_lock(&mac->chip.mutex);
1469 return 0;
1470}
1471
1472static int post_reset(struct usb_interface *intf)
1473{
1474 struct ieee80211_hw *hw = usb_get_intfdata(intf);
1475 struct zd_mac *mac;
1476 struct zd_usb *usb;
1477
1478 if (!hw || intf->condition != USB_INTERFACE_BOUND)
1479 return 0;
1480
1481 mac = zd_hw_mac(hw);
1482 usb = &mac->chip.usb;
1483
1484 mutex_unlock(&mac->chip.mutex);
1485
1486 if (usb->was_running)
1487 zd_usb_resume(usb);
1488 return 0;
1489}
1490
1256static struct usb_driver driver = { 1491static struct usb_driver driver = {
1257 .name = KBUILD_MODNAME, 1492 .name = KBUILD_MODNAME,
1258 .id_table = usb_ids, 1493 .id_table = usb_ids,
1259 .probe = probe, 1494 .probe = probe,
1260 .disconnect = disconnect, 1495 .disconnect = disconnect,
1496 .pre_reset = pre_reset,
1497 .post_reset = post_reset,
1261}; 1498};
1262 1499
1263struct workqueue_struct *zd_workqueue; 1500struct workqueue_struct *zd_workqueue;
@@ -1296,6 +1533,31 @@ static void __exit usb_exit(void)
1296module_init(usb_init); 1533module_init(usb_init);
1297module_exit(usb_exit); 1534module_exit(usb_exit);
1298 1535
1536static int zd_ep_regs_out_msg(struct usb_device *udev, void *data, int len,
1537 int *actual_length, int timeout)
1538{
1539 /* In USB 2.0 mode EP_REGS_OUT endpoint is interrupt type. However in
1540 * USB 1.1 mode endpoint is bulk. Select correct type URB by endpoint
1541 * descriptor.
1542 */
1543 struct usb_host_endpoint *ep;
1544 unsigned int pipe;
1545
1546 pipe = usb_sndintpipe(udev, EP_REGS_OUT);
1547 ep = usb_pipe_endpoint(udev, pipe);
1548 if (!ep)
1549 return -EINVAL;
1550
1551 if (usb_endpoint_xfer_int(&ep->desc)) {
1552 return usb_interrupt_msg(udev, pipe, data, len,
1553 actual_length, timeout);
1554 } else {
1555 pipe = usb_sndbulkpipe(udev, EP_REGS_OUT);
1556 return usb_bulk_msg(udev, pipe, data, len, actual_length,
1557 timeout);
1558 }
1559}
1560
1299static int usb_int_regs_length(unsigned int count) 1561static int usb_int_regs_length(unsigned int count)
1300{ 1562{
1301 return sizeof(struct usb_int_regs) + count * sizeof(struct reg_data); 1563 return sizeof(struct usb_int_regs) + count * sizeof(struct reg_data);
@@ -1391,30 +1653,34 @@ int zd_usb_ioread16v(struct zd_usb *usb, u16 *values,
1391 return -EWOULDBLOCK; 1653 return -EWOULDBLOCK;
1392 } 1654 }
1393 if (!usb_int_enabled(usb)) { 1655 if (!usb_int_enabled(usb)) {
1394 dev_dbg_f(zd_usb_dev(usb), 1656 dev_dbg_f(zd_usb_dev(usb),
1395 "error: usb interrupt not enabled\n"); 1657 "error: usb interrupt not enabled\n");
1396 return -EWOULDBLOCK; 1658 return -EWOULDBLOCK;
1397 } 1659 }
1398 1660
1661 ZD_ASSERT(mutex_is_locked(&zd_usb_to_chip(usb)->mutex));
1662 BUILD_BUG_ON(sizeof(struct usb_req_read_regs) + USB_MAX_IOREAD16_COUNT *
1663 sizeof(__le16) > sizeof(usb->req_buf));
1664 BUG_ON(sizeof(struct usb_req_read_regs) + count * sizeof(__le16) >
1665 sizeof(usb->req_buf));
1666
1399 req_len = sizeof(struct usb_req_read_regs) + count * sizeof(__le16); 1667 req_len = sizeof(struct usb_req_read_regs) + count * sizeof(__le16);
1400 req = kmalloc(req_len, GFP_KERNEL); 1668 req = (void *)usb->req_buf;
1401 if (!req) 1669
1402 return -ENOMEM;
1403 req->id = cpu_to_le16(USB_REQ_READ_REGS); 1670 req->id = cpu_to_le16(USB_REQ_READ_REGS);
1404 for (i = 0; i < count; i++) 1671 for (i = 0; i < count; i++)
1405 req->addr[i] = cpu_to_le16((u16)addresses[i]); 1672 req->addr[i] = cpu_to_le16((u16)addresses[i]);
1406 1673
1407 udev = zd_usb_to_usbdev(usb); 1674 udev = zd_usb_to_usbdev(usb);
1408 prepare_read_regs_int(usb); 1675 prepare_read_regs_int(usb);
1409 r = usb_bulk_msg(udev, usb_sndbulkpipe(udev, EP_REGS_OUT), 1676 r = zd_ep_regs_out_msg(udev, req, req_len, &actual_req_len, 50 /*ms*/);
1410 req, req_len, &actual_req_len, 1000 /* ms */);
1411 if (r) { 1677 if (r) {
1412 dev_dbg_f(zd_usb_dev(usb), 1678 dev_dbg_f(zd_usb_dev(usb),
1413 "error in usb_bulk_msg(). Error number %d\n", r); 1679 "error in zd_ep_regs_out_msg(). Error number %d\n", r);
1414 goto error; 1680 goto error;
1415 } 1681 }
1416 if (req_len != actual_req_len) { 1682 if (req_len != actual_req_len) {
1417 dev_dbg_f(zd_usb_dev(usb), "error in usb_bulk_msg()\n" 1683 dev_dbg_f(zd_usb_dev(usb), "error in zd_ep_regs_out_msg()\n"
1418 " req_len %d != actual_req_len %d\n", 1684 " req_len %d != actual_req_len %d\n",
1419 req_len, actual_req_len); 1685 req_len, actual_req_len);
1420 r = -EIO; 1686 r = -EIO;
@@ -1422,7 +1688,7 @@ int zd_usb_ioread16v(struct zd_usb *usb, u16 *values,
1422 } 1688 }
1423 1689
1424 timeout = wait_for_completion_timeout(&usb->intr.read_regs.completion, 1690 timeout = wait_for_completion_timeout(&usb->intr.read_regs.completion,
1425 msecs_to_jiffies(1000)); 1691 msecs_to_jiffies(50));
1426 if (!timeout) { 1692 if (!timeout) {
1427 disable_read_regs_int(usb); 1693 disable_read_regs_int(usb);
1428 dev_dbg_f(zd_usb_dev(usb), "read timed out\n"); 1694 dev_dbg_f(zd_usb_dev(usb), "read timed out\n");
@@ -1432,17 +1698,110 @@ int zd_usb_ioread16v(struct zd_usb *usb, u16 *values,
1432 1698
1433 r = get_results(usb, values, req, count); 1699 r = get_results(usb, values, req, count);
1434error: 1700error:
1435 kfree(req);
1436 return r; 1701 return r;
1437} 1702}
1438 1703
1439int zd_usb_iowrite16v(struct zd_usb *usb, const struct zd_ioreq16 *ioreqs, 1704static void iowrite16v_urb_complete(struct urb *urb)
1440 unsigned int count) 1705{
1706 struct zd_usb *usb = urb->context;
1707
1708 if (urb->status && !usb->cmd_error)
1709 usb->cmd_error = urb->status;
1710
1711 if (!usb->cmd_error &&
1712 urb->actual_length != urb->transfer_buffer_length)
1713 usb->cmd_error = -EIO;
1714}
1715
1716static int zd_submit_waiting_urb(struct zd_usb *usb, bool last)
1717{
1718 int r = 0;
1719 struct urb *urb = usb->urb_async_waiting;
1720
1721 if (!urb)
1722 return 0;
1723
1724 usb->urb_async_waiting = NULL;
1725
1726 if (!last)
1727 urb->transfer_flags |= URB_NO_INTERRUPT;
1728
1729 usb_anchor_urb(urb, &usb->submitted_cmds);
1730 r = usb_submit_urb(urb, GFP_KERNEL);
1731 if (r) {
1732 usb_unanchor_urb(urb);
1733 dev_dbg_f(zd_usb_dev(usb),
1734 "error in usb_submit_urb(). Error number %d\n", r);
1735 goto error;
1736 }
1737
1738 /* fall-through with r == 0 */
1739error:
1740 usb_free_urb(urb);
1741 return r;
1742}
1743
1744void zd_usb_iowrite16v_async_start(struct zd_usb *usb)
1745{
1746 ZD_ASSERT(usb_anchor_empty(&usb->submitted_cmds));
1747 ZD_ASSERT(usb->urb_async_waiting == NULL);
1748 ZD_ASSERT(!usb->in_async);
1749
1750 ZD_ASSERT(mutex_is_locked(&zd_usb_to_chip(usb)->mutex));
1751
1752 usb->in_async = 1;
1753 usb->cmd_error = 0;
1754 usb->urb_async_waiting = NULL;
1755}
1756
1757int zd_usb_iowrite16v_async_end(struct zd_usb *usb, unsigned int timeout)
1758{
1759 int r;
1760
1761 ZD_ASSERT(mutex_is_locked(&zd_usb_to_chip(usb)->mutex));
1762 ZD_ASSERT(usb->in_async);
1763
1764 /* Submit last iowrite16v URB */
1765 r = zd_submit_waiting_urb(usb, true);
1766 if (r) {
1767 dev_dbg_f(zd_usb_dev(usb),
1768 "error in zd_submit_waiting_usb(). "
1769 "Error number %d\n", r);
1770
1771 usb_kill_anchored_urbs(&usb->submitted_cmds);
1772 goto error;
1773 }
1774
1775 if (timeout)
1776 timeout = usb_wait_anchor_empty_timeout(&usb->submitted_cmds,
1777 timeout);
1778 if (!timeout) {
1779 usb_kill_anchored_urbs(&usb->submitted_cmds);
1780 if (usb->cmd_error == -ENOENT) {
1781 dev_dbg_f(zd_usb_dev(usb), "timed out");
1782 r = -ETIMEDOUT;
1783 goto error;
1784 }
1785 }
1786
1787 r = usb->cmd_error;
1788error:
1789 usb->in_async = 0;
1790 return r;
1791}
1792
1793int zd_usb_iowrite16v_async(struct zd_usb *usb, const struct zd_ioreq16 *ioreqs,
1794 unsigned int count)
1441{ 1795{
1442 int r; 1796 int r;
1443 struct usb_device *udev; 1797 struct usb_device *udev;
1444 struct usb_req_write_regs *req = NULL; 1798 struct usb_req_write_regs *req = NULL;
1445 int i, req_len, actual_req_len; 1799 int i, req_len;
1800 struct urb *urb;
1801 struct usb_host_endpoint *ep;
1802
1803 ZD_ASSERT(mutex_is_locked(&zd_usb_to_chip(usb)->mutex));
1804 ZD_ASSERT(usb->in_async);
1446 1805
1447 if (count == 0) 1806 if (count == 0)
1448 return 0; 1807 return 0;
@@ -1458,11 +1817,23 @@ int zd_usb_iowrite16v(struct zd_usb *usb, const struct zd_ioreq16 *ioreqs,
1458 return -EWOULDBLOCK; 1817 return -EWOULDBLOCK;
1459 } 1818 }
1460 1819
1820 udev = zd_usb_to_usbdev(usb);
1821
1822 ep = usb_pipe_endpoint(udev, usb_sndintpipe(udev, EP_REGS_OUT));
1823 if (!ep)
1824 return -ENOENT;
1825
1826 urb = usb_alloc_urb(0, GFP_KERNEL);
1827 if (!urb)
1828 return -ENOMEM;
1829
1461 req_len = sizeof(struct usb_req_write_regs) + 1830 req_len = sizeof(struct usb_req_write_regs) +
1462 count * sizeof(struct reg_data); 1831 count * sizeof(struct reg_data);
1463 req = kmalloc(req_len, GFP_KERNEL); 1832 req = kmalloc(req_len, GFP_KERNEL);
1464 if (!req) 1833 if (!req) {
1465 return -ENOMEM; 1834 r = -ENOMEM;
1835 goto error;
1836 }
1466 1837
1467 req->id = cpu_to_le16(USB_REQ_WRITE_REGS); 1838 req->id = cpu_to_le16(USB_REQ_WRITE_REGS);
1468 for (i = 0; i < count; i++) { 1839 for (i = 0; i < count; i++) {
@@ -1471,29 +1842,52 @@ int zd_usb_iowrite16v(struct zd_usb *usb, const struct zd_ioreq16 *ioreqs,
1471 rw->value = cpu_to_le16(ioreqs[i].value); 1842 rw->value = cpu_to_le16(ioreqs[i].value);
1472 } 1843 }
1473 1844
1474 udev = zd_usb_to_usbdev(usb); 1845 /* In USB 2.0 mode endpoint is interrupt type. However in USB 1.1 mode
1475 r = usb_bulk_msg(udev, usb_sndbulkpipe(udev, EP_REGS_OUT), 1846 * endpoint is bulk. Select correct type URB by endpoint descriptor.
1476 req, req_len, &actual_req_len, 1000 /* ms */); 1847 */
1848 if (usb_endpoint_xfer_int(&ep->desc))
1849 usb_fill_int_urb(urb, udev, usb_sndintpipe(udev, EP_REGS_OUT),
1850 req, req_len, iowrite16v_urb_complete, usb,
1851 ep->desc.bInterval);
1852 else
1853 usb_fill_bulk_urb(urb, udev, usb_sndbulkpipe(udev, EP_REGS_OUT),
1854 req, req_len, iowrite16v_urb_complete, usb);
1855
1856 urb->transfer_flags |= URB_FREE_BUFFER;
1857
1858 /* Submit previous URB */
1859 r = zd_submit_waiting_urb(usb, false);
1477 if (r) { 1860 if (r) {
1478 dev_dbg_f(zd_usb_dev(usb), 1861 dev_dbg_f(zd_usb_dev(usb),
1479 "error in usb_bulk_msg(). Error number %d\n", r); 1862 "error in zd_submit_waiting_usb(). "
1480 goto error; 1863 "Error number %d\n", r);
1481 }
1482 if (req_len != actual_req_len) {
1483 dev_dbg_f(zd_usb_dev(usb),
1484 "error in usb_bulk_msg()"
1485 " req_len %d != actual_req_len %d\n",
1486 req_len, actual_req_len);
1487 r = -EIO;
1488 goto error; 1864 goto error;
1489 } 1865 }
1490 1866
1491 /* FALL-THROUGH with r == 0 */ 1867 /* Delay submit so that URB_NO_INTERRUPT flag can be set for all URBs
1868 * of currect batch except for very last.
1869 */
1870 usb->urb_async_waiting = urb;
1871 return 0;
1492error: 1872error:
1493 kfree(req); 1873 usb_free_urb(urb);
1494 return r; 1874 return r;
1495} 1875}
1496 1876
1877int zd_usb_iowrite16v(struct zd_usb *usb, const struct zd_ioreq16 *ioreqs,
1878 unsigned int count)
1879{
1880 int r;
1881
1882 zd_usb_iowrite16v_async_start(usb);
1883 r = zd_usb_iowrite16v_async(usb, ioreqs, count);
1884 if (r) {
1885 zd_usb_iowrite16v_async_end(usb, 0);
1886 return r;
1887 }
1888 return zd_usb_iowrite16v_async_end(usb, 50 /* ms */);
1889}
1890
1497int zd_usb_rfwrite(struct zd_usb *usb, u32 value, u8 bits) 1891int zd_usb_rfwrite(struct zd_usb *usb, u32 value, u8 bits)
1498{ 1892{
1499 int r; 1893 int r;
@@ -1531,18 +1925,23 @@ int zd_usb_rfwrite(struct zd_usb *usb, u32 value, u8 bits)
1531 1925
1532 dev_dbg_f(zd_usb_dev(usb), "value %#09x bits %d\n", value, bits); 1926 dev_dbg_f(zd_usb_dev(usb), "value %#09x bits %d\n", value, bits);
1533 1927
1534 r = zd_usb_ioread16(usb, &bit_value_template, CR203); 1928 r = zd_usb_ioread16(usb, &bit_value_template, ZD_CR203);
1535 if (r) { 1929 if (r) {
1536 dev_dbg_f(zd_usb_dev(usb), 1930 dev_dbg_f(zd_usb_dev(usb),
1537 "error %d: Couldn't read CR203\n", r); 1931 "error %d: Couldn't read ZD_CR203\n", r);
1538 goto out; 1932 return r;
1539 } 1933 }
1540 bit_value_template &= ~(RF_IF_LE|RF_CLK|RF_DATA); 1934 bit_value_template &= ~(RF_IF_LE|RF_CLK|RF_DATA);
1541 1935
1936 ZD_ASSERT(mutex_is_locked(&zd_usb_to_chip(usb)->mutex));
1937 BUILD_BUG_ON(sizeof(struct usb_req_rfwrite) +
1938 USB_MAX_RFWRITE_BIT_COUNT * sizeof(__le16) >
1939 sizeof(usb->req_buf));
1940 BUG_ON(sizeof(struct usb_req_rfwrite) + bits * sizeof(__le16) >
1941 sizeof(usb->req_buf));
1942
1542 req_len = sizeof(struct usb_req_rfwrite) + bits * sizeof(__le16); 1943 req_len = sizeof(struct usb_req_rfwrite) + bits * sizeof(__le16);
1543 req = kmalloc(req_len, GFP_KERNEL); 1944 req = (void *)usb->req_buf;
1544 if (!req)
1545 return -ENOMEM;
1546 1945
1547 req->id = cpu_to_le16(USB_REQ_WRITE_RF); 1946 req->id = cpu_to_le16(USB_REQ_WRITE_RF);
1548 /* 1: 3683a, but not used in ZYDAS driver */ 1947 /* 1: 3683a, but not used in ZYDAS driver */
@@ -1557,15 +1956,14 @@ int zd_usb_rfwrite(struct zd_usb *usb, u32 value, u8 bits)
1557 } 1956 }
1558 1957
1559 udev = zd_usb_to_usbdev(usb); 1958 udev = zd_usb_to_usbdev(usb);
1560 r = usb_bulk_msg(udev, usb_sndbulkpipe(udev, EP_REGS_OUT), 1959 r = zd_ep_regs_out_msg(udev, req, req_len, &actual_req_len, 50 /*ms*/);
1561 req, req_len, &actual_req_len, 1000 /* ms */);
1562 if (r) { 1960 if (r) {
1563 dev_dbg_f(zd_usb_dev(usb), 1961 dev_dbg_f(zd_usb_dev(usb),
1564 "error in usb_bulk_msg(). Error number %d\n", r); 1962 "error in zd_ep_regs_out_msg(). Error number %d\n", r);
1565 goto out; 1963 goto out;
1566 } 1964 }
1567 if (req_len != actual_req_len) { 1965 if (req_len != actual_req_len) {
1568 dev_dbg_f(zd_usb_dev(usb), "error in usb_bulk_msg()" 1966 dev_dbg_f(zd_usb_dev(usb), "error in zd_ep_regs_out_msg()"
1569 " req_len %d != actual_req_len %d\n", 1967 " req_len %d != actual_req_len %d\n",
1570 req_len, actual_req_len); 1968 req_len, actual_req_len);
1571 r = -EIO; 1969 r = -EIO;
@@ -1574,6 +1972,5 @@ int zd_usb_rfwrite(struct zd_usb *usb, u32 value, u8 bits)
1574 1972
1575 /* FALL-THROUGH with r == 0 */ 1973 /* FALL-THROUGH with r == 0 */
1576out: 1974out:
1577 kfree(req);
1578 return r; 1975 return r;
1579} 1976}
diff --git a/drivers/net/wireless/zd1211rw/zd_usb.h b/drivers/net/wireless/zd1211rw/zd_usb.h
index 1b1655cb7cb4..bf942843b733 100644
--- a/drivers/net/wireless/zd1211rw/zd_usb.h
+++ b/drivers/net/wireless/zd1211rw/zd_usb.h
@@ -32,6 +32,10 @@
32#define ZD_USB_TX_HIGH 5 32#define ZD_USB_TX_HIGH 5
33#define ZD_USB_TX_LOW 2 33#define ZD_USB_TX_LOW 2
34 34
35#define ZD_TX_TIMEOUT (HZ * 5)
36#define ZD_TX_WATCHDOG_INTERVAL round_jiffies_relative(HZ)
37#define ZD_RX_IDLE_INTERVAL round_jiffies_relative(30 * HZ)
38
35enum devicetype { 39enum devicetype {
36 DEVICE_ZD1211 = 0, 40 DEVICE_ZD1211 = 0,
37 DEVICE_ZD1211B = 1, 41 DEVICE_ZD1211B = 1,
@@ -105,7 +109,7 @@ struct usb_req_rfwrite {
105 __le16 bits; 109 __le16 bits;
106 /* RF2595: 24 */ 110 /* RF2595: 24 */
107 __le16 bit_values[0]; 111 __le16 bit_values[0];
108 /* (CR203 & ~(RF_IF_LE | RF_CLK | RF_DATA)) | (bit ? RF_DATA : 0) */ 112 /* (ZD_CR203 & ~(RF_IF_LE | RF_CLK | RF_DATA)) | (bit ? RF_DATA : 0) */
109} __packed; 113} __packed;
110 114
111/* USB interrupt */ 115/* USB interrupt */
@@ -162,6 +166,8 @@ struct zd_usb_interrupt {
162 struct read_regs_int read_regs; 166 struct read_regs_int read_regs;
163 spinlock_t lock; 167 spinlock_t lock;
164 struct urb *urb; 168 struct urb *urb;
169 void *buffer;
170 dma_addr_t buffer_dma;
165 int interval; 171 int interval;
166 u8 read_regs_enabled:1; 172 u8 read_regs_enabled:1;
167}; 173};
@@ -175,7 +181,10 @@ static inline struct usb_int_regs *get_read_regs(struct zd_usb_interrupt *intr)
175 181
176struct zd_usb_rx { 182struct zd_usb_rx {
177 spinlock_t lock; 183 spinlock_t lock;
178 u8 fragment[2*USB_MAX_RX_SIZE]; 184 struct mutex setup_mutex;
185 struct delayed_work idle_work;
186 struct tasklet_struct reset_timer_tasklet;
187 u8 fragment[2 * USB_MAX_RX_SIZE];
179 unsigned int fragment_length; 188 unsigned int fragment_length;
180 unsigned int usb_packet_size; 189 unsigned int usb_packet_size;
181 struct urb **urbs; 190 struct urb **urbs;
@@ -184,19 +193,21 @@ struct zd_usb_rx {
184 193
185/** 194/**
186 * struct zd_usb_tx - structure used for transmitting frames 195 * struct zd_usb_tx - structure used for transmitting frames
196 * @enabled: atomic enabled flag, indicates whether tx is enabled
187 * @lock: lock for transmission 197 * @lock: lock for transmission
188 * @free_urb_list: list of free URBs, contains all the URBs, which can be used 198 * @submitted: anchor for URBs sent to device
189 * @submitted_urbs: atomic integer that counts the URBs having sent to the 199 * @submitted_urbs: atomic integer that counts the URBs having sent to the
190 * device, which haven't been completed 200 * device, which haven't been completed
191 * @enabled: enabled flag, indicates whether tx is enabled
192 * @stopped: indicates whether higher level tx queues are stopped 201 * @stopped: indicates whether higher level tx queues are stopped
193 */ 202 */
194struct zd_usb_tx { 203struct zd_usb_tx {
204 atomic_t enabled;
195 spinlock_t lock; 205 spinlock_t lock;
196 struct list_head free_urb_list; 206 struct delayed_work watchdog_work;
207 struct sk_buff_head submitted_skbs;
208 struct usb_anchor submitted;
197 int submitted_urbs; 209 int submitted_urbs;
198 int enabled; 210 u8 stopped:1, watchdog_enabled:1;
199 int stopped;
200}; 211};
201 212
202/* Contains the usb parts. The structure doesn't require a lock because intf 213/* Contains the usb parts. The structure doesn't require a lock because intf
@@ -207,7 +218,11 @@ struct zd_usb {
207 struct zd_usb_rx rx; 218 struct zd_usb_rx rx;
208 struct zd_usb_tx tx; 219 struct zd_usb_tx tx;
209 struct usb_interface *intf; 220 struct usb_interface *intf;
210 u8 is_zd1211b:1, initialized:1; 221 struct usb_anchor submitted_cmds;
222 struct urb *urb_async_waiting;
223 int cmd_error;
224 u8 req_buf[64]; /* zd_usb_iowrite16v needs 62 bytes */
225 u8 is_zd1211b:1, initialized:1, was_running:1, in_async:1;
211}; 226};
212 227
213#define zd_usb_dev(usb) (&usb->intf->dev) 228#define zd_usb_dev(usb) (&usb->intf->dev)
@@ -234,12 +249,17 @@ void zd_usb_clear(struct zd_usb *usb);
234 249
235int zd_usb_scnprint_id(struct zd_usb *usb, char *buffer, size_t size); 250int zd_usb_scnprint_id(struct zd_usb *usb, char *buffer, size_t size);
236 251
252void zd_tx_watchdog_enable(struct zd_usb *usb);
253void zd_tx_watchdog_disable(struct zd_usb *usb);
254
237int zd_usb_enable_int(struct zd_usb *usb); 255int zd_usb_enable_int(struct zd_usb *usb);
238void zd_usb_disable_int(struct zd_usb *usb); 256void zd_usb_disable_int(struct zd_usb *usb);
239 257
240int zd_usb_enable_rx(struct zd_usb *usb); 258int zd_usb_enable_rx(struct zd_usb *usb);
241void zd_usb_disable_rx(struct zd_usb *usb); 259void zd_usb_disable_rx(struct zd_usb *usb);
242 260
261void zd_usb_reset_rx_idle_timer(struct zd_usb *usb);
262
243void zd_usb_enable_tx(struct zd_usb *usb); 263void zd_usb_enable_tx(struct zd_usb *usb);
244void zd_usb_disable_tx(struct zd_usb *usb); 264void zd_usb_disable_tx(struct zd_usb *usb);
245 265
@@ -254,6 +274,10 @@ static inline int zd_usb_ioread16(struct zd_usb *usb, u16 *value,
254 return zd_usb_ioread16v(usb, value, (const zd_addr_t *)&addr, 1); 274 return zd_usb_ioread16v(usb, value, (const zd_addr_t *)&addr, 1);
255} 275}
256 276
277void zd_usb_iowrite16v_async_start(struct zd_usb *usb);
278int zd_usb_iowrite16v_async_end(struct zd_usb *usb, unsigned int timeout);
279int zd_usb_iowrite16v_async(struct zd_usb *usb, const struct zd_ioreq16 *ioreqs,
280 unsigned int count);
257int zd_usb_iowrite16v(struct zd_usb *usb, const struct zd_ioreq16 *ioreqs, 281int zd_usb_iowrite16v(struct zd_usb *usb, const struct zd_ioreq16 *ioreqs,
258 unsigned int count); 282 unsigned int count);
259 283
generated by cgit v1.2.2 (git 2.25.0) at 2025-04-04 07:44:15 -0400