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path: root/drivers/net/wireless/wl12xx/wl1271_boot.c
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Diffstat (limited to 'drivers/net/wireless/wl12xx/wl1271_boot.c')
-rw-r--r--drivers/net/wireless/wl12xx/wl1271_boot.c106
1 files changed, 47 insertions, 59 deletions
diff --git a/drivers/net/wireless/wl12xx/wl1271_boot.c b/drivers/net/wireless/wl12xx/wl1271_boot.c
index e803b876f3f0..2be76ee42bb9 100644
--- a/drivers/net/wireless/wl12xx/wl1271_boot.c
+++ b/drivers/net/wireless/wl12xx/wl1271_boot.c
@@ -27,6 +27,7 @@
27#include "wl1271_reg.h" 27#include "wl1271_reg.h"
28#include "wl1271_boot.h" 28#include "wl1271_boot.h"
29#include "wl1271_spi.h" 29#include "wl1271_spi.h"
30#include "wl1271_io.h"
30#include "wl1271_event.h" 31#include "wl1271_event.h"
31 32
32static struct wl1271_partition_set part_table[PART_TABLE_LEN] = { 33static struct wl1271_partition_set part_table[PART_TABLE_LEN] = {
@@ -93,19 +94,19 @@ static void wl1271_boot_set_ecpu_ctrl(struct wl1271 *wl, u32 flag)
93 u32 cpu_ctrl; 94 u32 cpu_ctrl;
94 95
95 /* 10.5.0 run the firmware (I) */ 96 /* 10.5.0 run the firmware (I) */
96 cpu_ctrl = wl1271_spi_read32(wl, ACX_REG_ECPU_CONTROL); 97 cpu_ctrl = wl1271_read32(wl, ACX_REG_ECPU_CONTROL);
97 98
98 /* 10.5.1 run the firmware (II) */ 99 /* 10.5.1 run the firmware (II) */
99 cpu_ctrl |= flag; 100 cpu_ctrl |= flag;
100 wl1271_spi_write32(wl, ACX_REG_ECPU_CONTROL, cpu_ctrl); 101 wl1271_write32(wl, ACX_REG_ECPU_CONTROL, cpu_ctrl);
101} 102}
102 103
103static void wl1271_boot_fw_version(struct wl1271 *wl) 104static void wl1271_boot_fw_version(struct wl1271 *wl)
104{ 105{
105 struct wl1271_static_data static_data; 106 struct wl1271_static_data static_data;
106 107
107 wl1271_spi_read(wl, wl->cmd_box_addr, 108 wl1271_read(wl, wl->cmd_box_addr, &static_data, sizeof(static_data),
108 &static_data, sizeof(static_data), false); 109 false);
109 110
110 strncpy(wl->chip.fw_ver, static_data.fw_version, 111 strncpy(wl->chip.fw_ver, static_data.fw_version,
111 sizeof(wl->chip.fw_ver)); 112 sizeof(wl->chip.fw_ver));
@@ -164,7 +165,7 @@ static int wl1271_boot_upload_firmware_chunk(struct wl1271 *wl, void *buf,
164 memcpy(chunk, p, CHUNK_SIZE); 165 memcpy(chunk, p, CHUNK_SIZE);
165 wl1271_debug(DEBUG_BOOT, "uploading fw chunk 0x%p to 0x%x", 166 wl1271_debug(DEBUG_BOOT, "uploading fw chunk 0x%p to 0x%x",
166 p, addr); 167 p, addr);
167 wl1271_spi_write(wl, addr, chunk, CHUNK_SIZE, false); 168 wl1271_write(wl, addr, chunk, CHUNK_SIZE, false);
168 169
169 chunk_num++; 170 chunk_num++;
170 } 171 }
@@ -175,7 +176,7 @@ static int wl1271_boot_upload_firmware_chunk(struct wl1271 *wl, void *buf,
175 memcpy(chunk, p, fw_data_len % CHUNK_SIZE); 176 memcpy(chunk, p, fw_data_len % CHUNK_SIZE);
176 wl1271_debug(DEBUG_BOOT, "uploading fw last chunk (%zd B) 0x%p to 0x%x", 177 wl1271_debug(DEBUG_BOOT, "uploading fw last chunk (%zd B) 0x%p to 0x%x",
177 fw_data_len % CHUNK_SIZE, p, addr); 178 fw_data_len % CHUNK_SIZE, p, addr);
178 wl1271_spi_write(wl, addr, chunk, fw_data_len % CHUNK_SIZE, false); 179 wl1271_write(wl, addr, chunk, fw_data_len % CHUNK_SIZE, false);
179 180
180 kfree(chunk); 181 kfree(chunk);
181 return 0; 182 return 0;
@@ -219,29 +220,14 @@ static int wl1271_boot_upload_nvs(struct wl1271 *wl)
219 size_t nvs_len, burst_len; 220 size_t nvs_len, burst_len;
220 int i; 221 int i;
221 u32 dest_addr, val; 222 u32 dest_addr, val;
222 u8 *nvs_ptr, *nvs, *nvs_aligned; 223 u8 *nvs_ptr, *nvs_aligned;
223 224
224 nvs = wl->nvs; 225 if (wl->nvs == NULL)
225 if (nvs == NULL)
226 return -ENODEV; 226 return -ENODEV;
227 227
228 if (wl->nvs_len < WL1271_NVS_LEN)
229 return -EINVAL;
230
231 nvs_ptr = nvs;
232
233 /* only the first part of the NVS needs to be uploaded */ 228 /* only the first part of the NVS needs to be uploaded */
234 nvs_len = WL1271_NVS_LEN; 229 nvs_len = sizeof(wl->nvs->nvs);
235 230 nvs_ptr = (u8 *)wl->nvs->nvs;
236 /* FIXME: read init settings from the remaining part of the NVS */
237
238 /* Update the device MAC address into the nvs */
239 nvs[11] = wl->mac_addr[0];
240 nvs[10] = wl->mac_addr[1];
241 nvs[6] = wl->mac_addr[2];
242 nvs[5] = wl->mac_addr[3];
243 nvs[4] = wl->mac_addr[4];
244 nvs[3] = wl->mac_addr[5];
245 231
246 /* 232 /*
247 * Layout before the actual NVS tables: 233 * Layout before the actual NVS tables:
@@ -271,7 +257,7 @@ static int wl1271_boot_upload_nvs(struct wl1271 *wl)
271 wl1271_debug(DEBUG_BOOT, 257 wl1271_debug(DEBUG_BOOT,
272 "nvs burst write 0x%x: 0x%x", 258 "nvs burst write 0x%x: 0x%x",
273 dest_addr, val); 259 dest_addr, val);
274 wl1271_spi_write32(wl, dest_addr, val); 260 wl1271_write32(wl, dest_addr, val);
275 261
276 nvs_ptr += 4; 262 nvs_ptr += 4;
277 dest_addr += 4; 263 dest_addr += 4;
@@ -283,7 +269,7 @@ static int wl1271_boot_upload_nvs(struct wl1271 *wl)
283 * is 7 bytes further. 269 * is 7 bytes further.
284 */ 270 */
285 nvs_ptr += 7; 271 nvs_ptr += 7;
286 nvs_len -= nvs_ptr - nvs; 272 nvs_len -= nvs_ptr - (u8 *)wl->nvs->nvs;
287 nvs_len = ALIGN(nvs_len, 4); 273 nvs_len = ALIGN(nvs_len, 4);
288 274
289 /* FIXME: The driver sets the partition here, but this is not needed, 275 /* FIXME: The driver sets the partition here, but this is not needed,
@@ -292,15 +278,20 @@ static int wl1271_boot_upload_nvs(struct wl1271 *wl)
292 wl1271_set_partition(wl, &part_table[PART_WORK]); 278 wl1271_set_partition(wl, &part_table[PART_WORK]);
293 279
294 /* Copy the NVS tables to a new block to ensure alignment */ 280 /* Copy the NVS tables to a new block to ensure alignment */
295 nvs_aligned = kmemdup(nvs_ptr, nvs_len, GFP_KERNEL); 281 /* FIXME: We jump 3 more bytes before uploading the NVS. It seems
296 if (!nvs_aligned) 282 that our NVS files have three extra zeros here. I'm not sure whether
297 return -ENOMEM; 283 the problem is in our NVS generation or we should really jumpt these
284 3 bytes here */
285 nvs_ptr += 3;
286
287 nvs_aligned = kmemdup(nvs_ptr, nvs_len, GFP_KERNEL); if
288 (!nvs_aligned) return -ENOMEM;
298 289
299 /* And finally we upload the NVS tables */ 290 /* And finally we upload the NVS tables */
300 /* FIXME: In wl1271, we upload everything at once. 291 /* FIXME: In wl1271, we upload everything at once.
301 No endianness handling needed here?! The ref driver doesn't do 292 No endianness handling needed here?! The ref driver doesn't do
302 anything about it at this point */ 293 anything about it at this point */
303 wl1271_spi_write(wl, CMD_MBOX_ADDRESS, nvs_aligned, nvs_len, false); 294 wl1271_write(wl, CMD_MBOX_ADDRESS, nvs_aligned, nvs_len, false);
304 295
305 kfree(nvs_aligned); 296 kfree(nvs_aligned);
306 return 0; 297 return 0;
@@ -309,9 +300,9 @@ static int wl1271_boot_upload_nvs(struct wl1271 *wl)
309static void wl1271_boot_enable_interrupts(struct wl1271 *wl) 300static void wl1271_boot_enable_interrupts(struct wl1271 *wl)
310{ 301{
311 enable_irq(wl->irq); 302 enable_irq(wl->irq);
312 wl1271_spi_write32(wl, ACX_REG_INTERRUPT_MASK, 303 wl1271_write32(wl, ACX_REG_INTERRUPT_MASK,
313 WL1271_ACX_INTR_ALL & ~(WL1271_INTR_MASK)); 304 WL1271_ACX_INTR_ALL & ~(WL1271_INTR_MASK));
314 wl1271_spi_write32(wl, HI_CFG, HI_CFG_DEF_VAL); 305 wl1271_write32(wl, HI_CFG, HI_CFG_DEF_VAL);
315} 306}
316 307
317static int wl1271_boot_soft_reset(struct wl1271 *wl) 308static int wl1271_boot_soft_reset(struct wl1271 *wl)
@@ -320,13 +311,12 @@ static int wl1271_boot_soft_reset(struct wl1271 *wl)
320 u32 boot_data; 311 u32 boot_data;
321 312
322 /* perform soft reset */ 313 /* perform soft reset */
323 wl1271_spi_write32(wl, ACX_REG_SLV_SOFT_RESET, 314 wl1271_write32(wl, ACX_REG_SLV_SOFT_RESET, ACX_SLV_SOFT_RESET_BIT);
324 ACX_SLV_SOFT_RESET_BIT);
325 315
326 /* SOFT_RESET is self clearing */ 316 /* SOFT_RESET is self clearing */
327 timeout = jiffies + usecs_to_jiffies(SOFT_RESET_MAX_TIME); 317 timeout = jiffies + usecs_to_jiffies(SOFT_RESET_MAX_TIME);
328 while (1) { 318 while (1) {
329 boot_data = wl1271_spi_read32(wl, ACX_REG_SLV_SOFT_RESET); 319 boot_data = wl1271_read32(wl, ACX_REG_SLV_SOFT_RESET);
330 wl1271_debug(DEBUG_BOOT, "soft reset bootdata 0x%x", boot_data); 320 wl1271_debug(DEBUG_BOOT, "soft reset bootdata 0x%x", boot_data);
331 if ((boot_data & ACX_SLV_SOFT_RESET_BIT) == 0) 321 if ((boot_data & ACX_SLV_SOFT_RESET_BIT) == 0)
332 break; 322 break;
@@ -342,10 +332,10 @@ static int wl1271_boot_soft_reset(struct wl1271 *wl)
342 } 332 }
343 333
344 /* disable Rx/Tx */ 334 /* disable Rx/Tx */
345 wl1271_spi_write32(wl, ENABLE, 0x0); 335 wl1271_write32(wl, ENABLE, 0x0);
346 336
347 /* disable auto calibration on start*/ 337 /* disable auto calibration on start*/
348 wl1271_spi_write32(wl, SPARE_A2, 0xffff); 338 wl1271_write32(wl, SPARE_A2, 0xffff);
349 339
350 return 0; 340 return 0;
351} 341}
@@ -357,7 +347,7 @@ static int wl1271_boot_run_firmware(struct wl1271 *wl)
357 347
358 wl1271_boot_set_ecpu_ctrl(wl, ECPU_CONTROL_HALT); 348 wl1271_boot_set_ecpu_ctrl(wl, ECPU_CONTROL_HALT);
359 349
360 chip_id = wl1271_spi_read32(wl, CHIP_ID_B); 350 chip_id = wl1271_read32(wl, CHIP_ID_B);
361 351
362 wl1271_debug(DEBUG_BOOT, "chip id after firmware boot: 0x%x", chip_id); 352 wl1271_debug(DEBUG_BOOT, "chip id after firmware boot: 0x%x", chip_id);
363 353
@@ -370,8 +360,7 @@ static int wl1271_boot_run_firmware(struct wl1271 *wl)
370 loop = 0; 360 loop = 0;
371 while (loop++ < INIT_LOOP) { 361 while (loop++ < INIT_LOOP) {
372 udelay(INIT_LOOP_DELAY); 362 udelay(INIT_LOOP_DELAY);
373 interrupt = wl1271_spi_read32(wl, 363 interrupt = wl1271_read32(wl, ACX_REG_INTERRUPT_NO_CLEAR);
374 ACX_REG_INTERRUPT_NO_CLEAR);
375 364
376 if (interrupt == 0xffffffff) { 365 if (interrupt == 0xffffffff) {
377 wl1271_error("error reading hardware complete " 366 wl1271_error("error reading hardware complete "
@@ -380,8 +369,8 @@ static int wl1271_boot_run_firmware(struct wl1271 *wl)
380 } 369 }
381 /* check that ACX_INTR_INIT_COMPLETE is enabled */ 370 /* check that ACX_INTR_INIT_COMPLETE is enabled */
382 else if (interrupt & WL1271_ACX_INTR_INIT_COMPLETE) { 371 else if (interrupt & WL1271_ACX_INTR_INIT_COMPLETE) {
383 wl1271_spi_write32(wl, ACX_REG_INTERRUPT_ACK, 372 wl1271_write32(wl, ACX_REG_INTERRUPT_ACK,
384 WL1271_ACX_INTR_INIT_COMPLETE); 373 WL1271_ACX_INTR_INIT_COMPLETE);
385 break; 374 break;
386 } 375 }
387 } 376 }
@@ -393,10 +382,10 @@ static int wl1271_boot_run_firmware(struct wl1271 *wl)
393 } 382 }
394 383
395 /* get hardware config command mail box */ 384 /* get hardware config command mail box */
396 wl->cmd_box_addr = wl1271_spi_read32(wl, REG_COMMAND_MAILBOX_PTR); 385 wl->cmd_box_addr = wl1271_read32(wl, REG_COMMAND_MAILBOX_PTR);
397 386
398 /* get hardware config event mail box */ 387 /* get hardware config event mail box */
399 wl->event_box_addr = wl1271_spi_read32(wl, REG_EVENT_MAILBOX_PTR); 388 wl->event_box_addr = wl1271_read32(wl, REG_EVENT_MAILBOX_PTR);
400 389
401 /* set the working partition to its "running" mode offset */ 390 /* set the working partition to its "running" mode offset */
402 wl1271_set_partition(wl, &part_table[PART_WORK]); 391 wl1271_set_partition(wl, &part_table[PART_WORK]);
@@ -469,9 +458,9 @@ int wl1271_boot(struct wl1271 *wl)
469 wl1271_top_reg_write(wl, OCP_REG_CLK_POLARITY, val); 458 wl1271_top_reg_write(wl, OCP_REG_CLK_POLARITY, val);
470 } 459 }
471 460
472 wl1271_spi_write32(wl, PLL_PARAMETERS, clk); 461 wl1271_write32(wl, PLL_PARAMETERS, clk);
473 462
474 pause = wl1271_spi_read32(wl, PLL_PARAMETERS); 463 pause = wl1271_read32(wl, PLL_PARAMETERS);
475 464
476 wl1271_debug(DEBUG_BOOT, "pause1 0x%x", pause); 465 wl1271_debug(DEBUG_BOOT, "pause1 0x%x", pause);
477 466
@@ -480,10 +469,10 @@ int wl1271_boot(struct wl1271 *wl)
480 * 0x3ff (magic number ). How does 469 * 0x3ff (magic number ). How does
481 * this work?! */ 470 * this work?! */
482 pause |= WU_COUNTER_PAUSE_VAL; 471 pause |= WU_COUNTER_PAUSE_VAL;
483 wl1271_spi_write32(wl, WU_COUNTER_PAUSE, pause); 472 wl1271_write32(wl, WU_COUNTER_PAUSE, pause);
484 473
485 /* Continue the ELP wake up sequence */ 474 /* Continue the ELP wake up sequence */
486 wl1271_spi_write32(wl, WELP_ARM_COMMAND, WELP_ARM_COMMAND_VAL); 475 wl1271_write32(wl, WELP_ARM_COMMAND, WELP_ARM_COMMAND_VAL);
487 udelay(500); 476 udelay(500);
488 477
489 wl1271_set_partition(wl, &part_table[PART_DRPW]); 478 wl1271_set_partition(wl, &part_table[PART_DRPW]);
@@ -493,18 +482,18 @@ int wl1271_boot(struct wl1271 *wl)
493 before taking DRPw out of reset */ 482 before taking DRPw out of reset */
494 483
495 wl1271_debug(DEBUG_BOOT, "DRPW_SCRATCH_START %08x", DRPW_SCRATCH_START); 484 wl1271_debug(DEBUG_BOOT, "DRPW_SCRATCH_START %08x", DRPW_SCRATCH_START);
496 clk = wl1271_spi_read32(wl, DRPW_SCRATCH_START); 485 clk = wl1271_read32(wl, DRPW_SCRATCH_START);
497 486
498 wl1271_debug(DEBUG_BOOT, "clk2 0x%x", clk); 487 wl1271_debug(DEBUG_BOOT, "clk2 0x%x", clk);
499 488
500 /* 2 */ 489 /* 2 */
501 clk |= (REF_CLOCK << 1) << 4; 490 clk |= (REF_CLOCK << 1) << 4;
502 wl1271_spi_write32(wl, DRPW_SCRATCH_START, clk); 491 wl1271_write32(wl, DRPW_SCRATCH_START, clk);
503 492
504 wl1271_set_partition(wl, &part_table[PART_WORK]); 493 wl1271_set_partition(wl, &part_table[PART_WORK]);
505 494
506 /* Disable interrupts */ 495 /* Disable interrupts */
507 wl1271_spi_write32(wl, ACX_REG_INTERRUPT_MASK, WL1271_ACX_INTR_ALL); 496 wl1271_write32(wl, ACX_REG_INTERRUPT_MASK, WL1271_ACX_INTR_ALL);
508 497
509 ret = wl1271_boot_soft_reset(wl); 498 ret = wl1271_boot_soft_reset(wl);
510 if (ret < 0) 499 if (ret < 0)
@@ -519,23 +508,22 @@ int wl1271_boot(struct wl1271 *wl)
519 * ACX_EEPROMLESS_IND_REG */ 508 * ACX_EEPROMLESS_IND_REG */
520 wl1271_debug(DEBUG_BOOT, "ACX_EEPROMLESS_IND_REG"); 509 wl1271_debug(DEBUG_BOOT, "ACX_EEPROMLESS_IND_REG");
521 510
522 wl1271_spi_write32(wl, ACX_EEPROMLESS_IND_REG, 511 wl1271_write32(wl, ACX_EEPROMLESS_IND_REG, ACX_EEPROMLESS_IND_REG);
523 ACX_EEPROMLESS_IND_REG);
524 512
525 tmp = wl1271_spi_read32(wl, CHIP_ID_B); 513 tmp = wl1271_read32(wl, CHIP_ID_B);
526 514
527 wl1271_debug(DEBUG_BOOT, "chip id 0x%x", tmp); 515 wl1271_debug(DEBUG_BOOT, "chip id 0x%x", tmp);
528 516
529 /* 6. read the EEPROM parameters */ 517 /* 6. read the EEPROM parameters */
530 tmp = wl1271_spi_read32(wl, SCR_PAD2); 518 tmp = wl1271_read32(wl, SCR_PAD2);
531 519
532 ret = wl1271_boot_write_irq_polarity(wl); 520 ret = wl1271_boot_write_irq_polarity(wl);
533 if (ret < 0) 521 if (ret < 0)
534 goto out; 522 goto out;
535 523
536 /* FIXME: Need to check whether this is really what we want */ 524 /* FIXME: Need to check whether this is really what we want */
537 wl1271_spi_write32(wl, ACX_REG_INTERRUPT_MASK, 525 wl1271_write32(wl, ACX_REG_INTERRUPT_MASK,
538 WL1271_ACX_ALL_EVENTS_VECTOR); 526 WL1271_ACX_ALL_EVENTS_VECTOR);
539 527
540 /* WL1271: The reference driver skips steps 7 to 10 (jumps directly 528 /* WL1271: The reference driver skips steps 7 to 10 (jumps directly
541 * to upload_fw) */ 529 * to upload_fw) */