diff options
Diffstat (limited to 'drivers/net/wireless/wl12xx/wl1271_acx.h')
-rw-r--r-- | drivers/net/wireless/wl12xx/wl1271_acx.h | 602 |
1 files changed, 235 insertions, 367 deletions
diff --git a/drivers/net/wireless/wl12xx/wl1271_acx.h b/drivers/net/wireless/wl12xx/wl1271_acx.h index 9068daaf0ddf..aeccc98581eb 100644 --- a/drivers/net/wireless/wl12xx/wl1271_acx.h +++ b/drivers/net/wireless/wl12xx/wl1271_acx.h | |||
@@ -2,7 +2,7 @@ | |||
2 | * This file is part of wl1271 | 2 | * This file is part of wl1271 |
3 | * | 3 | * |
4 | * Copyright (C) 1998-2009 Texas Instruments. All rights reserved. | 4 | * Copyright (C) 1998-2009 Texas Instruments. All rights reserved. |
5 | * Copyright (C) 2008-2009 Nokia Corporation | 5 | * Copyright (C) 2008-2010 Nokia Corporation |
6 | * | 6 | * |
7 | * Contact: Luciano Coelho <luciano.coelho@nokia.com> | 7 | * Contact: Luciano Coelho <luciano.coelho@nokia.com> |
8 | * | 8 | * |
@@ -61,8 +61,9 @@ | |||
61 | WL1271_ACX_INTR_HW_AVAILABLE | \ | 61 | WL1271_ACX_INTR_HW_AVAILABLE | \ |
62 | WL1271_ACX_INTR_DATA) | 62 | WL1271_ACX_INTR_DATA) |
63 | 63 | ||
64 | #define WL1271_INTR_MASK (WL1271_ACX_INTR_EVENT_A | \ | 64 | #define WL1271_INTR_MASK (WL1271_ACX_INTR_EVENT_A | \ |
65 | WL1271_ACX_INTR_EVENT_B | \ | 65 | WL1271_ACX_INTR_EVENT_B | \ |
66 | WL1271_ACX_INTR_HW_AVAILABLE | \ | ||
66 | WL1271_ACX_INTR_DATA) | 67 | WL1271_ACX_INTR_DATA) |
67 | 68 | ||
68 | /* Target's information element */ | 69 | /* Target's information element */ |
@@ -70,11 +71,11 @@ struct acx_header { | |||
70 | struct wl1271_cmd_header cmd; | 71 | struct wl1271_cmd_header cmd; |
71 | 72 | ||
72 | /* acx (or information element) header */ | 73 | /* acx (or information element) header */ |
73 | u16 id; | 74 | __le16 id; |
74 | 75 | ||
75 | /* payload length (not including headers */ | 76 | /* payload length (not including headers */ |
76 | u16 len; | 77 | __le16 len; |
77 | }; | 78 | } __attribute__ ((packed)); |
78 | 79 | ||
79 | struct acx_error_counter { | 80 | struct acx_error_counter { |
80 | struct acx_header header; | 81 | struct acx_header header; |
@@ -82,21 +83,21 @@ struct acx_error_counter { | |||
82 | /* The number of PLCP errors since the last time this */ | 83 | /* The number of PLCP errors since the last time this */ |
83 | /* information element was interrogated. This field is */ | 84 | /* information element was interrogated. This field is */ |
84 | /* automatically cleared when it is interrogated.*/ | 85 | /* automatically cleared when it is interrogated.*/ |
85 | u32 PLCP_error; | 86 | __le32 PLCP_error; |
86 | 87 | ||
87 | /* The number of FCS errors since the last time this */ | 88 | /* The number of FCS errors since the last time this */ |
88 | /* information element was interrogated. This field is */ | 89 | /* information element was interrogated. This field is */ |
89 | /* automatically cleared when it is interrogated.*/ | 90 | /* automatically cleared when it is interrogated.*/ |
90 | u32 FCS_error; | 91 | __le32 FCS_error; |
91 | 92 | ||
92 | /* The number of MPDUs without PLCP header errors received*/ | 93 | /* The number of MPDUs without PLCP header errors received*/ |
93 | /* since the last time this information element was interrogated. */ | 94 | /* since the last time this information element was interrogated. */ |
94 | /* This field is automatically cleared when it is interrogated.*/ | 95 | /* This field is automatically cleared when it is interrogated.*/ |
95 | u32 valid_frame; | 96 | __le32 valid_frame; |
96 | 97 | ||
97 | /* the number of missed sequence numbers in the squentially */ | 98 | /* the number of missed sequence numbers in the squentially */ |
98 | /* values of frames seq numbers */ | 99 | /* values of frames seq numbers */ |
99 | u32 seq_num_miss; | 100 | __le32 seq_num_miss; |
100 | } __attribute__ ((packed)); | 101 | } __attribute__ ((packed)); |
101 | 102 | ||
102 | struct acx_revision { | 103 | struct acx_revision { |
@@ -125,7 +126,7 @@ struct acx_revision { | |||
125 | * (1 = first spin, 2 = second spin, and so on). | 126 | * (1 = first spin, 2 = second spin, and so on). |
126 | * bits 24 - 31: Chip ID - The WiLink chip ID. | 127 | * bits 24 - 31: Chip ID - The WiLink chip ID. |
127 | */ | 128 | */ |
128 | u32 hw_version; | 129 | __le32 hw_version; |
129 | } __attribute__ ((packed)); | 130 | } __attribute__ ((packed)); |
130 | 131 | ||
131 | enum wl1271_psm_mode { | 132 | enum wl1271_psm_mode { |
@@ -170,7 +171,6 @@ enum { | |||
170 | #define DP_RX_PACKET_RING_CHUNK_NUM 2 | 171 | #define DP_RX_PACKET_RING_CHUNK_NUM 2 |
171 | #define DP_TX_PACKET_RING_CHUNK_NUM 2 | 172 | #define DP_TX_PACKET_RING_CHUNK_NUM 2 |
172 | #define DP_TX_COMPLETE_TIME_OUT 20 | 173 | #define DP_TX_COMPLETE_TIME_OUT 20 |
173 | #define FW_TX_CMPLT_BLOCK_SIZE 16 | ||
174 | 174 | ||
175 | #define TX_MSDU_LIFETIME_MIN 0 | 175 | #define TX_MSDU_LIFETIME_MIN 0 |
176 | #define TX_MSDU_LIFETIME_MAX 3000 | 176 | #define TX_MSDU_LIFETIME_MAX 3000 |
@@ -186,7 +186,7 @@ struct acx_rx_msdu_lifetime { | |||
186 | * The maximum amount of time, in TU, before the | 186 | * The maximum amount of time, in TU, before the |
187 | * firmware discards the MSDU. | 187 | * firmware discards the MSDU. |
188 | */ | 188 | */ |
189 | u32 lifetime; | 189 | __le32 lifetime; |
190 | } __attribute__ ((packed)); | 190 | } __attribute__ ((packed)); |
191 | 191 | ||
192 | /* | 192 | /* |
@@ -273,14 +273,14 @@ struct acx_rx_msdu_lifetime { | |||
273 | struct acx_rx_config { | 273 | struct acx_rx_config { |
274 | struct acx_header header; | 274 | struct acx_header header; |
275 | 275 | ||
276 | u32 config_options; | 276 | __le32 config_options; |
277 | u32 filter_options; | 277 | __le32 filter_options; |
278 | } __attribute__ ((packed)); | 278 | } __attribute__ ((packed)); |
279 | 279 | ||
280 | struct acx_packet_detection { | 280 | struct acx_packet_detection { |
281 | struct acx_header header; | 281 | struct acx_header header; |
282 | 282 | ||
283 | u32 threshold; | 283 | __le32 threshold; |
284 | } __attribute__ ((packed)); | 284 | } __attribute__ ((packed)); |
285 | 285 | ||
286 | 286 | ||
@@ -302,8 +302,8 @@ struct acx_slot { | |||
302 | } __attribute__ ((packed)); | 302 | } __attribute__ ((packed)); |
303 | 303 | ||
304 | 304 | ||
305 | #define ADDRESS_GROUP_MAX (8) | 305 | #define ACX_MC_ADDRESS_GROUP_MAX (8) |
306 | #define ADDRESS_GROUP_MAX_LEN (ETH_ALEN * ADDRESS_GROUP_MAX) | 306 | #define ADDRESS_GROUP_MAX_LEN (ETH_ALEN * ACX_MC_ADDRESS_GROUP_MAX) |
307 | 307 | ||
308 | struct acx_dot11_grp_addr_tbl { | 308 | struct acx_dot11_grp_addr_tbl { |
309 | struct acx_header header; | 309 | struct acx_header header; |
@@ -314,40 +314,17 @@ struct acx_dot11_grp_addr_tbl { | |||
314 | u8 mac_table[ADDRESS_GROUP_MAX_LEN]; | 314 | u8 mac_table[ADDRESS_GROUP_MAX_LEN]; |
315 | } __attribute__ ((packed)); | 315 | } __attribute__ ((packed)); |
316 | 316 | ||
317 | |||
318 | #define RX_TIMEOUT_PS_POLL_MIN 0 | ||
319 | #define RX_TIMEOUT_PS_POLL_MAX (200000) | ||
320 | #define RX_TIMEOUT_PS_POLL_DEF (15) | ||
321 | #define RX_TIMEOUT_UPSD_MIN 0 | ||
322 | #define RX_TIMEOUT_UPSD_MAX (200000) | ||
323 | #define RX_TIMEOUT_UPSD_DEF (15) | ||
324 | |||
325 | struct acx_rx_timeout { | 317 | struct acx_rx_timeout { |
326 | struct acx_header header; | 318 | struct acx_header header; |
327 | 319 | ||
328 | /* | 320 | __le16 ps_poll_timeout; |
329 | * The longest time the STA will wait to receive | 321 | __le16 upsd_timeout; |
330 | * traffic from the AP after a PS-poll has been | ||
331 | * transmitted. | ||
332 | */ | ||
333 | u16 ps_poll_timeout; | ||
334 | |||
335 | /* | ||
336 | * The longest time the STA will wait to receive | ||
337 | * traffic from the AP after a frame has been sent | ||
338 | * from an UPSD enabled queue. | ||
339 | */ | ||
340 | u16 upsd_timeout; | ||
341 | } __attribute__ ((packed)); | 322 | } __attribute__ ((packed)); |
342 | 323 | ||
343 | #define RTS_THRESHOLD_MIN 0 | ||
344 | #define RTS_THRESHOLD_MAX 4096 | ||
345 | #define RTS_THRESHOLD_DEF 2347 | ||
346 | |||
347 | struct acx_rts_threshold { | 324 | struct acx_rts_threshold { |
348 | struct acx_header header; | 325 | struct acx_header header; |
349 | 326 | ||
350 | u16 threshold; | 327 | __le16 threshold; |
351 | u8 pad[2]; | 328 | u8 pad[2]; |
352 | } __attribute__ ((packed)); | 329 | } __attribute__ ((packed)); |
353 | 330 | ||
@@ -371,7 +348,7 @@ struct acx_beacon_filter_option { | |||
371 | * ACXBeaconFilterEntry (not 221) | 348 | * ACXBeaconFilterEntry (not 221) |
372 | * Byte Offset Size (Bytes) Definition | 349 | * Byte Offset Size (Bytes) Definition |
373 | * =========== ============ ========== | 350 | * =========== ============ ========== |
374 | * 0 1 IE identifier | 351 | * 0 1 IE identifier |
375 | * 1 1 Treatment bit mask | 352 | * 1 1 Treatment bit mask |
376 | * | 353 | * |
377 | * ACXBeaconFilterEntry (221) | 354 | * ACXBeaconFilterEntry (221) |
@@ -404,8 +381,15 @@ struct acx_beacon_filter_ie_table { | |||
404 | struct acx_header header; | 381 | struct acx_header header; |
405 | 382 | ||
406 | u8 num_ie; | 383 | u8 num_ie; |
407 | u8 table[BEACON_FILTER_TABLE_MAX_SIZE]; | ||
408 | u8 pad[3]; | 384 | u8 pad[3]; |
385 | u8 table[BEACON_FILTER_TABLE_MAX_SIZE]; | ||
386 | } __attribute__ ((packed)); | ||
387 | |||
388 | struct acx_conn_monit_params { | ||
389 | struct acx_header header; | ||
390 | |||
391 | __le32 synch_fail_thold; /* number of beacons missed */ | ||
392 | __le32 bss_lose_timeout; /* number of TU's from synch fail */ | ||
409 | } __attribute__ ((packed)); | 393 | } __attribute__ ((packed)); |
410 | 394 | ||
411 | enum { | 395 | enum { |
@@ -431,6 +415,14 @@ struct acx_bt_wlan_coex { | |||
431 | u8 pad[3]; | 415 | u8 pad[3]; |
432 | } __attribute__ ((packed)); | 416 | } __attribute__ ((packed)); |
433 | 417 | ||
418 | struct acx_dco_itrim_params { | ||
419 | struct acx_header header; | ||
420 | |||
421 | u8 enable; | ||
422 | u8 padding[3]; | ||
423 | __le32 timeout; | ||
424 | } __attribute__ ((packed)); | ||
425 | |||
434 | #define PTA_ANTENNA_TYPE_DEF (0) | 426 | #define PTA_ANTENNA_TYPE_DEF (0) |
435 | #define PTA_BT_HP_MAXTIME_DEF (2000) | 427 | #define PTA_BT_HP_MAXTIME_DEF (2000) |
436 | #define PTA_WLAN_HP_MAX_TIME_DEF (5000) | 428 | #define PTA_WLAN_HP_MAX_TIME_DEF (5000) |
@@ -463,150 +455,34 @@ struct acx_bt_wlan_coex { | |||
463 | struct acx_bt_wlan_coex_param { | 455 | struct acx_bt_wlan_coex_param { |
464 | struct acx_header header; | 456 | struct acx_header header; |
465 | 457 | ||
466 | /* | 458 | __le32 per_threshold; |
467 | * The minimum rate of a received WLAN packet in the STA, | 459 | __le32 max_scan_compensation_time; |
468 | * during protective mode, of which a new BT-HP request | 460 | __le16 nfs_sample_interval; |
469 | * during this Rx will always be respected and gain the antenna. | 461 | u8 load_ratio; |
470 | */ | 462 | u8 auto_ps_mode; |
471 | u32 min_rate; | 463 | u8 probe_req_compensation; |
472 | 464 | u8 scan_window_compensation; | |
473 | /* Max time the BT HP will be respected. */ | 465 | u8 antenna_config; |
474 | u16 bt_hp_max_time; | 466 | u8 beacon_miss_threshold; |
475 | 467 | __le32 rate_adaptation_threshold; | |
476 | /* Max time the WLAN HP will be respected. */ | 468 | s8 rate_adaptation_snr; |
477 | u16 wlan_hp_max_time; | 469 | u8 padding[3]; |
478 | |||
479 | /* | ||
480 | * The time between the last BT activity | ||
481 | * and the moment when the sense mode returns | ||
482 | * to SENSE_INACTIVE. | ||
483 | */ | ||
484 | u16 sense_disable_timer; | ||
485 | |||
486 | /* Time before the next BT HP instance */ | ||
487 | u16 rx_time_bt_hp; | ||
488 | u16 tx_time_bt_hp; | ||
489 | |||
490 | /* range: 10-20000 default: 1500 */ | ||
491 | u16 rx_time_bt_hp_fast; | ||
492 | u16 tx_time_bt_hp_fast; | ||
493 | |||
494 | /* range: 2000-65535 default: 8700 */ | ||
495 | u16 wlan_cycle_fast; | ||
496 | |||
497 | /* range: 0 - 15000 (Msec) default: 1000 */ | ||
498 | u16 bt_anti_starvation_period; | ||
499 | |||
500 | /* range 400-10000(Usec) default: 3000 */ | ||
501 | u16 next_bt_lp_packet; | ||
502 | |||
503 | /* Deafult: worst case for BT DH5 traffic */ | ||
504 | u16 wake_up_beacon; | ||
505 | |||
506 | /* range: 0-50000(Usec) default: 1050 */ | ||
507 | u16 hp_dm_max_guard_time; | ||
508 | |||
509 | /* | ||
510 | * This is to prevent both BT & WLAN antenna | ||
511 | * starvation. | ||
512 | * Range: 100-50000(Usec) default:2550 | ||
513 | */ | ||
514 | u16 next_wlan_packet; | ||
515 | |||
516 | /* 0 -> shared antenna */ | ||
517 | u8 antenna_type; | ||
518 | |||
519 | /* | ||
520 | * 0 -> TI legacy | ||
521 | * 1 -> Palau | ||
522 | */ | ||
523 | u8 signal_type; | ||
524 | |||
525 | /* | ||
526 | * BT AFH status | ||
527 | * 0 -> no AFH | ||
528 | * 1 -> from dedicated GPIO | ||
529 | * 2 -> AFH on (from host) | ||
530 | */ | ||
531 | u8 afh_leverage_on; | ||
532 | |||
533 | /* | ||
534 | * The number of cycles during which no | ||
535 | * TX will be sent after 1 cycle of RX | ||
536 | * transaction in protective mode | ||
537 | */ | ||
538 | u8 quiet_cycle_num; | ||
539 | |||
540 | /* | ||
541 | * The maximum number of CTSs that will | ||
542 | * be sent for receiving RX packet in | ||
543 | * protective mode | ||
544 | */ | ||
545 | u8 max_cts; | ||
546 | |||
547 | /* | ||
548 | * The number of WLAN packets | ||
549 | * transferred in common mode before | ||
550 | * switching to BT. | ||
551 | */ | ||
552 | u8 wlan_packets_num; | ||
553 | |||
554 | /* | ||
555 | * The number of BT packets | ||
556 | * transferred in common mode before | ||
557 | * switching to WLAN. | ||
558 | */ | ||
559 | u8 bt_packets_num; | ||
560 | |||
561 | /* range: 1-255 default: 5 */ | ||
562 | u8 missed_rx_avalanche; | ||
563 | |||
564 | /* range: 0-1 default: 1 */ | ||
565 | u8 wlan_elp_hp; | ||
566 | |||
567 | /* range: 0 - 15 default: 4 */ | ||
568 | u8 bt_anti_starvation_cycles; | ||
569 | |||
570 | u8 ack_mode_dual_ant; | ||
571 | |||
572 | /* | ||
573 | * Allow PA_SD assertion/de-assertion | ||
574 | * during enabled BT activity. | ||
575 | */ | ||
576 | u8 pa_sd_enable; | ||
577 | |||
578 | /* | ||
579 | * Enable/Disable PTA in auto mode: | ||
580 | * Support Both Active & P.S modes | ||
581 | */ | ||
582 | u8 pta_auto_mode_enable; | ||
583 | |||
584 | /* range: 0 - 20 default: 1 */ | ||
585 | u8 bt_hp_respected_num; | ||
586 | } __attribute__ ((packed)); | 470 | } __attribute__ ((packed)); |
587 | 471 | ||
588 | #define CCA_THRSH_ENABLE_ENERGY_D 0x140A | ||
589 | #define CCA_THRSH_DISABLE_ENERGY_D 0xFFEF | ||
590 | |||
591 | struct acx_energy_detection { | 472 | struct acx_energy_detection { |
592 | struct acx_header header; | 473 | struct acx_header header; |
593 | 474 | ||
594 | /* The RX Clear Channel Assessment threshold in the PHY */ | 475 | /* The RX Clear Channel Assessment threshold in the PHY */ |
595 | u16 rx_cca_threshold; | 476 | __le16 rx_cca_threshold; |
596 | u8 tx_energy_detection; | 477 | u8 tx_energy_detection; |
597 | u8 pad; | 478 | u8 pad; |
598 | } __attribute__ ((packed)); | 479 | } __attribute__ ((packed)); |
599 | 480 | ||
600 | #define BCN_RX_TIMEOUT_DEF_VALUE 10000 | ||
601 | #define BROADCAST_RX_TIMEOUT_DEF_VALUE 20000 | ||
602 | #define RX_BROADCAST_IN_PS_DEF_VALUE 1 | ||
603 | #define CONSECUTIVE_PS_POLL_FAILURE_DEF 4 | ||
604 | |||
605 | struct acx_beacon_broadcast { | 481 | struct acx_beacon_broadcast { |
606 | struct acx_header header; | 482 | struct acx_header header; |
607 | 483 | ||
608 | u16 beacon_rx_timeout; | 484 | __le16 beacon_rx_timeout; |
609 | u16 broadcast_timeout; | 485 | __le16 broadcast_timeout; |
610 | 486 | ||
611 | /* Enables receiving of broadcast packets in PS mode */ | 487 | /* Enables receiving of broadcast packets in PS mode */ |
612 | u8 rx_broadcast_in_ps; | 488 | u8 rx_broadcast_in_ps; |
@@ -619,8 +495,8 @@ struct acx_beacon_broadcast { | |||
619 | struct acx_event_mask { | 495 | struct acx_event_mask { |
620 | struct acx_header header; | 496 | struct acx_header header; |
621 | 497 | ||
622 | u32 event_mask; | 498 | __le32 event_mask; |
623 | u32 high_event_mask; /* Unused */ | 499 | __le32 high_event_mask; /* Unused */ |
624 | } __attribute__ ((packed)); | 500 | } __attribute__ ((packed)); |
625 | 501 | ||
626 | #define CFG_RX_FCS BIT(2) | 502 | #define CFG_RX_FCS BIT(2) |
@@ -657,11 +533,15 @@ struct acx_event_mask { | |||
657 | #define SCAN_TRIGGERED BIT(2) | 533 | #define SCAN_TRIGGERED BIT(2) |
658 | #define SCAN_PRIORITY_HIGH BIT(3) | 534 | #define SCAN_PRIORITY_HIGH BIT(3) |
659 | 535 | ||
536 | /* When set, disable HW encryption */ | ||
537 | #define DF_ENCRYPTION_DISABLE 0x01 | ||
538 | #define DF_SNIFF_MODE_ENABLE 0x80 | ||
539 | |||
660 | struct acx_feature_config { | 540 | struct acx_feature_config { |
661 | struct acx_header header; | 541 | struct acx_header header; |
662 | 542 | ||
663 | u32 options; | 543 | __le32 options; |
664 | u32 data_flow_options; | 544 | __le32 data_flow_options; |
665 | } __attribute__ ((packed)); | 545 | } __attribute__ ((packed)); |
666 | 546 | ||
667 | struct acx_current_tx_power { | 547 | struct acx_current_tx_power { |
@@ -671,14 +551,6 @@ struct acx_current_tx_power { | |||
671 | u8 padding[3]; | 551 | u8 padding[3]; |
672 | } __attribute__ ((packed)); | 552 | } __attribute__ ((packed)); |
673 | 553 | ||
674 | enum acx_wake_up_event { | ||
675 | WAKE_UP_EVENT_BEACON_BITMAP = 0x01, /* Wake on every Beacon*/ | ||
676 | WAKE_UP_EVENT_DTIM_BITMAP = 0x02, /* Wake on every DTIM*/ | ||
677 | WAKE_UP_EVENT_N_DTIM_BITMAP = 0x04, /* Wake on every Nth DTIM */ | ||
678 | WAKE_UP_EVENT_N_BEACONS_BITMAP = 0x08, /* Wake on every Nth Beacon */ | ||
679 | WAKE_UP_EVENT_BITS_MASK = 0x0F | ||
680 | }; | ||
681 | |||
682 | struct acx_wake_up_condition { | 554 | struct acx_wake_up_condition { |
683 | struct acx_header header; | 555 | struct acx_header header; |
684 | 556 | ||
@@ -693,7 +565,7 @@ struct acx_aid { | |||
693 | /* | 565 | /* |
694 | * To be set when associated with an AP. | 566 | * To be set when associated with an AP. |
695 | */ | 567 | */ |
696 | u16 aid; | 568 | __le16 aid; |
697 | u8 pad[2]; | 569 | u8 pad[2]; |
698 | } __attribute__ ((packed)); | 570 | } __attribute__ ((packed)); |
699 | 571 | ||
@@ -725,152 +597,152 @@ struct acx_ctsprotect { | |||
725 | } __attribute__ ((packed)); | 597 | } __attribute__ ((packed)); |
726 | 598 | ||
727 | struct acx_tx_statistics { | 599 | struct acx_tx_statistics { |
728 | u32 internal_desc_overflow; | 600 | __le32 internal_desc_overflow; |
729 | } __attribute__ ((packed)); | 601 | } __attribute__ ((packed)); |
730 | 602 | ||
731 | struct acx_rx_statistics { | 603 | struct acx_rx_statistics { |
732 | u32 out_of_mem; | 604 | __le32 out_of_mem; |
733 | u32 hdr_overflow; | 605 | __le32 hdr_overflow; |
734 | u32 hw_stuck; | 606 | __le32 hw_stuck; |
735 | u32 dropped; | 607 | __le32 dropped; |
736 | u32 fcs_err; | 608 | __le32 fcs_err; |
737 | u32 xfr_hint_trig; | 609 | __le32 xfr_hint_trig; |
738 | u32 path_reset; | 610 | __le32 path_reset; |
739 | u32 reset_counter; | 611 | __le32 reset_counter; |
740 | } __attribute__ ((packed)); | 612 | } __attribute__ ((packed)); |
741 | 613 | ||
742 | struct acx_dma_statistics { | 614 | struct acx_dma_statistics { |
743 | u32 rx_requested; | 615 | __le32 rx_requested; |
744 | u32 rx_errors; | 616 | __le32 rx_errors; |
745 | u32 tx_requested; | 617 | __le32 tx_requested; |
746 | u32 tx_errors; | 618 | __le32 tx_errors; |
747 | } __attribute__ ((packed)); | 619 | } __attribute__ ((packed)); |
748 | 620 | ||
749 | struct acx_isr_statistics { | 621 | struct acx_isr_statistics { |
750 | /* host command complete */ | 622 | /* host command complete */ |
751 | u32 cmd_cmplt; | 623 | __le32 cmd_cmplt; |
752 | 624 | ||
753 | /* fiqisr() */ | 625 | /* fiqisr() */ |
754 | u32 fiqs; | 626 | __le32 fiqs; |
755 | 627 | ||
756 | /* (INT_STS_ND & INT_TRIG_RX_HEADER) */ | 628 | /* (INT_STS_ND & INT_TRIG_RX_HEADER) */ |
757 | u32 rx_headers; | 629 | __le32 rx_headers; |
758 | 630 | ||
759 | /* (INT_STS_ND & INT_TRIG_RX_CMPLT) */ | 631 | /* (INT_STS_ND & INT_TRIG_RX_CMPLT) */ |
760 | u32 rx_completes; | 632 | __le32 rx_completes; |
761 | 633 | ||
762 | /* (INT_STS_ND & INT_TRIG_NO_RX_BUF) */ | 634 | /* (INT_STS_ND & INT_TRIG_NO_RX_BUF) */ |
763 | u32 rx_mem_overflow; | 635 | __le32 rx_mem_overflow; |
764 | 636 | ||
765 | /* (INT_STS_ND & INT_TRIG_S_RX_RDY) */ | 637 | /* (INT_STS_ND & INT_TRIG_S_RX_RDY) */ |
766 | u32 rx_rdys; | 638 | __le32 rx_rdys; |
767 | 639 | ||
768 | /* irqisr() */ | 640 | /* irqisr() */ |
769 | u32 irqs; | 641 | __le32 irqs; |
770 | 642 | ||
771 | /* (INT_STS_ND & INT_TRIG_TX_PROC) */ | 643 | /* (INT_STS_ND & INT_TRIG_TX_PROC) */ |
772 | u32 tx_procs; | 644 | __le32 tx_procs; |
773 | 645 | ||
774 | /* (INT_STS_ND & INT_TRIG_DECRYPT_DONE) */ | 646 | /* (INT_STS_ND & INT_TRIG_DECRYPT_DONE) */ |
775 | u32 decrypt_done; | 647 | __le32 decrypt_done; |
776 | 648 | ||
777 | /* (INT_STS_ND & INT_TRIG_DMA0) */ | 649 | /* (INT_STS_ND & INT_TRIG_DMA0) */ |
778 | u32 dma0_done; | 650 | __le32 dma0_done; |
779 | 651 | ||
780 | /* (INT_STS_ND & INT_TRIG_DMA1) */ | 652 | /* (INT_STS_ND & INT_TRIG_DMA1) */ |
781 | u32 dma1_done; | 653 | __le32 dma1_done; |
782 | 654 | ||
783 | /* (INT_STS_ND & INT_TRIG_TX_EXC_CMPLT) */ | 655 | /* (INT_STS_ND & INT_TRIG_TX_EXC_CMPLT) */ |
784 | u32 tx_exch_complete; | 656 | __le32 tx_exch_complete; |
785 | 657 | ||
786 | /* (INT_STS_ND & INT_TRIG_COMMAND) */ | 658 | /* (INT_STS_ND & INT_TRIG_COMMAND) */ |
787 | u32 commands; | 659 | __le32 commands; |
788 | 660 | ||
789 | /* (INT_STS_ND & INT_TRIG_RX_PROC) */ | 661 | /* (INT_STS_ND & INT_TRIG_RX_PROC) */ |
790 | u32 rx_procs; | 662 | __le32 rx_procs; |
791 | 663 | ||
792 | /* (INT_STS_ND & INT_TRIG_PM_802) */ | 664 | /* (INT_STS_ND & INT_TRIG_PM_802) */ |
793 | u32 hw_pm_mode_changes; | 665 | __le32 hw_pm_mode_changes; |
794 | 666 | ||
795 | /* (INT_STS_ND & INT_TRIG_ACKNOWLEDGE) */ | 667 | /* (INT_STS_ND & INT_TRIG_ACKNOWLEDGE) */ |
796 | u32 host_acknowledges; | 668 | __le32 host_acknowledges; |
797 | 669 | ||
798 | /* (INT_STS_ND & INT_TRIG_PM_PCI) */ | 670 | /* (INT_STS_ND & INT_TRIG_PM_PCI) */ |
799 | u32 pci_pm; | 671 | __le32 pci_pm; |
800 | 672 | ||
801 | /* (INT_STS_ND & INT_TRIG_ACM_WAKEUP) */ | 673 | /* (INT_STS_ND & INT_TRIG_ACM_WAKEUP) */ |
802 | u32 wakeups; | 674 | __le32 wakeups; |
803 | 675 | ||
804 | /* (INT_STS_ND & INT_TRIG_LOW_RSSI) */ | 676 | /* (INT_STS_ND & INT_TRIG_LOW_RSSI) */ |
805 | u32 low_rssi; | 677 | __le32 low_rssi; |
806 | } __attribute__ ((packed)); | 678 | } __attribute__ ((packed)); |
807 | 679 | ||
808 | struct acx_wep_statistics { | 680 | struct acx_wep_statistics { |
809 | /* WEP address keys configured */ | 681 | /* WEP address keys configured */ |
810 | u32 addr_key_count; | 682 | __le32 addr_key_count; |
811 | 683 | ||
812 | /* default keys configured */ | 684 | /* default keys configured */ |
813 | u32 default_key_count; | 685 | __le32 default_key_count; |
814 | 686 | ||
815 | u32 reserved; | 687 | __le32 reserved; |
816 | 688 | ||
817 | /* number of times that WEP key not found on lookup */ | 689 | /* number of times that WEP key not found on lookup */ |
818 | u32 key_not_found; | 690 | __le32 key_not_found; |
819 | 691 | ||
820 | /* number of times that WEP key decryption failed */ | 692 | /* number of times that WEP key decryption failed */ |
821 | u32 decrypt_fail; | 693 | __le32 decrypt_fail; |
822 | 694 | ||
823 | /* WEP packets decrypted */ | 695 | /* WEP packets decrypted */ |
824 | u32 packets; | 696 | __le32 packets; |
825 | 697 | ||
826 | /* WEP decrypt interrupts */ | 698 | /* WEP decrypt interrupts */ |
827 | u32 interrupt; | 699 | __le32 interrupt; |
828 | } __attribute__ ((packed)); | 700 | } __attribute__ ((packed)); |
829 | 701 | ||
830 | #define ACX_MISSED_BEACONS_SPREAD 10 | 702 | #define ACX_MISSED_BEACONS_SPREAD 10 |
831 | 703 | ||
832 | struct acx_pwr_statistics { | 704 | struct acx_pwr_statistics { |
833 | /* the amount of enters into power save mode (both PD & ELP) */ | 705 | /* the amount of enters into power save mode (both PD & ELP) */ |
834 | u32 ps_enter; | 706 | __le32 ps_enter; |
835 | 707 | ||
836 | /* the amount of enters into ELP mode */ | 708 | /* the amount of enters into ELP mode */ |
837 | u32 elp_enter; | 709 | __le32 elp_enter; |
838 | 710 | ||
839 | /* the amount of missing beacon interrupts to the host */ | 711 | /* the amount of missing beacon interrupts to the host */ |
840 | u32 missing_bcns; | 712 | __le32 missing_bcns; |
841 | 713 | ||
842 | /* the amount of wake on host-access times */ | 714 | /* the amount of wake on host-access times */ |
843 | u32 wake_on_host; | 715 | __le32 wake_on_host; |
844 | 716 | ||
845 | /* the amount of wake on timer-expire */ | 717 | /* the amount of wake on timer-expire */ |
846 | u32 wake_on_timer_exp; | 718 | __le32 wake_on_timer_exp; |
847 | 719 | ||
848 | /* the number of packets that were transmitted with PS bit set */ | 720 | /* the number of packets that were transmitted with PS bit set */ |
849 | u32 tx_with_ps; | 721 | __le32 tx_with_ps; |
850 | 722 | ||
851 | /* the number of packets that were transmitted with PS bit clear */ | 723 | /* the number of packets that were transmitted with PS bit clear */ |
852 | u32 tx_without_ps; | 724 | __le32 tx_without_ps; |
853 | 725 | ||
854 | /* the number of received beacons */ | 726 | /* the number of received beacons */ |
855 | u32 rcvd_beacons; | 727 | __le32 rcvd_beacons; |
856 | 728 | ||
857 | /* the number of entering into PowerOn (power save off) */ | 729 | /* the number of entering into PowerOn (power save off) */ |
858 | u32 power_save_off; | 730 | __le32 power_save_off; |
859 | 731 | ||
860 | /* the number of entries into power save mode */ | 732 | /* the number of entries into power save mode */ |
861 | u16 enable_ps; | 733 | __le16 enable_ps; |
862 | 734 | ||
863 | /* | 735 | /* |
864 | * the number of exits from power save, not including failed PS | 736 | * the number of exits from power save, not including failed PS |
865 | * transitions | 737 | * transitions |
866 | */ | 738 | */ |
867 | u16 disable_ps; | 739 | __le16 disable_ps; |
868 | 740 | ||
869 | /* | 741 | /* |
870 | * the number of times the TSF counter was adjusted because | 742 | * the number of times the TSF counter was adjusted because |
871 | * of drift | 743 | * of drift |
872 | */ | 744 | */ |
873 | u32 fix_tsf_ps; | 745 | __le32 fix_tsf_ps; |
874 | 746 | ||
875 | /* Gives statistics about the spread continuous missed beacons. | 747 | /* Gives statistics about the spread continuous missed beacons. |
876 | * The 16 LSB are dedicated for the PS mode. | 748 | * The 16 LSB are dedicated for the PS mode. |
@@ -881,53 +753,53 @@ struct acx_pwr_statistics { | |||
881 | * ... | 753 | * ... |
882 | * cont_miss_bcns_spread[9] - ten and more continuous missed beacons. | 754 | * cont_miss_bcns_spread[9] - ten and more continuous missed beacons. |
883 | */ | 755 | */ |
884 | u32 cont_miss_bcns_spread[ACX_MISSED_BEACONS_SPREAD]; | 756 | __le32 cont_miss_bcns_spread[ACX_MISSED_BEACONS_SPREAD]; |
885 | 757 | ||
886 | /* the number of beacons in awake mode */ | 758 | /* the number of beacons in awake mode */ |
887 | u32 rcvd_awake_beacons; | 759 | __le32 rcvd_awake_beacons; |
888 | } __attribute__ ((packed)); | 760 | } __attribute__ ((packed)); |
889 | 761 | ||
890 | struct acx_mic_statistics { | 762 | struct acx_mic_statistics { |
891 | u32 rx_pkts; | 763 | __le32 rx_pkts; |
892 | u32 calc_failure; | 764 | __le32 calc_failure; |
893 | } __attribute__ ((packed)); | 765 | } __attribute__ ((packed)); |
894 | 766 | ||
895 | struct acx_aes_statistics { | 767 | struct acx_aes_statistics { |
896 | u32 encrypt_fail; | 768 | __le32 encrypt_fail; |
897 | u32 decrypt_fail; | 769 | __le32 decrypt_fail; |
898 | u32 encrypt_packets; | 770 | __le32 encrypt_packets; |
899 | u32 decrypt_packets; | 771 | __le32 decrypt_packets; |
900 | u32 encrypt_interrupt; | 772 | __le32 encrypt_interrupt; |
901 | u32 decrypt_interrupt; | 773 | __le32 decrypt_interrupt; |
902 | } __attribute__ ((packed)); | 774 | } __attribute__ ((packed)); |
903 | 775 | ||
904 | struct acx_event_statistics { | 776 | struct acx_event_statistics { |
905 | u32 heart_beat; | 777 | __le32 heart_beat; |
906 | u32 calibration; | 778 | __le32 calibration; |
907 | u32 rx_mismatch; | 779 | __le32 rx_mismatch; |
908 | u32 rx_mem_empty; | 780 | __le32 rx_mem_empty; |
909 | u32 rx_pool; | 781 | __le32 rx_pool; |
910 | u32 oom_late; | 782 | __le32 oom_late; |
911 | u32 phy_transmit_error; | 783 | __le32 phy_transmit_error; |
912 | u32 tx_stuck; | 784 | __le32 tx_stuck; |
913 | } __attribute__ ((packed)); | 785 | } __attribute__ ((packed)); |
914 | 786 | ||
915 | struct acx_ps_statistics { | 787 | struct acx_ps_statistics { |
916 | u32 pspoll_timeouts; | 788 | __le32 pspoll_timeouts; |
917 | u32 upsd_timeouts; | 789 | __le32 upsd_timeouts; |
918 | u32 upsd_max_sptime; | 790 | __le32 upsd_max_sptime; |
919 | u32 upsd_max_apturn; | 791 | __le32 upsd_max_apturn; |
920 | u32 pspoll_max_apturn; | 792 | __le32 pspoll_max_apturn; |
921 | u32 pspoll_utilization; | 793 | __le32 pspoll_utilization; |
922 | u32 upsd_utilization; | 794 | __le32 upsd_utilization; |
923 | } __attribute__ ((packed)); | 795 | } __attribute__ ((packed)); |
924 | 796 | ||
925 | struct acx_rxpipe_statistics { | 797 | struct acx_rxpipe_statistics { |
926 | u32 rx_prep_beacon_drop; | 798 | __le32 rx_prep_beacon_drop; |
927 | u32 descr_host_int_trig_rx_data; | 799 | __le32 descr_host_int_trig_rx_data; |
928 | u32 beacon_buffer_thres_host_int_trig_rx_data; | 800 | __le32 beacon_buffer_thres_host_int_trig_rx_data; |
929 | u32 missed_beacon_host_int_trig_rx_data; | 801 | __le32 missed_beacon_host_int_trig_rx_data; |
930 | u32 tx_xfr_host_int_trig_rx_data; | 802 | __le32 tx_xfr_host_int_trig_rx_data; |
931 | } __attribute__ ((packed)); | 803 | } __attribute__ ((packed)); |
932 | 804 | ||
933 | struct acx_statistics { | 805 | struct acx_statistics { |
@@ -946,63 +818,34 @@ struct acx_statistics { | |||
946 | struct acx_rxpipe_statistics rxpipe; | 818 | struct acx_rxpipe_statistics rxpipe; |
947 | } __attribute__ ((packed)); | 819 | } __attribute__ ((packed)); |
948 | 820 | ||
949 | #define ACX_MAX_RATE_CLASSES 8 | ||
950 | #define ACX_RATE_MASK_UNSPECIFIED 0 | ||
951 | #define ACX_RATE_MASK_ALL 0x1eff | ||
952 | #define ACX_RATE_RETRY_LIMIT 10 | ||
953 | |||
954 | struct acx_rate_class { | 821 | struct acx_rate_class { |
955 | u32 enabled_rates; | 822 | __le32 enabled_rates; |
956 | u8 short_retry_limit; | 823 | u8 short_retry_limit; |
957 | u8 long_retry_limit; | 824 | u8 long_retry_limit; |
958 | u8 aflags; | 825 | u8 aflags; |
959 | u8 reserved; | 826 | u8 reserved; |
960 | }; | 827 | }; |
961 | 828 | ||
829 | #define ACX_TX_BASIC_RATE 0 | ||
830 | #define ACX_TX_AP_FULL_RATE 1 | ||
831 | #define ACX_TX_RATE_POLICY_CNT 2 | ||
962 | struct acx_rate_policy { | 832 | struct acx_rate_policy { |
963 | struct acx_header header; | 833 | struct acx_header header; |
964 | 834 | ||
965 | u32 rate_class_cnt; | 835 | __le32 rate_class_cnt; |
966 | struct acx_rate_class rate_class[ACX_MAX_RATE_CLASSES]; | 836 | struct acx_rate_class rate_class[CONF_TX_MAX_RATE_CLASSES]; |
967 | } __attribute__ ((packed)); | 837 | } __attribute__ ((packed)); |
968 | 838 | ||
969 | #define WL1271_ACX_AC_COUNT 4 | ||
970 | |||
971 | struct acx_ac_cfg { | 839 | struct acx_ac_cfg { |
972 | struct acx_header header; | 840 | struct acx_header header; |
973 | u8 ac; | 841 | u8 ac; |
974 | u8 cw_min; | 842 | u8 cw_min; |
975 | u16 cw_max; | 843 | __le16 cw_max; |
976 | u8 aifsn; | 844 | u8 aifsn; |
977 | u8 reserved; | 845 | u8 reserved; |
978 | u16 tx_op_limit; | 846 | __le16 tx_op_limit; |
979 | } __attribute__ ((packed)); | 847 | } __attribute__ ((packed)); |
980 | 848 | ||
981 | enum wl1271_acx_ac { | ||
982 | WL1271_ACX_AC_BE = 0, | ||
983 | WL1271_ACX_AC_BK = 1, | ||
984 | WL1271_ACX_AC_VI = 2, | ||
985 | WL1271_ACX_AC_VO = 3, | ||
986 | WL1271_ACX_AC_CTS2SELF = 4, | ||
987 | WL1271_ACX_AC_ANY_TID = 0x1F, | ||
988 | WL1271_ACX_AC_INVALID = 0xFF, | ||
989 | }; | ||
990 | |||
991 | enum wl1271_acx_ps_scheme { | ||
992 | WL1271_ACX_PS_SCHEME_LEGACY = 0, | ||
993 | WL1271_ACX_PS_SCHEME_UPSD_TRIGGER = 1, | ||
994 | WL1271_ACX_PS_SCHEME_LEGACY_PSPOLL = 2, | ||
995 | WL1271_ACX_PS_SCHEME_SAPSD = 3, | ||
996 | }; | ||
997 | |||
998 | enum wl1271_acx_ack_policy { | ||
999 | WL1271_ACX_ACK_POLICY_LEGACY = 0, | ||
1000 | WL1271_ACX_ACK_POLICY_NO_ACK = 1, | ||
1001 | WL1271_ACX_ACK_POLICY_BLOCK = 2, | ||
1002 | }; | ||
1003 | |||
1004 | #define WL1271_ACX_TID_COUNT 7 | ||
1005 | |||
1006 | struct acx_tid_config { | 849 | struct acx_tid_config { |
1007 | struct acx_header header; | 850 | struct acx_header header; |
1008 | u8 queue_id; | 851 | u8 queue_id; |
@@ -1011,26 +854,23 @@ struct acx_tid_config { | |||
1011 | u8 ps_scheme; | 854 | u8 ps_scheme; |
1012 | u8 ack_policy; | 855 | u8 ack_policy; |
1013 | u8 padding[3]; | 856 | u8 padding[3]; |
1014 | u32 apsd_conf[2]; | 857 | __le32 apsd_conf[2]; |
1015 | } __attribute__ ((packed)); | 858 | } __attribute__ ((packed)); |
1016 | 859 | ||
1017 | struct acx_frag_threshold { | 860 | struct acx_frag_threshold { |
1018 | struct acx_header header; | 861 | struct acx_header header; |
1019 | u16 frag_threshold; | 862 | __le16 frag_threshold; |
1020 | u8 padding[2]; | 863 | u8 padding[2]; |
1021 | } __attribute__ ((packed)); | 864 | } __attribute__ ((packed)); |
1022 | 865 | ||
1023 | #define WL1271_ACX_TX_COMPL_TIMEOUT 5 | ||
1024 | #define WL1271_ACX_TX_COMPL_THRESHOLD 5 | ||
1025 | |||
1026 | struct acx_tx_config_options { | 866 | struct acx_tx_config_options { |
1027 | struct acx_header header; | 867 | struct acx_header header; |
1028 | u16 tx_compl_timeout; /* msec */ | 868 | __le16 tx_compl_timeout; /* msec */ |
1029 | u16 tx_compl_threshold; /* number of packets */ | 869 | __le16 tx_compl_threshold; /* number of packets */ |
1030 | } __attribute__ ((packed)); | 870 | } __attribute__ ((packed)); |
1031 | 871 | ||
1032 | #define ACX_RX_MEM_BLOCKS 64 | 872 | #define ACX_RX_MEM_BLOCKS 70 |
1033 | #define ACX_TX_MIN_MEM_BLOCKS 64 | 873 | #define ACX_TX_MIN_MEM_BLOCKS 40 |
1034 | #define ACX_TX_DESCRIPTORS 32 | 874 | #define ACX_TX_DESCRIPTORS 32 |
1035 | #define ACX_NUM_SSID_PROFILES 1 | 875 | #define ACX_NUM_SSID_PROFILES 1 |
1036 | 876 | ||
@@ -1041,79 +881,94 @@ struct wl1271_acx_config_memory { | |||
1041 | u8 tx_min_mem_block_num; | 881 | u8 tx_min_mem_block_num; |
1042 | u8 num_stations; | 882 | u8 num_stations; |
1043 | u8 num_ssid_profiles; | 883 | u8 num_ssid_profiles; |
1044 | u32 total_tx_descriptors; | 884 | __le32 total_tx_descriptors; |
1045 | } __attribute__ ((packed)); | 885 | } __attribute__ ((packed)); |
1046 | 886 | ||
1047 | struct wl1271_acx_mem_map { | 887 | struct wl1271_acx_mem_map { |
1048 | struct acx_header header; | 888 | struct acx_header header; |
1049 | 889 | ||
1050 | void *code_start; | 890 | __le32 code_start; |
1051 | void *code_end; | 891 | __le32 code_end; |
1052 | 892 | ||
1053 | void *wep_defkey_start; | 893 | __le32 wep_defkey_start; |
1054 | void *wep_defkey_end; | 894 | __le32 wep_defkey_end; |
1055 | 895 | ||
1056 | void *sta_table_start; | 896 | __le32 sta_table_start; |
1057 | void *sta_table_end; | 897 | __le32 sta_table_end; |
1058 | 898 | ||
1059 | void *packet_template_start; | 899 | __le32 packet_template_start; |
1060 | void *packet_template_end; | 900 | __le32 packet_template_end; |
1061 | 901 | ||
1062 | /* Address of the TX result interface (control block) */ | 902 | /* Address of the TX result interface (control block) */ |
1063 | u32 tx_result; | 903 | __le32 tx_result; |
1064 | u32 tx_result_queue_start; | 904 | __le32 tx_result_queue_start; |
1065 | 905 | ||
1066 | void *queue_memory_start; | 906 | __le32 queue_memory_start; |
1067 | void *queue_memory_end; | 907 | __le32 queue_memory_end; |
1068 | 908 | ||
1069 | u32 packet_memory_pool_start; | 909 | __le32 packet_memory_pool_start; |
1070 | u32 packet_memory_pool_end; | 910 | __le32 packet_memory_pool_end; |
1071 | 911 | ||
1072 | void *debug_buffer1_start; | 912 | __le32 debug_buffer1_start; |
1073 | void *debug_buffer1_end; | 913 | __le32 debug_buffer1_end; |
1074 | 914 | ||
1075 | void *debug_buffer2_start; | 915 | __le32 debug_buffer2_start; |
1076 | void *debug_buffer2_end; | 916 | __le32 debug_buffer2_end; |
1077 | 917 | ||
1078 | /* Number of blocks FW allocated for TX packets */ | 918 | /* Number of blocks FW allocated for TX packets */ |
1079 | u32 num_tx_mem_blocks; | 919 | __le32 num_tx_mem_blocks; |
1080 | 920 | ||
1081 | /* Number of blocks FW allocated for RX packets */ | 921 | /* Number of blocks FW allocated for RX packets */ |
1082 | u32 num_rx_mem_blocks; | 922 | __le32 num_rx_mem_blocks; |
1083 | 923 | ||
1084 | /* the following 4 fields are valid in SLAVE mode only */ | 924 | /* the following 4 fields are valid in SLAVE mode only */ |
1085 | u8 *tx_cbuf; | 925 | u8 *tx_cbuf; |
1086 | u8 *rx_cbuf; | 926 | u8 *rx_cbuf; |
1087 | void *rx_ctrl; | 927 | __le32 rx_ctrl; |
1088 | void *tx_ctrl; | 928 | __le32 tx_ctrl; |
1089 | } __attribute__ ((packed)); | 929 | } __attribute__ ((packed)); |
1090 | 930 | ||
1091 | enum wl1271_acx_rx_queue_type { | ||
1092 | RX_QUEUE_TYPE_RX_LOW_PRIORITY, /* All except the high priority */ | ||
1093 | RX_QUEUE_TYPE_RX_HIGH_PRIORITY, /* Management and voice packets */ | ||
1094 | RX_QUEUE_TYPE_NUM, | ||
1095 | RX_QUEUE_TYPE_MAX = USHORT_MAX | ||
1096 | }; | ||
1097 | |||
1098 | #define WL1271_RX_INTR_THRESHOLD_DEF 0 /* no pacing, send interrupt on | ||
1099 | * every event */ | ||
1100 | #define WL1271_RX_INTR_THRESHOLD_MIN 0 | ||
1101 | #define WL1271_RX_INTR_THRESHOLD_MAX 15 | ||
1102 | |||
1103 | #define WL1271_RX_INTR_TIMEOUT_DEF 5 | ||
1104 | #define WL1271_RX_INTR_TIMEOUT_MIN 1 | ||
1105 | #define WL1271_RX_INTR_TIMEOUT_MAX 100 | ||
1106 | |||
1107 | struct wl1271_acx_rx_config_opt { | 931 | struct wl1271_acx_rx_config_opt { |
1108 | struct acx_header header; | 932 | struct acx_header header; |
1109 | 933 | ||
1110 | u16 mblk_threshold; | 934 | __le16 mblk_threshold; |
1111 | u16 threshold; | 935 | __le16 threshold; |
1112 | u16 timeout; | 936 | __le16 timeout; |
1113 | u8 queue_type; | 937 | u8 queue_type; |
1114 | u8 reserved; | 938 | u8 reserved; |
1115 | } __attribute__ ((packed)); | 939 | } __attribute__ ((packed)); |
1116 | 940 | ||
941 | |||
942 | struct wl1271_acx_bet_enable { | ||
943 | struct acx_header header; | ||
944 | |||
945 | u8 enable; | ||
946 | u8 max_consecutive; | ||
947 | u8 padding[2]; | ||
948 | } __attribute__ ((packed)); | ||
949 | |||
950 | #define ACX_IPV4_VERSION 4 | ||
951 | #define ACX_IPV6_VERSION 6 | ||
952 | #define ACX_IPV4_ADDR_SIZE 4 | ||
953 | struct wl1271_acx_arp_filter { | ||
954 | struct acx_header header; | ||
955 | u8 version; /* ACX_IPV4_VERSION, ACX_IPV6_VERSION */ | ||
956 | u8 enable; /* 1 to enable ARP filtering, 0 to disable */ | ||
957 | u8 padding[2]; | ||
958 | u8 address[16]; /* The configured device IP address - all ARP | ||
959 | requests directed to this IP address will pass | ||
960 | through. For IPv4, the first four bytes are | ||
961 | used. */ | ||
962 | } __attribute__((packed)); | ||
963 | |||
964 | struct wl1271_acx_pm_config { | ||
965 | struct acx_header header; | ||
966 | |||
967 | __le32 host_clk_settling_time; | ||
968 | u8 host_fast_wakeup_support; | ||
969 | u8 padding[3]; | ||
970 | } __attribute__ ((packed)); | ||
971 | |||
1117 | enum { | 972 | enum { |
1118 | ACX_WAKE_UP_CONDITIONS = 0x0002, | 973 | ACX_WAKE_UP_CONDITIONS = 0x0002, |
1119 | ACX_MEM_CFG = 0x0003, | 974 | ACX_MEM_CFG = 0x0003, |
@@ -1170,11 +1025,14 @@ enum { | |||
1170 | ACX_PEER_HT_CAP = 0x0057, | 1025 | ACX_PEER_HT_CAP = 0x0057, |
1171 | ACX_HT_BSS_OPERATION = 0x0058, | 1026 | ACX_HT_BSS_OPERATION = 0x0058, |
1172 | ACX_COEX_ACTIVITY = 0x0059, | 1027 | ACX_COEX_ACTIVITY = 0x0059, |
1028 | ACX_SET_SMART_REFLEX_DEBUG = 0x005A, | ||
1029 | ACX_SET_DCO_ITRIM_PARAMS = 0x0061, | ||
1173 | DOT11_RX_MSDU_LIFE_TIME = 0x1004, | 1030 | DOT11_RX_MSDU_LIFE_TIME = 0x1004, |
1174 | DOT11_CUR_TX_PWR = 0x100D, | 1031 | DOT11_CUR_TX_PWR = 0x100D, |
1175 | DOT11_RX_DOT11_MODE = 0x1012, | 1032 | DOT11_RX_DOT11_MODE = 0x1012, |
1176 | DOT11_RTS_THRESHOLD = 0x1013, | 1033 | DOT11_RTS_THRESHOLD = 0x1013, |
1177 | DOT11_GROUP_ADDRESS_TBL = 0x1014, | 1034 | DOT11_GROUP_ADDRESS_TBL = 0x1014, |
1035 | ACX_PM_CONFIG = 0x1016, | ||
1178 | 1036 | ||
1179 | MAX_DOT11_IE = DOT11_GROUP_ADDRESS_TBL, | 1037 | MAX_DOT11_IE = DOT11_GROUP_ADDRESS_TBL, |
1180 | 1038 | ||
@@ -1182,23 +1040,25 @@ enum { | |||
1182 | }; | 1040 | }; |
1183 | 1041 | ||
1184 | 1042 | ||
1185 | int wl1271_acx_wake_up_conditions(struct wl1271 *wl, u8 wake_up_event, | 1043 | int wl1271_acx_wake_up_conditions(struct wl1271 *wl); |
1186 | u8 listen_interval); | ||
1187 | int wl1271_acx_sleep_auth(struct wl1271 *wl, u8 sleep_auth); | 1044 | int wl1271_acx_sleep_auth(struct wl1271 *wl, u8 sleep_auth); |
1188 | int wl1271_acx_fw_version(struct wl1271 *wl, char *buf, size_t len); | 1045 | int wl1271_acx_fw_version(struct wl1271 *wl, char *buf, size_t len); |
1189 | int wl1271_acx_tx_power(struct wl1271 *wl, int power); | 1046 | int wl1271_acx_tx_power(struct wl1271 *wl, int power); |
1190 | int wl1271_acx_feature_cfg(struct wl1271 *wl); | 1047 | int wl1271_acx_feature_cfg(struct wl1271 *wl); |
1191 | int wl1271_acx_mem_map(struct wl1271 *wl, | 1048 | int wl1271_acx_mem_map(struct wl1271 *wl, |
1192 | struct acx_header *mem_map, size_t len); | 1049 | struct acx_header *mem_map, size_t len); |
1193 | int wl1271_acx_rx_msdu_life_time(struct wl1271 *wl, u32 life_time); | 1050 | int wl1271_acx_rx_msdu_life_time(struct wl1271 *wl); |
1194 | int wl1271_acx_rx_config(struct wl1271 *wl, u32 config, u32 filter); | 1051 | int wl1271_acx_rx_config(struct wl1271 *wl, u32 config, u32 filter); |
1195 | int wl1271_acx_pd_threshold(struct wl1271 *wl); | 1052 | int wl1271_acx_pd_threshold(struct wl1271 *wl); |
1196 | int wl1271_acx_slot(struct wl1271 *wl, enum acx_slot_type slot_time); | 1053 | int wl1271_acx_slot(struct wl1271 *wl, enum acx_slot_type slot_time); |
1197 | int wl1271_acx_group_address_tbl(struct wl1271 *wl); | 1054 | int wl1271_acx_group_address_tbl(struct wl1271 *wl, bool enable, |
1055 | void *mc_list, u32 mc_list_len); | ||
1198 | int wl1271_acx_service_period_timeout(struct wl1271 *wl); | 1056 | int wl1271_acx_service_period_timeout(struct wl1271 *wl); |
1199 | int wl1271_acx_rts_threshold(struct wl1271 *wl, u16 rts_threshold); | 1057 | int wl1271_acx_rts_threshold(struct wl1271 *wl, u16 rts_threshold); |
1200 | int wl1271_acx_beacon_filter_opt(struct wl1271 *wl); | 1058 | int wl1271_acx_dco_itrim_params(struct wl1271 *wl); |
1059 | int wl1271_acx_beacon_filter_opt(struct wl1271 *wl, bool enable_filter); | ||
1201 | int wl1271_acx_beacon_filter_table(struct wl1271 *wl); | 1060 | int wl1271_acx_beacon_filter_table(struct wl1271 *wl); |
1061 | int wl1271_acx_conn_monit_params(struct wl1271 *wl); | ||
1202 | int wl1271_acx_sg_enable(struct wl1271 *wl); | 1062 | int wl1271_acx_sg_enable(struct wl1271 *wl); |
1203 | int wl1271_acx_sg_cfg(struct wl1271 *wl); | 1063 | int wl1271_acx_sg_cfg(struct wl1271 *wl); |
1204 | int wl1271_acx_cca_threshold(struct wl1271 *wl); | 1064 | int wl1271_acx_cca_threshold(struct wl1271 *wl); |
@@ -1207,15 +1067,23 @@ int wl1271_acx_aid(struct wl1271 *wl, u16 aid); | |||
1207 | int wl1271_acx_event_mbox_mask(struct wl1271 *wl, u32 event_mask); | 1067 | int wl1271_acx_event_mbox_mask(struct wl1271 *wl, u32 event_mask); |
1208 | int wl1271_acx_set_preamble(struct wl1271 *wl, enum acx_preamble_type preamble); | 1068 | int wl1271_acx_set_preamble(struct wl1271 *wl, enum acx_preamble_type preamble); |
1209 | int wl1271_acx_cts_protect(struct wl1271 *wl, | 1069 | int wl1271_acx_cts_protect(struct wl1271 *wl, |
1210 | enum acx_ctsprotect_type ctsprotect); | 1070 | enum acx_ctsprotect_type ctsprotect); |
1211 | int wl1271_acx_statistics(struct wl1271 *wl, struct acx_statistics *stats); | 1071 | int wl1271_acx_statistics(struct wl1271 *wl, struct acx_statistics *stats); |
1212 | int wl1271_acx_rate_policies(struct wl1271 *wl); | 1072 | int wl1271_acx_rate_policies(struct wl1271 *wl); |
1213 | int wl1271_acx_ac_cfg(struct wl1271 *wl); | 1073 | int wl1271_acx_ac_cfg(struct wl1271 *wl, u8 ac, u8 cw_min, u16 cw_max, |
1214 | int wl1271_acx_tid_cfg(struct wl1271 *wl); | 1074 | u8 aifsn, u16 txop); |
1075 | int wl1271_acx_tid_cfg(struct wl1271 *wl, u8 queue_id, u8 channel_type, | ||
1076 | u8 tsid, u8 ps_scheme, u8 ack_policy, | ||
1077 | u32 apsd_conf0, u32 apsd_conf1); | ||
1215 | int wl1271_acx_frag_threshold(struct wl1271 *wl); | 1078 | int wl1271_acx_frag_threshold(struct wl1271 *wl); |
1216 | int wl1271_acx_tx_config_options(struct wl1271 *wl); | 1079 | int wl1271_acx_tx_config_options(struct wl1271 *wl); |
1217 | int wl1271_acx_mem_cfg(struct wl1271 *wl); | 1080 | int wl1271_acx_mem_cfg(struct wl1271 *wl); |
1218 | int wl1271_acx_init_mem_config(struct wl1271 *wl); | 1081 | int wl1271_acx_init_mem_config(struct wl1271 *wl); |
1219 | int wl1271_acx_init_rx_interrupt(struct wl1271 *wl); | 1082 | int wl1271_acx_init_rx_interrupt(struct wl1271 *wl); |
1083 | int wl1271_acx_smart_reflex(struct wl1271 *wl); | ||
1084 | int wl1271_acx_bet_enable(struct wl1271 *wl, bool enable); | ||
1085 | int wl1271_acx_arp_ip_filter(struct wl1271 *wl, bool enable, u8 *address, | ||
1086 | u8 version); | ||
1087 | int wl1271_acx_pm_config(struct wl1271 *wl); | ||
1220 | 1088 | ||
1221 | #endif /* __WL1271_ACX_H__ */ | 1089 | #endif /* __WL1271_ACX_H__ */ |