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path: root/drivers/net/wireless/rtlwifi/rtl8192ce/phy.c
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Diffstat (limited to 'drivers/net/wireless/rtlwifi/rtl8192ce/phy.c')
-rw-r--r--drivers/net/wireless/rtlwifi/rtl8192ce/phy.c223
1 files changed, 81 insertions, 142 deletions
diff --git a/drivers/net/wireless/rtlwifi/rtl8192ce/phy.c b/drivers/net/wireless/rtlwifi/rtl8192ce/phy.c
index d0541e8c6012..73ae8a431848 100644
--- a/drivers/net/wireless/rtlwifi/rtl8192ce/phy.c
+++ b/drivers/net/wireless/rtlwifi/rtl8192ce/phy.c
@@ -38,7 +38,9 @@
38#include "dm.h" 38#include "dm.h"
39#include "table.h" 39#include "table.h"
40 40
41u32 rtl92ce_phy_query_rf_reg(struct ieee80211_hw *hw, 41static bool _rtl92c_phy_config_mac_with_headerfile(struct ieee80211_hw *hw);
42
43u32 rtl92c_phy_query_rf_reg(struct ieee80211_hw *hw,
42 enum radio_path rfpath, u32 regaddr, u32 bitmask) 44 enum radio_path rfpath, u32 regaddr, u32 bitmask)
43{ 45{
44 struct rtl_priv *rtlpriv = rtl_priv(hw); 46 struct rtl_priv *rtlpriv = rtl_priv(hw);
@@ -73,9 +75,47 @@ u32 rtl92ce_phy_query_rf_reg(struct ieee80211_hw *hw,
73 return readback_value; 75 return readback_value;
74} 76}
75 77
78bool rtl92c_phy_mac_config(struct ieee80211_hw *hw)
79{
80 struct rtl_priv *rtlpriv = rtl_priv(hw);
81 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
82 bool is92c = IS_92C_SERIAL(rtlhal->version);
83 bool rtstatus = _rtl92c_phy_config_mac_with_headerfile(hw);
84
85 if (is92c)
86 rtl_write_byte(rtlpriv, 0x14, 0x71);
87 return rtstatus;
88}
89
90bool rtl92c_phy_bb_config(struct ieee80211_hw *hw)
91{
92 bool rtstatus = true;
93 struct rtl_priv *rtlpriv = rtl_priv(hw);
94 u16 regval;
95 u32 regvaldw;
96 u8 reg_hwparafile = 1;
97
98 _rtl92c_phy_init_bb_rf_register_definition(hw);
99 regval = rtl_read_word(rtlpriv, REG_SYS_FUNC_EN);
100 rtl_write_word(rtlpriv, REG_SYS_FUNC_EN,
101 regval | BIT(13) | BIT(0) | BIT(1));
102 rtl_write_byte(rtlpriv, REG_AFE_PLL_CTRL, 0x83);
103 rtl_write_byte(rtlpriv, REG_AFE_PLL_CTRL + 1, 0xdb);
104 rtl_write_byte(rtlpriv, REG_RF_CTRL, RF_EN | RF_RSTB | RF_SDMRSTB);
105 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN,
106 FEN_PPLL | FEN_PCIEA | FEN_DIO_PCIE |
107 FEN_BB_GLB_RSTn | FEN_BBRSTB);
108 rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL + 1, 0x80);
109 regvaldw = rtl_read_dword(rtlpriv, REG_LEDCFG0);
110 rtl_write_dword(rtlpriv, REG_LEDCFG0, regvaldw | BIT(23));
111 if (reg_hwparafile == 1)
112 rtstatus = _rtl92c_phy_bb8192c_config_parafile(hw);
113 return rtstatus;
114}
115
76void rtl92ce_phy_set_rf_reg(struct ieee80211_hw *hw, 116void rtl92ce_phy_set_rf_reg(struct ieee80211_hw *hw,
77 enum radio_path rfpath, 117 enum radio_path rfpath,
78 u32 regaddr, u32 bitmask, u32 data) 118 u32 regaddr, u32 bitmask, u32 data)
79{ 119{
80 struct rtl_priv *rtlpriv = rtl_priv(hw); 120 struct rtl_priv *rtlpriv = rtl_priv(hw);
81 struct rtl_phy *rtlphy = &(rtlpriv->phy); 121 struct rtl_phy *rtlphy = &(rtlpriv->phy);
@@ -121,45 +161,7 @@ void rtl92ce_phy_set_rf_reg(struct ieee80211_hw *hw,
121 bitmask, data, rfpath)); 161 bitmask, data, rfpath));
122} 162}
123 163
124bool rtl92ce_phy_mac_config(struct ieee80211_hw *hw) 164static bool _rtl92c_phy_config_mac_with_headerfile(struct ieee80211_hw *hw)
125{
126 struct rtl_priv *rtlpriv = rtl_priv(hw);
127 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
128 bool is92c = IS_92C_SERIAL(rtlhal->version);
129 bool rtstatus = _rtl92ce_phy_config_mac_with_headerfile(hw);
130
131 if (is92c)
132 rtl_write_byte(rtlpriv, 0x14, 0x71);
133 return rtstatus;
134}
135
136bool rtl92ce_phy_bb_config(struct ieee80211_hw *hw)
137{
138 bool rtstatus = true;
139 struct rtl_priv *rtlpriv = rtl_priv(hw);
140 u16 regval;
141 u32 regvaldw;
142 u8 reg_hwparafile = 1;
143
144 _rtl92c_phy_init_bb_rf_register_definition(hw);
145 regval = rtl_read_word(rtlpriv, REG_SYS_FUNC_EN);
146 rtl_write_word(rtlpriv, REG_SYS_FUNC_EN,
147 regval | BIT(13) | BIT(0) | BIT(1));
148 rtl_write_byte(rtlpriv, REG_AFE_PLL_CTRL, 0x83);
149 rtl_write_byte(rtlpriv, REG_AFE_PLL_CTRL + 1, 0xdb);
150 rtl_write_byte(rtlpriv, REG_RF_CTRL, RF_EN | RF_RSTB | RF_SDMRSTB);
151 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN,
152 FEN_PPLL | FEN_PCIEA | FEN_DIO_PCIE |
153 FEN_BB_GLB_RSTn | FEN_BBRSTB);
154 rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL + 1, 0x80);
155 regvaldw = rtl_read_dword(rtlpriv, REG_LEDCFG0);
156 rtl_write_dword(rtlpriv, REG_LEDCFG0, regvaldw | BIT(23));
157 if (reg_hwparafile == 1)
158 rtstatus = _rtl92c_phy_bb8192c_config_parafile(hw);
159 return rtstatus;
160}
161
162bool _rtl92ce_phy_config_mac_with_headerfile(struct ieee80211_hw *hw)
163{ 165{
164 struct rtl_priv *rtlpriv = rtl_priv(hw); 166 struct rtl_priv *rtlpriv = rtl_priv(hw);
165 u32 i; 167 u32 i;
@@ -177,7 +179,7 @@ bool _rtl92ce_phy_config_mac_with_headerfile(struct ieee80211_hw *hw)
177} 179}
178 180
179bool _rtl92ce_phy_config_bb_with_headerfile(struct ieee80211_hw *hw, 181bool _rtl92ce_phy_config_bb_with_headerfile(struct ieee80211_hw *hw,
180 u8 configtype) 182 u8 configtype)
181{ 183{
182 int i; 184 int i;
183 u32 *phy_regarray_table; 185 u32 *phy_regarray_table;
@@ -236,7 +238,7 @@ bool _rtl92ce_phy_config_bb_with_headerfile(struct ieee80211_hw *hw,
236} 238}
237 239
238bool _rtl92ce_phy_config_bb_with_pgheaderfile(struct ieee80211_hw *hw, 240bool _rtl92ce_phy_config_bb_with_pgheaderfile(struct ieee80211_hw *hw,
239 u8 configtype) 241 u8 configtype)
240{ 242{
241 struct rtl_priv *rtlpriv = rtl_priv(hw); 243 struct rtl_priv *rtlpriv = rtl_priv(hw);
242 int i; 244 int i;
@@ -274,7 +276,7 @@ bool _rtl92ce_phy_config_bb_with_pgheaderfile(struct ieee80211_hw *hw,
274 return true; 276 return true;
275} 277}
276 278
277bool rtl92ce_phy_config_rf_with_headerfile(struct ieee80211_hw *hw, 279bool rtl92c_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
278 enum radio_path rfpath) 280 enum radio_path rfpath)
279{ 281{
280 282
@@ -364,74 +366,6 @@ bool rtl92ce_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
364 return true; 366 return true;
365} 367}
366 368
367void rtl92ce_phy_set_bw_mode_callback(struct ieee80211_hw *hw)
368{
369 struct rtl_priv *rtlpriv = rtl_priv(hw);
370 struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
371 struct rtl_phy *rtlphy = &(rtlpriv->phy);
372 struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
373 u8 reg_bw_opmode;
374 u8 reg_prsr_rsc;
375
376 RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE,
377 ("Switch to %s bandwidth\n",
378 rtlphy->current_chan_bw == HT_CHANNEL_WIDTH_20 ?
379 "20MHz" : "40MHz"))
380
381 if (is_hal_stop(rtlhal))
382 return;
383
384 reg_bw_opmode = rtl_read_byte(rtlpriv, REG_BWOPMODE);
385 reg_prsr_rsc = rtl_read_byte(rtlpriv, REG_RRSR + 2);
386
387 switch (rtlphy->current_chan_bw) {
388 case HT_CHANNEL_WIDTH_20:
389 reg_bw_opmode |= BW_OPMODE_20MHZ;
390 rtl_write_byte(rtlpriv, REG_BWOPMODE, reg_bw_opmode);
391 break;
392
393 case HT_CHANNEL_WIDTH_20_40:
394 reg_bw_opmode &= ~BW_OPMODE_20MHZ;
395 rtl_write_byte(rtlpriv, REG_BWOPMODE, reg_bw_opmode);
396
397 reg_prsr_rsc =
398 (reg_prsr_rsc & 0x90) | (mac->cur_40_prime_sc << 5);
399 rtl_write_byte(rtlpriv, REG_RRSR + 2, reg_prsr_rsc);
400 break;
401
402 default:
403 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
404 ("unknown bandwidth: %#X\n", rtlphy->current_chan_bw));
405 break;
406 }
407
408 switch (rtlphy->current_chan_bw) {
409 case HT_CHANNEL_WIDTH_20:
410 rtl_set_bbreg(hw, RFPGA0_RFMOD, BRFMOD, 0x0);
411 rtl_set_bbreg(hw, RFPGA1_RFMOD, BRFMOD, 0x0);
412 rtl_set_bbreg(hw, RFPGA0_ANALOGPARAMETER2, BIT(10), 1);
413 break;
414 case HT_CHANNEL_WIDTH_20_40:
415 rtl_set_bbreg(hw, RFPGA0_RFMOD, BRFMOD, 0x1);
416 rtl_set_bbreg(hw, RFPGA1_RFMOD, BRFMOD, 0x1);
417 rtl_set_bbreg(hw, RCCK0_SYSTEM, BCCK_SIDEBAND,
418 (mac->cur_40_prime_sc >> 1));
419 rtl_set_bbreg(hw, ROFDM1_LSTF, 0xC00, mac->cur_40_prime_sc);
420 rtl_set_bbreg(hw, RFPGA0_ANALOGPARAMETER2, BIT(10), 0);
421 rtl_set_bbreg(hw, 0x818, (BIT(26) | BIT(27)),
422 (mac->cur_40_prime_sc ==
423 HAL_PRIME_CHNL_OFFSET_LOWER) ? 2 : 1);
424 break;
425 default:
426 RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
427 ("unknown bandwidth: %#X\n", rtlphy->current_chan_bw));
428 break;
429 }
430 rtl92c_phy_rf6052_set_bandwidth(hw, rtlphy->current_chan_bw);
431 rtlphy->set_bwmode_inprogress = false;
432 RT_TRACE(rtlpriv, COMP_SCAN, DBG_TRACE, ("<==\n"));
433}
434
435void _rtl92ce_phy_lc_calibrate(struct ieee80211_hw *hw, bool is2t) 369void _rtl92ce_phy_lc_calibrate(struct ieee80211_hw *hw, bool is2t)
436{ 370{
437 u8 tmpreg; 371 u8 tmpreg;
@@ -477,6 +411,36 @@ void _rtl92ce_phy_lc_calibrate(struct ieee80211_hw *hw, bool is2t)
477 } 411 }
478} 412}
479 413
414static void _rtl92ce_phy_set_rf_sleep(struct ieee80211_hw *hw)
415{
416 u32 u4b_tmp;
417 u8 delay = 5;
418 struct rtl_priv *rtlpriv = rtl_priv(hw);
419
420 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0xFF);
421 rtl_set_rfreg(hw, RF90_PATH_A, 0x00, RFREG_OFFSET_MASK, 0x00);
422 rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x40);
423 u4b_tmp = rtl_get_rfreg(hw, RF90_PATH_A, 0, RFREG_OFFSET_MASK);
424 while (u4b_tmp != 0 && delay > 0) {
425 rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x0);
426 rtl_set_rfreg(hw, RF90_PATH_A, 0x00, RFREG_OFFSET_MASK, 0x00);
427 rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x40);
428 u4b_tmp = rtl_get_rfreg(hw, RF90_PATH_A, 0, RFREG_OFFSET_MASK);
429 delay--;
430 }
431 if (delay == 0) {
432 rtl_write_byte(rtlpriv, REG_APSD_CTRL, 0x00);
433 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE2);
434 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE3);
435 rtl_write_byte(rtlpriv, REG_TXPAUSE, 0x00);
436 RT_TRACE(rtlpriv, COMP_POWER, DBG_TRACE,
437 ("Switch RF timeout !!!.\n"));
438 return;
439 }
440 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, 0xE2);
441 rtl_write_byte(rtlpriv, REG_SPS0_CTRL, 0x22);
442}
443
480static bool _rtl92ce_phy_set_rf_power_state(struct ieee80211_hw *hw, 444static bool _rtl92ce_phy_set_rf_power_state(struct ieee80211_hw *hw,
481 enum rf_pwrstate rfpwr_state) 445 enum rf_pwrstate rfpwr_state)
482{ 446{
@@ -523,33 +487,6 @@ static bool _rtl92ce_phy_set_rf_power_state(struct ieee80211_hw *hw,
523 break; 487 break;
524 } 488 }
525 case ERFOFF:{ 489 case ERFOFF:{
526 for (queue_id = 0, i = 0;
527 queue_id < RTL_PCI_MAX_TX_QUEUE_COUNT;) {
528 ring = &pcipriv->dev.tx_ring[queue_id];
529 if (skb_queue_len(&ring->queue) == 0 ||
530 queue_id == BEACON_QUEUE) {
531 queue_id++;
532 continue;
533 } else {
534 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
535 ("eRf Off/Sleep: %d times "
536 "TcbBusyQueue[%d] "
537 "=%d before doze!\n", (i + 1),
538 queue_id,
539 skb_queue_len(&ring->queue)));
540 udelay(10);
541 i++;
542 }
543 if (i >= MAX_DOZE_WAITING_TIMES_9x) {
544 RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
545 ("\nERFOFF: %d times "
546 "TcbBusyQueue[%d] = %d !\n",
547 MAX_DOZE_WAITING_TIMES_9x,
548 queue_id,
549 skb_queue_len(&ring->queue)));
550 break;
551 }
552 }
553 if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_HALT_NIC) { 490 if (ppsc->reg_rfps_level & RT_RF_OFF_LEVL_HALT_NIC) {
554 RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG, 491 RT_TRACE(rtlpriv, COMP_RF, DBG_DMESG,
555 ("IPS Set eRf nic disable\n")); 492 ("IPS Set eRf nic disable\n"));
@@ -581,6 +518,7 @@ static bool _rtl92ce_phy_set_rf_power_state(struct ieee80211_hw *hw,
581 "TcbBusyQueue[%d] =%d before " 518 "TcbBusyQueue[%d] =%d before "
582 "doze!\n", (i + 1), queue_id, 519 "doze!\n", (i + 1), queue_id,
583 skb_queue_len(&ring->queue))); 520 skb_queue_len(&ring->queue)));
521
584 udelay(10); 522 udelay(10);
585 i++; 523 i++;
586 } 524 }
@@ -599,7 +537,7 @@ static bool _rtl92ce_phy_set_rf_power_state(struct ieee80211_hw *hw,
599 jiffies_to_msecs(jiffies - 537 jiffies_to_msecs(jiffies -
600 ppsc->last_awake_jiffies))); 538 ppsc->last_awake_jiffies)));
601 ppsc->last_sleep_jiffies = jiffies; 539 ppsc->last_sleep_jiffies = jiffies;
602 _rtl92c_phy_set_rf_sleep(hw); 540 _rtl92ce_phy_set_rf_sleep(hw);
603 break; 541 break;
604 } 542 }
605 default: 543 default:
@@ -614,10 +552,11 @@ static bool _rtl92ce_phy_set_rf_power_state(struct ieee80211_hw *hw,
614 return bresult; 552 return bresult;
615} 553}
616 554
617bool rtl92ce_phy_set_rf_power_state(struct ieee80211_hw *hw, 555bool rtl92c_phy_set_rf_power_state(struct ieee80211_hw *hw,
618 enum rf_pwrstate rfpwr_state) 556 enum rf_pwrstate rfpwr_state)
619{ 557{
620 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw)); 558 struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
559
621 bool bresult = false; 560 bool bresult = false;
622 561
623 if (rfpwr_state == ppsc->rfpwr_state) 562 if (rfpwr_state == ppsc->rfpwr_state)
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-14 23:00:47 -0500