diff options
Diffstat (limited to 'drivers/net/wireless/rtlwifi/pci.c')
-rw-r--r-- | drivers/net/wireless/rtlwifi/pci.c | 37 |
1 files changed, 10 insertions, 27 deletions
diff --git a/drivers/net/wireless/rtlwifi/pci.c b/drivers/net/wireless/rtlwifi/pci.c index 56f12358389d..9983fa18065a 100644 --- a/drivers/net/wireless/rtlwifi/pci.c +++ b/drivers/net/wireless/rtlwifi/pci.c | |||
@@ -218,7 +218,6 @@ static void rtl_pci_disable_aspm(struct ieee80211_hw *hw) | |||
218 | struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw)); | 218 | struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw)); |
219 | struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); | 219 | struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); |
220 | u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor; | 220 | u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor; |
221 | u32 pcicfg_addrport = pcipriv->ndis_adapter.pcicfg_addrport; | ||
222 | u8 num4bytes = pcipriv->ndis_adapter.num4bytes; | 221 | u8 num4bytes = pcipriv->ndis_adapter.num4bytes; |
223 | /*Retrieve original configuration settings. */ | 222 | /*Retrieve original configuration settings. */ |
224 | u8 linkctrl_reg = pcipriv->ndis_adapter.linkctrl_reg; | 223 | u8 linkctrl_reg = pcipriv->ndis_adapter.linkctrl_reg; |
@@ -254,9 +253,8 @@ static void rtl_pci_disable_aspm(struct ieee80211_hw *hw) | |||
254 | udelay(50); | 253 | udelay(50); |
255 | 254 | ||
256 | /*4 Disable Pci Bridge ASPM */ | 255 | /*4 Disable Pci Bridge ASPM */ |
257 | rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS, | 256 | pci_write_config_byte(rtlpci->pdev, (num4bytes << 2), |
258 | pcicfg_addrport + (num4bytes << 2)); | 257 | pcibridge_linkctrlreg); |
259 | rtl_pci_raw_write_port_uchar(PCI_CONF_DATA, pcibridge_linkctrlreg); | ||
260 | 258 | ||
261 | udelay(50); | 259 | udelay(50); |
262 | } | 260 | } |
@@ -277,7 +275,6 @@ static void rtl_pci_enable_aspm(struct ieee80211_hw *hw) | |||
277 | u8 pcibridge_devnum = pcipriv->ndis_adapter.pcibridge_devnum; | 275 | u8 pcibridge_devnum = pcipriv->ndis_adapter.pcibridge_devnum; |
278 | u8 pcibridge_funcnum = pcipriv->ndis_adapter.pcibridge_funcnum; | 276 | u8 pcibridge_funcnum = pcipriv->ndis_adapter.pcibridge_funcnum; |
279 | u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor; | 277 | u8 pcibridge_vendor = pcipriv->ndis_adapter.pcibridge_vendor; |
280 | u32 pcicfg_addrport = pcipriv->ndis_adapter.pcicfg_addrport; | ||
281 | u8 num4bytes = pcipriv->ndis_adapter.num4bytes; | 278 | u8 num4bytes = pcipriv->ndis_adapter.num4bytes; |
282 | u16 aspmlevel; | 279 | u16 aspmlevel; |
283 | u8 u_pcibridge_aspmsetting; | 280 | u8 u_pcibridge_aspmsetting; |
@@ -293,8 +290,6 @@ static void rtl_pci_enable_aspm(struct ieee80211_hw *hw) | |||
293 | } | 290 | } |
294 | 291 | ||
295 | /*4 Enable Pci Bridge ASPM */ | 292 | /*4 Enable Pci Bridge ASPM */ |
296 | rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS, | ||
297 | pcicfg_addrport + (num4bytes << 2)); | ||
298 | 293 | ||
299 | u_pcibridge_aspmsetting = | 294 | u_pcibridge_aspmsetting = |
300 | pcipriv->ndis_adapter.pcibridge_linkctrlreg | | 295 | pcipriv->ndis_adapter.pcibridge_linkctrlreg | |
@@ -303,7 +298,8 @@ static void rtl_pci_enable_aspm(struct ieee80211_hw *hw) | |||
303 | if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL) | 298 | if (pcibridge_vendor == PCI_BRIDGE_VENDOR_INTEL) |
304 | u_pcibridge_aspmsetting &= ~BIT(0); | 299 | u_pcibridge_aspmsetting &= ~BIT(0); |
305 | 300 | ||
306 | rtl_pci_raw_write_port_uchar(PCI_CONF_DATA, u_pcibridge_aspmsetting); | 301 | pci_write_config_byte(rtlpci->pdev, (num4bytes << 2), |
302 | u_pcibridge_aspmsetting); | ||
307 | 303 | ||
308 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, | 304 | RT_TRACE(rtlpriv, COMP_INIT, DBG_LOUD, |
309 | ("PlatformEnableASPM():PciBridge busnumber[%x], " | 305 | ("PlatformEnableASPM():PciBridge busnumber[%x], " |
@@ -335,25 +331,18 @@ static void rtl_pci_enable_aspm(struct ieee80211_hw *hw) | |||
335 | 331 | ||
336 | static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw *hw) | 332 | static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw *hw) |
337 | { | 333 | { |
338 | struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw); | 334 | struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw)); |
339 | u32 pcicfg_addrport = pcipriv->ndis_adapter.pcicfg_addrport; | ||
340 | 335 | ||
341 | bool status = false; | 336 | bool status = false; |
342 | u8 offset_e0; | 337 | u8 offset_e0; |
343 | unsigned offset_e4; | 338 | unsigned offset_e4; |
344 | 339 | ||
345 | rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS, | 340 | pci_write_config_byte(rtlpci->pdev, 0xe0, 0xa0); |
346 | pcicfg_addrport + 0xE0); | ||
347 | rtl_pci_raw_write_port_uchar(PCI_CONF_DATA, 0xA0); | ||
348 | 341 | ||
349 | rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS, | 342 | pci_read_config_byte(rtlpci->pdev, 0xe0, &offset_e0); |
350 | pcicfg_addrport + 0xE0); | ||
351 | rtl_pci_raw_read_port_uchar(PCI_CONF_DATA, &offset_e0); | ||
352 | 343 | ||
353 | if (offset_e0 == 0xA0) { | 344 | if (offset_e0 == 0xA0) { |
354 | rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS, | 345 | pci_read_config_dword(rtlpci->pdev, 0xe4, &offset_e4); |
355 | pcicfg_addrport + 0xE4); | ||
356 | rtl_pci_raw_read_port_ulong(PCI_CONF_DATA, &offset_e4); | ||
357 | if (offset_e4 & BIT(23)) | 346 | if (offset_e4 & BIT(23)) |
358 | status = true; | 347 | status = true; |
359 | } | 348 | } |
@@ -364,17 +353,15 @@ static bool rtl_pci_get_amd_l1_patch(struct ieee80211_hw *hw) | |||
364 | static void rtl_pci_get_linkcontrol_field(struct ieee80211_hw *hw) | 353 | static void rtl_pci_get_linkcontrol_field(struct ieee80211_hw *hw) |
365 | { | 354 | { |
366 | struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw); | 355 | struct rtl_pci_priv *pcipriv = rtl_pcipriv(hw); |
356 | struct rtl_pci *rtlpci = rtl_pcidev(pcipriv); | ||
367 | u8 capabilityoffset = pcipriv->ndis_adapter.pcibridge_pciehdr_offset; | 357 | u8 capabilityoffset = pcipriv->ndis_adapter.pcibridge_pciehdr_offset; |
368 | u32 pcicfg_addrport = pcipriv->ndis_adapter.pcicfg_addrport; | ||
369 | u8 linkctrl_reg; | 358 | u8 linkctrl_reg; |
370 | u8 num4bbytes; | 359 | u8 num4bbytes; |
371 | 360 | ||
372 | num4bbytes = (capabilityoffset + 0x10) / 4; | 361 | num4bbytes = (capabilityoffset + 0x10) / 4; |
373 | 362 | ||
374 | /*Read Link Control Register */ | 363 | /*Read Link Control Register */ |
375 | rtl_pci_raw_write_port_ulong(PCI_CONF_ADDRESS, | 364 | pci_read_config_byte(rtlpci->pdev, (num4bbytes << 2), &linkctrl_reg); |
376 | pcicfg_addrport + (num4bbytes << 2)); | ||
377 | rtl_pci_raw_read_port_uchar(PCI_CONF_DATA, &linkctrl_reg); | ||
378 | 365 | ||
379 | pcipriv->ndis_adapter.pcibridge_linkctrlreg = linkctrl_reg; | 366 | pcipriv->ndis_adapter.pcibridge_linkctrlreg = linkctrl_reg; |
380 | } | 367 | } |
@@ -1718,10 +1705,6 @@ static bool _rtl_pci_find_adapter(struct pci_dev *pdev, | |||
1718 | PCI_SLOT(bridge_pdev->devfn); | 1705 | PCI_SLOT(bridge_pdev->devfn); |
1719 | pcipriv->ndis_adapter.pcibridge_funcnum = | 1706 | pcipriv->ndis_adapter.pcibridge_funcnum = |
1720 | PCI_FUNC(bridge_pdev->devfn); | 1707 | PCI_FUNC(bridge_pdev->devfn); |
1721 | pcipriv->ndis_adapter.pcicfg_addrport = | ||
1722 | (pcipriv->ndis_adapter.pcibridge_busnum << 16) | | ||
1723 | (pcipriv->ndis_adapter.pcibridge_devnum << 11) | | ||
1724 | (pcipriv->ndis_adapter.pcibridge_funcnum << 8) | (1 << 31); | ||
1725 | pcipriv->ndis_adapter.pcibridge_pciehdr_offset = | 1708 | pcipriv->ndis_adapter.pcibridge_pciehdr_offset = |
1726 | pci_pcie_cap(bridge_pdev); | 1709 | pci_pcie_cap(bridge_pdev); |
1727 | pcipriv->ndis_adapter.num4bytes = | 1710 | pcipriv->ndis_adapter.num4bytes = |