diff options
Diffstat (limited to 'drivers/net/wireless/rt2x00')
-rw-r--r-- | drivers/net/wireless/rt2x00/rt2800.h | 49 | ||||
-rw-r--r-- | drivers/net/wireless/rt2x00/rt2800lib.c | 159 | ||||
-rw-r--r-- | drivers/net/wireless/rt2x00/rt2800pci.c | 1 | ||||
-rw-r--r-- | drivers/net/wireless/rt2x00/rt2800usb.c | 1 | ||||
-rw-r--r-- | drivers/net/wireless/rt2x00/rt2x00.h | 15 | ||||
-rw-r--r-- | drivers/net/wireless/rt2x00/rt2x00dev.c | 18 |
6 files changed, 204 insertions, 39 deletions
diff --git a/drivers/net/wireless/rt2x00/rt2800.h b/drivers/net/wireless/rt2x00/rt2800.h index 2571a2fa3d09..06acabd02984 100644 --- a/drivers/net/wireless/rt2x00/rt2800.h +++ b/drivers/net/wireless/rt2x00/rt2800.h | |||
@@ -1796,6 +1796,14 @@ struct mac_iveiv_entry { | |||
1796 | #define RFCSR2_RESCAL_EN FIELD8(0x80) | 1796 | #define RFCSR2_RESCAL_EN FIELD8(0x80) |
1797 | 1797 | ||
1798 | /* | 1798 | /* |
1799 | * RFCSR 3: | ||
1800 | */ | ||
1801 | #define RFCSR3_K FIELD8(0x0f) | ||
1802 | /* Bits [7-4] for RF3320 (RT3370/RT3390), on other chipsets reserved */ | ||
1803 | #define RFCSR3_PA1_BIAS_CCK FIELD8(0x70); | ||
1804 | #define RFCSR3_PA2_CASCODE_BIAS_CCKK FIELD8(0x80); | ||
1805 | |||
1806 | /* | ||
1799 | * FRCSR 5: | 1807 | * FRCSR 5: |
1800 | */ | 1808 | */ |
1801 | #define RFCSR5_R1 FIELD8(0x0c) | 1809 | #define RFCSR5_R1 FIELD8(0x0c) |
@@ -1811,10 +1819,12 @@ struct mac_iveiv_entry { | |||
1811 | * RFCSR 7: | 1819 | * RFCSR 7: |
1812 | */ | 1820 | */ |
1813 | #define RFCSR7_RF_TUNING FIELD8(0x01) | 1821 | #define RFCSR7_RF_TUNING FIELD8(0x01) |
1814 | #define RFCSR7_R02 FIELD8(0x07) | 1822 | #define RFCSR7_BIT1 FIELD8(0x02) |
1815 | #define RFCSR7_R3 FIELD8(0x08) | 1823 | #define RFCSR7_BIT2 FIELD8(0x04) |
1816 | #define RFCSR7_R45 FIELD8(0x30) | 1824 | #define RFCSR7_BIT3 FIELD8(0x08) |
1817 | #define RFCSR7_R67 FIELD8(0xc0) | 1825 | #define RFCSR7_BIT4 FIELD8(0x10) |
1826 | #define RFCSR7_BIT5 FIELD8(0x20) | ||
1827 | #define RFCSR7_BITS67 FIELD8(0xc0) | ||
1818 | 1828 | ||
1819 | /* | 1829 | /* |
1820 | * RFCSR 11: | 1830 | * RFCSR 11: |
@@ -1839,6 +1849,11 @@ struct mac_iveiv_entry { | |||
1839 | #define RFCSR15_TX_LO2_EN FIELD8(0x08) | 1849 | #define RFCSR15_TX_LO2_EN FIELD8(0x08) |
1840 | 1850 | ||
1841 | /* | 1851 | /* |
1852 | * RFCSR 16: | ||
1853 | */ | ||
1854 | #define RFCSR16_TXMIXER_GAIN FIELD8(0x07) | ||
1855 | |||
1856 | /* | ||
1842 | * RFCSR 17: | 1857 | * RFCSR 17: |
1843 | */ | 1858 | */ |
1844 | #define RFCSR17_TXMIXER_GAIN FIELD8(0x07) | 1859 | #define RFCSR17_TXMIXER_GAIN FIELD8(0x07) |
@@ -1867,6 +1882,13 @@ struct mac_iveiv_entry { | |||
1867 | #define RFCSR23_FREQ_OFFSET FIELD8(0x7f) | 1882 | #define RFCSR23_FREQ_OFFSET FIELD8(0x7f) |
1868 | 1883 | ||
1869 | /* | 1884 | /* |
1885 | * RFCSR 24: | ||
1886 | */ | ||
1887 | #define RFCSR24_TX_AGC_FC FIELD8(0x1f) | ||
1888 | #define RFCSR24_TX_H20M FIELD8(0x20) | ||
1889 | #define RFCSR24_TX_CALIB FIELD8(0x7f) | ||
1890 | |||
1891 | /* | ||
1870 | * RFCSR 27: | 1892 | * RFCSR 27: |
1871 | */ | 1893 | */ |
1872 | #define RFCSR27_R1 FIELD8(0x03) | 1894 | #define RFCSR27_R1 FIELD8(0x03) |
@@ -1887,6 +1909,7 @@ struct mac_iveiv_entry { | |||
1887 | */ | 1909 | */ |
1888 | #define RFCSR31_RX_AGC_FC FIELD8(0x1f) | 1910 | #define RFCSR31_RX_AGC_FC FIELD8(0x1f) |
1889 | #define RFCSR31_RX_H20M FIELD8(0x20) | 1911 | #define RFCSR31_RX_H20M FIELD8(0x20) |
1912 | #define RFCSR31_RX_CALIB FIELD8(0x7f) | ||
1890 | 1913 | ||
1891 | /* | 1914 | /* |
1892 | * RFCSR 38: | 1915 | * RFCSR 38: |
@@ -2093,6 +2116,12 @@ struct mac_iveiv_entry { | |||
2093 | #define EEPROM_RSSI_A2_LNA_A2 FIELD16(0xff00) | 2116 | #define EEPROM_RSSI_A2_LNA_A2 FIELD16(0xff00) |
2094 | 2117 | ||
2095 | /* | 2118 | /* |
2119 | * EEPROM TXMIXER GAIN A offset (note overlaps with EEPROM RSSI A2). | ||
2120 | */ | ||
2121 | #define EEPROM_TXMIXER_GAIN_A 0x0026 | ||
2122 | #define EEPROM_TXMIXER_GAIN_A_VAL FIELD16(0x0007) | ||
2123 | |||
2124 | /* | ||
2096 | * EEPROM EIRP Maximum TX power values(unit: dbm) | 2125 | * EEPROM EIRP Maximum TX power values(unit: dbm) |
2097 | */ | 2126 | */ |
2098 | #define EEPROM_EIRP_MAX_TX_POWER 0x0027 | 2127 | #define EEPROM_EIRP_MAX_TX_POWER 0x0027 |
@@ -2422,4 +2451,16 @@ struct mac_iveiv_entry { | |||
2422 | */ | 2451 | */ |
2423 | #define EIRP_MAX_TX_POWER_LIMIT 0x50 | 2452 | #define EIRP_MAX_TX_POWER_LIMIT 0x50 |
2424 | 2453 | ||
2454 | /* | ||
2455 | * RT2800 driver data structure | ||
2456 | */ | ||
2457 | struct rt2800_drv_data { | ||
2458 | u8 calibration_bw20; | ||
2459 | u8 calibration_bw40; | ||
2460 | u8 bbp25; | ||
2461 | u8 bbp26; | ||
2462 | u8 txmixer_gain_24g; | ||
2463 | u8 txmixer_gain_5g; | ||
2464 | }; | ||
2465 | |||
2425 | #endif /* RT2800_H */ | 2466 | #endif /* RT2800_H */ |
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c index dbe7ece862f2..772d4aec303a 100644 --- a/drivers/net/wireless/rt2x00/rt2800lib.c +++ b/drivers/net/wireless/rt2x00/rt2800lib.c | |||
@@ -1645,10 +1645,14 @@ static void rt2800_config_channel_rf3xxx(struct rt2x00_dev *rt2x00dev, | |||
1645 | struct rf_channel *rf, | 1645 | struct rf_channel *rf, |
1646 | struct channel_info *info) | 1646 | struct channel_info *info) |
1647 | { | 1647 | { |
1648 | u8 rfcsr; | 1648 | struct rt2800_drv_data *drv_data = rt2x00dev->drv_data; |
1649 | u8 rfcsr, calib_tx, calib_rx; | ||
1649 | 1650 | ||
1650 | rt2800_rfcsr_write(rt2x00dev, 2, rf->rf1); | 1651 | rt2800_rfcsr_write(rt2x00dev, 2, rf->rf1); |
1651 | rt2800_rfcsr_write(rt2x00dev, 3, rf->rf3); | 1652 | |
1653 | rt2800_rfcsr_read(rt2x00dev, 3, &rfcsr); | ||
1654 | rt2x00_set_field8(&rfcsr, RFCSR3_K, rf->rf3); | ||
1655 | rt2800_rfcsr_write(rt2x00dev, 3, rfcsr); | ||
1652 | 1656 | ||
1653 | rt2800_rfcsr_read(rt2x00dev, 6, &rfcsr); | 1657 | rt2800_rfcsr_read(rt2x00dev, 6, &rfcsr); |
1654 | rt2x00_set_field8(&rfcsr, RFCSR6_R1, rf->rf2); | 1658 | rt2x00_set_field8(&rfcsr, RFCSR6_R1, rf->rf2); |
@@ -1662,16 +1666,82 @@ static void rt2800_config_channel_rf3xxx(struct rt2x00_dev *rt2x00dev, | |||
1662 | rt2x00_set_field8(&rfcsr, RFCSR13_TX_POWER, info->default_power2); | 1666 | rt2x00_set_field8(&rfcsr, RFCSR13_TX_POWER, info->default_power2); |
1663 | rt2800_rfcsr_write(rt2x00dev, 13, rfcsr); | 1667 | rt2800_rfcsr_write(rt2x00dev, 13, rfcsr); |
1664 | 1668 | ||
1669 | rt2800_rfcsr_read(rt2x00dev, 1, &rfcsr); | ||
1670 | rt2x00_set_field8(&rfcsr, RFCSR1_RX0_PD, 0); | ||
1671 | rt2x00_set_field8(&rfcsr, RFCSR1_TX0_PD, 0); | ||
1672 | if (rt2x00_rt(rt2x00dev, RT3390)) { | ||
1673 | rt2x00_set_field8(&rfcsr, RFCSR1_RX1_PD, | ||
1674 | rt2x00dev->default_ant.rx_chain_num == 1); | ||
1675 | rt2x00_set_field8(&rfcsr, RFCSR1_TX1_PD, | ||
1676 | rt2x00dev->default_ant.tx_chain_num == 1); | ||
1677 | } else { | ||
1678 | rt2x00_set_field8(&rfcsr, RFCSR1_RX1_PD, 0); | ||
1679 | rt2x00_set_field8(&rfcsr, RFCSR1_TX1_PD, 0); | ||
1680 | rt2x00_set_field8(&rfcsr, RFCSR1_RX2_PD, 0); | ||
1681 | rt2x00_set_field8(&rfcsr, RFCSR1_TX2_PD, 0); | ||
1682 | |||
1683 | switch (rt2x00dev->default_ant.tx_chain_num) { | ||
1684 | case 1: | ||
1685 | rt2x00_set_field8(&rfcsr, RFCSR1_TX1_PD, 1); | ||
1686 | /* fall through */ | ||
1687 | case 2: | ||
1688 | rt2x00_set_field8(&rfcsr, RFCSR1_TX2_PD, 1); | ||
1689 | break; | ||
1690 | } | ||
1691 | |||
1692 | switch (rt2x00dev->default_ant.rx_chain_num) { | ||
1693 | case 1: | ||
1694 | rt2x00_set_field8(&rfcsr, RFCSR1_RX1_PD, 1); | ||
1695 | /* fall through */ | ||
1696 | case 2: | ||
1697 | rt2x00_set_field8(&rfcsr, RFCSR1_RX2_PD, 1); | ||
1698 | break; | ||
1699 | } | ||
1700 | } | ||
1701 | rt2800_rfcsr_write(rt2x00dev, 1, rfcsr); | ||
1702 | |||
1703 | rt2800_rfcsr_read(rt2x00dev, 30, &rfcsr); | ||
1704 | rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 1); | ||
1705 | rt2800_rfcsr_write(rt2x00dev, 30, rfcsr); | ||
1706 | msleep(1); | ||
1707 | rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 0); | ||
1708 | rt2800_rfcsr_write(rt2x00dev, 30, rfcsr); | ||
1709 | |||
1665 | rt2800_rfcsr_read(rt2x00dev, 23, &rfcsr); | 1710 | rt2800_rfcsr_read(rt2x00dev, 23, &rfcsr); |
1666 | rt2x00_set_field8(&rfcsr, RFCSR23_FREQ_OFFSET, rt2x00dev->freq_offset); | 1711 | rt2x00_set_field8(&rfcsr, RFCSR23_FREQ_OFFSET, rt2x00dev->freq_offset); |
1667 | rt2800_rfcsr_write(rt2x00dev, 23, rfcsr); | 1712 | rt2800_rfcsr_write(rt2x00dev, 23, rfcsr); |
1668 | 1713 | ||
1669 | rt2800_rfcsr_write(rt2x00dev, 24, | 1714 | if (rt2x00_rt(rt2x00dev, RT3390)) { |
1670 | rt2x00dev->calibration[conf_is_ht40(conf)]); | 1715 | calib_tx = conf_is_ht40(conf) ? 0x68 : 0x4f; |
1716 | calib_rx = conf_is_ht40(conf) ? 0x6f : 0x4f; | ||
1717 | } else { | ||
1718 | if (conf_is_ht40(conf)) { | ||
1719 | calib_tx = drv_data->calibration_bw40; | ||
1720 | calib_rx = drv_data->calibration_bw40; | ||
1721 | } else { | ||
1722 | calib_tx = drv_data->calibration_bw20; | ||
1723 | calib_rx = drv_data->calibration_bw20; | ||
1724 | } | ||
1725 | } | ||
1726 | |||
1727 | rt2800_rfcsr_read(rt2x00dev, 24, &rfcsr); | ||
1728 | rt2x00_set_field8(&rfcsr, RFCSR24_TX_CALIB, calib_tx); | ||
1729 | rt2800_rfcsr_write(rt2x00dev, 24, rfcsr); | ||
1730 | |||
1731 | rt2800_rfcsr_read(rt2x00dev, 31, &rfcsr); | ||
1732 | rt2x00_set_field8(&rfcsr, RFCSR31_RX_CALIB, calib_rx); | ||
1733 | rt2800_rfcsr_write(rt2x00dev, 31, rfcsr); | ||
1671 | 1734 | ||
1672 | rt2800_rfcsr_read(rt2x00dev, 7, &rfcsr); | 1735 | rt2800_rfcsr_read(rt2x00dev, 7, &rfcsr); |
1673 | rt2x00_set_field8(&rfcsr, RFCSR7_RF_TUNING, 1); | 1736 | rt2x00_set_field8(&rfcsr, RFCSR7_RF_TUNING, 1); |
1674 | rt2800_rfcsr_write(rt2x00dev, 7, rfcsr); | 1737 | rt2800_rfcsr_write(rt2x00dev, 7, rfcsr); |
1738 | |||
1739 | rt2800_rfcsr_read(rt2x00dev, 30, &rfcsr); | ||
1740 | rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 1); | ||
1741 | rt2800_rfcsr_write(rt2x00dev, 30, rfcsr); | ||
1742 | msleep(1); | ||
1743 | rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 0); | ||
1744 | rt2800_rfcsr_write(rt2x00dev, 30, rfcsr); | ||
1675 | } | 1745 | } |
1676 | 1746 | ||
1677 | static void rt2800_config_channel_rf3052(struct rt2x00_dev *rt2x00dev, | 1747 | static void rt2800_config_channel_rf3052(struct rt2x00_dev *rt2x00dev, |
@@ -1679,12 +1749,13 @@ static void rt2800_config_channel_rf3052(struct rt2x00_dev *rt2x00dev, | |||
1679 | struct rf_channel *rf, | 1749 | struct rf_channel *rf, |
1680 | struct channel_info *info) | 1750 | struct channel_info *info) |
1681 | { | 1751 | { |
1752 | struct rt2800_drv_data *drv_data = rt2x00dev->drv_data; | ||
1682 | u8 rfcsr; | 1753 | u8 rfcsr; |
1683 | u32 reg; | 1754 | u32 reg; |
1684 | 1755 | ||
1685 | if (rf->channel <= 14) { | 1756 | if (rf->channel <= 14) { |
1686 | rt2800_bbp_write(rt2x00dev, 25, 0x15); | 1757 | rt2800_bbp_write(rt2x00dev, 25, drv_data->bbp25); |
1687 | rt2800_bbp_write(rt2x00dev, 26, 0x85); | 1758 | rt2800_bbp_write(rt2x00dev, 26, drv_data->bbp26); |
1688 | } else { | 1759 | } else { |
1689 | rt2800_bbp_write(rt2x00dev, 25, 0x09); | 1760 | rt2800_bbp_write(rt2x00dev, 25, 0x09); |
1690 | rt2800_bbp_write(rt2x00dev, 26, 0xff); | 1761 | rt2800_bbp_write(rt2x00dev, 26, 0xff); |
@@ -1712,8 +1783,7 @@ static void rt2800_config_channel_rf3052(struct rt2x00_dev *rt2x00dev, | |||
1712 | if (rf->channel <= 14) { | 1783 | if (rf->channel <= 14) { |
1713 | rt2x00_set_field8(&rfcsr, RFCSR12_DR0, 3); | 1784 | rt2x00_set_field8(&rfcsr, RFCSR12_DR0, 3); |
1714 | rt2x00_set_field8(&rfcsr, RFCSR12_TX_POWER, | 1785 | rt2x00_set_field8(&rfcsr, RFCSR12_TX_POWER, |
1715 | (info->default_power1 & 0x3) | | 1786 | info->default_power1); |
1716 | ((info->default_power1 & 0xC) << 1)); | ||
1717 | } else { | 1787 | } else { |
1718 | rt2x00_set_field8(&rfcsr, RFCSR12_DR0, 7); | 1788 | rt2x00_set_field8(&rfcsr, RFCSR12_DR0, 7); |
1719 | rt2x00_set_field8(&rfcsr, RFCSR12_TX_POWER, | 1789 | rt2x00_set_field8(&rfcsr, RFCSR12_TX_POWER, |
@@ -1726,8 +1796,7 @@ static void rt2800_config_channel_rf3052(struct rt2x00_dev *rt2x00dev, | |||
1726 | if (rf->channel <= 14) { | 1796 | if (rf->channel <= 14) { |
1727 | rt2x00_set_field8(&rfcsr, RFCSR13_DR0, 3); | 1797 | rt2x00_set_field8(&rfcsr, RFCSR13_DR0, 3); |
1728 | rt2x00_set_field8(&rfcsr, RFCSR13_TX_POWER, | 1798 | rt2x00_set_field8(&rfcsr, RFCSR13_TX_POWER, |
1729 | (info->default_power2 & 0x3) | | 1799 | info->default_power2); |
1730 | ((info->default_power2 & 0xC) << 1)); | ||
1731 | } else { | 1800 | } else { |
1732 | rt2x00_set_field8(&rfcsr, RFCSR13_DR0, 7); | 1801 | rt2x00_set_field8(&rfcsr, RFCSR13_DR0, 7); |
1733 | rt2x00_set_field8(&rfcsr, RFCSR13_TX_POWER, | 1802 | rt2x00_set_field8(&rfcsr, RFCSR13_TX_POWER, |
@@ -1737,11 +1806,12 @@ static void rt2800_config_channel_rf3052(struct rt2x00_dev *rt2x00dev, | |||
1737 | rt2800_rfcsr_write(rt2x00dev, 13, rfcsr); | 1806 | rt2800_rfcsr_write(rt2x00dev, 13, rfcsr); |
1738 | 1807 | ||
1739 | rt2800_rfcsr_read(rt2x00dev, 1, &rfcsr); | 1808 | rt2800_rfcsr_read(rt2x00dev, 1, &rfcsr); |
1740 | rt2x00_set_field8(&rfcsr, RFCSR1_RF_BLOCK_EN, 1); | ||
1741 | rt2x00_set_field8(&rfcsr, RFCSR1_RX0_PD, 0); | 1809 | rt2x00_set_field8(&rfcsr, RFCSR1_RX0_PD, 0); |
1742 | rt2x00_set_field8(&rfcsr, RFCSR1_TX0_PD, 0); | 1810 | rt2x00_set_field8(&rfcsr, RFCSR1_TX0_PD, 0); |
1743 | rt2x00_set_field8(&rfcsr, RFCSR1_RX1_PD, 0); | 1811 | rt2x00_set_field8(&rfcsr, RFCSR1_RX1_PD, 0); |
1744 | rt2x00_set_field8(&rfcsr, RFCSR1_TX1_PD, 0); | 1812 | rt2x00_set_field8(&rfcsr, RFCSR1_TX1_PD, 0); |
1813 | rt2x00_set_field8(&rfcsr, RFCSR1_RX2_PD, 0); | ||
1814 | rt2x00_set_field8(&rfcsr, RFCSR1_TX2_PD, 0); | ||
1745 | if (test_bit(CAPABILITY_BT_COEXIST, &rt2x00dev->cap_flags)) { | 1815 | if (test_bit(CAPABILITY_BT_COEXIST, &rt2x00dev->cap_flags)) { |
1746 | if (rf->channel <= 14) { | 1816 | if (rf->channel <= 14) { |
1747 | rt2x00_set_field8(&rfcsr, RFCSR1_RX0_PD, 1); | 1817 | rt2x00_set_field8(&rfcsr, RFCSR1_RX0_PD, 1); |
@@ -1772,10 +1842,13 @@ static void rt2800_config_channel_rf3052(struct rt2x00_dev *rt2x00dev, | |||
1772 | rt2x00_set_field8(&rfcsr, RFCSR23_FREQ_OFFSET, rt2x00dev->freq_offset); | 1842 | rt2x00_set_field8(&rfcsr, RFCSR23_FREQ_OFFSET, rt2x00dev->freq_offset); |
1773 | rt2800_rfcsr_write(rt2x00dev, 23, rfcsr); | 1843 | rt2800_rfcsr_write(rt2x00dev, 23, rfcsr); |
1774 | 1844 | ||
1775 | rt2800_rfcsr_write(rt2x00dev, 24, | 1845 | if (conf_is_ht40(conf)) { |
1776 | rt2x00dev->calibration[conf_is_ht40(conf)]); | 1846 | rt2800_rfcsr_write(rt2x00dev, 24, drv_data->calibration_bw40); |
1777 | rt2800_rfcsr_write(rt2x00dev, 31, | 1847 | rt2800_rfcsr_write(rt2x00dev, 31, drv_data->calibration_bw40); |
1778 | rt2x00dev->calibration[conf_is_ht40(conf)]); | 1848 | } else { |
1849 | rt2800_rfcsr_write(rt2x00dev, 24, drv_data->calibration_bw20); | ||
1850 | rt2800_rfcsr_write(rt2x00dev, 31, drv_data->calibration_bw20); | ||
1851 | } | ||
1779 | 1852 | ||
1780 | if (rf->channel <= 14) { | 1853 | if (rf->channel <= 14) { |
1781 | rt2800_rfcsr_write(rt2x00dev, 7, 0xd8); | 1854 | rt2800_rfcsr_write(rt2x00dev, 7, 0xd8); |
@@ -1783,7 +1856,10 @@ static void rt2800_config_channel_rf3052(struct rt2x00_dev *rt2x00dev, | |||
1783 | rt2800_rfcsr_write(rt2x00dev, 10, 0xf1); | 1856 | rt2800_rfcsr_write(rt2x00dev, 10, 0xf1); |
1784 | rt2800_rfcsr_write(rt2x00dev, 11, 0xb9); | 1857 | rt2800_rfcsr_write(rt2x00dev, 11, 0xb9); |
1785 | rt2800_rfcsr_write(rt2x00dev, 15, 0x53); | 1858 | rt2800_rfcsr_write(rt2x00dev, 15, 0x53); |
1786 | rt2800_rfcsr_write(rt2x00dev, 16, 0x4c); | 1859 | rfcsr = 0x4c; |
1860 | rt2x00_set_field8(&rfcsr, RFCSR16_TXMIXER_GAIN, | ||
1861 | drv_data->txmixer_gain_24g); | ||
1862 | rt2800_rfcsr_write(rt2x00dev, 16, rfcsr); | ||
1787 | rt2800_rfcsr_write(rt2x00dev, 17, 0x23); | 1863 | rt2800_rfcsr_write(rt2x00dev, 17, 0x23); |
1788 | rt2800_rfcsr_write(rt2x00dev, 19, 0x93); | 1864 | rt2800_rfcsr_write(rt2x00dev, 19, 0x93); |
1789 | rt2800_rfcsr_write(rt2x00dev, 20, 0xb3); | 1865 | rt2800_rfcsr_write(rt2x00dev, 20, 0xb3); |
@@ -1792,12 +1868,20 @@ static void rt2800_config_channel_rf3052(struct rt2x00_dev *rt2x00dev, | |||
1792 | rt2800_rfcsr_write(rt2x00dev, 27, 0x00); | 1868 | rt2800_rfcsr_write(rt2x00dev, 27, 0x00); |
1793 | rt2800_rfcsr_write(rt2x00dev, 29, 0x9b); | 1869 | rt2800_rfcsr_write(rt2x00dev, 29, 0x9b); |
1794 | } else { | 1870 | } else { |
1795 | rt2800_rfcsr_write(rt2x00dev, 7, 0x14); | 1871 | rt2800_rfcsr_read(rt2x00dev, 7, &rfcsr); |
1872 | rt2x00_set_field8(&rfcsr, RFCSR7_BIT2, 1); | ||
1873 | rt2x00_set_field8(&rfcsr, RFCSR7_BIT3, 0); | ||
1874 | rt2x00_set_field8(&rfcsr, RFCSR7_BIT4, 1); | ||
1875 | rt2x00_set_field8(&rfcsr, RFCSR7_BITS67, 0); | ||
1876 | rt2800_rfcsr_write(rt2x00dev, 7, rfcsr); | ||
1796 | rt2800_rfcsr_write(rt2x00dev, 9, 0xc0); | 1877 | rt2800_rfcsr_write(rt2x00dev, 9, 0xc0); |
1797 | rt2800_rfcsr_write(rt2x00dev, 10, 0xf1); | 1878 | rt2800_rfcsr_write(rt2x00dev, 10, 0xf1); |
1798 | rt2800_rfcsr_write(rt2x00dev, 11, 0x00); | 1879 | rt2800_rfcsr_write(rt2x00dev, 11, 0x00); |
1799 | rt2800_rfcsr_write(rt2x00dev, 15, 0x43); | 1880 | rt2800_rfcsr_write(rt2x00dev, 15, 0x43); |
1800 | rt2800_rfcsr_write(rt2x00dev, 16, 0x7a); | 1881 | rfcsr = 0x7a; |
1882 | rt2x00_set_field8(&rfcsr, RFCSR16_TXMIXER_GAIN, | ||
1883 | drv_data->txmixer_gain_5g); | ||
1884 | rt2800_rfcsr_write(rt2x00dev, 16, rfcsr); | ||
1801 | rt2800_rfcsr_write(rt2x00dev, 17, 0x23); | 1885 | rt2800_rfcsr_write(rt2x00dev, 17, 0x23); |
1802 | if (rf->channel <= 64) { | 1886 | if (rf->channel <= 64) { |
1803 | rt2800_rfcsr_write(rt2x00dev, 19, 0xb7); | 1887 | rt2800_rfcsr_write(rt2x00dev, 19, 0xb7); |
@@ -3246,6 +3330,7 @@ static u8 rt2800_init_rx_filter(struct rt2x00_dev *rt2x00dev, | |||
3246 | 3330 | ||
3247 | static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev) | 3331 | static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev) |
3248 | { | 3332 | { |
3333 | struct rt2800_drv_data *drv_data = rt2x00dev->drv_data; | ||
3249 | u8 rfcsr; | 3334 | u8 rfcsr; |
3250 | u8 bbp; | 3335 | u8 bbp; |
3251 | u32 reg; | 3336 | u32 reg; |
@@ -3534,20 +3619,26 @@ static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev) | |||
3534 | * Set RX Filter calibration for 20MHz and 40MHz | 3619 | * Set RX Filter calibration for 20MHz and 40MHz |
3535 | */ | 3620 | */ |
3536 | if (rt2x00_rt(rt2x00dev, RT3070)) { | 3621 | if (rt2x00_rt(rt2x00dev, RT3070)) { |
3537 | rt2x00dev->calibration[0] = | 3622 | drv_data->calibration_bw20 = |
3538 | rt2800_init_rx_filter(rt2x00dev, false, 0x07, 0x16); | 3623 | rt2800_init_rx_filter(rt2x00dev, false, 0x07, 0x16); |
3539 | rt2x00dev->calibration[1] = | 3624 | drv_data->calibration_bw40 = |
3540 | rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x19); | 3625 | rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x19); |
3541 | } else if (rt2x00_rt(rt2x00dev, RT3071) || | 3626 | } else if (rt2x00_rt(rt2x00dev, RT3071) || |
3542 | rt2x00_rt(rt2x00dev, RT3090) || | 3627 | rt2x00_rt(rt2x00dev, RT3090) || |
3543 | rt2x00_rt(rt2x00dev, RT3390) || | 3628 | rt2x00_rt(rt2x00dev, RT3390) || |
3544 | rt2x00_rt(rt2x00dev, RT3572)) { | 3629 | rt2x00_rt(rt2x00dev, RT3572)) { |
3545 | rt2x00dev->calibration[0] = | 3630 | drv_data->calibration_bw20 = |
3546 | rt2800_init_rx_filter(rt2x00dev, false, 0x07, 0x13); | 3631 | rt2800_init_rx_filter(rt2x00dev, false, 0x07, 0x13); |
3547 | rt2x00dev->calibration[1] = | 3632 | drv_data->calibration_bw40 = |
3548 | rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x15); | 3633 | rt2800_init_rx_filter(rt2x00dev, true, 0x27, 0x15); |
3549 | } | 3634 | } |
3550 | 3635 | ||
3636 | /* | ||
3637 | * Save BBP 25 & 26 values for later use in channel switching | ||
3638 | */ | ||
3639 | rt2800_bbp_read(rt2x00dev, 25, &drv_data->bbp25); | ||
3640 | rt2800_bbp_read(rt2x00dev, 26, &drv_data->bbp26); | ||
3641 | |||
3551 | if (!rt2x00_rt(rt2x00dev, RT5390)) { | 3642 | if (!rt2x00_rt(rt2x00dev, RT5390)) { |
3552 | /* | 3643 | /* |
3553 | * Set back to initial state | 3644 | * Set back to initial state |
@@ -3587,11 +3678,8 @@ static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev) | |||
3587 | &rt2x00dev->cap_flags)) | 3678 | &rt2x00dev->cap_flags)) |
3588 | rt2x00_set_field8(&rfcsr, RFCSR17_R, 1); | 3679 | rt2x00_set_field8(&rfcsr, RFCSR17_R, 1); |
3589 | } | 3680 | } |
3590 | rt2x00_eeprom_read(rt2x00dev, EEPROM_TXMIXER_GAIN_BG, &eeprom); | 3681 | rt2x00_set_field8(&rfcsr, RFCSR17_TXMIXER_GAIN, |
3591 | if (rt2x00_get_field16(eeprom, EEPROM_TXMIXER_GAIN_BG_VAL) >= 1) | 3682 | drv_data->txmixer_gain_24g); |
3592 | rt2x00_set_field8(&rfcsr, RFCSR17_TXMIXER_GAIN, | ||
3593 | rt2x00_get_field16(eeprom, | ||
3594 | EEPROM_TXMIXER_GAIN_BG_VAL)); | ||
3595 | rt2800_rfcsr_write(rt2x00dev, 17, rfcsr); | 3683 | rt2800_rfcsr_write(rt2x00dev, 17, rfcsr); |
3596 | } | 3684 | } |
3597 | 3685 | ||
@@ -3799,6 +3887,7 @@ EXPORT_SYMBOL_GPL(rt2800_read_eeprom_efuse); | |||
3799 | 3887 | ||
3800 | int rt2800_validate_eeprom(struct rt2x00_dev *rt2x00dev) | 3888 | int rt2800_validate_eeprom(struct rt2x00_dev *rt2x00dev) |
3801 | { | 3889 | { |
3890 | struct rt2800_drv_data *drv_data = rt2x00dev->drv_data; | ||
3802 | u16 word; | 3891 | u16 word; |
3803 | u8 *mac; | 3892 | u8 *mac; |
3804 | u8 default_lna_gain; | 3893 | u8 default_lna_gain; |
@@ -3882,6 +3971,14 @@ int rt2800_validate_eeprom(struct rt2x00_dev *rt2x00dev) | |||
3882 | rt2x00_set_field16(&word, EEPROM_RSSI_BG_OFFSET1, 0); | 3971 | rt2x00_set_field16(&word, EEPROM_RSSI_BG_OFFSET1, 0); |
3883 | rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_BG, word); | 3972 | rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_BG, word); |
3884 | 3973 | ||
3974 | rt2x00_eeprom_read(rt2x00dev, EEPROM_TXMIXER_GAIN_BG, &word); | ||
3975 | if ((word & 0x00ff) != 0x00ff) { | ||
3976 | drv_data->txmixer_gain_24g = | ||
3977 | rt2x00_get_field16(word, EEPROM_TXMIXER_GAIN_BG_VAL); | ||
3978 | } else { | ||
3979 | drv_data->txmixer_gain_24g = 0; | ||
3980 | } | ||
3981 | |||
3885 | rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_BG2, &word); | 3982 | rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_BG2, &word); |
3886 | if (abs(rt2x00_get_field16(word, EEPROM_RSSI_BG2_OFFSET2)) > 10) | 3983 | if (abs(rt2x00_get_field16(word, EEPROM_RSSI_BG2_OFFSET2)) > 10) |
3887 | rt2x00_set_field16(&word, EEPROM_RSSI_BG2_OFFSET2, 0); | 3984 | rt2x00_set_field16(&word, EEPROM_RSSI_BG2_OFFSET2, 0); |
@@ -3891,6 +3988,14 @@ int rt2800_validate_eeprom(struct rt2x00_dev *rt2x00dev) | |||
3891 | default_lna_gain); | 3988 | default_lna_gain); |
3892 | rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_BG2, word); | 3989 | rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_BG2, word); |
3893 | 3990 | ||
3991 | rt2x00_eeprom_read(rt2x00dev, EEPROM_TXMIXER_GAIN_A, &word); | ||
3992 | if ((word & 0x00ff) != 0x00ff) { | ||
3993 | drv_data->txmixer_gain_5g = | ||
3994 | rt2x00_get_field16(word, EEPROM_TXMIXER_GAIN_A_VAL); | ||
3995 | } else { | ||
3996 | drv_data->txmixer_gain_5g = 0; | ||
3997 | } | ||
3998 | |||
3894 | rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_A, &word); | 3999 | rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_A, &word); |
3895 | if (abs(rt2x00_get_field16(word, EEPROM_RSSI_A_OFFSET0)) > 10) | 4000 | if (abs(rt2x00_get_field16(word, EEPROM_RSSI_A_OFFSET0)) > 10) |
3896 | rt2x00_set_field16(&word, EEPROM_RSSI_A_OFFSET0, 0); | 4001 | rt2x00_set_field16(&word, EEPROM_RSSI_A_OFFSET0, 0); |
diff --git a/drivers/net/wireless/rt2x00/rt2800pci.c b/drivers/net/wireless/rt2x00/rt2800pci.c index 4e985026985c..6ad692914ee9 100644 --- a/drivers/net/wireless/rt2x00/rt2800pci.c +++ b/drivers/net/wireless/rt2x00/rt2800pci.c | |||
@@ -1093,6 +1093,7 @@ static const struct data_queue_desc rt2800pci_queue_bcn = { | |||
1093 | 1093 | ||
1094 | static const struct rt2x00_ops rt2800pci_ops = { | 1094 | static const struct rt2x00_ops rt2800pci_ops = { |
1095 | .name = KBUILD_MODNAME, | 1095 | .name = KBUILD_MODNAME, |
1096 | .drv_data_size = sizeof(struct rt2800_drv_data), | ||
1096 | .max_sta_intf = 1, | 1097 | .max_sta_intf = 1, |
1097 | .max_ap_intf = 8, | 1098 | .max_ap_intf = 8, |
1098 | .eeprom_size = EEPROM_SIZE, | 1099 | .eeprom_size = EEPROM_SIZE, |
diff --git a/drivers/net/wireless/rt2x00/rt2800usb.c b/drivers/net/wireless/rt2x00/rt2800usb.c index f0074bcee7c9..d009b6b794bb 100644 --- a/drivers/net/wireless/rt2x00/rt2800usb.c +++ b/drivers/net/wireless/rt2x00/rt2800usb.c | |||
@@ -827,6 +827,7 @@ static const struct data_queue_desc rt2800usb_queue_bcn = { | |||
827 | 827 | ||
828 | static const struct rt2x00_ops rt2800usb_ops = { | 828 | static const struct rt2x00_ops rt2800usb_ops = { |
829 | .name = KBUILD_MODNAME, | 829 | .name = KBUILD_MODNAME, |
830 | .drv_data_size = sizeof(struct rt2800_drv_data), | ||
830 | .max_sta_intf = 1, | 831 | .max_sta_intf = 1, |
831 | .max_ap_intf = 8, | 832 | .max_ap_intf = 8, |
832 | .eeprom_size = EEPROM_SIZE, | 833 | .eeprom_size = EEPROM_SIZE, |
diff --git a/drivers/net/wireless/rt2x00/rt2x00.h b/drivers/net/wireless/rt2x00/rt2x00.h index b03b22c47b18..ed2ae6efcaa3 100644 --- a/drivers/net/wireless/rt2x00/rt2x00.h +++ b/drivers/net/wireless/rt2x00/rt2x00.h | |||
@@ -647,6 +647,7 @@ struct rt2x00lib_ops { | |||
647 | */ | 647 | */ |
648 | struct rt2x00_ops { | 648 | struct rt2x00_ops { |
649 | const char *name; | 649 | const char *name; |
650 | const unsigned int drv_data_size; | ||
650 | const unsigned int max_sta_intf; | 651 | const unsigned int max_sta_intf; |
651 | const unsigned int max_ap_intf; | 652 | const unsigned int max_ap_intf; |
652 | const unsigned int eeprom_size; | 653 | const unsigned int eeprom_size; |
@@ -742,6 +743,11 @@ struct rt2x00_dev { | |||
742 | const struct rt2x00_ops *ops; | 743 | const struct rt2x00_ops *ops; |
743 | 744 | ||
744 | /* | 745 | /* |
746 | * Driver data. | ||
747 | */ | ||
748 | void *drv_data; | ||
749 | |||
750 | /* | ||
745 | * IEEE80211 control structure. | 751 | * IEEE80211 control structure. |
746 | */ | 752 | */ |
747 | struct ieee80211_hw *hw; | 753 | struct ieee80211_hw *hw; |
@@ -886,18 +892,11 @@ struct rt2x00_dev { | |||
886 | u8 rssi_offset; | 892 | u8 rssi_offset; |
887 | 893 | ||
888 | /* | 894 | /* |
889 | * Frequency offset (for rt61pci & rt73usb). | 895 | * Frequency offset. |
890 | */ | 896 | */ |
891 | u8 freq_offset; | 897 | u8 freq_offset; |
892 | 898 | ||
893 | /* | 899 | /* |
894 | * Calibration information (for rt2800usb & rt2800pci). | ||
895 | * [0] -> BW20 | ||
896 | * [1] -> BW40 | ||
897 | */ | ||
898 | u8 calibration[2]; | ||
899 | |||
900 | /* | ||
901 | * Association id. | 900 | * Association id. |
902 | */ | 901 | */ |
903 | u16 aid; | 902 | u16 aid; |
diff --git a/drivers/net/wireless/rt2x00/rt2x00dev.c b/drivers/net/wireless/rt2x00/rt2x00dev.c index c3e1aa7c1a80..bae5b01299ea 100644 --- a/drivers/net/wireless/rt2x00/rt2x00dev.c +++ b/drivers/net/wireless/rt2x00/rt2x00dev.c | |||
@@ -1121,6 +1121,18 @@ int rt2x00lib_probe_dev(struct rt2x00_dev *rt2x00dev) | |||
1121 | { | 1121 | { |
1122 | int retval = -ENOMEM; | 1122 | int retval = -ENOMEM; |
1123 | 1123 | ||
1124 | /* | ||
1125 | * Allocate the driver data memory, if necessary. | ||
1126 | */ | ||
1127 | if (rt2x00dev->ops->drv_data_size > 0) { | ||
1128 | rt2x00dev->drv_data = kzalloc(rt2x00dev->ops->drv_data_size, | ||
1129 | GFP_KERNEL); | ||
1130 | if (!rt2x00dev->drv_data) { | ||
1131 | retval = -ENOMEM; | ||
1132 | goto exit; | ||
1133 | } | ||
1134 | } | ||
1135 | |||
1124 | spin_lock_init(&rt2x00dev->irqmask_lock); | 1136 | spin_lock_init(&rt2x00dev->irqmask_lock); |
1125 | mutex_init(&rt2x00dev->csr_mutex); | 1137 | mutex_init(&rt2x00dev->csr_mutex); |
1126 | 1138 | ||
@@ -1261,6 +1273,12 @@ void rt2x00lib_remove_dev(struct rt2x00_dev *rt2x00dev) | |||
1261 | * Free queue structures. | 1273 | * Free queue structures. |
1262 | */ | 1274 | */ |
1263 | rt2x00queue_free(rt2x00dev); | 1275 | rt2x00queue_free(rt2x00dev); |
1276 | |||
1277 | /* | ||
1278 | * Free the driver data. | ||
1279 | */ | ||
1280 | if (rt2x00dev->drv_data) | ||
1281 | kfree(rt2x00dev->drv_data); | ||
1264 | } | 1282 | } |
1265 | EXPORT_SYMBOL_GPL(rt2x00lib_remove_dev); | 1283 | EXPORT_SYMBOL_GPL(rt2x00lib_remove_dev); |
1266 | 1284 | ||