diff options
Diffstat (limited to 'drivers/net/wireless/rt2x00/rt61pci.c')
-rw-r--r-- | drivers/net/wireless/rt2x00/rt61pci.c | 185 |
1 files changed, 107 insertions, 78 deletions
diff --git a/drivers/net/wireless/rt2x00/rt61pci.c b/drivers/net/wireless/rt2x00/rt61pci.c index 987e89009f74..d81a8de9dc17 100644 --- a/drivers/net/wireless/rt2x00/rt61pci.c +++ b/drivers/net/wireless/rt2x00/rt61pci.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | Copyright (C) 2004 - 2008 rt2x00 SourceForge Project | 2 | Copyright (C) 2004 - 2009 rt2x00 SourceForge Project |
3 | <http://rt2x00.serialmonkey.com> | 3 | <http://rt2x00.serialmonkey.com> |
4 | 4 | ||
5 | This program is free software; you can redistribute it and/or modify | 5 | This program is free software; you can redistribute it and/or modify |
@@ -146,12 +146,6 @@ static void rt61pci_rf_write(struct rt2x00_dev *rt2x00dev, | |||
146 | mutex_unlock(&rt2x00dev->csr_mutex); | 146 | mutex_unlock(&rt2x00dev->csr_mutex); |
147 | } | 147 | } |
148 | 148 | ||
149 | #ifdef CONFIG_RT2X00_LIB_LEDS | ||
150 | /* | ||
151 | * This function is only called from rt61pci_led_brightness() | ||
152 | * make gcc happy by placing this function inside the | ||
153 | * same ifdef statement as the caller. | ||
154 | */ | ||
155 | static void rt61pci_mcu_request(struct rt2x00_dev *rt2x00dev, | 149 | static void rt61pci_mcu_request(struct rt2x00_dev *rt2x00dev, |
156 | const u8 command, const u8 token, | 150 | const u8 command, const u8 token, |
157 | const u8 arg0, const u8 arg1) | 151 | const u8 arg0, const u8 arg1) |
@@ -180,7 +174,6 @@ static void rt61pci_mcu_request(struct rt2x00_dev *rt2x00dev, | |||
180 | mutex_unlock(&rt2x00dev->csr_mutex); | 174 | mutex_unlock(&rt2x00dev->csr_mutex); |
181 | 175 | ||
182 | } | 176 | } |
183 | #endif /* CONFIG_RT2X00_LIB_LEDS */ | ||
184 | 177 | ||
185 | static void rt61pci_eepromregister_read(struct eeprom_93cx6 *eeprom) | 178 | static void rt61pci_eepromregister_read(struct eeprom_93cx6 *eeprom) |
186 | { | 179 | { |
@@ -967,6 +960,50 @@ static void rt61pci_config_duration(struct rt2x00_dev *rt2x00dev, | |||
967 | rt2x00pci_register_write(rt2x00dev, TXRX_CSR9, reg); | 960 | rt2x00pci_register_write(rt2x00dev, TXRX_CSR9, reg); |
968 | } | 961 | } |
969 | 962 | ||
963 | static void rt61pci_config_ps(struct rt2x00_dev *rt2x00dev, | ||
964 | struct rt2x00lib_conf *libconf) | ||
965 | { | ||
966 | enum dev_state state = | ||
967 | (libconf->conf->flags & IEEE80211_CONF_PS) ? | ||
968 | STATE_SLEEP : STATE_AWAKE; | ||
969 | u32 reg; | ||
970 | |||
971 | if (state == STATE_SLEEP) { | ||
972 | rt2x00pci_register_read(rt2x00dev, MAC_CSR11, ®); | ||
973 | rt2x00_set_field32(®, MAC_CSR11_DELAY_AFTER_TBCN, | ||
974 | libconf->conf->beacon_int - 10); | ||
975 | rt2x00_set_field32(®, MAC_CSR11_TBCN_BEFORE_WAKEUP, | ||
976 | libconf->conf->listen_interval - 1); | ||
977 | rt2x00_set_field32(®, MAC_CSR11_WAKEUP_LATENCY, 5); | ||
978 | |||
979 | /* We must first disable autowake before it can be enabled */ | ||
980 | rt2x00_set_field32(®, MAC_CSR11_AUTOWAKE, 0); | ||
981 | rt2x00pci_register_write(rt2x00dev, MAC_CSR11, reg); | ||
982 | |||
983 | rt2x00_set_field32(®, MAC_CSR11_AUTOWAKE, 1); | ||
984 | rt2x00pci_register_write(rt2x00dev, MAC_CSR11, reg); | ||
985 | |||
986 | rt2x00pci_register_write(rt2x00dev, SOFT_RESET_CSR, 0x00000005); | ||
987 | rt2x00pci_register_write(rt2x00dev, IO_CNTL_CSR, 0x0000001c); | ||
988 | rt2x00pci_register_write(rt2x00dev, PCI_USEC_CSR, 0x00000060); | ||
989 | |||
990 | rt61pci_mcu_request(rt2x00dev, MCU_SLEEP, 0xff, 0, 0); | ||
991 | } else { | ||
992 | rt2x00pci_register_read(rt2x00dev, MAC_CSR11, ®); | ||
993 | rt2x00_set_field32(®, MAC_CSR11_DELAY_AFTER_TBCN, 0); | ||
994 | rt2x00_set_field32(®, MAC_CSR11_TBCN_BEFORE_WAKEUP, 0); | ||
995 | rt2x00_set_field32(®, MAC_CSR11_AUTOWAKE, 0); | ||
996 | rt2x00_set_field32(®, MAC_CSR11_WAKEUP_LATENCY, 0); | ||
997 | rt2x00pci_register_write(rt2x00dev, MAC_CSR11, reg); | ||
998 | |||
999 | rt2x00pci_register_write(rt2x00dev, SOFT_RESET_CSR, 0x00000007); | ||
1000 | rt2x00pci_register_write(rt2x00dev, IO_CNTL_CSR, 0x00000018); | ||
1001 | rt2x00pci_register_write(rt2x00dev, PCI_USEC_CSR, 0x00000020); | ||
1002 | |||
1003 | rt61pci_mcu_request(rt2x00dev, MCU_WAKEUP, 0xff, 0, 0); | ||
1004 | } | ||
1005 | } | ||
1006 | |||
970 | static void rt61pci_config(struct rt2x00_dev *rt2x00dev, | 1007 | static void rt61pci_config(struct rt2x00_dev *rt2x00dev, |
971 | struct rt2x00lib_conf *libconf, | 1008 | struct rt2x00lib_conf *libconf, |
972 | const unsigned int flags) | 1009 | const unsigned int flags) |
@@ -984,6 +1021,8 @@ static void rt61pci_config(struct rt2x00_dev *rt2x00dev, | |||
984 | rt61pci_config_retry_limit(rt2x00dev, libconf); | 1021 | rt61pci_config_retry_limit(rt2x00dev, libconf); |
985 | if (flags & IEEE80211_CONF_CHANGE_BEACON_INTERVAL) | 1022 | if (flags & IEEE80211_CONF_CHANGE_BEACON_INTERVAL) |
986 | rt61pci_config_duration(rt2x00dev, libconf); | 1023 | rt61pci_config_duration(rt2x00dev, libconf); |
1024 | if (flags & IEEE80211_CONF_CHANGE_PS) | ||
1025 | rt61pci_config_ps(rt2x00dev, libconf); | ||
987 | } | 1026 | } |
988 | 1027 | ||
989 | /* | 1028 | /* |
@@ -1007,21 +1046,28 @@ static void rt61pci_link_stats(struct rt2x00_dev *rt2x00dev, | |||
1007 | qual->false_cca = rt2x00_get_field32(reg, STA_CSR1_FALSE_CCA_ERROR); | 1046 | qual->false_cca = rt2x00_get_field32(reg, STA_CSR1_FALSE_CCA_ERROR); |
1008 | } | 1047 | } |
1009 | 1048 | ||
1010 | static void rt61pci_reset_tuner(struct rt2x00_dev *rt2x00dev) | 1049 | static inline void rt61pci_set_vgc(struct rt2x00_dev *rt2x00dev, |
1050 | struct link_qual *qual, u8 vgc_level) | ||
1051 | { | ||
1052 | if (qual->vgc_level != vgc_level) { | ||
1053 | rt61pci_bbp_write(rt2x00dev, 17, vgc_level); | ||
1054 | qual->vgc_level = vgc_level; | ||
1055 | qual->vgc_level_reg = vgc_level; | ||
1056 | } | ||
1057 | } | ||
1058 | |||
1059 | static void rt61pci_reset_tuner(struct rt2x00_dev *rt2x00dev, | ||
1060 | struct link_qual *qual) | ||
1011 | { | 1061 | { |
1012 | rt61pci_bbp_write(rt2x00dev, 17, 0x20); | 1062 | rt61pci_set_vgc(rt2x00dev, qual, 0x20); |
1013 | rt2x00dev->link.vgc_level = 0x20; | ||
1014 | } | 1063 | } |
1015 | 1064 | ||
1016 | static void rt61pci_link_tuner(struct rt2x00_dev *rt2x00dev) | 1065 | static void rt61pci_link_tuner(struct rt2x00_dev *rt2x00dev, |
1066 | struct link_qual *qual, const u32 count) | ||
1017 | { | 1067 | { |
1018 | int rssi = rt2x00_get_link_rssi(&rt2x00dev->link); | ||
1019 | u8 r17; | ||
1020 | u8 up_bound; | 1068 | u8 up_bound; |
1021 | u8 low_bound; | 1069 | u8 low_bound; |
1022 | 1070 | ||
1023 | rt61pci_bbp_read(rt2x00dev, 17, &r17); | ||
1024 | |||
1025 | /* | 1071 | /* |
1026 | * Determine r17 bounds. | 1072 | * Determine r17 bounds. |
1027 | */ | 1073 | */ |
@@ -1051,38 +1097,32 @@ static void rt61pci_link_tuner(struct rt2x00_dev *rt2x00dev) | |||
1051 | /* | 1097 | /* |
1052 | * Special big-R17 for very short distance | 1098 | * Special big-R17 for very short distance |
1053 | */ | 1099 | */ |
1054 | if (rssi >= -35) { | 1100 | if (qual->rssi >= -35) { |
1055 | if (r17 != 0x60) | 1101 | rt61pci_set_vgc(rt2x00dev, qual, 0x60); |
1056 | rt61pci_bbp_write(rt2x00dev, 17, 0x60); | ||
1057 | return; | 1102 | return; |
1058 | } | 1103 | } |
1059 | 1104 | ||
1060 | /* | 1105 | /* |
1061 | * Special big-R17 for short distance | 1106 | * Special big-R17 for short distance |
1062 | */ | 1107 | */ |
1063 | if (rssi >= -58) { | 1108 | if (qual->rssi >= -58) { |
1064 | if (r17 != up_bound) | 1109 | rt61pci_set_vgc(rt2x00dev, qual, up_bound); |
1065 | rt61pci_bbp_write(rt2x00dev, 17, up_bound); | ||
1066 | return; | 1110 | return; |
1067 | } | 1111 | } |
1068 | 1112 | ||
1069 | /* | 1113 | /* |
1070 | * Special big-R17 for middle-short distance | 1114 | * Special big-R17 for middle-short distance |
1071 | */ | 1115 | */ |
1072 | if (rssi >= -66) { | 1116 | if (qual->rssi >= -66) { |
1073 | low_bound += 0x10; | 1117 | rt61pci_set_vgc(rt2x00dev, qual, low_bound + 0x10); |
1074 | if (r17 != low_bound) | ||
1075 | rt61pci_bbp_write(rt2x00dev, 17, low_bound); | ||
1076 | return; | 1118 | return; |
1077 | } | 1119 | } |
1078 | 1120 | ||
1079 | /* | 1121 | /* |
1080 | * Special mid-R17 for middle distance | 1122 | * Special mid-R17 for middle distance |
1081 | */ | 1123 | */ |
1082 | if (rssi >= -74) { | 1124 | if (qual->rssi >= -74) { |
1083 | low_bound += 0x08; | 1125 | rt61pci_set_vgc(rt2x00dev, qual, low_bound + 0x08); |
1084 | if (r17 != low_bound) | ||
1085 | rt61pci_bbp_write(rt2x00dev, 17, low_bound); | ||
1086 | return; | 1126 | return; |
1087 | } | 1127 | } |
1088 | 1128 | ||
@@ -1090,12 +1130,12 @@ static void rt61pci_link_tuner(struct rt2x00_dev *rt2x00dev) | |||
1090 | * Special case: Change up_bound based on the rssi. | 1130 | * Special case: Change up_bound based on the rssi. |
1091 | * Lower up_bound when rssi is weaker then -74 dBm. | 1131 | * Lower up_bound when rssi is weaker then -74 dBm. |
1092 | */ | 1132 | */ |
1093 | up_bound -= 2 * (-74 - rssi); | 1133 | up_bound -= 2 * (-74 - qual->rssi); |
1094 | if (low_bound > up_bound) | 1134 | if (low_bound > up_bound) |
1095 | up_bound = low_bound; | 1135 | up_bound = low_bound; |
1096 | 1136 | ||
1097 | if (r17 > up_bound) { | 1137 | if (qual->vgc_level > up_bound) { |
1098 | rt61pci_bbp_write(rt2x00dev, 17, up_bound); | 1138 | rt61pci_set_vgc(rt2x00dev, qual, up_bound); |
1099 | return; | 1139 | return; |
1100 | } | 1140 | } |
1101 | 1141 | ||
@@ -1105,15 +1145,10 @@ dynamic_cca_tune: | |||
1105 | * r17 does not yet exceed upper limit, continue and base | 1145 | * r17 does not yet exceed upper limit, continue and base |
1106 | * the r17 tuning on the false CCA count. | 1146 | * the r17 tuning on the false CCA count. |
1107 | */ | 1147 | */ |
1108 | if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) { | 1148 | if ((qual->false_cca > 512) && (qual->vgc_level < up_bound)) |
1109 | if (++r17 > up_bound) | 1149 | rt61pci_set_vgc(rt2x00dev, qual, ++qual->vgc_level); |
1110 | r17 = up_bound; | 1150 | else if ((qual->false_cca < 100) && (qual->vgc_level > low_bound)) |
1111 | rt61pci_bbp_write(rt2x00dev, 17, r17); | 1151 | rt61pci_set_vgc(rt2x00dev, qual, --qual->vgc_level); |
1112 | } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) { | ||
1113 | if (--r17 < low_bound) | ||
1114 | r17 = low_bound; | ||
1115 | rt61pci_bbp_write(rt2x00dev, 17, r17); | ||
1116 | } | ||
1117 | } | 1152 | } |
1118 | 1153 | ||
1119 | /* | 1154 | /* |
@@ -1164,6 +1199,11 @@ static int rt61pci_load_firmware(struct rt2x00_dev *rt2x00dev, const void *data, | |||
1164 | int i; | 1199 | int i; |
1165 | u32 reg; | 1200 | u32 reg; |
1166 | 1201 | ||
1202 | if (len != 8192) { | ||
1203 | ERROR(rt2x00dev, "Invalid firmware file length (len=%zu)\n", len); | ||
1204 | return -ENOENT; | ||
1205 | } | ||
1206 | |||
1167 | /* | 1207 | /* |
1168 | * Wait for stable hardware. | 1208 | * Wait for stable hardware. |
1169 | */ | 1209 | */ |
@@ -1812,7 +1852,7 @@ static void rt61pci_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
1812 | rt2x00_set_field32(&word, TXD_W0_TIMESTAMP, | 1852 | rt2x00_set_field32(&word, TXD_W0_TIMESTAMP, |
1813 | test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags)); | 1853 | test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags)); |
1814 | rt2x00_set_field32(&word, TXD_W0_OFDM, | 1854 | rt2x00_set_field32(&word, TXD_W0_OFDM, |
1815 | test_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags)); | 1855 | (txdesc->rate_mode == RATE_MODE_OFDM)); |
1816 | rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs); | 1856 | rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs); |
1817 | rt2x00_set_field32(&word, TXD_W0_RETRY_MODE, | 1857 | rt2x00_set_field32(&word, TXD_W0_RETRY_MODE, |
1818 | test_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags)); | 1858 | test_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags)); |
@@ -2195,7 +2235,8 @@ static int rt61pci_validate_eeprom(struct rt2x00_dev *rt2x00dev) | |||
2195 | if (word == 0xffff) { | 2235 | if (word == 0xffff) { |
2196 | rt2x00_set_field16(&word, EEPROM_NIC_ENABLE_DIVERSITY, 0); | 2236 | rt2x00_set_field16(&word, EEPROM_NIC_ENABLE_DIVERSITY, 0); |
2197 | rt2x00_set_field16(&word, EEPROM_NIC_TX_DIVERSITY, 0); | 2237 | rt2x00_set_field16(&word, EEPROM_NIC_TX_DIVERSITY, 0); |
2198 | rt2x00_set_field16(&word, EEPROM_NIC_TX_RX_FIXED, 0); | 2238 | rt2x00_set_field16(&word, EEPROM_NIC_RX_FIXED, 0); |
2239 | rt2x00_set_field16(&word, EEPROM_NIC_TX_FIXED, 0); | ||
2199 | rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA_BG, 0); | 2240 | rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA_BG, 0); |
2200 | rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0); | 2241 | rt2x00_set_field16(&word, EEPROM_NIC_CARDBUS_ACCEL, 0); |
2201 | rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA_A, 0); | 2242 | rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA_A, 0); |
@@ -2339,24 +2380,10 @@ static int rt61pci_init_eeprom(struct rt2x00_dev *rt2x00dev) | |||
2339 | */ | 2380 | */ |
2340 | if (rt2x00_rf(&rt2x00dev->chip, RF2529) && | 2381 | if (rt2x00_rf(&rt2x00dev->chip, RF2529) && |
2341 | !test_bit(CONFIG_DOUBLE_ANTENNA, &rt2x00dev->flags)) { | 2382 | !test_bit(CONFIG_DOUBLE_ANTENNA, &rt2x00dev->flags)) { |
2342 | switch (rt2x00_get_field16(eeprom, EEPROM_NIC_TX_RX_FIXED)) { | 2383 | rt2x00dev->default_ant.rx = |
2343 | case 0: | 2384 | ANTENNA_A + rt2x00_get_field16(eeprom, EEPROM_NIC_RX_FIXED); |
2344 | rt2x00dev->default_ant.tx = ANTENNA_B; | 2385 | rt2x00dev->default_ant.tx = |
2345 | rt2x00dev->default_ant.rx = ANTENNA_A; | 2386 | ANTENNA_B - rt2x00_get_field16(eeprom, EEPROM_NIC_TX_FIXED); |
2346 | break; | ||
2347 | case 1: | ||
2348 | rt2x00dev->default_ant.tx = ANTENNA_B; | ||
2349 | rt2x00dev->default_ant.rx = ANTENNA_B; | ||
2350 | break; | ||
2351 | case 2: | ||
2352 | rt2x00dev->default_ant.tx = ANTENNA_A; | ||
2353 | rt2x00dev->default_ant.rx = ANTENNA_A; | ||
2354 | break; | ||
2355 | case 3: | ||
2356 | rt2x00dev->default_ant.tx = ANTENNA_A; | ||
2357 | rt2x00dev->default_ant.rx = ANTENNA_B; | ||
2358 | break; | ||
2359 | } | ||
2360 | 2387 | ||
2361 | if (rt2x00_get_field16(eeprom, EEPROM_NIC_TX_DIVERSITY)) | 2388 | if (rt2x00_get_field16(eeprom, EEPROM_NIC_TX_DIVERSITY)) |
2362 | rt2x00dev->default_ant.tx = ANTENNA_SW_DIVERSITY; | 2389 | rt2x00dev->default_ant.tx = ANTENNA_SW_DIVERSITY; |
@@ -2534,7 +2561,9 @@ static int rt61pci_probe_hw_mode(struct rt2x00_dev *rt2x00dev) | |||
2534 | */ | 2561 | */ |
2535 | rt2x00dev->hw->flags = | 2562 | rt2x00dev->hw->flags = |
2536 | IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | | 2563 | IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING | |
2537 | IEEE80211_HW_SIGNAL_DBM; | 2564 | IEEE80211_HW_SIGNAL_DBM | |
2565 | IEEE80211_HW_SUPPORTS_PS | | ||
2566 | IEEE80211_HW_PS_NULLFUNC_STACK; | ||
2538 | rt2x00dev->hw->extra_tx_headroom = 0; | 2567 | rt2x00dev->hw->extra_tx_headroom = 0; |
2539 | 2568 | ||
2540 | SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev); | 2569 | SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev); |
@@ -2633,6 +2662,7 @@ static int rt61pci_conf_tx(struct ieee80211_hw *hw, u16 queue_idx, | |||
2633 | struct rt2x00_field32 field; | 2662 | struct rt2x00_field32 field; |
2634 | int retval; | 2663 | int retval; |
2635 | u32 reg; | 2664 | u32 reg; |
2665 | u32 offset; | ||
2636 | 2666 | ||
2637 | /* | 2667 | /* |
2638 | * First pass the configuration through rt2x00lib, that will | 2668 | * First pass the configuration through rt2x00lib, that will |
@@ -2644,24 +2674,23 @@ static int rt61pci_conf_tx(struct ieee80211_hw *hw, u16 queue_idx, | |||
2644 | if (retval) | 2674 | if (retval) |
2645 | return retval; | 2675 | return retval; |
2646 | 2676 | ||
2677 | /* | ||
2678 | * We only need to perform additional register initialization | ||
2679 | * for WMM queues/ | ||
2680 | */ | ||
2681 | if (queue_idx >= 4) | ||
2682 | return 0; | ||
2683 | |||
2647 | queue = rt2x00queue_get_queue(rt2x00dev, queue_idx); | 2684 | queue = rt2x00queue_get_queue(rt2x00dev, queue_idx); |
2648 | 2685 | ||
2649 | /* Update WMM TXOP register */ | 2686 | /* Update WMM TXOP register */ |
2650 | if (queue_idx < 2) { | 2687 | offset = AC_TXOP_CSR0 + (sizeof(u32) * (!!(queue_idx & 2))); |
2651 | field.bit_offset = queue_idx * 16; | 2688 | field.bit_offset = (queue_idx & 1) * 16; |
2652 | field.bit_mask = 0xffff << field.bit_offset; | 2689 | field.bit_mask = 0xffff << field.bit_offset; |
2653 | 2690 | ||
2654 | rt2x00pci_register_read(rt2x00dev, AC_TXOP_CSR0, ®); | 2691 | rt2x00pci_register_read(rt2x00dev, offset, ®); |
2655 | rt2x00_set_field32(®, field, queue->txop); | 2692 | rt2x00_set_field32(®, field, queue->txop); |
2656 | rt2x00pci_register_write(rt2x00dev, AC_TXOP_CSR0, reg); | 2693 | rt2x00pci_register_write(rt2x00dev, offset, reg); |
2657 | } else if (queue_idx < 4) { | ||
2658 | field.bit_offset = (queue_idx - 2) * 16; | ||
2659 | field.bit_mask = 0xffff << field.bit_offset; | ||
2660 | |||
2661 | rt2x00pci_register_read(rt2x00dev, AC_TXOP_CSR1, ®); | ||
2662 | rt2x00_set_field32(®, field, queue->txop); | ||
2663 | rt2x00pci_register_write(rt2x00dev, AC_TXOP_CSR1, reg); | ||
2664 | } | ||
2665 | 2694 | ||
2666 | /* Update WMM registers */ | 2695 | /* Update WMM registers */ |
2667 | field.bit_offset = queue_idx * 4; | 2696 | field.bit_offset = queue_idx * 4; |