aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/wireless/rt2x00/rt2800lib.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/net/wireless/rt2x00/rt2800lib.c')
-rw-r--r--drivers/net/wireless/rt2x00/rt2800lib.c72
1 files changed, 29 insertions, 43 deletions
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
index 9e09367c9739..540c94f8505a 100644
--- a/drivers/net/wireless/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/rt2x00/rt2800lib.c
@@ -1763,36 +1763,15 @@ static void rt2800_config_channel_rf3xxx(struct rt2x00_dev *rt2x00dev,
1763 1763
1764 rt2800_rfcsr_read(rt2x00dev, 1, &rfcsr); 1764 rt2800_rfcsr_read(rt2x00dev, 1, &rfcsr);
1765 rt2x00_set_field8(&rfcsr, RFCSR1_RX0_PD, 0); 1765 rt2x00_set_field8(&rfcsr, RFCSR1_RX0_PD, 0);
1766 rt2x00_set_field8(&rfcsr, RFCSR1_RX1_PD,
1767 rt2x00dev->default_ant.rx_chain_num <= 1);
1768 rt2x00_set_field8(&rfcsr, RFCSR1_RX2_PD,
1769 rt2x00dev->default_ant.rx_chain_num <= 2);
1766 rt2x00_set_field8(&rfcsr, RFCSR1_TX0_PD, 0); 1770 rt2x00_set_field8(&rfcsr, RFCSR1_TX0_PD, 0);
1767 if (rt2x00_rt(rt2x00dev, RT3390)) { 1771 rt2x00_set_field8(&rfcsr, RFCSR1_TX1_PD,
1768 rt2x00_set_field8(&rfcsr, RFCSR1_RX1_PD, 1772 rt2x00dev->default_ant.tx_chain_num <= 1);
1769 rt2x00dev->default_ant.rx_chain_num == 1); 1773 rt2x00_set_field8(&rfcsr, RFCSR1_TX2_PD,
1770 rt2x00_set_field8(&rfcsr, RFCSR1_TX1_PD, 1774 rt2x00dev->default_ant.tx_chain_num <= 2);
1771 rt2x00dev->default_ant.tx_chain_num == 1);
1772 } else {
1773 rt2x00_set_field8(&rfcsr, RFCSR1_RX1_PD, 0);
1774 rt2x00_set_field8(&rfcsr, RFCSR1_TX1_PD, 0);
1775 rt2x00_set_field8(&rfcsr, RFCSR1_RX2_PD, 0);
1776 rt2x00_set_field8(&rfcsr, RFCSR1_TX2_PD, 0);
1777
1778 switch (rt2x00dev->default_ant.tx_chain_num) {
1779 case 1:
1780 rt2x00_set_field8(&rfcsr, RFCSR1_TX1_PD, 1);
1781 /* fall through */
1782 case 2:
1783 rt2x00_set_field8(&rfcsr, RFCSR1_TX2_PD, 1);
1784 break;
1785 }
1786
1787 switch (rt2x00dev->default_ant.rx_chain_num) {
1788 case 1:
1789 rt2x00_set_field8(&rfcsr, RFCSR1_RX1_PD, 1);
1790 /* fall through */
1791 case 2:
1792 rt2x00_set_field8(&rfcsr, RFCSR1_RX2_PD, 1);
1793 break;
1794 }
1795 }
1796 rt2800_rfcsr_write(rt2x00dev, 1, rfcsr); 1775 rt2800_rfcsr_write(rt2x00dev, 1, rfcsr);
1797 1776
1798 rt2800_rfcsr_read(rt2x00dev, 30, &rfcsr); 1777 rt2800_rfcsr_read(rt2x00dev, 30, &rfcsr);
@@ -2896,23 +2875,32 @@ EXPORT_SYMBOL_GPL(rt2800_link_stats);
2896 2875
2897static u8 rt2800_get_default_vgc(struct rt2x00_dev *rt2x00dev) 2876static u8 rt2800_get_default_vgc(struct rt2x00_dev *rt2x00dev)
2898{ 2877{
2878 u8 vgc;
2879
2899 if (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ) { 2880 if (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ) {
2900 if (rt2x00_rt(rt2x00dev, RT3070) || 2881 if (rt2x00_rt(rt2x00dev, RT3070) ||
2901 rt2x00_rt(rt2x00dev, RT3071) || 2882 rt2x00_rt(rt2x00dev, RT3071) ||
2902 rt2x00_rt(rt2x00dev, RT3090) || 2883 rt2x00_rt(rt2x00dev, RT3090) ||
2903 rt2x00_rt(rt2x00dev, RT3290) || 2884 rt2x00_rt(rt2x00dev, RT3290) ||
2904 rt2x00_rt(rt2x00dev, RT3390) || 2885 rt2x00_rt(rt2x00dev, RT3390) ||
2886 rt2x00_rt(rt2x00dev, RT3572) ||
2905 rt2x00_rt(rt2x00dev, RT5390) || 2887 rt2x00_rt(rt2x00dev, RT5390) ||
2906 rt2x00_rt(rt2x00dev, RT5392)) 2888 rt2x00_rt(rt2x00dev, RT5392))
2907 return 0x1c + (2 * rt2x00dev->lna_gain); 2889 vgc = 0x1c + (2 * rt2x00dev->lna_gain);
2908 else 2890 else
2909 return 0x2e + rt2x00dev->lna_gain; 2891 vgc = 0x2e + rt2x00dev->lna_gain;
2892 } else { /* 5GHZ band */
2893 if (rt2x00_rt(rt2x00dev, RT3572))
2894 vgc = 0x22 + (rt2x00dev->lna_gain * 5) / 3;
2895 else {
2896 if (!test_bit(CONFIG_CHANNEL_HT40, &rt2x00dev->flags))
2897 vgc = 0x32 + (rt2x00dev->lna_gain * 5) / 3;
2898 else
2899 vgc = 0x3a + (rt2x00dev->lna_gain * 5) / 3;
2900 }
2910 } 2901 }
2911 2902
2912 if (!test_bit(CONFIG_CHANNEL_HT40, &rt2x00dev->flags)) 2903 return vgc;
2913 return 0x32 + (rt2x00dev->lna_gain * 5) / 3;
2914 else
2915 return 0x3a + (rt2x00dev->lna_gain * 5) / 3;
2916} 2904}
2917 2905
2918static inline void rt2800_set_vgc(struct rt2x00_dev *rt2x00dev, 2906static inline void rt2800_set_vgc(struct rt2x00_dev *rt2x00dev,
@@ -3081,7 +3069,7 @@ static int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
3081 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400); 3069 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
3082 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606); 3070 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
3083 } else if (rt2x00_rt(rt2x00dev, RT5390) || 3071 } else if (rt2x00_rt(rt2x00dev, RT5390) ||
3084 rt2x00_rt(rt2x00dev, RT5392)) { 3072 rt2x00_rt(rt2x00dev, RT5392)) {
3085 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404); 3073 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404);
3086 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606); 3074 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
3087 rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000); 3075 rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
@@ -3526,6 +3514,11 @@ static int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
3526 } else if (rt2800_is_305x_soc(rt2x00dev)) { 3514 } else if (rt2800_is_305x_soc(rt2x00dev)) {
3527 rt2800_bbp_write(rt2x00dev, 78, 0x0e); 3515 rt2800_bbp_write(rt2x00dev, 78, 0x0e);
3528 rt2800_bbp_write(rt2x00dev, 80, 0x08); 3516 rt2800_bbp_write(rt2x00dev, 80, 0x08);
3517 } else if (rt2x00_rt(rt2x00dev, RT3290)) {
3518 rt2800_bbp_write(rt2x00dev, 74, 0x0b);
3519 rt2800_bbp_write(rt2x00dev, 79, 0x18);
3520 rt2800_bbp_write(rt2x00dev, 80, 0x09);
3521 rt2800_bbp_write(rt2x00dev, 81, 0x33);
3529 } else if (rt2x00_rt(rt2x00dev, RT3352)) { 3522 } else if (rt2x00_rt(rt2x00dev, RT3352)) {
3530 rt2800_bbp_write(rt2x00dev, 78, 0x0e); 3523 rt2800_bbp_write(rt2x00dev, 78, 0x0e);
3531 rt2800_bbp_write(rt2x00dev, 80, 0x08); 3524 rt2800_bbp_write(rt2x00dev, 80, 0x08);
@@ -3534,13 +3527,6 @@ static int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
3534 rt2800_bbp_write(rt2x00dev, 81, 0x37); 3527 rt2800_bbp_write(rt2x00dev, 81, 0x37);
3535 } 3528 }
3536 3529
3537 if (rt2x00_rt(rt2x00dev, RT3290)) {
3538 rt2800_bbp_write(rt2x00dev, 74, 0x0b);
3539 rt2800_bbp_write(rt2x00dev, 79, 0x18);
3540 rt2800_bbp_write(rt2x00dev, 80, 0x09);
3541 rt2800_bbp_write(rt2x00dev, 81, 0x33);
3542 }
3543
3544 rt2800_bbp_write(rt2x00dev, 82, 0x62); 3530 rt2800_bbp_write(rt2x00dev, 82, 0x62);
3545 if (rt2x00_rt(rt2x00dev, RT3290) || 3531 if (rt2x00_rt(rt2x00dev, RT3290) ||
3546 rt2x00_rt(rt2x00dev, RT5390) || 3532 rt2x00_rt(rt2x00dev, RT5390) ||