diff options
Diffstat (limited to 'drivers/net/wireless/rt2x00/rt2800lib.c')
-rw-r--r-- | drivers/net/wireless/rt2x00/rt2800lib.c | 173 |
1 files changed, 63 insertions, 110 deletions
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c index 25aaa5e12d4e..aa8789423937 100644 --- a/drivers/net/wireless/rt2x00/rt2800lib.c +++ b/drivers/net/wireless/rt2x00/rt2800lib.c | |||
@@ -278,12 +278,9 @@ static const unsigned int rt2800_eeprom_map_ext[EEPROM_WORD_COUNT] = { | |||
278 | [EEPROM_LNA] = 0x0026, | 278 | [EEPROM_LNA] = 0x0026, |
279 | [EEPROM_EXT_LNA2] = 0x0027, | 279 | [EEPROM_EXT_LNA2] = 0x0027, |
280 | [EEPROM_RSSI_BG] = 0x0028, | 280 | [EEPROM_RSSI_BG] = 0x0028, |
281 | [EEPROM_TXPOWER_DELTA] = 0x0028, /* Overlaps with RSSI_BG */ | ||
282 | [EEPROM_RSSI_BG2] = 0x0029, | 281 | [EEPROM_RSSI_BG2] = 0x0029, |
283 | [EEPROM_TXMIXER_GAIN_BG] = 0x0029, /* Overlaps with RSSI_BG2 */ | ||
284 | [EEPROM_RSSI_A] = 0x002a, | 282 | [EEPROM_RSSI_A] = 0x002a, |
285 | [EEPROM_RSSI_A2] = 0x002b, | 283 | [EEPROM_RSSI_A2] = 0x002b, |
286 | [EEPROM_TXMIXER_GAIN_A] = 0x002b, /* Overlaps with RSSI_A2 */ | ||
287 | [EEPROM_TXPOWER_BG1] = 0x0030, | 284 | [EEPROM_TXPOWER_BG1] = 0x0030, |
288 | [EEPROM_TXPOWER_BG2] = 0x0037, | 285 | [EEPROM_TXPOWER_BG2] = 0x0037, |
289 | [EEPROM_EXT_TXPOWER_BG3] = 0x003e, | 286 | [EEPROM_EXT_TXPOWER_BG3] = 0x003e, |
@@ -1783,7 +1780,7 @@ void rt2800_config_ant(struct rt2x00_dev *rt2x00dev, struct antenna_setup *ant) | |||
1783 | rt2800_bbp_read(rt2x00dev, 3, &r3); | 1780 | rt2800_bbp_read(rt2x00dev, 3, &r3); |
1784 | 1781 | ||
1785 | if (rt2x00_rt(rt2x00dev, RT3572) && | 1782 | if (rt2x00_rt(rt2x00dev, RT3572) && |
1786 | test_bit(CAPABILITY_BT_COEXIST, &rt2x00dev->cap_flags)) | 1783 | rt2x00_has_cap_bt_coexist(rt2x00dev)) |
1787 | rt2800_config_3572bt_ant(rt2x00dev); | 1784 | rt2800_config_3572bt_ant(rt2x00dev); |
1788 | 1785 | ||
1789 | /* | 1786 | /* |
@@ -1795,7 +1792,7 @@ void rt2800_config_ant(struct rt2x00_dev *rt2x00dev, struct antenna_setup *ant) | |||
1795 | break; | 1792 | break; |
1796 | case 2: | 1793 | case 2: |
1797 | if (rt2x00_rt(rt2x00dev, RT3572) && | 1794 | if (rt2x00_rt(rt2x00dev, RT3572) && |
1798 | test_bit(CAPABILITY_BT_COEXIST, &rt2x00dev->cap_flags)) | 1795 | rt2x00_has_cap_bt_coexist(rt2x00dev)) |
1799 | rt2x00_set_field8(&r1, BBP1_TX_ANTENNA, 1); | 1796 | rt2x00_set_field8(&r1, BBP1_TX_ANTENNA, 1); |
1800 | else | 1797 | else |
1801 | rt2x00_set_field8(&r1, BBP1_TX_ANTENNA, 2); | 1798 | rt2x00_set_field8(&r1, BBP1_TX_ANTENNA, 2); |
@@ -1825,7 +1822,7 @@ void rt2800_config_ant(struct rt2x00_dev *rt2x00dev, struct antenna_setup *ant) | |||
1825 | break; | 1822 | break; |
1826 | case 2: | 1823 | case 2: |
1827 | if (rt2x00_rt(rt2x00dev, RT3572) && | 1824 | if (rt2x00_rt(rt2x00dev, RT3572) && |
1828 | test_bit(CAPABILITY_BT_COEXIST, &rt2x00dev->cap_flags)) { | 1825 | rt2x00_has_cap_bt_coexist(rt2x00dev)) { |
1829 | rt2x00_set_field8(&r3, BBP3_RX_ADC, 1); | 1826 | rt2x00_set_field8(&r3, BBP3_RX_ADC, 1); |
1830 | rt2x00_set_field8(&r3, BBP3_RX_ANTENNA, | 1827 | rt2x00_set_field8(&r3, BBP3_RX_ANTENNA, |
1831 | rt2x00dev->curr_band == IEEE80211_BAND_5GHZ); | 1828 | rt2x00dev->curr_band == IEEE80211_BAND_5GHZ); |
@@ -2029,13 +2026,6 @@ static void rt2800_config_channel_rf3xxx(struct rt2x00_dev *rt2x00dev, | |||
2029 | rt2x00dev->default_ant.tx_chain_num <= 2); | 2026 | rt2x00dev->default_ant.tx_chain_num <= 2); |
2030 | rt2800_rfcsr_write(rt2x00dev, 1, rfcsr); | 2027 | rt2800_rfcsr_write(rt2x00dev, 1, rfcsr); |
2031 | 2028 | ||
2032 | rt2800_rfcsr_read(rt2x00dev, 30, &rfcsr); | ||
2033 | rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 1); | ||
2034 | rt2800_rfcsr_write(rt2x00dev, 30, rfcsr); | ||
2035 | msleep(1); | ||
2036 | rt2x00_set_field8(&rfcsr, RFCSR30_RF_CALIBRATION, 0); | ||
2037 | rt2800_rfcsr_write(rt2x00dev, 30, rfcsr); | ||
2038 | |||
2039 | rt2800_rfcsr_read(rt2x00dev, 23, &rfcsr); | 2029 | rt2800_rfcsr_read(rt2x00dev, 23, &rfcsr); |
2040 | rt2x00_set_field8(&rfcsr, RFCSR23_FREQ_OFFSET, rt2x00dev->freq_offset); | 2030 | rt2x00_set_field8(&rfcsr, RFCSR23_FREQ_OFFSET, rt2x00dev->freq_offset); |
2041 | rt2800_rfcsr_write(rt2x00dev, 23, rfcsr); | 2031 | rt2800_rfcsr_write(rt2x00dev, 23, rfcsr); |
@@ -2141,7 +2131,7 @@ static void rt2800_config_channel_rf3052(struct rt2x00_dev *rt2x00dev, | |||
2141 | rt2x00_set_field8(&rfcsr, RFCSR1_TX1_PD, 0); | 2131 | rt2x00_set_field8(&rfcsr, RFCSR1_TX1_PD, 0); |
2142 | rt2x00_set_field8(&rfcsr, RFCSR1_RX2_PD, 0); | 2132 | rt2x00_set_field8(&rfcsr, RFCSR1_RX2_PD, 0); |
2143 | rt2x00_set_field8(&rfcsr, RFCSR1_TX2_PD, 0); | 2133 | rt2x00_set_field8(&rfcsr, RFCSR1_TX2_PD, 0); |
2144 | if (test_bit(CAPABILITY_BT_COEXIST, &rt2x00dev->cap_flags)) { | 2134 | if (rt2x00_has_cap_bt_coexist(rt2x00dev)) { |
2145 | if (rf->channel <= 14) { | 2135 | if (rf->channel <= 14) { |
2146 | rt2x00_set_field8(&rfcsr, RFCSR1_RX0_PD, 1); | 2136 | rt2x00_set_field8(&rfcsr, RFCSR1_RX0_PD, 1); |
2147 | rt2x00_set_field8(&rfcsr, RFCSR1_TX0_PD, 1); | 2137 | rt2x00_set_field8(&rfcsr, RFCSR1_TX0_PD, 1); |
@@ -2674,7 +2664,7 @@ static void rt2800_config_channel_rf53xx(struct rt2x00_dev *rt2x00dev, | |||
2674 | if (rf->channel <= 14) { | 2664 | if (rf->channel <= 14) { |
2675 | int idx = rf->channel-1; | 2665 | int idx = rf->channel-1; |
2676 | 2666 | ||
2677 | if (test_bit(CAPABILITY_BT_COEXIST, &rt2x00dev->cap_flags)) { | 2667 | if (rt2x00_has_cap_bt_coexist(rt2x00dev)) { |
2678 | if (rt2x00_rt_rev_gte(rt2x00dev, RT5390, REV_RT5390F)) { | 2668 | if (rt2x00_rt_rev_gte(rt2x00dev, RT5390, REV_RT5390F)) { |
2679 | /* r55/r59 value array of channel 1~14 */ | 2669 | /* r55/r59 value array of channel 1~14 */ |
2680 | static const char r55_bt_rev[] = {0x83, 0x83, | 2670 | static const char r55_bt_rev[] = {0x83, 0x83, |
@@ -3220,8 +3210,7 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev, | |||
3220 | if (rf->channel <= 14) { | 3210 | if (rf->channel <= 14) { |
3221 | if (!rt2x00_rt(rt2x00dev, RT5390) && | 3211 | if (!rt2x00_rt(rt2x00dev, RT5390) && |
3222 | !rt2x00_rt(rt2x00dev, RT5392)) { | 3212 | !rt2x00_rt(rt2x00dev, RT5392)) { |
3223 | if (test_bit(CAPABILITY_EXTERNAL_LNA_BG, | 3213 | if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) { |
3224 | &rt2x00dev->cap_flags)) { | ||
3225 | rt2800_bbp_write(rt2x00dev, 82, 0x62); | 3214 | rt2800_bbp_write(rt2x00dev, 82, 0x62); |
3226 | rt2800_bbp_write(rt2x00dev, 75, 0x46); | 3215 | rt2800_bbp_write(rt2x00dev, 75, 0x46); |
3227 | } else { | 3216 | } else { |
@@ -3246,7 +3235,7 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev, | |||
3246 | if (rt2x00_rt(rt2x00dev, RT3593)) | 3235 | if (rt2x00_rt(rt2x00dev, RT3593)) |
3247 | rt2800_bbp_write(rt2x00dev, 83, 0x9a); | 3236 | rt2800_bbp_write(rt2x00dev, 83, 0x9a); |
3248 | 3237 | ||
3249 | if (test_bit(CAPABILITY_EXTERNAL_LNA_A, &rt2x00dev->cap_flags)) | 3238 | if (rt2x00_has_cap_external_lna_a(rt2x00dev)) |
3250 | rt2800_bbp_write(rt2x00dev, 75, 0x46); | 3239 | rt2800_bbp_write(rt2x00dev, 75, 0x46); |
3251 | else | 3240 | else |
3252 | rt2800_bbp_write(rt2x00dev, 75, 0x50); | 3241 | rt2800_bbp_write(rt2x00dev, 75, 0x50); |
@@ -3282,7 +3271,7 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev, | |||
3282 | /* Turn on primary PAs */ | 3271 | /* Turn on primary PAs */ |
3283 | rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A0_EN, | 3272 | rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_A0_EN, |
3284 | rf->channel > 14); | 3273 | rf->channel > 14); |
3285 | if (test_bit(CAPABILITY_BT_COEXIST, &rt2x00dev->cap_flags)) | 3274 | if (rt2x00_has_cap_bt_coexist(rt2x00dev)) |
3286 | rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G0_EN, 1); | 3275 | rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G0_EN, 1); |
3287 | else | 3276 | else |
3288 | rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G0_EN, | 3277 | rt2x00_set_field32(&tx_pin, TX_PIN_CFG_PA_PE_G0_EN, |
@@ -3313,9 +3302,18 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev, | |||
3313 | 3302 | ||
3314 | rt2800_register_write(rt2x00dev, TX_PIN_CFG, tx_pin); | 3303 | rt2800_register_write(rt2x00dev, TX_PIN_CFG, tx_pin); |
3315 | 3304 | ||
3316 | if (rt2x00_rt(rt2x00dev, RT3572)) | 3305 | if (rt2x00_rt(rt2x00dev, RT3572)) { |
3317 | rt2800_rfcsr_write(rt2x00dev, 8, 0x80); | 3306 | rt2800_rfcsr_write(rt2x00dev, 8, 0x80); |
3318 | 3307 | ||
3308 | /* AGC init */ | ||
3309 | if (rf->channel <= 14) | ||
3310 | reg = 0x1c + (2 * rt2x00dev->lna_gain); | ||
3311 | else | ||
3312 | reg = 0x22 + ((rt2x00dev->lna_gain * 5) / 3); | ||
3313 | |||
3314 | rt2800_bbp_write_with_rx_chain(rt2x00dev, 66, reg); | ||
3315 | } | ||
3316 | |||
3319 | if (rt2x00_rt(rt2x00dev, RT3593)) { | 3317 | if (rt2x00_rt(rt2x00dev, RT3593)) { |
3320 | rt2800_register_read(rt2x00dev, GPIO_CTRL, ®); | 3318 | rt2800_register_read(rt2x00dev, GPIO_CTRL, ®); |
3321 | 3319 | ||
@@ -3575,7 +3573,7 @@ static int rt2800_get_txpower_reg_delta(struct rt2x00_dev *rt2x00dev, | |||
3575 | { | 3573 | { |
3576 | int delta; | 3574 | int delta; |
3577 | 3575 | ||
3578 | if (test_bit(CAPABILITY_POWER_LIMIT, &rt2x00dev->cap_flags)) | 3576 | if (rt2x00_has_cap_power_limit(rt2x00dev)) |
3579 | return 0; | 3577 | return 0; |
3580 | 3578 | ||
3581 | /* | 3579 | /* |
@@ -3604,7 +3602,7 @@ static u8 rt2800_compensate_txpower(struct rt2x00_dev *rt2x00dev, int is_rate_b, | |||
3604 | if (rt2x00_rt(rt2x00dev, RT3593)) | 3602 | if (rt2x00_rt(rt2x00dev, RT3593)) |
3605 | return min_t(u8, txpower, 0xc); | 3603 | return min_t(u8, txpower, 0xc); |
3606 | 3604 | ||
3607 | if (test_bit(CAPABILITY_POWER_LIMIT, &rt2x00dev->cap_flags)) { | 3605 | if (rt2x00_has_cap_power_limit(rt2x00dev)) { |
3608 | /* | 3606 | /* |
3609 | * Check if eirp txpower exceed txpower_limit. | 3607 | * Check if eirp txpower exceed txpower_limit. |
3610 | * We use OFDM 6M as criterion and its eirp txpower | 3608 | * We use OFDM 6M as criterion and its eirp txpower |
@@ -4416,6 +4414,7 @@ static u8 rt2800_get_default_vgc(struct rt2x00_dev *rt2x00dev) | |||
4416 | rt2x00_rt(rt2x00dev, RT3290) || | 4414 | rt2x00_rt(rt2x00dev, RT3290) || |
4417 | rt2x00_rt(rt2x00dev, RT3390) || | 4415 | rt2x00_rt(rt2x00dev, RT3390) || |
4418 | rt2x00_rt(rt2x00dev, RT3572) || | 4416 | rt2x00_rt(rt2x00dev, RT3572) || |
4417 | rt2x00_rt(rt2x00dev, RT3593) || | ||
4419 | rt2x00_rt(rt2x00dev, RT5390) || | 4418 | rt2x00_rt(rt2x00dev, RT5390) || |
4420 | rt2x00_rt(rt2x00dev, RT5392) || | 4419 | rt2x00_rt(rt2x00dev, RT5392) || |
4421 | rt2x00_rt(rt2x00dev, RT5592)) | 4420 | rt2x00_rt(rt2x00dev, RT5592)) |
@@ -4423,8 +4422,8 @@ static u8 rt2800_get_default_vgc(struct rt2x00_dev *rt2x00dev) | |||
4423 | else | 4422 | else |
4424 | vgc = 0x2e + rt2x00dev->lna_gain; | 4423 | vgc = 0x2e + rt2x00dev->lna_gain; |
4425 | } else { /* 5GHZ band */ | 4424 | } else { /* 5GHZ band */ |
4426 | if (rt2x00_rt(rt2x00dev, RT3572)) | 4425 | if (rt2x00_rt(rt2x00dev, RT3593)) |
4427 | vgc = 0x22 + (rt2x00dev->lna_gain * 5) / 3; | 4426 | vgc = 0x20 + (rt2x00dev->lna_gain * 5) / 3; |
4428 | else if (rt2x00_rt(rt2x00dev, RT5592)) | 4427 | else if (rt2x00_rt(rt2x00dev, RT5592)) |
4429 | vgc = 0x24 + (2 * rt2x00dev->lna_gain); | 4428 | vgc = 0x24 + (2 * rt2x00dev->lna_gain); |
4430 | else { | 4429 | else { |
@@ -4442,11 +4441,17 @@ static inline void rt2800_set_vgc(struct rt2x00_dev *rt2x00dev, | |||
4442 | struct link_qual *qual, u8 vgc_level) | 4441 | struct link_qual *qual, u8 vgc_level) |
4443 | { | 4442 | { |
4444 | if (qual->vgc_level != vgc_level) { | 4443 | if (qual->vgc_level != vgc_level) { |
4445 | if (rt2x00_rt(rt2x00dev, RT5592)) { | 4444 | if (rt2x00_rt(rt2x00dev, RT3572) || |
4445 | rt2x00_rt(rt2x00dev, RT3593)) { | ||
4446 | rt2800_bbp_write_with_rx_chain(rt2x00dev, 66, | ||
4447 | vgc_level); | ||
4448 | } else if (rt2x00_rt(rt2x00dev, RT5592)) { | ||
4446 | rt2800_bbp_write(rt2x00dev, 83, qual->rssi > -65 ? 0x4a : 0x7a); | 4449 | rt2800_bbp_write(rt2x00dev, 83, qual->rssi > -65 ? 0x4a : 0x7a); |
4447 | rt2800_bbp_write_with_rx_chain(rt2x00dev, 66, vgc_level); | 4450 | rt2800_bbp_write_with_rx_chain(rt2x00dev, 66, vgc_level); |
4448 | } else | 4451 | } else { |
4449 | rt2800_bbp_write(rt2x00dev, 66, vgc_level); | 4452 | rt2800_bbp_write(rt2x00dev, 66, vgc_level); |
4453 | } | ||
4454 | |||
4450 | qual->vgc_level = vgc_level; | 4455 | qual->vgc_level = vgc_level; |
4451 | qual->vgc_level_reg = vgc_level; | 4456 | qual->vgc_level_reg = vgc_level; |
4452 | } | 4457 | } |
@@ -4465,17 +4470,35 @@ void rt2800_link_tuner(struct rt2x00_dev *rt2x00dev, struct link_qual *qual, | |||
4465 | 4470 | ||
4466 | if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860C)) | 4471 | if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860C)) |
4467 | return; | 4472 | return; |
4468 | /* | 4473 | |
4469 | * When RSSI is better then -80 increase VGC level with 0x10, except | 4474 | /* When RSSI is better than a certain threshold, increase VGC |
4470 | * for rt5592 chip. | 4475 | * with a chip specific value in order to improve the balance |
4476 | * between sensibility and noise isolation. | ||
4471 | */ | 4477 | */ |
4472 | 4478 | ||
4473 | vgc = rt2800_get_default_vgc(rt2x00dev); | 4479 | vgc = rt2800_get_default_vgc(rt2x00dev); |
4474 | 4480 | ||
4475 | if (rt2x00_rt(rt2x00dev, RT5592) && qual->rssi > -65) | 4481 | switch (rt2x00dev->chip.rt) { |
4476 | vgc += 0x20; | 4482 | case RT3572: |
4477 | else if (qual->rssi > -80) | 4483 | case RT3593: |
4478 | vgc += 0x10; | 4484 | if (qual->rssi > -65) { |
4485 | if (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ) | ||
4486 | vgc += 0x20; | ||
4487 | else | ||
4488 | vgc += 0x10; | ||
4489 | } | ||
4490 | break; | ||
4491 | |||
4492 | case RT5592: | ||
4493 | if (qual->rssi > -65) | ||
4494 | vgc += 0x20; | ||
4495 | break; | ||
4496 | |||
4497 | default: | ||
4498 | if (qual->rssi > -80) | ||
4499 | vgc += 0x10; | ||
4500 | break; | ||
4501 | } | ||
4479 | 4502 | ||
4480 | rt2800_set_vgc(rt2x00dev, qual, vgc); | 4503 | rt2800_set_vgc(rt2x00dev, qual, vgc); |
4481 | } | 4504 | } |
@@ -5500,7 +5523,7 @@ static void rt2800_init_bbp_53xx(struct rt2x00_dev *rt2x00dev) | |||
5500 | ant = (div_mode == 3) ? 1 : 0; | 5523 | ant = (div_mode == 3) ? 1 : 0; |
5501 | 5524 | ||
5502 | /* check if this is a Bluetooth combo card */ | 5525 | /* check if this is a Bluetooth combo card */ |
5503 | if (test_bit(CAPABILITY_BT_COEXIST, &rt2x00dev->cap_flags)) { | 5526 | if (rt2x00_has_cap_bt_coexist(rt2x00dev)) { |
5504 | u32 reg; | 5527 | u32 reg; |
5505 | 5528 | ||
5506 | rt2800_register_read(rt2x00dev, GPIO_CTRL, ®); | 5529 | rt2800_register_read(rt2x00dev, GPIO_CTRL, ®); |
@@ -5809,7 +5832,7 @@ static void rt2800_normal_mode_setup_3xxx(struct rt2x00_dev *rt2x00dev) | |||
5809 | rt2x00_rt_rev_lt(rt2x00dev, RT3071, REV_RT3071E) || | 5832 | rt2x00_rt_rev_lt(rt2x00dev, RT3071, REV_RT3071E) || |
5810 | rt2x00_rt_rev_lt(rt2x00dev, RT3090, REV_RT3090E) || | 5833 | rt2x00_rt_rev_lt(rt2x00dev, RT3090, REV_RT3090E) || |
5811 | rt2x00_rt_rev_lt(rt2x00dev, RT3390, REV_RT3390E)) { | 5834 | rt2x00_rt_rev_lt(rt2x00dev, RT3390, REV_RT3390E)) { |
5812 | if (!test_bit(CAPABILITY_EXTERNAL_LNA_BG, &rt2x00dev->cap_flags)) | 5835 | if (!rt2x00_has_cap_external_lna_bg(rt2x00dev)) |
5813 | rt2x00_set_field8(&rfcsr, RFCSR17_R, 1); | 5836 | rt2x00_set_field8(&rfcsr, RFCSR17_R, 1); |
5814 | } | 5837 | } |
5815 | 5838 | ||
@@ -6452,7 +6475,7 @@ static void rt2800_init_rfcsr_5390(struct rt2x00_dev *rt2x00dev) | |||
6452 | rt2800_rfcsr_write(rt2x00dev, 28, 0x00); | 6475 | rt2800_rfcsr_write(rt2x00dev, 28, 0x00); |
6453 | rt2800_rfcsr_write(rt2x00dev, 29, 0x10); | 6476 | rt2800_rfcsr_write(rt2x00dev, 29, 0x10); |
6454 | 6477 | ||
6455 | rt2800_rfcsr_write(rt2x00dev, 30, 0x00); | 6478 | rt2800_rfcsr_write(rt2x00dev, 30, 0x10); |
6456 | rt2800_rfcsr_write(rt2x00dev, 31, 0x80); | 6479 | rt2800_rfcsr_write(rt2x00dev, 31, 0x80); |
6457 | rt2800_rfcsr_write(rt2x00dev, 32, 0x80); | 6480 | rt2800_rfcsr_write(rt2x00dev, 32, 0x80); |
6458 | rt2800_rfcsr_write(rt2x00dev, 33, 0x00); | 6481 | rt2800_rfcsr_write(rt2x00dev, 33, 0x00); |
@@ -6490,7 +6513,7 @@ static void rt2800_init_rfcsr_5390(struct rt2x00_dev *rt2x00dev) | |||
6490 | rt2800_rfcsr_write(rt2x00dev, 56, 0x22); | 6513 | rt2800_rfcsr_write(rt2x00dev, 56, 0x22); |
6491 | rt2800_rfcsr_write(rt2x00dev, 57, 0x80); | 6514 | rt2800_rfcsr_write(rt2x00dev, 57, 0x80); |
6492 | rt2800_rfcsr_write(rt2x00dev, 58, 0x7f); | 6515 | rt2800_rfcsr_write(rt2x00dev, 58, 0x7f); |
6493 | rt2800_rfcsr_write(rt2x00dev, 59, 0x63); | 6516 | rt2800_rfcsr_write(rt2x00dev, 59, 0x8f); |
6494 | 6517 | ||
6495 | rt2800_rfcsr_write(rt2x00dev, 60, 0x45); | 6518 | rt2800_rfcsr_write(rt2x00dev, 60, 0x45); |
6496 | if (rt2x00_rt_rev_gte(rt2x00dev, RT5390, REV_RT5390F)) | 6519 | if (rt2x00_rt_rev_gte(rt2x00dev, RT5390, REV_RT5390F)) |
@@ -6510,7 +6533,6 @@ static void rt2800_init_rfcsr_5392(struct rt2x00_dev *rt2x00dev) | |||
6510 | rt2800_rf_init_calibration(rt2x00dev, 2); | 6533 | rt2800_rf_init_calibration(rt2x00dev, 2); |
6511 | 6534 | ||
6512 | rt2800_rfcsr_write(rt2x00dev, 1, 0x17); | 6535 | rt2800_rfcsr_write(rt2x00dev, 1, 0x17); |
6513 | rt2800_rfcsr_write(rt2x00dev, 2, 0x80); | ||
6514 | rt2800_rfcsr_write(rt2x00dev, 3, 0x88); | 6536 | rt2800_rfcsr_write(rt2x00dev, 3, 0x88); |
6515 | rt2800_rfcsr_write(rt2x00dev, 5, 0x10); | 6537 | rt2800_rfcsr_write(rt2x00dev, 5, 0x10); |
6516 | rt2800_rfcsr_write(rt2x00dev, 6, 0xe0); | 6538 | rt2800_rfcsr_write(rt2x00dev, 6, 0xe0); |
@@ -7224,7 +7246,7 @@ static const struct rf_channel rf_vals[] = { | |||
7224 | 7246 | ||
7225 | /* | 7247 | /* |
7226 | * RF value list for rt3xxx | 7248 | * RF value list for rt3xxx |
7227 | * Supports: 2.4 GHz (all) & 5.2 GHz (RF3052) | 7249 | * Supports: 2.4 GHz (all) & 5.2 GHz (RF3052 & RF3053) |
7228 | */ | 7250 | */ |
7229 | static const struct rf_channel rf_vals_3x[] = { | 7251 | static const struct rf_channel rf_vals_3x[] = { |
7230 | {1, 241, 2, 2 }, | 7252 | {1, 241, 2, 2 }, |
@@ -7420,72 +7442,6 @@ static const struct rf_channel rf_vals_5592_xtal40[] = { | |||
7420 | {196, 83, 0, 12, 1}, | 7442 | {196, 83, 0, 12, 1}, |
7421 | }; | 7443 | }; |
7422 | 7444 | ||
7423 | static const struct rf_channel rf_vals_3053[] = { | ||
7424 | /* Channel, N, R, K */ | ||
7425 | {1, 241, 2, 2}, | ||
7426 | {2, 241, 2, 7}, | ||
7427 | {3, 242, 2, 2}, | ||
7428 | {4, 242, 2, 7}, | ||
7429 | {5, 243, 2, 2}, | ||
7430 | {6, 243, 2, 7}, | ||
7431 | {7, 244, 2, 2}, | ||
7432 | {8, 244, 2, 7}, | ||
7433 | {9, 245, 2, 2}, | ||
7434 | {10, 245, 2, 7}, | ||
7435 | {11, 246, 2, 2}, | ||
7436 | {12, 246, 2, 7}, | ||
7437 | {13, 247, 2, 2}, | ||
7438 | {14, 248, 2, 4}, | ||
7439 | |||
7440 | {36, 0x56, 0, 4}, | ||
7441 | {38, 0x56, 0, 6}, | ||
7442 | {40, 0x56, 0, 8}, | ||
7443 | {44, 0x57, 0, 0}, | ||
7444 | {46, 0x57, 0, 2}, | ||
7445 | {48, 0x57, 0, 4}, | ||
7446 | {52, 0x57, 0, 8}, | ||
7447 | {54, 0x57, 0, 10}, | ||
7448 | {56, 0x58, 0, 0}, | ||
7449 | {60, 0x58, 0, 4}, | ||
7450 | {62, 0x58, 0, 6}, | ||
7451 | {64, 0x58, 0, 8}, | ||
7452 | |||
7453 | {100, 0x5B, 0, 8}, | ||
7454 | {102, 0x5B, 0, 10}, | ||
7455 | {104, 0x5C, 0, 0}, | ||
7456 | {108, 0x5C, 0, 4}, | ||
7457 | {110, 0x5C, 0, 6}, | ||
7458 | {112, 0x5C, 0, 8}, | ||
7459 | |||
7460 | /* NOTE: Channel 114 has been removed intentionally. | ||
7461 | * The EEPROM contains no TX power values for that, | ||
7462 | * and it is disabled in the vendor driver as well. | ||
7463 | */ | ||
7464 | |||
7465 | {116, 0x5D, 0, 0}, | ||
7466 | {118, 0x5D, 0, 2}, | ||
7467 | {120, 0x5D, 0, 4}, | ||
7468 | {124, 0x5D, 0, 8}, | ||
7469 | {126, 0x5D, 0, 10}, | ||
7470 | {128, 0x5E, 0, 0}, | ||
7471 | {132, 0x5E, 0, 4}, | ||
7472 | {134, 0x5E, 0, 6}, | ||
7473 | {136, 0x5E, 0, 8}, | ||
7474 | {140, 0x5F, 0, 0}, | ||
7475 | |||
7476 | {149, 0x5F, 0, 9}, | ||
7477 | {151, 0x5F, 0, 11}, | ||
7478 | {153, 0x60, 0, 1}, | ||
7479 | {157, 0x60, 0, 5}, | ||
7480 | {159, 0x60, 0, 7}, | ||
7481 | {161, 0x60, 0, 9}, | ||
7482 | {165, 0x61, 0, 1}, | ||
7483 | {167, 0x61, 0, 3}, | ||
7484 | {169, 0x61, 0, 5}, | ||
7485 | {171, 0x61, 0, 7}, | ||
7486 | {173, 0x61, 0, 9}, | ||
7487 | }; | ||
7488 | |||
7489 | static int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev) | 7445 | static int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev) |
7490 | { | 7446 | { |
7491 | struct hw_mode_spec *spec = &rt2x00dev->spec; | 7447 | struct hw_mode_spec *spec = &rt2x00dev->spec; |
@@ -7575,14 +7531,11 @@ static int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev) | |||
7575 | rt2x00_rf(rt2x00dev, RF5392)) { | 7531 | rt2x00_rf(rt2x00dev, RF5392)) { |
7576 | spec->num_channels = 14; | 7532 | spec->num_channels = 14; |
7577 | spec->channels = rf_vals_3x; | 7533 | spec->channels = rf_vals_3x; |
7578 | } else if (rt2x00_rf(rt2x00dev, RF3052)) { | 7534 | } else if (rt2x00_rf(rt2x00dev, RF3052) || |
7535 | rt2x00_rf(rt2x00dev, RF3053)) { | ||
7579 | spec->supported_bands |= SUPPORT_BAND_5GHZ; | 7536 | spec->supported_bands |= SUPPORT_BAND_5GHZ; |
7580 | spec->num_channels = ARRAY_SIZE(rf_vals_3x); | 7537 | spec->num_channels = ARRAY_SIZE(rf_vals_3x); |
7581 | spec->channels = rf_vals_3x; | 7538 | spec->channels = rf_vals_3x; |
7582 | } else if (rt2x00_rf(rt2x00dev, RF3053)) { | ||
7583 | spec->supported_bands |= SUPPORT_BAND_5GHZ; | ||
7584 | spec->num_channels = ARRAY_SIZE(rf_vals_3053); | ||
7585 | spec->channels = rf_vals_3053; | ||
7586 | } else if (rt2x00_rf(rt2x00dev, RF5592)) { | 7539 | } else if (rt2x00_rf(rt2x00dev, RF5592)) { |
7587 | spec->supported_bands |= SUPPORT_BAND_5GHZ; | 7540 | spec->supported_bands |= SUPPORT_BAND_5GHZ; |
7588 | 7541 | ||