diff options
Diffstat (limited to 'drivers/net/wireless/iwmc3200wifi/fw.c')
| -rw-r--r-- | drivers/net/wireless/iwmc3200wifi/fw.c | 388 |
1 files changed, 388 insertions, 0 deletions
diff --git a/drivers/net/wireless/iwmc3200wifi/fw.c b/drivers/net/wireless/iwmc3200wifi/fw.c new file mode 100644 index 000000000000..db4ba0864730 --- /dev/null +++ b/drivers/net/wireless/iwmc3200wifi/fw.c | |||
| @@ -0,0 +1,388 @@ | |||
| 1 | /* | ||
| 2 | * Intel Wireless Multicomm 3200 WiFi driver | ||
| 3 | * | ||
| 4 | * Copyright (C) 2009 Intel Corporation. All rights reserved. | ||
| 5 | * | ||
| 6 | * Redistribution and use in source and binary forms, with or without | ||
| 7 | * modification, are permitted provided that the following conditions | ||
| 8 | * are met: | ||
| 9 | * | ||
| 10 | * * Redistributions of source code must retain the above copyright | ||
| 11 | * notice, this list of conditions and the following disclaimer. | ||
| 12 | * * Redistributions in binary form must reproduce the above copyright | ||
| 13 | * notice, this list of conditions and the following disclaimer in | ||
| 14 | * the documentation and/or other materials provided with the | ||
| 15 | * distribution. | ||
| 16 | * * Neither the name of Intel Corporation nor the names of its | ||
| 17 | * contributors may be used to endorse or promote products derived | ||
| 18 | * from this software without specific prior written permission. | ||
| 19 | * | ||
| 20 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | ||
| 21 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | ||
| 22 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | ||
| 23 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | ||
| 24 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | ||
| 25 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | ||
| 26 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | ||
| 27 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | ||
| 28 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
| 29 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | ||
| 30 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
| 31 | * | ||
| 32 | * | ||
| 33 | * Intel Corporation <ilw@linux.intel.com> | ||
| 34 | * Samuel Ortiz <samuel.ortiz@intel.com> | ||
| 35 | * Zhu Yi <yi.zhu@intel.com> | ||
| 36 | * | ||
| 37 | */ | ||
| 38 | |||
| 39 | #include <linux/kernel.h> | ||
| 40 | #include <linux/firmware.h> | ||
| 41 | |||
| 42 | #include "iwm.h" | ||
| 43 | #include "bus.h" | ||
| 44 | #include "hal.h" | ||
| 45 | #include "umac.h" | ||
| 46 | #include "debug.h" | ||
| 47 | #include "fw.h" | ||
| 48 | #include "commands.h" | ||
| 49 | |||
| 50 | static const char fw_barker[] = "*WESTOPFORNOONE*"; | ||
| 51 | |||
| 52 | /* | ||
| 53 | * @op_code: Op code we're looking for. | ||
| 54 | * @index: There can be several instances of the same opcode within | ||
| 55 | * the firmware. Index specifies which one we're looking for. | ||
| 56 | */ | ||
| 57 | static int iwm_fw_op_offset(struct iwm_priv *iwm, const struct firmware *fw, | ||
| 58 | u16 op_code, u32 index) | ||
| 59 | { | ||
| 60 | int offset = -EINVAL, fw_offset; | ||
| 61 | u32 op_index = 0; | ||
| 62 | const u8 *fw_ptr; | ||
| 63 | struct iwm_fw_hdr_rec *rec; | ||
| 64 | |||
| 65 | fw_offset = 0; | ||
| 66 | fw_ptr = fw->data; | ||
| 67 | |||
| 68 | /* We first need to look for the firmware barker */ | ||
| 69 | if (memcmp(fw_ptr, fw_barker, IWM_HDR_BARKER_LEN)) { | ||
| 70 | IWM_ERR(iwm, "No barker string in this FW\n"); | ||
| 71 | return -EINVAL; | ||
| 72 | } | ||
| 73 | |||
| 74 | if (fw->size < IWM_HDR_LEN) { | ||
| 75 | IWM_ERR(iwm, "FW is too small (%d)\n", fw->size); | ||
| 76 | return -EINVAL; | ||
| 77 | } | ||
| 78 | |||
| 79 | fw_offset += IWM_HDR_BARKER_LEN; | ||
| 80 | |||
| 81 | while (fw_offset < fw->size) { | ||
| 82 | rec = (struct iwm_fw_hdr_rec *)(fw_ptr + fw_offset); | ||
| 83 | |||
| 84 | IWM_DBG_FW(iwm, DBG, "FW: op_code: 0x%x, len: %d @ 0x%x\n", | ||
| 85 | rec->op_code, rec->len, fw_offset); | ||
| 86 | |||
| 87 | if (rec->op_code == IWM_HDR_REC_OP_INVALID) { | ||
| 88 | IWM_DBG_FW(iwm, DBG, "Reached INVALID op code\n"); | ||
| 89 | break; | ||
| 90 | } | ||
| 91 | |||
| 92 | if (rec->op_code == op_code) { | ||
| 93 | if (op_index == index) { | ||
| 94 | fw_offset += sizeof(struct iwm_fw_hdr_rec); | ||
| 95 | offset = fw_offset; | ||
| 96 | goto out; | ||
| 97 | } | ||
| 98 | op_index++; | ||
| 99 | } | ||
| 100 | |||
| 101 | fw_offset += sizeof(struct iwm_fw_hdr_rec) + rec->len; | ||
| 102 | } | ||
| 103 | |||
| 104 | out: | ||
| 105 | return offset; | ||
| 106 | } | ||
| 107 | |||
| 108 | static int iwm_load_firmware_chunk(struct iwm_priv *iwm, | ||
| 109 | const struct firmware *fw, | ||
| 110 | struct iwm_fw_img_desc *img_desc) | ||
| 111 | { | ||
| 112 | struct iwm_udma_nonwifi_cmd target_cmd; | ||
| 113 | u32 chunk_size; | ||
| 114 | const u8 *chunk_ptr; | ||
| 115 | int ret = 0; | ||
| 116 | |||
| 117 | IWM_DBG_FW(iwm, INFO, "Loading FW chunk: %d bytes @ 0x%x\n", | ||
| 118 | img_desc->length, img_desc->address); | ||
| 119 | |||
| 120 | target_cmd.opcode = UMAC_HDI_OUT_OPCODE_WRITE; | ||
| 121 | target_cmd.handle_by_hw = 1; | ||
| 122 | target_cmd.op2 = 0; | ||
| 123 | target_cmd.resp = 0; | ||
| 124 | target_cmd.eop = 1; | ||
| 125 | |||
| 126 | chunk_size = img_desc->length; | ||
| 127 | chunk_ptr = fw->data + img_desc->offset; | ||
| 128 | |||
| 129 | while (chunk_size > 0) { | ||
| 130 | u32 tmp_chunk_size; | ||
| 131 | |||
| 132 | tmp_chunk_size = min_t(u32, chunk_size, | ||
| 133 | IWM_MAX_NONWIFI_CMD_BUFF_SIZE); | ||
| 134 | |||
| 135 | target_cmd.addr = cpu_to_le32(img_desc->address + | ||
| 136 | (chunk_ptr - fw->data - img_desc->offset)); | ||
| 137 | target_cmd.op1_sz = cpu_to_le32(tmp_chunk_size); | ||
| 138 | |||
| 139 | IWM_DBG_FW(iwm, DBG, "\t%d bytes @ 0x%x\n", | ||
| 140 | tmp_chunk_size, target_cmd.addr); | ||
| 141 | |||
| 142 | ret = iwm_hal_send_target_cmd(iwm, &target_cmd, chunk_ptr); | ||
| 143 | if (ret < 0) { | ||
| 144 | IWM_ERR(iwm, "Couldn't load FW chunk\n"); | ||
| 145 | break; | ||
| 146 | } | ||
| 147 | |||
| 148 | chunk_size -= tmp_chunk_size; | ||
| 149 | chunk_ptr += tmp_chunk_size; | ||
| 150 | } | ||
| 151 | |||
| 152 | return ret; | ||
| 153 | } | ||
| 154 | /* | ||
| 155 | * To load a fw image to the target, we basically go through the | ||
| 156 | * fw, looking for OP_MEM_DESC records. Once we found one, we | ||
| 157 | * pass it to iwm_load_firmware_chunk(). | ||
| 158 | * The OP_MEM_DESC records contain the actuall memory chunk to be | ||
| 159 | * sent, but also the destination address. | ||
| 160 | */ | ||
| 161 | static int iwm_load_img(struct iwm_priv *iwm, const char *img_name) | ||
| 162 | { | ||
| 163 | const struct firmware *fw; | ||
| 164 | struct iwm_fw_img_desc *img_desc; | ||
| 165 | struct iwm_fw_img_ver *ver; | ||
| 166 | int ret = 0, fw_offset; | ||
| 167 | u32 opcode_idx = 0, build_date; | ||
| 168 | char *build_tag; | ||
| 169 | |||
| 170 | ret = request_firmware(&fw, img_name, iwm_to_dev(iwm)); | ||
| 171 | if (ret) { | ||
| 172 | IWM_ERR(iwm, "Request firmware failed"); | ||
| 173 | return ret; | ||
| 174 | } | ||
| 175 | |||
| 176 | IWM_DBG_FW(iwm, INFO, "Start to load FW %s\n", img_name); | ||
| 177 | |||
| 178 | while (1) { | ||
| 179 | fw_offset = iwm_fw_op_offset(iwm, fw, | ||
| 180 | IWM_HDR_REC_OP_MEM_DESC, | ||
| 181 | opcode_idx); | ||
| 182 | if (fw_offset < 0) | ||
| 183 | break; | ||
| 184 | |||
| 185 | img_desc = (struct iwm_fw_img_desc *)(fw->data + fw_offset); | ||
| 186 | ret = iwm_load_firmware_chunk(iwm, fw, img_desc); | ||
| 187 | if (ret < 0) | ||
| 188 | goto err_release_fw; | ||
| 189 | opcode_idx++; | ||
| 190 | }; | ||
| 191 | |||
| 192 | /* Read firmware version */ | ||
| 193 | fw_offset = iwm_fw_op_offset(iwm, fw, IWM_HDR_REC_OP_SW_VER, 0); | ||
| 194 | if (fw_offset < 0) | ||
| 195 | goto err_release_fw; | ||
| 196 | |||
| 197 | ver = (struct iwm_fw_img_ver *)(fw->data + fw_offset); | ||
| 198 | |||
| 199 | /* Read build tag */ | ||
| 200 | fw_offset = iwm_fw_op_offset(iwm, fw, IWM_HDR_REC_OP_BUILD_TAG, 0); | ||
| 201 | if (fw_offset < 0) | ||
| 202 | goto err_release_fw; | ||
| 203 | |||
| 204 | build_tag = (char *)(fw->data + fw_offset); | ||
| 205 | |||
| 206 | /* Read build date */ | ||
| 207 | fw_offset = iwm_fw_op_offset(iwm, fw, IWM_HDR_REC_OP_BUILD_DATE, 0); | ||
| 208 | if (fw_offset < 0) | ||
| 209 | goto err_release_fw; | ||
| 210 | |||
| 211 | build_date = *(u32 *)(fw->data + fw_offset); | ||
| 212 | |||
| 213 | IWM_INFO(iwm, "%s:\n", img_name); | ||
| 214 | IWM_INFO(iwm, "\tVersion: %02X.%02X\n", ver->major, ver->minor); | ||
| 215 | IWM_INFO(iwm, "\tBuild tag: %s\n", build_tag); | ||
| 216 | IWM_INFO(iwm, "\tBuild date: %x-%x-%x\n", | ||
| 217 | IWM_BUILD_YEAR(build_date), IWM_BUILD_MONTH(build_date), | ||
| 218 | IWM_BUILD_DAY(build_date)); | ||
| 219 | |||
| 220 | |||
| 221 | err_release_fw: | ||
| 222 | release_firmware(fw); | ||
| 223 | |||
| 224 | return ret; | ||
| 225 | } | ||
| 226 | |||
| 227 | static int iwm_load_umac(struct iwm_priv *iwm) | ||
| 228 | { | ||
| 229 | struct iwm_udma_nonwifi_cmd target_cmd; | ||
| 230 | int ret; | ||
| 231 | |||
| 232 | ret = iwm_load_img(iwm, iwm->bus_ops->umac_name); | ||
| 233 | if (ret < 0) | ||
| 234 | return ret; | ||
| 235 | |||
| 236 | /* We've loaded the UMAC, we can tell the target to jump there */ | ||
| 237 | target_cmd.opcode = UMAC_HDI_OUT_OPCODE_JUMP; | ||
| 238 | target_cmd.addr = cpu_to_le32(UMAC_MU_FW_INST_DATA_12_ADDR); | ||
| 239 | target_cmd.op1_sz = 0; | ||
| 240 | target_cmd.op2 = 0; | ||
| 241 | target_cmd.handle_by_hw = 0; | ||
| 242 | target_cmd.resp = 1 ; | ||
| 243 | target_cmd.eop = 1; | ||
| 244 | |||
| 245 | ret = iwm_hal_send_target_cmd(iwm, &target_cmd, NULL); | ||
| 246 | if (ret < 0) | ||
| 247 | IWM_ERR(iwm, "Couldn't send JMP command\n"); | ||
| 248 | |||
| 249 | return ret; | ||
| 250 | } | ||
| 251 | |||
| 252 | static int iwm_load_lmac(struct iwm_priv *iwm, const char *img_name) | ||
| 253 | { | ||
| 254 | int ret; | ||
| 255 | |||
| 256 | ret = iwm_load_img(iwm, img_name); | ||
| 257 | if (ret < 0) | ||
| 258 | return ret; | ||
| 259 | |||
| 260 | return iwm_send_umac_reset(iwm, | ||
| 261 | cpu_to_le32(UMAC_RST_CTRL_FLG_LARC_CLK_EN), 0); | ||
| 262 | } | ||
| 263 | |||
| 264 | /* | ||
| 265 | * We currently have to load 3 FWs: | ||
| 266 | * 1) The UMAC (Upper MAC). | ||
| 267 | * 2) The calibration LMAC (Lower MAC). | ||
| 268 | * We then send the calibration init command, so that the device can | ||
| 269 | * run a first calibration round. | ||
| 270 | * 3) The operational LMAC, which replaces the calibration one when it's | ||
| 271 | * done with the first calibration round. | ||
| 272 | * | ||
| 273 | * Once those 3 FWs have been loaded, we send the periodic calibration | ||
| 274 | * command, and then the device is available for regular 802.11 operations. | ||
| 275 | */ | ||
| 276 | int iwm_load_fw(struct iwm_priv *iwm) | ||
| 277 | { | ||
| 278 | int ret; | ||
| 279 | |||
| 280 | /* We first start downloading the UMAC */ | ||
| 281 | ret = iwm_load_umac(iwm); | ||
| 282 | if (ret < 0) { | ||
| 283 | IWM_ERR(iwm, "UMAC loading failed\n"); | ||
| 284 | return ret; | ||
| 285 | } | ||
| 286 | |||
| 287 | /* Handle UMAC_ALIVE notification */ | ||
| 288 | ret = iwm_notif_handle(iwm, UMAC_NOTIFY_OPCODE_ALIVE, IWM_SRC_UMAC, | ||
| 289 | WAIT_NOTIF_TIMEOUT); | ||
| 290 | if (ret) { | ||
| 291 | IWM_ERR(iwm, "Handle UMAC_ALIVE failed: %d\n", ret); | ||
| 292 | return ret; | ||
| 293 | } | ||
| 294 | |||
| 295 | /* UMAC is alive, we can download the calibration LMAC */ | ||
| 296 | ret = iwm_load_lmac(iwm, iwm->bus_ops->calib_lmac_name); | ||
| 297 | if (ret) { | ||
| 298 | IWM_ERR(iwm, "Calibration LMAC loading failed\n"); | ||
| 299 | return ret; | ||
| 300 | } | ||
| 301 | |||
| 302 | /* Handle UMAC_INIT_COMPLETE notification */ | ||
| 303 | ret = iwm_notif_handle(iwm, UMAC_NOTIFY_OPCODE_INIT_COMPLETE, | ||
| 304 | IWM_SRC_UMAC, WAIT_NOTIF_TIMEOUT); | ||
| 305 | if (ret) { | ||
| 306 | IWM_ERR(iwm, "Handle INIT_COMPLETE failed for calibration " | ||
| 307 | "LMAC: %d\n", ret); | ||
| 308 | return ret; | ||
| 309 | } | ||
| 310 | |||
| 311 | /* Read EEPROM data */ | ||
| 312 | ret = iwm_eeprom_init(iwm); | ||
| 313 | if (ret < 0) { | ||
| 314 | IWM_ERR(iwm, "Couldn't init eeprom array\n"); | ||
| 315 | return ret; | ||
| 316 | } | ||
| 317 | |||
| 318 | #ifdef CONFIG_IWM_B0_HW_SUPPORT | ||
| 319 | if (iwm->conf.hw_b0) { | ||
| 320 | clear_bit(PHY_CALIBRATE_RX_IQ_CMD, &iwm->conf.init_calib_map); | ||
| 321 | clear_bit(PHY_CALIBRATE_RX_IQ_CMD, | ||
| 322 | &iwm->conf.periodic_calib_map); | ||
| 323 | } | ||
| 324 | #endif | ||
| 325 | /* Read RX IQ calibration result from EEPROM */ | ||
| 326 | if (test_bit(PHY_CALIBRATE_RX_IQ_CMD, &iwm->conf.init_calib_map)) { | ||
| 327 | iwm_store_rxiq_calib_result(iwm); | ||
| 328 | set_bit(PHY_CALIBRATE_RX_IQ_CMD, &iwm->calib_done_map); | ||
| 329 | } | ||
| 330 | |||
| 331 | iwm_send_prio_table(iwm); | ||
| 332 | iwm_send_init_calib_cfg(iwm, iwm->conf.init_calib_map); | ||
| 333 | |||
| 334 | while (iwm->calib_done_map != iwm->conf.init_calib_map) { | ||
| 335 | ret = iwm_notif_handle(iwm, CALIBRATION_RES_NOTIFICATION, | ||
| 336 | IWM_SRC_LMAC, WAIT_NOTIF_TIMEOUT); | ||
| 337 | if (ret) { | ||
| 338 | IWM_ERR(iwm, "Wait for calibration result timeout\n"); | ||
| 339 | goto out; | ||
| 340 | } | ||
| 341 | IWM_DBG_FW(iwm, DBG, "Got calibration result. calib_done_map: " | ||
| 342 | "0x%lx, requested calibrations: 0x%lx\n", | ||
| 343 | iwm->calib_done_map, iwm->conf.init_calib_map); | ||
| 344 | } | ||
| 345 | |||
| 346 | /* Handle LMAC CALIBRATION_COMPLETE notification */ | ||
| 347 | ret = iwm_notif_handle(iwm, CALIBRATION_COMPLETE_NOTIFICATION, | ||
| 348 | IWM_SRC_LMAC, WAIT_NOTIF_TIMEOUT); | ||
| 349 | if (ret) { | ||
| 350 | IWM_ERR(iwm, "Wait for CALIBRATION_COMPLETE timeout\n"); | ||
| 351 | goto out; | ||
| 352 | } | ||
| 353 | |||
| 354 | IWM_INFO(iwm, "LMAC calibration done: 0x%lx\n", iwm->calib_done_map); | ||
| 355 | |||
| 356 | iwm_send_umac_reset(iwm, cpu_to_le32(UMAC_RST_CTRL_FLG_LARC_RESET), 1); | ||
| 357 | |||
| 358 | ret = iwm_notif_handle(iwm, UMAC_CMD_OPCODE_RESET, IWM_SRC_UMAC, | ||
| 359 | WAIT_NOTIF_TIMEOUT); | ||
| 360 | if (ret) { | ||
| 361 | IWM_ERR(iwm, "Wait for UMAC RESET timeout\n"); | ||
| 362 | goto out; | ||
| 363 | } | ||
| 364 | |||
| 365 | /* Download the operational LMAC */ | ||
| 366 | ret = iwm_load_lmac(iwm, iwm->bus_ops->lmac_name); | ||
| 367 | if (ret) { | ||
| 368 | IWM_ERR(iwm, "LMAC loading failed\n"); | ||
| 369 | goto out; | ||
| 370 | } | ||
| 371 | |||
| 372 | ret = iwm_notif_handle(iwm, UMAC_NOTIFY_OPCODE_INIT_COMPLETE, | ||
| 373 | IWM_SRC_UMAC, WAIT_NOTIF_TIMEOUT); | ||
| 374 | if (ret) { | ||
| 375 | IWM_ERR(iwm, "Handle INIT_COMPLETE failed for LMAC: %d\n", ret); | ||
| 376 | goto out; | ||
| 377 | } | ||
| 378 | |||
| 379 | iwm_send_prio_table(iwm); | ||
| 380 | iwm_send_calib_results(iwm); | ||
| 381 | iwm_send_periodic_calib_cfg(iwm, iwm->conf.periodic_calib_map); | ||
| 382 | |||
| 383 | return 0; | ||
| 384 | |||
| 385 | out: | ||
| 386 | iwm_eeprom_exit(iwm); | ||
| 387 | return ret; | ||
| 388 | } | ||
