diff options
Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl3945-base.c')
-rw-r--r-- | drivers/net/wireless/iwlwifi/iwl3945-base.c | 4322 |
1 files changed, 0 insertions, 4322 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl3945-base.c b/drivers/net/wireless/iwlwifi/iwl3945-base.c deleted file mode 100644 index d31661c1ce77..000000000000 --- a/drivers/net/wireless/iwlwifi/iwl3945-base.c +++ /dev/null | |||
@@ -1,4322 +0,0 @@ | |||
1 | /****************************************************************************** | ||
2 | * | ||
3 | * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved. | ||
4 | * | ||
5 | * Portions of this file are derived from the ipw3945 project, as well | ||
6 | * as portions of the ieee80211 subsystem header files. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify it | ||
9 | * under the terms of version 2 of the GNU General Public License as | ||
10 | * published by the Free Software Foundation. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, but WITHOUT | ||
13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
15 | * more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License along with | ||
18 | * this program; if not, write to the Free Software Foundation, Inc., | ||
19 | * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA | ||
20 | * | ||
21 | * The full GNU General Public License is included in this distribution in the | ||
22 | * file called LICENSE. | ||
23 | * | ||
24 | * Contact Information: | ||
25 | * Intel Linux Wireless <ilw@linux.intel.com> | ||
26 | * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 | ||
27 | * | ||
28 | *****************************************************************************/ | ||
29 | |||
30 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | ||
31 | |||
32 | #include <linux/kernel.h> | ||
33 | #include <linux/module.h> | ||
34 | #include <linux/init.h> | ||
35 | #include <linux/pci.h> | ||
36 | #include <linux/slab.h> | ||
37 | #include <linux/dma-mapping.h> | ||
38 | #include <linux/delay.h> | ||
39 | #include <linux/sched.h> | ||
40 | #include <linux/skbuff.h> | ||
41 | #include <linux/netdevice.h> | ||
42 | #include <linux/wireless.h> | ||
43 | #include <linux/firmware.h> | ||
44 | #include <linux/etherdevice.h> | ||
45 | #include <linux/if_arp.h> | ||
46 | |||
47 | #include <net/ieee80211_radiotap.h> | ||
48 | #include <net/mac80211.h> | ||
49 | |||
50 | #include <asm/div64.h> | ||
51 | |||
52 | #define DRV_NAME "iwl3945" | ||
53 | |||
54 | #include "iwl-fh.h" | ||
55 | #include "iwl-3945-fh.h" | ||
56 | #include "iwl-commands.h" | ||
57 | #include "iwl-sta.h" | ||
58 | #include "iwl-3945.h" | ||
59 | #include "iwl-core.h" | ||
60 | #include "iwl-helpers.h" | ||
61 | #include "iwl-dev.h" | ||
62 | #include "iwl-spectrum.h" | ||
63 | |||
64 | /* | ||
65 | * module name, copyright, version, etc. | ||
66 | */ | ||
67 | |||
68 | #define DRV_DESCRIPTION \ | ||
69 | "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux" | ||
70 | |||
71 | #ifdef CONFIG_IWLWIFI_DEBUG | ||
72 | #define VD "d" | ||
73 | #else | ||
74 | #define VD | ||
75 | #endif | ||
76 | |||
77 | /* | ||
78 | * add "s" to indicate spectrum measurement included. | ||
79 | * we add it here to be consistent with previous releases in which | ||
80 | * this was configurable. | ||
81 | */ | ||
82 | #define DRV_VERSION IWLWIFI_VERSION VD "s" | ||
83 | #define DRV_COPYRIGHT "Copyright(c) 2003-2010 Intel Corporation" | ||
84 | #define DRV_AUTHOR "<ilw@linux.intel.com>" | ||
85 | |||
86 | MODULE_DESCRIPTION(DRV_DESCRIPTION); | ||
87 | MODULE_VERSION(DRV_VERSION); | ||
88 | MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR); | ||
89 | MODULE_LICENSE("GPL"); | ||
90 | |||
91 | /* module parameters */ | ||
92 | struct iwl_mod_params iwl3945_mod_params = { | ||
93 | .sw_crypto = 1, | ||
94 | .restart_fw = 1, | ||
95 | /* the rest are 0 by default */ | ||
96 | }; | ||
97 | |||
98 | /** | ||
99 | * iwl3945_get_antenna_flags - Get antenna flags for RXON command | ||
100 | * @priv: eeprom and antenna fields are used to determine antenna flags | ||
101 | * | ||
102 | * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed | ||
103 | * iwl3945_mod_params.antenna specifies the antenna diversity mode: | ||
104 | * | ||
105 | * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself | ||
106 | * IWL_ANTENNA_MAIN - Force MAIN antenna | ||
107 | * IWL_ANTENNA_AUX - Force AUX antenna | ||
108 | */ | ||
109 | __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv) | ||
110 | { | ||
111 | struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom; | ||
112 | |||
113 | switch (iwl3945_mod_params.antenna) { | ||
114 | case IWL_ANTENNA_DIVERSITY: | ||
115 | return 0; | ||
116 | |||
117 | case IWL_ANTENNA_MAIN: | ||
118 | if (eeprom->antenna_switch_type) | ||
119 | return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK; | ||
120 | return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK; | ||
121 | |||
122 | case IWL_ANTENNA_AUX: | ||
123 | if (eeprom->antenna_switch_type) | ||
124 | return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK; | ||
125 | return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK; | ||
126 | } | ||
127 | |||
128 | /* bad antenna selector value */ | ||
129 | IWL_ERR(priv, "Bad antenna selector value (0x%x)\n", | ||
130 | iwl3945_mod_params.antenna); | ||
131 | |||
132 | return 0; /* "diversity" is default if error */ | ||
133 | } | ||
134 | |||
135 | static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv, | ||
136 | struct ieee80211_key_conf *keyconf, | ||
137 | u8 sta_id) | ||
138 | { | ||
139 | unsigned long flags; | ||
140 | __le16 key_flags = 0; | ||
141 | int ret; | ||
142 | |||
143 | key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK); | ||
144 | key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS); | ||
145 | |||
146 | if (sta_id == priv->hw_params.bcast_sta_id) | ||
147 | key_flags |= STA_KEY_MULTICAST_MSK; | ||
148 | |||
149 | keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV; | ||
150 | keyconf->hw_key_idx = keyconf->keyidx; | ||
151 | key_flags &= ~STA_KEY_FLG_INVALID; | ||
152 | |||
153 | spin_lock_irqsave(&priv->sta_lock, flags); | ||
154 | priv->stations[sta_id].keyinfo.alg = keyconf->alg; | ||
155 | priv->stations[sta_id].keyinfo.keylen = keyconf->keylen; | ||
156 | memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key, | ||
157 | keyconf->keylen); | ||
158 | |||
159 | memcpy(priv->stations[sta_id].sta.key.key, keyconf->key, | ||
160 | keyconf->keylen); | ||
161 | |||
162 | if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK) | ||
163 | == STA_KEY_FLG_NO_ENC) | ||
164 | priv->stations[sta_id].sta.key.key_offset = | ||
165 | iwl_get_free_ucode_key_index(priv); | ||
166 | /* else, we are overriding an existing key => no need to allocated room | ||
167 | * in uCode. */ | ||
168 | |||
169 | WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET, | ||
170 | "no space for a new key"); | ||
171 | |||
172 | priv->stations[sta_id].sta.key.key_flags = key_flags; | ||
173 | priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; | ||
174 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | ||
175 | |||
176 | IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n"); | ||
177 | |||
178 | ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC); | ||
179 | |||
180 | spin_unlock_irqrestore(&priv->sta_lock, flags); | ||
181 | |||
182 | return ret; | ||
183 | } | ||
184 | |||
185 | static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv, | ||
186 | struct ieee80211_key_conf *keyconf, | ||
187 | u8 sta_id) | ||
188 | { | ||
189 | return -EOPNOTSUPP; | ||
190 | } | ||
191 | |||
192 | static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv, | ||
193 | struct ieee80211_key_conf *keyconf, | ||
194 | u8 sta_id) | ||
195 | { | ||
196 | return -EOPNOTSUPP; | ||
197 | } | ||
198 | |||
199 | static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id) | ||
200 | { | ||
201 | unsigned long flags; | ||
202 | struct iwl_addsta_cmd sta_cmd; | ||
203 | |||
204 | spin_lock_irqsave(&priv->sta_lock, flags); | ||
205 | memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key)); | ||
206 | memset(&priv->stations[sta_id].sta.key, 0, | ||
207 | sizeof(struct iwl4965_keyinfo)); | ||
208 | priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC; | ||
209 | priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK; | ||
210 | priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK; | ||
211 | memcpy(&sta_cmd, &priv->stations[sta_id].sta, sizeof(struct iwl_addsta_cmd)); | ||
212 | spin_unlock_irqrestore(&priv->sta_lock, flags); | ||
213 | |||
214 | IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n"); | ||
215 | return iwl_send_add_sta(priv, &sta_cmd, CMD_SYNC); | ||
216 | } | ||
217 | |||
218 | static int iwl3945_set_dynamic_key(struct iwl_priv *priv, | ||
219 | struct ieee80211_key_conf *keyconf, u8 sta_id) | ||
220 | { | ||
221 | int ret = 0; | ||
222 | |||
223 | keyconf->hw_key_idx = HW_KEY_DYNAMIC; | ||
224 | |||
225 | switch (keyconf->alg) { | ||
226 | case ALG_CCMP: | ||
227 | ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id); | ||
228 | break; | ||
229 | case ALG_TKIP: | ||
230 | ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id); | ||
231 | break; | ||
232 | case ALG_WEP: | ||
233 | ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id); | ||
234 | break; | ||
235 | default: | ||
236 | IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg); | ||
237 | ret = -EINVAL; | ||
238 | } | ||
239 | |||
240 | IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n", | ||
241 | keyconf->alg, keyconf->keylen, keyconf->keyidx, | ||
242 | sta_id, ret); | ||
243 | |||
244 | return ret; | ||
245 | } | ||
246 | |||
247 | static int iwl3945_remove_static_key(struct iwl_priv *priv) | ||
248 | { | ||
249 | int ret = -EOPNOTSUPP; | ||
250 | |||
251 | return ret; | ||
252 | } | ||
253 | |||
254 | static int iwl3945_set_static_key(struct iwl_priv *priv, | ||
255 | struct ieee80211_key_conf *key) | ||
256 | { | ||
257 | if (key->alg == ALG_WEP) | ||
258 | return -EOPNOTSUPP; | ||
259 | |||
260 | IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg); | ||
261 | return -EINVAL; | ||
262 | } | ||
263 | |||
264 | static void iwl3945_clear_free_frames(struct iwl_priv *priv) | ||
265 | { | ||
266 | struct list_head *element; | ||
267 | |||
268 | IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n", | ||
269 | priv->frames_count); | ||
270 | |||
271 | while (!list_empty(&priv->free_frames)) { | ||
272 | element = priv->free_frames.next; | ||
273 | list_del(element); | ||
274 | kfree(list_entry(element, struct iwl3945_frame, list)); | ||
275 | priv->frames_count--; | ||
276 | } | ||
277 | |||
278 | if (priv->frames_count) { | ||
279 | IWL_WARN(priv, "%d frames still in use. Did we lose one?\n", | ||
280 | priv->frames_count); | ||
281 | priv->frames_count = 0; | ||
282 | } | ||
283 | } | ||
284 | |||
285 | static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv) | ||
286 | { | ||
287 | struct iwl3945_frame *frame; | ||
288 | struct list_head *element; | ||
289 | if (list_empty(&priv->free_frames)) { | ||
290 | frame = kzalloc(sizeof(*frame), GFP_KERNEL); | ||
291 | if (!frame) { | ||
292 | IWL_ERR(priv, "Could not allocate frame!\n"); | ||
293 | return NULL; | ||
294 | } | ||
295 | |||
296 | priv->frames_count++; | ||
297 | return frame; | ||
298 | } | ||
299 | |||
300 | element = priv->free_frames.next; | ||
301 | list_del(element); | ||
302 | return list_entry(element, struct iwl3945_frame, list); | ||
303 | } | ||
304 | |||
305 | static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame) | ||
306 | { | ||
307 | memset(frame, 0, sizeof(*frame)); | ||
308 | list_add(&frame->list, &priv->free_frames); | ||
309 | } | ||
310 | |||
311 | unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv, | ||
312 | struct ieee80211_hdr *hdr, | ||
313 | int left) | ||
314 | { | ||
315 | |||
316 | if (!iwl_is_associated(priv) || !priv->ibss_beacon) | ||
317 | return 0; | ||
318 | |||
319 | if (priv->ibss_beacon->len > left) | ||
320 | return 0; | ||
321 | |||
322 | memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len); | ||
323 | |||
324 | return priv->ibss_beacon->len; | ||
325 | } | ||
326 | |||
327 | static int iwl3945_send_beacon_cmd(struct iwl_priv *priv) | ||
328 | { | ||
329 | struct iwl3945_frame *frame; | ||
330 | unsigned int frame_size; | ||
331 | int rc; | ||
332 | u8 rate; | ||
333 | |||
334 | frame = iwl3945_get_free_frame(priv); | ||
335 | |||
336 | if (!frame) { | ||
337 | IWL_ERR(priv, "Could not obtain free frame buffer for beacon " | ||
338 | "command.\n"); | ||
339 | return -ENOMEM; | ||
340 | } | ||
341 | |||
342 | rate = iwl_rate_get_lowest_plcp(priv); | ||
343 | |||
344 | frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate); | ||
345 | |||
346 | rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size, | ||
347 | &frame->u.cmd[0]); | ||
348 | |||
349 | iwl3945_free_frame(priv, frame); | ||
350 | |||
351 | return rc; | ||
352 | } | ||
353 | |||
354 | static void iwl3945_unset_hw_params(struct iwl_priv *priv) | ||
355 | { | ||
356 | if (priv->_3945.shared_virt) | ||
357 | dma_free_coherent(&priv->pci_dev->dev, | ||
358 | sizeof(struct iwl3945_shared), | ||
359 | priv->_3945.shared_virt, | ||
360 | priv->_3945.shared_phys); | ||
361 | } | ||
362 | |||
363 | static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv, | ||
364 | struct ieee80211_tx_info *info, | ||
365 | struct iwl_device_cmd *cmd, | ||
366 | struct sk_buff *skb_frag, | ||
367 | int sta_id) | ||
368 | { | ||
369 | struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload; | ||
370 | struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo; | ||
371 | |||
372 | switch (keyinfo->alg) { | ||
373 | case ALG_CCMP: | ||
374 | tx_cmd->sec_ctl = TX_CMD_SEC_CCM; | ||
375 | memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen); | ||
376 | IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n"); | ||
377 | break; | ||
378 | |||
379 | case ALG_TKIP: | ||
380 | break; | ||
381 | |||
382 | case ALG_WEP: | ||
383 | tx_cmd->sec_ctl = TX_CMD_SEC_WEP | | ||
384 | (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT; | ||
385 | |||
386 | if (keyinfo->keylen == 13) | ||
387 | tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128; | ||
388 | |||
389 | memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen); | ||
390 | |||
391 | IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption " | ||
392 | "with key %d\n", info->control.hw_key->hw_key_idx); | ||
393 | break; | ||
394 | |||
395 | default: | ||
396 | IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg); | ||
397 | break; | ||
398 | } | ||
399 | } | ||
400 | |||
401 | /* | ||
402 | * handle build REPLY_TX command notification. | ||
403 | */ | ||
404 | static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv, | ||
405 | struct iwl_device_cmd *cmd, | ||
406 | struct ieee80211_tx_info *info, | ||
407 | struct ieee80211_hdr *hdr, u8 std_id) | ||
408 | { | ||
409 | struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload; | ||
410 | __le32 tx_flags = tx_cmd->tx_flags; | ||
411 | __le16 fc = hdr->frame_control; | ||
412 | |||
413 | tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; | ||
414 | if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) { | ||
415 | tx_flags |= TX_CMD_FLG_ACK_MSK; | ||
416 | if (ieee80211_is_mgmt(fc)) | ||
417 | tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; | ||
418 | if (ieee80211_is_probe_resp(fc) && | ||
419 | !(le16_to_cpu(hdr->seq_ctrl) & 0xf)) | ||
420 | tx_flags |= TX_CMD_FLG_TSF_MSK; | ||
421 | } else { | ||
422 | tx_flags &= (~TX_CMD_FLG_ACK_MSK); | ||
423 | tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; | ||
424 | } | ||
425 | |||
426 | tx_cmd->sta_id = std_id; | ||
427 | if (ieee80211_has_morefrags(fc)) | ||
428 | tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK; | ||
429 | |||
430 | if (ieee80211_is_data_qos(fc)) { | ||
431 | u8 *qc = ieee80211_get_qos_ctl(hdr); | ||
432 | tx_cmd->tid_tspec = qc[0] & 0xf; | ||
433 | tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK; | ||
434 | } else { | ||
435 | tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK; | ||
436 | } | ||
437 | |||
438 | priv->cfg->ops->utils->tx_cmd_protection(priv, info, fc, &tx_flags); | ||
439 | |||
440 | tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK); | ||
441 | if (ieee80211_is_mgmt(fc)) { | ||
442 | if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc)) | ||
443 | tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3); | ||
444 | else | ||
445 | tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2); | ||
446 | } else { | ||
447 | tx_cmd->timeout.pm_frame_timeout = 0; | ||
448 | } | ||
449 | |||
450 | tx_cmd->driver_txop = 0; | ||
451 | tx_cmd->tx_flags = tx_flags; | ||
452 | tx_cmd->next_frame_len = 0; | ||
453 | } | ||
454 | |||
455 | /* | ||
456 | * start REPLY_TX command process | ||
457 | */ | ||
458 | static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb) | ||
459 | { | ||
460 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; | ||
461 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); | ||
462 | struct iwl3945_tx_cmd *tx_cmd; | ||
463 | struct iwl_tx_queue *txq = NULL; | ||
464 | struct iwl_queue *q = NULL; | ||
465 | struct iwl_device_cmd *out_cmd; | ||
466 | struct iwl_cmd_meta *out_meta; | ||
467 | dma_addr_t phys_addr; | ||
468 | dma_addr_t txcmd_phys; | ||
469 | int txq_id = skb_get_queue_mapping(skb); | ||
470 | u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */ | ||
471 | u8 id; | ||
472 | u8 unicast; | ||
473 | u8 sta_id; | ||
474 | u8 tid = 0; | ||
475 | __le16 fc; | ||
476 | u8 wait_write_ptr = 0; | ||
477 | unsigned long flags; | ||
478 | |||
479 | spin_lock_irqsave(&priv->lock, flags); | ||
480 | if (iwl_is_rfkill(priv)) { | ||
481 | IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n"); | ||
482 | goto drop_unlock; | ||
483 | } | ||
484 | |||
485 | if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) { | ||
486 | IWL_ERR(priv, "ERROR: No TX rate available.\n"); | ||
487 | goto drop_unlock; | ||
488 | } | ||
489 | |||
490 | unicast = !is_multicast_ether_addr(hdr->addr1); | ||
491 | id = 0; | ||
492 | |||
493 | fc = hdr->frame_control; | ||
494 | |||
495 | #ifdef CONFIG_IWLWIFI_DEBUG | ||
496 | if (ieee80211_is_auth(fc)) | ||
497 | IWL_DEBUG_TX(priv, "Sending AUTH frame\n"); | ||
498 | else if (ieee80211_is_assoc_req(fc)) | ||
499 | IWL_DEBUG_TX(priv, "Sending ASSOC frame\n"); | ||
500 | else if (ieee80211_is_reassoc_req(fc)) | ||
501 | IWL_DEBUG_TX(priv, "Sending REASSOC frame\n"); | ||
502 | #endif | ||
503 | |||
504 | spin_unlock_irqrestore(&priv->lock, flags); | ||
505 | |||
506 | hdr_len = ieee80211_hdrlen(fc); | ||
507 | |||
508 | /* Find index into station table for destination station */ | ||
509 | sta_id = iwl_sta_id_or_broadcast(priv, info->control.sta); | ||
510 | if (sta_id == IWL_INVALID_STATION) { | ||
511 | IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n", | ||
512 | hdr->addr1); | ||
513 | goto drop; | ||
514 | } | ||
515 | |||
516 | IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id); | ||
517 | |||
518 | if (ieee80211_is_data_qos(fc)) { | ||
519 | u8 *qc = ieee80211_get_qos_ctl(hdr); | ||
520 | tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK; | ||
521 | if (unlikely(tid >= MAX_TID_COUNT)) | ||
522 | goto drop; | ||
523 | } | ||
524 | |||
525 | /* Descriptor for chosen Tx queue */ | ||
526 | txq = &priv->txq[txq_id]; | ||
527 | q = &txq->q; | ||
528 | |||
529 | if ((iwl_queue_space(q) < q->high_mark)) | ||
530 | goto drop; | ||
531 | |||
532 | spin_lock_irqsave(&priv->lock, flags); | ||
533 | |||
534 | idx = get_cmd_index(q, q->write_ptr, 0); | ||
535 | |||
536 | /* Set up driver data for this TFD */ | ||
537 | memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info)); | ||
538 | txq->txb[q->write_ptr].skb = skb; | ||
539 | |||
540 | /* Init first empty entry in queue's array of Tx/cmd buffers */ | ||
541 | out_cmd = txq->cmd[idx]; | ||
542 | out_meta = &txq->meta[idx]; | ||
543 | tx_cmd = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload; | ||
544 | memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr)); | ||
545 | memset(tx_cmd, 0, sizeof(*tx_cmd)); | ||
546 | |||
547 | /* | ||
548 | * Set up the Tx-command (not MAC!) header. | ||
549 | * Store the chosen Tx queue and TFD index within the sequence field; | ||
550 | * after Tx, uCode's Tx response will return this value so driver can | ||
551 | * locate the frame within the tx queue and do post-tx processing. | ||
552 | */ | ||
553 | out_cmd->hdr.cmd = REPLY_TX; | ||
554 | out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) | | ||
555 | INDEX_TO_SEQ(q->write_ptr))); | ||
556 | |||
557 | /* Copy MAC header from skb into command buffer */ | ||
558 | memcpy(tx_cmd->hdr, hdr, hdr_len); | ||
559 | |||
560 | |||
561 | if (info->control.hw_key) | ||
562 | iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id); | ||
563 | |||
564 | /* TODO need this for burst mode later on */ | ||
565 | iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id); | ||
566 | |||
567 | /* set is_hcca to 0; it probably will never be implemented */ | ||
568 | iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0); | ||
569 | |||
570 | /* Total # bytes to be transmitted */ | ||
571 | len = (u16)skb->len; | ||
572 | tx_cmd->len = cpu_to_le16(len); | ||
573 | |||
574 | iwl_dbg_log_tx_data_frame(priv, len, hdr); | ||
575 | iwl_update_stats(priv, true, fc, len); | ||
576 | tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK; | ||
577 | tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK; | ||
578 | |||
579 | if (!ieee80211_has_morefrags(hdr->frame_control)) { | ||
580 | txq->need_update = 1; | ||
581 | } else { | ||
582 | wait_write_ptr = 1; | ||
583 | txq->need_update = 0; | ||
584 | } | ||
585 | |||
586 | IWL_DEBUG_TX(priv, "sequence nr = 0X%x\n", | ||
587 | le16_to_cpu(out_cmd->hdr.sequence)); | ||
588 | IWL_DEBUG_TX(priv, "tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags)); | ||
589 | iwl_print_hex_dump(priv, IWL_DL_TX, tx_cmd, sizeof(*tx_cmd)); | ||
590 | iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr, | ||
591 | ieee80211_hdrlen(fc)); | ||
592 | |||
593 | /* | ||
594 | * Use the first empty entry in this queue's command buffer array | ||
595 | * to contain the Tx command and MAC header concatenated together | ||
596 | * (payload data will be in another buffer). | ||
597 | * Size of this varies, due to varying MAC header length. | ||
598 | * If end is not dword aligned, we'll have 2 extra bytes at the end | ||
599 | * of the MAC header (device reads on dword boundaries). | ||
600 | * We'll tell device about this padding later. | ||
601 | */ | ||
602 | len = sizeof(struct iwl3945_tx_cmd) + | ||
603 | sizeof(struct iwl_cmd_header) + hdr_len; | ||
604 | |||
605 | len_org = len; | ||
606 | len = (len + 3) & ~3; | ||
607 | |||
608 | if (len_org != len) | ||
609 | len_org = 1; | ||
610 | else | ||
611 | len_org = 0; | ||
612 | |||
613 | /* Physical address of this Tx command's header (not MAC header!), | ||
614 | * within command buffer array. */ | ||
615 | txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr, | ||
616 | len, PCI_DMA_TODEVICE); | ||
617 | /* we do not map meta data ... so we can safely access address to | ||
618 | * provide to unmap command*/ | ||
619 | dma_unmap_addr_set(out_meta, mapping, txcmd_phys); | ||
620 | dma_unmap_len_set(out_meta, len, len); | ||
621 | |||
622 | /* Add buffer containing Tx command and MAC(!) header to TFD's | ||
623 | * first entry */ | ||
624 | priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq, | ||
625 | txcmd_phys, len, 1, 0); | ||
626 | |||
627 | |||
628 | /* Set up TFD's 2nd entry to point directly to remainder of skb, | ||
629 | * if any (802.11 null frames have no payload). */ | ||
630 | len = skb->len - hdr_len; | ||
631 | if (len) { | ||
632 | phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len, | ||
633 | len, PCI_DMA_TODEVICE); | ||
634 | priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq, | ||
635 | phys_addr, len, | ||
636 | 0, U32_PAD(len)); | ||
637 | } | ||
638 | |||
639 | |||
640 | /* Tell device the write index *just past* this latest filled TFD */ | ||
641 | q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd); | ||
642 | iwl_txq_update_write_ptr(priv, txq); | ||
643 | spin_unlock_irqrestore(&priv->lock, flags); | ||
644 | |||
645 | if ((iwl_queue_space(q) < q->high_mark) | ||
646 | && priv->mac80211_registered) { | ||
647 | if (wait_write_ptr) { | ||
648 | spin_lock_irqsave(&priv->lock, flags); | ||
649 | txq->need_update = 1; | ||
650 | iwl_txq_update_write_ptr(priv, txq); | ||
651 | spin_unlock_irqrestore(&priv->lock, flags); | ||
652 | } | ||
653 | |||
654 | iwl_stop_queue(priv, skb_get_queue_mapping(skb)); | ||
655 | } | ||
656 | |||
657 | return 0; | ||
658 | |||
659 | drop_unlock: | ||
660 | spin_unlock_irqrestore(&priv->lock, flags); | ||
661 | drop: | ||
662 | return -1; | ||
663 | } | ||
664 | |||
665 | static int iwl3945_get_measurement(struct iwl_priv *priv, | ||
666 | struct ieee80211_measurement_params *params, | ||
667 | u8 type) | ||
668 | { | ||
669 | struct iwl_spectrum_cmd spectrum; | ||
670 | struct iwl_rx_packet *pkt; | ||
671 | struct iwl_host_cmd cmd = { | ||
672 | .id = REPLY_SPECTRUM_MEASUREMENT_CMD, | ||
673 | .data = (void *)&spectrum, | ||
674 | .flags = CMD_WANT_SKB, | ||
675 | }; | ||
676 | u32 add_time = le64_to_cpu(params->start_time); | ||
677 | int rc; | ||
678 | int spectrum_resp_status; | ||
679 | int duration = le16_to_cpu(params->duration); | ||
680 | |||
681 | if (iwl_is_associated(priv)) | ||
682 | add_time = iwl_usecs_to_beacons(priv, | ||
683 | le64_to_cpu(params->start_time) - priv->_3945.last_tsf, | ||
684 | le16_to_cpu(priv->rxon_timing.beacon_interval)); | ||
685 | |||
686 | memset(&spectrum, 0, sizeof(spectrum)); | ||
687 | |||
688 | spectrum.channel_count = cpu_to_le16(1); | ||
689 | spectrum.flags = | ||
690 | RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK; | ||
691 | spectrum.filter_flags = MEASUREMENT_FILTER_FLAG; | ||
692 | cmd.len = sizeof(spectrum); | ||
693 | spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len)); | ||
694 | |||
695 | if (iwl_is_associated(priv)) | ||
696 | spectrum.start_time = | ||
697 | iwl_add_beacon_time(priv, | ||
698 | priv->_3945.last_beacon_time, add_time, | ||
699 | le16_to_cpu(priv->rxon_timing.beacon_interval)); | ||
700 | else | ||
701 | spectrum.start_time = 0; | ||
702 | |||
703 | spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT); | ||
704 | spectrum.channels[0].channel = params->channel; | ||
705 | spectrum.channels[0].type = type; | ||
706 | if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK) | ||
707 | spectrum.flags |= RXON_FLG_BAND_24G_MSK | | ||
708 | RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK; | ||
709 | |||
710 | rc = iwl_send_cmd_sync(priv, &cmd); | ||
711 | if (rc) | ||
712 | return rc; | ||
713 | |||
714 | pkt = (struct iwl_rx_packet *)cmd.reply_page; | ||
715 | if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) { | ||
716 | IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n"); | ||
717 | rc = -EIO; | ||
718 | } | ||
719 | |||
720 | spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status); | ||
721 | switch (spectrum_resp_status) { | ||
722 | case 0: /* Command will be handled */ | ||
723 | if (pkt->u.spectrum.id != 0xff) { | ||
724 | IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n", | ||
725 | pkt->u.spectrum.id); | ||
726 | priv->measurement_status &= ~MEASUREMENT_READY; | ||
727 | } | ||
728 | priv->measurement_status |= MEASUREMENT_ACTIVE; | ||
729 | rc = 0; | ||
730 | break; | ||
731 | |||
732 | case 1: /* Command will not be handled */ | ||
733 | rc = -EAGAIN; | ||
734 | break; | ||
735 | } | ||
736 | |||
737 | iwl_free_pages(priv, cmd.reply_page); | ||
738 | |||
739 | return rc; | ||
740 | } | ||
741 | |||
742 | static void iwl3945_rx_reply_alive(struct iwl_priv *priv, | ||
743 | struct iwl_rx_mem_buffer *rxb) | ||
744 | { | ||
745 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | ||
746 | struct iwl_alive_resp *palive; | ||
747 | struct delayed_work *pwork; | ||
748 | |||
749 | palive = &pkt->u.alive_frame; | ||
750 | |||
751 | IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision " | ||
752 | "0x%01X 0x%01X\n", | ||
753 | palive->is_valid, palive->ver_type, | ||
754 | palive->ver_subtype); | ||
755 | |||
756 | if (palive->ver_subtype == INITIALIZE_SUBTYPE) { | ||
757 | IWL_DEBUG_INFO(priv, "Initialization Alive received.\n"); | ||
758 | memcpy(&priv->card_alive_init, &pkt->u.alive_frame, | ||
759 | sizeof(struct iwl_alive_resp)); | ||
760 | pwork = &priv->init_alive_start; | ||
761 | } else { | ||
762 | IWL_DEBUG_INFO(priv, "Runtime Alive received.\n"); | ||
763 | memcpy(&priv->card_alive, &pkt->u.alive_frame, | ||
764 | sizeof(struct iwl_alive_resp)); | ||
765 | pwork = &priv->alive_start; | ||
766 | iwl3945_disable_events(priv); | ||
767 | } | ||
768 | |||
769 | /* We delay the ALIVE response by 5ms to | ||
770 | * give the HW RF Kill time to activate... */ | ||
771 | if (palive->is_valid == UCODE_VALID_OK) | ||
772 | queue_delayed_work(priv->workqueue, pwork, | ||
773 | msecs_to_jiffies(5)); | ||
774 | else | ||
775 | IWL_WARN(priv, "uCode did not respond OK.\n"); | ||
776 | } | ||
777 | |||
778 | static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv, | ||
779 | struct iwl_rx_mem_buffer *rxb) | ||
780 | { | ||
781 | #ifdef CONFIG_IWLWIFI_DEBUG | ||
782 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | ||
783 | #endif | ||
784 | |||
785 | IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status); | ||
786 | } | ||
787 | |||
788 | static void iwl3945_bg_beacon_update(struct work_struct *work) | ||
789 | { | ||
790 | struct iwl_priv *priv = | ||
791 | container_of(work, struct iwl_priv, beacon_update); | ||
792 | struct sk_buff *beacon; | ||
793 | |||
794 | /* Pull updated AP beacon from mac80211. will fail if not in AP mode */ | ||
795 | beacon = ieee80211_beacon_get(priv->hw, priv->vif); | ||
796 | |||
797 | if (!beacon) { | ||
798 | IWL_ERR(priv, "update beacon failed\n"); | ||
799 | return; | ||
800 | } | ||
801 | |||
802 | mutex_lock(&priv->mutex); | ||
803 | /* new beacon skb is allocated every time; dispose previous.*/ | ||
804 | if (priv->ibss_beacon) | ||
805 | dev_kfree_skb(priv->ibss_beacon); | ||
806 | |||
807 | priv->ibss_beacon = beacon; | ||
808 | mutex_unlock(&priv->mutex); | ||
809 | |||
810 | iwl3945_send_beacon_cmd(priv); | ||
811 | } | ||
812 | |||
813 | static void iwl3945_rx_beacon_notif(struct iwl_priv *priv, | ||
814 | struct iwl_rx_mem_buffer *rxb) | ||
815 | { | ||
816 | #ifdef CONFIG_IWLWIFI_DEBUG | ||
817 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | ||
818 | struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status); | ||
819 | u8 rate = beacon->beacon_notify_hdr.rate; | ||
820 | |||
821 | IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d " | ||
822 | "tsf %d %d rate %d\n", | ||
823 | le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK, | ||
824 | beacon->beacon_notify_hdr.failure_frame, | ||
825 | le32_to_cpu(beacon->ibss_mgr_status), | ||
826 | le32_to_cpu(beacon->high_tsf), | ||
827 | le32_to_cpu(beacon->low_tsf), rate); | ||
828 | #endif | ||
829 | |||
830 | if ((priv->iw_mode == NL80211_IFTYPE_AP) && | ||
831 | (!test_bit(STATUS_EXIT_PENDING, &priv->status))) | ||
832 | queue_work(priv->workqueue, &priv->beacon_update); | ||
833 | } | ||
834 | |||
835 | /* Handle notification from uCode that card's power state is changing | ||
836 | * due to software, hardware, or critical temperature RFKILL */ | ||
837 | static void iwl3945_rx_card_state_notif(struct iwl_priv *priv, | ||
838 | struct iwl_rx_mem_buffer *rxb) | ||
839 | { | ||
840 | struct iwl_rx_packet *pkt = rxb_addr(rxb); | ||
841 | u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags); | ||
842 | unsigned long status = priv->status; | ||
843 | |||
844 | IWL_WARN(priv, "Card state received: HW:%s SW:%s\n", | ||
845 | (flags & HW_CARD_DISABLED) ? "Kill" : "On", | ||
846 | (flags & SW_CARD_DISABLED) ? "Kill" : "On"); | ||
847 | |||
848 | iwl_write32(priv, CSR_UCODE_DRV_GP1_SET, | ||
849 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); | ||
850 | |||
851 | if (flags & HW_CARD_DISABLED) | ||
852 | set_bit(STATUS_RF_KILL_HW, &priv->status); | ||
853 | else | ||
854 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | ||
855 | |||
856 | |||
857 | iwl_scan_cancel(priv); | ||
858 | |||
859 | if ((test_bit(STATUS_RF_KILL_HW, &status) != | ||
860 | test_bit(STATUS_RF_KILL_HW, &priv->status))) | ||
861 | wiphy_rfkill_set_hw_state(priv->hw->wiphy, | ||
862 | test_bit(STATUS_RF_KILL_HW, &priv->status)); | ||
863 | else | ||
864 | wake_up_interruptible(&priv->wait_command_queue); | ||
865 | } | ||
866 | |||
867 | /** | ||
868 | * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks | ||
869 | * | ||
870 | * Setup the RX handlers for each of the reply types sent from the uCode | ||
871 | * to the host. | ||
872 | * | ||
873 | * This function chains into the hardware specific files for them to setup | ||
874 | * any hardware specific handlers as well. | ||
875 | */ | ||
876 | static void iwl3945_setup_rx_handlers(struct iwl_priv *priv) | ||
877 | { | ||
878 | priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive; | ||
879 | priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta; | ||
880 | priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error; | ||
881 | priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa; | ||
882 | priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] = | ||
883 | iwl_rx_spectrum_measure_notif; | ||
884 | priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif; | ||
885 | priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] = | ||
886 | iwl_rx_pm_debug_statistics_notif; | ||
887 | priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif; | ||
888 | |||
889 | /* | ||
890 | * The same handler is used for both the REPLY to a discrete | ||
891 | * statistics request from the host as well as for the periodic | ||
892 | * statistics notifications (after received beacons) from the uCode. | ||
893 | */ | ||
894 | priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_reply_statistics; | ||
895 | priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics; | ||
896 | |||
897 | iwl_setup_rx_scan_handlers(priv); | ||
898 | priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif; | ||
899 | |||
900 | /* Set up hardware specific Rx handlers */ | ||
901 | iwl3945_hw_rx_handler_setup(priv); | ||
902 | } | ||
903 | |||
904 | /************************** RX-FUNCTIONS ****************************/ | ||
905 | /* | ||
906 | * Rx theory of operation | ||
907 | * | ||
908 | * The host allocates 32 DMA target addresses and passes the host address | ||
909 | * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is | ||
910 | * 0 to 31 | ||
911 | * | ||
912 | * Rx Queue Indexes | ||
913 | * The host/firmware share two index registers for managing the Rx buffers. | ||
914 | * | ||
915 | * The READ index maps to the first position that the firmware may be writing | ||
916 | * to -- the driver can read up to (but not including) this position and get | ||
917 | * good data. | ||
918 | * The READ index is managed by the firmware once the card is enabled. | ||
919 | * | ||
920 | * The WRITE index maps to the last position the driver has read from -- the | ||
921 | * position preceding WRITE is the last slot the firmware can place a packet. | ||
922 | * | ||
923 | * The queue is empty (no good data) if WRITE = READ - 1, and is full if | ||
924 | * WRITE = READ. | ||
925 | * | ||
926 | * During initialization, the host sets up the READ queue position to the first | ||
927 | * INDEX position, and WRITE to the last (READ - 1 wrapped) | ||
928 | * | ||
929 | * When the firmware places a packet in a buffer, it will advance the READ index | ||
930 | * and fire the RX interrupt. The driver can then query the READ index and | ||
931 | * process as many packets as possible, moving the WRITE index forward as it | ||
932 | * resets the Rx queue buffers with new memory. | ||
933 | * | ||
934 | * The management in the driver is as follows: | ||
935 | * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When | ||
936 | * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled | ||
937 | * to replenish the iwl->rxq->rx_free. | ||
938 | * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the | ||
939 | * iwl->rxq is replenished and the READ INDEX is updated (updating the | ||
940 | * 'processed' and 'read' driver indexes as well) | ||
941 | * + A received packet is processed and handed to the kernel network stack, | ||
942 | * detached from the iwl->rxq. The driver 'processed' index is updated. | ||
943 | * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free | ||
944 | * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ | ||
945 | * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there | ||
946 | * were enough free buffers and RX_STALLED is set it is cleared. | ||
947 | * | ||
948 | * | ||
949 | * Driver sequence: | ||
950 | * | ||
951 | * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls | ||
952 | * iwl3945_rx_queue_restock | ||
953 | * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx | ||
954 | * queue, updates firmware pointers, and updates | ||
955 | * the WRITE index. If insufficient rx_free buffers | ||
956 | * are available, schedules iwl3945_rx_replenish | ||
957 | * | ||
958 | * -- enable interrupts -- | ||
959 | * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the | ||
960 | * READ INDEX, detaching the SKB from the pool. | ||
961 | * Moves the packet buffer from queue to rx_used. | ||
962 | * Calls iwl3945_rx_queue_restock to refill any empty | ||
963 | * slots. | ||
964 | * ... | ||
965 | * | ||
966 | */ | ||
967 | |||
968 | /** | ||
969 | * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr | ||
970 | */ | ||
971 | static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv, | ||
972 | dma_addr_t dma_addr) | ||
973 | { | ||
974 | return cpu_to_le32((u32)dma_addr); | ||
975 | } | ||
976 | |||
977 | /** | ||
978 | * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool | ||
979 | * | ||
980 | * If there are slots in the RX queue that need to be restocked, | ||
981 | * and we have free pre-allocated buffers, fill the ranks as much | ||
982 | * as we can, pulling from rx_free. | ||
983 | * | ||
984 | * This moves the 'write' index forward to catch up with 'processed', and | ||
985 | * also updates the memory address in the firmware to reference the new | ||
986 | * target buffer. | ||
987 | */ | ||
988 | static void iwl3945_rx_queue_restock(struct iwl_priv *priv) | ||
989 | { | ||
990 | struct iwl_rx_queue *rxq = &priv->rxq; | ||
991 | struct list_head *element; | ||
992 | struct iwl_rx_mem_buffer *rxb; | ||
993 | unsigned long flags; | ||
994 | int write; | ||
995 | |||
996 | spin_lock_irqsave(&rxq->lock, flags); | ||
997 | write = rxq->write & ~0x7; | ||
998 | while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) { | ||
999 | /* Get next free Rx buffer, remove from free list */ | ||
1000 | element = rxq->rx_free.next; | ||
1001 | rxb = list_entry(element, struct iwl_rx_mem_buffer, list); | ||
1002 | list_del(element); | ||
1003 | |||
1004 | /* Point to Rx buffer via next RBD in circular buffer */ | ||
1005 | rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->page_dma); | ||
1006 | rxq->queue[rxq->write] = rxb; | ||
1007 | rxq->write = (rxq->write + 1) & RX_QUEUE_MASK; | ||
1008 | rxq->free_count--; | ||
1009 | } | ||
1010 | spin_unlock_irqrestore(&rxq->lock, flags); | ||
1011 | /* If the pre-allocated buffer pool is dropping low, schedule to | ||
1012 | * refill it */ | ||
1013 | if (rxq->free_count <= RX_LOW_WATERMARK) | ||
1014 | queue_work(priv->workqueue, &priv->rx_replenish); | ||
1015 | |||
1016 | |||
1017 | /* If we've added more space for the firmware to place data, tell it. | ||
1018 | * Increment device's write pointer in multiples of 8. */ | ||
1019 | if ((rxq->write_actual != (rxq->write & ~0x7)) | ||
1020 | || (abs(rxq->write - rxq->read) > 7)) { | ||
1021 | spin_lock_irqsave(&rxq->lock, flags); | ||
1022 | rxq->need_update = 1; | ||
1023 | spin_unlock_irqrestore(&rxq->lock, flags); | ||
1024 | iwl_rx_queue_update_write_ptr(priv, rxq); | ||
1025 | } | ||
1026 | } | ||
1027 | |||
1028 | /** | ||
1029 | * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free | ||
1030 | * | ||
1031 | * When moving to rx_free an SKB is allocated for the slot. | ||
1032 | * | ||
1033 | * Also restock the Rx queue via iwl3945_rx_queue_restock. | ||
1034 | * This is called as a scheduled work item (except for during initialization) | ||
1035 | */ | ||
1036 | static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority) | ||
1037 | { | ||
1038 | struct iwl_rx_queue *rxq = &priv->rxq; | ||
1039 | struct list_head *element; | ||
1040 | struct iwl_rx_mem_buffer *rxb; | ||
1041 | struct page *page; | ||
1042 | unsigned long flags; | ||
1043 | gfp_t gfp_mask = priority; | ||
1044 | |||
1045 | while (1) { | ||
1046 | spin_lock_irqsave(&rxq->lock, flags); | ||
1047 | |||
1048 | if (list_empty(&rxq->rx_used)) { | ||
1049 | spin_unlock_irqrestore(&rxq->lock, flags); | ||
1050 | return; | ||
1051 | } | ||
1052 | spin_unlock_irqrestore(&rxq->lock, flags); | ||
1053 | |||
1054 | if (rxq->free_count > RX_LOW_WATERMARK) | ||
1055 | gfp_mask |= __GFP_NOWARN; | ||
1056 | |||
1057 | if (priv->hw_params.rx_page_order > 0) | ||
1058 | gfp_mask |= __GFP_COMP; | ||
1059 | |||
1060 | /* Alloc a new receive buffer */ | ||
1061 | page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order); | ||
1062 | if (!page) { | ||
1063 | if (net_ratelimit()) | ||
1064 | IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n"); | ||
1065 | if ((rxq->free_count <= RX_LOW_WATERMARK) && | ||
1066 | net_ratelimit()) | ||
1067 | IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n", | ||
1068 | priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL", | ||
1069 | rxq->free_count); | ||
1070 | /* We don't reschedule replenish work here -- we will | ||
1071 | * call the restock method and if it still needs | ||
1072 | * more buffers it will schedule replenish */ | ||
1073 | break; | ||
1074 | } | ||
1075 | |||
1076 | spin_lock_irqsave(&rxq->lock, flags); | ||
1077 | if (list_empty(&rxq->rx_used)) { | ||
1078 | spin_unlock_irqrestore(&rxq->lock, flags); | ||
1079 | __free_pages(page, priv->hw_params.rx_page_order); | ||
1080 | return; | ||
1081 | } | ||
1082 | element = rxq->rx_used.next; | ||
1083 | rxb = list_entry(element, struct iwl_rx_mem_buffer, list); | ||
1084 | list_del(element); | ||
1085 | spin_unlock_irqrestore(&rxq->lock, flags); | ||
1086 | |||
1087 | rxb->page = page; | ||
1088 | /* Get physical address of RB/SKB */ | ||
1089 | rxb->page_dma = pci_map_page(priv->pci_dev, page, 0, | ||
1090 | PAGE_SIZE << priv->hw_params.rx_page_order, | ||
1091 | PCI_DMA_FROMDEVICE); | ||
1092 | |||
1093 | spin_lock_irqsave(&rxq->lock, flags); | ||
1094 | |||
1095 | list_add_tail(&rxb->list, &rxq->rx_free); | ||
1096 | rxq->free_count++; | ||
1097 | priv->alloc_rxb_page++; | ||
1098 | |||
1099 | spin_unlock_irqrestore(&rxq->lock, flags); | ||
1100 | } | ||
1101 | } | ||
1102 | |||
1103 | void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq) | ||
1104 | { | ||
1105 | unsigned long flags; | ||
1106 | int i; | ||
1107 | spin_lock_irqsave(&rxq->lock, flags); | ||
1108 | INIT_LIST_HEAD(&rxq->rx_free); | ||
1109 | INIT_LIST_HEAD(&rxq->rx_used); | ||
1110 | /* Fill the rx_used queue with _all_ of the Rx buffers */ | ||
1111 | for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) { | ||
1112 | /* In the reset function, these buffers may have been allocated | ||
1113 | * to an SKB, so we need to unmap and free potential storage */ | ||
1114 | if (rxq->pool[i].page != NULL) { | ||
1115 | pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma, | ||
1116 | PAGE_SIZE << priv->hw_params.rx_page_order, | ||
1117 | PCI_DMA_FROMDEVICE); | ||
1118 | __iwl_free_pages(priv, rxq->pool[i].page); | ||
1119 | rxq->pool[i].page = NULL; | ||
1120 | } | ||
1121 | list_add_tail(&rxq->pool[i].list, &rxq->rx_used); | ||
1122 | } | ||
1123 | |||
1124 | /* Set us so that we have processed and used all buffers, but have | ||
1125 | * not restocked the Rx queue with fresh buffers */ | ||
1126 | rxq->read = rxq->write = 0; | ||
1127 | rxq->write_actual = 0; | ||
1128 | rxq->free_count = 0; | ||
1129 | spin_unlock_irqrestore(&rxq->lock, flags); | ||
1130 | } | ||
1131 | |||
1132 | void iwl3945_rx_replenish(void *data) | ||
1133 | { | ||
1134 | struct iwl_priv *priv = data; | ||
1135 | unsigned long flags; | ||
1136 | |||
1137 | iwl3945_rx_allocate(priv, GFP_KERNEL); | ||
1138 | |||
1139 | spin_lock_irqsave(&priv->lock, flags); | ||
1140 | iwl3945_rx_queue_restock(priv); | ||
1141 | spin_unlock_irqrestore(&priv->lock, flags); | ||
1142 | } | ||
1143 | |||
1144 | static void iwl3945_rx_replenish_now(struct iwl_priv *priv) | ||
1145 | { | ||
1146 | iwl3945_rx_allocate(priv, GFP_ATOMIC); | ||
1147 | |||
1148 | iwl3945_rx_queue_restock(priv); | ||
1149 | } | ||
1150 | |||
1151 | |||
1152 | /* Assumes that the skb field of the buffers in 'pool' is kept accurate. | ||
1153 | * If an SKB has been detached, the POOL needs to have its SKB set to NULL | ||
1154 | * This free routine walks the list of POOL entries and if SKB is set to | ||
1155 | * non NULL it is unmapped and freed | ||
1156 | */ | ||
1157 | static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq) | ||
1158 | { | ||
1159 | int i; | ||
1160 | for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) { | ||
1161 | if (rxq->pool[i].page != NULL) { | ||
1162 | pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma, | ||
1163 | PAGE_SIZE << priv->hw_params.rx_page_order, | ||
1164 | PCI_DMA_FROMDEVICE); | ||
1165 | __iwl_free_pages(priv, rxq->pool[i].page); | ||
1166 | rxq->pool[i].page = NULL; | ||
1167 | } | ||
1168 | } | ||
1169 | |||
1170 | dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd, | ||
1171 | rxq->bd_dma); | ||
1172 | dma_free_coherent(&priv->pci_dev->dev, sizeof(struct iwl_rb_status), | ||
1173 | rxq->rb_stts, rxq->rb_stts_dma); | ||
1174 | rxq->bd = NULL; | ||
1175 | rxq->rb_stts = NULL; | ||
1176 | } | ||
1177 | |||
1178 | |||
1179 | /* Convert linear signal-to-noise ratio into dB */ | ||
1180 | static u8 ratio2dB[100] = { | ||
1181 | /* 0 1 2 3 4 5 6 7 8 9 */ | ||
1182 | 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */ | ||
1183 | 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */ | ||
1184 | 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */ | ||
1185 | 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */ | ||
1186 | 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */ | ||
1187 | 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */ | ||
1188 | 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */ | ||
1189 | 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */ | ||
1190 | 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */ | ||
1191 | 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */ | ||
1192 | }; | ||
1193 | |||
1194 | /* Calculates a relative dB value from a ratio of linear | ||
1195 | * (i.e. not dB) signal levels. | ||
1196 | * Conversion assumes that levels are voltages (20*log), not powers (10*log). */ | ||
1197 | int iwl3945_calc_db_from_ratio(int sig_ratio) | ||
1198 | { | ||
1199 | /* 1000:1 or higher just report as 60 dB */ | ||
1200 | if (sig_ratio >= 1000) | ||
1201 | return 60; | ||
1202 | |||
1203 | /* 100:1 or higher, divide by 10 and use table, | ||
1204 | * add 20 dB to make up for divide by 10 */ | ||
1205 | if (sig_ratio >= 100) | ||
1206 | return 20 + (int)ratio2dB[sig_ratio/10]; | ||
1207 | |||
1208 | /* We shouldn't see this */ | ||
1209 | if (sig_ratio < 1) | ||
1210 | return 0; | ||
1211 | |||
1212 | /* Use table for ratios 1:1 - 99:1 */ | ||
1213 | return (int)ratio2dB[sig_ratio]; | ||
1214 | } | ||
1215 | |||
1216 | /** | ||
1217 | * iwl3945_rx_handle - Main entry function for receiving responses from uCode | ||
1218 | * | ||
1219 | * Uses the priv->rx_handlers callback function array to invoke | ||
1220 | * the appropriate handlers, including command responses, | ||
1221 | * frame-received notifications, and other notifications. | ||
1222 | */ | ||
1223 | static void iwl3945_rx_handle(struct iwl_priv *priv) | ||
1224 | { | ||
1225 | struct iwl_rx_mem_buffer *rxb; | ||
1226 | struct iwl_rx_packet *pkt; | ||
1227 | struct iwl_rx_queue *rxq = &priv->rxq; | ||
1228 | u32 r, i; | ||
1229 | int reclaim; | ||
1230 | unsigned long flags; | ||
1231 | u8 fill_rx = 0; | ||
1232 | u32 count = 8; | ||
1233 | int total_empty = 0; | ||
1234 | |||
1235 | /* uCode's read index (stored in shared DRAM) indicates the last Rx | ||
1236 | * buffer that the driver may process (last buffer filled by ucode). */ | ||
1237 | r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF; | ||
1238 | i = rxq->read; | ||
1239 | |||
1240 | /* calculate total frames need to be restock after handling RX */ | ||
1241 | total_empty = r - rxq->write_actual; | ||
1242 | if (total_empty < 0) | ||
1243 | total_empty += RX_QUEUE_SIZE; | ||
1244 | |||
1245 | if (total_empty > (RX_QUEUE_SIZE / 2)) | ||
1246 | fill_rx = 1; | ||
1247 | /* Rx interrupt, but nothing sent from uCode */ | ||
1248 | if (i == r) | ||
1249 | IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i); | ||
1250 | |||
1251 | while (i != r) { | ||
1252 | int len; | ||
1253 | |||
1254 | rxb = rxq->queue[i]; | ||
1255 | |||
1256 | /* If an RXB doesn't have a Rx queue slot associated with it, | ||
1257 | * then a bug has been introduced in the queue refilling | ||
1258 | * routines -- catch it here */ | ||
1259 | BUG_ON(rxb == NULL); | ||
1260 | |||
1261 | rxq->queue[i] = NULL; | ||
1262 | |||
1263 | pci_unmap_page(priv->pci_dev, rxb->page_dma, | ||
1264 | PAGE_SIZE << priv->hw_params.rx_page_order, | ||
1265 | PCI_DMA_FROMDEVICE); | ||
1266 | pkt = rxb_addr(rxb); | ||
1267 | |||
1268 | len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK; | ||
1269 | len += sizeof(u32); /* account for status word */ | ||
1270 | trace_iwlwifi_dev_rx(priv, pkt, len); | ||
1271 | |||
1272 | /* Reclaim a command buffer only if this packet is a response | ||
1273 | * to a (driver-originated) command. | ||
1274 | * If the packet (e.g. Rx frame) originated from uCode, | ||
1275 | * there is no command buffer to reclaim. | ||
1276 | * Ucode should set SEQ_RX_FRAME bit if ucode-originated, | ||
1277 | * but apparently a few don't get set; catch them here. */ | ||
1278 | reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) && | ||
1279 | (pkt->hdr.cmd != STATISTICS_NOTIFICATION) && | ||
1280 | (pkt->hdr.cmd != REPLY_TX); | ||
1281 | |||
1282 | /* Based on type of command response or notification, | ||
1283 | * handle those that need handling via function in | ||
1284 | * rx_handlers table. See iwl3945_setup_rx_handlers() */ | ||
1285 | if (priv->rx_handlers[pkt->hdr.cmd]) { | ||
1286 | IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i, | ||
1287 | get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd); | ||
1288 | priv->isr_stats.rx_handlers[pkt->hdr.cmd]++; | ||
1289 | priv->rx_handlers[pkt->hdr.cmd] (priv, rxb); | ||
1290 | } else { | ||
1291 | /* No handling needed */ | ||
1292 | IWL_DEBUG_RX(priv, | ||
1293 | "r %d i %d No handler needed for %s, 0x%02x\n", | ||
1294 | r, i, get_cmd_string(pkt->hdr.cmd), | ||
1295 | pkt->hdr.cmd); | ||
1296 | } | ||
1297 | |||
1298 | /* | ||
1299 | * XXX: After here, we should always check rxb->page | ||
1300 | * against NULL before touching it or its virtual | ||
1301 | * memory (pkt). Because some rx_handler might have | ||
1302 | * already taken or freed the pages. | ||
1303 | */ | ||
1304 | |||
1305 | if (reclaim) { | ||
1306 | /* Invoke any callbacks, transfer the buffer to caller, | ||
1307 | * and fire off the (possibly) blocking iwl_send_cmd() | ||
1308 | * as we reclaim the driver command queue */ | ||
1309 | if (rxb->page) | ||
1310 | iwl_tx_cmd_complete(priv, rxb); | ||
1311 | else | ||
1312 | IWL_WARN(priv, "Claim null rxb?\n"); | ||
1313 | } | ||
1314 | |||
1315 | /* Reuse the page if possible. For notification packets and | ||
1316 | * SKBs that fail to Rx correctly, add them back into the | ||
1317 | * rx_free list for reuse later. */ | ||
1318 | spin_lock_irqsave(&rxq->lock, flags); | ||
1319 | if (rxb->page != NULL) { | ||
1320 | rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page, | ||
1321 | 0, PAGE_SIZE << priv->hw_params.rx_page_order, | ||
1322 | PCI_DMA_FROMDEVICE); | ||
1323 | list_add_tail(&rxb->list, &rxq->rx_free); | ||
1324 | rxq->free_count++; | ||
1325 | } else | ||
1326 | list_add_tail(&rxb->list, &rxq->rx_used); | ||
1327 | |||
1328 | spin_unlock_irqrestore(&rxq->lock, flags); | ||
1329 | |||
1330 | i = (i + 1) & RX_QUEUE_MASK; | ||
1331 | /* If there are a lot of unused frames, | ||
1332 | * restock the Rx queue so ucode won't assert. */ | ||
1333 | if (fill_rx) { | ||
1334 | count++; | ||
1335 | if (count >= 8) { | ||
1336 | rxq->read = i; | ||
1337 | iwl3945_rx_replenish_now(priv); | ||
1338 | count = 0; | ||
1339 | } | ||
1340 | } | ||
1341 | } | ||
1342 | |||
1343 | /* Backtrack one entry */ | ||
1344 | rxq->read = i; | ||
1345 | if (fill_rx) | ||
1346 | iwl3945_rx_replenish_now(priv); | ||
1347 | else | ||
1348 | iwl3945_rx_queue_restock(priv); | ||
1349 | } | ||
1350 | |||
1351 | /* call this function to flush any scheduled tasklet */ | ||
1352 | static inline void iwl_synchronize_irq(struct iwl_priv *priv) | ||
1353 | { | ||
1354 | /* wait to make sure we flush pending tasklet*/ | ||
1355 | synchronize_irq(priv->pci_dev->irq); | ||
1356 | tasklet_kill(&priv->irq_tasklet); | ||
1357 | } | ||
1358 | |||
1359 | static const char *desc_lookup(int i) | ||
1360 | { | ||
1361 | switch (i) { | ||
1362 | case 1: | ||
1363 | return "FAIL"; | ||
1364 | case 2: | ||
1365 | return "BAD_PARAM"; | ||
1366 | case 3: | ||
1367 | return "BAD_CHECKSUM"; | ||
1368 | case 4: | ||
1369 | return "NMI_INTERRUPT"; | ||
1370 | case 5: | ||
1371 | return "SYSASSERT"; | ||
1372 | case 6: | ||
1373 | return "FATAL_ERROR"; | ||
1374 | } | ||
1375 | |||
1376 | return "UNKNOWN"; | ||
1377 | } | ||
1378 | |||
1379 | #define ERROR_START_OFFSET (1 * sizeof(u32)) | ||
1380 | #define ERROR_ELEM_SIZE (7 * sizeof(u32)) | ||
1381 | |||
1382 | void iwl3945_dump_nic_error_log(struct iwl_priv *priv) | ||
1383 | { | ||
1384 | u32 i; | ||
1385 | u32 desc, time, count, base, data1; | ||
1386 | u32 blink1, blink2, ilink1, ilink2; | ||
1387 | |||
1388 | base = le32_to_cpu(priv->card_alive.error_event_table_ptr); | ||
1389 | |||
1390 | if (!iwl3945_hw_valid_rtc_data_addr(base)) { | ||
1391 | IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base); | ||
1392 | return; | ||
1393 | } | ||
1394 | |||
1395 | |||
1396 | count = iwl_read_targ_mem(priv, base); | ||
1397 | |||
1398 | if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) { | ||
1399 | IWL_ERR(priv, "Start IWL Error Log Dump:\n"); | ||
1400 | IWL_ERR(priv, "Status: 0x%08lX, count: %d\n", | ||
1401 | priv->status, count); | ||
1402 | } | ||
1403 | |||
1404 | IWL_ERR(priv, "Desc Time asrtPC blink2 " | ||
1405 | "ilink1 nmiPC Line\n"); | ||
1406 | for (i = ERROR_START_OFFSET; | ||
1407 | i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET; | ||
1408 | i += ERROR_ELEM_SIZE) { | ||
1409 | desc = iwl_read_targ_mem(priv, base + i); | ||
1410 | time = | ||
1411 | iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32)); | ||
1412 | blink1 = | ||
1413 | iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32)); | ||
1414 | blink2 = | ||
1415 | iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32)); | ||
1416 | ilink1 = | ||
1417 | iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32)); | ||
1418 | ilink2 = | ||
1419 | iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32)); | ||
1420 | data1 = | ||
1421 | iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32)); | ||
1422 | |||
1423 | IWL_ERR(priv, | ||
1424 | "%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n", | ||
1425 | desc_lookup(desc), desc, time, blink1, blink2, | ||
1426 | ilink1, ilink2, data1); | ||
1427 | trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, 0, | ||
1428 | 0, blink1, blink2, ilink1, ilink2); | ||
1429 | } | ||
1430 | } | ||
1431 | |||
1432 | #define EVENT_START_OFFSET (6 * sizeof(u32)) | ||
1433 | |||
1434 | /** | ||
1435 | * iwl3945_print_event_log - Dump error event log to syslog | ||
1436 | * | ||
1437 | */ | ||
1438 | static int iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx, | ||
1439 | u32 num_events, u32 mode, | ||
1440 | int pos, char **buf, size_t bufsz) | ||
1441 | { | ||
1442 | u32 i; | ||
1443 | u32 base; /* SRAM byte address of event log header */ | ||
1444 | u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */ | ||
1445 | u32 ptr; /* SRAM byte address of log data */ | ||
1446 | u32 ev, time, data; /* event log data */ | ||
1447 | unsigned long reg_flags; | ||
1448 | |||
1449 | if (num_events == 0) | ||
1450 | return pos; | ||
1451 | |||
1452 | base = le32_to_cpu(priv->card_alive.log_event_table_ptr); | ||
1453 | |||
1454 | if (mode == 0) | ||
1455 | event_size = 2 * sizeof(u32); | ||
1456 | else | ||
1457 | event_size = 3 * sizeof(u32); | ||
1458 | |||
1459 | ptr = base + EVENT_START_OFFSET + (start_idx * event_size); | ||
1460 | |||
1461 | /* Make sure device is powered up for SRAM reads */ | ||
1462 | spin_lock_irqsave(&priv->reg_lock, reg_flags); | ||
1463 | iwl_grab_nic_access(priv); | ||
1464 | |||
1465 | /* Set starting address; reads will auto-increment */ | ||
1466 | _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr); | ||
1467 | rmb(); | ||
1468 | |||
1469 | /* "time" is actually "data" for mode 0 (no timestamp). | ||
1470 | * place event id # at far right for easier visual parsing. */ | ||
1471 | for (i = 0; i < num_events; i++) { | ||
1472 | ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); | ||
1473 | time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); | ||
1474 | if (mode == 0) { | ||
1475 | /* data, ev */ | ||
1476 | if (bufsz) { | ||
1477 | pos += scnprintf(*buf + pos, bufsz - pos, | ||
1478 | "0x%08x:%04u\n", | ||
1479 | time, ev); | ||
1480 | } else { | ||
1481 | IWL_ERR(priv, "0x%08x\t%04u\n", time, ev); | ||
1482 | trace_iwlwifi_dev_ucode_event(priv, 0, | ||
1483 | time, ev); | ||
1484 | } | ||
1485 | } else { | ||
1486 | data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); | ||
1487 | if (bufsz) { | ||
1488 | pos += scnprintf(*buf + pos, bufsz - pos, | ||
1489 | "%010u:0x%08x:%04u\n", | ||
1490 | time, data, ev); | ||
1491 | } else { | ||
1492 | IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", | ||
1493 | time, data, ev); | ||
1494 | trace_iwlwifi_dev_ucode_event(priv, time, | ||
1495 | data, ev); | ||
1496 | } | ||
1497 | } | ||
1498 | } | ||
1499 | |||
1500 | /* Allow device to power down */ | ||
1501 | iwl_release_nic_access(priv); | ||
1502 | spin_unlock_irqrestore(&priv->reg_lock, reg_flags); | ||
1503 | return pos; | ||
1504 | } | ||
1505 | |||
1506 | /** | ||
1507 | * iwl3945_print_last_event_logs - Dump the newest # of event log to syslog | ||
1508 | */ | ||
1509 | static int iwl3945_print_last_event_logs(struct iwl_priv *priv, u32 capacity, | ||
1510 | u32 num_wraps, u32 next_entry, | ||
1511 | u32 size, u32 mode, | ||
1512 | int pos, char **buf, size_t bufsz) | ||
1513 | { | ||
1514 | /* | ||
1515 | * display the newest DEFAULT_LOG_ENTRIES entries | ||
1516 | * i.e the entries just before the next ont that uCode would fill. | ||
1517 | */ | ||
1518 | if (num_wraps) { | ||
1519 | if (next_entry < size) { | ||
1520 | pos = iwl3945_print_event_log(priv, | ||
1521 | capacity - (size - next_entry), | ||
1522 | size - next_entry, mode, | ||
1523 | pos, buf, bufsz); | ||
1524 | pos = iwl3945_print_event_log(priv, 0, | ||
1525 | next_entry, mode, | ||
1526 | pos, buf, bufsz); | ||
1527 | } else | ||
1528 | pos = iwl3945_print_event_log(priv, next_entry - size, | ||
1529 | size, mode, | ||
1530 | pos, buf, bufsz); | ||
1531 | } else { | ||
1532 | if (next_entry < size) | ||
1533 | pos = iwl3945_print_event_log(priv, 0, | ||
1534 | next_entry, mode, | ||
1535 | pos, buf, bufsz); | ||
1536 | else | ||
1537 | pos = iwl3945_print_event_log(priv, next_entry - size, | ||
1538 | size, mode, | ||
1539 | pos, buf, bufsz); | ||
1540 | } | ||
1541 | return pos; | ||
1542 | } | ||
1543 | |||
1544 | #define DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES (20) | ||
1545 | |||
1546 | int iwl3945_dump_nic_event_log(struct iwl_priv *priv, bool full_log, | ||
1547 | char **buf, bool display) | ||
1548 | { | ||
1549 | u32 base; /* SRAM byte address of event log header */ | ||
1550 | u32 capacity; /* event log capacity in # entries */ | ||
1551 | u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */ | ||
1552 | u32 num_wraps; /* # times uCode wrapped to top of log */ | ||
1553 | u32 next_entry; /* index of next entry to be written by uCode */ | ||
1554 | u32 size; /* # entries that we'll print */ | ||
1555 | int pos = 0; | ||
1556 | size_t bufsz = 0; | ||
1557 | |||
1558 | base = le32_to_cpu(priv->card_alive.log_event_table_ptr); | ||
1559 | if (!iwl3945_hw_valid_rtc_data_addr(base)) { | ||
1560 | IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base); | ||
1561 | return -EINVAL; | ||
1562 | } | ||
1563 | |||
1564 | /* event log header */ | ||
1565 | capacity = iwl_read_targ_mem(priv, base); | ||
1566 | mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32))); | ||
1567 | num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32))); | ||
1568 | next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32))); | ||
1569 | |||
1570 | if (capacity > priv->cfg->max_event_log_size) { | ||
1571 | IWL_ERR(priv, "Log capacity %d is bogus, limit to %d entries\n", | ||
1572 | capacity, priv->cfg->max_event_log_size); | ||
1573 | capacity = priv->cfg->max_event_log_size; | ||
1574 | } | ||
1575 | |||
1576 | if (next_entry > priv->cfg->max_event_log_size) { | ||
1577 | IWL_ERR(priv, "Log write index %d is bogus, limit to %d\n", | ||
1578 | next_entry, priv->cfg->max_event_log_size); | ||
1579 | next_entry = priv->cfg->max_event_log_size; | ||
1580 | } | ||
1581 | |||
1582 | size = num_wraps ? capacity : next_entry; | ||
1583 | |||
1584 | /* bail out if nothing in log */ | ||
1585 | if (size == 0) { | ||
1586 | IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n"); | ||
1587 | return pos; | ||
1588 | } | ||
1589 | |||
1590 | #ifdef CONFIG_IWLWIFI_DEBUG | ||
1591 | if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log) | ||
1592 | size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES) | ||
1593 | ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size; | ||
1594 | #else | ||
1595 | size = (size > DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES) | ||
1596 | ? DEFAULT_IWL3945_DUMP_EVENT_LOG_ENTRIES : size; | ||
1597 | #endif | ||
1598 | |||
1599 | IWL_ERR(priv, "Start IWL Event Log Dump: display last %d count\n", | ||
1600 | size); | ||
1601 | |||
1602 | #ifdef CONFIG_IWLWIFI_DEBUG | ||
1603 | if (display) { | ||
1604 | if (full_log) | ||
1605 | bufsz = capacity * 48; | ||
1606 | else | ||
1607 | bufsz = size * 48; | ||
1608 | *buf = kmalloc(bufsz, GFP_KERNEL); | ||
1609 | if (!*buf) | ||
1610 | return -ENOMEM; | ||
1611 | } | ||
1612 | if ((iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) || full_log) { | ||
1613 | /* if uCode has wrapped back to top of log, | ||
1614 | * start at the oldest entry, | ||
1615 | * i.e the next one that uCode would fill. | ||
1616 | */ | ||
1617 | if (num_wraps) | ||
1618 | pos = iwl3945_print_event_log(priv, next_entry, | ||
1619 | capacity - next_entry, mode, | ||
1620 | pos, buf, bufsz); | ||
1621 | |||
1622 | /* (then/else) start at top of log */ | ||
1623 | pos = iwl3945_print_event_log(priv, 0, next_entry, mode, | ||
1624 | pos, buf, bufsz); | ||
1625 | } else | ||
1626 | pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps, | ||
1627 | next_entry, size, mode, | ||
1628 | pos, buf, bufsz); | ||
1629 | #else | ||
1630 | pos = iwl3945_print_last_event_logs(priv, capacity, num_wraps, | ||
1631 | next_entry, size, mode, | ||
1632 | pos, buf, bufsz); | ||
1633 | #endif | ||
1634 | return pos; | ||
1635 | } | ||
1636 | |||
1637 | static void iwl3945_irq_tasklet(struct iwl_priv *priv) | ||
1638 | { | ||
1639 | u32 inta, handled = 0; | ||
1640 | u32 inta_fh; | ||
1641 | unsigned long flags; | ||
1642 | #ifdef CONFIG_IWLWIFI_DEBUG | ||
1643 | u32 inta_mask; | ||
1644 | #endif | ||
1645 | |||
1646 | spin_lock_irqsave(&priv->lock, flags); | ||
1647 | |||
1648 | /* Ack/clear/reset pending uCode interrupts. | ||
1649 | * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS, | ||
1650 | * and will clear only when CSR_FH_INT_STATUS gets cleared. */ | ||
1651 | inta = iwl_read32(priv, CSR_INT); | ||
1652 | iwl_write32(priv, CSR_INT, inta); | ||
1653 | |||
1654 | /* Ack/clear/reset pending flow-handler (DMA) interrupts. | ||
1655 | * Any new interrupts that happen after this, either while we're | ||
1656 | * in this tasklet, or later, will show up in next ISR/tasklet. */ | ||
1657 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); | ||
1658 | iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh); | ||
1659 | |||
1660 | #ifdef CONFIG_IWLWIFI_DEBUG | ||
1661 | if (iwl_get_debug_level(priv) & IWL_DL_ISR) { | ||
1662 | /* just for debug */ | ||
1663 | inta_mask = iwl_read32(priv, CSR_INT_MASK); | ||
1664 | IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", | ||
1665 | inta, inta_mask, inta_fh); | ||
1666 | } | ||
1667 | #endif | ||
1668 | |||
1669 | spin_unlock_irqrestore(&priv->lock, flags); | ||
1670 | |||
1671 | /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not | ||
1672 | * atomic, make sure that inta covers all the interrupts that | ||
1673 | * we've discovered, even if FH interrupt came in just after | ||
1674 | * reading CSR_INT. */ | ||
1675 | if (inta_fh & CSR39_FH_INT_RX_MASK) | ||
1676 | inta |= CSR_INT_BIT_FH_RX; | ||
1677 | if (inta_fh & CSR39_FH_INT_TX_MASK) | ||
1678 | inta |= CSR_INT_BIT_FH_TX; | ||
1679 | |||
1680 | /* Now service all interrupt bits discovered above. */ | ||
1681 | if (inta & CSR_INT_BIT_HW_ERR) { | ||
1682 | IWL_ERR(priv, "Hardware error detected. Restarting.\n"); | ||
1683 | |||
1684 | /* Tell the device to stop sending interrupts */ | ||
1685 | iwl_disable_interrupts(priv); | ||
1686 | |||
1687 | priv->isr_stats.hw++; | ||
1688 | iwl_irq_handle_error(priv); | ||
1689 | |||
1690 | handled |= CSR_INT_BIT_HW_ERR; | ||
1691 | |||
1692 | return; | ||
1693 | } | ||
1694 | |||
1695 | #ifdef CONFIG_IWLWIFI_DEBUG | ||
1696 | if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) { | ||
1697 | /* NIC fires this, but we don't use it, redundant with WAKEUP */ | ||
1698 | if (inta & CSR_INT_BIT_SCD) { | ||
1699 | IWL_DEBUG_ISR(priv, "Scheduler finished to transmit " | ||
1700 | "the frame/frames.\n"); | ||
1701 | priv->isr_stats.sch++; | ||
1702 | } | ||
1703 | |||
1704 | /* Alive notification via Rx interrupt will do the real work */ | ||
1705 | if (inta & CSR_INT_BIT_ALIVE) { | ||
1706 | IWL_DEBUG_ISR(priv, "Alive interrupt\n"); | ||
1707 | priv->isr_stats.alive++; | ||
1708 | } | ||
1709 | } | ||
1710 | #endif | ||
1711 | /* Safely ignore these bits for debug checks below */ | ||
1712 | inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE); | ||
1713 | |||
1714 | /* Error detected by uCode */ | ||
1715 | if (inta & CSR_INT_BIT_SW_ERR) { | ||
1716 | IWL_ERR(priv, "Microcode SW error detected. " | ||
1717 | "Restarting 0x%X.\n", inta); | ||
1718 | priv->isr_stats.sw++; | ||
1719 | priv->isr_stats.sw_err = inta; | ||
1720 | iwl_irq_handle_error(priv); | ||
1721 | handled |= CSR_INT_BIT_SW_ERR; | ||
1722 | } | ||
1723 | |||
1724 | /* uCode wakes up after power-down sleep */ | ||
1725 | if (inta & CSR_INT_BIT_WAKEUP) { | ||
1726 | IWL_DEBUG_ISR(priv, "Wakeup interrupt\n"); | ||
1727 | iwl_rx_queue_update_write_ptr(priv, &priv->rxq); | ||
1728 | iwl_txq_update_write_ptr(priv, &priv->txq[0]); | ||
1729 | iwl_txq_update_write_ptr(priv, &priv->txq[1]); | ||
1730 | iwl_txq_update_write_ptr(priv, &priv->txq[2]); | ||
1731 | iwl_txq_update_write_ptr(priv, &priv->txq[3]); | ||
1732 | iwl_txq_update_write_ptr(priv, &priv->txq[4]); | ||
1733 | iwl_txq_update_write_ptr(priv, &priv->txq[5]); | ||
1734 | |||
1735 | priv->isr_stats.wakeup++; | ||
1736 | handled |= CSR_INT_BIT_WAKEUP; | ||
1737 | } | ||
1738 | |||
1739 | /* All uCode command responses, including Tx command responses, | ||
1740 | * Rx "responses" (frame-received notification), and other | ||
1741 | * notifications from uCode come through here*/ | ||
1742 | if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) { | ||
1743 | iwl3945_rx_handle(priv); | ||
1744 | priv->isr_stats.rx++; | ||
1745 | handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX); | ||
1746 | } | ||
1747 | |||
1748 | if (inta & CSR_INT_BIT_FH_TX) { | ||
1749 | IWL_DEBUG_ISR(priv, "Tx interrupt\n"); | ||
1750 | priv->isr_stats.tx++; | ||
1751 | |||
1752 | iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6)); | ||
1753 | iwl_write_direct32(priv, FH39_TCSR_CREDIT | ||
1754 | (FH39_SRVC_CHNL), 0x0); | ||
1755 | handled |= CSR_INT_BIT_FH_TX; | ||
1756 | } | ||
1757 | |||
1758 | if (inta & ~handled) { | ||
1759 | IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled); | ||
1760 | priv->isr_stats.unhandled++; | ||
1761 | } | ||
1762 | |||
1763 | if (inta & ~priv->inta_mask) { | ||
1764 | IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n", | ||
1765 | inta & ~priv->inta_mask); | ||
1766 | IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh); | ||
1767 | } | ||
1768 | |||
1769 | /* Re-enable all interrupts */ | ||
1770 | /* only Re-enable if disabled by irq */ | ||
1771 | if (test_bit(STATUS_INT_ENABLED, &priv->status)) | ||
1772 | iwl_enable_interrupts(priv); | ||
1773 | |||
1774 | #ifdef CONFIG_IWLWIFI_DEBUG | ||
1775 | if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) { | ||
1776 | inta = iwl_read32(priv, CSR_INT); | ||
1777 | inta_mask = iwl_read32(priv, CSR_INT_MASK); | ||
1778 | inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS); | ||
1779 | IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, " | ||
1780 | "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags); | ||
1781 | } | ||
1782 | #endif | ||
1783 | } | ||
1784 | |||
1785 | static int iwl3945_get_single_channel_for_scan(struct iwl_priv *priv, | ||
1786 | struct ieee80211_vif *vif, | ||
1787 | enum ieee80211_band band, | ||
1788 | struct iwl3945_scan_channel *scan_ch) | ||
1789 | { | ||
1790 | const struct ieee80211_supported_band *sband; | ||
1791 | u16 passive_dwell = 0; | ||
1792 | u16 active_dwell = 0; | ||
1793 | int added = 0; | ||
1794 | u8 channel = 0; | ||
1795 | |||
1796 | sband = iwl_get_hw_mode(priv, band); | ||
1797 | if (!sband) { | ||
1798 | IWL_ERR(priv, "invalid band\n"); | ||
1799 | return added; | ||
1800 | } | ||
1801 | |||
1802 | active_dwell = iwl_get_active_dwell_time(priv, band, 0); | ||
1803 | passive_dwell = iwl_get_passive_dwell_time(priv, band, vif); | ||
1804 | |||
1805 | if (passive_dwell <= active_dwell) | ||
1806 | passive_dwell = active_dwell + 1; | ||
1807 | |||
1808 | |||
1809 | channel = iwl_get_single_channel_number(priv, band); | ||
1810 | |||
1811 | if (channel) { | ||
1812 | scan_ch->channel = channel; | ||
1813 | scan_ch->type = 0; /* passive */ | ||
1814 | scan_ch->active_dwell = cpu_to_le16(active_dwell); | ||
1815 | scan_ch->passive_dwell = cpu_to_le16(passive_dwell); | ||
1816 | /* Set txpower levels to defaults */ | ||
1817 | scan_ch->tpc.dsp_atten = 110; | ||
1818 | if (band == IEEE80211_BAND_5GHZ) | ||
1819 | scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3; | ||
1820 | else | ||
1821 | scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3)); | ||
1822 | added++; | ||
1823 | } else | ||
1824 | IWL_ERR(priv, "no valid channel found\n"); | ||
1825 | return added; | ||
1826 | } | ||
1827 | |||
1828 | static int iwl3945_get_channels_for_scan(struct iwl_priv *priv, | ||
1829 | enum ieee80211_band band, | ||
1830 | u8 is_active, u8 n_probes, | ||
1831 | struct iwl3945_scan_channel *scan_ch, | ||
1832 | struct ieee80211_vif *vif) | ||
1833 | { | ||
1834 | struct ieee80211_channel *chan; | ||
1835 | const struct ieee80211_supported_band *sband; | ||
1836 | const struct iwl_channel_info *ch_info; | ||
1837 | u16 passive_dwell = 0; | ||
1838 | u16 active_dwell = 0; | ||
1839 | int added, i; | ||
1840 | |||
1841 | sband = iwl_get_hw_mode(priv, band); | ||
1842 | if (!sband) | ||
1843 | return 0; | ||
1844 | |||
1845 | active_dwell = iwl_get_active_dwell_time(priv, band, n_probes); | ||
1846 | passive_dwell = iwl_get_passive_dwell_time(priv, band, vif); | ||
1847 | |||
1848 | if (passive_dwell <= active_dwell) | ||
1849 | passive_dwell = active_dwell + 1; | ||
1850 | |||
1851 | for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) { | ||
1852 | chan = priv->scan_request->channels[i]; | ||
1853 | |||
1854 | if (chan->band != band) | ||
1855 | continue; | ||
1856 | |||
1857 | scan_ch->channel = chan->hw_value; | ||
1858 | |||
1859 | ch_info = iwl_get_channel_info(priv, band, scan_ch->channel); | ||
1860 | if (!is_channel_valid(ch_info)) { | ||
1861 | IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n", | ||
1862 | scan_ch->channel); | ||
1863 | continue; | ||
1864 | } | ||
1865 | |||
1866 | scan_ch->active_dwell = cpu_to_le16(active_dwell); | ||
1867 | scan_ch->passive_dwell = cpu_to_le16(passive_dwell); | ||
1868 | /* If passive , set up for auto-switch | ||
1869 | * and use long active_dwell time. | ||
1870 | */ | ||
1871 | if (!is_active || is_channel_passive(ch_info) || | ||
1872 | (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) { | ||
1873 | scan_ch->type = 0; /* passive */ | ||
1874 | if (IWL_UCODE_API(priv->ucode_ver) == 1) | ||
1875 | scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1); | ||
1876 | } else { | ||
1877 | scan_ch->type = 1; /* active */ | ||
1878 | } | ||
1879 | |||
1880 | /* Set direct probe bits. These may be used both for active | ||
1881 | * scan channels (probes gets sent right away), | ||
1882 | * or for passive channels (probes get se sent only after | ||
1883 | * hearing clear Rx packet).*/ | ||
1884 | if (IWL_UCODE_API(priv->ucode_ver) >= 2) { | ||
1885 | if (n_probes) | ||
1886 | scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes); | ||
1887 | } else { | ||
1888 | /* uCode v1 does not allow setting direct probe bits on | ||
1889 | * passive channel. */ | ||
1890 | if ((scan_ch->type & 1) && n_probes) | ||
1891 | scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes); | ||
1892 | } | ||
1893 | |||
1894 | /* Set txpower levels to defaults */ | ||
1895 | scan_ch->tpc.dsp_atten = 110; | ||
1896 | /* scan_pwr_info->tpc.dsp_atten; */ | ||
1897 | |||
1898 | /*scan_pwr_info->tpc.tx_gain; */ | ||
1899 | if (band == IEEE80211_BAND_5GHZ) | ||
1900 | scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3; | ||
1901 | else { | ||
1902 | scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3)); | ||
1903 | /* NOTE: if we were doing 6Mb OFDM for scans we'd use | ||
1904 | * power level: | ||
1905 | * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3; | ||
1906 | */ | ||
1907 | } | ||
1908 | |||
1909 | IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n", | ||
1910 | scan_ch->channel, | ||
1911 | (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE", | ||
1912 | (scan_ch->type & 1) ? | ||
1913 | active_dwell : passive_dwell); | ||
1914 | |||
1915 | scan_ch++; | ||
1916 | added++; | ||
1917 | } | ||
1918 | |||
1919 | IWL_DEBUG_SCAN(priv, "total channels to scan %d\n", added); | ||
1920 | return added; | ||
1921 | } | ||
1922 | |||
1923 | static void iwl3945_init_hw_rates(struct iwl_priv *priv, | ||
1924 | struct ieee80211_rate *rates) | ||
1925 | { | ||
1926 | int i; | ||
1927 | |||
1928 | for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) { | ||
1929 | rates[i].bitrate = iwl3945_rates[i].ieee * 5; | ||
1930 | rates[i].hw_value = i; /* Rate scaling will work on indexes */ | ||
1931 | rates[i].hw_value_short = i; | ||
1932 | rates[i].flags = 0; | ||
1933 | if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) { | ||
1934 | /* | ||
1935 | * If CCK != 1M then set short preamble rate flag. | ||
1936 | */ | ||
1937 | rates[i].flags |= (iwl3945_rates[i].plcp == 10) ? | ||
1938 | 0 : IEEE80211_RATE_SHORT_PREAMBLE; | ||
1939 | } | ||
1940 | } | ||
1941 | } | ||
1942 | |||
1943 | /****************************************************************************** | ||
1944 | * | ||
1945 | * uCode download functions | ||
1946 | * | ||
1947 | ******************************************************************************/ | ||
1948 | |||
1949 | static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv) | ||
1950 | { | ||
1951 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code); | ||
1952 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data); | ||
1953 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup); | ||
1954 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init); | ||
1955 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data); | ||
1956 | iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot); | ||
1957 | } | ||
1958 | |||
1959 | /** | ||
1960 | * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host, | ||
1961 | * looking at all data. | ||
1962 | */ | ||
1963 | static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len) | ||
1964 | { | ||
1965 | u32 val; | ||
1966 | u32 save_len = len; | ||
1967 | int rc = 0; | ||
1968 | u32 errcnt; | ||
1969 | |||
1970 | IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len); | ||
1971 | |||
1972 | iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, | ||
1973 | IWL39_RTC_INST_LOWER_BOUND); | ||
1974 | |||
1975 | errcnt = 0; | ||
1976 | for (; len > 0; len -= sizeof(u32), image++) { | ||
1977 | /* read data comes through single port, auto-incr addr */ | ||
1978 | /* NOTE: Use the debugless read so we don't flood kernel log | ||
1979 | * if IWL_DL_IO is set */ | ||
1980 | val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); | ||
1981 | if (val != le32_to_cpu(*image)) { | ||
1982 | IWL_ERR(priv, "uCode INST section is invalid at " | ||
1983 | "offset 0x%x, is 0x%x, s/b 0x%x\n", | ||
1984 | save_len - len, val, le32_to_cpu(*image)); | ||
1985 | rc = -EIO; | ||
1986 | errcnt++; | ||
1987 | if (errcnt >= 20) | ||
1988 | break; | ||
1989 | } | ||
1990 | } | ||
1991 | |||
1992 | |||
1993 | if (!errcnt) | ||
1994 | IWL_DEBUG_INFO(priv, | ||
1995 | "ucode image in INSTRUCTION memory is good\n"); | ||
1996 | |||
1997 | return rc; | ||
1998 | } | ||
1999 | |||
2000 | |||
2001 | /** | ||
2002 | * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host, | ||
2003 | * using sample data 100 bytes apart. If these sample points are good, | ||
2004 | * it's a pretty good bet that everything between them is good, too. | ||
2005 | */ | ||
2006 | static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len) | ||
2007 | { | ||
2008 | u32 val; | ||
2009 | int rc = 0; | ||
2010 | u32 errcnt = 0; | ||
2011 | u32 i; | ||
2012 | |||
2013 | IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len); | ||
2014 | |||
2015 | for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) { | ||
2016 | /* read data comes through single port, auto-incr addr */ | ||
2017 | /* NOTE: Use the debugless read so we don't flood kernel log | ||
2018 | * if IWL_DL_IO is set */ | ||
2019 | iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, | ||
2020 | i + IWL39_RTC_INST_LOWER_BOUND); | ||
2021 | val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); | ||
2022 | if (val != le32_to_cpu(*image)) { | ||
2023 | #if 0 /* Enable this if you want to see details */ | ||
2024 | IWL_ERR(priv, "uCode INST section is invalid at " | ||
2025 | "offset 0x%x, is 0x%x, s/b 0x%x\n", | ||
2026 | i, val, *image); | ||
2027 | #endif | ||
2028 | rc = -EIO; | ||
2029 | errcnt++; | ||
2030 | if (errcnt >= 3) | ||
2031 | break; | ||
2032 | } | ||
2033 | } | ||
2034 | |||
2035 | return rc; | ||
2036 | } | ||
2037 | |||
2038 | |||
2039 | /** | ||
2040 | * iwl3945_verify_ucode - determine which instruction image is in SRAM, | ||
2041 | * and verify its contents | ||
2042 | */ | ||
2043 | static int iwl3945_verify_ucode(struct iwl_priv *priv) | ||
2044 | { | ||
2045 | __le32 *image; | ||
2046 | u32 len; | ||
2047 | int rc = 0; | ||
2048 | |||
2049 | /* Try bootstrap */ | ||
2050 | image = (__le32 *)priv->ucode_boot.v_addr; | ||
2051 | len = priv->ucode_boot.len; | ||
2052 | rc = iwl3945_verify_inst_sparse(priv, image, len); | ||
2053 | if (rc == 0) { | ||
2054 | IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n"); | ||
2055 | return 0; | ||
2056 | } | ||
2057 | |||
2058 | /* Try initialize */ | ||
2059 | image = (__le32 *)priv->ucode_init.v_addr; | ||
2060 | len = priv->ucode_init.len; | ||
2061 | rc = iwl3945_verify_inst_sparse(priv, image, len); | ||
2062 | if (rc == 0) { | ||
2063 | IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n"); | ||
2064 | return 0; | ||
2065 | } | ||
2066 | |||
2067 | /* Try runtime/protocol */ | ||
2068 | image = (__le32 *)priv->ucode_code.v_addr; | ||
2069 | len = priv->ucode_code.len; | ||
2070 | rc = iwl3945_verify_inst_sparse(priv, image, len); | ||
2071 | if (rc == 0) { | ||
2072 | IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n"); | ||
2073 | return 0; | ||
2074 | } | ||
2075 | |||
2076 | IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n"); | ||
2077 | |||
2078 | /* Since nothing seems to match, show first several data entries in | ||
2079 | * instruction SRAM, so maybe visual inspection will give a clue. | ||
2080 | * Selection of bootstrap image (vs. other images) is arbitrary. */ | ||
2081 | image = (__le32 *)priv->ucode_boot.v_addr; | ||
2082 | len = priv->ucode_boot.len; | ||
2083 | rc = iwl3945_verify_inst_full(priv, image, len); | ||
2084 | |||
2085 | return rc; | ||
2086 | } | ||
2087 | |||
2088 | static void iwl3945_nic_start(struct iwl_priv *priv) | ||
2089 | { | ||
2090 | /* Remove all resets to allow NIC to operate */ | ||
2091 | iwl_write32(priv, CSR_RESET, 0); | ||
2092 | } | ||
2093 | |||
2094 | #define IWL3945_UCODE_GET(item) \ | ||
2095 | static u32 iwl3945_ucode_get_##item(const struct iwl_ucode_header *ucode)\ | ||
2096 | { \ | ||
2097 | return le32_to_cpu(ucode->u.v1.item); \ | ||
2098 | } | ||
2099 | |||
2100 | static u32 iwl3945_ucode_get_header_size(u32 api_ver) | ||
2101 | { | ||
2102 | return 24; | ||
2103 | } | ||
2104 | |||
2105 | static u8 *iwl3945_ucode_get_data(const struct iwl_ucode_header *ucode) | ||
2106 | { | ||
2107 | return (u8 *) ucode->u.v1.data; | ||
2108 | } | ||
2109 | |||
2110 | IWL3945_UCODE_GET(inst_size); | ||
2111 | IWL3945_UCODE_GET(data_size); | ||
2112 | IWL3945_UCODE_GET(init_size); | ||
2113 | IWL3945_UCODE_GET(init_data_size); | ||
2114 | IWL3945_UCODE_GET(boot_size); | ||
2115 | |||
2116 | /** | ||
2117 | * iwl3945_read_ucode - Read uCode images from disk file. | ||
2118 | * | ||
2119 | * Copy into buffers for card to fetch via bus-mastering | ||
2120 | */ | ||
2121 | static int iwl3945_read_ucode(struct iwl_priv *priv) | ||
2122 | { | ||
2123 | const struct iwl_ucode_header *ucode; | ||
2124 | int ret = -EINVAL, index; | ||
2125 | const struct firmware *ucode_raw; | ||
2126 | /* firmware file name contains uCode/driver compatibility version */ | ||
2127 | const char *name_pre = priv->cfg->fw_name_pre; | ||
2128 | const unsigned int api_max = priv->cfg->ucode_api_max; | ||
2129 | const unsigned int api_min = priv->cfg->ucode_api_min; | ||
2130 | char buf[25]; | ||
2131 | u8 *src; | ||
2132 | size_t len; | ||
2133 | u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size; | ||
2134 | |||
2135 | /* Ask kernel firmware_class module to get the boot firmware off disk. | ||
2136 | * request_firmware() is synchronous, file is in memory on return. */ | ||
2137 | for (index = api_max; index >= api_min; index--) { | ||
2138 | sprintf(buf, "%s%u%s", name_pre, index, ".ucode"); | ||
2139 | ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev); | ||
2140 | if (ret < 0) { | ||
2141 | IWL_ERR(priv, "%s firmware file req failed: %d\n", | ||
2142 | buf, ret); | ||
2143 | if (ret == -ENOENT) | ||
2144 | continue; | ||
2145 | else | ||
2146 | goto error; | ||
2147 | } else { | ||
2148 | if (index < api_max) | ||
2149 | IWL_ERR(priv, "Loaded firmware %s, " | ||
2150 | "which is deprecated. " | ||
2151 | " Please use API v%u instead.\n", | ||
2152 | buf, api_max); | ||
2153 | IWL_DEBUG_INFO(priv, "Got firmware '%s' file " | ||
2154 | "(%zd bytes) from disk\n", | ||
2155 | buf, ucode_raw->size); | ||
2156 | break; | ||
2157 | } | ||
2158 | } | ||
2159 | |||
2160 | if (ret < 0) | ||
2161 | goto error; | ||
2162 | |||
2163 | /* Make sure that we got at least our header! */ | ||
2164 | if (ucode_raw->size < iwl3945_ucode_get_header_size(1)) { | ||
2165 | IWL_ERR(priv, "File size way too small!\n"); | ||
2166 | ret = -EINVAL; | ||
2167 | goto err_release; | ||
2168 | } | ||
2169 | |||
2170 | /* Data from ucode file: header followed by uCode images */ | ||
2171 | ucode = (struct iwl_ucode_header *)ucode_raw->data; | ||
2172 | |||
2173 | priv->ucode_ver = le32_to_cpu(ucode->ver); | ||
2174 | api_ver = IWL_UCODE_API(priv->ucode_ver); | ||
2175 | inst_size = iwl3945_ucode_get_inst_size(ucode); | ||
2176 | data_size = iwl3945_ucode_get_data_size(ucode); | ||
2177 | init_size = iwl3945_ucode_get_init_size(ucode); | ||
2178 | init_data_size = iwl3945_ucode_get_init_data_size(ucode); | ||
2179 | boot_size = iwl3945_ucode_get_boot_size(ucode); | ||
2180 | src = iwl3945_ucode_get_data(ucode); | ||
2181 | |||
2182 | /* api_ver should match the api version forming part of the | ||
2183 | * firmware filename ... but we don't check for that and only rely | ||
2184 | * on the API version read from firmware header from here on forward */ | ||
2185 | |||
2186 | if (api_ver < api_min || api_ver > api_max) { | ||
2187 | IWL_ERR(priv, "Driver unable to support your firmware API. " | ||
2188 | "Driver supports v%u, firmware is v%u.\n", | ||
2189 | api_max, api_ver); | ||
2190 | priv->ucode_ver = 0; | ||
2191 | ret = -EINVAL; | ||
2192 | goto err_release; | ||
2193 | } | ||
2194 | if (api_ver != api_max) | ||
2195 | IWL_ERR(priv, "Firmware has old API version. Expected %u, " | ||
2196 | "got %u. New firmware can be obtained " | ||
2197 | "from http://www.intellinuxwireless.org.\n", | ||
2198 | api_max, api_ver); | ||
2199 | |||
2200 | IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n", | ||
2201 | IWL_UCODE_MAJOR(priv->ucode_ver), | ||
2202 | IWL_UCODE_MINOR(priv->ucode_ver), | ||
2203 | IWL_UCODE_API(priv->ucode_ver), | ||
2204 | IWL_UCODE_SERIAL(priv->ucode_ver)); | ||
2205 | |||
2206 | snprintf(priv->hw->wiphy->fw_version, | ||
2207 | sizeof(priv->hw->wiphy->fw_version), | ||
2208 | "%u.%u.%u.%u", | ||
2209 | IWL_UCODE_MAJOR(priv->ucode_ver), | ||
2210 | IWL_UCODE_MINOR(priv->ucode_ver), | ||
2211 | IWL_UCODE_API(priv->ucode_ver), | ||
2212 | IWL_UCODE_SERIAL(priv->ucode_ver)); | ||
2213 | |||
2214 | IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n", | ||
2215 | priv->ucode_ver); | ||
2216 | IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n", | ||
2217 | inst_size); | ||
2218 | IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n", | ||
2219 | data_size); | ||
2220 | IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n", | ||
2221 | init_size); | ||
2222 | IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n", | ||
2223 | init_data_size); | ||
2224 | IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n", | ||
2225 | boot_size); | ||
2226 | |||
2227 | |||
2228 | /* Verify size of file vs. image size info in file's header */ | ||
2229 | if (ucode_raw->size != iwl3945_ucode_get_header_size(api_ver) + | ||
2230 | inst_size + data_size + init_size + | ||
2231 | init_data_size + boot_size) { | ||
2232 | |||
2233 | IWL_DEBUG_INFO(priv, | ||
2234 | "uCode file size %zd does not match expected size\n", | ||
2235 | ucode_raw->size); | ||
2236 | ret = -EINVAL; | ||
2237 | goto err_release; | ||
2238 | } | ||
2239 | |||
2240 | /* Verify that uCode images will fit in card's SRAM */ | ||
2241 | if (inst_size > IWL39_MAX_INST_SIZE) { | ||
2242 | IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n", | ||
2243 | inst_size); | ||
2244 | ret = -EINVAL; | ||
2245 | goto err_release; | ||
2246 | } | ||
2247 | |||
2248 | if (data_size > IWL39_MAX_DATA_SIZE) { | ||
2249 | IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n", | ||
2250 | data_size); | ||
2251 | ret = -EINVAL; | ||
2252 | goto err_release; | ||
2253 | } | ||
2254 | if (init_size > IWL39_MAX_INST_SIZE) { | ||
2255 | IWL_DEBUG_INFO(priv, | ||
2256 | "uCode init instr len %d too large to fit in\n", | ||
2257 | init_size); | ||
2258 | ret = -EINVAL; | ||
2259 | goto err_release; | ||
2260 | } | ||
2261 | if (init_data_size > IWL39_MAX_DATA_SIZE) { | ||
2262 | IWL_DEBUG_INFO(priv, | ||
2263 | "uCode init data len %d too large to fit in\n", | ||
2264 | init_data_size); | ||
2265 | ret = -EINVAL; | ||
2266 | goto err_release; | ||
2267 | } | ||
2268 | if (boot_size > IWL39_MAX_BSM_SIZE) { | ||
2269 | IWL_DEBUG_INFO(priv, | ||
2270 | "uCode boot instr len %d too large to fit in\n", | ||
2271 | boot_size); | ||
2272 | ret = -EINVAL; | ||
2273 | goto err_release; | ||
2274 | } | ||
2275 | |||
2276 | /* Allocate ucode buffers for card's bus-master loading ... */ | ||
2277 | |||
2278 | /* Runtime instructions and 2 copies of data: | ||
2279 | * 1) unmodified from disk | ||
2280 | * 2) backup cache for save/restore during power-downs */ | ||
2281 | priv->ucode_code.len = inst_size; | ||
2282 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code); | ||
2283 | |||
2284 | priv->ucode_data.len = data_size; | ||
2285 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data); | ||
2286 | |||
2287 | priv->ucode_data_backup.len = data_size; | ||
2288 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup); | ||
2289 | |||
2290 | if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr || | ||
2291 | !priv->ucode_data_backup.v_addr) | ||
2292 | goto err_pci_alloc; | ||
2293 | |||
2294 | /* Initialization instructions and data */ | ||
2295 | if (init_size && init_data_size) { | ||
2296 | priv->ucode_init.len = init_size; | ||
2297 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init); | ||
2298 | |||
2299 | priv->ucode_init_data.len = init_data_size; | ||
2300 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data); | ||
2301 | |||
2302 | if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr) | ||
2303 | goto err_pci_alloc; | ||
2304 | } | ||
2305 | |||
2306 | /* Bootstrap (instructions only, no data) */ | ||
2307 | if (boot_size) { | ||
2308 | priv->ucode_boot.len = boot_size; | ||
2309 | iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot); | ||
2310 | |||
2311 | if (!priv->ucode_boot.v_addr) | ||
2312 | goto err_pci_alloc; | ||
2313 | } | ||
2314 | |||
2315 | /* Copy images into buffers for card's bus-master reads ... */ | ||
2316 | |||
2317 | /* Runtime instructions (first block of data in file) */ | ||
2318 | len = inst_size; | ||
2319 | IWL_DEBUG_INFO(priv, | ||
2320 | "Copying (but not loading) uCode instr len %zd\n", len); | ||
2321 | memcpy(priv->ucode_code.v_addr, src, len); | ||
2322 | src += len; | ||
2323 | |||
2324 | IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n", | ||
2325 | priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr); | ||
2326 | |||
2327 | /* Runtime data (2nd block) | ||
2328 | * NOTE: Copy into backup buffer will be done in iwl3945_up() */ | ||
2329 | len = data_size; | ||
2330 | IWL_DEBUG_INFO(priv, | ||
2331 | "Copying (but not loading) uCode data len %zd\n", len); | ||
2332 | memcpy(priv->ucode_data.v_addr, src, len); | ||
2333 | memcpy(priv->ucode_data_backup.v_addr, src, len); | ||
2334 | src += len; | ||
2335 | |||
2336 | /* Initialization instructions (3rd block) */ | ||
2337 | if (init_size) { | ||
2338 | len = init_size; | ||
2339 | IWL_DEBUG_INFO(priv, | ||
2340 | "Copying (but not loading) init instr len %zd\n", len); | ||
2341 | memcpy(priv->ucode_init.v_addr, src, len); | ||
2342 | src += len; | ||
2343 | } | ||
2344 | |||
2345 | /* Initialization data (4th block) */ | ||
2346 | if (init_data_size) { | ||
2347 | len = init_data_size; | ||
2348 | IWL_DEBUG_INFO(priv, | ||
2349 | "Copying (but not loading) init data len %zd\n", len); | ||
2350 | memcpy(priv->ucode_init_data.v_addr, src, len); | ||
2351 | src += len; | ||
2352 | } | ||
2353 | |||
2354 | /* Bootstrap instructions (5th block) */ | ||
2355 | len = boot_size; | ||
2356 | IWL_DEBUG_INFO(priv, | ||
2357 | "Copying (but not loading) boot instr len %zd\n", len); | ||
2358 | memcpy(priv->ucode_boot.v_addr, src, len); | ||
2359 | |||
2360 | /* We have our copies now, allow OS release its copies */ | ||
2361 | release_firmware(ucode_raw); | ||
2362 | return 0; | ||
2363 | |||
2364 | err_pci_alloc: | ||
2365 | IWL_ERR(priv, "failed to allocate pci memory\n"); | ||
2366 | ret = -ENOMEM; | ||
2367 | iwl3945_dealloc_ucode_pci(priv); | ||
2368 | |||
2369 | err_release: | ||
2370 | release_firmware(ucode_raw); | ||
2371 | |||
2372 | error: | ||
2373 | return ret; | ||
2374 | } | ||
2375 | |||
2376 | |||
2377 | /** | ||
2378 | * iwl3945_set_ucode_ptrs - Set uCode address location | ||
2379 | * | ||
2380 | * Tell initialization uCode where to find runtime uCode. | ||
2381 | * | ||
2382 | * BSM registers initially contain pointers to initialization uCode. | ||
2383 | * We need to replace them to load runtime uCode inst and data, | ||
2384 | * and to save runtime data when powering down. | ||
2385 | */ | ||
2386 | static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv) | ||
2387 | { | ||
2388 | dma_addr_t pinst; | ||
2389 | dma_addr_t pdata; | ||
2390 | |||
2391 | /* bits 31:0 for 3945 */ | ||
2392 | pinst = priv->ucode_code.p_addr; | ||
2393 | pdata = priv->ucode_data_backup.p_addr; | ||
2394 | |||
2395 | /* Tell bootstrap uCode where to find image to load */ | ||
2396 | iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst); | ||
2397 | iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata); | ||
2398 | iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, | ||
2399 | priv->ucode_data.len); | ||
2400 | |||
2401 | /* Inst byte count must be last to set up, bit 31 signals uCode | ||
2402 | * that all new ptr/size info is in place */ | ||
2403 | iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, | ||
2404 | priv->ucode_code.len | BSM_DRAM_INST_LOAD); | ||
2405 | |||
2406 | IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n"); | ||
2407 | |||
2408 | return 0; | ||
2409 | } | ||
2410 | |||
2411 | /** | ||
2412 | * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received | ||
2413 | * | ||
2414 | * Called after REPLY_ALIVE notification received from "initialize" uCode. | ||
2415 | * | ||
2416 | * Tell "initialize" uCode to go ahead and load the runtime uCode. | ||
2417 | */ | ||
2418 | static void iwl3945_init_alive_start(struct iwl_priv *priv) | ||
2419 | { | ||
2420 | /* Check alive response for "valid" sign from uCode */ | ||
2421 | if (priv->card_alive_init.is_valid != UCODE_VALID_OK) { | ||
2422 | /* We had an error bringing up the hardware, so take it | ||
2423 | * all the way back down so we can try again */ | ||
2424 | IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n"); | ||
2425 | goto restart; | ||
2426 | } | ||
2427 | |||
2428 | /* Bootstrap uCode has loaded initialize uCode ... verify inst image. | ||
2429 | * This is a paranoid check, because we would not have gotten the | ||
2430 | * "initialize" alive if code weren't properly loaded. */ | ||
2431 | if (iwl3945_verify_ucode(priv)) { | ||
2432 | /* Runtime instruction load was bad; | ||
2433 | * take it all the way back down so we can try again */ | ||
2434 | IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n"); | ||
2435 | goto restart; | ||
2436 | } | ||
2437 | |||
2438 | /* Send pointers to protocol/runtime uCode image ... init code will | ||
2439 | * load and launch runtime uCode, which will send us another "Alive" | ||
2440 | * notification. */ | ||
2441 | IWL_DEBUG_INFO(priv, "Initialization Alive received.\n"); | ||
2442 | if (iwl3945_set_ucode_ptrs(priv)) { | ||
2443 | /* Runtime instruction load won't happen; | ||
2444 | * take it all the way back down so we can try again */ | ||
2445 | IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n"); | ||
2446 | goto restart; | ||
2447 | } | ||
2448 | return; | ||
2449 | |||
2450 | restart: | ||
2451 | queue_work(priv->workqueue, &priv->restart); | ||
2452 | } | ||
2453 | |||
2454 | /** | ||
2455 | * iwl3945_alive_start - called after REPLY_ALIVE notification received | ||
2456 | * from protocol/runtime uCode (initialization uCode's | ||
2457 | * Alive gets handled by iwl3945_init_alive_start()). | ||
2458 | */ | ||
2459 | static void iwl3945_alive_start(struct iwl_priv *priv) | ||
2460 | { | ||
2461 | int thermal_spin = 0; | ||
2462 | u32 rfkill; | ||
2463 | |||
2464 | IWL_DEBUG_INFO(priv, "Runtime Alive received.\n"); | ||
2465 | |||
2466 | if (priv->card_alive.is_valid != UCODE_VALID_OK) { | ||
2467 | /* We had an error bringing up the hardware, so take it | ||
2468 | * all the way back down so we can try again */ | ||
2469 | IWL_DEBUG_INFO(priv, "Alive failed.\n"); | ||
2470 | goto restart; | ||
2471 | } | ||
2472 | |||
2473 | /* Initialize uCode has loaded Runtime uCode ... verify inst image. | ||
2474 | * This is a paranoid check, because we would not have gotten the | ||
2475 | * "runtime" alive if code weren't properly loaded. */ | ||
2476 | if (iwl3945_verify_ucode(priv)) { | ||
2477 | /* Runtime instruction load was bad; | ||
2478 | * take it all the way back down so we can try again */ | ||
2479 | IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n"); | ||
2480 | goto restart; | ||
2481 | } | ||
2482 | |||
2483 | rfkill = iwl_read_prph(priv, APMG_RFKILL_REG); | ||
2484 | IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill); | ||
2485 | |||
2486 | if (rfkill & 0x1) { | ||
2487 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | ||
2488 | /* if RFKILL is not on, then wait for thermal | ||
2489 | * sensor in adapter to kick in */ | ||
2490 | while (iwl3945_hw_get_temperature(priv) == 0) { | ||
2491 | thermal_spin++; | ||
2492 | udelay(10); | ||
2493 | } | ||
2494 | |||
2495 | if (thermal_spin) | ||
2496 | IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n", | ||
2497 | thermal_spin * 10); | ||
2498 | } else | ||
2499 | set_bit(STATUS_RF_KILL_HW, &priv->status); | ||
2500 | |||
2501 | /* After the ALIVE response, we can send commands to 3945 uCode */ | ||
2502 | set_bit(STATUS_ALIVE, &priv->status); | ||
2503 | |||
2504 | if (priv->cfg->ops->lib->recover_from_tx_stall) { | ||
2505 | /* Enable timer to monitor the driver queues */ | ||
2506 | mod_timer(&priv->monitor_recover, | ||
2507 | jiffies + | ||
2508 | msecs_to_jiffies(priv->cfg->monitor_recover_period)); | ||
2509 | } | ||
2510 | |||
2511 | if (iwl_is_rfkill(priv)) | ||
2512 | return; | ||
2513 | |||
2514 | ieee80211_wake_queues(priv->hw); | ||
2515 | |||
2516 | priv->active_rate = IWL_RATES_MASK; | ||
2517 | |||
2518 | iwl_power_update_mode(priv, true); | ||
2519 | |||
2520 | if (iwl_is_associated(priv)) { | ||
2521 | struct iwl3945_rxon_cmd *active_rxon = | ||
2522 | (struct iwl3945_rxon_cmd *)(&priv->active_rxon); | ||
2523 | |||
2524 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | ||
2525 | active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; | ||
2526 | } else { | ||
2527 | /* Initialize our rx_config data */ | ||
2528 | iwl_connection_init_rx_config(priv, NULL); | ||
2529 | } | ||
2530 | |||
2531 | /* Configure Bluetooth device coexistence support */ | ||
2532 | priv->cfg->ops->hcmd->send_bt_config(priv); | ||
2533 | |||
2534 | /* Configure the adapter for unassociated operation */ | ||
2535 | iwlcore_commit_rxon(priv); | ||
2536 | |||
2537 | iwl3945_reg_txpower_periodic(priv); | ||
2538 | |||
2539 | iwl_leds_init(priv); | ||
2540 | |||
2541 | IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n"); | ||
2542 | set_bit(STATUS_READY, &priv->status); | ||
2543 | wake_up_interruptible(&priv->wait_command_queue); | ||
2544 | |||
2545 | return; | ||
2546 | |||
2547 | restart: | ||
2548 | queue_work(priv->workqueue, &priv->restart); | ||
2549 | } | ||
2550 | |||
2551 | static void iwl3945_cancel_deferred_work(struct iwl_priv *priv); | ||
2552 | |||
2553 | static void __iwl3945_down(struct iwl_priv *priv) | ||
2554 | { | ||
2555 | unsigned long flags; | ||
2556 | int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status); | ||
2557 | struct ieee80211_conf *conf = NULL; | ||
2558 | |||
2559 | IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n"); | ||
2560 | |||
2561 | conf = ieee80211_get_hw_conf(priv->hw); | ||
2562 | |||
2563 | if (!exit_pending) | ||
2564 | set_bit(STATUS_EXIT_PENDING, &priv->status); | ||
2565 | |||
2566 | /* Station information will now be cleared in device */ | ||
2567 | iwl_clear_ucode_stations(priv); | ||
2568 | iwl_dealloc_bcast_station(priv); | ||
2569 | iwl_clear_driver_stations(priv); | ||
2570 | |||
2571 | /* Unblock any waiting calls */ | ||
2572 | wake_up_interruptible_all(&priv->wait_command_queue); | ||
2573 | |||
2574 | /* Wipe out the EXIT_PENDING status bit if we are not actually | ||
2575 | * exiting the module */ | ||
2576 | if (!exit_pending) | ||
2577 | clear_bit(STATUS_EXIT_PENDING, &priv->status); | ||
2578 | |||
2579 | /* stop and reset the on-board processor */ | ||
2580 | iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); | ||
2581 | |||
2582 | /* tell the device to stop sending interrupts */ | ||
2583 | spin_lock_irqsave(&priv->lock, flags); | ||
2584 | iwl_disable_interrupts(priv); | ||
2585 | spin_unlock_irqrestore(&priv->lock, flags); | ||
2586 | iwl_synchronize_irq(priv); | ||
2587 | |||
2588 | if (priv->mac80211_registered) | ||
2589 | ieee80211_stop_queues(priv->hw); | ||
2590 | |||
2591 | /* If we have not previously called iwl3945_init() then | ||
2592 | * clear all bits but the RF Kill bits and return */ | ||
2593 | if (!iwl_is_init(priv)) { | ||
2594 | priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) << | ||
2595 | STATUS_RF_KILL_HW | | ||
2596 | test_bit(STATUS_GEO_CONFIGURED, &priv->status) << | ||
2597 | STATUS_GEO_CONFIGURED | | ||
2598 | test_bit(STATUS_EXIT_PENDING, &priv->status) << | ||
2599 | STATUS_EXIT_PENDING; | ||
2600 | goto exit; | ||
2601 | } | ||
2602 | |||
2603 | /* ...otherwise clear out all the status bits but the RF Kill | ||
2604 | * bit and continue taking the NIC down. */ | ||
2605 | priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) << | ||
2606 | STATUS_RF_KILL_HW | | ||
2607 | test_bit(STATUS_GEO_CONFIGURED, &priv->status) << | ||
2608 | STATUS_GEO_CONFIGURED | | ||
2609 | test_bit(STATUS_FW_ERROR, &priv->status) << | ||
2610 | STATUS_FW_ERROR | | ||
2611 | test_bit(STATUS_EXIT_PENDING, &priv->status) << | ||
2612 | STATUS_EXIT_PENDING; | ||
2613 | |||
2614 | iwl3945_hw_txq_ctx_stop(priv); | ||
2615 | iwl3945_hw_rxq_stop(priv); | ||
2616 | |||
2617 | /* Power-down device's busmaster DMA clocks */ | ||
2618 | iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT); | ||
2619 | udelay(5); | ||
2620 | |||
2621 | /* Stop the device, and put it in low power state */ | ||
2622 | priv->cfg->ops->lib->apm_ops.stop(priv); | ||
2623 | |||
2624 | exit: | ||
2625 | memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp)); | ||
2626 | |||
2627 | if (priv->ibss_beacon) | ||
2628 | dev_kfree_skb(priv->ibss_beacon); | ||
2629 | priv->ibss_beacon = NULL; | ||
2630 | |||
2631 | /* clear out any free frames */ | ||
2632 | iwl3945_clear_free_frames(priv); | ||
2633 | } | ||
2634 | |||
2635 | static void iwl3945_down(struct iwl_priv *priv) | ||
2636 | { | ||
2637 | mutex_lock(&priv->mutex); | ||
2638 | __iwl3945_down(priv); | ||
2639 | mutex_unlock(&priv->mutex); | ||
2640 | |||
2641 | iwl3945_cancel_deferred_work(priv); | ||
2642 | } | ||
2643 | |||
2644 | #define MAX_HW_RESTARTS 5 | ||
2645 | |||
2646 | static int __iwl3945_up(struct iwl_priv *priv) | ||
2647 | { | ||
2648 | int rc, i; | ||
2649 | |||
2650 | rc = iwl_alloc_bcast_station(priv, false); | ||
2651 | if (rc) | ||
2652 | return rc; | ||
2653 | |||
2654 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) { | ||
2655 | IWL_WARN(priv, "Exit pending; will not bring the NIC up\n"); | ||
2656 | return -EIO; | ||
2657 | } | ||
2658 | |||
2659 | if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) { | ||
2660 | IWL_ERR(priv, "ucode not available for device bring up\n"); | ||
2661 | return -EIO; | ||
2662 | } | ||
2663 | |||
2664 | /* If platform's RF_KILL switch is NOT set to KILL */ | ||
2665 | if (iwl_read32(priv, CSR_GP_CNTRL) & | ||
2666 | CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) | ||
2667 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | ||
2668 | else { | ||
2669 | set_bit(STATUS_RF_KILL_HW, &priv->status); | ||
2670 | IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n"); | ||
2671 | return -ENODEV; | ||
2672 | } | ||
2673 | |||
2674 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); | ||
2675 | |||
2676 | rc = iwl3945_hw_nic_init(priv); | ||
2677 | if (rc) { | ||
2678 | IWL_ERR(priv, "Unable to int nic\n"); | ||
2679 | return rc; | ||
2680 | } | ||
2681 | |||
2682 | /* make sure rfkill handshake bits are cleared */ | ||
2683 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); | ||
2684 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, | ||
2685 | CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); | ||
2686 | |||
2687 | /* clear (again), then enable host interrupts */ | ||
2688 | iwl_write32(priv, CSR_INT, 0xFFFFFFFF); | ||
2689 | iwl_enable_interrupts(priv); | ||
2690 | |||
2691 | /* really make sure rfkill handshake bits are cleared */ | ||
2692 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); | ||
2693 | iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); | ||
2694 | |||
2695 | /* Copy original ucode data image from disk into backup cache. | ||
2696 | * This will be used to initialize the on-board processor's | ||
2697 | * data SRAM for a clean start when the runtime program first loads. */ | ||
2698 | memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr, | ||
2699 | priv->ucode_data.len); | ||
2700 | |||
2701 | /* We return success when we resume from suspend and rf_kill is on. */ | ||
2702 | if (test_bit(STATUS_RF_KILL_HW, &priv->status)) | ||
2703 | return 0; | ||
2704 | |||
2705 | for (i = 0; i < MAX_HW_RESTARTS; i++) { | ||
2706 | |||
2707 | /* load bootstrap state machine, | ||
2708 | * load bootstrap program into processor's memory, | ||
2709 | * prepare to load the "initialize" uCode */ | ||
2710 | rc = priv->cfg->ops->lib->load_ucode(priv); | ||
2711 | |||
2712 | if (rc) { | ||
2713 | IWL_ERR(priv, | ||
2714 | "Unable to set up bootstrap uCode: %d\n", rc); | ||
2715 | continue; | ||
2716 | } | ||
2717 | |||
2718 | /* start card; "initialize" will load runtime ucode */ | ||
2719 | iwl3945_nic_start(priv); | ||
2720 | |||
2721 | IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n"); | ||
2722 | |||
2723 | return 0; | ||
2724 | } | ||
2725 | |||
2726 | set_bit(STATUS_EXIT_PENDING, &priv->status); | ||
2727 | __iwl3945_down(priv); | ||
2728 | clear_bit(STATUS_EXIT_PENDING, &priv->status); | ||
2729 | |||
2730 | /* tried to restart and config the device for as long as our | ||
2731 | * patience could withstand */ | ||
2732 | IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i); | ||
2733 | return -EIO; | ||
2734 | } | ||
2735 | |||
2736 | |||
2737 | /***************************************************************************** | ||
2738 | * | ||
2739 | * Workqueue callbacks | ||
2740 | * | ||
2741 | *****************************************************************************/ | ||
2742 | |||
2743 | static void iwl3945_bg_init_alive_start(struct work_struct *data) | ||
2744 | { | ||
2745 | struct iwl_priv *priv = | ||
2746 | container_of(data, struct iwl_priv, init_alive_start.work); | ||
2747 | |||
2748 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | ||
2749 | return; | ||
2750 | |||
2751 | mutex_lock(&priv->mutex); | ||
2752 | iwl3945_init_alive_start(priv); | ||
2753 | mutex_unlock(&priv->mutex); | ||
2754 | } | ||
2755 | |||
2756 | static void iwl3945_bg_alive_start(struct work_struct *data) | ||
2757 | { | ||
2758 | struct iwl_priv *priv = | ||
2759 | container_of(data, struct iwl_priv, alive_start.work); | ||
2760 | |||
2761 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | ||
2762 | return; | ||
2763 | |||
2764 | mutex_lock(&priv->mutex); | ||
2765 | iwl3945_alive_start(priv); | ||
2766 | mutex_unlock(&priv->mutex); | ||
2767 | } | ||
2768 | |||
2769 | /* | ||
2770 | * 3945 cannot interrupt driver when hardware rf kill switch toggles; | ||
2771 | * driver must poll CSR_GP_CNTRL_REG register for change. This register | ||
2772 | * *is* readable even when device has been SW_RESET into low power mode | ||
2773 | * (e.g. during RF KILL). | ||
2774 | */ | ||
2775 | static void iwl3945_rfkill_poll(struct work_struct *data) | ||
2776 | { | ||
2777 | struct iwl_priv *priv = | ||
2778 | container_of(data, struct iwl_priv, _3945.rfkill_poll.work); | ||
2779 | bool old_rfkill = test_bit(STATUS_RF_KILL_HW, &priv->status); | ||
2780 | bool new_rfkill = !(iwl_read32(priv, CSR_GP_CNTRL) | ||
2781 | & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW); | ||
2782 | |||
2783 | if (new_rfkill != old_rfkill) { | ||
2784 | if (new_rfkill) | ||
2785 | set_bit(STATUS_RF_KILL_HW, &priv->status); | ||
2786 | else | ||
2787 | clear_bit(STATUS_RF_KILL_HW, &priv->status); | ||
2788 | |||
2789 | wiphy_rfkill_set_hw_state(priv->hw->wiphy, new_rfkill); | ||
2790 | |||
2791 | IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n", | ||
2792 | new_rfkill ? "disable radio" : "enable radio"); | ||
2793 | } | ||
2794 | |||
2795 | /* Keep this running, even if radio now enabled. This will be | ||
2796 | * cancelled in mac_start() if system decides to start again */ | ||
2797 | queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll, | ||
2798 | round_jiffies_relative(2 * HZ)); | ||
2799 | |||
2800 | } | ||
2801 | |||
2802 | void iwl3945_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif) | ||
2803 | { | ||
2804 | struct iwl_host_cmd cmd = { | ||
2805 | .id = REPLY_SCAN_CMD, | ||
2806 | .len = sizeof(struct iwl3945_scan_cmd), | ||
2807 | .flags = CMD_SIZE_HUGE, | ||
2808 | }; | ||
2809 | struct iwl3945_scan_cmd *scan; | ||
2810 | struct ieee80211_conf *conf = NULL; | ||
2811 | u8 n_probes = 0; | ||
2812 | enum ieee80211_band band; | ||
2813 | bool is_active = false; | ||
2814 | |||
2815 | conf = ieee80211_get_hw_conf(priv->hw); | ||
2816 | |||
2817 | cancel_delayed_work(&priv->scan_check); | ||
2818 | |||
2819 | if (!iwl_is_ready(priv)) { | ||
2820 | IWL_WARN(priv, "request scan called when driver not ready.\n"); | ||
2821 | goto done; | ||
2822 | } | ||
2823 | |||
2824 | /* Make sure the scan wasn't canceled before this queued work | ||
2825 | * was given the chance to run... */ | ||
2826 | if (!test_bit(STATUS_SCANNING, &priv->status)) | ||
2827 | goto done; | ||
2828 | |||
2829 | /* This should never be called or scheduled if there is currently | ||
2830 | * a scan active in the hardware. */ | ||
2831 | if (test_bit(STATUS_SCAN_HW, &priv->status)) { | ||
2832 | IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests " | ||
2833 | "Ignoring second request.\n"); | ||
2834 | goto done; | ||
2835 | } | ||
2836 | |||
2837 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) { | ||
2838 | IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n"); | ||
2839 | goto done; | ||
2840 | } | ||
2841 | |||
2842 | if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) { | ||
2843 | IWL_DEBUG_HC(priv, | ||
2844 | "Scan request while abort pending. Queuing.\n"); | ||
2845 | goto done; | ||
2846 | } | ||
2847 | |||
2848 | if (iwl_is_rfkill(priv)) { | ||
2849 | IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n"); | ||
2850 | goto done; | ||
2851 | } | ||
2852 | |||
2853 | if (!test_bit(STATUS_READY, &priv->status)) { | ||
2854 | IWL_DEBUG_HC(priv, | ||
2855 | "Scan request while uninitialized. Queuing.\n"); | ||
2856 | goto done; | ||
2857 | } | ||
2858 | |||
2859 | if (!priv->scan_cmd) { | ||
2860 | priv->scan_cmd = kmalloc(sizeof(struct iwl3945_scan_cmd) + | ||
2861 | IWL_MAX_SCAN_SIZE, GFP_KERNEL); | ||
2862 | if (!priv->scan_cmd) { | ||
2863 | IWL_DEBUG_SCAN(priv, "Fail to allocate scan memory\n"); | ||
2864 | goto done; | ||
2865 | } | ||
2866 | } | ||
2867 | scan = priv->scan_cmd; | ||
2868 | memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE); | ||
2869 | |||
2870 | scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH; | ||
2871 | scan->quiet_time = IWL_ACTIVE_QUIET_TIME; | ||
2872 | |||
2873 | if (iwl_is_associated(priv)) { | ||
2874 | u16 interval = 0; | ||
2875 | u32 extra; | ||
2876 | u32 suspend_time = 100; | ||
2877 | u32 scan_suspend_time = 100; | ||
2878 | unsigned long flags; | ||
2879 | |||
2880 | IWL_DEBUG_INFO(priv, "Scanning while associated...\n"); | ||
2881 | |||
2882 | spin_lock_irqsave(&priv->lock, flags); | ||
2883 | if (priv->is_internal_short_scan) | ||
2884 | interval = 0; | ||
2885 | else | ||
2886 | interval = vif->bss_conf.beacon_int; | ||
2887 | spin_unlock_irqrestore(&priv->lock, flags); | ||
2888 | |||
2889 | scan->suspend_time = 0; | ||
2890 | scan->max_out_time = cpu_to_le32(200 * 1024); | ||
2891 | if (!interval) | ||
2892 | interval = suspend_time; | ||
2893 | /* | ||
2894 | * suspend time format: | ||
2895 | * 0-19: beacon interval in usec (time before exec.) | ||
2896 | * 20-23: 0 | ||
2897 | * 24-31: number of beacons (suspend between channels) | ||
2898 | */ | ||
2899 | |||
2900 | extra = (suspend_time / interval) << 24; | ||
2901 | scan_suspend_time = 0xFF0FFFFF & | ||
2902 | (extra | ((suspend_time % interval) * 1024)); | ||
2903 | |||
2904 | scan->suspend_time = cpu_to_le32(scan_suspend_time); | ||
2905 | IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n", | ||
2906 | scan_suspend_time, interval); | ||
2907 | } | ||
2908 | |||
2909 | if (priv->is_internal_short_scan) { | ||
2910 | IWL_DEBUG_SCAN(priv, "Start internal passive scan.\n"); | ||
2911 | } else if (priv->scan_request->n_ssids) { | ||
2912 | int i, p = 0; | ||
2913 | IWL_DEBUG_SCAN(priv, "Kicking off active scan\n"); | ||
2914 | for (i = 0; i < priv->scan_request->n_ssids; i++) { | ||
2915 | /* always does wildcard anyway */ | ||
2916 | if (!priv->scan_request->ssids[i].ssid_len) | ||
2917 | continue; | ||
2918 | scan->direct_scan[p].id = WLAN_EID_SSID; | ||
2919 | scan->direct_scan[p].len = | ||
2920 | priv->scan_request->ssids[i].ssid_len; | ||
2921 | memcpy(scan->direct_scan[p].ssid, | ||
2922 | priv->scan_request->ssids[i].ssid, | ||
2923 | priv->scan_request->ssids[i].ssid_len); | ||
2924 | n_probes++; | ||
2925 | p++; | ||
2926 | } | ||
2927 | is_active = true; | ||
2928 | } else | ||
2929 | IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n"); | ||
2930 | |||
2931 | /* We don't build a direct scan probe request; the uCode will do | ||
2932 | * that based on the direct_mask added to each channel entry */ | ||
2933 | scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK; | ||
2934 | scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id; | ||
2935 | scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; | ||
2936 | |||
2937 | /* flags + rate selection */ | ||
2938 | |||
2939 | switch (priv->scan_band) { | ||
2940 | case IEEE80211_BAND_2GHZ: | ||
2941 | scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK; | ||
2942 | scan->tx_cmd.rate = IWL_RATE_1M_PLCP; | ||
2943 | scan->good_CRC_th = 0; | ||
2944 | band = IEEE80211_BAND_2GHZ; | ||
2945 | break; | ||
2946 | case IEEE80211_BAND_5GHZ: | ||
2947 | scan->tx_cmd.rate = IWL_RATE_6M_PLCP; | ||
2948 | /* | ||
2949 | * If active scaning is requested but a certain channel | ||
2950 | * is marked passive, we can do active scanning if we | ||
2951 | * detect transmissions. | ||
2952 | */ | ||
2953 | scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH_DEFAULT : | ||
2954 | IWL_GOOD_CRC_TH_DISABLED; | ||
2955 | band = IEEE80211_BAND_5GHZ; | ||
2956 | break; | ||
2957 | default: | ||
2958 | IWL_WARN(priv, "Invalid scan band\n"); | ||
2959 | goto done; | ||
2960 | } | ||
2961 | |||
2962 | if (!priv->is_internal_short_scan) { | ||
2963 | scan->tx_cmd.len = cpu_to_le16( | ||
2964 | iwl_fill_probe_req(priv, | ||
2965 | (struct ieee80211_mgmt *)scan->data, | ||
2966 | vif->addr, | ||
2967 | priv->scan_request->ie, | ||
2968 | priv->scan_request->ie_len, | ||
2969 | IWL_MAX_SCAN_SIZE - sizeof(*scan))); | ||
2970 | } else { | ||
2971 | /* use bcast addr, will not be transmitted but must be valid */ | ||
2972 | scan->tx_cmd.len = cpu_to_le16( | ||
2973 | iwl_fill_probe_req(priv, | ||
2974 | (struct ieee80211_mgmt *)scan->data, | ||
2975 | iwl_bcast_addr, NULL, 0, | ||
2976 | IWL_MAX_SCAN_SIZE - sizeof(*scan))); | ||
2977 | } | ||
2978 | /* select Rx antennas */ | ||
2979 | scan->flags |= iwl3945_get_antenna_flags(priv); | ||
2980 | |||
2981 | if (priv->is_internal_short_scan) { | ||
2982 | scan->channel_count = | ||
2983 | iwl3945_get_single_channel_for_scan(priv, vif, band, | ||
2984 | (void *)&scan->data[le16_to_cpu( | ||
2985 | scan->tx_cmd.len)]); | ||
2986 | } else { | ||
2987 | scan->channel_count = | ||
2988 | iwl3945_get_channels_for_scan(priv, band, is_active, n_probes, | ||
2989 | (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)], vif); | ||
2990 | } | ||
2991 | |||
2992 | if (scan->channel_count == 0) { | ||
2993 | IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count); | ||
2994 | goto done; | ||
2995 | } | ||
2996 | |||
2997 | cmd.len += le16_to_cpu(scan->tx_cmd.len) + | ||
2998 | scan->channel_count * sizeof(struct iwl3945_scan_channel); | ||
2999 | cmd.data = scan; | ||
3000 | scan->len = cpu_to_le16(cmd.len); | ||
3001 | |||
3002 | set_bit(STATUS_SCAN_HW, &priv->status); | ||
3003 | if (iwl_send_cmd_sync(priv, &cmd)) | ||
3004 | goto done; | ||
3005 | |||
3006 | queue_delayed_work(priv->workqueue, &priv->scan_check, | ||
3007 | IWL_SCAN_CHECK_WATCHDOG); | ||
3008 | |||
3009 | return; | ||
3010 | |||
3011 | done: | ||
3012 | /* can not perform scan make sure we clear scanning | ||
3013 | * bits from status so next scan request can be performed. | ||
3014 | * if we dont clear scanning status bit here all next scan | ||
3015 | * will fail | ||
3016 | */ | ||
3017 | clear_bit(STATUS_SCAN_HW, &priv->status); | ||
3018 | clear_bit(STATUS_SCANNING, &priv->status); | ||
3019 | |||
3020 | /* inform mac80211 scan aborted */ | ||
3021 | queue_work(priv->workqueue, &priv->abort_scan); | ||
3022 | } | ||
3023 | |||
3024 | static void iwl3945_bg_restart(struct work_struct *data) | ||
3025 | { | ||
3026 | struct iwl_priv *priv = container_of(data, struct iwl_priv, restart); | ||
3027 | |||
3028 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | ||
3029 | return; | ||
3030 | |||
3031 | if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) { | ||
3032 | mutex_lock(&priv->mutex); | ||
3033 | priv->vif = NULL; | ||
3034 | priv->is_open = 0; | ||
3035 | mutex_unlock(&priv->mutex); | ||
3036 | iwl3945_down(priv); | ||
3037 | ieee80211_restart_hw(priv->hw); | ||
3038 | } else { | ||
3039 | iwl3945_down(priv); | ||
3040 | |||
3041 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | ||
3042 | return; | ||
3043 | |||
3044 | mutex_lock(&priv->mutex); | ||
3045 | __iwl3945_up(priv); | ||
3046 | mutex_unlock(&priv->mutex); | ||
3047 | } | ||
3048 | } | ||
3049 | |||
3050 | static void iwl3945_bg_rx_replenish(struct work_struct *data) | ||
3051 | { | ||
3052 | struct iwl_priv *priv = | ||
3053 | container_of(data, struct iwl_priv, rx_replenish); | ||
3054 | |||
3055 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | ||
3056 | return; | ||
3057 | |||
3058 | mutex_lock(&priv->mutex); | ||
3059 | iwl3945_rx_replenish(priv); | ||
3060 | mutex_unlock(&priv->mutex); | ||
3061 | } | ||
3062 | |||
3063 | void iwl3945_post_associate(struct iwl_priv *priv, struct ieee80211_vif *vif) | ||
3064 | { | ||
3065 | int rc = 0; | ||
3066 | struct ieee80211_conf *conf = NULL; | ||
3067 | |||
3068 | if (!vif || !priv->is_open) | ||
3069 | return; | ||
3070 | |||
3071 | if (vif->type == NL80211_IFTYPE_AP) { | ||
3072 | IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__); | ||
3073 | return; | ||
3074 | } | ||
3075 | |||
3076 | IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n", | ||
3077 | vif->bss_conf.aid, priv->active_rxon.bssid_addr); | ||
3078 | |||
3079 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | ||
3080 | return; | ||
3081 | |||
3082 | iwl_scan_cancel_timeout(priv, 200); | ||
3083 | |||
3084 | conf = ieee80211_get_hw_conf(priv->hw); | ||
3085 | |||
3086 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | ||
3087 | iwlcore_commit_rxon(priv); | ||
3088 | |||
3089 | memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd)); | ||
3090 | iwl_setup_rxon_timing(priv, vif); | ||
3091 | rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, | ||
3092 | sizeof(priv->rxon_timing), &priv->rxon_timing); | ||
3093 | if (rc) | ||
3094 | IWL_WARN(priv, "REPLY_RXON_TIMING failed - " | ||
3095 | "Attempting to continue.\n"); | ||
3096 | |||
3097 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | ||
3098 | |||
3099 | priv->staging_rxon.assoc_id = cpu_to_le16(vif->bss_conf.aid); | ||
3100 | |||
3101 | IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n", | ||
3102 | vif->bss_conf.aid, vif->bss_conf.beacon_int); | ||
3103 | |||
3104 | if (vif->bss_conf.use_short_preamble) | ||
3105 | priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; | ||
3106 | else | ||
3107 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; | ||
3108 | |||
3109 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | ||
3110 | if (vif->bss_conf.use_short_slot) | ||
3111 | priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK; | ||
3112 | else | ||
3113 | priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK; | ||
3114 | } | ||
3115 | |||
3116 | iwlcore_commit_rxon(priv); | ||
3117 | |||
3118 | switch (vif->type) { | ||
3119 | case NL80211_IFTYPE_STATION: | ||
3120 | iwl3945_rate_scale_init(priv->hw, IWL_AP_ID); | ||
3121 | break; | ||
3122 | case NL80211_IFTYPE_ADHOC: | ||
3123 | iwl3945_send_beacon_cmd(priv); | ||
3124 | break; | ||
3125 | default: | ||
3126 | IWL_ERR(priv, "%s Should not be called in %d mode\n", | ||
3127 | __func__, vif->type); | ||
3128 | break; | ||
3129 | } | ||
3130 | } | ||
3131 | |||
3132 | /***************************************************************************** | ||
3133 | * | ||
3134 | * mac80211 entry point functions | ||
3135 | * | ||
3136 | *****************************************************************************/ | ||
3137 | |||
3138 | #define UCODE_READY_TIMEOUT (2 * HZ) | ||
3139 | |||
3140 | static int iwl3945_mac_start(struct ieee80211_hw *hw) | ||
3141 | { | ||
3142 | struct iwl_priv *priv = hw->priv; | ||
3143 | int ret; | ||
3144 | |||
3145 | IWL_DEBUG_MAC80211(priv, "enter\n"); | ||
3146 | |||
3147 | /* we should be verifying the device is ready to be opened */ | ||
3148 | mutex_lock(&priv->mutex); | ||
3149 | |||
3150 | /* fetch ucode file from disk, alloc and copy to bus-master buffers ... | ||
3151 | * ucode filename and max sizes are card-specific. */ | ||
3152 | |||
3153 | if (!priv->ucode_code.len) { | ||
3154 | ret = iwl3945_read_ucode(priv); | ||
3155 | if (ret) { | ||
3156 | IWL_ERR(priv, "Could not read microcode: %d\n", ret); | ||
3157 | mutex_unlock(&priv->mutex); | ||
3158 | goto out_release_irq; | ||
3159 | } | ||
3160 | } | ||
3161 | |||
3162 | ret = __iwl3945_up(priv); | ||
3163 | |||
3164 | mutex_unlock(&priv->mutex); | ||
3165 | |||
3166 | if (ret) | ||
3167 | goto out_release_irq; | ||
3168 | |||
3169 | IWL_DEBUG_INFO(priv, "Start UP work.\n"); | ||
3170 | |||
3171 | /* Wait for START_ALIVE from ucode. Otherwise callbacks from | ||
3172 | * mac80211 will not be run successfully. */ | ||
3173 | ret = wait_event_interruptible_timeout(priv->wait_command_queue, | ||
3174 | test_bit(STATUS_READY, &priv->status), | ||
3175 | UCODE_READY_TIMEOUT); | ||
3176 | if (!ret) { | ||
3177 | if (!test_bit(STATUS_READY, &priv->status)) { | ||
3178 | IWL_ERR(priv, | ||
3179 | "Wait for START_ALIVE timeout after %dms.\n", | ||
3180 | jiffies_to_msecs(UCODE_READY_TIMEOUT)); | ||
3181 | ret = -ETIMEDOUT; | ||
3182 | goto out_release_irq; | ||
3183 | } | ||
3184 | } | ||
3185 | |||
3186 | /* ucode is running and will send rfkill notifications, | ||
3187 | * no need to poll the killswitch state anymore */ | ||
3188 | cancel_delayed_work(&priv->_3945.rfkill_poll); | ||
3189 | |||
3190 | iwl_led_start(priv); | ||
3191 | |||
3192 | priv->is_open = 1; | ||
3193 | IWL_DEBUG_MAC80211(priv, "leave\n"); | ||
3194 | return 0; | ||
3195 | |||
3196 | out_release_irq: | ||
3197 | priv->is_open = 0; | ||
3198 | IWL_DEBUG_MAC80211(priv, "leave - failed\n"); | ||
3199 | return ret; | ||
3200 | } | ||
3201 | |||
3202 | static void iwl3945_mac_stop(struct ieee80211_hw *hw) | ||
3203 | { | ||
3204 | struct iwl_priv *priv = hw->priv; | ||
3205 | |||
3206 | IWL_DEBUG_MAC80211(priv, "enter\n"); | ||
3207 | |||
3208 | if (!priv->is_open) { | ||
3209 | IWL_DEBUG_MAC80211(priv, "leave - skip\n"); | ||
3210 | return; | ||
3211 | } | ||
3212 | |||
3213 | priv->is_open = 0; | ||
3214 | |||
3215 | if (iwl_is_ready_rf(priv)) { | ||
3216 | /* stop mac, cancel any scan request and clear | ||
3217 | * RXON_FILTER_ASSOC_MSK BIT | ||
3218 | */ | ||
3219 | mutex_lock(&priv->mutex); | ||
3220 | iwl_scan_cancel_timeout(priv, 100); | ||
3221 | mutex_unlock(&priv->mutex); | ||
3222 | } | ||
3223 | |||
3224 | iwl3945_down(priv); | ||
3225 | |||
3226 | flush_workqueue(priv->workqueue); | ||
3227 | |||
3228 | /* start polling the killswitch state again */ | ||
3229 | queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll, | ||
3230 | round_jiffies_relative(2 * HZ)); | ||
3231 | |||
3232 | IWL_DEBUG_MAC80211(priv, "leave\n"); | ||
3233 | } | ||
3234 | |||
3235 | static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb) | ||
3236 | { | ||
3237 | struct iwl_priv *priv = hw->priv; | ||
3238 | |||
3239 | IWL_DEBUG_MAC80211(priv, "enter\n"); | ||
3240 | |||
3241 | IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len, | ||
3242 | ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate); | ||
3243 | |||
3244 | if (iwl3945_tx_skb(priv, skb)) | ||
3245 | dev_kfree_skb_any(skb); | ||
3246 | |||
3247 | IWL_DEBUG_MAC80211(priv, "leave\n"); | ||
3248 | return NETDEV_TX_OK; | ||
3249 | } | ||
3250 | |||
3251 | void iwl3945_config_ap(struct iwl_priv *priv, struct ieee80211_vif *vif) | ||
3252 | { | ||
3253 | int rc = 0; | ||
3254 | |||
3255 | if (test_bit(STATUS_EXIT_PENDING, &priv->status)) | ||
3256 | return; | ||
3257 | |||
3258 | /* The following should be done only at AP bring up */ | ||
3259 | if (!(iwl_is_associated(priv))) { | ||
3260 | |||
3261 | /* RXON - unassoc (to set timing command) */ | ||
3262 | priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK; | ||
3263 | iwlcore_commit_rxon(priv); | ||
3264 | |||
3265 | /* RXON Timing */ | ||
3266 | memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd)); | ||
3267 | iwl_setup_rxon_timing(priv, vif); | ||
3268 | rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING, | ||
3269 | sizeof(priv->rxon_timing), | ||
3270 | &priv->rxon_timing); | ||
3271 | if (rc) | ||
3272 | IWL_WARN(priv, "REPLY_RXON_TIMING failed - " | ||
3273 | "Attempting to continue.\n"); | ||
3274 | |||
3275 | priv->staging_rxon.assoc_id = 0; | ||
3276 | |||
3277 | if (vif->bss_conf.use_short_preamble) | ||
3278 | priv->staging_rxon.flags |= | ||
3279 | RXON_FLG_SHORT_PREAMBLE_MSK; | ||
3280 | else | ||
3281 | priv->staging_rxon.flags &= | ||
3282 | ~RXON_FLG_SHORT_PREAMBLE_MSK; | ||
3283 | |||
3284 | if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { | ||
3285 | if (vif->bss_conf.use_short_slot) | ||
3286 | priv->staging_rxon.flags |= | ||
3287 | RXON_FLG_SHORT_SLOT_MSK; | ||
3288 | else | ||
3289 | priv->staging_rxon.flags &= | ||
3290 | ~RXON_FLG_SHORT_SLOT_MSK; | ||
3291 | } | ||
3292 | /* restore RXON assoc */ | ||
3293 | priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; | ||
3294 | iwlcore_commit_rxon(priv); | ||
3295 | } | ||
3296 | iwl3945_send_beacon_cmd(priv); | ||
3297 | |||
3298 | /* FIXME - we need to add code here to detect a totally new | ||
3299 | * configuration, reset the AP, unassoc, rxon timing, assoc, | ||
3300 | * clear sta table, add BCAST sta... */ | ||
3301 | } | ||
3302 | |||
3303 | static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, | ||
3304 | struct ieee80211_vif *vif, | ||
3305 | struct ieee80211_sta *sta, | ||
3306 | struct ieee80211_key_conf *key) | ||
3307 | { | ||
3308 | struct iwl_priv *priv = hw->priv; | ||
3309 | int ret = 0; | ||
3310 | u8 sta_id = IWL_INVALID_STATION; | ||
3311 | u8 static_key; | ||
3312 | |||
3313 | IWL_DEBUG_MAC80211(priv, "enter\n"); | ||
3314 | |||
3315 | if (iwl3945_mod_params.sw_crypto) { | ||
3316 | IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n"); | ||
3317 | return -EOPNOTSUPP; | ||
3318 | } | ||
3319 | |||
3320 | static_key = !iwl_is_associated(priv); | ||
3321 | |||
3322 | if (!static_key) { | ||
3323 | sta_id = iwl_sta_id_or_broadcast(priv, sta); | ||
3324 | if (sta_id == IWL_INVALID_STATION) | ||
3325 | return -EINVAL; | ||
3326 | } | ||
3327 | |||
3328 | mutex_lock(&priv->mutex); | ||
3329 | iwl_scan_cancel_timeout(priv, 100); | ||
3330 | |||
3331 | switch (cmd) { | ||
3332 | case SET_KEY: | ||
3333 | if (static_key) | ||
3334 | ret = iwl3945_set_static_key(priv, key); | ||
3335 | else | ||
3336 | ret = iwl3945_set_dynamic_key(priv, key, sta_id); | ||
3337 | IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n"); | ||
3338 | break; | ||
3339 | case DISABLE_KEY: | ||
3340 | if (static_key) | ||
3341 | ret = iwl3945_remove_static_key(priv); | ||
3342 | else | ||
3343 | ret = iwl3945_clear_sta_key_info(priv, sta_id); | ||
3344 | IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n"); | ||
3345 | break; | ||
3346 | default: | ||
3347 | ret = -EINVAL; | ||
3348 | } | ||
3349 | |||
3350 | mutex_unlock(&priv->mutex); | ||
3351 | IWL_DEBUG_MAC80211(priv, "leave\n"); | ||
3352 | |||
3353 | return ret; | ||
3354 | } | ||
3355 | |||
3356 | static int iwl3945_mac_sta_add(struct ieee80211_hw *hw, | ||
3357 | struct ieee80211_vif *vif, | ||
3358 | struct ieee80211_sta *sta) | ||
3359 | { | ||
3360 | struct iwl_priv *priv = hw->priv; | ||
3361 | struct iwl3945_sta_priv *sta_priv = (void *)sta->drv_priv; | ||
3362 | int ret; | ||
3363 | bool is_ap = vif->type == NL80211_IFTYPE_STATION; | ||
3364 | u8 sta_id; | ||
3365 | |||
3366 | IWL_DEBUG_INFO(priv, "received request to add station %pM\n", | ||
3367 | sta->addr); | ||
3368 | mutex_lock(&priv->mutex); | ||
3369 | IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n", | ||
3370 | sta->addr); | ||
3371 | sta_priv->common.sta_id = IWL_INVALID_STATION; | ||
3372 | |||
3373 | |||
3374 | ret = iwl_add_station_common(priv, sta->addr, is_ap, &sta->ht_cap, | ||
3375 | &sta_id); | ||
3376 | if (ret) { | ||
3377 | IWL_ERR(priv, "Unable to add station %pM (%d)\n", | ||
3378 | sta->addr, ret); | ||
3379 | /* Should we return success if return code is EEXIST ? */ | ||
3380 | mutex_unlock(&priv->mutex); | ||
3381 | return ret; | ||
3382 | } | ||
3383 | |||
3384 | sta_priv->common.sta_id = sta_id; | ||
3385 | |||
3386 | /* Initialize rate scaling */ | ||
3387 | IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n", | ||
3388 | sta->addr); | ||
3389 | iwl3945_rs_rate_init(priv, sta, sta_id); | ||
3390 | mutex_unlock(&priv->mutex); | ||
3391 | |||
3392 | return 0; | ||
3393 | } | ||
3394 | |||
3395 | static void iwl3945_configure_filter(struct ieee80211_hw *hw, | ||
3396 | unsigned int changed_flags, | ||
3397 | unsigned int *total_flags, | ||
3398 | u64 multicast) | ||
3399 | { | ||
3400 | struct iwl_priv *priv = hw->priv; | ||
3401 | __le32 filter_or = 0, filter_nand = 0; | ||
3402 | |||
3403 | #define CHK(test, flag) do { \ | ||
3404 | if (*total_flags & (test)) \ | ||
3405 | filter_or |= (flag); \ | ||
3406 | else \ | ||
3407 | filter_nand |= (flag); \ | ||
3408 | } while (0) | ||
3409 | |||
3410 | IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n", | ||
3411 | changed_flags, *total_flags); | ||
3412 | |||
3413 | CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK); | ||
3414 | CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK); | ||
3415 | CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK); | ||
3416 | |||
3417 | #undef CHK | ||
3418 | |||
3419 | mutex_lock(&priv->mutex); | ||
3420 | |||
3421 | priv->staging_rxon.filter_flags &= ~filter_nand; | ||
3422 | priv->staging_rxon.filter_flags |= filter_or; | ||
3423 | |||
3424 | /* | ||
3425 | * Committing directly here breaks for some reason, | ||
3426 | * but we'll eventually commit the filter flags | ||
3427 | * change anyway. | ||
3428 | */ | ||
3429 | |||
3430 | mutex_unlock(&priv->mutex); | ||
3431 | |||
3432 | /* | ||
3433 | * Receiving all multicast frames is always enabled by the | ||
3434 | * default flags setup in iwl_connection_init_rx_config() | ||
3435 | * since we currently do not support programming multicast | ||
3436 | * filters into the device. | ||
3437 | */ | ||
3438 | *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS | | ||
3439 | FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL; | ||
3440 | } | ||
3441 | |||
3442 | |||
3443 | /***************************************************************************** | ||
3444 | * | ||
3445 | * sysfs attributes | ||
3446 | * | ||
3447 | *****************************************************************************/ | ||
3448 | |||
3449 | #ifdef CONFIG_IWLWIFI_DEBUG | ||
3450 | |||
3451 | /* | ||
3452 | * The following adds a new attribute to the sysfs representation | ||
3453 | * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/) | ||
3454 | * used for controlling the debug level. | ||
3455 | * | ||
3456 | * See the level definitions in iwl for details. | ||
3457 | * | ||
3458 | * The debug_level being managed using sysfs below is a per device debug | ||
3459 | * level that is used instead of the global debug level if it (the per | ||
3460 | * device debug level) is set. | ||
3461 | */ | ||
3462 | static ssize_t show_debug_level(struct device *d, | ||
3463 | struct device_attribute *attr, char *buf) | ||
3464 | { | ||
3465 | struct iwl_priv *priv = dev_get_drvdata(d); | ||
3466 | return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv)); | ||
3467 | } | ||
3468 | static ssize_t store_debug_level(struct device *d, | ||
3469 | struct device_attribute *attr, | ||
3470 | const char *buf, size_t count) | ||
3471 | { | ||
3472 | struct iwl_priv *priv = dev_get_drvdata(d); | ||
3473 | unsigned long val; | ||
3474 | int ret; | ||
3475 | |||
3476 | ret = strict_strtoul(buf, 0, &val); | ||
3477 | if (ret) | ||
3478 | IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf); | ||
3479 | else { | ||
3480 | priv->debug_level = val; | ||
3481 | if (iwl_alloc_traffic_mem(priv)) | ||
3482 | IWL_ERR(priv, | ||
3483 | "Not enough memory to generate traffic log\n"); | ||
3484 | } | ||
3485 | return strnlen(buf, count); | ||
3486 | } | ||
3487 | |||
3488 | static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO, | ||
3489 | show_debug_level, store_debug_level); | ||
3490 | |||
3491 | #endif /* CONFIG_IWLWIFI_DEBUG */ | ||
3492 | |||
3493 | static ssize_t show_temperature(struct device *d, | ||
3494 | struct device_attribute *attr, char *buf) | ||
3495 | { | ||
3496 | struct iwl_priv *priv = dev_get_drvdata(d); | ||
3497 | |||
3498 | if (!iwl_is_alive(priv)) | ||
3499 | return -EAGAIN; | ||
3500 | |||
3501 | return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv)); | ||
3502 | } | ||
3503 | |||
3504 | static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL); | ||
3505 | |||
3506 | static ssize_t show_tx_power(struct device *d, | ||
3507 | struct device_attribute *attr, char *buf) | ||
3508 | { | ||
3509 | struct iwl_priv *priv = dev_get_drvdata(d); | ||
3510 | return sprintf(buf, "%d\n", priv->tx_power_user_lmt); | ||
3511 | } | ||
3512 | |||
3513 | static ssize_t store_tx_power(struct device *d, | ||
3514 | struct device_attribute *attr, | ||
3515 | const char *buf, size_t count) | ||
3516 | { | ||
3517 | struct iwl_priv *priv = dev_get_drvdata(d); | ||
3518 | char *p = (char *)buf; | ||
3519 | u32 val; | ||
3520 | |||
3521 | val = simple_strtoul(p, &p, 10); | ||
3522 | if (p == buf) | ||
3523 | IWL_INFO(priv, ": %s is not in decimal form.\n", buf); | ||
3524 | else | ||
3525 | iwl3945_hw_reg_set_txpower(priv, val); | ||
3526 | |||
3527 | return count; | ||
3528 | } | ||
3529 | |||
3530 | static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power); | ||
3531 | |||
3532 | static ssize_t show_flags(struct device *d, | ||
3533 | struct device_attribute *attr, char *buf) | ||
3534 | { | ||
3535 | struct iwl_priv *priv = dev_get_drvdata(d); | ||
3536 | |||
3537 | return sprintf(buf, "0x%04X\n", priv->active_rxon.flags); | ||
3538 | } | ||
3539 | |||
3540 | static ssize_t store_flags(struct device *d, | ||
3541 | struct device_attribute *attr, | ||
3542 | const char *buf, size_t count) | ||
3543 | { | ||
3544 | struct iwl_priv *priv = dev_get_drvdata(d); | ||
3545 | u32 flags = simple_strtoul(buf, NULL, 0); | ||
3546 | |||
3547 | mutex_lock(&priv->mutex); | ||
3548 | if (le32_to_cpu(priv->staging_rxon.flags) != flags) { | ||
3549 | /* Cancel any currently running scans... */ | ||
3550 | if (iwl_scan_cancel_timeout(priv, 100)) | ||
3551 | IWL_WARN(priv, "Could not cancel scan.\n"); | ||
3552 | else { | ||
3553 | IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n", | ||
3554 | flags); | ||
3555 | priv->staging_rxon.flags = cpu_to_le32(flags); | ||
3556 | iwlcore_commit_rxon(priv); | ||
3557 | } | ||
3558 | } | ||
3559 | mutex_unlock(&priv->mutex); | ||
3560 | |||
3561 | return count; | ||
3562 | } | ||
3563 | |||
3564 | static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags); | ||
3565 | |||
3566 | static ssize_t show_filter_flags(struct device *d, | ||
3567 | struct device_attribute *attr, char *buf) | ||
3568 | { | ||
3569 | struct iwl_priv *priv = dev_get_drvdata(d); | ||
3570 | |||
3571 | return sprintf(buf, "0x%04X\n", | ||
3572 | le32_to_cpu(priv->active_rxon.filter_flags)); | ||
3573 | } | ||
3574 | |||
3575 | static ssize_t store_filter_flags(struct device *d, | ||
3576 | struct device_attribute *attr, | ||
3577 | const char *buf, size_t count) | ||
3578 | { | ||
3579 | struct iwl_priv *priv = dev_get_drvdata(d); | ||
3580 | u32 filter_flags = simple_strtoul(buf, NULL, 0); | ||
3581 | |||
3582 | mutex_lock(&priv->mutex); | ||
3583 | if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) { | ||
3584 | /* Cancel any currently running scans... */ | ||
3585 | if (iwl_scan_cancel_timeout(priv, 100)) | ||
3586 | IWL_WARN(priv, "Could not cancel scan.\n"); | ||
3587 | else { | ||
3588 | IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = " | ||
3589 | "0x%04X\n", filter_flags); | ||
3590 | priv->staging_rxon.filter_flags = | ||
3591 | cpu_to_le32(filter_flags); | ||
3592 | iwlcore_commit_rxon(priv); | ||
3593 | } | ||
3594 | } | ||
3595 | mutex_unlock(&priv->mutex); | ||
3596 | |||
3597 | return count; | ||
3598 | } | ||
3599 | |||
3600 | static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags, | ||
3601 | store_filter_flags); | ||
3602 | |||
3603 | static ssize_t show_measurement(struct device *d, | ||
3604 | struct device_attribute *attr, char *buf) | ||
3605 | { | ||
3606 | struct iwl_priv *priv = dev_get_drvdata(d); | ||
3607 | struct iwl_spectrum_notification measure_report; | ||
3608 | u32 size = sizeof(measure_report), len = 0, ofs = 0; | ||
3609 | u8 *data = (u8 *)&measure_report; | ||
3610 | unsigned long flags; | ||
3611 | |||
3612 | spin_lock_irqsave(&priv->lock, flags); | ||
3613 | if (!(priv->measurement_status & MEASUREMENT_READY)) { | ||
3614 | spin_unlock_irqrestore(&priv->lock, flags); | ||
3615 | return 0; | ||
3616 | } | ||
3617 | memcpy(&measure_report, &priv->measure_report, size); | ||
3618 | priv->measurement_status = 0; | ||
3619 | spin_unlock_irqrestore(&priv->lock, flags); | ||
3620 | |||
3621 | while (size && (PAGE_SIZE - len)) { | ||
3622 | hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len, | ||
3623 | PAGE_SIZE - len, 1); | ||
3624 | len = strlen(buf); | ||
3625 | if (PAGE_SIZE - len) | ||
3626 | buf[len++] = '\n'; | ||
3627 | |||
3628 | ofs += 16; | ||
3629 | size -= min(size, 16U); | ||
3630 | } | ||
3631 | |||
3632 | return len; | ||
3633 | } | ||
3634 | |||
3635 | static ssize_t store_measurement(struct device *d, | ||
3636 | struct device_attribute *attr, | ||
3637 | const char *buf, size_t count) | ||
3638 | { | ||
3639 | struct iwl_priv *priv = dev_get_drvdata(d); | ||
3640 | struct ieee80211_measurement_params params = { | ||
3641 | .channel = le16_to_cpu(priv->active_rxon.channel), | ||
3642 | .start_time = cpu_to_le64(priv->_3945.last_tsf), | ||
3643 | .duration = cpu_to_le16(1), | ||
3644 | }; | ||
3645 | u8 type = IWL_MEASURE_BASIC; | ||
3646 | u8 buffer[32]; | ||
3647 | u8 channel; | ||
3648 | |||
3649 | if (count) { | ||
3650 | char *p = buffer; | ||
3651 | strncpy(buffer, buf, min(sizeof(buffer), count)); | ||
3652 | channel = simple_strtoul(p, NULL, 0); | ||
3653 | if (channel) | ||
3654 | params.channel = channel; | ||
3655 | |||
3656 | p = buffer; | ||
3657 | while (*p && *p != ' ') | ||
3658 | p++; | ||
3659 | if (*p) | ||
3660 | type = simple_strtoul(p + 1, NULL, 0); | ||
3661 | } | ||
3662 | |||
3663 | IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on " | ||
3664 | "channel %d (for '%s')\n", type, params.channel, buf); | ||
3665 | iwl3945_get_measurement(priv, ¶ms, type); | ||
3666 | |||
3667 | return count; | ||
3668 | } | ||
3669 | |||
3670 | static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR, | ||
3671 | show_measurement, store_measurement); | ||
3672 | |||
3673 | static ssize_t store_retry_rate(struct device *d, | ||
3674 | struct device_attribute *attr, | ||
3675 | const char *buf, size_t count) | ||
3676 | { | ||
3677 | struct iwl_priv *priv = dev_get_drvdata(d); | ||
3678 | |||
3679 | priv->retry_rate = simple_strtoul(buf, NULL, 0); | ||
3680 | if (priv->retry_rate <= 0) | ||
3681 | priv->retry_rate = 1; | ||
3682 | |||
3683 | return count; | ||
3684 | } | ||
3685 | |||
3686 | static ssize_t show_retry_rate(struct device *d, | ||
3687 | struct device_attribute *attr, char *buf) | ||
3688 | { | ||
3689 | struct iwl_priv *priv = dev_get_drvdata(d); | ||
3690 | return sprintf(buf, "%d", priv->retry_rate); | ||
3691 | } | ||
3692 | |||
3693 | static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate, | ||
3694 | store_retry_rate); | ||
3695 | |||
3696 | |||
3697 | static ssize_t show_channels(struct device *d, | ||
3698 | struct device_attribute *attr, char *buf) | ||
3699 | { | ||
3700 | /* all this shit doesn't belong into sysfs anyway */ | ||
3701 | return 0; | ||
3702 | } | ||
3703 | |||
3704 | static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL); | ||
3705 | |||
3706 | static ssize_t show_antenna(struct device *d, | ||
3707 | struct device_attribute *attr, char *buf) | ||
3708 | { | ||
3709 | struct iwl_priv *priv = dev_get_drvdata(d); | ||
3710 | |||
3711 | if (!iwl_is_alive(priv)) | ||
3712 | return -EAGAIN; | ||
3713 | |||
3714 | return sprintf(buf, "%d\n", iwl3945_mod_params.antenna); | ||
3715 | } | ||
3716 | |||
3717 | static ssize_t store_antenna(struct device *d, | ||
3718 | struct device_attribute *attr, | ||
3719 | const char *buf, size_t count) | ||
3720 | { | ||
3721 | struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d); | ||
3722 | int ant; | ||
3723 | |||
3724 | if (count == 0) | ||
3725 | return 0; | ||
3726 | |||
3727 | if (sscanf(buf, "%1i", &ant) != 1) { | ||
3728 | IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n"); | ||
3729 | return count; | ||
3730 | } | ||
3731 | |||
3732 | if ((ant >= 0) && (ant <= 2)) { | ||
3733 | IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant); | ||
3734 | iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant; | ||
3735 | } else | ||
3736 | IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant); | ||
3737 | |||
3738 | |||
3739 | return count; | ||
3740 | } | ||
3741 | |||
3742 | static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna); | ||
3743 | |||
3744 | static ssize_t show_status(struct device *d, | ||
3745 | struct device_attribute *attr, char *buf) | ||
3746 | { | ||
3747 | struct iwl_priv *priv = dev_get_drvdata(d); | ||
3748 | if (!iwl_is_alive(priv)) | ||
3749 | return -EAGAIN; | ||
3750 | return sprintf(buf, "0x%08x\n", (int)priv->status); | ||
3751 | } | ||
3752 | |||
3753 | static DEVICE_ATTR(status, S_IRUGO, show_status, NULL); | ||
3754 | |||
3755 | static ssize_t dump_error_log(struct device *d, | ||
3756 | struct device_attribute *attr, | ||
3757 | const char *buf, size_t count) | ||
3758 | { | ||
3759 | struct iwl_priv *priv = dev_get_drvdata(d); | ||
3760 | char *p = (char *)buf; | ||
3761 | |||
3762 | if (p[0] == '1') | ||
3763 | iwl3945_dump_nic_error_log(priv); | ||
3764 | |||
3765 | return strnlen(buf, count); | ||
3766 | } | ||
3767 | |||
3768 | static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log); | ||
3769 | |||
3770 | /***************************************************************************** | ||
3771 | * | ||
3772 | * driver setup and tear down | ||
3773 | * | ||
3774 | *****************************************************************************/ | ||
3775 | |||
3776 | static void iwl3945_setup_deferred_work(struct iwl_priv *priv) | ||
3777 | { | ||
3778 | priv->workqueue = create_singlethread_workqueue(DRV_NAME); | ||
3779 | |||
3780 | init_waitqueue_head(&priv->wait_command_queue); | ||
3781 | |||
3782 | INIT_WORK(&priv->restart, iwl3945_bg_restart); | ||
3783 | INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish); | ||
3784 | INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update); | ||
3785 | INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start); | ||
3786 | INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start); | ||
3787 | INIT_DELAYED_WORK(&priv->_3945.rfkill_poll, iwl3945_rfkill_poll); | ||
3788 | INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed); | ||
3789 | INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan); | ||
3790 | INIT_WORK(&priv->start_internal_scan, iwl_bg_start_internal_scan); | ||
3791 | INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check); | ||
3792 | |||
3793 | iwl3945_hw_setup_deferred_work(priv); | ||
3794 | |||
3795 | if (priv->cfg->ops->lib->recover_from_tx_stall) { | ||
3796 | init_timer(&priv->monitor_recover); | ||
3797 | priv->monitor_recover.data = (unsigned long)priv; | ||
3798 | priv->monitor_recover.function = | ||
3799 | priv->cfg->ops->lib->recover_from_tx_stall; | ||
3800 | } | ||
3801 | |||
3802 | tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long)) | ||
3803 | iwl3945_irq_tasklet, (unsigned long)priv); | ||
3804 | } | ||
3805 | |||
3806 | static void iwl3945_cancel_deferred_work(struct iwl_priv *priv) | ||
3807 | { | ||
3808 | iwl3945_hw_cancel_deferred_work(priv); | ||
3809 | |||
3810 | cancel_delayed_work_sync(&priv->init_alive_start); | ||
3811 | cancel_delayed_work(&priv->scan_check); | ||
3812 | cancel_delayed_work(&priv->alive_start); | ||
3813 | cancel_work_sync(&priv->start_internal_scan); | ||
3814 | cancel_work_sync(&priv->beacon_update); | ||
3815 | if (priv->cfg->ops->lib->recover_from_tx_stall) | ||
3816 | del_timer_sync(&priv->monitor_recover); | ||
3817 | } | ||
3818 | |||
3819 | static struct attribute *iwl3945_sysfs_entries[] = { | ||
3820 | &dev_attr_antenna.attr, | ||
3821 | &dev_attr_channels.attr, | ||
3822 | &dev_attr_dump_errors.attr, | ||
3823 | &dev_attr_flags.attr, | ||
3824 | &dev_attr_filter_flags.attr, | ||
3825 | &dev_attr_measurement.attr, | ||
3826 | &dev_attr_retry_rate.attr, | ||
3827 | &dev_attr_status.attr, | ||
3828 | &dev_attr_temperature.attr, | ||
3829 | &dev_attr_tx_power.attr, | ||
3830 | #ifdef CONFIG_IWLWIFI_DEBUG | ||
3831 | &dev_attr_debug_level.attr, | ||
3832 | #endif | ||
3833 | NULL | ||
3834 | }; | ||
3835 | |||
3836 | static struct attribute_group iwl3945_attribute_group = { | ||
3837 | .name = NULL, /* put in device directory */ | ||
3838 | .attrs = iwl3945_sysfs_entries, | ||
3839 | }; | ||
3840 | |||
3841 | static struct ieee80211_ops iwl3945_hw_ops = { | ||
3842 | .tx = iwl3945_mac_tx, | ||
3843 | .start = iwl3945_mac_start, | ||
3844 | .stop = iwl3945_mac_stop, | ||
3845 | .add_interface = iwl_mac_add_interface, | ||
3846 | .remove_interface = iwl_mac_remove_interface, | ||
3847 | .config = iwl_mac_config, | ||
3848 | .configure_filter = iwl3945_configure_filter, | ||
3849 | .set_key = iwl3945_mac_set_key, | ||
3850 | .conf_tx = iwl_mac_conf_tx, | ||
3851 | .reset_tsf = iwl_mac_reset_tsf, | ||
3852 | .bss_info_changed = iwl_bss_info_changed, | ||
3853 | .hw_scan = iwl_mac_hw_scan, | ||
3854 | .sta_add = iwl3945_mac_sta_add, | ||
3855 | .sta_remove = iwl_mac_sta_remove, | ||
3856 | }; | ||
3857 | |||
3858 | static int iwl3945_init_drv(struct iwl_priv *priv) | ||
3859 | { | ||
3860 | int ret; | ||
3861 | struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom; | ||
3862 | |||
3863 | priv->retry_rate = 1; | ||
3864 | priv->ibss_beacon = NULL; | ||
3865 | |||
3866 | spin_lock_init(&priv->sta_lock); | ||
3867 | spin_lock_init(&priv->hcmd_lock); | ||
3868 | |||
3869 | INIT_LIST_HEAD(&priv->free_frames); | ||
3870 | |||
3871 | mutex_init(&priv->mutex); | ||
3872 | mutex_init(&priv->sync_cmd_mutex); | ||
3873 | |||
3874 | priv->ieee_channels = NULL; | ||
3875 | priv->ieee_rates = NULL; | ||
3876 | priv->band = IEEE80211_BAND_2GHZ; | ||
3877 | |||
3878 | priv->iw_mode = NL80211_IFTYPE_STATION; | ||
3879 | priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF; | ||
3880 | |||
3881 | priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER; | ||
3882 | |||
3883 | if (eeprom->version < EEPROM_3945_EEPROM_VERSION) { | ||
3884 | IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n", | ||
3885 | eeprom->version); | ||
3886 | ret = -EINVAL; | ||
3887 | goto err; | ||
3888 | } | ||
3889 | ret = iwl_init_channel_map(priv); | ||
3890 | if (ret) { | ||
3891 | IWL_ERR(priv, "initializing regulatory failed: %d\n", ret); | ||
3892 | goto err; | ||
3893 | } | ||
3894 | |||
3895 | /* Set up txpower settings in driver for all channels */ | ||
3896 | if (iwl3945_txpower_set_from_eeprom(priv)) { | ||
3897 | ret = -EIO; | ||
3898 | goto err_free_channel_map; | ||
3899 | } | ||
3900 | |||
3901 | ret = iwlcore_init_geos(priv); | ||
3902 | if (ret) { | ||
3903 | IWL_ERR(priv, "initializing geos failed: %d\n", ret); | ||
3904 | goto err_free_channel_map; | ||
3905 | } | ||
3906 | iwl3945_init_hw_rates(priv, priv->ieee_rates); | ||
3907 | |||
3908 | return 0; | ||
3909 | |||
3910 | err_free_channel_map: | ||
3911 | iwl_free_channel_map(priv); | ||
3912 | err: | ||
3913 | return ret; | ||
3914 | } | ||
3915 | |||
3916 | #define IWL3945_MAX_PROBE_REQUEST 200 | ||
3917 | |||
3918 | static int iwl3945_setup_mac(struct iwl_priv *priv) | ||
3919 | { | ||
3920 | int ret; | ||
3921 | struct ieee80211_hw *hw = priv->hw; | ||
3922 | |||
3923 | hw->rate_control_algorithm = "iwl-3945-rs"; | ||
3924 | hw->sta_data_size = sizeof(struct iwl3945_sta_priv); | ||
3925 | hw->vif_data_size = sizeof(struct iwl_vif_priv); | ||
3926 | |||
3927 | /* Tell mac80211 our characteristics */ | ||
3928 | hw->flags = IEEE80211_HW_SIGNAL_DBM | | ||
3929 | IEEE80211_HW_SPECTRUM_MGMT; | ||
3930 | |||
3931 | if (!priv->cfg->broken_powersave) | ||
3932 | hw->flags |= IEEE80211_HW_SUPPORTS_PS | | ||
3933 | IEEE80211_HW_SUPPORTS_DYNAMIC_PS; | ||
3934 | |||
3935 | hw->wiphy->interface_modes = | ||
3936 | BIT(NL80211_IFTYPE_STATION) | | ||
3937 | BIT(NL80211_IFTYPE_ADHOC); | ||
3938 | |||
3939 | hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY | | ||
3940 | WIPHY_FLAG_DISABLE_BEACON_HINTS; | ||
3941 | |||
3942 | hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945; | ||
3943 | /* we create the 802.11 header and a zero-length SSID element */ | ||
3944 | hw->wiphy->max_scan_ie_len = IWL3945_MAX_PROBE_REQUEST - 24 - 2; | ||
3945 | |||
3946 | /* Default value; 4 EDCA QOS priorities */ | ||
3947 | hw->queues = 4; | ||
3948 | |||
3949 | if (priv->bands[IEEE80211_BAND_2GHZ].n_channels) | ||
3950 | priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = | ||
3951 | &priv->bands[IEEE80211_BAND_2GHZ]; | ||
3952 | |||
3953 | if (priv->bands[IEEE80211_BAND_5GHZ].n_channels) | ||
3954 | priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = | ||
3955 | &priv->bands[IEEE80211_BAND_5GHZ]; | ||
3956 | |||
3957 | ret = ieee80211_register_hw(priv->hw); | ||
3958 | if (ret) { | ||
3959 | IWL_ERR(priv, "Failed to register hw (error %d)\n", ret); | ||
3960 | return ret; | ||
3961 | } | ||
3962 | priv->mac80211_registered = 1; | ||
3963 | |||
3964 | return 0; | ||
3965 | } | ||
3966 | |||
3967 | static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | ||
3968 | { | ||
3969 | int err = 0; | ||
3970 | struct iwl_priv *priv; | ||
3971 | struct ieee80211_hw *hw; | ||
3972 | struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data); | ||
3973 | struct iwl3945_eeprom *eeprom; | ||
3974 | unsigned long flags; | ||
3975 | |||
3976 | /*********************** | ||
3977 | * 1. Allocating HW data | ||
3978 | * ********************/ | ||
3979 | |||
3980 | /* mac80211 allocates memory for this device instance, including | ||
3981 | * space for this driver's private structure */ | ||
3982 | hw = iwl_alloc_all(cfg, &iwl3945_hw_ops); | ||
3983 | if (hw == NULL) { | ||
3984 | pr_err("Can not allocate network device\n"); | ||
3985 | err = -ENOMEM; | ||
3986 | goto out; | ||
3987 | } | ||
3988 | priv = hw->priv; | ||
3989 | SET_IEEE80211_DEV(hw, &pdev->dev); | ||
3990 | |||
3991 | /* | ||
3992 | * Disabling hardware scan means that mac80211 will perform scans | ||
3993 | * "the hard way", rather than using device's scan. | ||
3994 | */ | ||
3995 | if (iwl3945_mod_params.disable_hw_scan) { | ||
3996 | IWL_DEBUG_INFO(priv, "Disabling hw_scan\n"); | ||
3997 | iwl3945_hw_ops.hw_scan = NULL; | ||
3998 | } | ||
3999 | |||
4000 | |||
4001 | IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n"); | ||
4002 | priv->cfg = cfg; | ||
4003 | priv->pci_dev = pdev; | ||
4004 | priv->inta_mask = CSR_INI_SET_MASK; | ||
4005 | |||
4006 | if (iwl_alloc_traffic_mem(priv)) | ||
4007 | IWL_ERR(priv, "Not enough memory to generate traffic log\n"); | ||
4008 | |||
4009 | /*************************** | ||
4010 | * 2. Initializing PCI bus | ||
4011 | * *************************/ | ||
4012 | if (pci_enable_device(pdev)) { | ||
4013 | err = -ENODEV; | ||
4014 | goto out_ieee80211_free_hw; | ||
4015 | } | ||
4016 | |||
4017 | pci_set_master(pdev); | ||
4018 | |||
4019 | err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); | ||
4020 | if (!err) | ||
4021 | err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); | ||
4022 | if (err) { | ||
4023 | IWL_WARN(priv, "No suitable DMA available.\n"); | ||
4024 | goto out_pci_disable_device; | ||
4025 | } | ||
4026 | |||
4027 | pci_set_drvdata(pdev, priv); | ||
4028 | err = pci_request_regions(pdev, DRV_NAME); | ||
4029 | if (err) | ||
4030 | goto out_pci_disable_device; | ||
4031 | |||
4032 | /*********************** | ||
4033 | * 3. Read REV Register | ||
4034 | * ********************/ | ||
4035 | priv->hw_base = pci_iomap(pdev, 0, 0); | ||
4036 | if (!priv->hw_base) { | ||
4037 | err = -ENODEV; | ||
4038 | goto out_pci_release_regions; | ||
4039 | } | ||
4040 | |||
4041 | IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n", | ||
4042 | (unsigned long long) pci_resource_len(pdev, 0)); | ||
4043 | IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base); | ||
4044 | |||
4045 | /* We disable the RETRY_TIMEOUT register (0x41) to keep | ||
4046 | * PCI Tx retries from interfering with C3 CPU state */ | ||
4047 | pci_write_config_byte(pdev, 0x41, 0x00); | ||
4048 | |||
4049 | /* these spin locks will be used in apm_ops.init and EEPROM access | ||
4050 | * we should init now | ||
4051 | */ | ||
4052 | spin_lock_init(&priv->reg_lock); | ||
4053 | spin_lock_init(&priv->lock); | ||
4054 | |||
4055 | /* | ||
4056 | * stop and reset the on-board processor just in case it is in a | ||
4057 | * strange state ... like being left stranded by a primary kernel | ||
4058 | * and this is now the kdump kernel trying to start up | ||
4059 | */ | ||
4060 | iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); | ||
4061 | |||
4062 | /*********************** | ||
4063 | * 4. Read EEPROM | ||
4064 | * ********************/ | ||
4065 | |||
4066 | /* Read the EEPROM */ | ||
4067 | err = iwl_eeprom_init(priv); | ||
4068 | if (err) { | ||
4069 | IWL_ERR(priv, "Unable to init EEPROM\n"); | ||
4070 | goto out_iounmap; | ||
4071 | } | ||
4072 | /* MAC Address location in EEPROM same for 3945/4965 */ | ||
4073 | eeprom = (struct iwl3945_eeprom *)priv->eeprom; | ||
4074 | IWL_DEBUG_INFO(priv, "MAC address: %pM\n", eeprom->mac_address); | ||
4075 | SET_IEEE80211_PERM_ADDR(priv->hw, eeprom->mac_address); | ||
4076 | |||
4077 | /*********************** | ||
4078 | * 5. Setup HW Constants | ||
4079 | * ********************/ | ||
4080 | /* Device-specific setup */ | ||
4081 | if (iwl3945_hw_set_hw_params(priv)) { | ||
4082 | IWL_ERR(priv, "failed to set hw settings\n"); | ||
4083 | goto out_eeprom_free; | ||
4084 | } | ||
4085 | |||
4086 | /*********************** | ||
4087 | * 6. Setup priv | ||
4088 | * ********************/ | ||
4089 | |||
4090 | err = iwl3945_init_drv(priv); | ||
4091 | if (err) { | ||
4092 | IWL_ERR(priv, "initializing driver failed\n"); | ||
4093 | goto out_unset_hw_params; | ||
4094 | } | ||
4095 | |||
4096 | IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n", | ||
4097 | priv->cfg->name); | ||
4098 | |||
4099 | /*********************** | ||
4100 | * 7. Setup Services | ||
4101 | * ********************/ | ||
4102 | |||
4103 | spin_lock_irqsave(&priv->lock, flags); | ||
4104 | iwl_disable_interrupts(priv); | ||
4105 | spin_unlock_irqrestore(&priv->lock, flags); | ||
4106 | |||
4107 | pci_enable_msi(priv->pci_dev); | ||
4108 | |||
4109 | err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr, | ||
4110 | IRQF_SHARED, DRV_NAME, priv); | ||
4111 | if (err) { | ||
4112 | IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq); | ||
4113 | goto out_disable_msi; | ||
4114 | } | ||
4115 | |||
4116 | err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group); | ||
4117 | if (err) { | ||
4118 | IWL_ERR(priv, "failed to create sysfs device attributes\n"); | ||
4119 | goto out_release_irq; | ||
4120 | } | ||
4121 | |||
4122 | iwl_set_rxon_channel(priv, | ||
4123 | &priv->bands[IEEE80211_BAND_2GHZ].channels[5]); | ||
4124 | iwl3945_setup_deferred_work(priv); | ||
4125 | iwl3945_setup_rx_handlers(priv); | ||
4126 | iwl_power_initialize(priv); | ||
4127 | |||
4128 | /********************************* | ||
4129 | * 8. Setup and Register mac80211 | ||
4130 | * *******************************/ | ||
4131 | |||
4132 | iwl_enable_interrupts(priv); | ||
4133 | |||
4134 | err = iwl3945_setup_mac(priv); | ||
4135 | if (err) | ||
4136 | goto out_remove_sysfs; | ||
4137 | |||
4138 | err = iwl_dbgfs_register(priv, DRV_NAME); | ||
4139 | if (err) | ||
4140 | IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err); | ||
4141 | |||
4142 | /* Start monitoring the killswitch */ | ||
4143 | queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll, | ||
4144 | 2 * HZ); | ||
4145 | |||
4146 | return 0; | ||
4147 | |||
4148 | out_remove_sysfs: | ||
4149 | destroy_workqueue(priv->workqueue); | ||
4150 | priv->workqueue = NULL; | ||
4151 | sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group); | ||
4152 | out_release_irq: | ||
4153 | free_irq(priv->pci_dev->irq, priv); | ||
4154 | out_disable_msi: | ||
4155 | pci_disable_msi(priv->pci_dev); | ||
4156 | iwlcore_free_geos(priv); | ||
4157 | iwl_free_channel_map(priv); | ||
4158 | out_unset_hw_params: | ||
4159 | iwl3945_unset_hw_params(priv); | ||
4160 | out_eeprom_free: | ||
4161 | iwl_eeprom_free(priv); | ||
4162 | out_iounmap: | ||
4163 | pci_iounmap(pdev, priv->hw_base); | ||
4164 | out_pci_release_regions: | ||
4165 | pci_release_regions(pdev); | ||
4166 | out_pci_disable_device: | ||
4167 | pci_set_drvdata(pdev, NULL); | ||
4168 | pci_disable_device(pdev); | ||
4169 | out_ieee80211_free_hw: | ||
4170 | iwl_free_traffic_mem(priv); | ||
4171 | ieee80211_free_hw(priv->hw); | ||
4172 | out: | ||
4173 | return err; | ||
4174 | } | ||
4175 | |||
4176 | static void __devexit iwl3945_pci_remove(struct pci_dev *pdev) | ||
4177 | { | ||
4178 | struct iwl_priv *priv = pci_get_drvdata(pdev); | ||
4179 | unsigned long flags; | ||
4180 | |||
4181 | if (!priv) | ||
4182 | return; | ||
4183 | |||
4184 | IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n"); | ||
4185 | |||
4186 | iwl_dbgfs_unregister(priv); | ||
4187 | |||
4188 | set_bit(STATUS_EXIT_PENDING, &priv->status); | ||
4189 | |||
4190 | if (priv->mac80211_registered) { | ||
4191 | ieee80211_unregister_hw(priv->hw); | ||
4192 | priv->mac80211_registered = 0; | ||
4193 | } else { | ||
4194 | iwl3945_down(priv); | ||
4195 | } | ||
4196 | |||
4197 | /* | ||
4198 | * Make sure device is reset to low power before unloading driver. | ||
4199 | * This may be redundant with iwl_down(), but there are paths to | ||
4200 | * run iwl_down() without calling apm_ops.stop(), and there are | ||
4201 | * paths to avoid running iwl_down() at all before leaving driver. | ||
4202 | * This (inexpensive) call *makes sure* device is reset. | ||
4203 | */ | ||
4204 | priv->cfg->ops->lib->apm_ops.stop(priv); | ||
4205 | |||
4206 | /* make sure we flush any pending irq or | ||
4207 | * tasklet for the driver | ||
4208 | */ | ||
4209 | spin_lock_irqsave(&priv->lock, flags); | ||
4210 | iwl_disable_interrupts(priv); | ||
4211 | spin_unlock_irqrestore(&priv->lock, flags); | ||
4212 | |||
4213 | iwl_synchronize_irq(priv); | ||
4214 | |||
4215 | sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group); | ||
4216 | |||
4217 | cancel_delayed_work_sync(&priv->_3945.rfkill_poll); | ||
4218 | |||
4219 | iwl3945_dealloc_ucode_pci(priv); | ||
4220 | |||
4221 | if (priv->rxq.bd) | ||
4222 | iwl3945_rx_queue_free(priv, &priv->rxq); | ||
4223 | iwl3945_hw_txq_ctx_free(priv); | ||
4224 | |||
4225 | iwl3945_unset_hw_params(priv); | ||
4226 | |||
4227 | /*netif_stop_queue(dev); */ | ||
4228 | flush_workqueue(priv->workqueue); | ||
4229 | |||
4230 | /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes | ||
4231 | * priv->workqueue... so we can't take down the workqueue | ||
4232 | * until now... */ | ||
4233 | destroy_workqueue(priv->workqueue); | ||
4234 | priv->workqueue = NULL; | ||
4235 | iwl_free_traffic_mem(priv); | ||
4236 | |||
4237 | free_irq(pdev->irq, priv); | ||
4238 | pci_disable_msi(pdev); | ||
4239 | |||
4240 | pci_iounmap(pdev, priv->hw_base); | ||
4241 | pci_release_regions(pdev); | ||
4242 | pci_disable_device(pdev); | ||
4243 | pci_set_drvdata(pdev, NULL); | ||
4244 | |||
4245 | iwl_free_channel_map(priv); | ||
4246 | iwlcore_free_geos(priv); | ||
4247 | kfree(priv->scan_cmd); | ||
4248 | if (priv->ibss_beacon) | ||
4249 | dev_kfree_skb(priv->ibss_beacon); | ||
4250 | |||
4251 | ieee80211_free_hw(priv->hw); | ||
4252 | } | ||
4253 | |||
4254 | |||
4255 | /***************************************************************************** | ||
4256 | * | ||
4257 | * driver and module entry point | ||
4258 | * | ||
4259 | *****************************************************************************/ | ||
4260 | |||
4261 | static struct pci_driver iwl3945_driver = { | ||
4262 | .name = DRV_NAME, | ||
4263 | .id_table = iwl3945_hw_card_ids, | ||
4264 | .probe = iwl3945_pci_probe, | ||
4265 | .remove = __devexit_p(iwl3945_pci_remove), | ||
4266 | #ifdef CONFIG_PM | ||
4267 | .suspend = iwl_pci_suspend, | ||
4268 | .resume = iwl_pci_resume, | ||
4269 | #endif | ||
4270 | }; | ||
4271 | |||
4272 | static int __init iwl3945_init(void) | ||
4273 | { | ||
4274 | |||
4275 | int ret; | ||
4276 | pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n"); | ||
4277 | pr_info(DRV_COPYRIGHT "\n"); | ||
4278 | |||
4279 | ret = iwl3945_rate_control_register(); | ||
4280 | if (ret) { | ||
4281 | pr_err("Unable to register rate control algorithm: %d\n", ret); | ||
4282 | return ret; | ||
4283 | } | ||
4284 | |||
4285 | ret = pci_register_driver(&iwl3945_driver); | ||
4286 | if (ret) { | ||
4287 | pr_err("Unable to initialize PCI module\n"); | ||
4288 | goto error_register; | ||
4289 | } | ||
4290 | |||
4291 | return ret; | ||
4292 | |||
4293 | error_register: | ||
4294 | iwl3945_rate_control_unregister(); | ||
4295 | return ret; | ||
4296 | } | ||
4297 | |||
4298 | static void __exit iwl3945_exit(void) | ||
4299 | { | ||
4300 | pci_unregister_driver(&iwl3945_driver); | ||
4301 | iwl3945_rate_control_unregister(); | ||
4302 | } | ||
4303 | |||
4304 | MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX)); | ||
4305 | |||
4306 | module_param_named(antenna, iwl3945_mod_params.antenna, int, S_IRUGO); | ||
4307 | MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])"); | ||
4308 | module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, S_IRUGO); | ||
4309 | MODULE_PARM_DESC(swcrypto, | ||
4310 | "using software crypto (default 1 [software])\n"); | ||
4311 | #ifdef CONFIG_IWLWIFI_DEBUG | ||
4312 | module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR); | ||
4313 | MODULE_PARM_DESC(debug, "debug output mask"); | ||
4314 | #endif | ||
4315 | module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, | ||
4316 | int, S_IRUGO); | ||
4317 | MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)"); | ||
4318 | module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, S_IRUGO); | ||
4319 | MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error"); | ||
4320 | |||
4321 | module_exit(iwl3945_exit); | ||
4322 | module_init(iwl3945_init); | ||