diff options
Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-eeprom.h')
-rw-r--r-- | drivers/net/wireless/iwlwifi/iwl-eeprom.h | 318 |
1 files changed, 55 insertions, 263 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-eeprom.h b/drivers/net/wireless/iwlwifi/iwl-eeprom.h index a4772aff51fe..c960c6fa009b 100644 --- a/drivers/net/wireless/iwlwifi/iwl-eeprom.h +++ b/drivers/net/wireless/iwlwifi/iwl-eeprom.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * GPL LICENSE SUMMARY | 6 | * GPL LICENSE SUMMARY |
7 | * | 7 | * |
8 | * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved. | 8 | * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved. |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify | 10 | * This program is free software; you can redistribute it and/or modify |
11 | * it under the terms of version 2 of the GNU General Public License as | 11 | * it under the terms of version 2 of the GNU General Public License as |
@@ -30,7 +30,7 @@ | |||
30 | * | 30 | * |
31 | * BSD LICENSE | 31 | * BSD LICENSE |
32 | * | 32 | * |
33 | * Copyright(c) 2005 - 2010 Intel Corporation. All rights reserved. | 33 | * Copyright(c) 2005 - 2011 Intel Corporation. All rights reserved. |
34 | * All rights reserved. | 34 | * All rights reserved. |
35 | * | 35 | * |
36 | * Redistribution and use in source and binary forms, with or without | 36 | * Redistribution and use in source and binary forms, with or without |
@@ -110,8 +110,13 @@ enum { | |||
110 | }; | 110 | }; |
111 | 111 | ||
112 | /* SKU Capabilities */ | 112 | /* SKU Capabilities */ |
113 | #define EEPROM_SKU_CAP_SW_RF_KILL_ENABLE (1 << 0) | 113 | /* 5000 and up */ |
114 | #define EEPROM_SKU_CAP_HW_RF_KILL_ENABLE (1 << 1) | 114 | #define EEPROM_SKU_CAP_BAND_POS (4) |
115 | #define EEPROM_SKU_CAP_BAND_SELECTION \ | ||
116 | (3 << EEPROM_SKU_CAP_BAND_POS) | ||
117 | #define EEPROM_SKU_CAP_11N_ENABLE (1 << 6) | ||
118 | #define EEPROM_SKU_CAP_AMT_ENABLE (1 << 7) | ||
119 | #define EEPROM_SKU_CAP_IPAN_ENABLE (1 << 8) | ||
115 | 120 | ||
116 | /* *regulatory* channel data format in eeprom, one for each channel. | 121 | /* *regulatory* channel data format in eeprom, one for each channel. |
117 | * There are separate entries for HT40 (40 MHz) vs. normal (20 MHz) channels. */ | 122 | * There are separate entries for HT40 (40 MHz) vs. normal (20 MHz) channels. */ |
@@ -120,6 +125,17 @@ struct iwl_eeprom_channel { | |||
120 | s8 max_power_avg; /* max power (dBm) on this chnl, limit 31 */ | 125 | s8 max_power_avg; /* max power (dBm) on this chnl, limit 31 */ |
121 | } __packed; | 126 | } __packed; |
122 | 127 | ||
128 | enum iwl_eeprom_enhanced_txpwr_flags { | ||
129 | IWL_EEPROM_ENH_TXP_FL_VALID = BIT(0), | ||
130 | IWL_EEPROM_ENH_TXP_FL_BAND_52G = BIT(1), | ||
131 | IWL_EEPROM_ENH_TXP_FL_OFDM = BIT(2), | ||
132 | IWL_EEPROM_ENH_TXP_FL_40MHZ = BIT(3), | ||
133 | IWL_EEPROM_ENH_TXP_FL_HT_AP = BIT(4), | ||
134 | IWL_EEPROM_ENH_TXP_FL_RES1 = BIT(5), | ||
135 | IWL_EEPROM_ENH_TXP_FL_RES2 = BIT(6), | ||
136 | IWL_EEPROM_ENH_TXP_FL_COMMON_TYPE = BIT(7), | ||
137 | }; | ||
138 | |||
123 | /** | 139 | /** |
124 | * iwl_eeprom_enhanced_txpwr structure | 140 | * iwl_eeprom_enhanced_txpwr structure |
125 | * This structure presents the enhanced regulatory tx power limit layout | 141 | * This structure presents the enhanced regulatory tx power limit layout |
@@ -127,47 +143,27 @@ struct iwl_eeprom_channel { | |||
127 | * Enhanced regulatory tx power portion of eeprom image can be broken down | 143 | * Enhanced regulatory tx power portion of eeprom image can be broken down |
128 | * into individual structures; each one is 8 bytes in size and contain the | 144 | * into individual structures; each one is 8 bytes in size and contain the |
129 | * following information | 145 | * following information |
130 | * @common: (desc + channel) not used by driver, should _NOT_ be "zero" | 146 | * @flags: entry flags |
147 | * @channel: channel number | ||
131 | * @chain_a_max_pwr: chain a max power in 1/2 dBm | 148 | * @chain_a_max_pwr: chain a max power in 1/2 dBm |
132 | * @chain_b_max_pwr: chain b max power in 1/2 dBm | 149 | * @chain_b_max_pwr: chain b max power in 1/2 dBm |
133 | * @chain_c_max_pwr: chain c max power in 1/2 dBm | 150 | * @chain_c_max_pwr: chain c max power in 1/2 dBm |
134 | * @reserved: not used, should be "zero" | 151 | * @delta_20_in_40: 20-in-40 deltas (hi/lo) |
135 | * @mimo2_max_pwr: mimo2 max power in 1/2 dBm | 152 | * @mimo2_max_pwr: mimo2 max power in 1/2 dBm |
136 | * @mimo3_max_pwr: mimo3 max power in 1/2 dBm | 153 | * @mimo3_max_pwr: mimo3 max power in 1/2 dBm |
137 | * | 154 | * |
138 | */ | 155 | */ |
139 | struct iwl_eeprom_enhanced_txpwr { | 156 | struct iwl_eeprom_enhanced_txpwr { |
140 | __le16 common; | 157 | u8 flags; |
158 | u8 channel; | ||
141 | s8 chain_a_max; | 159 | s8 chain_a_max; |
142 | s8 chain_b_max; | 160 | s8 chain_b_max; |
143 | s8 chain_c_max; | 161 | s8 chain_c_max; |
144 | s8 reserved; | 162 | u8 delta_20_in_40; |
145 | s8 mimo2_max; | 163 | s8 mimo2_max; |
146 | s8 mimo3_max; | 164 | s8 mimo3_max; |
147 | } __packed; | 165 | } __packed; |
148 | 166 | ||
149 | /* 3945 Specific */ | ||
150 | #define EEPROM_3945_EEPROM_VERSION (0x2f) | ||
151 | |||
152 | /* 4965 has two radio transmitters (and 3 radio receivers) */ | ||
153 | #define EEPROM_TX_POWER_TX_CHAINS (2) | ||
154 | |||
155 | /* 4965 has room for up to 8 sets of txpower calibration data */ | ||
156 | #define EEPROM_TX_POWER_BANDS (8) | ||
157 | |||
158 | /* 4965 factory calibration measures txpower gain settings for | ||
159 | * each of 3 target output levels */ | ||
160 | #define EEPROM_TX_POWER_MEASUREMENTS (3) | ||
161 | |||
162 | /* 4965 Specific */ | ||
163 | /* 4965 driver does not work with txpower calibration version < 5 */ | ||
164 | #define EEPROM_4965_TX_POWER_VERSION (5) | ||
165 | #define EEPROM_4965_EEPROM_VERSION (0x2f) | ||
166 | #define EEPROM_4965_CALIB_VERSION_OFFSET (2*0xB6) /* 2 bytes */ | ||
167 | #define EEPROM_4965_CALIB_TXPOWER_OFFSET (2*0xE8) /* 48 bytes */ | ||
168 | #define EEPROM_4965_BOARD_REVISION (2*0x4F) /* 2 bytes */ | ||
169 | #define EEPROM_4965_BOARD_PBA (2*0x56+1) /* 9 bytes */ | ||
170 | |||
171 | /* 5000 Specific */ | 167 | /* 5000 Specific */ |
172 | #define EEPROM_5000_TX_POWER_VERSION (4) | 168 | #define EEPROM_5000_TX_POWER_VERSION (4) |
173 | #define EEPROM_5000_EEPROM_VERSION (0x11A) | 169 | #define EEPROM_5000_EEPROM_VERSION (0x11A) |
@@ -186,6 +182,8 @@ struct iwl_eeprom_enhanced_txpwr { | |||
186 | #define EEPROM_LINK_CALIBRATION (2*0x67) | 182 | #define EEPROM_LINK_CALIBRATION (2*0x67) |
187 | #define EEPROM_LINK_PROCESS_ADJST (2*0x68) | 183 | #define EEPROM_LINK_PROCESS_ADJST (2*0x68) |
188 | #define EEPROM_LINK_OTHERS (2*0x69) | 184 | #define EEPROM_LINK_OTHERS (2*0x69) |
185 | #define EEPROM_LINK_TXP_LIMIT (2*0x6a) | ||
186 | #define EEPROM_LINK_TXP_LIMIT_SIZE (2*0x6b) | ||
189 | 187 | ||
190 | /* agn regulatory - indirect access */ | 188 | /* agn regulatory - indirect access */ |
191 | #define EEPROM_REG_BAND_1_CHANNELS ((0x08)\ | 189 | #define EEPROM_REG_BAND_1_CHANNELS ((0x08)\ |
@@ -207,59 +205,6 @@ struct iwl_eeprom_enhanced_txpwr { | |||
207 | #define EEPROM_6000_REG_BAND_24_HT40_CHANNELS ((0x80)\ | 205 | #define EEPROM_6000_REG_BAND_24_HT40_CHANNELS ((0x80)\ |
208 | | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 14 bytes */ | 206 | | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 14 bytes */ |
209 | 207 | ||
210 | /* 6000 and up regulatory tx power - indirect access */ | ||
211 | /* max. elements per section */ | ||
212 | #define EEPROM_MAX_TXPOWER_SECTION_ELEMENTS (8) | ||
213 | #define EEPROM_TXPOWER_COMMON_HT40_INDEX (2) | ||
214 | |||
215 | /** | ||
216 | * Partition the enhanced tx power portion of eeprom image into | ||
217 | * 10 sections based on band, modulation, frequency and channel | ||
218 | * | ||
219 | * Section 1: all CCK channels | ||
220 | * Section 2: all 2.4 GHz OFDM (Legacy, HT and HT40 ) channels | ||
221 | * Section 3: all 5.2 GHz OFDM (Legacy, HT and HT40) channels | ||
222 | * Section 4: 2.4 GHz 20MHz channels: 1, 2, 10, 11. Both Legacy and HT | ||
223 | * Section 5: 2.4 GHz 40MHz channels: 1, 2, 6, 7, 9, (_above_) | ||
224 | * Section 6: 5.2 GHz 20MHz channels: 36, 64, 100, both Legacy and HT | ||
225 | * Section 7: 5.2 GHz 40MHz channels: 36, 60, 100 (_above_) | ||
226 | * Section 8: 2.4 GHz channel 13, Both Legacy and HT | ||
227 | * Section 9: 2.4 GHz channel 140, Both Legacy and HT | ||
228 | * Section 10: 2.4 GHz 40MHz channels: 132, 44 (_above_) | ||
229 | */ | ||
230 | /* 2.4 GHz band: CCK */ | ||
231 | #define EEPROM_LB_CCK_20_COMMON ((0xA8)\ | ||
232 | | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 8 bytes */ | ||
233 | /* 2.4 GHz band: 20MHz-Legacy, 20MHz-HT, 40MHz-HT */ | ||
234 | #define EEPROM_LB_OFDM_COMMON ((0xB0)\ | ||
235 | | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 24 bytes */ | ||
236 | /* 5.2 GHz band: 20MHz-Legacy, 20MHz-HT, 40MHz-HT */ | ||
237 | #define EEPROM_HB_OFDM_COMMON ((0xC8)\ | ||
238 | | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 24 bytes */ | ||
239 | /* 2.4GHz band channels: | ||
240 | * 1Legacy, 1HT, 2Legacy, 2HT, 10Legacy, 10HT, 11Legacy, 11HT */ | ||
241 | #define EEPROM_LB_OFDM_20_BAND ((0xE0)\ | ||
242 | | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 64 bytes */ | ||
243 | /* 2.4 GHz band HT40 channels: (1,+1) (2,+1) (6,+1) (7,+1) (9,+1) */ | ||
244 | #define EEPROM_LB_OFDM_HT40_BAND ((0x120)\ | ||
245 | | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 40 bytes */ | ||
246 | /* 5.2GHz band channels: 36Legacy, 36HT, 64Legacy, 64HT, 100Legacy, 100HT */ | ||
247 | #define EEPROM_HB_OFDM_20_BAND ((0x148)\ | ||
248 | | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 48 bytes */ | ||
249 | /* 5.2 GHz band HT40 channels: (36,+1) (60,+1) (100,+1) */ | ||
250 | #define EEPROM_HB_OFDM_HT40_BAND ((0x178)\ | ||
251 | | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 24 bytes */ | ||
252 | /* 2.4 GHz band, channnel 13: Legacy, HT */ | ||
253 | #define EEPROM_LB_OFDM_20_CHANNEL_13 ((0x190)\ | ||
254 | | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 16 bytes */ | ||
255 | /* 5.2 GHz band, channnel 140: Legacy, HT */ | ||
256 | #define EEPROM_HB_OFDM_20_CHANNEL_140 ((0x1A0)\ | ||
257 | | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 16 bytes */ | ||
258 | /* 5.2 GHz band, HT40 channnels (132,+1) (44,+1) */ | ||
259 | #define EEPROM_HB_OFDM_HT40_BAND_1 ((0x1B0)\ | ||
260 | | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 16 bytes */ | ||
261 | |||
262 | |||
263 | /* 5050 Specific */ | 208 | /* 5050 Specific */ |
264 | #define EEPROM_5050_TX_POWER_VERSION (4) | 209 | #define EEPROM_5050_TX_POWER_VERSION (4) |
265 | #define EEPROM_5050_EEPROM_VERSION (0x21E) | 210 | #define EEPROM_5050_EEPROM_VERSION (0x21E) |
@@ -270,19 +215,32 @@ struct iwl_eeprom_enhanced_txpwr { | |||
270 | 215 | ||
271 | /* 6x00 Specific */ | 216 | /* 6x00 Specific */ |
272 | #define EEPROM_6000_TX_POWER_VERSION (4) | 217 | #define EEPROM_6000_TX_POWER_VERSION (4) |
273 | #define EEPROM_6000_EEPROM_VERSION (0x434) | 218 | #define EEPROM_6000_EEPROM_VERSION (0x423) |
274 | 219 | ||
275 | /* 6x50 Specific */ | 220 | /* 6x50 Specific */ |
276 | #define EEPROM_6050_TX_POWER_VERSION (4) | 221 | #define EEPROM_6050_TX_POWER_VERSION (4) |
277 | #define EEPROM_6050_EEPROM_VERSION (0x532) | 222 | #define EEPROM_6050_EEPROM_VERSION (0x532) |
278 | 223 | ||
279 | /* 6x50g2 Specific */ | 224 | /* 6150 Specific */ |
280 | #define EEPROM_6050G2_TX_POWER_VERSION (6) | 225 | #define EEPROM_6150_TX_POWER_VERSION (6) |
281 | #define EEPROM_6050G2_EEPROM_VERSION (0x553) | 226 | #define EEPROM_6150_EEPROM_VERSION (0x553) |
227 | |||
228 | /* 6x05 Specific */ | ||
229 | #define EEPROM_6005_TX_POWER_VERSION (6) | ||
230 | #define EEPROM_6005_EEPROM_VERSION (0x709) | ||
231 | |||
232 | /* 6x30 Specific */ | ||
233 | #define EEPROM_6030_TX_POWER_VERSION (6) | ||
234 | #define EEPROM_6030_EEPROM_VERSION (0x709) | ||
235 | |||
236 | /* 2x00 Specific */ | ||
237 | #define EEPROM_2000_TX_POWER_VERSION (6) | ||
238 | #define EEPROM_2000_EEPROM_VERSION (0x805) | ||
239 | |||
240 | /* 6x35 Specific */ | ||
241 | #define EEPROM_6035_TX_POWER_VERSION (6) | ||
242 | #define EEPROM_6035_EEPROM_VERSION (0x753) | ||
282 | 243 | ||
283 | /* 6x00g2 Specific */ | ||
284 | #define EEPROM_6000G2_TX_POWER_VERSION (6) | ||
285 | #define EEPROM_6000G2_EEPROM_VERSION (0x709) | ||
286 | 244 | ||
287 | /* OTP */ | 245 | /* OTP */ |
288 | /* lower blocks contain EEPROM image and calibration data */ | 246 | /* lower blocks contain EEPROM image and calibration data */ |
@@ -293,94 +251,11 @@ struct iwl_eeprom_enhanced_txpwr { | |||
293 | #define OTP_MAX_LL_ITEMS_1000 (3) /* OTP blocks for 1000 */ | 251 | #define OTP_MAX_LL_ITEMS_1000 (3) /* OTP blocks for 1000 */ |
294 | #define OTP_MAX_LL_ITEMS_6x00 (4) /* OTP blocks for 6x00 */ | 252 | #define OTP_MAX_LL_ITEMS_6x00 (4) /* OTP blocks for 6x00 */ |
295 | #define OTP_MAX_LL_ITEMS_6x50 (7) /* OTP blocks for 6x50 */ | 253 | #define OTP_MAX_LL_ITEMS_6x50 (7) /* OTP blocks for 6x50 */ |
254 | #define OTP_MAX_LL_ITEMS_2x00 (4) /* OTP blocks for 2x00 */ | ||
296 | 255 | ||
297 | /* 2.4 GHz */ | 256 | /* 2.4 GHz */ |
298 | extern const u8 iwl_eeprom_band_1[14]; | 257 | extern const u8 iwl_eeprom_band_1[14]; |
299 | 258 | ||
300 | /* | ||
301 | * factory calibration data for one txpower level, on one channel, | ||
302 | * measured on one of the 2 tx chains (radio transmitter and associated | ||
303 | * antenna). EEPROM contains: | ||
304 | * | ||
305 | * 1) Temperature (degrees Celsius) of device when measurement was made. | ||
306 | * | ||
307 | * 2) Gain table index used to achieve the target measurement power. | ||
308 | * This refers to the "well-known" gain tables (see iwl-4965-hw.h). | ||
309 | * | ||
310 | * 3) Actual measured output power, in half-dBm ("34" = 17 dBm). | ||
311 | * | ||
312 | * 4) RF power amplifier detector level measurement (not used). | ||
313 | */ | ||
314 | struct iwl_eeprom_calib_measure { | ||
315 | u8 temperature; /* Device temperature (Celsius) */ | ||
316 | u8 gain_idx; /* Index into gain table */ | ||
317 | u8 actual_pow; /* Measured RF output power, half-dBm */ | ||
318 | s8 pa_det; /* Power amp detector level (not used) */ | ||
319 | } __packed; | ||
320 | |||
321 | |||
322 | /* | ||
323 | * measurement set for one channel. EEPROM contains: | ||
324 | * | ||
325 | * 1) Channel number measured | ||
326 | * | ||
327 | * 2) Measurements for each of 3 power levels for each of 2 radio transmitters | ||
328 | * (a.k.a. "tx chains") (6 measurements altogether) | ||
329 | */ | ||
330 | struct iwl_eeprom_calib_ch_info { | ||
331 | u8 ch_num; | ||
332 | struct iwl_eeprom_calib_measure | ||
333 | measurements[EEPROM_TX_POWER_TX_CHAINS] | ||
334 | [EEPROM_TX_POWER_MEASUREMENTS]; | ||
335 | } __packed; | ||
336 | |||
337 | /* | ||
338 | * txpower subband info. | ||
339 | * | ||
340 | * For each frequency subband, EEPROM contains the following: | ||
341 | * | ||
342 | * 1) First and last channels within range of the subband. "0" values | ||
343 | * indicate that this sample set is not being used. | ||
344 | * | ||
345 | * 2) Sample measurement sets for 2 channels close to the range endpoints. | ||
346 | */ | ||
347 | struct iwl_eeprom_calib_subband_info { | ||
348 | u8 ch_from; /* channel number of lowest channel in subband */ | ||
349 | u8 ch_to; /* channel number of highest channel in subband */ | ||
350 | struct iwl_eeprom_calib_ch_info ch1; | ||
351 | struct iwl_eeprom_calib_ch_info ch2; | ||
352 | } __packed; | ||
353 | |||
354 | |||
355 | /* | ||
356 | * txpower calibration info. EEPROM contains: | ||
357 | * | ||
358 | * 1) Factory-measured saturation power levels (maximum levels at which | ||
359 | * tx power amplifier can output a signal without too much distortion). | ||
360 | * There is one level for 2.4 GHz band and one for 5 GHz band. These | ||
361 | * values apply to all channels within each of the bands. | ||
362 | * | ||
363 | * 2) Factory-measured power supply voltage level. This is assumed to be | ||
364 | * constant (i.e. same value applies to all channels/bands) while the | ||
365 | * factory measurements are being made. | ||
366 | * | ||
367 | * 3) Up to 8 sets of factory-measured txpower calibration values. | ||
368 | * These are for different frequency ranges, since txpower gain | ||
369 | * characteristics of the analog radio circuitry vary with frequency. | ||
370 | * | ||
371 | * Not all sets need to be filled with data; | ||
372 | * struct iwl_eeprom_calib_subband_info contains range of channels | ||
373 | * (0 if unused) for each set of data. | ||
374 | */ | ||
375 | struct iwl_eeprom_calib_info { | ||
376 | u8 saturation_power24; /* half-dBm (e.g. "34" = 17 dBm) */ | ||
377 | u8 saturation_power52; /* half-dBm */ | ||
378 | __le16 voltage; /* signed */ | ||
379 | struct iwl_eeprom_calib_subband_info | ||
380 | band_info[EEPROM_TX_POWER_BANDS]; | ||
381 | } __packed; | ||
382 | |||
383 | |||
384 | #define ADDRESS_MSK 0x0000FFFF | 259 | #define ADDRESS_MSK 0x0000FFFF |
385 | #define INDIRECT_TYPE_MSK 0x000F0000 | 260 | #define INDIRECT_TYPE_MSK 0x000F0000 |
386 | #define INDIRECT_HOST 0x00010000 | 261 | #define INDIRECT_HOST 0x00010000 |
@@ -389,6 +264,8 @@ struct iwl_eeprom_calib_info { | |||
389 | #define INDIRECT_CALIBRATION 0x00040000 | 264 | #define INDIRECT_CALIBRATION 0x00040000 |
390 | #define INDIRECT_PROCESS_ADJST 0x00050000 | 265 | #define INDIRECT_PROCESS_ADJST 0x00050000 |
391 | #define INDIRECT_OTHERS 0x00060000 | 266 | #define INDIRECT_OTHERS 0x00060000 |
267 | #define INDIRECT_TXP_LIMIT 0x00070000 | ||
268 | #define INDIRECT_TXP_LIMIT_SIZE 0x00080000 | ||
392 | #define INDIRECT_ADDRESS 0x00100000 | 269 | #define INDIRECT_ADDRESS 0x00100000 |
393 | 270 | ||
394 | /* General */ | 271 | /* General */ |
@@ -397,11 +274,10 @@ struct iwl_eeprom_calib_info { | |||
397 | #define EEPROM_BOARD_REVISION (2*0x35) /* 2 bytes */ | 274 | #define EEPROM_BOARD_REVISION (2*0x35) /* 2 bytes */ |
398 | #define EEPROM_BOARD_PBA_NUMBER (2*0x3B+1) /* 9 bytes */ | 275 | #define EEPROM_BOARD_PBA_NUMBER (2*0x3B+1) /* 9 bytes */ |
399 | #define EEPROM_VERSION (2*0x44) /* 2 bytes */ | 276 | #define EEPROM_VERSION (2*0x44) /* 2 bytes */ |
400 | #define EEPROM_SKU_CAP (2*0x45) /* 1 bytes */ | 277 | #define EEPROM_SKU_CAP (2*0x45) /* 2 bytes */ |
401 | #define EEPROM_OEM_MODE (2*0x46) /* 2 bytes */ | 278 | #define EEPROM_OEM_MODE (2*0x46) /* 2 bytes */ |
402 | #define EEPROM_WOWLAN_MODE (2*0x47) /* 2 bytes */ | 279 | #define EEPROM_WOWLAN_MODE (2*0x47) /* 2 bytes */ |
403 | #define EEPROM_RADIO_CONFIG (2*0x48) /* 2 bytes */ | 280 | #define EEPROM_RADIO_CONFIG (2*0x48) /* 2 bytes */ |
404 | #define EEPROM_3945_M_VERSION (2*0x4A) /* 1 bytes */ | ||
405 | #define EEPROM_NUM_MAC_ADDRESS (2*0x4C) /* 2 bytes */ | 281 | #define EEPROM_NUM_MAC_ADDRESS (2*0x4C) /* 2 bytes */ |
406 | 282 | ||
407 | /* The following masks are to be applied on EEPROM_RADIO_CONFIG */ | 283 | /* The following masks are to be applied on EEPROM_RADIO_CONFIG */ |
@@ -412,108 +288,24 @@ struct iwl_eeprom_calib_info { | |||
412 | #define EEPROM_RF_CFG_TX_ANT_MSK(x) ((x >> 8) & 0xF) /* bits 8-11 */ | 288 | #define EEPROM_RF_CFG_TX_ANT_MSK(x) ((x >> 8) & 0xF) /* bits 8-11 */ |
413 | #define EEPROM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF) /* bits 12-15 */ | 289 | #define EEPROM_RF_CFG_RX_ANT_MSK(x) ((x >> 12) & 0xF) /* bits 12-15 */ |
414 | 290 | ||
415 | #define EEPROM_3945_RF_CFG_TYPE_MAX 0x0 | ||
416 | #define EEPROM_4965_RF_CFG_TYPE_MAX 0x1 | ||
417 | |||
418 | /* Radio Config for 5000 and up */ | ||
419 | #define EEPROM_RF_CONFIG_TYPE_R3x3 0x0 | ||
420 | #define EEPROM_RF_CONFIG_TYPE_R2x2 0x1 | ||
421 | #define EEPROM_RF_CONFIG_TYPE_R1x2 0x2 | ||
422 | #define EEPROM_RF_CONFIG_TYPE_MAX 0x3 | 291 | #define EEPROM_RF_CONFIG_TYPE_MAX 0x3 |
423 | 292 | ||
424 | /* | ||
425 | * Per-channel regulatory data. | ||
426 | * | ||
427 | * Each channel that *might* be supported by iwl has a fixed location | ||
428 | * in EEPROM containing EEPROM_CHANNEL_* usage flags (LSB) and max regulatory | ||
429 | * txpower (MSB). | ||
430 | * | ||
431 | * Entries immediately below are for 20 MHz channel width. HT40 (40 MHz) | ||
432 | * channels (only for 4965, not supported by 3945) appear later in the EEPROM. | ||
433 | * | ||
434 | * 2.4 GHz channels 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14 | ||
435 | */ | ||
436 | #define EEPROM_REGULATORY_SKU_ID (2*0x60) /* 4 bytes */ | ||
437 | #define EEPROM_REGULATORY_BAND_1 (2*0x62) /* 2 bytes */ | ||
438 | #define EEPROM_REGULATORY_BAND_1_CHANNELS (2*0x63) /* 28 bytes */ | ||
439 | |||
440 | /* | ||
441 | * 4.9 GHz channels 183, 184, 185, 187, 188, 189, 192, 196, | ||
442 | * 5.0 GHz channels 7, 8, 11, 12, 16 | ||
443 | * (4915-5080MHz) (none of these is ever supported) | ||
444 | */ | ||
445 | #define EEPROM_REGULATORY_BAND_2 (2*0x71) /* 2 bytes */ | ||
446 | #define EEPROM_REGULATORY_BAND_2_CHANNELS (2*0x72) /* 26 bytes */ | ||
447 | |||
448 | /* | ||
449 | * 5.2 GHz channels 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64 | ||
450 | * (5170-5320MHz) | ||
451 | */ | ||
452 | #define EEPROM_REGULATORY_BAND_3 (2*0x7F) /* 2 bytes */ | ||
453 | #define EEPROM_REGULATORY_BAND_3_CHANNELS (2*0x80) /* 24 bytes */ | ||
454 | |||
455 | /* | ||
456 | * 5.5 GHz channels 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140 | ||
457 | * (5500-5700MHz) | ||
458 | */ | ||
459 | #define EEPROM_REGULATORY_BAND_4 (2*0x8C) /* 2 bytes */ | ||
460 | #define EEPROM_REGULATORY_BAND_4_CHANNELS (2*0x8D) /* 22 bytes */ | ||
461 | |||
462 | /* | ||
463 | * 5.7 GHz channels 145, 149, 153, 157, 161, 165 | ||
464 | * (5725-5825MHz) | ||
465 | */ | ||
466 | #define EEPROM_REGULATORY_BAND_5 (2*0x98) /* 2 bytes */ | ||
467 | #define EEPROM_REGULATORY_BAND_5_CHANNELS (2*0x99) /* 12 bytes */ | ||
468 | |||
469 | /* | ||
470 | * 2.4 GHz HT40 channels 1 (5), 2 (6), 3 (7), 4 (8), 5 (9), 6 (10), 7 (11) | ||
471 | * | ||
472 | * The channel listed is the center of the lower 20 MHz half of the channel. | ||
473 | * The overall center frequency is actually 2 channels (10 MHz) above that, | ||
474 | * and the upper half of each HT40 channel is centered 4 channels (20 MHz) away | ||
475 | * from the lower half; e.g. the upper half of HT40 channel 1 is channel 5, | ||
476 | * and the overall HT40 channel width centers on channel 3. | ||
477 | * | ||
478 | * NOTE: The RXON command uses 20 MHz channel numbers to specify the | ||
479 | * control channel to which to tune. RXON also specifies whether the | ||
480 | * control channel is the upper or lower half of a HT40 channel. | ||
481 | * | ||
482 | * NOTE: 4965 does not support HT40 channels on 2.4 GHz. | ||
483 | */ | ||
484 | #define EEPROM_4965_REGULATORY_BAND_24_HT40_CHANNELS (2*0xA0) /* 14 bytes */ | ||
485 | |||
486 | /* | ||
487 | * 5.2 GHz HT40 channels 36 (40), 44 (48), 52 (56), 60 (64), | ||
488 | * 100 (104), 108 (112), 116 (120), 124 (128), 132 (136), 149 (153), 157 (161) | ||
489 | */ | ||
490 | #define EEPROM_4965_REGULATORY_BAND_52_HT40_CHANNELS (2*0xA8) /* 22 bytes */ | ||
491 | |||
492 | #define EEPROM_REGULATORY_BAND_NO_HT40 (0) | 293 | #define EEPROM_REGULATORY_BAND_NO_HT40 (0) |
493 | 294 | ||
494 | struct iwl_eeprom_ops { | 295 | struct iwl_eeprom_ops { |
495 | const u32 regulatory_bands[7]; | 296 | const u32 regulatory_bands[7]; |
496 | int (*verify_signature) (struct iwl_priv *priv); | ||
497 | int (*acquire_semaphore) (struct iwl_priv *priv); | ||
498 | void (*release_semaphore) (struct iwl_priv *priv); | ||
499 | u16 (*calib_version) (struct iwl_priv *priv); | ||
500 | const u8* (*query_addr) (const struct iwl_priv *priv, size_t offset); | 297 | const u8* (*query_addr) (const struct iwl_priv *priv, size_t offset); |
501 | void (*update_enhanced_txpower) (struct iwl_priv *priv); | 298 | void (*update_enhanced_txpower) (struct iwl_priv *priv); |
502 | }; | 299 | }; |
503 | 300 | ||
504 | 301 | ||
505 | void iwl_eeprom_get_mac(const struct iwl_priv *priv, u8 *mac); | 302 | int iwl_eeprom_init(struct iwl_priv *priv, u32 hw_rev); |
506 | int iwl_eeprom_init(struct iwl_priv *priv); | ||
507 | void iwl_eeprom_free(struct iwl_priv *priv); | 303 | void iwl_eeprom_free(struct iwl_priv *priv); |
508 | int iwl_eeprom_check_version(struct iwl_priv *priv); | 304 | int iwl_eeprom_check_version(struct iwl_priv *priv); |
305 | int iwl_eeprom_check_sku(struct iwl_priv *priv); | ||
509 | const u8 *iwl_eeprom_query_addr(const struct iwl_priv *priv, size_t offset); | 306 | const u8 *iwl_eeprom_query_addr(const struct iwl_priv *priv, size_t offset); |
510 | u16 iwl_eeprom_query16(const struct iwl_priv *priv, size_t offset); | ||
511 | |||
512 | int iwlcore_eeprom_verify_signature(struct iwl_priv *priv); | 307 | int iwlcore_eeprom_verify_signature(struct iwl_priv *priv); |
513 | int iwlcore_eeprom_acquire_semaphore(struct iwl_priv *priv); | 308 | u16 iwl_eeprom_query16(const struct iwl_priv *priv, size_t offset); |
514 | void iwlcore_eeprom_release_semaphore(struct iwl_priv *priv); | ||
515 | const u8 *iwlcore_eeprom_query_addr(const struct iwl_priv *priv, size_t offset); | ||
516 | void iwlcore_eeprom_enhanced_txpower(struct iwl_priv *priv); | ||
517 | int iwl_init_channel_map(struct iwl_priv *priv); | 309 | int iwl_init_channel_map(struct iwl_priv *priv); |
518 | void iwl_free_channel_map(struct iwl_priv *priv); | 310 | void iwl_free_channel_map(struct iwl_priv *priv); |
519 | const struct iwl_channel_info *iwl_get_channel_info( | 311 | const struct iwl_channel_info *iwl_get_channel_info( |