aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/wireless/iwlwifi/iwl-agn.c
diff options
context:
space:
mode:
Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-agn.c')
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn.c1223
1 files changed, 363 insertions, 860 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.c b/drivers/net/wireless/iwlwifi/iwl-agn.c
index 321b18b59135..3ecc3198d9bf 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn.c
@@ -1,6 +1,6 @@
1/****************************************************************************** 1/******************************************************************************
2 * 2 *
3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved. 3 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
4 * 4 *
5 * Portions of this file are derived from the ipw3945 project, as well 5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files. 6 * as portions of the ieee80211 subsystem header files.
@@ -59,7 +59,6 @@
59#include "iwl-sta.h" 59#include "iwl-sta.h"
60#include "iwl-agn-calib.h" 60#include "iwl-agn-calib.h"
61#include "iwl-agn.h" 61#include "iwl-agn.h"
62#include "iwl-agn-led.h"
63 62
64 63
65/****************************************************************************** 64/******************************************************************************
@@ -103,70 +102,6 @@ void iwl_update_chain_flags(struct iwl_priv *priv)
103 } 102 }
104} 103}
105 104
106static void iwl_clear_free_frames(struct iwl_priv *priv)
107{
108 struct list_head *element;
109
110 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
111 priv->frames_count);
112
113 while (!list_empty(&priv->free_frames)) {
114 element = priv->free_frames.next;
115 list_del(element);
116 kfree(list_entry(element, struct iwl_frame, list));
117 priv->frames_count--;
118 }
119
120 if (priv->frames_count) {
121 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
122 priv->frames_count);
123 priv->frames_count = 0;
124 }
125}
126
127static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
128{
129 struct iwl_frame *frame;
130 struct list_head *element;
131 if (list_empty(&priv->free_frames)) {
132 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
133 if (!frame) {
134 IWL_ERR(priv, "Could not allocate frame!\n");
135 return NULL;
136 }
137
138 priv->frames_count++;
139 return frame;
140 }
141
142 element = priv->free_frames.next;
143 list_del(element);
144 return list_entry(element, struct iwl_frame, list);
145}
146
147static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
148{
149 memset(frame, 0, sizeof(*frame));
150 list_add(&frame->list, &priv->free_frames);
151}
152
153static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
154 struct ieee80211_hdr *hdr,
155 int left)
156{
157 lockdep_assert_held(&priv->mutex);
158
159 if (!priv->beacon_skb)
160 return 0;
161
162 if (priv->beacon_skb->len > left)
163 return 0;
164
165 memcpy(hdr, priv->beacon_skb->data, priv->beacon_skb->len);
166
167 return priv->beacon_skb->len;
168}
169
170/* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */ 105/* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
171static void iwl_set_beacon_tim(struct iwl_priv *priv, 106static void iwl_set_beacon_tim(struct iwl_priv *priv,
172 struct iwl_tx_beacon_cmd *tx_beacon_cmd, 107 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
@@ -194,13 +129,18 @@ static void iwl_set_beacon_tim(struct iwl_priv *priv,
194 IWL_WARN(priv, "Unable to find TIM Element in beacon\n"); 129 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
195} 130}
196 131
197static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv, 132int iwlagn_send_beacon_cmd(struct iwl_priv *priv)
198 struct iwl_frame *frame)
199{ 133{
200 struct iwl_tx_beacon_cmd *tx_beacon_cmd; 134 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
135 struct iwl_host_cmd cmd = {
136 .id = REPLY_TX_BEACON,
137 .flags = CMD_SIZE_HUGE,
138 };
201 u32 frame_size; 139 u32 frame_size;
202 u32 rate_flags; 140 u32 rate_flags;
203 u32 rate; 141 u32 rate;
142 int err;
143
204 /* 144 /*
205 * We have to set up the TX command, the TX Beacon command, and the 145 * We have to set up the TX command, the TX Beacon command, and the
206 * beacon contents. 146 * beacon contents.
@@ -213,17 +153,19 @@ static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
213 return 0; 153 return 0;
214 } 154 }
215 155
216 /* Initialize memory */ 156 if (WARN_ON(!priv->beacon_skb))
217 tx_beacon_cmd = &frame->u.beacon; 157 return -EINVAL;
218 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd)); 158
159 /* Allocate beacon memory */
160 tx_beacon_cmd = kzalloc(sizeof(*tx_beacon_cmd) + priv->beacon_skb->len,
161 GFP_KERNEL);
162 if (!tx_beacon_cmd)
163 return -ENOMEM;
164
165 frame_size = priv->beacon_skb->len;
219 166
220 /* Set up TX beacon contents */ 167 /* Set up TX beacon contents */
221 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame, 168 memcpy(tx_beacon_cmd->frame, priv->beacon_skb->data, frame_size);
222 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
223 if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
224 return 0;
225 if (!frame_size)
226 return 0;
227 169
228 /* Set up TX command fields */ 170 /* Set up TX command fields */
229 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size); 171 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
@@ -246,35 +188,16 @@ static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
246 tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate, 188 tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
247 rate_flags); 189 rate_flags);
248 190
249 return sizeof(*tx_beacon_cmd) + frame_size; 191 /* Submit command */
250} 192 cmd.len = sizeof(*tx_beacon_cmd) + frame_size;
193 cmd.data = tx_beacon_cmd;
251 194
252int iwlagn_send_beacon_cmd(struct iwl_priv *priv) 195 err = iwl_send_cmd_sync(priv, &cmd);
253{
254 struct iwl_frame *frame;
255 unsigned int frame_size;
256 int rc;
257
258 frame = iwl_get_free_frame(priv);
259 if (!frame) {
260 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
261 "command.\n");
262 return -ENOMEM;
263 }
264 196
265 frame_size = iwl_hw_get_beacon_cmd(priv, frame); 197 /* Free temporary storage */
266 if (!frame_size) { 198 kfree(tx_beacon_cmd);
267 IWL_ERR(priv, "Error configuring the beacon command\n");
268 iwl_free_frame(priv, frame);
269 return -EINVAL;
270 }
271
272 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
273 &frame->u.cmd[0]);
274 199
275 iwl_free_frame(priv, frame); 200 return err;
276
277 return rc;
278} 201}
279 202
280static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx) 203static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
@@ -395,7 +318,9 @@ int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
395 return -EINVAL; 318 return -EINVAL;
396 } 319 }
397 320
398 BUG_ON(addr & ~DMA_BIT_MASK(36)); 321 if (WARN_ON(addr & ~DMA_BIT_MASK(36)))
322 return -EINVAL;
323
399 if (unlikely(addr & ~IWL_TX_DMA_MASK)) 324 if (unlikely(addr & ~IWL_TX_DMA_MASK))
400 IWL_ERR(priv, "Unaligned address = %llx\n", 325 IWL_ERR(priv, "Unaligned address = %llx\n",
401 (unsigned long long)addr); 326 (unsigned long long)addr);
@@ -409,7 +334,7 @@ int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
409 * Tell nic where to find circular buffer of Tx Frame Descriptors for 334 * Tell nic where to find circular buffer of Tx Frame Descriptors for
410 * given Tx queue, and enable the DMA channel used for that queue. 335 * given Tx queue, and enable the DMA channel used for that queue.
411 * 336 *
412 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA 337 * supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
413 * channels supported in hardware. 338 * channels supported in hardware.
414 */ 339 */
415int iwl_hw_tx_queue_init(struct iwl_priv *priv, 340int iwl_hw_tx_queue_init(struct iwl_priv *priv,
@@ -483,12 +408,14 @@ static void iwl_bg_bt_full_concurrency(struct work_struct *work)
483 container_of(work, struct iwl_priv, bt_full_concurrency); 408 container_of(work, struct iwl_priv, bt_full_concurrency);
484 struct iwl_rxon_context *ctx; 409 struct iwl_rxon_context *ctx;
485 410
411 mutex_lock(&priv->mutex);
412
486 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) 413 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
487 return; 414 goto out;
488 415
489 /* dont send host command if rf-kill is on */ 416 /* dont send host command if rf-kill is on */
490 if (!iwl_is_ready_rf(priv)) 417 if (!iwl_is_ready_rf(priv))
491 return; 418 goto out;
492 419
493 IWL_DEBUG_INFO(priv, "BT coex in %s mode\n", 420 IWL_DEBUG_INFO(priv, "BT coex in %s mode\n",
494 priv->bt_full_concurrent ? 421 priv->bt_full_concurrent ?
@@ -498,15 +425,15 @@ static void iwl_bg_bt_full_concurrency(struct work_struct *work)
498 * LQ & RXON updated cmds must be sent before BT Config cmd 425 * LQ & RXON updated cmds must be sent before BT Config cmd
499 * to avoid 3-wire collisions 426 * to avoid 3-wire collisions
500 */ 427 */
501 mutex_lock(&priv->mutex);
502 for_each_context(priv, ctx) { 428 for_each_context(priv, ctx) {
503 if (priv->cfg->ops->hcmd->set_rxon_chain) 429 if (priv->cfg->ops->hcmd->set_rxon_chain)
504 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx); 430 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
505 iwlcore_commit_rxon(priv, ctx); 431 iwlcore_commit_rxon(priv, ctx);
506 } 432 }
507 mutex_unlock(&priv->mutex);
508 433
509 priv->cfg->ops->hcmd->send_bt_config(priv); 434 priv->cfg->ops->hcmd->send_bt_config(priv);
435out:
436 mutex_unlock(&priv->mutex);
510} 437}
511 438
512/** 439/**
@@ -556,7 +483,7 @@ static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
556 } 483 }
557 484
558 /* Set starting address; reads will auto-increment */ 485 /* Set starting address; reads will auto-increment */
559 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr); 486 iwl_write32(priv, HBUS_TARG_MEM_RADDR, ptr);
560 rmb(); 487 rmb();
561 488
562 /* 489 /*
@@ -564,13 +491,13 @@ static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
564 * place event id # at far right for easier visual parsing. 491 * place event id # at far right for easier visual parsing.
565 */ 492 */
566 for (i = 0; i < num_events; i++) { 493 for (i = 0; i < num_events; i++) {
567 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); 494 ev = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
568 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); 495 time = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
569 if (mode == 0) { 496 if (mode == 0) {
570 trace_iwlwifi_dev_ucode_cont_event(priv, 497 trace_iwlwifi_dev_ucode_cont_event(priv,
571 0, time, ev); 498 0, time, ev);
572 } else { 499 } else {
573 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); 500 data = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
574 trace_iwlwifi_dev_ucode_cont_event(priv, 501 trace_iwlwifi_dev_ucode_cont_event(priv,
575 time, data, ev); 502 time, data, ev);
576 } 503 }
@@ -588,10 +515,7 @@ static void iwl_continuous_event_trace(struct iwl_priv *priv)
588 u32 num_wraps; /* # times uCode wrapped to top of log */ 515 u32 num_wraps; /* # times uCode wrapped to top of log */
589 u32 next_entry; /* index of next entry to be written by uCode */ 516 u32 next_entry; /* index of next entry to be written by uCode */
590 517
591 if (priv->ucode_type == UCODE_INIT) 518 base = priv->device_pointers.error_event_table;
592 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
593 else
594 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
595 if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) { 519 if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
596 capacity = iwl_read_targ_mem(priv, base); 520 capacity = iwl_read_targ_mem(priv, base);
597 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32))); 521 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
@@ -720,7 +644,10 @@ static void iwl_rx_handle(struct iwl_priv *priv)
720 /* If an RXB doesn't have a Rx queue slot associated with it, 644 /* If an RXB doesn't have a Rx queue slot associated with it,
721 * then a bug has been introduced in the queue refilling 645 * then a bug has been introduced in the queue refilling
722 * routines -- catch it here */ 646 * routines -- catch it here */
723 BUG_ON(rxb == NULL); 647 if (WARN_ON(rxb == NULL)) {
648 i = (i + 1) & RX_QUEUE_MASK;
649 continue;
650 }
724 651
725 rxq->queue[i] = NULL; 652 rxq->queue[i] = NULL;
726 653
@@ -760,13 +687,15 @@ static void iwl_rx_handle(struct iwl_priv *priv)
760 if (w->cmd == pkt->hdr.cmd) { 687 if (w->cmd == pkt->hdr.cmd) {
761 w->triggered = true; 688 w->triggered = true;
762 if (w->fn) 689 if (w->fn)
763 w->fn(priv, pkt); 690 w->fn(priv, pkt, w->fn_data);
764 } 691 }
765 } 692 }
766 spin_unlock(&priv->_agn.notif_wait_lock); 693 spin_unlock(&priv->_agn.notif_wait_lock);
767 694
768 wake_up_all(&priv->_agn.notif_waitq); 695 wake_up_all(&priv->_agn.notif_waitq);
769 } 696 }
697 if (priv->pre_rx_handler)
698 priv->pre_rx_handler(priv, rxb);
770 699
771 /* Based on type of command response or notification, 700 /* Based on type of command response or notification,
772 * handle those that need handling via function in 701 * handle those that need handling via function in
@@ -837,199 +766,6 @@ static void iwl_rx_handle(struct iwl_priv *priv)
837 iwlagn_rx_queue_restock(priv); 766 iwlagn_rx_queue_restock(priv);
838} 767}
839 768
840/* call this function to flush any scheduled tasklet */
841static inline void iwl_synchronize_irq(struct iwl_priv *priv)
842{
843 /* wait to make sure we flush pending tasklet*/
844 synchronize_irq(priv->pci_dev->irq);
845 tasklet_kill(&priv->irq_tasklet);
846}
847
848static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
849{
850 u32 inta, handled = 0;
851 u32 inta_fh;
852 unsigned long flags;
853 u32 i;
854#ifdef CONFIG_IWLWIFI_DEBUG
855 u32 inta_mask;
856#endif
857
858 spin_lock_irqsave(&priv->lock, flags);
859
860 /* Ack/clear/reset pending uCode interrupts.
861 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
862 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
863 inta = iwl_read32(priv, CSR_INT);
864 iwl_write32(priv, CSR_INT, inta);
865
866 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
867 * Any new interrupts that happen after this, either while we're
868 * in this tasklet, or later, will show up in next ISR/tasklet. */
869 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
870 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
871
872#ifdef CONFIG_IWLWIFI_DEBUG
873 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
874 /* just for debug */
875 inta_mask = iwl_read32(priv, CSR_INT_MASK);
876 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
877 inta, inta_mask, inta_fh);
878 }
879#endif
880
881 spin_unlock_irqrestore(&priv->lock, flags);
882
883 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
884 * atomic, make sure that inta covers all the interrupts that
885 * we've discovered, even if FH interrupt came in just after
886 * reading CSR_INT. */
887 if (inta_fh & CSR49_FH_INT_RX_MASK)
888 inta |= CSR_INT_BIT_FH_RX;
889 if (inta_fh & CSR49_FH_INT_TX_MASK)
890 inta |= CSR_INT_BIT_FH_TX;
891
892 /* Now service all interrupt bits discovered above. */
893 if (inta & CSR_INT_BIT_HW_ERR) {
894 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
895
896 /* Tell the device to stop sending interrupts */
897 iwl_disable_interrupts(priv);
898
899 priv->isr_stats.hw++;
900 iwl_irq_handle_error(priv);
901
902 handled |= CSR_INT_BIT_HW_ERR;
903
904 return;
905 }
906
907#ifdef CONFIG_IWLWIFI_DEBUG
908 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
909 /* NIC fires this, but we don't use it, redundant with WAKEUP */
910 if (inta & CSR_INT_BIT_SCD) {
911 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
912 "the frame/frames.\n");
913 priv->isr_stats.sch++;
914 }
915
916 /* Alive notification via Rx interrupt will do the real work */
917 if (inta & CSR_INT_BIT_ALIVE) {
918 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
919 priv->isr_stats.alive++;
920 }
921 }
922#endif
923 /* Safely ignore these bits for debug checks below */
924 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
925
926 /* HW RF KILL switch toggled */
927 if (inta & CSR_INT_BIT_RF_KILL) {
928 int hw_rf_kill = 0;
929 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
930 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
931 hw_rf_kill = 1;
932
933 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
934 hw_rf_kill ? "disable radio" : "enable radio");
935
936 priv->isr_stats.rfkill++;
937
938 /* driver only loads ucode once setting the interface up.
939 * the driver allows loading the ucode even if the radio
940 * is killed. Hence update the killswitch state here. The
941 * rfkill handler will care about restarting if needed.
942 */
943 if (!test_bit(STATUS_ALIVE, &priv->status)) {
944 if (hw_rf_kill)
945 set_bit(STATUS_RF_KILL_HW, &priv->status);
946 else
947 clear_bit(STATUS_RF_KILL_HW, &priv->status);
948 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
949 }
950
951 handled |= CSR_INT_BIT_RF_KILL;
952 }
953
954 /* Chip got too hot and stopped itself */
955 if (inta & CSR_INT_BIT_CT_KILL) {
956 IWL_ERR(priv, "Microcode CT kill error detected.\n");
957 priv->isr_stats.ctkill++;
958 handled |= CSR_INT_BIT_CT_KILL;
959 }
960
961 /* Error detected by uCode */
962 if (inta & CSR_INT_BIT_SW_ERR) {
963 IWL_ERR(priv, "Microcode SW error detected. "
964 " Restarting 0x%X.\n", inta);
965 priv->isr_stats.sw++;
966 iwl_irq_handle_error(priv);
967 handled |= CSR_INT_BIT_SW_ERR;
968 }
969
970 /*
971 * uCode wakes up after power-down sleep.
972 * Tell device about any new tx or host commands enqueued,
973 * and about any Rx buffers made available while asleep.
974 */
975 if (inta & CSR_INT_BIT_WAKEUP) {
976 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
977 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
978 for (i = 0; i < priv->hw_params.max_txq_num; i++)
979 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
980 priv->isr_stats.wakeup++;
981 handled |= CSR_INT_BIT_WAKEUP;
982 }
983
984 /* All uCode command responses, including Tx command responses,
985 * Rx "responses" (frame-received notification), and other
986 * notifications from uCode come through here*/
987 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
988 iwl_rx_handle(priv);
989 priv->isr_stats.rx++;
990 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
991 }
992
993 /* This "Tx" DMA channel is used only for loading uCode */
994 if (inta & CSR_INT_BIT_FH_TX) {
995 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
996 priv->isr_stats.tx++;
997 handled |= CSR_INT_BIT_FH_TX;
998 /* Wake up uCode load routine, now that load is complete */
999 priv->ucode_write_complete = 1;
1000 wake_up_interruptible(&priv->wait_command_queue);
1001 }
1002
1003 if (inta & ~handled) {
1004 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1005 priv->isr_stats.unhandled++;
1006 }
1007
1008 if (inta & ~(priv->inta_mask)) {
1009 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1010 inta & ~priv->inta_mask);
1011 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1012 }
1013
1014 /* Re-enable all interrupts */
1015 /* only Re-enable if disabled by irq */
1016 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1017 iwl_enable_interrupts(priv);
1018 /* Re-enable RF_KILL if it occurred */
1019 else if (handled & CSR_INT_BIT_RF_KILL)
1020 iwl_enable_rfkill_int(priv);
1021
1022#ifdef CONFIG_IWLWIFI_DEBUG
1023 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1024 inta = iwl_read32(priv, CSR_INT);
1025 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1026 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1027 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1028 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1029 }
1030#endif
1031}
1032
1033/* tasklet for iwlagn interrupt */ 769/* tasklet for iwlagn interrupt */
1034static void iwl_irq_tasklet(struct iwl_priv *priv) 770static void iwl_irq_tasklet(struct iwl_priv *priv)
1035{ 771{
@@ -1171,7 +907,7 @@ static void iwl_irq_tasklet(struct iwl_priv *priv)
1171 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) { 907 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1172 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX); 908 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1173 iwl_write32(priv, CSR_FH_INT_STATUS, 909 iwl_write32(priv, CSR_FH_INT_STATUS,
1174 CSR49_FH_INT_RX_MASK); 910 CSR_FH_INT_RX_MASK);
1175 } 911 }
1176 if (inta & CSR_INT_BIT_RX_PERIODIC) { 912 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1177 handled |= CSR_INT_BIT_RX_PERIODIC; 913 handled |= CSR_INT_BIT_RX_PERIODIC;
@@ -1209,7 +945,7 @@ static void iwl_irq_tasklet(struct iwl_priv *priv)
1209 945
1210 /* This "Tx" DMA channel is used only for loading uCode */ 946 /* This "Tx" DMA channel is used only for loading uCode */
1211 if (inta & CSR_INT_BIT_FH_TX) { 947 if (inta & CSR_INT_BIT_FH_TX) {
1212 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK); 948 iwl_write32(priv, CSR_FH_INT_STATUS, CSR_FH_INT_TX_MASK);
1213 IWL_DEBUG_ISR(priv, "uCode load interrupt\n"); 949 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1214 priv->isr_stats.tx++; 950 priv->isr_stats.tx++;
1215 handled |= CSR_INT_BIT_FH_TX; 951 handled |= CSR_INT_BIT_FH_TX;
@@ -1357,26 +1093,48 @@ static struct attribute_group iwl_attribute_group = {
1357 * 1093 *
1358 ******************************************************************************/ 1094 ******************************************************************************/
1359 1095
1360static void iwl_dealloc_ucode_pci(struct iwl_priv *priv) 1096static void iwl_free_fw_desc(struct pci_dev *pci_dev, struct fw_desc *desc)
1097{
1098 if (desc->v_addr)
1099 dma_free_coherent(&pci_dev->dev, desc->len,
1100 desc->v_addr, desc->p_addr);
1101 desc->v_addr = NULL;
1102 desc->len = 0;
1103}
1104
1105static void iwl_free_fw_img(struct pci_dev *pci_dev, struct fw_img *img)
1106{
1107 iwl_free_fw_desc(pci_dev, &img->code);
1108 iwl_free_fw_desc(pci_dev, &img->data);
1109}
1110
1111static int iwl_alloc_fw_desc(struct pci_dev *pci_dev, struct fw_desc *desc,
1112 const void *data, size_t len)
1361{ 1113{
1362 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code); 1114 if (!len) {
1363 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data); 1115 desc->v_addr = NULL;
1364 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup); 1116 return -EINVAL;
1365 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init); 1117 }
1366 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data); 1118
1367 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot); 1119 desc->v_addr = dma_alloc_coherent(&pci_dev->dev, len,
1120 &desc->p_addr, GFP_KERNEL);
1121 if (!desc->v_addr)
1122 return -ENOMEM;
1123 desc->len = len;
1124 memcpy(desc->v_addr, data, len);
1125 return 0;
1368} 1126}
1369 1127
1370static void iwl_nic_start(struct iwl_priv *priv) 1128static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
1371{ 1129{
1372 /* Remove all resets to allow NIC to operate */ 1130 iwl_free_fw_img(priv->pci_dev, &priv->ucode_rt);
1373 iwl_write32(priv, CSR_RESET, 0); 1131 iwl_free_fw_img(priv->pci_dev, &priv->ucode_init);
1374} 1132}
1375 1133
1376struct iwlagn_ucode_capabilities { 1134struct iwlagn_ucode_capabilities {
1377 u32 max_probe_length; 1135 u32 max_probe_length;
1378 u32 standard_phy_calibration_size; 1136 u32 standard_phy_calibration_size;
1379 bool pan; 1137 u32 flags;
1380}; 1138};
1381 1139
1382static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context); 1140static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
@@ -1422,8 +1180,8 @@ static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1422} 1180}
1423 1181
1424struct iwlagn_firmware_pieces { 1182struct iwlagn_firmware_pieces {
1425 const void *inst, *data, *init, *init_data, *boot; 1183 const void *inst, *data, *init, *init_data;
1426 size_t inst_size, data_size, init_size, init_data_size, boot_size; 1184 size_t inst_size, data_size, init_size, init_data_size;
1427 1185
1428 u32 build; 1186 u32 build;
1429 1187
@@ -1444,28 +1202,18 @@ static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1444 1202
1445 switch (api_ver) { 1203 switch (api_ver) {
1446 default: 1204 default:
1447 /* 1205 hdr_size = 28;
1448 * 4965 doesn't revision the firmware file format 1206 if (ucode_raw->size < hdr_size) {
1449 * along with the API version, it always uses v1 1207 IWL_ERR(priv, "File size too small!\n");
1450 * file format. 1208 return -EINVAL;
1451 */
1452 if ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) !=
1453 CSR_HW_REV_TYPE_4965) {
1454 hdr_size = 28;
1455 if (ucode_raw->size < hdr_size) {
1456 IWL_ERR(priv, "File size too small!\n");
1457 return -EINVAL;
1458 }
1459 pieces->build = le32_to_cpu(ucode->u.v2.build);
1460 pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
1461 pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
1462 pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
1463 pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
1464 pieces->boot_size = le32_to_cpu(ucode->u.v2.boot_size);
1465 src = ucode->u.v2.data;
1466 break;
1467 } 1209 }
1468 /* fall through for 4965 */ 1210 pieces->build = le32_to_cpu(ucode->u.v2.build);
1211 pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
1212 pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
1213 pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
1214 pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
1215 src = ucode->u.v2.data;
1216 break;
1469 case 0: 1217 case 0:
1470 case 1: 1218 case 1:
1471 case 2: 1219 case 2:
@@ -1479,7 +1227,6 @@ static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1479 pieces->data_size = le32_to_cpu(ucode->u.v1.data_size); 1227 pieces->data_size = le32_to_cpu(ucode->u.v1.data_size);
1480 pieces->init_size = le32_to_cpu(ucode->u.v1.init_size); 1228 pieces->init_size = le32_to_cpu(ucode->u.v1.init_size);
1481 pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size); 1229 pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size);
1482 pieces->boot_size = le32_to_cpu(ucode->u.v1.boot_size);
1483 src = ucode->u.v1.data; 1230 src = ucode->u.v1.data;
1484 break; 1231 break;
1485 } 1232 }
@@ -1487,7 +1234,7 @@ static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1487 /* Verify size of file vs. image size info in file's header */ 1234 /* Verify size of file vs. image size info in file's header */
1488 if (ucode_raw->size != hdr_size + pieces->inst_size + 1235 if (ucode_raw->size != hdr_size + pieces->inst_size +
1489 pieces->data_size + pieces->init_size + 1236 pieces->data_size + pieces->init_size +
1490 pieces->init_data_size + pieces->boot_size) { 1237 pieces->init_data_size) {
1491 1238
1492 IWL_ERR(priv, 1239 IWL_ERR(priv,
1493 "uCode file size %d does not match expected size\n", 1240 "uCode file size %d does not match expected size\n",
@@ -1503,8 +1250,6 @@ static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1503 src += pieces->init_size; 1250 src += pieces->init_size;
1504 pieces->init_data = src; 1251 pieces->init_data = src;
1505 src += pieces->init_data_size; 1252 src += pieces->init_data_size;
1506 pieces->boot = src;
1507 src += pieces->boot_size;
1508 1253
1509 return 0; 1254 return 0;
1510} 1255}
@@ -1605,8 +1350,7 @@ static int iwlagn_load_firmware(struct iwl_priv *priv,
1605 pieces->init_data_size = tlv_len; 1350 pieces->init_data_size = tlv_len;
1606 break; 1351 break;
1607 case IWL_UCODE_TLV_BOOT: 1352 case IWL_UCODE_TLV_BOOT:
1608 pieces->boot = tlv_data; 1353 IWL_ERR(priv, "Found unexpected BOOT ucode\n");
1609 pieces->boot_size = tlv_len;
1610 break; 1354 break;
1611 case IWL_UCODE_TLV_PROBE_MAX_LEN: 1355 case IWL_UCODE_TLV_PROBE_MAX_LEN:
1612 if (tlv_len != sizeof(u32)) 1356 if (tlv_len != sizeof(u32))
@@ -1617,7 +1361,23 @@ static int iwlagn_load_firmware(struct iwl_priv *priv,
1617 case IWL_UCODE_TLV_PAN: 1361 case IWL_UCODE_TLV_PAN:
1618 if (tlv_len) 1362 if (tlv_len)
1619 goto invalid_tlv_len; 1363 goto invalid_tlv_len;
1620 capa->pan = true; 1364 capa->flags |= IWL_UCODE_TLV_FLAGS_PAN;
1365 break;
1366 case IWL_UCODE_TLV_FLAGS:
1367 /* must be at least one u32 */
1368 if (tlv_len < sizeof(u32))
1369 goto invalid_tlv_len;
1370 /* and a proper number of u32s */
1371 if (tlv_len % sizeof(u32))
1372 goto invalid_tlv_len;
1373 /*
1374 * This driver only reads the first u32 as
1375 * right now no more features are defined,
1376 * if that changes then either the driver
1377 * will not work with the new firmware, or
1378 * it'll not take advantage of new features.
1379 */
1380 capa->flags = le32_to_cpup((__le32 *)tlv_data);
1621 break; 1381 break;
1622 case IWL_UCODE_TLV_INIT_EVTLOG_PTR: 1382 case IWL_UCODE_TLV_INIT_EVTLOG_PTR:
1623 if (tlv_len != sizeof(u32)) 1383 if (tlv_len != sizeof(u32))
@@ -1667,7 +1427,7 @@ static int iwlagn_load_firmware(struct iwl_priv *priv,
1667 le32_to_cpup((__le32 *)tlv_data); 1427 le32_to_cpup((__le32 *)tlv_data);
1668 break; 1428 break;
1669 default: 1429 default:
1670 IWL_WARN(priv, "unknown TLV: %d\n", tlv_type); 1430 IWL_DEBUG_INFO(priv, "unknown TLV: %d\n", tlv_type);
1671 break; 1431 break;
1672 } 1432 }
1673 } 1433 }
@@ -1806,8 +1566,6 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1806 pieces.init_size); 1566 pieces.init_size);
1807 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n", 1567 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
1808 pieces.init_data_size); 1568 pieces.init_data_size);
1809 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %Zd\n",
1810 pieces.boot_size);
1811 1569
1812 /* Verify that uCode images will fit in card's SRAM */ 1570 /* Verify that uCode images will fit in card's SRAM */
1813 if (pieces.inst_size > priv->hw_params.max_inst_size) { 1571 if (pieces.inst_size > priv->hw_params.max_inst_size) {
@@ -1834,48 +1592,25 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1834 goto try_again; 1592 goto try_again;
1835 } 1593 }
1836 1594
1837 if (pieces.boot_size > priv->hw_params.max_bsm_size) {
1838 IWL_ERR(priv, "uCode boot instr len %Zd too large to fit in\n",
1839 pieces.boot_size);
1840 goto try_again;
1841 }
1842
1843 /* Allocate ucode buffers for card's bus-master loading ... */ 1595 /* Allocate ucode buffers for card's bus-master loading ... */
1844 1596
1845 /* Runtime instructions and 2 copies of data: 1597 /* Runtime instructions and 2 copies of data:
1846 * 1) unmodified from disk 1598 * 1) unmodified from disk
1847 * 2) backup cache for save/restore during power-downs */ 1599 * 2) backup cache for save/restore during power-downs */
1848 priv->ucode_code.len = pieces.inst_size; 1600 if (iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_rt.code,
1849 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code); 1601 pieces.inst, pieces.inst_size))
1850 1602 goto err_pci_alloc;
1851 priv->ucode_data.len = pieces.data_size; 1603 if (iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_rt.data,
1852 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data); 1604 pieces.data, pieces.data_size))
1853
1854 priv->ucode_data_backup.len = pieces.data_size;
1855 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1856
1857 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
1858 !priv->ucode_data_backup.v_addr)
1859 goto err_pci_alloc; 1605 goto err_pci_alloc;
1860 1606
1861 /* Initialization instructions and data */ 1607 /* Initialization instructions and data */
1862 if (pieces.init_size && pieces.init_data_size) { 1608 if (pieces.init_size && pieces.init_data_size) {
1863 priv->ucode_init.len = pieces.init_size; 1609 if (iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init.code,
1864 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init); 1610 pieces.init, pieces.init_size))
1865
1866 priv->ucode_init_data.len = pieces.init_data_size;
1867 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1868
1869 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
1870 goto err_pci_alloc; 1611 goto err_pci_alloc;
1871 } 1612 if (iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init.data,
1872 1613 pieces.init_data, pieces.init_data_size))
1873 /* Bootstrap (instructions only, no data) */
1874 if (pieces.boot_size) {
1875 priv->ucode_boot.len = pieces.boot_size;
1876 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
1877
1878 if (!priv->ucode_boot.v_addr)
1879 goto err_pci_alloc; 1614 goto err_pci_alloc;
1880 } 1615 }
1881 1616
@@ -1901,50 +1636,19 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1901 priv->cfg->base_params->max_event_log_size; 1636 priv->cfg->base_params->max_event_log_size;
1902 priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr; 1637 priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr;
1903 1638
1904 if (ucode_capa.pan) { 1639 priv->new_scan_threshold_behaviour =
1640 !!(ucode_capa.flags & IWL_UCODE_TLV_FLAGS_NEWSCAN);
1641
1642 if (ucode_capa.flags & IWL_UCODE_TLV_FLAGS_PAN) {
1905 priv->valid_contexts |= BIT(IWL_RXON_CTX_PAN); 1643 priv->valid_contexts |= BIT(IWL_RXON_CTX_PAN);
1906 priv->sta_key_max_num = STA_KEY_MAX_NUM_PAN; 1644 priv->sta_key_max_num = STA_KEY_MAX_NUM_PAN;
1907 } else 1645 } else
1908 priv->sta_key_max_num = STA_KEY_MAX_NUM; 1646 priv->sta_key_max_num = STA_KEY_MAX_NUM;
1909 1647
1910 /* Copy images into buffers for card's bus-master reads ... */ 1648 if (priv->valid_contexts != BIT(IWL_RXON_CTX_BSS))
1911 1649 priv->cmd_queue = IWL_IPAN_CMD_QUEUE_NUM;
1912 /* Runtime instructions (first block of data in file) */ 1650 else
1913 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n", 1651 priv->cmd_queue = IWL_DEFAULT_CMD_QUEUE_NUM;
1914 pieces.inst_size);
1915 memcpy(priv->ucode_code.v_addr, pieces.inst, pieces.inst_size);
1916
1917 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
1918 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
1919
1920 /*
1921 * Runtime data
1922 * NOTE: Copy into backup buffer will be done in iwl_up()
1923 */
1924 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n",
1925 pieces.data_size);
1926 memcpy(priv->ucode_data.v_addr, pieces.data, pieces.data_size);
1927 memcpy(priv->ucode_data_backup.v_addr, pieces.data, pieces.data_size);
1928
1929 /* Initialization instructions */
1930 if (pieces.init_size) {
1931 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
1932 pieces.init_size);
1933 memcpy(priv->ucode_init.v_addr, pieces.init, pieces.init_size);
1934 }
1935
1936 /* Initialization data */
1937 if (pieces.init_data_size) {
1938 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n",
1939 pieces.init_data_size);
1940 memcpy(priv->ucode_init_data.v_addr, pieces.init_data,
1941 pieces.init_data_size);
1942 }
1943
1944 /* Bootstrap instructions */
1945 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n",
1946 pieces.boot_size);
1947 memcpy(priv->ucode_boot.v_addr, pieces.boot, pieces.boot_size);
1948 1652
1949 /* 1653 /*
1950 * figure out the offset of chain noise reset and gain commands 1654 * figure out the offset of chain noise reset and gain commands
@@ -2076,13 +1780,13 @@ void iwl_dump_nic_error_log(struct iwl_priv *priv)
2076 u32 desc, time, count, base, data1; 1780 u32 desc, time, count, base, data1;
2077 u32 blink1, blink2, ilink1, ilink2; 1781 u32 blink1, blink2, ilink1, ilink2;
2078 u32 pc, hcmd; 1782 u32 pc, hcmd;
1783 struct iwl_error_event_table table;
2079 1784
2080 if (priv->ucode_type == UCODE_INIT) { 1785 base = priv->device_pointers.error_event_table;
2081 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr); 1786 if (priv->ucode_type == UCODE_SUBTYPE_INIT) {
2082 if (!base) 1787 if (!base)
2083 base = priv->_agn.init_errlog_ptr; 1788 base = priv->_agn.init_errlog_ptr;
2084 } else { 1789 } else {
2085 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
2086 if (!base) 1790 if (!base)
2087 base = priv->_agn.inst_errlog_ptr; 1791 base = priv->_agn.inst_errlog_ptr;
2088 } 1792 }
@@ -2090,11 +1794,15 @@ void iwl_dump_nic_error_log(struct iwl_priv *priv)
2090 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) { 1794 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2091 IWL_ERR(priv, 1795 IWL_ERR(priv,
2092 "Not valid error log pointer 0x%08X for %s uCode\n", 1796 "Not valid error log pointer 0x%08X for %s uCode\n",
2093 base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT"); 1797 base,
1798 (priv->ucode_type == UCODE_SUBTYPE_INIT)
1799 ? "Init" : "RT");
2094 return; 1800 return;
2095 } 1801 }
2096 1802
2097 count = iwl_read_targ_mem(priv, base); 1803 iwl_read_targ_mem_words(priv, base, &table, sizeof(table));
1804
1805 count = table.valid;
2098 1806
2099 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) { 1807 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
2100 IWL_ERR(priv, "Start IWL Error Log Dump:\n"); 1808 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
@@ -2102,18 +1810,18 @@ void iwl_dump_nic_error_log(struct iwl_priv *priv)
2102 priv->status, count); 1810 priv->status, count);
2103 } 1811 }
2104 1812
2105 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32)); 1813 desc = table.error_id;
2106 priv->isr_stats.err_code = desc; 1814 priv->isr_stats.err_code = desc;
2107 pc = iwl_read_targ_mem(priv, base + 2 * sizeof(u32)); 1815 pc = table.pc;
2108 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32)); 1816 blink1 = table.blink1;
2109 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32)); 1817 blink2 = table.blink2;
2110 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32)); 1818 ilink1 = table.ilink1;
2111 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32)); 1819 ilink2 = table.ilink2;
2112 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32)); 1820 data1 = table.data1;
2113 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32)); 1821 data2 = table.data2;
2114 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32)); 1822 line = table.line;
2115 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32)); 1823 time = table.tsf_low;
2116 hcmd = iwl_read_targ_mem(priv, base + 22 * sizeof(u32)); 1824 hcmd = table.hcmd;
2117 1825
2118 trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line, 1826 trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line,
2119 blink1, blink2, ilink1, ilink2); 1827 blink1, blink2, ilink1, ilink2);
@@ -2147,12 +1855,11 @@ static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
2147 if (num_events == 0) 1855 if (num_events == 0)
2148 return pos; 1856 return pos;
2149 1857
2150 if (priv->ucode_type == UCODE_INIT) { 1858 base = priv->device_pointers.log_event_table;
2151 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr); 1859 if (priv->ucode_type == UCODE_SUBTYPE_INIT) {
2152 if (!base) 1860 if (!base)
2153 base = priv->_agn.init_evtlog_ptr; 1861 base = priv->_agn.init_evtlog_ptr;
2154 } else { 1862 } else {
2155 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2156 if (!base) 1863 if (!base)
2157 base = priv->_agn.inst_evtlog_ptr; 1864 base = priv->_agn.inst_evtlog_ptr;
2158 } 1865 }
@@ -2169,14 +1876,14 @@ static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
2169 iwl_grab_nic_access(priv); 1876 iwl_grab_nic_access(priv);
2170 1877
2171 /* Set starting address; reads will auto-increment */ 1878 /* Set starting address; reads will auto-increment */
2172 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr); 1879 iwl_write32(priv, HBUS_TARG_MEM_RADDR, ptr);
2173 rmb(); 1880 rmb();
2174 1881
2175 /* "time" is actually "data" for mode 0 (no timestamp). 1882 /* "time" is actually "data" for mode 0 (no timestamp).
2176 * place event id # at far right for easier visual parsing. */ 1883 * place event id # at far right for easier visual parsing. */
2177 for (i = 0; i < num_events; i++) { 1884 for (i = 0; i < num_events; i++) {
2178 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); 1885 ev = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
2179 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); 1886 time = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
2180 if (mode == 0) { 1887 if (mode == 0) {
2181 /* data, ev */ 1888 /* data, ev */
2182 if (bufsz) { 1889 if (bufsz) {
@@ -2190,7 +1897,7 @@ static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
2190 time, ev); 1897 time, ev);
2191 } 1898 }
2192 } else { 1899 } else {
2193 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); 1900 data = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
2194 if (bufsz) { 1901 if (bufsz) {
2195 pos += scnprintf(*buf + pos, bufsz - pos, 1902 pos += scnprintf(*buf + pos, bufsz - pos,
2196 "EVT_LOGT:%010u:0x%08x:%04u\n", 1903 "EVT_LOGT:%010u:0x%08x:%04u\n",
@@ -2261,13 +1968,12 @@ int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
2261 int pos = 0; 1968 int pos = 0;
2262 size_t bufsz = 0; 1969 size_t bufsz = 0;
2263 1970
2264 if (priv->ucode_type == UCODE_INIT) { 1971 base = priv->device_pointers.log_event_table;
2265 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr); 1972 if (priv->ucode_type == UCODE_SUBTYPE_INIT) {
2266 logsize = priv->_agn.init_evtlog_size; 1973 logsize = priv->_agn.init_evtlog_size;
2267 if (!base) 1974 if (!base)
2268 base = priv->_agn.init_evtlog_ptr; 1975 base = priv->_agn.init_evtlog_ptr;
2269 } else { 1976 } else {
2270 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2271 logsize = priv->_agn.inst_evtlog_size; 1977 logsize = priv->_agn.inst_evtlog_size;
2272 if (!base) 1978 if (!base)
2273 base = priv->_agn.inst_evtlog_ptr; 1979 base = priv->_agn.inst_evtlog_ptr;
@@ -2276,7 +1982,9 @@ int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
2276 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) { 1982 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2277 IWL_ERR(priv, 1983 IWL_ERR(priv,
2278 "Invalid event log pointer 0x%08X for %s uCode\n", 1984 "Invalid event log pointer 0x%08X for %s uCode\n",
2279 base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT"); 1985 base,
1986 (priv->ucode_type == UCODE_SUBTYPE_INIT)
1987 ? "Init" : "RT");
2280 return -EINVAL; 1988 return -EINVAL;
2281 } 1989 }
2282 1990
@@ -2423,30 +2131,14 @@ static int iwlagn_send_calib_cfg_rt(struct iwl_priv *priv, u32 cfg)
2423 * from protocol/runtime uCode (initialization uCode's 2131 * from protocol/runtime uCode (initialization uCode's
2424 * Alive gets handled by iwl_init_alive_start()). 2132 * Alive gets handled by iwl_init_alive_start()).
2425 */ 2133 */
2426static void iwl_alive_start(struct iwl_priv *priv) 2134int iwl_alive_start(struct iwl_priv *priv)
2427{ 2135{
2428 int ret = 0; 2136 int ret = 0;
2429 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS]; 2137 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2430 2138
2431 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n"); 2139 iwl_reset_ict(priv);
2432
2433 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2434 * This is a paranoid check, because we would not have gotten the
2435 * "runtime" alive if code weren't properly loaded. */
2436 if (iwl_verify_ucode(priv)) {
2437 /* Runtime instruction load was bad;
2438 * take it all the way back down so we can try again */
2439 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2440 goto restart;
2441 }
2442
2443 ret = priv->cfg->ops->lib->alive_notify(priv);
2444 if (ret) {
2445 IWL_WARN(priv,
2446 "Could not complete ALIVE transition [ntf]: %d\n", ret);
2447 goto restart;
2448 }
2449 2140
2141 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2450 2142
2451 /* After the ALIVE response, we can send host commands to the uCode */ 2143 /* After the ALIVE response, we can send host commands to the uCode */
2452 set_bit(STATUS_ALIVE, &priv->status); 2144 set_bit(STATUS_ALIVE, &priv->status);
@@ -2455,7 +2147,7 @@ static void iwl_alive_start(struct iwl_priv *priv)
2455 iwl_setup_watchdog(priv); 2147 iwl_setup_watchdog(priv);
2456 2148
2457 if (iwl_is_rfkill(priv)) 2149 if (iwl_is_rfkill(priv))
2458 return; 2150 return -ERFKILL;
2459 2151
2460 /* download priority table before any calibration request */ 2152 /* download priority table before any calibration request */
2461 if (priv->cfg->bt_params && 2153 if (priv->cfg->bt_params &&
@@ -2469,10 +2161,14 @@ static void iwl_alive_start(struct iwl_priv *priv)
2469 iwlagn_send_prio_tbl(priv); 2161 iwlagn_send_prio_tbl(priv);
2470 2162
2471 /* FIXME: w/a to force change uCode BT state machine */ 2163 /* FIXME: w/a to force change uCode BT state machine */
2472 iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_OPEN, 2164 ret = iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_OPEN,
2473 BT_COEX_PRIO_TBL_EVT_INIT_CALIB2); 2165 BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
2474 iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_CLOSE, 2166 if (ret)
2475 BT_COEX_PRIO_TBL_EVT_INIT_CALIB2); 2167 return ret;
2168 ret = iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_CLOSE,
2169 BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
2170 if (ret)
2171 return ret;
2476 } 2172 }
2477 if (priv->hw_params.calib_rt_cfg) 2173 if (priv->hw_params.calib_rt_cfg)
2478 iwlagn_send_calib_cfg_rt(priv, priv->hw_params.calib_rt_cfg); 2174 iwlagn_send_calib_cfg_rt(priv, priv->hw_params.calib_rt_cfg);
@@ -2514,30 +2210,23 @@ static void iwl_alive_start(struct iwl_priv *priv)
2514 set_bit(STATUS_READY, &priv->status); 2210 set_bit(STATUS_READY, &priv->status);
2515 2211
2516 /* Configure the adapter for unassociated operation */ 2212 /* Configure the adapter for unassociated operation */
2517 iwlcore_commit_rxon(priv, ctx); 2213 ret = iwlcore_commit_rxon(priv, ctx);
2214 if (ret)
2215 return ret;
2518 2216
2519 /* At this point, the NIC is initialized and operational */ 2217 /* At this point, the NIC is initialized and operational */
2520 iwl_rf_kill_ct_config(priv); 2218 iwl_rf_kill_ct_config(priv);
2521 2219
2522 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n"); 2220 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2523 wake_up_interruptible(&priv->wait_command_queue);
2524
2525 iwl_power_update_mode(priv, true);
2526 IWL_DEBUG_INFO(priv, "Updated power mode\n");
2527 2221
2528 2222 return iwl_power_update_mode(priv, true);
2529 return;
2530
2531 restart:
2532 queue_work(priv->workqueue, &priv->restart);
2533} 2223}
2534 2224
2535static void iwl_cancel_deferred_work(struct iwl_priv *priv); 2225static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2536 2226
2537static void __iwl_down(struct iwl_priv *priv) 2227static void __iwl_down(struct iwl_priv *priv)
2538{ 2228{
2539 unsigned long flags; 2229 int exit_pending;
2540 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2541 2230
2542 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n"); 2231 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2543 2232
@@ -2563,40 +2252,15 @@ static void __iwl_down(struct iwl_priv *priv)
2563 priv->bt_full_concurrent = false; 2252 priv->bt_full_concurrent = false;
2564 priv->bt_ci_compliance = 0; 2253 priv->bt_ci_compliance = 0;
2565 2254
2566 /* Unblock any waiting calls */
2567 wake_up_interruptible_all(&priv->wait_command_queue);
2568
2569 /* Wipe out the EXIT_PENDING status bit if we are not actually 2255 /* Wipe out the EXIT_PENDING status bit if we are not actually
2570 * exiting the module */ 2256 * exiting the module */
2571 if (!exit_pending) 2257 if (!exit_pending)
2572 clear_bit(STATUS_EXIT_PENDING, &priv->status); 2258 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2573 2259
2574 /* stop and reset the on-board processor */
2575 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2576
2577 /* tell the device to stop sending interrupts */
2578 spin_lock_irqsave(&priv->lock, flags);
2579 iwl_disable_interrupts(priv);
2580 spin_unlock_irqrestore(&priv->lock, flags);
2581 iwl_synchronize_irq(priv);
2582
2583 if (priv->mac80211_registered) 2260 if (priv->mac80211_registered)
2584 ieee80211_stop_queues(priv->hw); 2261 ieee80211_stop_queues(priv->hw);
2585 2262
2586 /* If we have not previously called iwl_init() then 2263 /* Clear out all status bits but a few that are stable across reset */
2587 * clear all bits but the RF Kill bit and return */
2588 if (!iwl_is_init(priv)) {
2589 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2590 STATUS_RF_KILL_HW |
2591 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2592 STATUS_GEO_CONFIGURED |
2593 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2594 STATUS_EXIT_PENDING;
2595 goto exit;
2596 }
2597
2598 /* ...otherwise clear out all the status bits but the RF Kill
2599 * bit and continue taking the NIC down. */
2600 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) << 2264 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2601 STATUS_RF_KILL_HW | 2265 STATUS_RF_KILL_HW |
2602 test_bit(STATUS_GEO_CONFIGURED, &priv->status) << 2266 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
@@ -2606,31 +2270,10 @@ static void __iwl_down(struct iwl_priv *priv)
2606 test_bit(STATUS_EXIT_PENDING, &priv->status) << 2270 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2607 STATUS_EXIT_PENDING; 2271 STATUS_EXIT_PENDING;
2608 2272
2609 /* device going down, Stop using ICT table */ 2273 iwlagn_stop_device(priv);
2610 if (priv->cfg->ops->lib->isr_ops.disable)
2611 priv->cfg->ops->lib->isr_ops.disable(priv);
2612
2613 iwlagn_txq_ctx_stop(priv);
2614 iwlagn_rxq_stop(priv);
2615
2616 /* Power-down device's busmaster DMA clocks */
2617 iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2618 udelay(5);
2619
2620 /* Make sure (redundant) we've released our request to stay awake */
2621 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2622
2623 /* Stop the device, and put it in low power state */
2624 iwl_apm_stop(priv);
2625
2626 exit:
2627 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2628 2274
2629 dev_kfree_skb(priv->beacon_skb); 2275 dev_kfree_skb(priv->beacon_skb);
2630 priv->beacon_skb = NULL; 2276 priv->beacon_skb = NULL;
2631
2632 /* clear out any free frames */
2633 iwl_clear_free_frames(priv);
2634} 2277}
2635 2278
2636static void iwl_down(struct iwl_priv *priv) 2279static void iwl_down(struct iwl_priv *priv)
@@ -2644,9 +2287,10 @@ static void iwl_down(struct iwl_priv *priv)
2644 2287
2645#define HW_READY_TIMEOUT (50) 2288#define HW_READY_TIMEOUT (50)
2646 2289
2290/* Note: returns poll_bit return value, which is >= 0 if success */
2647static int iwl_set_hw_ready(struct iwl_priv *priv) 2291static int iwl_set_hw_ready(struct iwl_priv *priv)
2648{ 2292{
2649 int ret = 0; 2293 int ret;
2650 2294
2651 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG, 2295 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2652 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY); 2296 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
@@ -2656,25 +2300,21 @@ static int iwl_set_hw_ready(struct iwl_priv *priv)
2656 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY, 2300 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2657 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY, 2301 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2658 HW_READY_TIMEOUT); 2302 HW_READY_TIMEOUT);
2659 if (ret != -ETIMEDOUT)
2660 priv->hw_ready = true;
2661 else
2662 priv->hw_ready = false;
2663 2303
2664 IWL_DEBUG_INFO(priv, "hardware %s\n", 2304 IWL_DEBUG_INFO(priv, "hardware%s ready\n", ret < 0 ? " not" : "");
2665 (priv->hw_ready == 1) ? "ready" : "not ready");
2666 return ret; 2305 return ret;
2667} 2306}
2668 2307
2669static int iwl_prepare_card_hw(struct iwl_priv *priv) 2308/* Note: returns standard 0/-ERROR code */
2309int iwl_prepare_card_hw(struct iwl_priv *priv)
2670{ 2310{
2671 int ret = 0; 2311 int ret;
2672 2312
2673 IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n"); 2313 IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
2674 2314
2675 ret = iwl_set_hw_ready(priv); 2315 ret = iwl_set_hw_ready(priv);
2676 if (priv->hw_ready) 2316 if (ret >= 0)
2677 return ret; 2317 return 0;
2678 2318
2679 /* If HW is not ready, prepare the conditions to check again */ 2319 /* If HW is not ready, prepare the conditions to check again */
2680 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG, 2320 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
@@ -2684,10 +2324,13 @@ static int iwl_prepare_card_hw(struct iwl_priv *priv)
2684 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 2324 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2685 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000); 2325 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2686 2326
2687 /* HW should be ready by now, check again. */ 2327 if (ret < 0)
2688 if (ret != -ETIMEDOUT) 2328 return ret;
2689 iwl_set_hw_ready(priv);
2690 2329
2330 /* HW should be ready by now, check again. */
2331 ret = iwl_set_hw_ready(priv);
2332 if (ret >= 0)
2333 return 0;
2691 return ret; 2334 return ret;
2692} 2335}
2693 2336
@@ -2696,19 +2339,15 @@ static int iwl_prepare_card_hw(struct iwl_priv *priv)
2696static int __iwl_up(struct iwl_priv *priv) 2339static int __iwl_up(struct iwl_priv *priv)
2697{ 2340{
2698 struct iwl_rxon_context *ctx; 2341 struct iwl_rxon_context *ctx;
2699 int i;
2700 int ret; 2342 int ret;
2701 2343
2344 lockdep_assert_held(&priv->mutex);
2345
2702 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) { 2346 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2703 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n"); 2347 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2704 return -EIO; 2348 return -EIO;
2705 } 2349 }
2706 2350
2707 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2708 IWL_ERR(priv, "ucode not available for device bringup\n");
2709 return -EIO;
2710 }
2711
2712 for_each_context(priv, ctx) { 2351 for_each_context(priv, ctx) {
2713 ret = iwlagn_alloc_bcast_station(priv, ctx); 2352 ret = iwlagn_alloc_bcast_station(priv, ctx);
2714 if (ret) { 2353 if (ret) {
@@ -2717,89 +2356,33 @@ static int __iwl_up(struct iwl_priv *priv)
2717 } 2356 }
2718 } 2357 }
2719 2358
2720 iwl_prepare_card_hw(priv); 2359 ret = iwlagn_run_init_ucode(priv);
2721 2360 if (ret) {
2722 if (!priv->hw_ready) { 2361 IWL_ERR(priv, "Failed to run INIT ucode: %d\n", ret);
2723 IWL_WARN(priv, "Exit HW not ready\n"); 2362 goto error;
2724 return -EIO;
2725 }
2726
2727 /* If platform's RF_KILL switch is NOT set to KILL */
2728 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2729 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2730 else
2731 set_bit(STATUS_RF_KILL_HW, &priv->status);
2732
2733 if (iwl_is_rfkill(priv)) {
2734 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2735
2736 iwl_enable_interrupts(priv);
2737 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2738 return 0;
2739 } 2363 }
2740 2364
2741 iwl_write32(priv, CSR_INT, 0xFFFFFFFF); 2365 ret = iwlagn_load_ucode_wait_alive(priv,
2742 2366 &priv->ucode_rt,
2743 /* must be initialised before iwl_hw_nic_init */ 2367 UCODE_SUBTYPE_REGULAR,
2744 if (priv->valid_contexts != BIT(IWL_RXON_CTX_BSS)) 2368 UCODE_SUBTYPE_REGULAR_NEW);
2745 priv->cmd_queue = IWL_IPAN_CMD_QUEUE_NUM;
2746 else
2747 priv->cmd_queue = IWL_DEFAULT_CMD_QUEUE_NUM;
2748
2749 ret = iwlagn_hw_nic_init(priv);
2750 if (ret) { 2369 if (ret) {
2751 IWL_ERR(priv, "Unable to init nic\n"); 2370 IWL_ERR(priv, "Failed to start RT ucode: %d\n", ret);
2752 return ret; 2371 goto error;
2753 } 2372 }
2754 2373
2755 /* make sure rfkill handshake bits are cleared */ 2374 ret = iwl_alive_start(priv);
2756 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); 2375 if (ret)
2757 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, 2376 goto error;
2758 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); 2377 return 0;
2759
2760 /* clear (again), then enable host interrupts */
2761 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2762 iwl_enable_interrupts(priv);
2763
2764 /* really make sure rfkill handshake bits are cleared */
2765 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2766 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2767
2768 /* Copy original ucode data image from disk into backup cache.
2769 * This will be used to initialize the on-board processor's
2770 * data SRAM for a clean start when the runtime program first loads. */
2771 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2772 priv->ucode_data.len);
2773
2774 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2775
2776 /* load bootstrap state machine,
2777 * load bootstrap program into processor's memory,
2778 * prepare to load the "initialize" uCode */
2779 ret = priv->cfg->ops->lib->load_ucode(priv);
2780
2781 if (ret) {
2782 IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2783 ret);
2784 continue;
2785 }
2786
2787 /* start card; "initialize" will load runtime ucode */
2788 iwl_nic_start(priv);
2789
2790 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2791
2792 return 0;
2793 }
2794 2378
2379 error:
2795 set_bit(STATUS_EXIT_PENDING, &priv->status); 2380 set_bit(STATUS_EXIT_PENDING, &priv->status);
2796 __iwl_down(priv); 2381 __iwl_down(priv);
2797 clear_bit(STATUS_EXIT_PENDING, &priv->status); 2382 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2798 2383
2799 /* tried to restart and config the device for as long as our 2384 IWL_ERR(priv, "Unable to initialize device.\n");
2800 * patience could withstand */ 2385 return ret;
2801 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2802 return -EIO;
2803} 2386}
2804 2387
2805 2388
@@ -2809,36 +2392,6 @@ static int __iwl_up(struct iwl_priv *priv)
2809 * 2392 *
2810 *****************************************************************************/ 2393 *****************************************************************************/
2811 2394
2812static void iwl_bg_init_alive_start(struct work_struct *data)
2813{
2814 struct iwl_priv *priv =
2815 container_of(data, struct iwl_priv, init_alive_start.work);
2816
2817 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2818 return;
2819
2820 mutex_lock(&priv->mutex);
2821 priv->cfg->ops->lib->init_alive_start(priv);
2822 mutex_unlock(&priv->mutex);
2823}
2824
2825static void iwl_bg_alive_start(struct work_struct *data)
2826{
2827 struct iwl_priv *priv =
2828 container_of(data, struct iwl_priv, alive_start.work);
2829
2830 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2831 return;
2832
2833 /* enable dram interrupt */
2834 if (priv->cfg->ops->lib->isr_ops.reset)
2835 priv->cfg->ops->lib->isr_ops.reset(priv);
2836
2837 mutex_lock(&priv->mutex);
2838 iwl_alive_start(priv);
2839 mutex_unlock(&priv->mutex);
2840}
2841
2842static void iwl_bg_run_time_calib_work(struct work_struct *work) 2395static void iwl_bg_run_time_calib_work(struct work_struct *work)
2843{ 2396{
2844 struct iwl_priv *priv = container_of(work, struct iwl_priv, 2397 struct iwl_priv *priv = container_of(work, struct iwl_priv,
@@ -2853,22 +2406,49 @@ static void iwl_bg_run_time_calib_work(struct work_struct *work)
2853 } 2406 }
2854 2407
2855 if (priv->start_calib) { 2408 if (priv->start_calib) {
2856 if (iwl_bt_statistics(priv)) { 2409 iwl_chain_noise_calibration(priv);
2857 iwl_chain_noise_calibration(priv, 2410 iwl_sensitivity_calibration(priv);
2858 (void *)&priv->_agn.statistics_bt);
2859 iwl_sensitivity_calibration(priv,
2860 (void *)&priv->_agn.statistics_bt);
2861 } else {
2862 iwl_chain_noise_calibration(priv,
2863 (void *)&priv->_agn.statistics);
2864 iwl_sensitivity_calibration(priv,
2865 (void *)&priv->_agn.statistics);
2866 }
2867 } 2411 }
2868 2412
2869 mutex_unlock(&priv->mutex); 2413 mutex_unlock(&priv->mutex);
2870} 2414}
2871 2415
2416static void iwlagn_prepare_restart(struct iwl_priv *priv)
2417{
2418 struct iwl_rxon_context *ctx;
2419 bool bt_full_concurrent;
2420 u8 bt_ci_compliance;
2421 u8 bt_load;
2422 u8 bt_status;
2423
2424 lockdep_assert_held(&priv->mutex);
2425
2426 for_each_context(priv, ctx)
2427 ctx->vif = NULL;
2428 priv->is_open = 0;
2429
2430 /*
2431 * __iwl_down() will clear the BT status variables,
2432 * which is correct, but when we restart we really
2433 * want to keep them so restore them afterwards.
2434 *
2435 * The restart process will later pick them up and
2436 * re-configure the hw when we reconfigure the BT
2437 * command.
2438 */
2439 bt_full_concurrent = priv->bt_full_concurrent;
2440 bt_ci_compliance = priv->bt_ci_compliance;
2441 bt_load = priv->bt_traffic_load;
2442 bt_status = priv->bt_status;
2443
2444 __iwl_down(priv);
2445
2446 priv->bt_full_concurrent = bt_full_concurrent;
2447 priv->bt_ci_compliance = bt_ci_compliance;
2448 priv->bt_traffic_load = bt_load;
2449 priv->bt_status = bt_status;
2450}
2451
2872static void iwl_bg_restart(struct work_struct *data) 2452static void iwl_bg_restart(struct work_struct *data)
2873{ 2453{
2874 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart); 2454 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
@@ -2877,50 +2457,13 @@ static void iwl_bg_restart(struct work_struct *data)
2877 return; 2457 return;
2878 2458
2879 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) { 2459 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2880 struct iwl_rxon_context *ctx;
2881 bool bt_full_concurrent;
2882 u8 bt_ci_compliance;
2883 u8 bt_load;
2884 u8 bt_status;
2885
2886 mutex_lock(&priv->mutex); 2460 mutex_lock(&priv->mutex);
2887 for_each_context(priv, ctx) 2461 iwlagn_prepare_restart(priv);
2888 ctx->vif = NULL;
2889 priv->is_open = 0;
2890
2891 /*
2892 * __iwl_down() will clear the BT status variables,
2893 * which is correct, but when we restart we really
2894 * want to keep them so restore them afterwards.
2895 *
2896 * The restart process will later pick them up and
2897 * re-configure the hw when we reconfigure the BT
2898 * command.
2899 */
2900 bt_full_concurrent = priv->bt_full_concurrent;
2901 bt_ci_compliance = priv->bt_ci_compliance;
2902 bt_load = priv->bt_traffic_load;
2903 bt_status = priv->bt_status;
2904
2905 __iwl_down(priv);
2906
2907 priv->bt_full_concurrent = bt_full_concurrent;
2908 priv->bt_ci_compliance = bt_ci_compliance;
2909 priv->bt_traffic_load = bt_load;
2910 priv->bt_status = bt_status;
2911
2912 mutex_unlock(&priv->mutex); 2462 mutex_unlock(&priv->mutex);
2913 iwl_cancel_deferred_work(priv); 2463 iwl_cancel_deferred_work(priv);
2914 ieee80211_restart_hw(priv->hw); 2464 ieee80211_restart_hw(priv->hw);
2915 } else { 2465 } else {
2916 iwl_down(priv); 2466 WARN_ON(1);
2917
2918 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2919 return;
2920
2921 mutex_lock(&priv->mutex);
2922 __iwl_up(priv);
2923 mutex_unlock(&priv->mutex);
2924 } 2467 }
2925} 2468}
2926 2469
@@ -3031,8 +2574,6 @@ unlock:
3031 * 2574 *
3032 *****************************************************************************/ 2575 *****************************************************************************/
3033 2576
3034#define UCODE_READY_TIMEOUT (4 * HZ)
3035
3036/* 2577/*
3037 * Not a mac80211 entry point function, but it fits in with all the 2578 * Not a mac80211 entry point function, but it fits in with all the
3038 * other mac80211 functions grouped here. 2579 * other mac80211 functions grouped here.
@@ -3055,14 +2596,16 @@ static int iwl_mac_setup_register(struct iwl_priv *priv,
3055 2596
3056 hw->max_tx_aggregation_subframes = LINK_QUAL_AGG_FRAME_LIMIT_DEF; 2597 hw->max_tx_aggregation_subframes = LINK_QUAL_AGG_FRAME_LIMIT_DEF;
3057 2598
3058 if (!priv->cfg->base_params->broken_powersave) 2599 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
3059 hw->flags |= IEEE80211_HW_SUPPORTS_PS | 2600 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
3060 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
3061 2601
3062 if (priv->cfg->sku & IWL_SKU_N) 2602 if (priv->cfg->sku & IWL_SKU_N)
3063 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS | 2603 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
3064 IEEE80211_HW_SUPPORTS_STATIC_SMPS; 2604 IEEE80211_HW_SUPPORTS_STATIC_SMPS;
3065 2605
2606 if (capa->flags & IWL_UCODE_TLV_FLAGS_MFP)
2607 hw->flags |= IEEE80211_HW_MFP_CAPABLE;
2608
3066 hw->sta_data_size = sizeof(struct iwl_station_priv); 2609 hw->sta_data_size = sizeof(struct iwl_station_priv);
3067 hw->vif_data_size = sizeof(struct iwl_vif_priv); 2610 hw->vif_data_size = sizeof(struct iwl_vif_priv);
3068 2611
@@ -3112,7 +2655,7 @@ static int iwl_mac_setup_register(struct iwl_priv *priv,
3112} 2655}
3113 2656
3114 2657
3115int iwlagn_mac_start(struct ieee80211_hw *hw) 2658static int iwlagn_mac_start(struct ieee80211_hw *hw)
3116{ 2659{
3117 struct iwl_priv *priv = hw->priv; 2660 struct iwl_priv *priv = hw->priv;
3118 int ret; 2661 int ret;
@@ -3123,37 +2666,23 @@ int iwlagn_mac_start(struct ieee80211_hw *hw)
3123 mutex_lock(&priv->mutex); 2666 mutex_lock(&priv->mutex);
3124 ret = __iwl_up(priv); 2667 ret = __iwl_up(priv);
3125 mutex_unlock(&priv->mutex); 2668 mutex_unlock(&priv->mutex);
3126
3127 if (ret) 2669 if (ret)
3128 return ret; 2670 return ret;
3129 2671
3130 if (iwl_is_rfkill(priv))
3131 goto out;
3132
3133 IWL_DEBUG_INFO(priv, "Start UP work done.\n"); 2672 IWL_DEBUG_INFO(priv, "Start UP work done.\n");
3134 2673
3135 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from 2674 /* Now we should be done, and the READY bit should be set. */
3136 * mac80211 will not be run successfully. */ 2675 if (WARN_ON(!test_bit(STATUS_READY, &priv->status)))
3137 ret = wait_event_interruptible_timeout(priv->wait_command_queue, 2676 ret = -EIO;
3138 test_bit(STATUS_READY, &priv->status),
3139 UCODE_READY_TIMEOUT);
3140 if (!ret) {
3141 if (!test_bit(STATUS_READY, &priv->status)) {
3142 IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
3143 jiffies_to_msecs(UCODE_READY_TIMEOUT));
3144 return -ETIMEDOUT;
3145 }
3146 }
3147 2677
3148 iwlagn_led_enable(priv); 2678 iwlagn_led_enable(priv);
3149 2679
3150out:
3151 priv->is_open = 1; 2680 priv->is_open = 1;
3152 IWL_DEBUG_MAC80211(priv, "leave\n"); 2681 IWL_DEBUG_MAC80211(priv, "leave\n");
3153 return 0; 2682 return 0;
3154} 2683}
3155 2684
3156void iwlagn_mac_stop(struct ieee80211_hw *hw) 2685static void iwlagn_mac_stop(struct ieee80211_hw *hw)
3157{ 2686{
3158 struct iwl_priv *priv = hw->priv; 2687 struct iwl_priv *priv = hw->priv;
3159 2688
@@ -3176,7 +2705,7 @@ void iwlagn_mac_stop(struct ieee80211_hw *hw)
3176 IWL_DEBUG_MAC80211(priv, "leave\n"); 2705 IWL_DEBUG_MAC80211(priv, "leave\n");
3177} 2706}
3178 2707
3179void iwlagn_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb) 2708static void iwlagn_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3180{ 2709{
3181 struct iwl_priv *priv = hw->priv; 2710 struct iwl_priv *priv = hw->priv;
3182 2711
@@ -3191,11 +2720,11 @@ void iwlagn_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3191 IWL_DEBUG_MACDUMP(priv, "leave\n"); 2720 IWL_DEBUG_MACDUMP(priv, "leave\n");
3192} 2721}
3193 2722
3194void iwlagn_mac_update_tkip_key(struct ieee80211_hw *hw, 2723static void iwlagn_mac_update_tkip_key(struct ieee80211_hw *hw,
3195 struct ieee80211_vif *vif, 2724 struct ieee80211_vif *vif,
3196 struct ieee80211_key_conf *keyconf, 2725 struct ieee80211_key_conf *keyconf,
3197 struct ieee80211_sta *sta, 2726 struct ieee80211_sta *sta,
3198 u32 iv32, u16 *phase1key) 2727 u32 iv32, u16 *phase1key)
3199{ 2728{
3200 struct iwl_priv *priv = hw->priv; 2729 struct iwl_priv *priv = hw->priv;
3201 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv; 2730 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
@@ -3208,9 +2737,10 @@ void iwlagn_mac_update_tkip_key(struct ieee80211_hw *hw,
3208 IWL_DEBUG_MAC80211(priv, "leave\n"); 2737 IWL_DEBUG_MAC80211(priv, "leave\n");
3209} 2738}
3210 2739
3211int iwlagn_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, 2740static int iwlagn_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3212 struct ieee80211_vif *vif, struct ieee80211_sta *sta, 2741 struct ieee80211_vif *vif,
3213 struct ieee80211_key_conf *key) 2742 struct ieee80211_sta *sta,
2743 struct ieee80211_key_conf *key)
3214{ 2744{
3215 struct iwl_priv *priv = hw->priv; 2745 struct iwl_priv *priv = hw->priv;
3216 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv; 2746 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
@@ -3221,7 +2751,7 @@ int iwlagn_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3221 2751
3222 IWL_DEBUG_MAC80211(priv, "enter\n"); 2752 IWL_DEBUG_MAC80211(priv, "enter\n");
3223 2753
3224 if (priv->cfg->mod_params->sw_crypto) { 2754 if (iwlagn_mod_params.sw_crypto) {
3225 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n"); 2755 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3226 return -EOPNOTSUPP; 2756 return -EOPNOTSUPP;
3227 } 2757 }
@@ -3285,11 +2815,11 @@ int iwlagn_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3285 return ret; 2815 return ret;
3286} 2816}
3287 2817
3288int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw, 2818static int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw,
3289 struct ieee80211_vif *vif, 2819 struct ieee80211_vif *vif,
3290 enum ieee80211_ampdu_mlme_action action, 2820 enum ieee80211_ampdu_mlme_action action,
3291 struct ieee80211_sta *sta, u16 tid, u16 *ssn, 2821 struct ieee80211_sta *sta, u16 tid, u16 *ssn,
3292 u8 buf_size) 2822 u8 buf_size)
3293{ 2823{
3294 struct iwl_priv *priv = hw->priv; 2824 struct iwl_priv *priv = hw->priv;
3295 int ret = -EINVAL; 2825 int ret = -EINVAL;
@@ -3348,6 +2878,10 @@ int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw,
3348 } 2878 }
3349 break; 2879 break;
3350 case IEEE80211_AMPDU_TX_OPERATIONAL: 2880 case IEEE80211_AMPDU_TX_OPERATIONAL:
2881 buf_size = min_t(int, buf_size, LINK_QUAL_AGG_FRAME_LIMIT_DEF);
2882
2883 iwlagn_txq_agg_queue_setup(priv, sta, tid, buf_size);
2884
3351 /* 2885 /*
3352 * If the limit is 0, then it wasn't initialised yet, 2886 * If the limit is 0, then it wasn't initialised yet,
3353 * use the default. We can do that since we take the 2887 * use the default. We can do that since we take the
@@ -3392,9 +2926,9 @@ int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw,
3392 return ret; 2926 return ret;
3393} 2927}
3394 2928
3395int iwlagn_mac_sta_add(struct ieee80211_hw *hw, 2929static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3396 struct ieee80211_vif *vif, 2930 struct ieee80211_vif *vif,
3397 struct ieee80211_sta *sta) 2931 struct ieee80211_sta *sta)
3398{ 2932{
3399 struct iwl_priv *priv = hw->priv; 2933 struct iwl_priv *priv = hw->priv;
3400 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv; 2934 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
@@ -3435,8 +2969,8 @@ int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3435 return 0; 2969 return 0;
3436} 2970}
3437 2971
3438void iwlagn_mac_channel_switch(struct ieee80211_hw *hw, 2972static void iwlagn_mac_channel_switch(struct ieee80211_hw *hw,
3439 struct ieee80211_channel_switch *ch_switch) 2973 struct ieee80211_channel_switch *ch_switch)
3440{ 2974{
3441 struct iwl_priv *priv = hw->priv; 2975 struct iwl_priv *priv = hw->priv;
3442 const struct iwl_channel_info *ch_info; 2976 const struct iwl_channel_info *ch_info;
@@ -3457,21 +2991,22 @@ void iwlagn_mac_channel_switch(struct ieee80211_hw *hw,
3457 2991
3458 IWL_DEBUG_MAC80211(priv, "enter\n"); 2992 IWL_DEBUG_MAC80211(priv, "enter\n");
3459 2993
2994 mutex_lock(&priv->mutex);
2995
3460 if (iwl_is_rfkill(priv)) 2996 if (iwl_is_rfkill(priv))
3461 goto out_exit; 2997 goto out;
3462 2998
3463 if (test_bit(STATUS_EXIT_PENDING, &priv->status) || 2999 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3464 test_bit(STATUS_SCANNING, &priv->status)) 3000 test_bit(STATUS_SCANNING, &priv->status))
3465 goto out_exit; 3001 goto out;
3466 3002
3467 if (!iwl_is_associated_ctx(ctx)) 3003 if (!iwl_is_associated_ctx(ctx))
3468 goto out_exit; 3004 goto out;
3469 3005
3470 /* channel switch in progress */ 3006 /* channel switch in progress */
3471 if (priv->switch_rxon.switch_in_progress == true) 3007 if (priv->switch_rxon.switch_in_progress == true)
3472 goto out_exit; 3008 goto out;
3473 3009
3474 mutex_lock(&priv->mutex);
3475 if (priv->cfg->ops->lib->set_channel_switch) { 3010 if (priv->cfg->ops->lib->set_channel_switch) {
3476 3011
3477 ch = channel->hw_value; 3012 ch = channel->hw_value;
@@ -3527,16 +3062,15 @@ void iwlagn_mac_channel_switch(struct ieee80211_hw *hw,
3527 } 3062 }
3528out: 3063out:
3529 mutex_unlock(&priv->mutex); 3064 mutex_unlock(&priv->mutex);
3530out_exit:
3531 if (!priv->switch_rxon.switch_in_progress) 3065 if (!priv->switch_rxon.switch_in_progress)
3532 ieee80211_chswitch_done(ctx->vif, false); 3066 ieee80211_chswitch_done(ctx->vif, false);
3533 IWL_DEBUG_MAC80211(priv, "leave\n"); 3067 IWL_DEBUG_MAC80211(priv, "leave\n");
3534} 3068}
3535 3069
3536void iwlagn_configure_filter(struct ieee80211_hw *hw, 3070static void iwlagn_configure_filter(struct ieee80211_hw *hw,
3537 unsigned int changed_flags, 3071 unsigned int changed_flags,
3538 unsigned int *total_flags, 3072 unsigned int *total_flags,
3539 u64 multicast) 3073 u64 multicast)
3540{ 3074{
3541 struct iwl_priv *priv = hw->priv; 3075 struct iwl_priv *priv = hw->priv;
3542 __le32 filter_or = 0, filter_nand = 0; 3076 __le32 filter_or = 0, filter_nand = 0;
@@ -3583,7 +3117,7 @@ void iwlagn_configure_filter(struct ieee80211_hw *hw,
3583 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL; 3117 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
3584} 3118}
3585 3119
3586void iwlagn_mac_flush(struct ieee80211_hw *hw, bool drop) 3120static void iwlagn_mac_flush(struct ieee80211_hw *hw, bool drop)
3587{ 3121{
3588 struct iwl_priv *priv = hw->priv; 3122 struct iwl_priv *priv = hw->priv;
3589 3123
@@ -3729,8 +3263,6 @@ static void iwl_setup_deferred_work(struct iwl_priv *priv)
3729 INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush); 3263 INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush);
3730 INIT_WORK(&priv->bt_full_concurrency, iwl_bg_bt_full_concurrency); 3264 INIT_WORK(&priv->bt_full_concurrency, iwl_bg_bt_full_concurrency);
3731 INIT_WORK(&priv->bt_runtime_config, iwl_bg_bt_runtime_config); 3265 INIT_WORK(&priv->bt_runtime_config, iwl_bg_bt_runtime_config);
3732 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start);
3733 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start);
3734 INIT_DELAYED_WORK(&priv->_agn.hw_roc_work, iwlagn_bg_roc_done); 3266 INIT_DELAYED_WORK(&priv->_agn.hw_roc_work, iwlagn_bg_roc_done);
3735 3267
3736 iwl_setup_scan_deferred_work(priv); 3268 iwl_setup_scan_deferred_work(priv);
@@ -3750,12 +3282,8 @@ static void iwl_setup_deferred_work(struct iwl_priv *priv)
3750 priv->watchdog.data = (unsigned long)priv; 3282 priv->watchdog.data = (unsigned long)priv;
3751 priv->watchdog.function = iwl_bg_watchdog; 3283 priv->watchdog.function = iwl_bg_watchdog;
3752 3284
3753 if (!priv->cfg->base_params->use_isr_legacy) 3285 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3754 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long)) 3286 iwl_irq_tasklet, (unsigned long)priv);
3755 iwl_irq_tasklet, (unsigned long)priv);
3756 else
3757 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3758 iwl_irq_tasklet_legacy, (unsigned long)priv);
3759} 3287}
3760 3288
3761static void iwl_cancel_deferred_work(struct iwl_priv *priv) 3289static void iwl_cancel_deferred_work(struct iwl_priv *priv)
@@ -3763,8 +3291,6 @@ static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3763 if (priv->cfg->ops->lib->cancel_deferred_work) 3291 if (priv->cfg->ops->lib->cancel_deferred_work)
3764 priv->cfg->ops->lib->cancel_deferred_work(priv); 3292 priv->cfg->ops->lib->cancel_deferred_work(priv);
3765 3293
3766 cancel_delayed_work_sync(&priv->init_alive_start);
3767 cancel_delayed_work(&priv->alive_start);
3768 cancel_work_sync(&priv->run_time_calib_work); 3294 cancel_work_sync(&priv->run_time_calib_work);
3769 cancel_work_sync(&priv->beacon_update); 3295 cancel_work_sync(&priv->beacon_update);
3770 3296
@@ -3805,10 +3331,7 @@ static int iwl_init_drv(struct iwl_priv *priv)
3805 spin_lock_init(&priv->sta_lock); 3331 spin_lock_init(&priv->sta_lock);
3806 spin_lock_init(&priv->hcmd_lock); 3332 spin_lock_init(&priv->hcmd_lock);
3807 3333
3808 INIT_LIST_HEAD(&priv->free_frames);
3809
3810 mutex_init(&priv->mutex); 3334 mutex_init(&priv->mutex);
3811 mutex_init(&priv->sync_cmd_mutex);
3812 3335
3813 priv->ieee_channels = NULL; 3336 priv->ieee_channels = NULL;
3814 priv->ieee_rates = NULL; 3337 priv->ieee_rates = NULL;
@@ -3845,12 +3368,6 @@ static int iwl_init_drv(struct iwl_priv *priv)
3845 priv->dynamic_frag_thresh = BT_FRAG_THRESHOLD_DEF; 3368 priv->dynamic_frag_thresh = BT_FRAG_THRESHOLD_DEF;
3846 } 3369 }
3847 3370
3848 /* Set the tx_power_user_lmt to the lowest power level
3849 * this value will get overwritten by channel max power avg
3850 * from eeprom */
3851 priv->tx_power_user_lmt = IWLAGN_TX_POWER_TARGET_POWER_MIN;
3852 priv->tx_power_next = IWLAGN_TX_POWER_TARGET_POWER_MIN;
3853
3854 ret = iwl_init_channel_map(priv); 3371 ret = iwl_init_channel_map(priv);
3855 if (ret) { 3372 if (ret) {
3856 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret); 3373 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
@@ -3905,28 +3422,30 @@ struct ieee80211_ops iwlagn_hw_ops = {
3905 .cancel_remain_on_channel = iwl_mac_cancel_remain_on_channel, 3422 .cancel_remain_on_channel = iwl_mac_cancel_remain_on_channel,
3906 .offchannel_tx = iwl_mac_offchannel_tx, 3423 .offchannel_tx = iwl_mac_offchannel_tx,
3907 .offchannel_tx_cancel_wait = iwl_mac_offchannel_tx_cancel_wait, 3424 .offchannel_tx_cancel_wait = iwl_mac_offchannel_tx_cancel_wait,
3425 CFG80211_TESTMODE_CMD(iwl_testmode_cmd)
3908}; 3426};
3909 3427
3910static void iwl_hw_detect(struct iwl_priv *priv) 3428static u32 iwl_hw_detect(struct iwl_priv *priv)
3911{ 3429{
3912 priv->hw_rev = _iwl_read32(priv, CSR_HW_REV); 3430 u8 rev_id;
3913 priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG); 3431
3914 priv->rev_id = priv->pci_dev->revision; 3432 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
3915 IWL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", priv->rev_id); 3433 IWL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", rev_id);
3434 return iwl_read32(priv, CSR_HW_REV);
3916} 3435}
3917 3436
3918static int iwl_set_hw_params(struct iwl_priv *priv) 3437static int iwl_set_hw_params(struct iwl_priv *priv)
3919{ 3438{
3920 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE; 3439 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
3921 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG; 3440 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
3922 if (priv->cfg->mod_params->amsdu_size_8K) 3441 if (iwlagn_mod_params.amsdu_size_8K)
3923 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K); 3442 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
3924 else 3443 else
3925 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K); 3444 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
3926 3445
3927 priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL; 3446 priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
3928 3447
3929 if (priv->cfg->mod_params->disable_11n) 3448 if (iwlagn_mod_params.disable_11n)
3930 priv->cfg->sku &= ~IWL_SKU_N; 3449 priv->cfg->sku &= ~IWL_SKU_N;
3931 3450
3932 /* Device-specific setup */ 3451 /* Device-specific setup */
@@ -3955,6 +3474,28 @@ static const u8 iwlagn_pan_ac_to_queue[] = {
3955 7, 6, 5, 4, 3474 7, 6, 5, 4,
3956}; 3475};
3957 3476
3477/* This function both allocates and initializes hw and priv. */
3478static struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg)
3479{
3480 struct iwl_priv *priv;
3481 /* mac80211 allocates memory for this device instance, including
3482 * space for this driver's private structure */
3483 struct ieee80211_hw *hw;
3484
3485 hw = ieee80211_alloc_hw(sizeof(struct iwl_priv), &iwlagn_hw_ops);
3486 if (hw == NULL) {
3487 pr_err("%s: Can not allocate network device\n",
3488 cfg->name);
3489 goto out;
3490 }
3491
3492 priv = hw->priv;
3493 priv->hw = hw;
3494
3495out:
3496 return hw;
3497}
3498
3958static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 3499static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3959{ 3500{
3960 int err = 0, i; 3501 int err = 0, i;
@@ -3963,19 +3504,12 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3963 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data); 3504 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3964 unsigned long flags; 3505 unsigned long flags;
3965 u16 pci_cmd, num_mac; 3506 u16 pci_cmd, num_mac;
3507 u32 hw_rev;
3966 3508
3967 /************************ 3509 /************************
3968 * 1. Allocating HW data 3510 * 1. Allocating HW data
3969 ************************/ 3511 ************************/
3970 3512
3971 /* Disabling hardware scan means that mac80211 will perform scans
3972 * "the hard way", rather than using device's scan. */
3973 if (cfg->mod_params->disable_hw_scan) {
3974 dev_printk(KERN_DEBUG, &(pdev->dev),
3975 "sw scan support is deprecated\n");
3976 iwlagn_hw_ops.hw_scan = NULL;
3977 }
3978
3979 hw = iwl_alloc_all(cfg); 3513 hw = iwl_alloc_all(cfg);
3980 if (!hw) { 3514 if (!hw) {
3981 err = -ENOMEM; 3515 err = -ENOMEM;
@@ -3984,6 +3518,8 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3984 priv = hw->priv; 3518 priv = hw->priv;
3985 /* At this point both hw and priv are allocated. */ 3519 /* At this point both hw and priv are allocated. */
3986 3520
3521 priv->ucode_type = UCODE_SUBTYPE_NONE_LOADED;
3522
3987 /* 3523 /*
3988 * The default context is always valid, 3524 * The default context is always valid,
3989 * more may be discovered when firmware 3525 * more may be discovered when firmware
@@ -4116,16 +3652,15 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4116 */ 3652 */
4117 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); 3653 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
4118 3654
4119 iwl_hw_detect(priv); 3655 hw_rev = iwl_hw_detect(priv);
4120 IWL_INFO(priv, "Detected %s, REV=0x%X\n", 3656 IWL_INFO(priv, "Detected %s, REV=0x%X\n",
4121 priv->cfg->name, priv->hw_rev); 3657 priv->cfg->name, hw_rev);
4122 3658
4123 /* We disable the RETRY_TIMEOUT register (0x41) to keep 3659 /* We disable the RETRY_TIMEOUT register (0x41) to keep
4124 * PCI Tx retries from interfering with C3 CPU state */ 3660 * PCI Tx retries from interfering with C3 CPU state */
4125 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00); 3661 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
4126 3662
4127 iwl_prepare_card_hw(priv); 3663 if (iwl_prepare_card_hw(priv)) {
4128 if (!priv->hw_ready) {
4129 IWL_WARN(priv, "Failed, HW not ready\n"); 3664 IWL_WARN(priv, "Failed, HW not ready\n");
4130 goto out_iounmap; 3665 goto out_iounmap;
4131 } 3666 }
@@ -4134,7 +3669,7 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4134 * 4. Read EEPROM 3669 * 4. Read EEPROM
4135 *****************/ 3670 *****************/
4136 /* Read the EEPROM */ 3671 /* Read the EEPROM */
4137 err = iwl_eeprom_init(priv); 3672 err = iwl_eeprom_init(priv, hw_rev);
4138 if (err) { 3673 if (err) {
4139 IWL_ERR(priv, "Unable to init EEPROM\n"); 3674 IWL_ERR(priv, "Unable to init EEPROM\n");
4140 goto out_iounmap; 3675 goto out_iounmap;
@@ -4186,10 +3721,9 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4186 3721
4187 pci_enable_msi(priv->pci_dev); 3722 pci_enable_msi(priv->pci_dev);
4188 3723
4189 if (priv->cfg->ops->lib->isr_ops.alloc) 3724 iwl_alloc_isr_ict(priv);
4190 priv->cfg->ops->lib->isr_ops.alloc(priv);
4191 3725
4192 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr_ops.isr, 3726 err = request_irq(priv->pci_dev->irq, iwl_isr_ict,
4193 IRQF_SHARED, DRV_NAME, priv); 3727 IRQF_SHARED, DRV_NAME, priv);
4194 if (err) { 3728 if (err) {
4195 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq); 3729 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
@@ -4198,6 +3732,7 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4198 3732
4199 iwl_setup_deferred_work(priv); 3733 iwl_setup_deferred_work(priv);
4200 iwl_setup_rx_handlers(priv); 3734 iwl_setup_rx_handlers(priv);
3735 iwl_testmode_init(priv);
4201 3736
4202 /********************************************* 3737 /*********************************************
4203 * 8. Enable interrupts and read RFKILL state 3738 * 8. Enable interrupts and read RFKILL state
@@ -4236,8 +3771,7 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4236 destroy_workqueue(priv->workqueue); 3771 destroy_workqueue(priv->workqueue);
4237 priv->workqueue = NULL; 3772 priv->workqueue = NULL;
4238 free_irq(priv->pci_dev->irq, priv); 3773 free_irq(priv->pci_dev->irq, priv);
4239 if (priv->cfg->ops->lib->isr_ops.free) 3774 iwl_free_isr_ict(priv);
4240 priv->cfg->ops->lib->isr_ops.free(priv);
4241 out_disable_msi: 3775 out_disable_msi:
4242 pci_disable_msi(priv->pci_dev); 3776 pci_disable_msi(priv->pci_dev);
4243 iwl_uninit_drv(priv); 3777 iwl_uninit_drv(priv);
@@ -4283,17 +3817,9 @@ static void __devexit iwl_pci_remove(struct pci_dev *pdev)
4283 if (priv->mac80211_registered) { 3817 if (priv->mac80211_registered) {
4284 ieee80211_unregister_hw(priv->hw); 3818 ieee80211_unregister_hw(priv->hw);
4285 priv->mac80211_registered = 0; 3819 priv->mac80211_registered = 0;
4286 } else {
4287 iwl_down(priv);
4288 } 3820 }
4289 3821
4290 /* 3822 /* Reset to low power before unloading driver. */
4291 * Make sure device is reset to low power before unloading driver.
4292 * This may be redundant with iwl_down(), but there are paths to
4293 * run iwl_down() without calling apm_ops.stop(), and there are
4294 * paths to avoid running iwl_down() at all before leaving driver.
4295 * This (inexpensive) call *makes sure* device is reset.
4296 */
4297 iwl_apm_stop(priv); 3823 iwl_apm_stop(priv);
4298 3824
4299 iwl_tt_exit(priv); 3825 iwl_tt_exit(priv);
@@ -4335,8 +3861,7 @@ static void __devexit iwl_pci_remove(struct pci_dev *pdev)
4335 3861
4336 iwl_uninit_drv(priv); 3862 iwl_uninit_drv(priv);
4337 3863
4338 if (priv->cfg->ops->lib->isr_ops.free) 3864 iwl_free_isr_ict(priv);
4339 priv->cfg->ops->lib->isr_ops.free(priv);
4340 3865
4341 dev_kfree_skb(priv->beacon_skb); 3866 dev_kfree_skb(priv->beacon_skb);
4342 3867
@@ -4521,21 +4046,21 @@ static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
4521 {IWL_PCI_DEVICE(0x088F, 0x4266, iwl6035_2bg_cfg)}, 4046 {IWL_PCI_DEVICE(0x088F, 0x4266, iwl6035_2bg_cfg)},
4522 {IWL_PCI_DEVICE(0x088E, 0x4466, iwl6035_2bg_cfg)}, 4047 {IWL_PCI_DEVICE(0x088E, 0x4466, iwl6035_2bg_cfg)},
4523 4048
4524/* 200 Series */ 4049/* 105 Series */
4525 {IWL_PCI_DEVICE(0x0894, 0x0022, iwl200_bgn_cfg)}, 4050 {IWL_PCI_DEVICE(0x0894, 0x0022, iwl105_bgn_cfg)},
4526 {IWL_PCI_DEVICE(0x0895, 0x0222, iwl200_bgn_cfg)}, 4051 {IWL_PCI_DEVICE(0x0895, 0x0222, iwl105_bgn_cfg)},
4527 {IWL_PCI_DEVICE(0x0894, 0x0422, iwl200_bgn_cfg)}, 4052 {IWL_PCI_DEVICE(0x0894, 0x0422, iwl105_bgn_cfg)},
4528 {IWL_PCI_DEVICE(0x0894, 0x0026, iwl200_bg_cfg)}, 4053 {IWL_PCI_DEVICE(0x0894, 0x0026, iwl105_bg_cfg)},
4529 {IWL_PCI_DEVICE(0x0895, 0x0226, iwl200_bg_cfg)}, 4054 {IWL_PCI_DEVICE(0x0895, 0x0226, iwl105_bg_cfg)},
4530 {IWL_PCI_DEVICE(0x0894, 0x0426, iwl200_bg_cfg)}, 4055 {IWL_PCI_DEVICE(0x0894, 0x0426, iwl105_bg_cfg)},
4531 4056
4532/* 230 Series */ 4057/* 135 Series */
4533 {IWL_PCI_DEVICE(0x0892, 0x0062, iwl230_bgn_cfg)}, 4058 {IWL_PCI_DEVICE(0x0892, 0x0062, iwl135_bgn_cfg)},
4534 {IWL_PCI_DEVICE(0x0893, 0x0262, iwl230_bgn_cfg)}, 4059 {IWL_PCI_DEVICE(0x0893, 0x0262, iwl135_bgn_cfg)},
4535 {IWL_PCI_DEVICE(0x0892, 0x0462, iwl230_bgn_cfg)}, 4060 {IWL_PCI_DEVICE(0x0892, 0x0462, iwl135_bgn_cfg)},
4536 {IWL_PCI_DEVICE(0x0892, 0x0066, iwl230_bg_cfg)}, 4061 {IWL_PCI_DEVICE(0x0892, 0x0066, iwl135_bg_cfg)},
4537 {IWL_PCI_DEVICE(0x0893, 0x0266, iwl230_bg_cfg)}, 4062 {IWL_PCI_DEVICE(0x0893, 0x0266, iwl135_bg_cfg)},
4538 {IWL_PCI_DEVICE(0x0892, 0x0466, iwl230_bg_cfg)}, 4063 {IWL_PCI_DEVICE(0x0892, 0x0466, iwl135_bg_cfg)},
4539 4064
4540 {0} 4065 {0}
4541}; 4066};
@@ -4585,43 +4110,21 @@ module_exit(iwl_exit);
4585module_init(iwl_init); 4110module_init(iwl_init);
4586 4111
4587#ifdef CONFIG_IWLWIFI_DEBUG 4112#ifdef CONFIG_IWLWIFI_DEBUG
4588module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
4589MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
4590module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR); 4113module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
4591MODULE_PARM_DESC(debug, "debug output mask"); 4114MODULE_PARM_DESC(debug, "debug output mask");
4592#endif 4115#endif
4593 4116
4594module_param_named(swcrypto50, iwlagn_mod_params.sw_crypto, bool, S_IRUGO);
4595MODULE_PARM_DESC(swcrypto50,
4596 "using crypto in software (default 0 [hardware]) (deprecated)");
4597module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO); 4117module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
4598MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])"); 4118MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
4599module_param_named(queues_num50,
4600 iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4601MODULE_PARM_DESC(queues_num50,
4602 "number of hw queues in 50xx series (deprecated)");
4603module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO); 4119module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4604MODULE_PARM_DESC(queues_num, "number of hw queues."); 4120MODULE_PARM_DESC(queues_num, "number of hw queues.");
4605module_param_named(11n_disable50, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4606MODULE_PARM_DESC(11n_disable50, "disable 50XX 11n functionality (deprecated)");
4607module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO); 4121module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4608MODULE_PARM_DESC(11n_disable, "disable 11n functionality"); 4122MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
4609module_param_named(amsdu_size_8K50, iwlagn_mod_params.amsdu_size_8K,
4610 int, S_IRUGO);
4611MODULE_PARM_DESC(amsdu_size_8K50,
4612 "enable 8K amsdu size in 50XX series (deprecated)");
4613module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K, 4123module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
4614 int, S_IRUGO); 4124 int, S_IRUGO);
4615MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size"); 4125MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
4616module_param_named(fw_restart50, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4617MODULE_PARM_DESC(fw_restart50,
4618 "restart firmware in case of error (deprecated)");
4619module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO); 4126module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4620MODULE_PARM_DESC(fw_restart, "restart firmware in case of error"); 4127MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
4621module_param_named(
4622 disable_hw_scan, iwlagn_mod_params.disable_hw_scan, int, S_IRUGO);
4623MODULE_PARM_DESC(disable_hw_scan,
4624 "disable hardware scanning (default 0) (deprecated)");
4625 4128
4626module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int, 4129module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int,
4627 S_IRUGO); 4130 S_IRUGO);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-14 22:40:35 -0500