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path: root/drivers/net/wireless/iwlwifi/iwl-agn.c
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Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-agn.c')
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn.c2885
1 files changed, 1193 insertions, 1692 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.c b/drivers/net/wireless/iwlwifi/iwl-agn.c
index 10d7b9b7f064..8e1942ebd9a0 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn.c
@@ -1,6 +1,6 @@
1/****************************************************************************** 1/******************************************************************************
2 * 2 *
3 * Copyright(c) 2003 - 2010 Intel Corporation. All rights reserved. 3 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
4 * 4 *
5 * Portions of this file are derived from the ipw3945 project, as well 5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files. 6 * as portions of the ieee80211 subsystem header files.
@@ -33,6 +33,7 @@
33#include <linux/module.h> 33#include <linux/module.h>
34#include <linux/init.h> 34#include <linux/init.h>
35#include <linux/pci.h> 35#include <linux/pci.h>
36#include <linux/pci-aspm.h>
36#include <linux/slab.h> 37#include <linux/slab.h>
37#include <linux/dma-mapping.h> 38#include <linux/dma-mapping.h>
38#include <linux/delay.h> 39#include <linux/delay.h>
@@ -56,7 +57,7 @@
56#include "iwl-io.h" 57#include "iwl-io.h"
57#include "iwl-helpers.h" 58#include "iwl-helpers.h"
58#include "iwl-sta.h" 59#include "iwl-sta.h"
59#include "iwl-calib.h" 60#include "iwl-agn-calib.h"
60#include "iwl-agn.h" 61#include "iwl-agn.h"
61 62
62 63
@@ -84,224 +85,27 @@ MODULE_DESCRIPTION(DRV_DESCRIPTION);
84MODULE_VERSION(DRV_VERSION); 85MODULE_VERSION(DRV_VERSION);
85MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR); 86MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
86MODULE_LICENSE("GPL"); 87MODULE_LICENSE("GPL");
87MODULE_ALIAS("iwl4965");
88 88
89/** 89static int iwlagn_ant_coupling;
90 * iwl_commit_rxon - commit staging_rxon to hardware 90static bool iwlagn_bt_ch_announce = 1;
91 *
92 * The RXON command in staging_rxon is committed to the hardware and
93 * the active_rxon structure is updated with the new data. This
94 * function correctly transitions out of the RXON_ASSOC_MSK state if
95 * a HW tune is required based on the RXON structure changes.
96 */
97int iwl_commit_rxon(struct iwl_priv *priv)
98{
99 /* cast away the const for active_rxon in this function */
100 struct iwl_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
101 int ret;
102 bool new_assoc =
103 !!(priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK);
104
105 if (!iwl_is_alive(priv))
106 return -EBUSY;
107
108 /* always get timestamp with Rx frame */
109 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
110
111 ret = iwl_check_rxon_cmd(priv);
112 if (ret) {
113 IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
114 return -EINVAL;
115 }
116
117 /*
118 * receive commit_rxon request
119 * abort any previous channel switch if still in process
120 */
121 if (priv->switch_rxon.switch_in_progress &&
122 (priv->switch_rxon.channel != priv->staging_rxon.channel)) {
123 IWL_DEBUG_11H(priv, "abort channel switch on %d\n",
124 le16_to_cpu(priv->switch_rxon.channel));
125 iwl_chswitch_done(priv, false);
126 }
127
128 /* If we don't need to send a full RXON, we can use
129 * iwl_rxon_assoc_cmd which is used to reconfigure filter
130 * and other flags for the current radio configuration. */
131 if (!iwl_full_rxon_required(priv)) {
132 ret = iwl_send_rxon_assoc(priv);
133 if (ret) {
134 IWL_ERR(priv, "Error setting RXON_ASSOC (%d)\n", ret);
135 return ret;
136 }
137
138 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
139 iwl_print_rx_config_cmd(priv);
140 return 0;
141 }
142
143 /* If we are currently associated and the new config requires
144 * an RXON_ASSOC and the new config wants the associated mask enabled,
145 * we must clear the associated from the active configuration
146 * before we apply the new config */
147 if (iwl_is_associated(priv) && new_assoc) {
148 IWL_DEBUG_INFO(priv, "Toggling associated bit on current RXON\n");
149 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
150
151 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
152 sizeof(struct iwl_rxon_cmd),
153 &priv->active_rxon);
154
155 /* If the mask clearing failed then we set
156 * active_rxon back to what it was previously */
157 if (ret) {
158 active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
159 IWL_ERR(priv, "Error clearing ASSOC_MSK (%d)\n", ret);
160 return ret;
161 }
162 iwl_clear_ucode_stations(priv);
163 iwl_restore_stations(priv);
164 ret = iwl_restore_default_wep_keys(priv);
165 if (ret) {
166 IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
167 return ret;
168 }
169 }
170
171 IWL_DEBUG_INFO(priv, "Sending RXON\n"
172 "* with%s RXON_FILTER_ASSOC_MSK\n"
173 "* channel = %d\n"
174 "* bssid = %pM\n",
175 (new_assoc ? "" : "out"),
176 le16_to_cpu(priv->staging_rxon.channel),
177 priv->staging_rxon.bssid_addr);
178
179 iwl_set_rxon_hwcrypto(priv, !priv->cfg->mod_params->sw_crypto);
180
181 /* Apply the new configuration
182 * RXON unassoc clears the station table in uCode so restoration of
183 * stations is needed after it (the RXON command) completes
184 */
185 if (!new_assoc) {
186 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
187 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
188 if (ret) {
189 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
190 return ret;
191 }
192 IWL_DEBUG_INFO(priv, "Return from !new_assoc RXON.\n");
193 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
194 iwl_clear_ucode_stations(priv);
195 iwl_restore_stations(priv);
196 ret = iwl_restore_default_wep_keys(priv);
197 if (ret) {
198 IWL_ERR(priv, "Failed to restore WEP keys (%d)\n", ret);
199 return ret;
200 }
201 }
202
203 priv->start_calib = 0;
204 if (new_assoc) {
205 /* Apply the new configuration
206 * RXON assoc doesn't clear the station table in uCode,
207 */
208 ret = iwl_send_cmd_pdu(priv, REPLY_RXON,
209 sizeof(struct iwl_rxon_cmd), &priv->staging_rxon);
210 if (ret) {
211 IWL_ERR(priv, "Error setting new RXON (%d)\n", ret);
212 return ret;
213 }
214 memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
215 }
216 iwl_print_rx_config_cmd(priv);
217
218 iwl_init_sensitivity(priv);
219
220 /* If we issue a new RXON command which required a tune then we must
221 * send a new TXPOWER command or we won't be able to Tx any frames */
222 ret = iwl_set_tx_power(priv, priv->tx_power_user_lmt, true);
223 if (ret) {
224 IWL_ERR(priv, "Error sending TX power (%d)\n", ret);
225 return ret;
226 }
227
228 return 0;
229}
230 91
231void iwl_update_chain_flags(struct iwl_priv *priv) 92void iwl_update_chain_flags(struct iwl_priv *priv)
232{ 93{
94 struct iwl_rxon_context *ctx;
233 95
234 if (priv->cfg->ops->hcmd->set_rxon_chain) 96 if (priv->cfg->ops->hcmd->set_rxon_chain) {
235 priv->cfg->ops->hcmd->set_rxon_chain(priv); 97 for_each_context(priv, ctx) {
236 iwlcore_commit_rxon(priv); 98 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
237} 99 if (ctx->active.rx_chain != ctx->staging.rx_chain)
238 100 iwlcore_commit_rxon(priv, ctx);
239static void iwl_clear_free_frames(struct iwl_priv *priv)
240{
241 struct list_head *element;
242
243 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
244 priv->frames_count);
245
246 while (!list_empty(&priv->free_frames)) {
247 element = priv->free_frames.next;
248 list_del(element);
249 kfree(list_entry(element, struct iwl_frame, list));
250 priv->frames_count--;
251 }
252
253 if (priv->frames_count) {
254 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
255 priv->frames_count);
256 priv->frames_count = 0;
257 }
258}
259
260static struct iwl_frame *iwl_get_free_frame(struct iwl_priv *priv)
261{
262 struct iwl_frame *frame;
263 struct list_head *element;
264 if (list_empty(&priv->free_frames)) {
265 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
266 if (!frame) {
267 IWL_ERR(priv, "Could not allocate frame!\n");
268 return NULL;
269 } 101 }
270
271 priv->frames_count++;
272 return frame;
273 } 102 }
274
275 element = priv->free_frames.next;
276 list_del(element);
277 return list_entry(element, struct iwl_frame, list);
278}
279
280static void iwl_free_frame(struct iwl_priv *priv, struct iwl_frame *frame)
281{
282 memset(frame, 0, sizeof(*frame));
283 list_add(&frame->list, &priv->free_frames);
284}
285
286static u32 iwl_fill_beacon_frame(struct iwl_priv *priv,
287 struct ieee80211_hdr *hdr,
288 int left)
289{
290 if (!priv->ibss_beacon)
291 return 0;
292
293 if (priv->ibss_beacon->len > left)
294 return 0;
295
296 memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
297
298 return priv->ibss_beacon->len;
299} 103}
300 104
301/* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */ 105/* Parse the beacon frame to find the TIM element and set tim_idx & tim_size */
302static void iwl_set_beacon_tim(struct iwl_priv *priv, 106static void iwl_set_beacon_tim(struct iwl_priv *priv,
303 struct iwl_tx_beacon_cmd *tx_beacon_cmd, 107 struct iwl_tx_beacon_cmd *tx_beacon_cmd,
304 u8 *beacon, u32 frame_size) 108 u8 *beacon, u32 frame_size)
305{ 109{
306 u16 tim_idx; 110 u16 tim_idx;
307 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon; 111 struct ieee80211_mgmt *mgmt = (struct ieee80211_mgmt *)beacon;
@@ -325,41 +129,53 @@ static void iwl_set_beacon_tim(struct iwl_priv *priv,
325 IWL_WARN(priv, "Unable to find TIM Element in beacon\n"); 129 IWL_WARN(priv, "Unable to find TIM Element in beacon\n");
326} 130}
327 131
328static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv, 132int iwlagn_send_beacon_cmd(struct iwl_priv *priv)
329 struct iwl_frame *frame)
330{ 133{
331 struct iwl_tx_beacon_cmd *tx_beacon_cmd; 134 struct iwl_tx_beacon_cmd *tx_beacon_cmd;
135 struct iwl_host_cmd cmd = {
136 .id = REPLY_TX_BEACON,
137 };
332 u32 frame_size; 138 u32 frame_size;
333 u32 rate_flags; 139 u32 rate_flags;
334 u32 rate; 140 u32 rate;
141
335 /* 142 /*
336 * We have to set up the TX command, the TX Beacon command, and the 143 * We have to set up the TX command, the TX Beacon command, and the
337 * beacon contents. 144 * beacon contents.
338 */ 145 */
339 146
340 /* Initialize memory */ 147 lockdep_assert_held(&priv->mutex);
341 tx_beacon_cmd = &frame->u.beacon;
342 memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
343 148
344 /* Set up TX beacon contents */ 149 if (!priv->beacon_ctx) {
345 frame_size = iwl_fill_beacon_frame(priv, tx_beacon_cmd->frame, 150 IWL_ERR(priv, "trying to build beacon w/o beacon context!\n");
346 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
347 if (WARN_ON_ONCE(frame_size > MAX_MPDU_SIZE))
348 return 0; 151 return 0;
152 }
153
154 if (WARN_ON(!priv->beacon_skb))
155 return -EINVAL;
156
157 /* Allocate beacon command */
158 if (!priv->beacon_cmd)
159 priv->beacon_cmd = kzalloc(sizeof(*tx_beacon_cmd), GFP_KERNEL);
160 tx_beacon_cmd = priv->beacon_cmd;
161 if (!tx_beacon_cmd)
162 return -ENOMEM;
163
164 frame_size = priv->beacon_skb->len;
349 165
350 /* Set up TX command fields */ 166 /* Set up TX command fields */
351 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size); 167 tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
352 tx_beacon_cmd->tx.sta_id = priv->hw_params.bcast_sta_id; 168 tx_beacon_cmd->tx.sta_id = priv->beacon_ctx->bcast_sta_id;
353 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; 169 tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
354 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK | 170 tx_beacon_cmd->tx.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK |
355 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK; 171 TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK;
356 172
357 /* Set up TX beacon command fields */ 173 /* Set up TX beacon command fields */
358 iwl_set_beacon_tim(priv, tx_beacon_cmd, (u8 *)tx_beacon_cmd->frame, 174 iwl_set_beacon_tim(priv, tx_beacon_cmd, priv->beacon_skb->data,
359 frame_size); 175 frame_size);
360 176
361 /* Set up packet rate and flags */ 177 /* Set up packet rate and flags */
362 rate = iwl_rate_get_lowest_plcp(priv); 178 rate = iwl_rate_get_lowest_plcp(priv, priv->beacon_ctx);
363 priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant, 179 priv->mgmt_tx_ant = iwl_toggle_tx_ant(priv, priv->mgmt_tx_ant,
364 priv->hw_params.valid_tx_ant); 180 priv->hw_params.valid_tx_ant);
365 rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant); 181 rate_flags = iwl_ant_idx_to_flags(priv->mgmt_tx_ant);
@@ -368,247 +184,102 @@ static unsigned int iwl_hw_get_beacon_cmd(struct iwl_priv *priv,
368 tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate, 184 tx_beacon_cmd->tx.rate_n_flags = iwl_hw_set_rate_n_flags(rate,
369 rate_flags); 185 rate_flags);
370 186
371 return sizeof(*tx_beacon_cmd) + frame_size; 187 /* Submit command */
372} 188 cmd.len[0] = sizeof(*tx_beacon_cmd);
373static int iwl_send_beacon_cmd(struct iwl_priv *priv) 189 cmd.data[0] = tx_beacon_cmd;
374{ 190 cmd.dataflags[0] = IWL_HCMD_DFL_NOCOPY;
375 struct iwl_frame *frame; 191 cmd.len[1] = frame_size;
376 unsigned int frame_size; 192 cmd.data[1] = priv->beacon_skb->data;
377 int rc; 193 cmd.dataflags[1] = IWL_HCMD_DFL_NOCOPY;
378
379 frame = iwl_get_free_frame(priv);
380 if (!frame) {
381 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
382 "command.\n");
383 return -ENOMEM;
384 }
385
386 frame_size = iwl_hw_get_beacon_cmd(priv, frame);
387 if (!frame_size) {
388 IWL_ERR(priv, "Error configuring the beacon command\n");
389 iwl_free_frame(priv, frame);
390 return -EINVAL;
391 }
392
393 rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
394 &frame->u.cmd[0]);
395
396 iwl_free_frame(priv, frame);
397
398 return rc;
399}
400
401static inline dma_addr_t iwl_tfd_tb_get_addr(struct iwl_tfd *tfd, u8 idx)
402{
403 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
404
405 dma_addr_t addr = get_unaligned_le32(&tb->lo);
406 if (sizeof(dma_addr_t) > sizeof(u32))
407 addr |=
408 ((dma_addr_t)(le16_to_cpu(tb->hi_n_len) & 0xF) << 16) << 16;
409
410 return addr;
411}
412
413static inline u16 iwl_tfd_tb_get_len(struct iwl_tfd *tfd, u8 idx)
414{
415 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
416
417 return le16_to_cpu(tb->hi_n_len) >> 4;
418}
419
420static inline void iwl_tfd_set_tb(struct iwl_tfd *tfd, u8 idx,
421 dma_addr_t addr, u16 len)
422{
423 struct iwl_tfd_tb *tb = &tfd->tbs[idx];
424 u16 hi_n_len = len << 4;
425
426 put_unaligned_le32(addr, &tb->lo);
427 if (sizeof(dma_addr_t) > sizeof(u32))
428 hi_n_len |= ((addr >> 16) >> 16) & 0xF;
429
430 tb->hi_n_len = cpu_to_le16(hi_n_len);
431
432 tfd->num_tbs = idx + 1;
433}
434 194
435static inline u8 iwl_tfd_get_num_tbs(struct iwl_tfd *tfd) 195 return iwl_send_cmd_sync(priv, &cmd);
436{
437 return tfd->num_tbs & 0x1f;
438} 196}
439 197
440/** 198static void iwl_bg_beacon_update(struct work_struct *work)
441 * iwl_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
442 * @priv - driver private data
443 * @txq - tx queue
444 *
445 * Does NOT advance any TFD circular buffer read/write indexes
446 * Does NOT free the TFD itself (which is within circular buffer)
447 */
448void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
449{ 199{
450 struct iwl_tfd *tfd_tmp = (struct iwl_tfd *)txq->tfds; 200 struct iwl_priv *priv =
451 struct iwl_tfd *tfd; 201 container_of(work, struct iwl_priv, beacon_update);
452 struct pci_dev *dev = priv->pci_dev; 202 struct sk_buff *beacon;
453 int index = txq->q.read_ptr;
454 int i;
455 int num_tbs;
456
457 tfd = &tfd_tmp[index];
458
459 /* Sanity check on number of chunks */
460 num_tbs = iwl_tfd_get_num_tbs(tfd);
461 203
462 if (num_tbs >= IWL_NUM_OF_TBS) { 204 mutex_lock(&priv->mutex);
463 IWL_ERR(priv, "Too many chunks: %i\n", num_tbs); 205 if (!priv->beacon_ctx) {
464 /* @todo issue fatal error, it is quite serious situation */ 206 IWL_ERR(priv, "updating beacon w/o beacon context!\n");
465 return; 207 goto out;
466 } 208 }
467 209
468 /* Unmap tx_cmd */ 210 if (priv->beacon_ctx->vif->type != NL80211_IFTYPE_AP) {
469 if (num_tbs) 211 /*
470 pci_unmap_single(dev, 212 * The ucode will send beacon notifications even in
471 dma_unmap_addr(&txq->meta[index], mapping), 213 * IBSS mode, but we don't want to process them. But
472 dma_unmap_len(&txq->meta[index], len), 214 * we need to defer the type check to here due to
473 PCI_DMA_BIDIRECTIONAL); 215 * requiring locking around the beacon_ctx access.
474 216 */
475 /* Unmap chunks, if any. */ 217 goto out;
476 for (i = 1; i < num_tbs; i++)
477 pci_unmap_single(dev, iwl_tfd_tb_get_addr(tfd, i),
478 iwl_tfd_tb_get_len(tfd, i), PCI_DMA_TODEVICE);
479
480 /* free SKB */
481 if (txq->txb) {
482 struct sk_buff *skb;
483
484 skb = txq->txb[txq->q.read_ptr].skb;
485
486 /* can be called from irqs-disabled context */
487 if (skb) {
488 dev_kfree_skb_any(skb);
489 txq->txb[txq->q.read_ptr].skb = NULL;
490 }
491 } 218 }
492}
493
494int iwl_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv,
495 struct iwl_tx_queue *txq,
496 dma_addr_t addr, u16 len,
497 u8 reset, u8 pad)
498{
499 struct iwl_queue *q;
500 struct iwl_tfd *tfd, *tfd_tmp;
501 u32 num_tbs;
502 219
503 q = &txq->q; 220 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
504 tfd_tmp = (struct iwl_tfd *)txq->tfds; 221 beacon = ieee80211_beacon_get(priv->hw, priv->beacon_ctx->vif);
505 tfd = &tfd_tmp[q->write_ptr]; 222 if (!beacon) {
506 223 IWL_ERR(priv, "update beacon failed -- keeping old\n");
507 if (reset) 224 goto out;
508 memset(tfd, 0, sizeof(*tfd));
509
510 num_tbs = iwl_tfd_get_num_tbs(tfd);
511
512 /* Each TFD can point to a maximum 20 Tx buffers */
513 if (num_tbs >= IWL_NUM_OF_TBS) {
514 IWL_ERR(priv, "Error can not send more than %d chunks\n",
515 IWL_NUM_OF_TBS);
516 return -EINVAL;
517 } 225 }
518 226
519 BUG_ON(addr & ~DMA_BIT_MASK(36)); 227 /* new beacon skb is allocated every time; dispose previous.*/
520 if (unlikely(addr & ~IWL_TX_DMA_MASK)) 228 dev_kfree_skb(priv->beacon_skb);
521 IWL_ERR(priv, "Unaligned address = %llx\n",
522 (unsigned long long)addr);
523 229
524 iwl_tfd_set_tb(tfd, num_tbs, addr, len); 230 priv->beacon_skb = beacon;
525 231
526 return 0; 232 iwlagn_send_beacon_cmd(priv);
233 out:
234 mutex_unlock(&priv->mutex);
527} 235}
528 236
529/* 237static void iwl_bg_bt_runtime_config(struct work_struct *work)
530 * Tell nic where to find circular buffer of Tx Frame Descriptors for
531 * given Tx queue, and enable the DMA channel used for that queue.
532 *
533 * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
534 * channels supported in hardware.
535 */
536int iwl_hw_tx_queue_init(struct iwl_priv *priv,
537 struct iwl_tx_queue *txq)
538{ 238{
539 int txq_id = txq->q.id; 239 struct iwl_priv *priv =
240 container_of(work, struct iwl_priv, bt_runtime_config);
540 241
541 /* Circular buffer (TFD queue in DRAM) physical base address */ 242 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
542 iwl_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id), 243 return;
543 txq->q.dma_addr >> 8);
544 244
545 return 0; 245 /* dont send host command if rf-kill is on */
246 if (!iwl_is_ready_rf(priv))
247 return;
248 priv->cfg->ops->hcmd->send_bt_config(priv);
546} 249}
547 250
548/****************************************************************************** 251static void iwl_bg_bt_full_concurrency(struct work_struct *work)
549 *
550 * Generic RX handler implementations
551 *
552 ******************************************************************************/
553static void iwl_rx_reply_alive(struct iwl_priv *priv,
554 struct iwl_rx_mem_buffer *rxb)
555{ 252{
556 struct iwl_rx_packet *pkt = rxb_addr(rxb); 253 struct iwl_priv *priv =
557 struct iwl_alive_resp *palive; 254 container_of(work, struct iwl_priv, bt_full_concurrency);
558 struct delayed_work *pwork; 255 struct iwl_rxon_context *ctx;
559
560 palive = &pkt->u.alive_frame;
561
562 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
563 "0x%01X 0x%01X\n",
564 palive->is_valid, palive->ver_type,
565 palive->ver_subtype);
566
567 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
568 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
569 memcpy(&priv->card_alive_init,
570 &pkt->u.alive_frame,
571 sizeof(struct iwl_init_alive_resp));
572 pwork = &priv->init_alive_start;
573 } else {
574 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
575 memcpy(&priv->card_alive, &pkt->u.alive_frame,
576 sizeof(struct iwl_alive_resp));
577 pwork = &priv->alive_start;
578 }
579 256
580 /* We delay the ALIVE response by 5ms to 257 mutex_lock(&priv->mutex);
581 * give the HW RF Kill time to activate... */
582 if (palive->is_valid == UCODE_VALID_OK)
583 queue_delayed_work(priv->workqueue, pwork,
584 msecs_to_jiffies(5));
585 else
586 IWL_WARN(priv, "uCode did not respond OK.\n");
587}
588 258
589static void iwl_bg_beacon_update(struct work_struct *work) 259 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
590{ 260 goto out;
591 struct iwl_priv *priv =
592 container_of(work, struct iwl_priv, beacon_update);
593 struct sk_buff *beacon;
594 261
595 /* Pull updated AP beacon from mac80211. will fail if not in AP mode */ 262 /* dont send host command if rf-kill is on */
596 beacon = ieee80211_beacon_get(priv->hw, priv->vif); 263 if (!iwl_is_ready_rf(priv))
264 goto out;
597 265
598 if (!beacon) { 266 IWL_DEBUG_INFO(priv, "BT coex in %s mode\n",
599 IWL_ERR(priv, "update beacon failed\n"); 267 priv->bt_full_concurrent ?
600 return; 268 "full concurrency" : "3-wire");
601 }
602 269
603 mutex_lock(&priv->mutex); 270 /*
604 /* new beacon skb is allocated every time; dispose previous.*/ 271 * LQ & RXON updated cmds must be sent before BT Config cmd
605 if (priv->ibss_beacon) 272 * to avoid 3-wire collisions
606 dev_kfree_skb(priv->ibss_beacon); 273 */
274 for_each_context(priv, ctx) {
275 if (priv->cfg->ops->hcmd->set_rxon_chain)
276 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
277 iwlcore_commit_rxon(priv, ctx);
278 }
607 279
608 priv->ibss_beacon = beacon; 280 priv->cfg->ops->hcmd->send_bt_config(priv);
281out:
609 mutex_unlock(&priv->mutex); 282 mutex_unlock(&priv->mutex);
610
611 iwl_send_beacon_cmd(priv);
612} 283}
613 284
614/** 285/**
@@ -658,7 +329,7 @@ static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
658 } 329 }
659 330
660 /* Set starting address; reads will auto-increment */ 331 /* Set starting address; reads will auto-increment */
661 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr); 332 iwl_write32(priv, HBUS_TARG_MEM_RADDR, ptr);
662 rmb(); 333 rmb();
663 334
664 /* 335 /*
@@ -666,13 +337,13 @@ static void iwl_print_cont_event_trace(struct iwl_priv *priv, u32 base,
666 * place event id # at far right for easier visual parsing. 337 * place event id # at far right for easier visual parsing.
667 */ 338 */
668 for (i = 0; i < num_events; i++) { 339 for (i = 0; i < num_events; i++) {
669 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); 340 ev = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
670 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); 341 time = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
671 if (mode == 0) { 342 if (mode == 0) {
672 trace_iwlwifi_dev_ucode_cont_event(priv, 343 trace_iwlwifi_dev_ucode_cont_event(priv,
673 0, time, ev); 344 0, time, ev);
674 } else { 345 } else {
675 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); 346 data = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
676 trace_iwlwifi_dev_ucode_cont_event(priv, 347 trace_iwlwifi_dev_ucode_cont_event(priv,
677 time, data, ev); 348 time, data, ev);
678 } 349 }
@@ -690,10 +361,7 @@ static void iwl_continuous_event_trace(struct iwl_priv *priv)
690 u32 num_wraps; /* # times uCode wrapped to top of log */ 361 u32 num_wraps; /* # times uCode wrapped to top of log */
691 u32 next_entry; /* index of next entry to be written by uCode */ 362 u32 next_entry; /* index of next entry to be written by uCode */
692 363
693 if (priv->ucode_type == UCODE_INIT) 364 base = priv->device_pointers.error_event_table;
694 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr);
695 else
696 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
697 if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) { 365 if (priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
698 capacity = iwl_read_targ_mem(priv, base); 366 capacity = iwl_read_targ_mem(priv, base);
699 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32))); 367 num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
@@ -760,98 +428,6 @@ static void iwl_bg_ucode_trace(unsigned long data)
760 } 428 }
761} 429}
762 430
763static void iwl_rx_beacon_notif(struct iwl_priv *priv,
764 struct iwl_rx_mem_buffer *rxb)
765{
766#ifdef CONFIG_IWLWIFI_DEBUG
767 struct iwl_rx_packet *pkt = rxb_addr(rxb);
768 struct iwl4965_beacon_notif *beacon =
769 (struct iwl4965_beacon_notif *)pkt->u.raw;
770 u8 rate = iwl_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
771
772 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
773 "tsf %d %d rate %d\n",
774 le32_to_cpu(beacon->beacon_notify_hdr.u.status) & TX_STATUS_MSK,
775 beacon->beacon_notify_hdr.failure_frame,
776 le32_to_cpu(beacon->ibss_mgr_status),
777 le32_to_cpu(beacon->high_tsf),
778 le32_to_cpu(beacon->low_tsf), rate);
779#endif
780
781 if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
782 (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
783 queue_work(priv->workqueue, &priv->beacon_update);
784}
785
786/* Handle notification from uCode that card's power state is changing
787 * due to software, hardware, or critical temperature RFKILL */
788static void iwl_rx_card_state_notif(struct iwl_priv *priv,
789 struct iwl_rx_mem_buffer *rxb)
790{
791 struct iwl_rx_packet *pkt = rxb_addr(rxb);
792 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
793 unsigned long status = priv->status;
794
795 IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s CT:%s\n",
796 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
797 (flags & SW_CARD_DISABLED) ? "Kill" : "On",
798 (flags & CT_CARD_DISABLED) ?
799 "Reached" : "Not reached");
800
801 if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
802 CT_CARD_DISABLED)) {
803
804 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
805 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
806
807 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
808 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
809
810 if (!(flags & RXON_CARD_DISABLED)) {
811 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
812 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
813 iwl_write_direct32(priv, HBUS_TARG_MBX_C,
814 HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
815 }
816 if (flags & CT_CARD_DISABLED)
817 iwl_tt_enter_ct_kill(priv);
818 }
819 if (!(flags & CT_CARD_DISABLED))
820 iwl_tt_exit_ct_kill(priv);
821
822 if (flags & HW_CARD_DISABLED)
823 set_bit(STATUS_RF_KILL_HW, &priv->status);
824 else
825 clear_bit(STATUS_RF_KILL_HW, &priv->status);
826
827
828 if (!(flags & RXON_CARD_DISABLED))
829 iwl_scan_cancel(priv);
830
831 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
832 test_bit(STATUS_RF_KILL_HW, &priv->status)))
833 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
834 test_bit(STATUS_RF_KILL_HW, &priv->status));
835 else
836 wake_up_interruptible(&priv->wait_command_queue);
837}
838
839int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src)
840{
841 if (src == IWL_PWR_SRC_VAUX) {
842 if (pci_pme_capable(priv->pci_dev, PCI_D3cold))
843 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
844 APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
845 ~APMG_PS_CTRL_MSK_PWR_SRC);
846 } else {
847 iwl_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
848 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
849 ~APMG_PS_CTRL_MSK_PWR_SRC);
850 }
851
852 return 0;
853}
854
855static void iwl_bg_tx_flush(struct work_struct *work) 431static void iwl_bg_tx_flush(struct work_struct *work)
856{ 432{
857 struct iwl_priv *priv = 433 struct iwl_priv *priv =
@@ -871,58 +447,13 @@ static void iwl_bg_tx_flush(struct work_struct *work)
871} 447}
872 448
873/** 449/**
874 * iwl_setup_rx_handlers - Initialize Rx handler callbacks
875 *
876 * Setup the RX handlers for each of the reply types sent from the uCode
877 * to the host.
878 *
879 * This function chains into the hardware specific files for them to setup
880 * any hardware specific handlers as well.
881 */
882static void iwl_setup_rx_handlers(struct iwl_priv *priv)
883{
884 priv->rx_handlers[REPLY_ALIVE] = iwl_rx_reply_alive;
885 priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
886 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
887 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
888 iwl_rx_spectrum_measure_notif;
889 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
890 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
891 iwl_rx_pm_debug_statistics_notif;
892 priv->rx_handlers[BEACON_NOTIFICATION] = iwl_rx_beacon_notif;
893
894 /*
895 * The same handler is used for both the REPLY to a discrete
896 * statistics request from the host as well as for the periodic
897 * statistics notifications (after received beacons) from the uCode.
898 */
899 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl_reply_statistics;
900 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl_rx_statistics;
901
902 iwl_setup_rx_scan_handlers(priv);
903
904 /* status change handler */
905 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl_rx_card_state_notif;
906
907 priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
908 iwl_rx_missed_beacon_notif;
909 /* Rx handlers */
910 priv->rx_handlers[REPLY_RX_PHY_CMD] = iwlagn_rx_reply_rx_phy;
911 priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwlagn_rx_reply_rx;
912 /* block ack */
913 priv->rx_handlers[REPLY_COMPRESSED_BA] = iwlagn_rx_reply_compressed_ba;
914 /* Set up hardware specific Rx handlers */
915 priv->cfg->ops->lib->rx_handler_setup(priv);
916}
917
918/**
919 * iwl_rx_handle - Main entry function for receiving responses from uCode 450 * iwl_rx_handle - Main entry function for receiving responses from uCode
920 * 451 *
921 * Uses the priv->rx_handlers callback function array to invoke 452 * Uses the priv->rx_handlers callback function array to invoke
922 * the appropriate handlers, including command responses, 453 * the appropriate handlers, including command responses,
923 * frame-received notifications, and other notifications. 454 * frame-received notifications, and other notifications.
924 */ 455 */
925void iwl_rx_handle(struct iwl_priv *priv) 456static void iwl_rx_handle(struct iwl_priv *priv)
926{ 457{
927 struct iwl_rx_mem_buffer *rxb; 458 struct iwl_rx_mem_buffer *rxb;
928 struct iwl_rx_packet *pkt; 459 struct iwl_rx_packet *pkt;
@@ -959,7 +490,10 @@ void iwl_rx_handle(struct iwl_priv *priv)
959 /* If an RXB doesn't have a Rx queue slot associated with it, 490 /* If an RXB doesn't have a Rx queue slot associated with it,
960 * then a bug has been introduced in the queue refilling 491 * then a bug has been introduced in the queue refilling
961 * routines -- catch it here */ 492 * routines -- catch it here */
962 BUG_ON(rxb == NULL); 493 if (WARN_ON(rxb == NULL)) {
494 i = (i + 1) & RX_QUEUE_MASK;
495 continue;
496 }
963 497
964 rxq->queue[i] = NULL; 498 rxq->queue[i] = NULL;
965 499
@@ -986,6 +520,29 @@ void iwl_rx_handle(struct iwl_priv *priv)
986 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) && 520 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
987 (pkt->hdr.cmd != REPLY_TX); 521 (pkt->hdr.cmd != REPLY_TX);
988 522
523 /*
524 * Do the notification wait before RX handlers so
525 * even if the RX handler consumes the RXB we have
526 * access to it in the notification wait entry.
527 */
528 if (!list_empty(&priv->_agn.notif_waits)) {
529 struct iwl_notification_wait *w;
530
531 spin_lock(&priv->_agn.notif_wait_lock);
532 list_for_each_entry(w, &priv->_agn.notif_waits, list) {
533 if (w->cmd == pkt->hdr.cmd) {
534 w->triggered = true;
535 if (w->fn)
536 w->fn(priv, pkt, w->fn_data);
537 }
538 }
539 spin_unlock(&priv->_agn.notif_wait_lock);
540
541 wake_up_all(&priv->_agn.notif_waitq);
542 }
543 if (priv->pre_rx_handler)
544 priv->pre_rx_handler(priv, rxb);
545
989 /* Based on type of command response or notification, 546 /* Based on type of command response or notification,
990 * handle those that need handling via function in 547 * handle those that need handling via function in
991 * rx_handlers table. See iwl_setup_rx_handlers() */ 548 * rx_handlers table. See iwl_setup_rx_handlers() */
@@ -1055,197 +612,6 @@ void iwl_rx_handle(struct iwl_priv *priv)
1055 iwlagn_rx_queue_restock(priv); 612 iwlagn_rx_queue_restock(priv);
1056} 613}
1057 614
1058/* call this function to flush any scheduled tasklet */
1059static inline void iwl_synchronize_irq(struct iwl_priv *priv)
1060{
1061 /* wait to make sure we flush pending tasklet*/
1062 synchronize_irq(priv->pci_dev->irq);
1063 tasklet_kill(&priv->irq_tasklet);
1064}
1065
1066static void iwl_irq_tasklet_legacy(struct iwl_priv *priv)
1067{
1068 u32 inta, handled = 0;
1069 u32 inta_fh;
1070 unsigned long flags;
1071 u32 i;
1072#ifdef CONFIG_IWLWIFI_DEBUG
1073 u32 inta_mask;
1074#endif
1075
1076 spin_lock_irqsave(&priv->lock, flags);
1077
1078 /* Ack/clear/reset pending uCode interrupts.
1079 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1080 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
1081 inta = iwl_read32(priv, CSR_INT);
1082 iwl_write32(priv, CSR_INT, inta);
1083
1084 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1085 * Any new interrupts that happen after this, either while we're
1086 * in this tasklet, or later, will show up in next ISR/tasklet. */
1087 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1088 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1089
1090#ifdef CONFIG_IWLWIFI_DEBUG
1091 if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
1092 /* just for debug */
1093 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1094 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1095 inta, inta_mask, inta_fh);
1096 }
1097#endif
1098
1099 spin_unlock_irqrestore(&priv->lock, flags);
1100
1101 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1102 * atomic, make sure that inta covers all the interrupts that
1103 * we've discovered, even if FH interrupt came in just after
1104 * reading CSR_INT. */
1105 if (inta_fh & CSR49_FH_INT_RX_MASK)
1106 inta |= CSR_INT_BIT_FH_RX;
1107 if (inta_fh & CSR49_FH_INT_TX_MASK)
1108 inta |= CSR_INT_BIT_FH_TX;
1109
1110 /* Now service all interrupt bits discovered above. */
1111 if (inta & CSR_INT_BIT_HW_ERR) {
1112 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1113
1114 /* Tell the device to stop sending interrupts */
1115 iwl_disable_interrupts(priv);
1116
1117 priv->isr_stats.hw++;
1118 iwl_irq_handle_error(priv);
1119
1120 handled |= CSR_INT_BIT_HW_ERR;
1121
1122 return;
1123 }
1124
1125#ifdef CONFIG_IWLWIFI_DEBUG
1126 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1127 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1128 if (inta & CSR_INT_BIT_SCD) {
1129 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1130 "the frame/frames.\n");
1131 priv->isr_stats.sch++;
1132 }
1133
1134 /* Alive notification via Rx interrupt will do the real work */
1135 if (inta & CSR_INT_BIT_ALIVE) {
1136 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1137 priv->isr_stats.alive++;
1138 }
1139 }
1140#endif
1141 /* Safely ignore these bits for debug checks below */
1142 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1143
1144 /* HW RF KILL switch toggled */
1145 if (inta & CSR_INT_BIT_RF_KILL) {
1146 int hw_rf_kill = 0;
1147 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
1148 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
1149 hw_rf_kill = 1;
1150
1151 IWL_WARN(priv, "RF_KILL bit toggled to %s.\n",
1152 hw_rf_kill ? "disable radio" : "enable radio");
1153
1154 priv->isr_stats.rfkill++;
1155
1156 /* driver only loads ucode once setting the interface up.
1157 * the driver allows loading the ucode even if the radio
1158 * is killed. Hence update the killswitch state here. The
1159 * rfkill handler will care about restarting if needed.
1160 */
1161 if (!test_bit(STATUS_ALIVE, &priv->status)) {
1162 if (hw_rf_kill)
1163 set_bit(STATUS_RF_KILL_HW, &priv->status);
1164 else
1165 clear_bit(STATUS_RF_KILL_HW, &priv->status);
1166 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rf_kill);
1167 }
1168
1169 handled |= CSR_INT_BIT_RF_KILL;
1170 }
1171
1172 /* Chip got too hot and stopped itself */
1173 if (inta & CSR_INT_BIT_CT_KILL) {
1174 IWL_ERR(priv, "Microcode CT kill error detected.\n");
1175 priv->isr_stats.ctkill++;
1176 handled |= CSR_INT_BIT_CT_KILL;
1177 }
1178
1179 /* Error detected by uCode */
1180 if (inta & CSR_INT_BIT_SW_ERR) {
1181 IWL_ERR(priv, "Microcode SW error detected. "
1182 " Restarting 0x%X.\n", inta);
1183 priv->isr_stats.sw++;
1184 priv->isr_stats.sw_err = inta;
1185 iwl_irq_handle_error(priv);
1186 handled |= CSR_INT_BIT_SW_ERR;
1187 }
1188
1189 /*
1190 * uCode wakes up after power-down sleep.
1191 * Tell device about any new tx or host commands enqueued,
1192 * and about any Rx buffers made available while asleep.
1193 */
1194 if (inta & CSR_INT_BIT_WAKEUP) {
1195 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1196 iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
1197 for (i = 0; i < priv->hw_params.max_txq_num; i++)
1198 iwl_txq_update_write_ptr(priv, &priv->txq[i]);
1199 priv->isr_stats.wakeup++;
1200 handled |= CSR_INT_BIT_WAKEUP;
1201 }
1202
1203 /* All uCode command responses, including Tx command responses,
1204 * Rx "responses" (frame-received notification), and other
1205 * notifications from uCode come through here*/
1206 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1207 iwl_rx_handle(priv);
1208 priv->isr_stats.rx++;
1209 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1210 }
1211
1212 /* This "Tx" DMA channel is used only for loading uCode */
1213 if (inta & CSR_INT_BIT_FH_TX) {
1214 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1215 priv->isr_stats.tx++;
1216 handled |= CSR_INT_BIT_FH_TX;
1217 /* Wake up uCode load routine, now that load is complete */
1218 priv->ucode_write_complete = 1;
1219 wake_up_interruptible(&priv->wait_command_queue);
1220 }
1221
1222 if (inta & ~handled) {
1223 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1224 priv->isr_stats.unhandled++;
1225 }
1226
1227 if (inta & ~(priv->inta_mask)) {
1228 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1229 inta & ~priv->inta_mask);
1230 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1231 }
1232
1233 /* Re-enable all interrupts */
1234 /* only Re-enable if diabled by irq */
1235 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1236 iwl_enable_interrupts(priv);
1237
1238#ifdef CONFIG_IWLWIFI_DEBUG
1239 if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
1240 inta = iwl_read32(priv, CSR_INT);
1241 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1242 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1243 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1244 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1245 }
1246#endif
1247}
1248
1249/* tasklet for iwlagn interrupt */ 615/* tasklet for iwlagn interrupt */
1250static void iwl_irq_tasklet(struct iwl_priv *priv) 616static void iwl_irq_tasklet(struct iwl_priv *priv)
1251{ 617{
@@ -1362,7 +728,6 @@ static void iwl_irq_tasklet(struct iwl_priv *priv)
1362 IWL_ERR(priv, "Microcode SW error detected. " 728 IWL_ERR(priv, "Microcode SW error detected. "
1363 " Restarting 0x%X.\n", inta); 729 " Restarting 0x%X.\n", inta);
1364 priv->isr_stats.sw++; 730 priv->isr_stats.sw++;
1365 priv->isr_stats.sw_err = inta;
1366 iwl_irq_handle_error(priv); 731 iwl_irq_handle_error(priv);
1367 handled |= CSR_INT_BIT_SW_ERR; 732 handled |= CSR_INT_BIT_SW_ERR;
1368 } 733 }
@@ -1388,7 +753,7 @@ static void iwl_irq_tasklet(struct iwl_priv *priv)
1388 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) { 753 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1389 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX); 754 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1390 iwl_write32(priv, CSR_FH_INT_STATUS, 755 iwl_write32(priv, CSR_FH_INT_STATUS,
1391 CSR49_FH_INT_RX_MASK); 756 CSR_FH_INT_RX_MASK);
1392 } 757 }
1393 if (inta & CSR_INT_BIT_RX_PERIODIC) { 758 if (inta & CSR_INT_BIT_RX_PERIODIC) {
1394 handled |= CSR_INT_BIT_RX_PERIODIC; 759 handled |= CSR_INT_BIT_RX_PERIODIC;
@@ -1426,7 +791,7 @@ static void iwl_irq_tasklet(struct iwl_priv *priv)
1426 791
1427 /* This "Tx" DMA channel is used only for loading uCode */ 792 /* This "Tx" DMA channel is used only for loading uCode */
1428 if (inta & CSR_INT_BIT_FH_TX) { 793 if (inta & CSR_INT_BIT_FH_TX) {
1429 iwl_write32(priv, CSR_FH_INT_STATUS, CSR49_FH_INT_TX_MASK); 794 iwl_write32(priv, CSR_FH_INT_STATUS, CSR_FH_INT_TX_MASK);
1430 IWL_DEBUG_ISR(priv, "uCode load interrupt\n"); 795 IWL_DEBUG_ISR(priv, "uCode load interrupt\n");
1431 priv->isr_stats.tx++; 796 priv->isr_stats.tx++;
1432 handled |= CSR_INT_BIT_FH_TX; 797 handled |= CSR_INT_BIT_FH_TX;
@@ -1446,71 +811,14 @@ static void iwl_irq_tasklet(struct iwl_priv *priv)
1446 } 811 }
1447 812
1448 /* Re-enable all interrupts */ 813 /* Re-enable all interrupts */
1449 /* only Re-enable if diabled by irq */ 814 /* only Re-enable if disabled by irq */
1450 if (test_bit(STATUS_INT_ENABLED, &priv->status)) 815 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1451 iwl_enable_interrupts(priv); 816 iwl_enable_interrupts(priv);
817 /* Re-enable RF_KILL if it occurred */
818 else if (handled & CSR_INT_BIT_RF_KILL)
819 iwl_enable_rfkill_int(priv);
1452} 820}
1453 821
1454/* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */
1455#define ACK_CNT_RATIO (50)
1456#define BA_TIMEOUT_CNT (5)
1457#define BA_TIMEOUT_MAX (16)
1458
1459/**
1460 * iwl_good_ack_health - checks for ACK count ratios, BA timeout retries.
1461 *
1462 * When the ACK count ratio is 0 and aggregated BA timeout retries exceeding
1463 * the BA_TIMEOUT_MAX, reload firmware and bring system back to normal
1464 * operation state.
1465 */
1466bool iwl_good_ack_health(struct iwl_priv *priv,
1467 struct iwl_rx_packet *pkt)
1468{
1469 bool rc = true;
1470 int actual_ack_cnt_delta, expected_ack_cnt_delta;
1471 int ba_timeout_delta;
1472
1473 actual_ack_cnt_delta =
1474 le32_to_cpu(pkt->u.stats.tx.actual_ack_cnt) -
1475 le32_to_cpu(priv->_agn.statistics.tx.actual_ack_cnt);
1476 expected_ack_cnt_delta =
1477 le32_to_cpu(pkt->u.stats.tx.expected_ack_cnt) -
1478 le32_to_cpu(priv->_agn.statistics.tx.expected_ack_cnt);
1479 ba_timeout_delta =
1480 le32_to_cpu(pkt->u.stats.tx.agg.ba_timeout) -
1481 le32_to_cpu(priv->_agn.statistics.tx.agg.ba_timeout);
1482 if ((priv->_agn.agg_tids_count > 0) &&
1483 (expected_ack_cnt_delta > 0) &&
1484 (((actual_ack_cnt_delta * 100) / expected_ack_cnt_delta)
1485 < ACK_CNT_RATIO) &&
1486 (ba_timeout_delta > BA_TIMEOUT_CNT)) {
1487 IWL_DEBUG_RADIO(priv, "actual_ack_cnt delta = %d,"
1488 " expected_ack_cnt = %d\n",
1489 actual_ack_cnt_delta, expected_ack_cnt_delta);
1490
1491#ifdef CONFIG_IWLWIFI_DEBUGFS
1492 /*
1493 * This is ifdef'ed on DEBUGFS because otherwise the
1494 * statistics aren't available. If DEBUGFS is set but
1495 * DEBUG is not, these will just compile out.
1496 */
1497 IWL_DEBUG_RADIO(priv, "rx_detected_cnt delta = %d\n",
1498 priv->_agn.delta_statistics.tx.rx_detected_cnt);
1499 IWL_DEBUG_RADIO(priv,
1500 "ack_or_ba_timeout_collision delta = %d\n",
1501 priv->_agn.delta_statistics.tx.
1502 ack_or_ba_timeout_collision);
1503#endif
1504 IWL_DEBUG_RADIO(priv, "agg ba_timeout delta = %d\n",
1505 ba_timeout_delta);
1506 if (!actual_ack_cnt_delta &&
1507 (ba_timeout_delta >= BA_TIMEOUT_MAX))
1508 rc = false;
1509 }
1510 return rc;
1511}
1512
1513
1514/***************************************************************************** 822/*****************************************************************************
1515 * 823 *
1516 * sysfs attributes 824 * sysfs attributes
@@ -1631,49 +939,85 @@ static struct attribute_group iwl_attribute_group = {
1631 * 939 *
1632 ******************************************************************************/ 940 ******************************************************************************/
1633 941
1634static void iwl_dealloc_ucode_pci(struct iwl_priv *priv) 942static void iwl_free_fw_desc(struct pci_dev *pci_dev, struct fw_desc *desc)
1635{ 943{
1636 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code); 944 if (desc->v_addr)
1637 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data); 945 dma_free_coherent(&pci_dev->dev, desc->len,
1638 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup); 946 desc->v_addr, desc->p_addr);
1639 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init); 947 desc->v_addr = NULL;
1640 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data); 948 desc->len = 0;
1641 iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1642} 949}
1643 950
1644static void iwl_nic_start(struct iwl_priv *priv) 951static void iwl_free_fw_img(struct pci_dev *pci_dev, struct fw_img *img)
1645{ 952{
1646 /* Remove all resets to allow NIC to operate */ 953 iwl_free_fw_desc(pci_dev, &img->code);
1647 iwl_write32(priv, CSR_RESET, 0); 954 iwl_free_fw_desc(pci_dev, &img->data);
955}
956
957static int iwl_alloc_fw_desc(struct pci_dev *pci_dev, struct fw_desc *desc,
958 const void *data, size_t len)
959{
960 if (!len) {
961 desc->v_addr = NULL;
962 return -EINVAL;
963 }
964
965 desc->v_addr = dma_alloc_coherent(&pci_dev->dev, len,
966 &desc->p_addr, GFP_KERNEL);
967 if (!desc->v_addr)
968 return -ENOMEM;
969 desc->len = len;
970 memcpy(desc->v_addr, data, len);
971 return 0;
972}
973
974static void iwl_dealloc_ucode_pci(struct iwl_priv *priv)
975{
976 iwl_free_fw_img(priv->pci_dev, &priv->ucode_rt);
977 iwl_free_fw_img(priv->pci_dev, &priv->ucode_init);
1648} 978}
1649 979
1650struct iwlagn_ucode_capabilities { 980struct iwlagn_ucode_capabilities {
1651 u32 max_probe_length; 981 u32 max_probe_length;
1652 u32 standard_phy_calibration_size; 982 u32 standard_phy_calibration_size;
983 u32 flags;
1653}; 984};
1654 985
1655static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context); 986static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context);
1656static int iwl_mac_setup_register(struct iwl_priv *priv, 987static int iwl_mac_setup_register(struct iwl_priv *priv,
1657 struct iwlagn_ucode_capabilities *capa); 988 struct iwlagn_ucode_capabilities *capa);
1658 989
990#define UCODE_EXPERIMENTAL_INDEX 100
991#define UCODE_EXPERIMENTAL_TAG "exp"
992
1659static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first) 993static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1660{ 994{
1661 const char *name_pre = priv->cfg->fw_name_pre; 995 const char *name_pre = priv->cfg->fw_name_pre;
996 char tag[8];
1662 997
1663 if (first) 998 if (first) {
999#ifdef CONFIG_IWLWIFI_DEBUG_EXPERIMENTAL_UCODE
1000 priv->fw_index = UCODE_EXPERIMENTAL_INDEX;
1001 strcpy(tag, UCODE_EXPERIMENTAL_TAG);
1002 } else if (priv->fw_index == UCODE_EXPERIMENTAL_INDEX) {
1003#endif
1664 priv->fw_index = priv->cfg->ucode_api_max; 1004 priv->fw_index = priv->cfg->ucode_api_max;
1665 else 1005 sprintf(tag, "%d", priv->fw_index);
1006 } else {
1666 priv->fw_index--; 1007 priv->fw_index--;
1008 sprintf(tag, "%d", priv->fw_index);
1009 }
1667 1010
1668 if (priv->fw_index < priv->cfg->ucode_api_min) { 1011 if (priv->fw_index < priv->cfg->ucode_api_min) {
1669 IWL_ERR(priv, "no suitable firmware found!\n"); 1012 IWL_ERR(priv, "no suitable firmware found!\n");
1670 return -ENOENT; 1013 return -ENOENT;
1671 } 1014 }
1672 1015
1673 sprintf(priv->firmware_name, "%s%d%s", 1016 sprintf(priv->firmware_name, "%s%s%s", name_pre, tag, ".ucode");
1674 name_pre, priv->fw_index, ".ucode");
1675 1017
1676 IWL_DEBUG_INFO(priv, "attempting to load firmware '%s'\n", 1018 IWL_DEBUG_INFO(priv, "attempting to load firmware %s'%s'\n",
1019 (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
1020 ? "EXPERIMENTAL " : "",
1677 priv->firmware_name); 1021 priv->firmware_name);
1678 1022
1679 return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name, 1023 return request_firmware_nowait(THIS_MODULE, 1, priv->firmware_name,
@@ -1682,8 +1026,8 @@ static int __must_check iwl_request_firmware(struct iwl_priv *priv, bool first)
1682} 1026}
1683 1027
1684struct iwlagn_firmware_pieces { 1028struct iwlagn_firmware_pieces {
1685 const void *inst, *data, *init, *init_data, *boot; 1029 const void *inst, *data, *init, *init_data;
1686 size_t inst_size, data_size, init_size, init_data_size, boot_size; 1030 size_t inst_size, data_size, init_size, init_data_size;
1687 1031
1688 u32 build; 1032 u32 build;
1689 1033
@@ -1704,28 +1048,18 @@ static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1704 1048
1705 switch (api_ver) { 1049 switch (api_ver) {
1706 default: 1050 default:
1707 /* 1051 hdr_size = 28;
1708 * 4965 doesn't revision the firmware file format 1052 if (ucode_raw->size < hdr_size) {
1709 * along with the API version, it always uses v1 1053 IWL_ERR(priv, "File size too small!\n");
1710 * file format. 1054 return -EINVAL;
1711 */
1712 if ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) !=
1713 CSR_HW_REV_TYPE_4965) {
1714 hdr_size = 28;
1715 if (ucode_raw->size < hdr_size) {
1716 IWL_ERR(priv, "File size too small!\n");
1717 return -EINVAL;
1718 }
1719 pieces->build = le32_to_cpu(ucode->u.v2.build);
1720 pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
1721 pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
1722 pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
1723 pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
1724 pieces->boot_size = le32_to_cpu(ucode->u.v2.boot_size);
1725 src = ucode->u.v2.data;
1726 break;
1727 } 1055 }
1728 /* fall through for 4965 */ 1056 pieces->build = le32_to_cpu(ucode->u.v2.build);
1057 pieces->inst_size = le32_to_cpu(ucode->u.v2.inst_size);
1058 pieces->data_size = le32_to_cpu(ucode->u.v2.data_size);
1059 pieces->init_size = le32_to_cpu(ucode->u.v2.init_size);
1060 pieces->init_data_size = le32_to_cpu(ucode->u.v2.init_data_size);
1061 src = ucode->u.v2.data;
1062 break;
1729 case 0: 1063 case 0:
1730 case 1: 1064 case 1:
1731 case 2: 1065 case 2:
@@ -1739,7 +1073,6 @@ static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1739 pieces->data_size = le32_to_cpu(ucode->u.v1.data_size); 1073 pieces->data_size = le32_to_cpu(ucode->u.v1.data_size);
1740 pieces->init_size = le32_to_cpu(ucode->u.v1.init_size); 1074 pieces->init_size = le32_to_cpu(ucode->u.v1.init_size);
1741 pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size); 1075 pieces->init_data_size = le32_to_cpu(ucode->u.v1.init_data_size);
1742 pieces->boot_size = le32_to_cpu(ucode->u.v1.boot_size);
1743 src = ucode->u.v1.data; 1076 src = ucode->u.v1.data;
1744 break; 1077 break;
1745 } 1078 }
@@ -1747,7 +1080,7 @@ static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1747 /* Verify size of file vs. image size info in file's header */ 1080 /* Verify size of file vs. image size info in file's header */
1748 if (ucode_raw->size != hdr_size + pieces->inst_size + 1081 if (ucode_raw->size != hdr_size + pieces->inst_size +
1749 pieces->data_size + pieces->init_size + 1082 pieces->data_size + pieces->init_size +
1750 pieces->init_data_size + pieces->boot_size) { 1083 pieces->init_data_size) {
1751 1084
1752 IWL_ERR(priv, 1085 IWL_ERR(priv,
1753 "uCode file size %d does not match expected size\n", 1086 "uCode file size %d does not match expected size\n",
@@ -1763,8 +1096,6 @@ static int iwlagn_load_legacy_firmware(struct iwl_priv *priv,
1763 src += pieces->init_size; 1096 src += pieces->init_size;
1764 pieces->init_data = src; 1097 pieces->init_data = src;
1765 src += pieces->init_data_size; 1098 src += pieces->init_data_size;
1766 pieces->boot = src;
1767 src += pieces->boot_size;
1768 1099
1769 return 0; 1100 return 0;
1770} 1101}
@@ -1865,8 +1196,7 @@ static int iwlagn_load_firmware(struct iwl_priv *priv,
1865 pieces->init_data_size = tlv_len; 1196 pieces->init_data_size = tlv_len;
1866 break; 1197 break;
1867 case IWL_UCODE_TLV_BOOT: 1198 case IWL_UCODE_TLV_BOOT:
1868 pieces->boot = tlv_data; 1199 IWL_ERR(priv, "Found unexpected BOOT ucode\n");
1869 pieces->boot_size = tlv_len;
1870 break; 1200 break;
1871 case IWL_UCODE_TLV_PROBE_MAX_LEN: 1201 case IWL_UCODE_TLV_PROBE_MAX_LEN:
1872 if (tlv_len != sizeof(u32)) 1202 if (tlv_len != sizeof(u32))
@@ -1874,6 +1204,27 @@ static int iwlagn_load_firmware(struct iwl_priv *priv,
1874 capa->max_probe_length = 1204 capa->max_probe_length =
1875 le32_to_cpup((__le32 *)tlv_data); 1205 le32_to_cpup((__le32 *)tlv_data);
1876 break; 1206 break;
1207 case IWL_UCODE_TLV_PAN:
1208 if (tlv_len)
1209 goto invalid_tlv_len;
1210 capa->flags |= IWL_UCODE_TLV_FLAGS_PAN;
1211 break;
1212 case IWL_UCODE_TLV_FLAGS:
1213 /* must be at least one u32 */
1214 if (tlv_len < sizeof(u32))
1215 goto invalid_tlv_len;
1216 /* and a proper number of u32s */
1217 if (tlv_len % sizeof(u32))
1218 goto invalid_tlv_len;
1219 /*
1220 * This driver only reads the first u32 as
1221 * right now no more features are defined,
1222 * if that changes then either the driver
1223 * will not work with the new firmware, or
1224 * it'll not take advantage of new features.
1225 */
1226 capa->flags = le32_to_cpup((__le32 *)tlv_data);
1227 break;
1877 case IWL_UCODE_TLV_INIT_EVTLOG_PTR: 1228 case IWL_UCODE_TLV_INIT_EVTLOG_PTR:
1878 if (tlv_len != sizeof(u32)) 1229 if (tlv_len != sizeof(u32))
1879 goto invalid_tlv_len; 1230 goto invalid_tlv_len;
@@ -1922,7 +1273,7 @@ static int iwlagn_load_firmware(struct iwl_priv *priv,
1922 le32_to_cpup((__le32 *)tlv_data); 1273 le32_to_cpup((__le32 *)tlv_data);
1923 break; 1274 break;
1924 default: 1275 default:
1925 IWL_WARN(priv, "unknown TLV: %d\n", tlv_type); 1276 IWL_DEBUG_INFO(priv, "unknown TLV: %d\n", tlv_type);
1926 break; 1277 break;
1927 } 1278 }
1928 } 1279 }
@@ -1962,14 +1313,16 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
1962 struct iwlagn_ucode_capabilities ucode_capa = { 1313 struct iwlagn_ucode_capabilities ucode_capa = {
1963 .max_probe_length = 200, 1314 .max_probe_length = 200,
1964 .standard_phy_calibration_size = 1315 .standard_phy_calibration_size =
1965 IWL_MAX_STANDARD_PHY_CALIBRATE_TBL_SIZE, 1316 IWL_DEFAULT_STANDARD_PHY_CALIBRATE_TBL_SIZE,
1966 }; 1317 };
1967 1318
1968 memset(&pieces, 0, sizeof(pieces)); 1319 memset(&pieces, 0, sizeof(pieces));
1969 1320
1970 if (!ucode_raw) { 1321 if (!ucode_raw) {
1971 IWL_ERR(priv, "request for firmware file '%s' failed.\n", 1322 if (priv->fw_index <= priv->cfg->ucode_api_max)
1972 priv->firmware_name); 1323 IWL_ERR(priv,
1324 "request for firmware file '%s' failed.\n",
1325 priv->firmware_name);
1973 goto try_again; 1326 goto try_again;
1974 } 1327 }
1975 1328
@@ -2002,21 +1355,28 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
2002 * firmware filename ... but we don't check for that and only rely 1355 * firmware filename ... but we don't check for that and only rely
2003 * on the API version read from firmware header from here on forward 1356 * on the API version read from firmware header from here on forward
2004 */ 1357 */
2005 if (api_ver < api_min || api_ver > api_max) { 1358 /* no api version check required for experimental uCode */
2006 IWL_ERR(priv, "Driver unable to support your firmware API. " 1359 if (priv->fw_index != UCODE_EXPERIMENTAL_INDEX) {
2007 "Driver supports v%u, firmware is v%u.\n", 1360 if (api_ver < api_min || api_ver > api_max) {
2008 api_max, api_ver); 1361 IWL_ERR(priv,
2009 goto try_again; 1362 "Driver unable to support your firmware API. "
2010 } 1363 "Driver supports v%u, firmware is v%u.\n",
1364 api_max, api_ver);
1365 goto try_again;
1366 }
2011 1367
2012 if (api_ver != api_max) 1368 if (api_ver != api_max)
2013 IWL_ERR(priv, "Firmware has old API version. Expected v%u, " 1369 IWL_ERR(priv,
2014 "got v%u. New firmware can be obtained " 1370 "Firmware has old API version. Expected v%u, "
2015 "from http://www.intellinuxwireless.org.\n", 1371 "got v%u. New firmware can be obtained "
2016 api_max, api_ver); 1372 "from http://www.intellinuxwireless.org.\n",
1373 api_max, api_ver);
1374 }
2017 1375
2018 if (build) 1376 if (build)
2019 sprintf(buildstr, " build %u", build); 1377 sprintf(buildstr, " build %u%s", build,
1378 (priv->fw_index == UCODE_EXPERIMENTAL_INDEX)
1379 ? " (EXP)" : "");
2020 else 1380 else
2021 buildstr[0] = '\0'; 1381 buildstr[0] = '\0';
2022 1382
@@ -2052,8 +1412,6 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
2052 pieces.init_size); 1412 pieces.init_size);
2053 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n", 1413 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %Zd\n",
2054 pieces.init_data_size); 1414 pieces.init_data_size);
2055 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %Zd\n",
2056 pieces.boot_size);
2057 1415
2058 /* Verify that uCode images will fit in card's SRAM */ 1416 /* Verify that uCode images will fit in card's SRAM */
2059 if (pieces.inst_size > priv->hw_params.max_inst_size) { 1417 if (pieces.inst_size > priv->hw_params.max_inst_size) {
@@ -2080,48 +1438,25 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
2080 goto try_again; 1438 goto try_again;
2081 } 1439 }
2082 1440
2083 if (pieces.boot_size > priv->hw_params.max_bsm_size) {
2084 IWL_ERR(priv, "uCode boot instr len %Zd too large to fit in\n",
2085 pieces.boot_size);
2086 goto try_again;
2087 }
2088
2089 /* Allocate ucode buffers for card's bus-master loading ... */ 1441 /* Allocate ucode buffers for card's bus-master loading ... */
2090 1442
2091 /* Runtime instructions and 2 copies of data: 1443 /* Runtime instructions and 2 copies of data:
2092 * 1) unmodified from disk 1444 * 1) unmodified from disk
2093 * 2) backup cache for save/restore during power-downs */ 1445 * 2) backup cache for save/restore during power-downs */
2094 priv->ucode_code.len = pieces.inst_size; 1446 if (iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_rt.code,
2095 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code); 1447 pieces.inst, pieces.inst_size))
2096 1448 goto err_pci_alloc;
2097 priv->ucode_data.len = pieces.data_size; 1449 if (iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_rt.data,
2098 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data); 1450 pieces.data, pieces.data_size))
2099
2100 priv->ucode_data_backup.len = pieces.data_size;
2101 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2102
2103 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2104 !priv->ucode_data_backup.v_addr)
2105 goto err_pci_alloc; 1451 goto err_pci_alloc;
2106 1452
2107 /* Initialization instructions and data */ 1453 /* Initialization instructions and data */
2108 if (pieces.init_size && pieces.init_data_size) { 1454 if (pieces.init_size && pieces.init_data_size) {
2109 priv->ucode_init.len = pieces.init_size; 1455 if (iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init.code,
2110 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init); 1456 pieces.init, pieces.init_size))
2111
2112 priv->ucode_init_data.len = pieces.init_data_size;
2113 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2114
2115 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2116 goto err_pci_alloc; 1457 goto err_pci_alloc;
2117 } 1458 if (iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init.data,
2118 1459 pieces.init_data, pieces.init_data_size))
2119 /* Bootstrap (instructions only, no data) */
2120 if (pieces.boot_size) {
2121 priv->ucode_boot.len = pieces.boot_size;
2122 iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2123
2124 if (!priv->ucode_boot.v_addr)
2125 goto err_pci_alloc; 1460 goto err_pci_alloc;
2126 } 1461 }
2127 1462
@@ -2136,53 +1471,30 @@ static void iwl_ucode_callback(const struct firmware *ucode_raw, void *context)
2136 if (pieces.init_evtlog_size) 1471 if (pieces.init_evtlog_size)
2137 priv->_agn.init_evtlog_size = (pieces.init_evtlog_size - 16)/12; 1472 priv->_agn.init_evtlog_size = (pieces.init_evtlog_size - 16)/12;
2138 else 1473 else
2139 priv->_agn.init_evtlog_size = priv->cfg->max_event_log_size; 1474 priv->_agn.init_evtlog_size =
1475 priv->cfg->base_params->max_event_log_size;
2140 priv->_agn.init_errlog_ptr = pieces.init_errlog_ptr; 1476 priv->_agn.init_errlog_ptr = pieces.init_errlog_ptr;
2141 priv->_agn.inst_evtlog_ptr = pieces.inst_evtlog_ptr; 1477 priv->_agn.inst_evtlog_ptr = pieces.inst_evtlog_ptr;
2142 if (pieces.inst_evtlog_size) 1478 if (pieces.inst_evtlog_size)
2143 priv->_agn.inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12; 1479 priv->_agn.inst_evtlog_size = (pieces.inst_evtlog_size - 16)/12;
2144 else 1480 else
2145 priv->_agn.inst_evtlog_size = priv->cfg->max_event_log_size; 1481 priv->_agn.inst_evtlog_size =
1482 priv->cfg->base_params->max_event_log_size;
2146 priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr; 1483 priv->_agn.inst_errlog_ptr = pieces.inst_errlog_ptr;
2147 1484
2148 /* Copy images into buffers for card's bus-master reads ... */ 1485 priv->new_scan_threshold_behaviour =
2149 1486 !!(ucode_capa.flags & IWL_UCODE_TLV_FLAGS_NEWSCAN);
2150 /* Runtime instructions (first block of data in file) */
2151 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode instr len %Zd\n",
2152 pieces.inst_size);
2153 memcpy(priv->ucode_code.v_addr, pieces.inst, pieces.inst_size);
2154
2155 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2156 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2157
2158 /*
2159 * Runtime data
2160 * NOTE: Copy into backup buffer will be done in iwl_up()
2161 */
2162 IWL_DEBUG_INFO(priv, "Copying (but not loading) uCode data len %Zd\n",
2163 pieces.data_size);
2164 memcpy(priv->ucode_data.v_addr, pieces.data, pieces.data_size);
2165 memcpy(priv->ucode_data_backup.v_addr, pieces.data, pieces.data_size);
2166
2167 /* Initialization instructions */
2168 if (pieces.init_size) {
2169 IWL_DEBUG_INFO(priv, "Copying (but not loading) init instr len %Zd\n",
2170 pieces.init_size);
2171 memcpy(priv->ucode_init.v_addr, pieces.init, pieces.init_size);
2172 }
2173 1487
2174 /* Initialization data */ 1488 if (ucode_capa.flags & IWL_UCODE_TLV_FLAGS_PAN) {
2175 if (pieces.init_data_size) { 1489 priv->valid_contexts |= BIT(IWL_RXON_CTX_PAN);
2176 IWL_DEBUG_INFO(priv, "Copying (but not loading) init data len %Zd\n", 1490 priv->sta_key_max_num = STA_KEY_MAX_NUM_PAN;
2177 pieces.init_data_size); 1491 } else
2178 memcpy(priv->ucode_init_data.v_addr, pieces.init_data, 1492 priv->sta_key_max_num = STA_KEY_MAX_NUM;
2179 pieces.init_data_size);
2180 }
2181 1493
2182 /* Bootstrap instructions */ 1494 if (priv->valid_contexts != BIT(IWL_RXON_CTX_BSS))
2183 IWL_DEBUG_INFO(priv, "Copying (but not loading) boot instr len %Zd\n", 1495 priv->cmd_queue = IWL_IPAN_CMD_QUEUE_NUM;
2184 pieces.boot_size); 1496 else
2185 memcpy(priv->ucode_boot.v_addr, pieces.boot, pieces.boot_size); 1497 priv->cmd_queue = IWL_DEFAULT_CMD_QUEUE_NUM;
2186 1498
2187 /* 1499 /*
2188 * figure out the offset of chain noise reset and gain commands 1500 * figure out the offset of chain noise reset and gain commands
@@ -2300,7 +1612,7 @@ static const char *desc_lookup(u32 num)
2300 max = ARRAY_SIZE(advanced_lookup) - 1; 1612 max = ARRAY_SIZE(advanced_lookup) - 1;
2301 for (i = 0; i < max; i++) { 1613 for (i = 0; i < max; i++) {
2302 if (advanced_lookup[i].num == num) 1614 if (advanced_lookup[i].num == num)
2303 break;; 1615 break;
2304 } 1616 }
2305 return advanced_lookup[i].name; 1617 return advanced_lookup[i].name;
2306} 1618}
@@ -2310,17 +1622,14 @@ static const char *desc_lookup(u32 num)
2310 1622
2311void iwl_dump_nic_error_log(struct iwl_priv *priv) 1623void iwl_dump_nic_error_log(struct iwl_priv *priv)
2312{ 1624{
2313 u32 data2, line; 1625 u32 base;
2314 u32 desc, time, count, base, data1; 1626 struct iwl_error_event_table table;
2315 u32 blink1, blink2, ilink1, ilink2;
2316 u32 pc, hcmd;
2317 1627
2318 if (priv->ucode_type == UCODE_INIT) { 1628 base = priv->device_pointers.error_event_table;
2319 base = le32_to_cpu(priv->card_alive_init.error_event_table_ptr); 1629 if (priv->ucode_type == UCODE_SUBTYPE_INIT) {
2320 if (!base) 1630 if (!base)
2321 base = priv->_agn.init_errlog_ptr; 1631 base = priv->_agn.init_errlog_ptr;
2322 } else { 1632 } else {
2323 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
2324 if (!base) 1633 if (!base)
2325 base = priv->_agn.inst_errlog_ptr; 1634 base = priv->_agn.inst_errlog_ptr;
2326 } 1635 }
@@ -2328,40 +1637,48 @@ void iwl_dump_nic_error_log(struct iwl_priv *priv)
2328 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) { 1637 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2329 IWL_ERR(priv, 1638 IWL_ERR(priv,
2330 "Not valid error log pointer 0x%08X for %s uCode\n", 1639 "Not valid error log pointer 0x%08X for %s uCode\n",
2331 base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT"); 1640 base,
1641 (priv->ucode_type == UCODE_SUBTYPE_INIT)
1642 ? "Init" : "RT");
2332 return; 1643 return;
2333 } 1644 }
2334 1645
2335 count = iwl_read_targ_mem(priv, base); 1646 iwl_read_targ_mem_words(priv, base, &table, sizeof(table));
2336 1647
2337 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) { 1648 if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
2338 IWL_ERR(priv, "Start IWL Error Log Dump:\n"); 1649 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
2339 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n", 1650 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
2340 priv->status, count); 1651 priv->status, table.valid);
2341 } 1652 }
2342 1653
2343 desc = iwl_read_targ_mem(priv, base + 1 * sizeof(u32)); 1654 priv->isr_stats.err_code = table.error_id;
2344 pc = iwl_read_targ_mem(priv, base + 2 * sizeof(u32)); 1655
2345 blink1 = iwl_read_targ_mem(priv, base + 3 * sizeof(u32)); 1656 trace_iwlwifi_dev_ucode_error(priv, table.error_id, table.tsf_low,
2346 blink2 = iwl_read_targ_mem(priv, base + 4 * sizeof(u32)); 1657 table.data1, table.data2, table.line,
2347 ilink1 = iwl_read_targ_mem(priv, base + 5 * sizeof(u32)); 1658 table.blink1, table.blink2, table.ilink1,
2348 ilink2 = iwl_read_targ_mem(priv, base + 6 * sizeof(u32)); 1659 table.ilink2, table.bcon_time, table.gp1,
2349 data1 = iwl_read_targ_mem(priv, base + 7 * sizeof(u32)); 1660 table.gp2, table.gp3, table.ucode_ver,
2350 data2 = iwl_read_targ_mem(priv, base + 8 * sizeof(u32)); 1661 table.hw_ver, table.brd_ver);
2351 line = iwl_read_targ_mem(priv, base + 9 * sizeof(u32)); 1662 IWL_ERR(priv, "0x%08X | %-28s\n", table.error_id,
2352 time = iwl_read_targ_mem(priv, base + 11 * sizeof(u32)); 1663 desc_lookup(table.error_id));
2353 hcmd = iwl_read_targ_mem(priv, base + 22 * sizeof(u32)); 1664 IWL_ERR(priv, "0x%08X | uPc\n", table.pc);
2354 1665 IWL_ERR(priv, "0x%08X | branchlink1\n", table.blink1);
2355 trace_iwlwifi_dev_ucode_error(priv, desc, time, data1, data2, line, 1666 IWL_ERR(priv, "0x%08X | branchlink2\n", table.blink2);
2356 blink1, blink2, ilink1, ilink2); 1667 IWL_ERR(priv, "0x%08X | interruptlink1\n", table.ilink1);
2357 1668 IWL_ERR(priv, "0x%08X | interruptlink2\n", table.ilink2);
2358 IWL_ERR(priv, "Desc Time " 1669 IWL_ERR(priv, "0x%08X | data1\n", table.data1);
2359 "data1 data2 line\n"); 1670 IWL_ERR(priv, "0x%08X | data2\n", table.data2);
2360 IWL_ERR(priv, "%-28s (0x%04X) %010u 0x%08X 0x%08X %u\n", 1671 IWL_ERR(priv, "0x%08X | line\n", table.line);
2361 desc_lookup(desc), desc, time, data1, data2, line); 1672 IWL_ERR(priv, "0x%08X | beacon time\n", table.bcon_time);
2362 IWL_ERR(priv, "pc blink1 blink2 ilink1 ilink2 hcmd\n"); 1673 IWL_ERR(priv, "0x%08X | tsf low\n", table.tsf_low);
2363 IWL_ERR(priv, "0x%05X 0x%05X 0x%05X 0x%05X 0x%05X 0x%05X\n", 1674 IWL_ERR(priv, "0x%08X | tsf hi\n", table.tsf_hi);
2364 pc, blink1, blink2, ilink1, ilink2, hcmd); 1675 IWL_ERR(priv, "0x%08X | time gp1\n", table.gp1);
1676 IWL_ERR(priv, "0x%08X | time gp2\n", table.gp2);
1677 IWL_ERR(priv, "0x%08X | time gp3\n", table.gp3);
1678 IWL_ERR(priv, "0x%08X | uCode version\n", table.ucode_ver);
1679 IWL_ERR(priv, "0x%08X | hw version\n", table.hw_ver);
1680 IWL_ERR(priv, "0x%08X | board version\n", table.brd_ver);
1681 IWL_ERR(priv, "0x%08X | hcmd\n", table.hcmd);
2365} 1682}
2366 1683
2367#define EVENT_START_OFFSET (4 * sizeof(u32)) 1684#define EVENT_START_OFFSET (4 * sizeof(u32))
@@ -2384,12 +1701,11 @@ static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
2384 if (num_events == 0) 1701 if (num_events == 0)
2385 return pos; 1702 return pos;
2386 1703
2387 if (priv->ucode_type == UCODE_INIT) { 1704 base = priv->device_pointers.log_event_table;
2388 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr); 1705 if (priv->ucode_type == UCODE_SUBTYPE_INIT) {
2389 if (!base) 1706 if (!base)
2390 base = priv->_agn.init_evtlog_ptr; 1707 base = priv->_agn.init_evtlog_ptr;
2391 } else { 1708 } else {
2392 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2393 if (!base) 1709 if (!base)
2394 base = priv->_agn.inst_evtlog_ptr; 1710 base = priv->_agn.inst_evtlog_ptr;
2395 } 1711 }
@@ -2406,14 +1722,14 @@ static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
2406 iwl_grab_nic_access(priv); 1722 iwl_grab_nic_access(priv);
2407 1723
2408 /* Set starting address; reads will auto-increment */ 1724 /* Set starting address; reads will auto-increment */
2409 _iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, ptr); 1725 iwl_write32(priv, HBUS_TARG_MEM_RADDR, ptr);
2410 rmb(); 1726 rmb();
2411 1727
2412 /* "time" is actually "data" for mode 0 (no timestamp). 1728 /* "time" is actually "data" for mode 0 (no timestamp).
2413 * place event id # at far right for easier visual parsing. */ 1729 * place event id # at far right for easier visual parsing. */
2414 for (i = 0; i < num_events; i++) { 1730 for (i = 0; i < num_events; i++) {
2415 ev = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); 1731 ev = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
2416 time = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); 1732 time = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
2417 if (mode == 0) { 1733 if (mode == 0) {
2418 /* data, ev */ 1734 /* data, ev */
2419 if (bufsz) { 1735 if (bufsz) {
@@ -2427,7 +1743,7 @@ static int iwl_print_event_log(struct iwl_priv *priv, u32 start_idx,
2427 time, ev); 1743 time, ev);
2428 } 1744 }
2429 } else { 1745 } else {
2430 data = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT); 1746 data = iwl_read32(priv, HBUS_TARG_MEM_RDAT);
2431 if (bufsz) { 1747 if (bufsz) {
2432 pos += scnprintf(*buf + pos, bufsz - pos, 1748 pos += scnprintf(*buf + pos, bufsz - pos,
2433 "EVT_LOGT:%010u:0x%08x:%04u\n", 1749 "EVT_LOGT:%010u:0x%08x:%04u\n",
@@ -2498,13 +1814,12 @@ int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
2498 int pos = 0; 1814 int pos = 0;
2499 size_t bufsz = 0; 1815 size_t bufsz = 0;
2500 1816
2501 if (priv->ucode_type == UCODE_INIT) { 1817 base = priv->device_pointers.log_event_table;
2502 base = le32_to_cpu(priv->card_alive_init.log_event_table_ptr); 1818 if (priv->ucode_type == UCODE_SUBTYPE_INIT) {
2503 logsize = priv->_agn.init_evtlog_size; 1819 logsize = priv->_agn.init_evtlog_size;
2504 if (!base) 1820 if (!base)
2505 base = priv->_agn.init_evtlog_ptr; 1821 base = priv->_agn.init_evtlog_ptr;
2506 } else { 1822 } else {
2507 base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
2508 logsize = priv->_agn.inst_evtlog_size; 1823 logsize = priv->_agn.inst_evtlog_size;
2509 if (!base) 1824 if (!base)
2510 base = priv->_agn.inst_evtlog_ptr; 1825 base = priv->_agn.inst_evtlog_ptr;
@@ -2513,7 +1828,9 @@ int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
2513 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) { 1828 if (!priv->cfg->ops->lib->is_valid_rtc_data_addr(base)) {
2514 IWL_ERR(priv, 1829 IWL_ERR(priv,
2515 "Invalid event log pointer 0x%08X for %s uCode\n", 1830 "Invalid event log pointer 0x%08X for %s uCode\n",
2516 base, (priv->ucode_type == UCODE_INIT) ? "Init" : "RT"); 1831 base,
1832 (priv->ucode_type == UCODE_SUBTYPE_INIT)
1833 ? "Init" : "RT");
2517 return -EINVAL; 1834 return -EINVAL;
2518 } 1835 }
2519 1836
@@ -2543,6 +1860,9 @@ int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
2543 return pos; 1860 return pos;
2544 } 1861 }
2545 1862
1863 /* enable/disable bt channel inhibition */
1864 priv->bt_ch_announce = iwlagn_bt_ch_announce;
1865
2546#ifdef CONFIG_IWLWIFI_DEBUG 1866#ifdef CONFIG_IWLWIFI_DEBUG
2547 if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log) 1867 if (!(iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS) && !full_log)
2548 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES) 1868 size = (size > DEFAULT_DUMP_EVENT_LOG_ENTRIES)
@@ -2589,53 +1909,115 @@ int iwl_dump_nic_event_log(struct iwl_priv *priv, bool full_log,
2589 return pos; 1909 return pos;
2590} 1910}
2591 1911
1912static void iwl_rf_kill_ct_config(struct iwl_priv *priv)
1913{
1914 struct iwl_ct_kill_config cmd;
1915 struct iwl_ct_kill_throttling_config adv_cmd;
1916 unsigned long flags;
1917 int ret = 0;
1918
1919 spin_lock_irqsave(&priv->lock, flags);
1920 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
1921 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
1922 spin_unlock_irqrestore(&priv->lock, flags);
1923 priv->thermal_throttle.ct_kill_toggle = false;
1924
1925 if (priv->cfg->base_params->support_ct_kill_exit) {
1926 adv_cmd.critical_temperature_enter =
1927 cpu_to_le32(priv->hw_params.ct_kill_threshold);
1928 adv_cmd.critical_temperature_exit =
1929 cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
1930
1931 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1932 sizeof(adv_cmd), &adv_cmd);
1933 if (ret)
1934 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1935 else
1936 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
1937 "succeeded, "
1938 "critical temperature enter is %d,"
1939 "exit is %d\n",
1940 priv->hw_params.ct_kill_threshold,
1941 priv->hw_params.ct_kill_exit_threshold);
1942 } else {
1943 cmd.critical_temperature_R =
1944 cpu_to_le32(priv->hw_params.ct_kill_threshold);
1945
1946 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1947 sizeof(cmd), &cmd);
1948 if (ret)
1949 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1950 else
1951 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
1952 "succeeded, "
1953 "critical temperature is %d\n",
1954 priv->hw_params.ct_kill_threshold);
1955 }
1956}
1957
1958static int iwlagn_send_calib_cfg_rt(struct iwl_priv *priv, u32 cfg)
1959{
1960 struct iwl_calib_cfg_cmd calib_cfg_cmd;
1961 struct iwl_host_cmd cmd = {
1962 .id = CALIBRATION_CFG_CMD,
1963 .len = { sizeof(struct iwl_calib_cfg_cmd), },
1964 .data = { &calib_cfg_cmd, },
1965 };
1966
1967 memset(&calib_cfg_cmd, 0, sizeof(calib_cfg_cmd));
1968 calib_cfg_cmd.ucd_calib_cfg.once.is_enable = IWL_CALIB_INIT_CFG_ALL;
1969 calib_cfg_cmd.ucd_calib_cfg.once.start = cpu_to_le32(cfg);
1970
1971 return iwl_send_cmd(priv, &cmd);
1972}
1973
1974
2592/** 1975/**
2593 * iwl_alive_start - called after REPLY_ALIVE notification received 1976 * iwl_alive_start - called after REPLY_ALIVE notification received
2594 * from protocol/runtime uCode (initialization uCode's 1977 * from protocol/runtime uCode (initialization uCode's
2595 * Alive gets handled by iwl_init_alive_start()). 1978 * Alive gets handled by iwl_init_alive_start()).
2596 */ 1979 */
2597static void iwl_alive_start(struct iwl_priv *priv) 1980int iwl_alive_start(struct iwl_priv *priv)
2598{ 1981{
2599 int ret = 0; 1982 int ret = 0;
1983 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2600 1984
2601 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n"); 1985 iwl_reset_ict(priv);
2602
2603 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2604 /* We had an error bringing up the hardware, so take it
2605 * all the way back down so we can try again */
2606 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2607 goto restart;
2608 }
2609
2610 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2611 * This is a paranoid check, because we would not have gotten the
2612 * "runtime" alive if code weren't properly loaded. */
2613 if (iwl_verify_ucode(priv)) {
2614 /* Runtime instruction load was bad;
2615 * take it all the way back down so we can try again */
2616 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2617 goto restart;
2618 }
2619 1986
2620 ret = priv->cfg->ops->lib->alive_notify(priv); 1987 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2621 if (ret) {
2622 IWL_WARN(priv,
2623 "Could not complete ALIVE transition [ntf]: %d\n", ret);
2624 goto restart;
2625 }
2626 1988
2627 /* After the ALIVE response, we can send host commands to the uCode */ 1989 /* After the ALIVE response, we can send host commands to the uCode */
2628 set_bit(STATUS_ALIVE, &priv->status); 1990 set_bit(STATUS_ALIVE, &priv->status);
2629 1991
2630 if (priv->cfg->ops->lib->recover_from_tx_stall) { 1992 /* Enable watchdog to monitor the driver tx queues */
2631 /* Enable timer to monitor the driver queues */ 1993 iwl_setup_watchdog(priv);
2632 mod_timer(&priv->monitor_recover,
2633 jiffies +
2634 msecs_to_jiffies(priv->cfg->monitor_recover_period));
2635 }
2636 1994
2637 if (iwl_is_rfkill(priv)) 1995 if (iwl_is_rfkill(priv))
2638 return; 1996 return -ERFKILL;
1997
1998 /* download priority table before any calibration request */
1999 if (priv->cfg->bt_params &&
2000 priv->cfg->bt_params->advanced_bt_coexist) {
2001 /* Configure Bluetooth device coexistence support */
2002 priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK;
2003 priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT;
2004 priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT;
2005 priv->cfg->ops->hcmd->send_bt_config(priv);
2006 priv->bt_valid = IWLAGN_BT_VALID_ENABLE_FLAGS;
2007 iwlagn_send_prio_tbl(priv);
2008
2009 /* FIXME: w/a to force change uCode BT state machine */
2010 ret = iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_OPEN,
2011 BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
2012 if (ret)
2013 return ret;
2014 ret = iwlagn_send_bt_env(priv, IWL_BT_COEX_ENV_CLOSE,
2015 BT_COEX_PRIO_TBL_EVT_INIT_CALIB2);
2016 if (ret)
2017 return ret;
2018 }
2019 if (priv->hw_params.calib_rt_cfg)
2020 iwlagn_send_calib_cfg_rt(priv, priv->hw_params.calib_rt_cfg);
2639 2021
2640 ieee80211_wake_queues(priv->hw); 2022 ieee80211_wake_queues(priv->hw);
2641 2023
@@ -2645,97 +2027,86 @@ static void iwl_alive_start(struct iwl_priv *priv)
2645 if (priv->cfg->ops->hcmd->set_tx_ant) 2027 if (priv->cfg->ops->hcmd->set_tx_ant)
2646 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant); 2028 priv->cfg->ops->hcmd->set_tx_ant(priv, priv->cfg->valid_tx_ant);
2647 2029
2648 if (iwl_is_associated(priv)) { 2030 if (iwl_is_associated_ctx(ctx)) {
2649 struct iwl_rxon_cmd *active_rxon = 2031 struct iwl_rxon_cmd *active_rxon =
2650 (struct iwl_rxon_cmd *)&priv->active_rxon; 2032 (struct iwl_rxon_cmd *)&ctx->active;
2651 /* apply any changes in staging */ 2033 /* apply any changes in staging */
2652 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; 2034 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2653 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK; 2035 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2654 } else { 2036 } else {
2037 struct iwl_rxon_context *tmp;
2655 /* Initialize our rx_config data */ 2038 /* Initialize our rx_config data */
2656 iwl_connection_init_rx_config(priv, NULL); 2039 for_each_context(priv, tmp)
2040 iwl_connection_init_rx_config(priv, tmp);
2657 2041
2658 if (priv->cfg->ops->hcmd->set_rxon_chain) 2042 if (priv->cfg->ops->hcmd->set_rxon_chain)
2659 priv->cfg->ops->hcmd->set_rxon_chain(priv); 2043 priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
2660 } 2044 }
2661 2045
2662 /* Configure Bluetooth device coexistence support */ 2046 if (!priv->cfg->bt_params || (priv->cfg->bt_params &&
2663 priv->cfg->ops->hcmd->send_bt_config(priv); 2047 !priv->cfg->bt_params->advanced_bt_coexist)) {
2048 /*
2049 * default is 2-wire BT coexexistence support
2050 */
2051 priv->cfg->ops->hcmd->send_bt_config(priv);
2052 }
2664 2053
2665 iwl_reset_run_time_calib(priv); 2054 iwl_reset_run_time_calib(priv);
2666 2055
2056 set_bit(STATUS_READY, &priv->status);
2057
2667 /* Configure the adapter for unassociated operation */ 2058 /* Configure the adapter for unassociated operation */
2668 iwlcore_commit_rxon(priv); 2059 ret = iwlcore_commit_rxon(priv, ctx);
2060 if (ret)
2061 return ret;
2669 2062
2670 /* At this point, the NIC is initialized and operational */ 2063 /* At this point, the NIC is initialized and operational */
2671 iwl_rf_kill_ct_config(priv); 2064 iwl_rf_kill_ct_config(priv);
2672 2065
2673 iwl_leds_init(priv);
2674
2675 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n"); 2066 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2676 set_bit(STATUS_READY, &priv->status);
2677 wake_up_interruptible(&priv->wait_command_queue);
2678
2679 iwl_power_update_mode(priv, true);
2680 IWL_DEBUG_INFO(priv, "Updated power mode\n");
2681
2682
2683 return;
2684 2067
2685 restart: 2068 return iwl_power_update_mode(priv, true);
2686 queue_work(priv->workqueue, &priv->restart);
2687} 2069}
2688 2070
2689static void iwl_cancel_deferred_work(struct iwl_priv *priv); 2071static void iwl_cancel_deferred_work(struct iwl_priv *priv);
2690 2072
2691static void __iwl_down(struct iwl_priv *priv) 2073static void __iwl_down(struct iwl_priv *priv)
2692{ 2074{
2693 unsigned long flags; 2075 int exit_pending;
2694 int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
2695 2076
2696 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n"); 2077 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2697 2078
2698 if (!exit_pending) 2079 iwl_scan_cancel_timeout(priv, 200);
2699 set_bit(STATUS_EXIT_PENDING, &priv->status);
2700 2080
2701 iwl_clear_ucode_stations(priv); 2081 exit_pending = test_and_set_bit(STATUS_EXIT_PENDING, &priv->status);
2702 iwl_dealloc_bcast_station(priv); 2082
2083 /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set
2084 * to prevent rearm timer */
2085 del_timer_sync(&priv->watchdog);
2086
2087 iwl_clear_ucode_stations(priv, NULL);
2088 iwl_dealloc_bcast_stations(priv);
2703 iwl_clear_driver_stations(priv); 2089 iwl_clear_driver_stations(priv);
2704 2090
2705 /* Unblock any waiting calls */ 2091 /* reset BT coex data */
2706 wake_up_interruptible_all(&priv->wait_command_queue); 2092 priv->bt_status = 0;
2093 if (priv->cfg->bt_params)
2094 priv->bt_traffic_load =
2095 priv->cfg->bt_params->bt_init_traffic_load;
2096 else
2097 priv->bt_traffic_load = 0;
2098 priv->bt_full_concurrent = false;
2099 priv->bt_ci_compliance = 0;
2707 2100
2708 /* Wipe out the EXIT_PENDING status bit if we are not actually 2101 /* Wipe out the EXIT_PENDING status bit if we are not actually
2709 * exiting the module */ 2102 * exiting the module */
2710 if (!exit_pending) 2103 if (!exit_pending)
2711 clear_bit(STATUS_EXIT_PENDING, &priv->status); 2104 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2712 2105
2713 /* stop and reset the on-board processor */
2714 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2715
2716 /* tell the device to stop sending interrupts */
2717 spin_lock_irqsave(&priv->lock, flags);
2718 iwl_disable_interrupts(priv);
2719 spin_unlock_irqrestore(&priv->lock, flags);
2720 iwl_synchronize_irq(priv);
2721
2722 if (priv->mac80211_registered) 2106 if (priv->mac80211_registered)
2723 ieee80211_stop_queues(priv->hw); 2107 ieee80211_stop_queues(priv->hw);
2724 2108
2725 /* If we have not previously called iwl_init() then 2109 /* Clear out all status bits but a few that are stable across reset */
2726 * clear all bits but the RF Kill bit and return */
2727 if (!iwl_is_init(priv)) {
2728 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2729 STATUS_RF_KILL_HW |
2730 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2731 STATUS_GEO_CONFIGURED |
2732 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2733 STATUS_EXIT_PENDING;
2734 goto exit;
2735 }
2736
2737 /* ...otherwise clear out all the status bits but the RF Kill
2738 * bit and continue taking the NIC down. */
2739 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) << 2110 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2740 STATUS_RF_KILL_HW | 2111 STATUS_RF_KILL_HW |
2741 test_bit(STATUS_GEO_CONFIGURED, &priv->status) << 2112 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
@@ -2745,31 +2116,10 @@ static void __iwl_down(struct iwl_priv *priv)
2745 test_bit(STATUS_EXIT_PENDING, &priv->status) << 2116 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2746 STATUS_EXIT_PENDING; 2117 STATUS_EXIT_PENDING;
2747 2118
2748 /* device going down, Stop using ICT table */ 2119 iwlagn_stop_device(priv);
2749 iwl_disable_ict(priv);
2750
2751 iwlagn_txq_ctx_stop(priv);
2752 iwlagn_rxq_stop(priv);
2753
2754 /* Power-down device's busmaster DMA clocks */
2755 iwl_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2756 udelay(5);
2757
2758 /* Make sure (redundant) we've released our request to stay awake */
2759 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
2760
2761 /* Stop the device, and put it in low power state */
2762 priv->cfg->ops->lib->apm_ops.stop(priv);
2763
2764 exit:
2765 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2766 2120
2767 if (priv->ibss_beacon) 2121 dev_kfree_skb(priv->beacon_skb);
2768 dev_kfree_skb(priv->ibss_beacon); 2122 priv->beacon_skb = NULL;
2769 priv->ibss_beacon = NULL;
2770
2771 /* clear out any free frames */
2772 iwl_clear_free_frames(priv);
2773} 2123}
2774 2124
2775static void iwl_down(struct iwl_priv *priv) 2125static void iwl_down(struct iwl_priv *priv)
@@ -2783,9 +2133,10 @@ static void iwl_down(struct iwl_priv *priv)
2783 2133
2784#define HW_READY_TIMEOUT (50) 2134#define HW_READY_TIMEOUT (50)
2785 2135
2136/* Note: returns poll_bit return value, which is >= 0 if success */
2786static int iwl_set_hw_ready(struct iwl_priv *priv) 2137static int iwl_set_hw_ready(struct iwl_priv *priv)
2787{ 2138{
2788 int ret = 0; 2139 int ret;
2789 2140
2790 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG, 2141 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
2791 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY); 2142 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY);
@@ -2795,25 +2146,21 @@ static int iwl_set_hw_ready(struct iwl_priv *priv)
2795 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY, 2146 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2796 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY, 2147 CSR_HW_IF_CONFIG_REG_BIT_NIC_READY,
2797 HW_READY_TIMEOUT); 2148 HW_READY_TIMEOUT);
2798 if (ret != -ETIMEDOUT)
2799 priv->hw_ready = true;
2800 else
2801 priv->hw_ready = false;
2802 2149
2803 IWL_DEBUG_INFO(priv, "hardware %s\n", 2150 IWL_DEBUG_INFO(priv, "hardware%s ready\n", ret < 0 ? " not" : "");
2804 (priv->hw_ready == 1) ? "ready" : "not ready");
2805 return ret; 2151 return ret;
2806} 2152}
2807 2153
2808static int iwl_prepare_card_hw(struct iwl_priv *priv) 2154/* Note: returns standard 0/-ERROR code */
2155int iwl_prepare_card_hw(struct iwl_priv *priv)
2809{ 2156{
2810 int ret = 0; 2157 int ret;
2811 2158
2812 IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n"); 2159 IWL_DEBUG_INFO(priv, "iwl_prepare_card_hw enter\n");
2813 2160
2814 ret = iwl_set_hw_ready(priv); 2161 ret = iwl_set_hw_ready(priv);
2815 if (priv->hw_ready) 2162 if (ret >= 0)
2816 return ret; 2163 return 0;
2817 2164
2818 /* If HW is not ready, prepare the conditions to check again */ 2165 /* If HW is not ready, prepare the conditions to check again */
2819 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG, 2166 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
@@ -2823,10 +2170,13 @@ static int iwl_prepare_card_hw(struct iwl_priv *priv)
2823 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 2170 ~CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE,
2824 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000); 2171 CSR_HW_IF_CONFIG_REG_BIT_NIC_PREPARE_DONE, 150000);
2825 2172
2826 /* HW should be ready by now, check again. */ 2173 if (ret < 0)
2827 if (ret != -ETIMEDOUT) 2174 return ret;
2828 iwl_set_hw_ready(priv);
2829 2175
2176 /* HW should be ready by now, check again. */
2177 ret = iwl_set_hw_ready(priv);
2178 if (ret >= 0)
2179 return 0;
2830 return ret; 2180 return ret;
2831} 2181}
2832 2182
@@ -2834,100 +2184,51 @@ static int iwl_prepare_card_hw(struct iwl_priv *priv)
2834 2184
2835static int __iwl_up(struct iwl_priv *priv) 2185static int __iwl_up(struct iwl_priv *priv)
2836{ 2186{
2837 int i; 2187 struct iwl_rxon_context *ctx;
2838 int ret; 2188 int ret;
2839 2189
2190 lockdep_assert_held(&priv->mutex);
2191
2840 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) { 2192 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2841 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n"); 2193 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2842 return -EIO; 2194 return -EIO;
2843 } 2195 }
2844 2196
2845 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) { 2197 for_each_context(priv, ctx) {
2846 IWL_ERR(priv, "ucode not available for device bringup\n"); 2198 ret = iwlagn_alloc_bcast_station(priv, ctx);
2847 return -EIO; 2199 if (ret) {
2848 } 2200 iwl_dealloc_bcast_stations(priv);
2849 2201 return ret;
2850 ret = iwl_alloc_bcast_station(priv, true); 2202 }
2851 if (ret)
2852 return ret;
2853
2854 iwl_prepare_card_hw(priv);
2855
2856 if (!priv->hw_ready) {
2857 IWL_WARN(priv, "Exit HW not ready\n");
2858 return -EIO;
2859 } 2203 }
2860 2204
2861 /* If platform's RF_KILL switch is NOT set to KILL */ 2205 ret = iwlagn_run_init_ucode(priv);
2862 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) 2206 if (ret) {
2863 clear_bit(STATUS_RF_KILL_HW, &priv->status); 2207 IWL_ERR(priv, "Failed to run INIT ucode: %d\n", ret);
2864 else 2208 goto error;
2865 set_bit(STATUS_RF_KILL_HW, &priv->status);
2866
2867 if (iwl_is_rfkill(priv)) {
2868 wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
2869
2870 iwl_enable_interrupts(priv);
2871 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2872 return 0;
2873 } 2209 }
2874 2210
2875 iwl_write32(priv, CSR_INT, 0xFFFFFFFF); 2211 ret = iwlagn_load_ucode_wait_alive(priv,
2876 2212 &priv->ucode_rt,
2877 ret = iwlagn_hw_nic_init(priv); 2213 UCODE_SUBTYPE_REGULAR,
2214 UCODE_SUBTYPE_REGULAR_NEW);
2878 if (ret) { 2215 if (ret) {
2879 IWL_ERR(priv, "Unable to init nic\n"); 2216 IWL_ERR(priv, "Failed to start RT ucode: %d\n", ret);
2880 return ret; 2217 goto error;
2881 } 2218 }
2882 2219
2883 /* make sure rfkill handshake bits are cleared */ 2220 ret = iwl_alive_start(priv);
2884 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL); 2221 if (ret)
2885 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, 2222 goto error;
2886 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED); 2223 return 0;
2887
2888 /* clear (again), then enable host interrupts */
2889 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2890 iwl_enable_interrupts(priv);
2891
2892 /* really make sure rfkill handshake bits are cleared */
2893 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2894 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2895
2896 /* Copy original ucode data image from disk into backup cache.
2897 * This will be used to initialize the on-board processor's
2898 * data SRAM for a clean start when the runtime program first loads. */
2899 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2900 priv->ucode_data.len);
2901
2902 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2903
2904 /* load bootstrap state machine,
2905 * load bootstrap program into processor's memory,
2906 * prepare to load the "initialize" uCode */
2907 ret = priv->cfg->ops->lib->load_ucode(priv);
2908
2909 if (ret) {
2910 IWL_ERR(priv, "Unable to set up bootstrap uCode: %d\n",
2911 ret);
2912 continue;
2913 }
2914
2915 /* start card; "initialize" will load runtime ucode */
2916 iwl_nic_start(priv);
2917
2918 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2919
2920 return 0;
2921 }
2922 2224
2225 error:
2923 set_bit(STATUS_EXIT_PENDING, &priv->status); 2226 set_bit(STATUS_EXIT_PENDING, &priv->status);
2924 __iwl_down(priv); 2227 __iwl_down(priv);
2925 clear_bit(STATUS_EXIT_PENDING, &priv->status); 2228 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2926 2229
2927 /* tried to restart and config the device for as long as our 2230 IWL_ERR(priv, "Unable to initialize device.\n");
2928 * patience could withstand */ 2231 return ret;
2929 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2930 return -EIO;
2931} 2232}
2932 2233
2933 2234
@@ -2937,35 +2238,6 @@ static int __iwl_up(struct iwl_priv *priv)
2937 * 2238 *
2938 *****************************************************************************/ 2239 *****************************************************************************/
2939 2240
2940static void iwl_bg_init_alive_start(struct work_struct *data)
2941{
2942 struct iwl_priv *priv =
2943 container_of(data, struct iwl_priv, init_alive_start.work);
2944
2945 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2946 return;
2947
2948 mutex_lock(&priv->mutex);
2949 priv->cfg->ops->lib->init_alive_start(priv);
2950 mutex_unlock(&priv->mutex);
2951}
2952
2953static void iwl_bg_alive_start(struct work_struct *data)
2954{
2955 struct iwl_priv *priv =
2956 container_of(data, struct iwl_priv, alive_start.work);
2957
2958 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2959 return;
2960
2961 /* enable dram interrupt */
2962 iwl_reset_ict(priv);
2963
2964 mutex_lock(&priv->mutex);
2965 iwl_alive_start(priv);
2966 mutex_unlock(&priv->mutex);
2967}
2968
2969static void iwl_bg_run_time_calib_work(struct work_struct *work) 2241static void iwl_bg_run_time_calib_work(struct work_struct *work)
2970{ 2242{
2971 struct iwl_priv *priv = container_of(work, struct iwl_priv, 2243 struct iwl_priv *priv = container_of(work, struct iwl_priv,
@@ -2980,22 +2252,49 @@ static void iwl_bg_run_time_calib_work(struct work_struct *work)
2980 } 2252 }
2981 2253
2982 if (priv->start_calib) { 2254 if (priv->start_calib) {
2983 if (priv->cfg->bt_statistics) { 2255 iwl_chain_noise_calibration(priv);
2984 iwl_chain_noise_calibration(priv, 2256 iwl_sensitivity_calibration(priv);
2985 (void *)&priv->_agn.statistics_bt);
2986 iwl_sensitivity_calibration(priv,
2987 (void *)&priv->_agn.statistics_bt);
2988 } else {
2989 iwl_chain_noise_calibration(priv,
2990 (void *)&priv->_agn.statistics);
2991 iwl_sensitivity_calibration(priv,
2992 (void *)&priv->_agn.statistics);
2993 }
2994 } 2257 }
2995 2258
2996 mutex_unlock(&priv->mutex); 2259 mutex_unlock(&priv->mutex);
2997} 2260}
2998 2261
2262static void iwlagn_prepare_restart(struct iwl_priv *priv)
2263{
2264 struct iwl_rxon_context *ctx;
2265 bool bt_full_concurrent;
2266 u8 bt_ci_compliance;
2267 u8 bt_load;
2268 u8 bt_status;
2269
2270 lockdep_assert_held(&priv->mutex);
2271
2272 for_each_context(priv, ctx)
2273 ctx->vif = NULL;
2274 priv->is_open = 0;
2275
2276 /*
2277 * __iwl_down() will clear the BT status variables,
2278 * which is correct, but when we restart we really
2279 * want to keep them so restore them afterwards.
2280 *
2281 * The restart process will later pick them up and
2282 * re-configure the hw when we reconfigure the BT
2283 * command.
2284 */
2285 bt_full_concurrent = priv->bt_full_concurrent;
2286 bt_ci_compliance = priv->bt_ci_compliance;
2287 bt_load = priv->bt_traffic_load;
2288 bt_status = priv->bt_status;
2289
2290 __iwl_down(priv);
2291
2292 priv->bt_full_concurrent = bt_full_concurrent;
2293 priv->bt_ci_compliance = bt_ci_compliance;
2294 priv->bt_traffic_load = bt_load;
2295 priv->bt_status = bt_status;
2296}
2297
2999static void iwl_bg_restart(struct work_struct *data) 2298static void iwl_bg_restart(struct work_struct *data)
3000{ 2299{
3001 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart); 2300 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
@@ -3005,20 +2304,12 @@ static void iwl_bg_restart(struct work_struct *data)
3005 2304
3006 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) { 2305 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
3007 mutex_lock(&priv->mutex); 2306 mutex_lock(&priv->mutex);
3008 priv->vif = NULL; 2307 iwlagn_prepare_restart(priv);
3009 priv->is_open = 0;
3010 mutex_unlock(&priv->mutex); 2308 mutex_unlock(&priv->mutex);
3011 iwl_down(priv); 2309 iwl_cancel_deferred_work(priv);
3012 ieee80211_restart_hw(priv->hw); 2310 ieee80211_restart_hw(priv->hw);
3013 } else { 2311 } else {
3014 iwl_down(priv); 2312 WARN_ON(1);
3015
3016 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3017 return;
3018
3019 mutex_lock(&priv->mutex);
3020 __iwl_up(priv);
3021 mutex_unlock(&priv->mutex);
3022 } 2313 }
3023} 2314}
3024 2315
@@ -3035,89 +2326,92 @@ static void iwl_bg_rx_replenish(struct work_struct *data)
3035 mutex_unlock(&priv->mutex); 2326 mutex_unlock(&priv->mutex);
3036} 2327}
3037 2328
3038#define IWL_DELAY_NEXT_SCAN (HZ*2) 2329static int iwl_mac_offchannel_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
3039 2330 struct ieee80211_channel *chan,
3040void iwl_post_associate(struct iwl_priv *priv, struct ieee80211_vif *vif) 2331 enum nl80211_channel_type channel_type,
2332 unsigned int wait)
3041{ 2333{
3042 struct ieee80211_conf *conf = NULL; 2334 struct iwl_priv *priv = hw->priv;
3043 int ret = 0; 2335 int ret;
3044
3045 if (!vif || !priv->is_open)
3046 return;
3047 2336
3048 if (vif->type == NL80211_IFTYPE_AP) { 2337 /* Not supported if we don't have PAN */
3049 IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__); 2338 if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN))) {
3050 return; 2339 ret = -EOPNOTSUPP;
2340 goto free;
3051 } 2341 }
3052 2342
3053 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) 2343 /* Not supported on pre-P2P firmware */
3054 return; 2344 if (!(priv->contexts[IWL_RXON_CTX_PAN].interface_modes &
3055 2345 BIT(NL80211_IFTYPE_P2P_CLIENT))) {
3056 iwl_scan_cancel_timeout(priv, 200); 2346 ret = -EOPNOTSUPP;
3057 2347 goto free;
3058 conf = ieee80211_get_hw_conf(priv->hw); 2348 }
3059
3060 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3061 iwlcore_commit_rxon(priv);
3062
3063 iwl_setup_rxon_timing(priv, vif);
3064 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3065 sizeof(priv->rxon_timing), &priv->rxon_timing);
3066 if (ret)
3067 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3068 "Attempting to continue.\n");
3069 2349
3070 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK; 2350 mutex_lock(&priv->mutex);
3071 2351
3072 iwl_set_rxon_ht(priv, &priv->current_ht_config); 2352 if (!priv->contexts[IWL_RXON_CTX_PAN].is_active) {
2353 /*
2354 * If the PAN context is free, use the normal
2355 * way of doing remain-on-channel offload + TX.
2356 */
2357 ret = 1;
2358 goto out;
2359 }
3073 2360
3074 if (priv->cfg->ops->hcmd->set_rxon_chain) 2361 /* TODO: queue up if scanning? */
3075 priv->cfg->ops->hcmd->set_rxon_chain(priv); 2362 if (test_bit(STATUS_SCANNING, &priv->status) ||
2363 priv->_agn.offchan_tx_skb) {
2364 ret = -EBUSY;
2365 goto out;
2366 }
3076 2367
3077 priv->staging_rxon.assoc_id = cpu_to_le16(vif->bss_conf.aid); 2368 /*
2369 * max_scan_ie_len doesn't include the blank SSID or the header,
2370 * so need to add that again here.
2371 */
2372 if (skb->len > hw->wiphy->max_scan_ie_len + 24 + 2) {
2373 ret = -ENOBUFS;
2374 goto out;
2375 }
3078 2376
3079 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n", 2377 priv->_agn.offchan_tx_skb = skb;
3080 vif->bss_conf.aid, vif->bss_conf.beacon_int); 2378 priv->_agn.offchan_tx_timeout = wait;
2379 priv->_agn.offchan_tx_chan = chan;
3081 2380
3082 if (vif->bss_conf.use_short_preamble) 2381 ret = iwl_scan_initiate(priv, priv->contexts[IWL_RXON_CTX_PAN].vif,
3083 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK; 2382 IWL_SCAN_OFFCH_TX, chan->band);
3084 else 2383 if (ret)
3085 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK; 2384 priv->_agn.offchan_tx_skb = NULL;
2385 out:
2386 mutex_unlock(&priv->mutex);
2387 free:
2388 if (ret < 0)
2389 kfree_skb(skb);
3086 2390
3087 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) { 2391 return ret;
3088 if (vif->bss_conf.use_short_slot) 2392}
3089 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
3090 else
3091 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
3092 }
3093 2393
3094 iwlcore_commit_rxon(priv); 2394static int iwl_mac_offchannel_tx_cancel_wait(struct ieee80211_hw *hw)
2395{
2396 struct iwl_priv *priv = hw->priv;
2397 int ret;
3095 2398
3096 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n", 2399 mutex_lock(&priv->mutex);
3097 vif->bss_conf.aid, priv->active_rxon.bssid_addr);
3098 2400
3099 switch (vif->type) { 2401 if (!priv->_agn.offchan_tx_skb) {
3100 case NL80211_IFTYPE_STATION: 2402 ret = -EINVAL;
3101 break; 2403 goto unlock;
3102 case NL80211_IFTYPE_ADHOC:
3103 iwl_send_beacon_cmd(priv);
3104 break;
3105 default:
3106 IWL_ERR(priv, "%s Should not be called in %d mode\n",
3107 __func__, vif->type);
3108 break;
3109 } 2404 }
3110 2405
3111 /* the chain noise calibration will enabled PM upon completion 2406 priv->_agn.offchan_tx_skb = NULL;
3112 * If chain noise has already been run, then we need to enable
3113 * power management here */
3114 if (priv->chain_noise_data.state == IWL_CHAIN_NOISE_DONE)
3115 iwl_power_update_mode(priv, false);
3116 2407
3117 /* Enable Rx differential gain and sensitivity calibrations */ 2408 ret = iwl_scan_cancel_timeout(priv, 200);
3118 iwl_chain_noise_reset(priv); 2409 if (ret)
3119 priv->start_calib = 1; 2410 ret = -EIO;
2411unlock:
2412 mutex_unlock(&priv->mutex);
3120 2413
2414 return ret;
3121} 2415}
3122 2416
3123/***************************************************************************** 2417/*****************************************************************************
@@ -3126,8 +2420,6 @@ void iwl_post_associate(struct iwl_priv *priv, struct ieee80211_vif *vif)
3126 * 2420 *
3127 *****************************************************************************/ 2421 *****************************************************************************/
3128 2422
3129#define UCODE_READY_TIMEOUT (4 * HZ)
3130
3131/* 2423/*
3132 * Not a mac80211 entry point function, but it fits in with all the 2424 * Not a mac80211 entry point function, but it fits in with all the
3133 * other mac80211 functions grouped here. 2425 * other mac80211 functions grouped here.
@@ -3137,30 +2429,42 @@ static int iwl_mac_setup_register(struct iwl_priv *priv,
3137{ 2429{
3138 int ret; 2430 int ret;
3139 struct ieee80211_hw *hw = priv->hw; 2431 struct ieee80211_hw *hw = priv->hw;
2432 struct iwl_rxon_context *ctx;
2433
3140 hw->rate_control_algorithm = "iwl-agn-rs"; 2434 hw->rate_control_algorithm = "iwl-agn-rs";
3141 2435
3142 /* Tell mac80211 our characteristics */ 2436 /* Tell mac80211 our characteristics */
3143 hw->flags = IEEE80211_HW_SIGNAL_DBM | 2437 hw->flags = IEEE80211_HW_SIGNAL_DBM |
3144 IEEE80211_HW_AMPDU_AGGREGATION | 2438 IEEE80211_HW_AMPDU_AGGREGATION |
3145 IEEE80211_HW_SPECTRUM_MGMT; 2439 IEEE80211_HW_NEED_DTIM_PERIOD |
2440 IEEE80211_HW_SPECTRUM_MGMT |
2441 IEEE80211_HW_REPORTS_TX_ACK_STATUS;
3146 2442
3147 if (!priv->cfg->broken_powersave) 2443 hw->max_tx_aggregation_subframes = LINK_QUAL_AGG_FRAME_LIMIT_DEF;
3148 hw->flags |= IEEE80211_HW_SUPPORTS_PS | 2444
3149 IEEE80211_HW_SUPPORTS_DYNAMIC_PS; 2445 hw->flags |= IEEE80211_HW_SUPPORTS_PS |
2446 IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
3150 2447
3151 if (priv->cfg->sku & IWL_SKU_N) 2448 if (priv->cfg->sku & IWL_SKU_N)
3152 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS | 2449 hw->flags |= IEEE80211_HW_SUPPORTS_DYNAMIC_SMPS |
3153 IEEE80211_HW_SUPPORTS_STATIC_SMPS; 2450 IEEE80211_HW_SUPPORTS_STATIC_SMPS;
3154 2451
2452 if (capa->flags & IWL_UCODE_TLV_FLAGS_MFP)
2453 hw->flags |= IEEE80211_HW_MFP_CAPABLE;
2454
3155 hw->sta_data_size = sizeof(struct iwl_station_priv); 2455 hw->sta_data_size = sizeof(struct iwl_station_priv);
3156 hw->vif_data_size = sizeof(struct iwl_vif_priv); 2456 hw->vif_data_size = sizeof(struct iwl_vif_priv);
3157 2457
3158 hw->wiphy->interface_modes = 2458 for_each_context(priv, ctx) {
3159 BIT(NL80211_IFTYPE_STATION) | 2459 hw->wiphy->interface_modes |= ctx->interface_modes;
3160 BIT(NL80211_IFTYPE_ADHOC); 2460 hw->wiphy->interface_modes |= ctx->exclusive_interface_modes;
2461 }
2462
2463 hw->wiphy->max_remain_on_channel_duration = 1000;
3161 2464
3162 hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY | 2465 hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
3163 WIPHY_FLAG_DISABLE_BEACON_HINTS; 2466 WIPHY_FLAG_DISABLE_BEACON_HINTS |
2467 WIPHY_FLAG_IBSS_RSN;
3164 2468
3165 /* 2469 /*
3166 * For now, disable PS by default because it affects 2470 * For now, disable PS by default because it affects
@@ -3184,6 +2488,8 @@ static int iwl_mac_setup_register(struct iwl_priv *priv,
3184 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = 2488 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3185 &priv->bands[IEEE80211_BAND_5GHZ]; 2489 &priv->bands[IEEE80211_BAND_5GHZ];
3186 2490
2491 iwl_leds_init(priv);
2492
3187 ret = ieee80211_register_hw(priv->hw); 2493 ret = ieee80211_register_hw(priv->hw);
3188 if (ret) { 2494 if (ret) {
3189 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret); 2495 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
@@ -3195,7 +2501,7 @@ static int iwl_mac_setup_register(struct iwl_priv *priv,
3195} 2501}
3196 2502
3197 2503
3198static int iwl_mac_start(struct ieee80211_hw *hw) 2504static int iwlagn_mac_start(struct ieee80211_hw *hw)
3199{ 2505{
3200 struct iwl_priv *priv = hw->priv; 2506 struct iwl_priv *priv = hw->priv;
3201 int ret; 2507 int ret;
@@ -3206,37 +2512,23 @@ static int iwl_mac_start(struct ieee80211_hw *hw)
3206 mutex_lock(&priv->mutex); 2512 mutex_lock(&priv->mutex);
3207 ret = __iwl_up(priv); 2513 ret = __iwl_up(priv);
3208 mutex_unlock(&priv->mutex); 2514 mutex_unlock(&priv->mutex);
3209
3210 if (ret) 2515 if (ret)
3211 return ret; 2516 return ret;
3212 2517
3213 if (iwl_is_rfkill(priv))
3214 goto out;
3215
3216 IWL_DEBUG_INFO(priv, "Start UP work done.\n"); 2518 IWL_DEBUG_INFO(priv, "Start UP work done.\n");
3217 2519
3218 /* Wait for START_ALIVE from Run Time ucode. Otherwise callbacks from 2520 /* Now we should be done, and the READY bit should be set. */
3219 * mac80211 will not be run successfully. */ 2521 if (WARN_ON(!test_bit(STATUS_READY, &priv->status)))
3220 ret = wait_event_interruptible_timeout(priv->wait_command_queue, 2522 ret = -EIO;
3221 test_bit(STATUS_READY, &priv->status),
3222 UCODE_READY_TIMEOUT);
3223 if (!ret) {
3224 if (!test_bit(STATUS_READY, &priv->status)) {
3225 IWL_ERR(priv, "START_ALIVE timeout after %dms.\n",
3226 jiffies_to_msecs(UCODE_READY_TIMEOUT));
3227 return -ETIMEDOUT;
3228 }
3229 }
3230 2523
3231 iwl_led_start(priv); 2524 iwlagn_led_enable(priv);
3232 2525
3233out:
3234 priv->is_open = 1; 2526 priv->is_open = 1;
3235 IWL_DEBUG_MAC80211(priv, "leave\n"); 2527 IWL_DEBUG_MAC80211(priv, "leave\n");
3236 return 0; 2528 return 0;
3237} 2529}
3238 2530
3239static void iwl_mac_stop(struct ieee80211_hw *hw) 2531static void iwlagn_mac_stop(struct ieee80211_hw *hw)
3240{ 2532{
3241 struct iwl_priv *priv = hw->priv; 2533 struct iwl_priv *priv = hw->priv;
3242 2534
@@ -3247,27 +2539,19 @@ static void iwl_mac_stop(struct ieee80211_hw *hw)
3247 2539
3248 priv->is_open = 0; 2540 priv->is_open = 0;
3249 2541
3250 if (iwl_is_ready_rf(priv) || test_bit(STATUS_SCAN_HW, &priv->status)) {
3251 /* stop mac, cancel any scan request and clear
3252 * RXON_FILTER_ASSOC_MSK BIT
3253 */
3254 mutex_lock(&priv->mutex);
3255 iwl_scan_cancel_timeout(priv, 100);
3256 mutex_unlock(&priv->mutex);
3257 }
3258
3259 iwl_down(priv); 2542 iwl_down(priv);
3260 2543
3261 flush_workqueue(priv->workqueue); 2544 flush_workqueue(priv->workqueue);
3262 2545
3263 /* enable interrupts again in order to receive rfkill changes */ 2546 /* User space software may expect getting rfkill changes
2547 * even if interface is down */
3264 iwl_write32(priv, CSR_INT, 0xFFFFFFFF); 2548 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
3265 iwl_enable_interrupts(priv); 2549 iwl_enable_rfkill_int(priv);
3266 2550
3267 IWL_DEBUG_MAC80211(priv, "leave\n"); 2551 IWL_DEBUG_MAC80211(priv, "leave\n");
3268} 2552}
3269 2553
3270static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb) 2554static void iwlagn_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3271{ 2555{
3272 struct iwl_priv *priv = hw->priv; 2556 struct iwl_priv *priv = hw->priv;
3273 2557
@@ -3280,100 +2564,53 @@ static int iwl_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
3280 dev_kfree_skb_any(skb); 2564 dev_kfree_skb_any(skb);
3281 2565
3282 IWL_DEBUG_MACDUMP(priv, "leave\n"); 2566 IWL_DEBUG_MACDUMP(priv, "leave\n");
3283 return NETDEV_TX_OK;
3284}
3285
3286void iwl_config_ap(struct iwl_priv *priv, struct ieee80211_vif *vif)
3287{
3288 int ret = 0;
3289
3290 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3291 return;
3292
3293 /* The following should be done only at AP bring up */
3294 if (!iwl_is_associated(priv)) {
3295
3296 /* RXON - unassoc (to set timing command) */
3297 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3298 iwlcore_commit_rxon(priv);
3299
3300 /* RXON Timing */
3301 iwl_setup_rxon_timing(priv, vif);
3302 ret = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
3303 sizeof(priv->rxon_timing), &priv->rxon_timing);
3304 if (ret)
3305 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
3306 "Attempting to continue.\n");
3307
3308 /* AP has all antennas */
3309 priv->chain_noise_data.active_chains =
3310 priv->hw_params.valid_rx_ant;
3311 iwl_set_rxon_ht(priv, &priv->current_ht_config);
3312 if (priv->cfg->ops->hcmd->set_rxon_chain)
3313 priv->cfg->ops->hcmd->set_rxon_chain(priv);
3314
3315 priv->staging_rxon.assoc_id = 0;
3316
3317 if (vif->bss_conf.use_short_preamble)
3318 priv->staging_rxon.flags |=
3319 RXON_FLG_SHORT_PREAMBLE_MSK;
3320 else
3321 priv->staging_rxon.flags &=
3322 ~RXON_FLG_SHORT_PREAMBLE_MSK;
3323
3324 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
3325 if (vif->bss_conf.use_short_slot)
3326 priv->staging_rxon.flags |=
3327 RXON_FLG_SHORT_SLOT_MSK;
3328 else
3329 priv->staging_rxon.flags &=
3330 ~RXON_FLG_SHORT_SLOT_MSK;
3331 }
3332 /* restore RXON assoc */
3333 priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
3334 iwlcore_commit_rxon(priv);
3335 }
3336 iwl_send_beacon_cmd(priv);
3337
3338 /* FIXME - we need to add code here to detect a totally new
3339 * configuration, reset the AP, unassoc, rxon timing, assoc,
3340 * clear sta table, add BCAST sta... */
3341} 2567}
3342 2568
3343static void iwl_mac_update_tkip_key(struct ieee80211_hw *hw, 2569static void iwlagn_mac_update_tkip_key(struct ieee80211_hw *hw,
3344 struct ieee80211_vif *vif, 2570 struct ieee80211_vif *vif,
3345 struct ieee80211_key_conf *keyconf, 2571 struct ieee80211_key_conf *keyconf,
3346 struct ieee80211_sta *sta, 2572 struct ieee80211_sta *sta,
3347 u32 iv32, u16 *phase1key) 2573 u32 iv32, u16 *phase1key)
3348{ 2574{
3349
3350 struct iwl_priv *priv = hw->priv; 2575 struct iwl_priv *priv = hw->priv;
2576 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
2577
3351 IWL_DEBUG_MAC80211(priv, "enter\n"); 2578 IWL_DEBUG_MAC80211(priv, "enter\n");
3352 2579
3353 iwl_update_tkip_key(priv, keyconf, sta, 2580 iwl_update_tkip_key(priv, vif_priv->ctx, keyconf, sta,
3354 iv32, phase1key); 2581 iv32, phase1key);
3355 2582
3356 IWL_DEBUG_MAC80211(priv, "leave\n"); 2583 IWL_DEBUG_MAC80211(priv, "leave\n");
3357} 2584}
3358 2585
3359static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, 2586static int iwlagn_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3360 struct ieee80211_vif *vif, 2587 struct ieee80211_vif *vif,
3361 struct ieee80211_sta *sta, 2588 struct ieee80211_sta *sta,
3362 struct ieee80211_key_conf *key) 2589 struct ieee80211_key_conf *key)
3363{ 2590{
3364 struct iwl_priv *priv = hw->priv; 2591 struct iwl_priv *priv = hw->priv;
2592 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
2593 struct iwl_rxon_context *ctx = vif_priv->ctx;
3365 int ret; 2594 int ret;
3366 u8 sta_id; 2595 u8 sta_id;
3367 bool is_default_wep_key = false; 2596 bool is_default_wep_key = false;
3368 2597
3369 IWL_DEBUG_MAC80211(priv, "enter\n"); 2598 IWL_DEBUG_MAC80211(priv, "enter\n");
3370 2599
3371 if (priv->cfg->mod_params->sw_crypto) { 2600 if (iwlagn_mod_params.sw_crypto) {
3372 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n"); 2601 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
3373 return -EOPNOTSUPP; 2602 return -EOPNOTSUPP;
3374 } 2603 }
3375 2604
3376 sta_id = iwl_sta_id_or_broadcast(priv, sta); 2605 /*
2606 * To support IBSS RSN, don't program group keys in IBSS, the
2607 * hardware will then not attempt to decrypt the frames.
2608 */
2609 if (vif->type == NL80211_IFTYPE_ADHOC &&
2610 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
2611 return -EOPNOTSUPP;
2612
2613 sta_id = iwl_sta_id_or_broadcast(priv, vif_priv->ctx, sta);
3377 if (sta_id == IWL_INVALID_STATION) 2614 if (sta_id == IWL_INVALID_STATION)
3378 return -EINVAL; 2615 return -EINVAL;
3379 2616
@@ -3386,9 +2623,11 @@ static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3386 * in 1X mode. 2623 * in 1X mode.
3387 * In legacy wep mode, we use another host command to the uCode. 2624 * In legacy wep mode, we use another host command to the uCode.
3388 */ 2625 */
3389 if (key->alg == ALG_WEP && !sta && vif->type != NL80211_IFTYPE_AP) { 2626 if ((key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
2627 key->cipher == WLAN_CIPHER_SUITE_WEP104) &&
2628 !sta) {
3390 if (cmd == SET_KEY) 2629 if (cmd == SET_KEY)
3391 is_default_wep_key = !priv->key_mapping_key; 2630 is_default_wep_key = !ctx->key_mapping_keys;
3392 else 2631 else
3393 is_default_wep_key = 2632 is_default_wep_key =
3394 (key->hw_key_idx == HW_KEY_DEFAULT); 2633 (key->hw_key_idx == HW_KEY_DEFAULT);
@@ -3397,17 +2636,18 @@ static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3397 switch (cmd) { 2636 switch (cmd) {
3398 case SET_KEY: 2637 case SET_KEY:
3399 if (is_default_wep_key) 2638 if (is_default_wep_key)
3400 ret = iwl_set_default_wep_key(priv, key); 2639 ret = iwl_set_default_wep_key(priv, vif_priv->ctx, key);
3401 else 2640 else
3402 ret = iwl_set_dynamic_key(priv, key, sta_id); 2641 ret = iwl_set_dynamic_key(priv, vif_priv->ctx,
2642 key, sta_id);
3403 2643
3404 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n"); 2644 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3405 break; 2645 break;
3406 case DISABLE_KEY: 2646 case DISABLE_KEY:
3407 if (is_default_wep_key) 2647 if (is_default_wep_key)
3408 ret = iwl_remove_default_wep_key(priv, key); 2648 ret = iwl_remove_default_wep_key(priv, ctx, key);
3409 else 2649 else
3410 ret = iwl_remove_dynamic_key(priv, key, sta_id); 2650 ret = iwl_remove_dynamic_key(priv, ctx, key, sta_id);
3411 2651
3412 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n"); 2652 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3413 break; 2653 break;
@@ -3421,13 +2661,15 @@ static int iwl_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
3421 return ret; 2661 return ret;
3422} 2662}
3423 2663
3424static int iwl_mac_ampdu_action(struct ieee80211_hw *hw, 2664static int iwlagn_mac_ampdu_action(struct ieee80211_hw *hw,
3425 struct ieee80211_vif *vif, 2665 struct ieee80211_vif *vif,
3426 enum ieee80211_ampdu_mlme_action action, 2666 enum ieee80211_ampdu_mlme_action action,
3427 struct ieee80211_sta *sta, u16 tid, u16 *ssn) 2667 struct ieee80211_sta *sta, u16 tid, u16 *ssn,
2668 u8 buf_size)
3428{ 2669{
3429 struct iwl_priv *priv = hw->priv; 2670 struct iwl_priv *priv = hw->priv;
3430 int ret = -EINVAL; 2671 int ret = -EINVAL;
2672 struct iwl_station_priv *sta_priv = (void *) sta->drv_priv;
3431 2673
3432 IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n", 2674 IWL_DEBUG_HT(priv, "A-MPDU action on addr %pM tid %d\n",
3433 sta->addr, tid); 2675 sta->addr, tid);
@@ -3467,7 +2709,8 @@ static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
3467 } 2709 }
3468 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) 2710 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
3469 ret = 0; 2711 ret = 0;
3470 if (priv->cfg->use_rts_for_aggregation) { 2712 if (priv->cfg->ht_params &&
2713 priv->cfg->ht_params->use_rts_for_aggregation) {
3471 struct iwl_station_priv *sta_priv = 2714 struct iwl_station_priv *sta_priv =
3472 (void *) sta->drv_priv; 2715 (void *) sta->drv_priv;
3473 /* 2716 /*
@@ -3476,15 +2719,37 @@ static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
3476 2719
3477 sta_priv->lq_sta.lq.general_params.flags &= 2720 sta_priv->lq_sta.lq.general_params.flags &=
3478 ~LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK; 2721 ~LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
3479 iwl_send_lq_cmd(priv, &sta_priv->lq_sta.lq, 2722 iwl_send_lq_cmd(priv, iwl_rxon_ctx_from_vif(vif),
3480 CMD_ASYNC, false); 2723 &sta_priv->lq_sta.lq, CMD_ASYNC, false);
3481 } 2724 }
3482 break; 2725 break;
3483 case IEEE80211_AMPDU_TX_OPERATIONAL: 2726 case IEEE80211_AMPDU_TX_OPERATIONAL:
3484 if (priv->cfg->use_rts_for_aggregation) { 2727 buf_size = min_t(int, buf_size, LINK_QUAL_AGG_FRAME_LIMIT_DEF);
3485 struct iwl_station_priv *sta_priv = 2728
3486 (void *) sta->drv_priv; 2729 iwlagn_txq_agg_queue_setup(priv, sta, tid, buf_size);
2730
2731 /*
2732 * If the limit is 0, then it wasn't initialised yet,
2733 * use the default. We can do that since we take the
2734 * minimum below, and we don't want to go above our
2735 * default due to hardware restrictions.
2736 */
2737 if (sta_priv->max_agg_bufsize == 0)
2738 sta_priv->max_agg_bufsize =
2739 LINK_QUAL_AGG_FRAME_LIMIT_DEF;
2740
2741 /*
2742 * Even though in theory the peer could have different
2743 * aggregation reorder buffer sizes for different sessions,
2744 * our ucode doesn't allow for that and has a global limit
2745 * for each station. Therefore, use the minimum of all the
2746 * aggregation sessions and our default value.
2747 */
2748 sta_priv->max_agg_bufsize =
2749 min(sta_priv->max_agg_bufsize, buf_size);
3487 2750
2751 if (priv->cfg->ht_params &&
2752 priv->cfg->ht_params->use_rts_for_aggregation) {
3488 /* 2753 /*
3489 * switch to RTS/CTS if it is the prefer protection 2754 * switch to RTS/CTS if it is the prefer protection
3490 * method for HT traffic 2755 * method for HT traffic
@@ -3492,9 +2757,13 @@ static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
3492 2757
3493 sta_priv->lq_sta.lq.general_params.flags |= 2758 sta_priv->lq_sta.lq.general_params.flags |=
3494 LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK; 2759 LINK_QUAL_FLAGS_SET_STA_TLC_RTS_MSK;
3495 iwl_send_lq_cmd(priv, &sta_priv->lq_sta.lq,
3496 CMD_ASYNC, false);
3497 } 2760 }
2761
2762 sta_priv->lq_sta.lq.agg_params.agg_frame_cnt_limit =
2763 sta_priv->max_agg_bufsize;
2764
2765 iwl_send_lq_cmd(priv, iwl_rxon_ctx_from_vif(vif),
2766 &sta_priv->lq_sta.lq, CMD_ASYNC, false);
3498 ret = 0; 2767 ret = 0;
3499 break; 2768 break;
3500 } 2769 }
@@ -3503,42 +2772,13 @@ static int iwl_mac_ampdu_action(struct ieee80211_hw *hw,
3503 return ret; 2772 return ret;
3504} 2773}
3505 2774
3506static void iwl_mac_sta_notify(struct ieee80211_hw *hw,
3507 struct ieee80211_vif *vif,
3508 enum sta_notify_cmd cmd,
3509 struct ieee80211_sta *sta)
3510{
3511 struct iwl_priv *priv = hw->priv;
3512 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
3513 int sta_id;
3514
3515 switch (cmd) {
3516 case STA_NOTIFY_SLEEP:
3517 WARN_ON(!sta_priv->client);
3518 sta_priv->asleep = true;
3519 if (atomic_read(&sta_priv->pending_frames) > 0)
3520 ieee80211_sta_block_awake(hw, sta, true);
3521 break;
3522 case STA_NOTIFY_AWAKE:
3523 WARN_ON(!sta_priv->client);
3524 if (!sta_priv->asleep)
3525 break;
3526 sta_priv->asleep = false;
3527 sta_id = iwl_sta_id(sta);
3528 if (sta_id != IWL_INVALID_STATION)
3529 iwl_sta_modify_ps_wake(priv, sta_id);
3530 break;
3531 default:
3532 break;
3533 }
3534}
3535
3536static int iwlagn_mac_sta_add(struct ieee80211_hw *hw, 2775static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3537 struct ieee80211_vif *vif, 2776 struct ieee80211_vif *vif,
3538 struct ieee80211_sta *sta) 2777 struct ieee80211_sta *sta)
3539{ 2778{
3540 struct iwl_priv *priv = hw->priv; 2779 struct iwl_priv *priv = hw->priv;
3541 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv; 2780 struct iwl_station_priv *sta_priv = (void *)sta->drv_priv;
2781 struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
3542 bool is_ap = vif->type == NL80211_IFTYPE_STATION; 2782 bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3543 int ret; 2783 int ret;
3544 u8 sta_id; 2784 u8 sta_id;
@@ -3554,8 +2794,8 @@ static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3554 if (vif->type == NL80211_IFTYPE_AP) 2794 if (vif->type == NL80211_IFTYPE_AP)
3555 sta_priv->client = true; 2795 sta_priv->client = true;
3556 2796
3557 ret = iwl_add_station_common(priv, sta->addr, is_ap, &sta->ht_cap, 2797 ret = iwl_add_station_common(priv, vif_priv->ctx, sta->addr,
3558 &sta_id); 2798 is_ap, sta, &sta_id);
3559 if (ret) { 2799 if (ret) {
3560 IWL_ERR(priv, "Unable to add station %pM (%d)\n", 2800 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3561 sta->addr, ret); 2801 sta->addr, ret);
@@ -3575,40 +2815,47 @@ static int iwlagn_mac_sta_add(struct ieee80211_hw *hw,
3575 return 0; 2815 return 0;
3576} 2816}
3577 2817
3578static void iwl_mac_channel_switch(struct ieee80211_hw *hw, 2818static void iwlagn_mac_channel_switch(struct ieee80211_hw *hw,
3579 struct ieee80211_channel_switch *ch_switch) 2819 struct ieee80211_channel_switch *ch_switch)
3580{ 2820{
3581 struct iwl_priv *priv = hw->priv; 2821 struct iwl_priv *priv = hw->priv;
3582 const struct iwl_channel_info *ch_info; 2822 const struct iwl_channel_info *ch_info;
3583 struct ieee80211_conf *conf = &hw->conf; 2823 struct ieee80211_conf *conf = &hw->conf;
2824 struct ieee80211_channel *channel = ch_switch->channel;
3584 struct iwl_ht_config *ht_conf = &priv->current_ht_config; 2825 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
2826 /*
2827 * MULTI-FIXME
2828 * When we add support for multiple interfaces, we need to
2829 * revisit this. The channel switch command in the device
2830 * only affects the BSS context, but what does that really
2831 * mean? And what if we get a CSA on the second interface?
2832 * This needs a lot of work.
2833 */
2834 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3585 u16 ch; 2835 u16 ch;
3586 unsigned long flags = 0; 2836 unsigned long flags = 0;
3587 2837
3588 IWL_DEBUG_MAC80211(priv, "enter\n"); 2838 IWL_DEBUG_MAC80211(priv, "enter\n");
3589 2839
2840 mutex_lock(&priv->mutex);
2841
3590 if (iwl_is_rfkill(priv)) 2842 if (iwl_is_rfkill(priv))
3591 goto out_exit; 2843 goto out;
3592 2844
3593 if (test_bit(STATUS_EXIT_PENDING, &priv->status) || 2845 if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
3594 test_bit(STATUS_SCANNING, &priv->status)) 2846 test_bit(STATUS_SCANNING, &priv->status) ||
3595 goto out_exit; 2847 test_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->status))
3596 2848 goto out;
3597 if (!iwl_is_associated(priv))
3598 goto out_exit;
3599 2849
3600 /* channel switch in progress */ 2850 if (!iwl_is_associated_ctx(ctx))
3601 if (priv->switch_rxon.switch_in_progress == true) 2851 goto out;
3602 goto out_exit;
3603 2852
3604 mutex_lock(&priv->mutex);
3605 if (priv->cfg->ops->lib->set_channel_switch) { 2853 if (priv->cfg->ops->lib->set_channel_switch) {
3606 2854
3607 ch = ieee80211_frequency_to_channel( 2855 ch = channel->hw_value;
3608 ch_switch->channel->center_freq); 2856 if (le16_to_cpu(ctx->active.channel) != ch) {
3609 if (le16_to_cpu(priv->active_rxon.channel) != ch) {
3610 ch_info = iwl_get_channel_info(priv, 2857 ch_info = iwl_get_channel_info(priv,
3611 conf->channel->band, 2858 channel->band,
3612 ch); 2859 ch);
3613 if (!is_channel_valid(ch_info)) { 2860 if (!is_channel_valid(ch_info)) {
3614 IWL_DEBUG_MAC80211(priv, "invalid channel\n"); 2861 IWL_DEBUG_MAC80211(priv, "invalid channel\n");
@@ -3619,34 +2866,31 @@ static void iwl_mac_channel_switch(struct ieee80211_hw *hw,
3619 priv->current_ht_config.smps = conf->smps_mode; 2866 priv->current_ht_config.smps = conf->smps_mode;
3620 2867
3621 /* Configure HT40 channels */ 2868 /* Configure HT40 channels */
3622 ht_conf->is_ht = conf_is_ht(conf); 2869 ctx->ht.enabled = conf_is_ht(conf);
3623 if (ht_conf->is_ht) { 2870 if (ctx->ht.enabled) {
3624 if (conf_is_ht40_minus(conf)) { 2871 if (conf_is_ht40_minus(conf)) {
3625 ht_conf->extension_chan_offset = 2872 ctx->ht.extension_chan_offset =
3626 IEEE80211_HT_PARAM_CHA_SEC_BELOW; 2873 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
3627 ht_conf->is_40mhz = true; 2874 ctx->ht.is_40mhz = true;
3628 } else if (conf_is_ht40_plus(conf)) { 2875 } else if (conf_is_ht40_plus(conf)) {
3629 ht_conf->extension_chan_offset = 2876 ctx->ht.extension_chan_offset =
3630 IEEE80211_HT_PARAM_CHA_SEC_ABOVE; 2877 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
3631 ht_conf->is_40mhz = true; 2878 ctx->ht.is_40mhz = true;
3632 } else { 2879 } else {
3633 ht_conf->extension_chan_offset = 2880 ctx->ht.extension_chan_offset =
3634 IEEE80211_HT_PARAM_CHA_SEC_NONE; 2881 IEEE80211_HT_PARAM_CHA_SEC_NONE;
3635 ht_conf->is_40mhz = false; 2882 ctx->ht.is_40mhz = false;
3636 } 2883 }
3637 } else 2884 } else
3638 ht_conf->is_40mhz = false; 2885 ctx->ht.is_40mhz = false;
3639 2886
3640 /* if we are switching from ht to 2.4 clear flags 2887 if ((le16_to_cpu(ctx->staging.channel) != ch))
3641 * from any ht related info since 2.4 does not 2888 ctx->staging.flags = 0;
3642 * support ht */
3643 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
3644 priv->staging_rxon.flags = 0;
3645 2889
3646 iwl_set_rxon_channel(priv, conf->channel); 2890 iwl_set_rxon_channel(priv, channel, ctx);
3647 iwl_set_rxon_ht(priv, ht_conf); 2891 iwl_set_rxon_ht(priv, ht_conf);
3648 iwl_set_flags_for_band(priv, conf->channel->band, 2892 iwl_set_flags_for_band(priv, ctx, channel->band,
3649 priv->vif); 2893 ctx->vif);
3650 spin_unlock_irqrestore(&priv->lock, flags); 2894 spin_unlock_irqrestore(&priv->lock, flags);
3651 2895
3652 iwl_set_rate(priv); 2896 iwl_set_rate(priv);
@@ -3654,16 +2898,19 @@ static void iwl_mac_channel_switch(struct ieee80211_hw *hw,
3654 * at this point, staging_rxon has the 2898 * at this point, staging_rxon has the
3655 * configuration for channel switch 2899 * configuration for channel switch
3656 */ 2900 */
2901 set_bit(STATUS_CHANNEL_SWITCH_PENDING, &priv->status);
2902 priv->switch_channel = cpu_to_le16(ch);
3657 if (priv->cfg->ops->lib->set_channel_switch(priv, 2903 if (priv->cfg->ops->lib->set_channel_switch(priv,
3658 ch_switch)) 2904 ch_switch)) {
3659 priv->switch_rxon.switch_in_progress = false; 2905 clear_bit(STATUS_CHANNEL_SWITCH_PENDING,
2906 &priv->status);
2907 priv->switch_channel = 0;
2908 ieee80211_chswitch_done(ctx->vif, false);
2909 }
3660 } 2910 }
3661 } 2911 }
3662out: 2912out:
3663 mutex_unlock(&priv->mutex); 2913 mutex_unlock(&priv->mutex);
3664out_exit:
3665 if (!priv->switch_rxon.switch_in_progress)
3666 ieee80211_chswitch_done(priv->vif, false);
3667 IWL_DEBUG_MAC80211(priv, "leave\n"); 2914 IWL_DEBUG_MAC80211(priv, "leave\n");
3668} 2915}
3669 2916
@@ -3674,6 +2921,7 @@ static void iwlagn_configure_filter(struct ieee80211_hw *hw,
3674{ 2921{
3675 struct iwl_priv *priv = hw->priv; 2922 struct iwl_priv *priv = hw->priv;
3676 __le32 filter_or = 0, filter_nand = 0; 2923 __le32 filter_or = 0, filter_nand = 0;
2924 struct iwl_rxon_context *ctx;
3677 2925
3678#define CHK(test, flag) do { \ 2926#define CHK(test, flag) do { \
3679 if (*total_flags & (test)) \ 2927 if (*total_flags & (test)) \
@@ -3686,17 +2934,23 @@ static void iwlagn_configure_filter(struct ieee80211_hw *hw,
3686 changed_flags, *total_flags); 2934 changed_flags, *total_flags);
3687 2935
3688 CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK); 2936 CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
3689 CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK); 2937 /* Setting _just_ RXON_FILTER_CTL2HOST_MSK causes FH errors */
2938 CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_PROMISC_MSK);
3690 CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK); 2939 CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
3691 2940
3692#undef CHK 2941#undef CHK
3693 2942
3694 mutex_lock(&priv->mutex); 2943 mutex_lock(&priv->mutex);
3695 2944
3696 priv->staging_rxon.filter_flags &= ~filter_nand; 2945 for_each_context(priv, ctx) {
3697 priv->staging_rxon.filter_flags |= filter_or; 2946 ctx->staging.filter_flags &= ~filter_nand;
2947 ctx->staging.filter_flags |= filter_or;
3698 2948
3699 iwlcore_commit_rxon(priv); 2949 /*
2950 * Not committing directly because hardware can perform a scan,
2951 * but we'll eventually commit the filter flags change anyway.
2952 */
2953 }
3700 2954
3701 mutex_unlock(&priv->mutex); 2955 mutex_unlock(&priv->mutex);
3702 2956
@@ -3710,7 +2964,7 @@ static void iwlagn_configure_filter(struct ieee80211_hw *hw,
3710 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL; 2964 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
3711} 2965}
3712 2966
3713static void iwl_mac_flush(struct ieee80211_hw *hw, bool drop) 2967static void iwlagn_mac_flush(struct ieee80211_hw *hw, bool drop)
3714{ 2968{
3715 struct iwl_priv *priv = hw->priv; 2969 struct iwl_priv *priv = hw->priv;
3716 2970
@@ -3748,6 +3002,95 @@ done:
3748 IWL_DEBUG_MAC80211(priv, "leave\n"); 3002 IWL_DEBUG_MAC80211(priv, "leave\n");
3749} 3003}
3750 3004
3005static void iwlagn_disable_roc(struct iwl_priv *priv)
3006{
3007 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_PAN];
3008 struct ieee80211_channel *chan = ACCESS_ONCE(priv->hw->conf.channel);
3009
3010 lockdep_assert_held(&priv->mutex);
3011
3012 if (!ctx->is_active)
3013 return;
3014
3015 ctx->staging.dev_type = RXON_DEV_TYPE_2STA;
3016 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
3017 iwl_set_rxon_channel(priv, chan, ctx);
3018 iwl_set_flags_for_band(priv, ctx, chan->band, NULL);
3019
3020 priv->_agn.hw_roc_channel = NULL;
3021
3022 iwlcore_commit_rxon(priv, ctx);
3023
3024 ctx->is_active = false;
3025}
3026
3027static void iwlagn_bg_roc_done(struct work_struct *work)
3028{
3029 struct iwl_priv *priv = container_of(work, struct iwl_priv,
3030 _agn.hw_roc_work.work);
3031
3032 mutex_lock(&priv->mutex);
3033 ieee80211_remain_on_channel_expired(priv->hw);
3034 iwlagn_disable_roc(priv);
3035 mutex_unlock(&priv->mutex);
3036}
3037
3038static int iwl_mac_remain_on_channel(struct ieee80211_hw *hw,
3039 struct ieee80211_channel *channel,
3040 enum nl80211_channel_type channel_type,
3041 int duration)
3042{
3043 struct iwl_priv *priv = hw->priv;
3044 int err = 0;
3045
3046 if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN)))
3047 return -EOPNOTSUPP;
3048
3049 if (!(priv->contexts[IWL_RXON_CTX_PAN].interface_modes &
3050 BIT(NL80211_IFTYPE_P2P_CLIENT)))
3051 return -EOPNOTSUPP;
3052
3053 mutex_lock(&priv->mutex);
3054
3055 if (priv->contexts[IWL_RXON_CTX_PAN].is_active ||
3056 test_bit(STATUS_SCAN_HW, &priv->status)) {
3057 err = -EBUSY;
3058 goto out;
3059 }
3060
3061 priv->contexts[IWL_RXON_CTX_PAN].is_active = true;
3062 priv->_agn.hw_roc_channel = channel;
3063 priv->_agn.hw_roc_chantype = channel_type;
3064 priv->_agn.hw_roc_duration = DIV_ROUND_UP(duration * 1000, 1024);
3065 iwlcore_commit_rxon(priv, &priv->contexts[IWL_RXON_CTX_PAN]);
3066 queue_delayed_work(priv->workqueue, &priv->_agn.hw_roc_work,
3067 msecs_to_jiffies(duration + 20));
3068
3069 msleep(IWL_MIN_SLOT_TIME); /* TU is almost ms */
3070 ieee80211_ready_on_channel(priv->hw);
3071
3072 out:
3073 mutex_unlock(&priv->mutex);
3074
3075 return err;
3076}
3077
3078static int iwl_mac_cancel_remain_on_channel(struct ieee80211_hw *hw)
3079{
3080 struct iwl_priv *priv = hw->priv;
3081
3082 if (!(priv->valid_contexts & BIT(IWL_RXON_CTX_PAN)))
3083 return -EOPNOTSUPP;
3084
3085 cancel_delayed_work_sync(&priv->_agn.hw_roc_work);
3086
3087 mutex_lock(&priv->mutex);
3088 iwlagn_disable_roc(priv);
3089 mutex_unlock(&priv->mutex);
3090
3091 return 0;
3092}
3093
3751/***************************************************************************** 3094/*****************************************************************************
3752 * 3095 *
3753 * driver setup and teardown 3096 * driver setup and teardown
@@ -3765,8 +3108,9 @@ static void iwl_setup_deferred_work(struct iwl_priv *priv)
3765 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update); 3108 INIT_WORK(&priv->beacon_update, iwl_bg_beacon_update);
3766 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work); 3109 INIT_WORK(&priv->run_time_calib_work, iwl_bg_run_time_calib_work);
3767 INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush); 3110 INIT_WORK(&priv->tx_flush, iwl_bg_tx_flush);
3768 INIT_DELAYED_WORK(&priv->init_alive_start, iwl_bg_init_alive_start); 3111 INIT_WORK(&priv->bt_full_concurrency, iwl_bg_bt_full_concurrency);
3769 INIT_DELAYED_WORK(&priv->alive_start, iwl_bg_alive_start); 3112 INIT_WORK(&priv->bt_runtime_config, iwl_bg_bt_runtime_config);
3113 INIT_DELAYED_WORK(&priv->_agn.hw_roc_work, iwlagn_bg_roc_done);
3770 3114
3771 iwl_setup_scan_deferred_work(priv); 3115 iwl_setup_scan_deferred_work(priv);
3772 3116
@@ -3781,19 +3125,12 @@ static void iwl_setup_deferred_work(struct iwl_priv *priv)
3781 priv->ucode_trace.data = (unsigned long)priv; 3125 priv->ucode_trace.data = (unsigned long)priv;
3782 priv->ucode_trace.function = iwl_bg_ucode_trace; 3126 priv->ucode_trace.function = iwl_bg_ucode_trace;
3783 3127
3784 if (priv->cfg->ops->lib->recover_from_tx_stall) { 3128 init_timer(&priv->watchdog);
3785 init_timer(&priv->monitor_recover); 3129 priv->watchdog.data = (unsigned long)priv;
3786 priv->monitor_recover.data = (unsigned long)priv; 3130 priv->watchdog.function = iwl_bg_watchdog;
3787 priv->monitor_recover.function =
3788 priv->cfg->ops->lib->recover_from_tx_stall;
3789 }
3790 3131
3791 if (!priv->cfg->use_isr_legacy) 3132 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3792 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long)) 3133 iwl_irq_tasklet, (unsigned long)priv);
3793 iwl_irq_tasklet, (unsigned long)priv);
3794 else
3795 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3796 iwl_irq_tasklet_legacy, (unsigned long)priv);
3797} 3134}
3798 3135
3799static void iwl_cancel_deferred_work(struct iwl_priv *priv) 3136static void iwl_cancel_deferred_work(struct iwl_priv *priv)
@@ -3801,16 +3138,16 @@ static void iwl_cancel_deferred_work(struct iwl_priv *priv)
3801 if (priv->cfg->ops->lib->cancel_deferred_work) 3138 if (priv->cfg->ops->lib->cancel_deferred_work)
3802 priv->cfg->ops->lib->cancel_deferred_work(priv); 3139 priv->cfg->ops->lib->cancel_deferred_work(priv);
3803 3140
3804 cancel_delayed_work_sync(&priv->init_alive_start);
3805 cancel_delayed_work(&priv->scan_check);
3806 cancel_work_sync(&priv->start_internal_scan);
3807 cancel_delayed_work(&priv->alive_start);
3808 cancel_work_sync(&priv->run_time_calib_work); 3141 cancel_work_sync(&priv->run_time_calib_work);
3809 cancel_work_sync(&priv->beacon_update); 3142 cancel_work_sync(&priv->beacon_update);
3143
3144 iwl_cancel_scan_deferred_work(priv);
3145
3146 cancel_work_sync(&priv->bt_full_concurrency);
3147 cancel_work_sync(&priv->bt_runtime_config);
3148
3810 del_timer_sync(&priv->statistics_periodic); 3149 del_timer_sync(&priv->statistics_periodic);
3811 del_timer_sync(&priv->ucode_trace); 3150 del_timer_sync(&priv->ucode_trace);
3812 if (priv->cfg->ops->lib->recover_from_tx_stall)
3813 del_timer_sync(&priv->monitor_recover);
3814} 3151}
3815 3152
3816static void iwl_init_hw_rates(struct iwl_priv *priv, 3153static void iwl_init_hw_rates(struct iwl_priv *priv,
@@ -3838,15 +3175,10 @@ static int iwl_init_drv(struct iwl_priv *priv)
3838{ 3175{
3839 int ret; 3176 int ret;
3840 3177
3841 priv->ibss_beacon = NULL;
3842
3843 spin_lock_init(&priv->sta_lock); 3178 spin_lock_init(&priv->sta_lock);
3844 spin_lock_init(&priv->hcmd_lock); 3179 spin_lock_init(&priv->hcmd_lock);
3845 3180
3846 INIT_LIST_HEAD(&priv->free_frames);
3847
3848 mutex_init(&priv->mutex); 3181 mutex_init(&priv->mutex);
3849 mutex_init(&priv->sync_cmd_mutex);
3850 3182
3851 priv->ieee_channels = NULL; 3183 priv->ieee_channels = NULL;
3852 priv->ieee_rates = NULL; 3184 priv->ieee_rates = NULL;
@@ -3863,16 +3195,25 @@ static int iwl_init_drv(struct iwl_priv *priv)
3863 priv->force_reset[IWL_FW_RESET].reset_duration = 3195 priv->force_reset[IWL_FW_RESET].reset_duration =
3864 IWL_DELAY_NEXT_FORCE_FW_RELOAD; 3196 IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3865 3197
3198 priv->rx_statistics_jiffies = jiffies;
3199
3866 /* Choose which receivers/antennas to use */ 3200 /* Choose which receivers/antennas to use */
3867 if (priv->cfg->ops->hcmd->set_rxon_chain) 3201 if (priv->cfg->ops->hcmd->set_rxon_chain)
3868 priv->cfg->ops->hcmd->set_rxon_chain(priv); 3202 priv->cfg->ops->hcmd->set_rxon_chain(priv,
3203 &priv->contexts[IWL_RXON_CTX_BSS]);
3869 3204
3870 iwl_init_scan_params(priv); 3205 iwl_init_scan_params(priv);
3871 3206
3872 /* Set the tx_power_user_lmt to the lowest power level 3207 /* init bt coex */
3873 * this value will get overwritten by channel max power avg 3208 if (priv->cfg->bt_params &&
3874 * from eeprom */ 3209 priv->cfg->bt_params->advanced_bt_coexist) {
3875 priv->tx_power_user_lmt = IWLAGN_TX_POWER_TARGET_POWER_MIN; 3210 priv->kill_ack_mask = IWLAGN_BT_KILL_ACK_MASK_DEFAULT;
3211 priv->kill_cts_mask = IWLAGN_BT_KILL_CTS_MASK_DEFAULT;
3212 priv->bt_valid = IWLAGN_BT_ALL_VALID_MSK;
3213 priv->bt_on_thresh = BT_ON_THRESHOLD_DEF;
3214 priv->bt_duration = BT_DURATION_LIMIT_DEF;
3215 priv->dynamic_frag_thresh = BT_FRAG_THRESHOLD_DEF;
3216 }
3876 3217
3877 ret = iwl_init_channel_map(priv); 3218 ret = iwl_init_channel_map(priv);
3878 if (ret) { 3219 if (ret) {
@@ -3901,53 +3242,123 @@ static void iwl_uninit_drv(struct iwl_priv *priv)
3901 iwlcore_free_geos(priv); 3242 iwlcore_free_geos(priv);
3902 iwl_free_channel_map(priv); 3243 iwl_free_channel_map(priv);
3903 kfree(priv->scan_cmd); 3244 kfree(priv->scan_cmd);
3245 kfree(priv->beacon_cmd);
3904} 3246}
3905 3247
3906static struct ieee80211_ops iwl_hw_ops = { 3248struct ieee80211_ops iwlagn_hw_ops = {
3907 .tx = iwl_mac_tx, 3249 .tx = iwlagn_mac_tx,
3908 .start = iwl_mac_start, 3250 .start = iwlagn_mac_start,
3909 .stop = iwl_mac_stop, 3251 .stop = iwlagn_mac_stop,
3910 .add_interface = iwl_mac_add_interface, 3252 .add_interface = iwl_mac_add_interface,
3911 .remove_interface = iwl_mac_remove_interface, 3253 .remove_interface = iwl_mac_remove_interface,
3912 .config = iwl_mac_config, 3254 .change_interface = iwl_mac_change_interface,
3255 .config = iwlagn_mac_config,
3913 .configure_filter = iwlagn_configure_filter, 3256 .configure_filter = iwlagn_configure_filter,
3914 .set_key = iwl_mac_set_key, 3257 .set_key = iwlagn_mac_set_key,
3915 .update_tkip_key = iwl_mac_update_tkip_key, 3258 .update_tkip_key = iwlagn_mac_update_tkip_key,
3916 .conf_tx = iwl_mac_conf_tx, 3259 .conf_tx = iwl_mac_conf_tx,
3917 .reset_tsf = iwl_mac_reset_tsf, 3260 .bss_info_changed = iwlagn_bss_info_changed,
3918 .bss_info_changed = iwl_bss_info_changed, 3261 .ampdu_action = iwlagn_mac_ampdu_action,
3919 .ampdu_action = iwl_mac_ampdu_action,
3920 .hw_scan = iwl_mac_hw_scan, 3262 .hw_scan = iwl_mac_hw_scan,
3921 .sta_notify = iwl_mac_sta_notify, 3263 .sta_notify = iwlagn_mac_sta_notify,
3922 .sta_add = iwlagn_mac_sta_add, 3264 .sta_add = iwlagn_mac_sta_add,
3923 .sta_remove = iwl_mac_sta_remove, 3265 .sta_remove = iwl_mac_sta_remove,
3924 .channel_switch = iwl_mac_channel_switch, 3266 .channel_switch = iwlagn_mac_channel_switch,
3925 .flush = iwl_mac_flush, 3267 .flush = iwlagn_mac_flush,
3268 .tx_last_beacon = iwl_mac_tx_last_beacon,
3269 .remain_on_channel = iwl_mac_remain_on_channel,
3270 .cancel_remain_on_channel = iwl_mac_cancel_remain_on_channel,
3271 .offchannel_tx = iwl_mac_offchannel_tx,
3272 .offchannel_tx_cancel_wait = iwl_mac_offchannel_tx_cancel_wait,
3273 CFG80211_TESTMODE_CMD(iwl_testmode_cmd)
3926}; 3274};
3927 3275
3276static u32 iwl_hw_detect(struct iwl_priv *priv)
3277{
3278 u8 rev_id;
3279
3280 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
3281 IWL_DEBUG_INFO(priv, "HW Revision ID = 0x%X\n", rev_id);
3282 return iwl_read32(priv, CSR_HW_REV);
3283}
3284
3285static int iwl_set_hw_params(struct iwl_priv *priv)
3286{
3287 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
3288 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
3289 if (iwlagn_mod_params.amsdu_size_8K)
3290 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
3291 else
3292 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
3293
3294 priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
3295
3296 if (iwlagn_mod_params.disable_11n)
3297 priv->cfg->sku &= ~IWL_SKU_N;
3298
3299 /* Device-specific setup */
3300 return priv->cfg->ops->lib->set_hw_params(priv);
3301}
3302
3303static const u8 iwlagn_bss_ac_to_fifo[] = {
3304 IWL_TX_FIFO_VO,
3305 IWL_TX_FIFO_VI,
3306 IWL_TX_FIFO_BE,
3307 IWL_TX_FIFO_BK,
3308};
3309
3310static const u8 iwlagn_bss_ac_to_queue[] = {
3311 0, 1, 2, 3,
3312};
3313
3314static const u8 iwlagn_pan_ac_to_fifo[] = {
3315 IWL_TX_FIFO_VO_IPAN,
3316 IWL_TX_FIFO_VI_IPAN,
3317 IWL_TX_FIFO_BE_IPAN,
3318 IWL_TX_FIFO_BK_IPAN,
3319};
3320
3321static const u8 iwlagn_pan_ac_to_queue[] = {
3322 7, 6, 5, 4,
3323};
3324
3325/* This function both allocates and initializes hw and priv. */
3326static struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg)
3327{
3328 struct iwl_priv *priv;
3329 /* mac80211 allocates memory for this device instance, including
3330 * space for this driver's private structure */
3331 struct ieee80211_hw *hw;
3332
3333 hw = ieee80211_alloc_hw(sizeof(struct iwl_priv), &iwlagn_hw_ops);
3334 if (hw == NULL) {
3335 pr_err("%s: Can not allocate network device\n",
3336 cfg->name);
3337 goto out;
3338 }
3339
3340 priv = hw->priv;
3341 priv->hw = hw;
3342
3343out:
3344 return hw;
3345}
3346
3928static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 3347static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3929{ 3348{
3930 int err = 0; 3349 int err = 0, i;
3931 struct iwl_priv *priv; 3350 struct iwl_priv *priv;
3932 struct ieee80211_hw *hw; 3351 struct ieee80211_hw *hw;
3933 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data); 3352 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3934 unsigned long flags; 3353 unsigned long flags;
3935 u16 pci_cmd, num_mac; 3354 u16 pci_cmd, num_mac;
3355 u32 hw_rev;
3936 3356
3937 /************************ 3357 /************************
3938 * 1. Allocating HW data 3358 * 1. Allocating HW data
3939 ************************/ 3359 ************************/
3940 3360
3941 /* Disabling hardware scan means that mac80211 will perform scans 3361 hw = iwl_alloc_all(cfg);
3942 * "the hard way", rather than using device's scan. */
3943 if (cfg->mod_params->disable_hw_scan) {
3944 if (iwl_debug_level & IWL_DL_INFO)
3945 dev_printk(KERN_DEBUG, &(pdev->dev),
3946 "Disabling hw_scan\n");
3947 iwl_hw_ops.hw_scan = NULL;
3948 }
3949
3950 hw = iwl_alloc_all(cfg, &iwl_hw_ops);
3951 if (!hw) { 3362 if (!hw) {
3952 err = -ENOMEM; 3363 err = -ENOMEM;
3953 goto out; 3364 goto out;
@@ -3955,6 +3366,60 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3955 priv = hw->priv; 3366 priv = hw->priv;
3956 /* At this point both hw and priv are allocated. */ 3367 /* At this point both hw and priv are allocated. */
3957 3368
3369 priv->ucode_type = UCODE_SUBTYPE_NONE_LOADED;
3370
3371 /*
3372 * The default context is always valid,
3373 * more may be discovered when firmware
3374 * is loaded.
3375 */
3376 priv->valid_contexts = BIT(IWL_RXON_CTX_BSS);
3377
3378 for (i = 0; i < NUM_IWL_RXON_CTX; i++)
3379 priv->contexts[i].ctxid = i;
3380
3381 priv->contexts[IWL_RXON_CTX_BSS].always_active = true;
3382 priv->contexts[IWL_RXON_CTX_BSS].is_active = true;
3383 priv->contexts[IWL_RXON_CTX_BSS].rxon_cmd = REPLY_RXON;
3384 priv->contexts[IWL_RXON_CTX_BSS].rxon_timing_cmd = REPLY_RXON_TIMING;
3385 priv->contexts[IWL_RXON_CTX_BSS].rxon_assoc_cmd = REPLY_RXON_ASSOC;
3386 priv->contexts[IWL_RXON_CTX_BSS].qos_cmd = REPLY_QOS_PARAM;
3387 priv->contexts[IWL_RXON_CTX_BSS].ap_sta_id = IWL_AP_ID;
3388 priv->contexts[IWL_RXON_CTX_BSS].wep_key_cmd = REPLY_WEPKEY;
3389 priv->contexts[IWL_RXON_CTX_BSS].ac_to_fifo = iwlagn_bss_ac_to_fifo;
3390 priv->contexts[IWL_RXON_CTX_BSS].ac_to_queue = iwlagn_bss_ac_to_queue;
3391 priv->contexts[IWL_RXON_CTX_BSS].exclusive_interface_modes =
3392 BIT(NL80211_IFTYPE_ADHOC);
3393 priv->contexts[IWL_RXON_CTX_BSS].interface_modes =
3394 BIT(NL80211_IFTYPE_STATION);
3395 priv->contexts[IWL_RXON_CTX_BSS].ap_devtype = RXON_DEV_TYPE_AP;
3396 priv->contexts[IWL_RXON_CTX_BSS].ibss_devtype = RXON_DEV_TYPE_IBSS;
3397 priv->contexts[IWL_RXON_CTX_BSS].station_devtype = RXON_DEV_TYPE_ESS;
3398 priv->contexts[IWL_RXON_CTX_BSS].unused_devtype = RXON_DEV_TYPE_ESS;
3399
3400 priv->contexts[IWL_RXON_CTX_PAN].rxon_cmd = REPLY_WIPAN_RXON;
3401 priv->contexts[IWL_RXON_CTX_PAN].rxon_timing_cmd = REPLY_WIPAN_RXON_TIMING;
3402 priv->contexts[IWL_RXON_CTX_PAN].rxon_assoc_cmd = REPLY_WIPAN_RXON_ASSOC;
3403 priv->contexts[IWL_RXON_CTX_PAN].qos_cmd = REPLY_WIPAN_QOS_PARAM;
3404 priv->contexts[IWL_RXON_CTX_PAN].ap_sta_id = IWL_AP_ID_PAN;
3405 priv->contexts[IWL_RXON_CTX_PAN].wep_key_cmd = REPLY_WIPAN_WEPKEY;
3406 priv->contexts[IWL_RXON_CTX_PAN].bcast_sta_id = IWLAGN_PAN_BCAST_ID;
3407 priv->contexts[IWL_RXON_CTX_PAN].station_flags = STA_FLG_PAN_STATION;
3408 priv->contexts[IWL_RXON_CTX_PAN].ac_to_fifo = iwlagn_pan_ac_to_fifo;
3409 priv->contexts[IWL_RXON_CTX_PAN].ac_to_queue = iwlagn_pan_ac_to_queue;
3410 priv->contexts[IWL_RXON_CTX_PAN].mcast_queue = IWL_IPAN_MCAST_QUEUE;
3411 priv->contexts[IWL_RXON_CTX_PAN].interface_modes =
3412 BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_AP);
3413#ifdef CONFIG_IWL_P2P
3414 priv->contexts[IWL_RXON_CTX_PAN].interface_modes |=
3415 BIT(NL80211_IFTYPE_P2P_CLIENT) | BIT(NL80211_IFTYPE_P2P_GO);
3416#endif
3417 priv->contexts[IWL_RXON_CTX_PAN].ap_devtype = RXON_DEV_TYPE_CP;
3418 priv->contexts[IWL_RXON_CTX_PAN].station_devtype = RXON_DEV_TYPE_2STA;
3419 priv->contexts[IWL_RXON_CTX_PAN].unused_devtype = RXON_DEV_TYPE_P2P;
3420
3421 BUILD_BUG_ON(NUM_IWL_RXON_CTX != 2);
3422
3958 SET_IEEE80211_DEV(hw, &pdev->dev); 3423 SET_IEEE80211_DEV(hw, &pdev->dev);
3959 3424
3960 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n"); 3425 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
@@ -3962,12 +3427,25 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3962 priv->pci_dev = pdev; 3427 priv->pci_dev = pdev;
3963 priv->inta_mask = CSR_INI_SET_MASK; 3428 priv->inta_mask = CSR_INI_SET_MASK;
3964 3429
3430 /* is antenna coupling more than 35dB ? */
3431 priv->bt_ant_couple_ok =
3432 (iwlagn_ant_coupling > IWL_BT_ANTENNA_COUPLING_THRESHOLD) ?
3433 true : false;
3434
3435 /* enable/disable bt channel inhibition */
3436 priv->bt_ch_announce = iwlagn_bt_ch_announce;
3437 IWL_DEBUG_INFO(priv, "BT channel inhibition is %s\n",
3438 (priv->bt_ch_announce) ? "On" : "Off");
3439
3965 if (iwl_alloc_traffic_mem(priv)) 3440 if (iwl_alloc_traffic_mem(priv))
3966 IWL_ERR(priv, "Not enough memory to generate traffic log\n"); 3441 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3967 3442
3968 /************************** 3443 /**************************
3969 * 2. Initializing PCI bus 3444 * 2. Initializing PCI bus
3970 **************************/ 3445 **************************/
3446 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
3447 PCIE_LINK_STATE_CLKPM);
3448
3971 if (pci_enable_device(pdev)) { 3449 if (pci_enable_device(pdev)) {
3972 err = -ENODEV; 3450 err = -ENODEV;
3973 goto out_ieee80211_free_hw; 3451 goto out_ieee80211_free_hw;
@@ -4022,16 +3500,15 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4022 */ 3500 */
4023 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET); 3501 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
4024 3502
4025 iwl_hw_detect(priv); 3503 hw_rev = iwl_hw_detect(priv);
4026 IWL_INFO(priv, "Detected %s, REV=0x%X\n", 3504 IWL_INFO(priv, "Detected %s, REV=0x%X\n",
4027 priv->cfg->name, priv->hw_rev); 3505 priv->cfg->name, hw_rev);
4028 3506
4029 /* We disable the RETRY_TIMEOUT register (0x41) to keep 3507 /* We disable the RETRY_TIMEOUT register (0x41) to keep
4030 * PCI Tx retries from interfering with C3 CPU state */ 3508 * PCI Tx retries from interfering with C3 CPU state */
4031 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00); 3509 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
4032 3510
4033 iwl_prepare_card_hw(priv); 3511 if (iwl_prepare_card_hw(priv)) {
4034 if (!priv->hw_ready) {
4035 IWL_WARN(priv, "Failed, HW not ready\n"); 3512 IWL_WARN(priv, "Failed, HW not ready\n");
4036 goto out_iounmap; 3513 goto out_iounmap;
4037 } 3514 }
@@ -4040,7 +3517,7 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4040 * 4. Read EEPROM 3517 * 4. Read EEPROM
4041 *****************/ 3518 *****************/
4042 /* Read the EEPROM */ 3519 /* Read the EEPROM */
4043 err = iwl_eeprom_init(priv); 3520 err = iwl_eeprom_init(priv, hw_rev);
4044 if (err) { 3521 if (err) {
4045 IWL_ERR(priv, "Unable to init EEPROM\n"); 3522 IWL_ERR(priv, "Unable to init EEPROM\n");
4046 goto out_iounmap; 3523 goto out_iounmap;
@@ -4049,6 +3526,10 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4049 if (err) 3526 if (err)
4050 goto out_free_eeprom; 3527 goto out_free_eeprom;
4051 3528
3529 err = iwl_eeprom_check_sku(priv);
3530 if (err)
3531 goto out_free_eeprom;
3532
4052 /* extract MAC Address */ 3533 /* extract MAC Address */
4053 iwl_eeprom_get_mac(priv, priv->addresses[0].addr); 3534 iwl_eeprom_get_mac(priv, priv->addresses[0].addr);
4054 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr); 3535 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->addresses[0].addr);
@@ -4089,7 +3570,8 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4089 pci_enable_msi(priv->pci_dev); 3570 pci_enable_msi(priv->pci_dev);
4090 3571
4091 iwl_alloc_isr_ict(priv); 3572 iwl_alloc_isr_ict(priv);
4092 err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr, 3573
3574 err = request_irq(priv->pci_dev->irq, iwl_isr_ict,
4093 IRQF_SHARED, DRV_NAME, priv); 3575 IRQF_SHARED, DRV_NAME, priv);
4094 if (err) { 3576 if (err) {
4095 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq); 3577 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
@@ -4098,19 +3580,20 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
4098 3580
4099 iwl_setup_deferred_work(priv); 3581 iwl_setup_deferred_work(priv);
4100 iwl_setup_rx_handlers(priv); 3582 iwl_setup_rx_handlers(priv);
3583 iwl_testmode_init(priv);
4101 3584
4102 /********************************************* 3585 /*********************************************
4103 * 8. Enable interrupts and read RFKILL state 3586 * 8. Enable interrupts and read RFKILL state
4104 *********************************************/ 3587 *********************************************/
4105 3588
4106 /* enable interrupts if needed: hw bug w/a */ 3589 /* enable rfkill interrupt: hw bug w/a */
4107 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd); 3590 pci_read_config_word(priv->pci_dev, PCI_COMMAND, &pci_cmd);
4108 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) { 3591 if (pci_cmd & PCI_COMMAND_INTX_DISABLE) {
4109 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE; 3592 pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
4110 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd); 3593 pci_write_config_word(priv->pci_dev, PCI_COMMAND, pci_cmd);
4111 } 3594 }
4112 3595
4113 iwl_enable_interrupts(priv); 3596 iwl_enable_rfkill_int(priv);
4114 3597
4115 /* If platform's RF_KILL switch is NOT set to KILL */ 3598 /* If platform's RF_KILL switch is NOT set to KILL */
4116 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW) 3599 if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
@@ -4176,21 +3659,17 @@ static void __devexit iwl_pci_remove(struct pci_dev *pdev)
4176 * we need to set STATUS_EXIT_PENDING bit. 3659 * we need to set STATUS_EXIT_PENDING bit.
4177 */ 3660 */
4178 set_bit(STATUS_EXIT_PENDING, &priv->status); 3661 set_bit(STATUS_EXIT_PENDING, &priv->status);
3662
3663 iwl_testmode_cleanup(priv);
3664 iwl_leds_exit(priv);
3665
4179 if (priv->mac80211_registered) { 3666 if (priv->mac80211_registered) {
4180 ieee80211_unregister_hw(priv->hw); 3667 ieee80211_unregister_hw(priv->hw);
4181 priv->mac80211_registered = 0; 3668 priv->mac80211_registered = 0;
4182 } else {
4183 iwl_down(priv);
4184 } 3669 }
4185 3670
4186 /* 3671 /* Reset to low power before unloading driver. */
4187 * Make sure device is reset to low power before unloading driver. 3672 iwl_apm_stop(priv);
4188 * This may be redundant with iwl_down(), but there are paths to
4189 * run iwl_down() without calling apm_ops.stop(), and there are
4190 * paths to avoid running iwl_down() at all before leaving driver.
4191 * This (inexpensive) call *makes sure* device is reset.
4192 */
4193 priv->cfg->ops->lib->apm_ops.stop(priv);
4194 3673
4195 iwl_tt_exit(priv); 3674 iwl_tt_exit(priv);
4196 3675
@@ -4233,8 +3712,7 @@ static void __devexit iwl_pci_remove(struct pci_dev *pdev)
4233 3712
4234 iwl_free_isr_ict(priv); 3713 iwl_free_isr_ict(priv);
4235 3714
4236 if (priv->ibss_beacon) 3715 dev_kfree_skb(priv->beacon_skb);
4237 dev_kfree_skb(priv->ibss_beacon);
4238 3716
4239 ieee80211_free_hw(priv->hw); 3717 ieee80211_free_hw(priv->hw);
4240} 3718}
@@ -4248,12 +3726,6 @@ static void __devexit iwl_pci_remove(struct pci_dev *pdev)
4248 3726
4249/* Hardware specific file defines the PCI IDs table for that hardware module */ 3727/* Hardware specific file defines the PCI IDs table for that hardware module */
4250static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = { 3728static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
4251#ifdef CONFIG_IWL4965
4252 {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
4253 {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
4254#endif /* CONFIG_IWL4965 */
4255#ifdef CONFIG_IWL5000
4256/* 5100 Series WiFi */
4257 {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */ 3729 {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
4258 {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */ 3730 {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
4259 {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */ 3731 {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
@@ -4323,51 +3795,32 @@ static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
4323 {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)}, 3795 {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
4324 {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)}, 3796 {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
4325 3797
4326/* 6x00 Series Gen2a */ 3798/* 6x05 Series */
4327 {IWL_PCI_DEVICE(0x0082, 0x1201, iwl6000g2a_2agn_cfg)}, 3799 {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6005_2agn_cfg)},
4328 {IWL_PCI_DEVICE(0x0085, 0x1211, iwl6000g2a_2agn_cfg)}, 3800 {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6005_2abg_cfg)},
4329 {IWL_PCI_DEVICE(0x0082, 0x1221, iwl6000g2a_2agn_cfg)}, 3801 {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6005_2bg_cfg)},
4330 {IWL_PCI_DEVICE(0x0082, 0x1206, iwl6000g2a_2abg_cfg)}, 3802 {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6005_2agn_cfg)},
4331 {IWL_PCI_DEVICE(0x0085, 0x1216, iwl6000g2a_2abg_cfg)}, 3803 {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6005_2abg_cfg)},
4332 {IWL_PCI_DEVICE(0x0082, 0x1226, iwl6000g2a_2abg_cfg)}, 3804 {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6005_2agn_cfg)},
4333 {IWL_PCI_DEVICE(0x0082, 0x1207, iwl6000g2a_2bg_cfg)}, 3805 {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6005_2abg_cfg)},
4334 {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6000g2a_2agn_cfg)}, 3806
4335 {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6000g2a_2abg_cfg)}, 3807/* 6x30 Series */
4336 {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6000g2a_2bg_cfg)}, 3808 {IWL_PCI_DEVICE(0x008A, 0x5305, iwl1030_bgn_cfg)},
4337 {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6000g2a_2agn_cfg)}, 3809 {IWL_PCI_DEVICE(0x008A, 0x5307, iwl1030_bg_cfg)},
4338 {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6000g2a_2abg_cfg)}, 3810 {IWL_PCI_DEVICE(0x008A, 0x5325, iwl1030_bgn_cfg)},
4339 {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6000g2a_2agn_cfg)}, 3811 {IWL_PCI_DEVICE(0x008A, 0x5327, iwl1030_bg_cfg)},
4340 {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6000g2a_2abg_cfg)}, 3812 {IWL_PCI_DEVICE(0x008B, 0x5315, iwl1030_bgn_cfg)},
4341 3813 {IWL_PCI_DEVICE(0x008B, 0x5317, iwl1030_bg_cfg)},
4342/* 6x00 Series Gen2b */ 3814 {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6030_2agn_cfg)},
4343 {IWL_PCI_DEVICE(0x008F, 0x5105, iwl6000g2b_bgn_cfg)}, 3815 {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6030_2bgn_cfg)},
4344 {IWL_PCI_DEVICE(0x0090, 0x5115, iwl6000g2b_bgn_cfg)}, 3816 {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6030_2abg_cfg)},
4345 {IWL_PCI_DEVICE(0x008F, 0x5125, iwl6000g2b_bgn_cfg)}, 3817 {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6030_2agn_cfg)},
4346 {IWL_PCI_DEVICE(0x008F, 0x5107, iwl6000g2b_bg_cfg)}, 3818 {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6030_2bgn_cfg)},
4347 {IWL_PCI_DEVICE(0x008F, 0x5201, iwl6000g2b_2agn_cfg)}, 3819 {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6030_2abg_cfg)},
4348 {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)}, 3820 {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6030_2bg_cfg)},
4349 {IWL_PCI_DEVICE(0x008F, 0x5221, iwl6000g2b_2agn_cfg)}, 3821 {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6030_2agn_cfg)},
4350 {IWL_PCI_DEVICE(0x008F, 0x5206, iwl6000g2b_2abg_cfg)}, 3822 {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6030_2bgn_cfg)},
4351 {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)}, 3823 {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6030_2abg_cfg)},
4352 {IWL_PCI_DEVICE(0x008F, 0x5226, iwl6000g2b_2abg_cfg)},
4353 {IWL_PCI_DEVICE(0x008F, 0x5207, iwl6000g2b_2bg_cfg)},
4354 {IWL_PCI_DEVICE(0x008A, 0x5301, iwl6000g2b_bgn_cfg)},
4355 {IWL_PCI_DEVICE(0x008A, 0x5305, iwl6000g2b_bgn_cfg)},
4356 {IWL_PCI_DEVICE(0x008A, 0x5307, iwl6000g2b_bg_cfg)},
4357 {IWL_PCI_DEVICE(0x008A, 0x5321, iwl6000g2b_bgn_cfg)},
4358 {IWL_PCI_DEVICE(0x008A, 0x5325, iwl6000g2b_bgn_cfg)},
4359 {IWL_PCI_DEVICE(0x008B, 0x5311, iwl6000g2b_bgn_cfg)},
4360 {IWL_PCI_DEVICE(0x008B, 0x5315, iwl6000g2b_bgn_cfg)},
4361 {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6000g2b_2agn_cfg)},
4362 {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6000g2b_2bgn_cfg)},
4363 {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6000g2b_2abg_cfg)},
4364 {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6000g2b_2agn_cfg)},
4365 {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6000g2b_2bgn_cfg)},
4366 {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6000g2b_2abg_cfg)},
4367 {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6000g2b_2bg_cfg)},
4368 {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6000g2b_2agn_cfg)},
4369 {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6000g2b_2bgn_cfg)},
4370 {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6000g2b_2abg_cfg)},
4371 3824
4372/* 6x50 WiFi/WiMax Series */ 3825/* 6x50 WiFi/WiMax Series */
4373 {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)}, 3826 {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
@@ -4377,13 +3830,13 @@ static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
4377 {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)}, 3830 {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
4378 {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)}, 3831 {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
4379 3832
4380/* 6x50 WiFi/WiMax Series Gen2 */ 3833/* 6150 WiFi/WiMax Series */
4381 {IWL_PCI_DEVICE(0x0885, 0x1305, iwl6050g2_bgn_cfg)}, 3834 {IWL_PCI_DEVICE(0x0885, 0x1305, iwl6150_bgn_cfg)},
4382 {IWL_PCI_DEVICE(0x0885, 0x1306, iwl6050g2_bgn_cfg)}, 3835 {IWL_PCI_DEVICE(0x0885, 0x1307, iwl6150_bg_cfg)},
4383 {IWL_PCI_DEVICE(0x0885, 0x1325, iwl6050g2_bgn_cfg)}, 3836 {IWL_PCI_DEVICE(0x0885, 0x1325, iwl6150_bgn_cfg)},
4384 {IWL_PCI_DEVICE(0x0885, 0x1326, iwl6050g2_bgn_cfg)}, 3837 {IWL_PCI_DEVICE(0x0885, 0x1327, iwl6150_bg_cfg)},
4385 {IWL_PCI_DEVICE(0x0886, 0x1315, iwl6050g2_bgn_cfg)}, 3838 {IWL_PCI_DEVICE(0x0886, 0x1315, iwl6150_bgn_cfg)},
4386 {IWL_PCI_DEVICE(0x0886, 0x1316, iwl6050g2_bgn_cfg)}, 3839 {IWL_PCI_DEVICE(0x0886, 0x1317, iwl6150_bg_cfg)},
4387 3840
4388/* 1000 Series WiFi */ 3841/* 1000 Series WiFi */
4389 {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)}, 3842 {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
@@ -4398,7 +3851,65 @@ static DEFINE_PCI_DEVICE_TABLE(iwl_hw_card_ids) = {
4398 {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)}, 3851 {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
4399 {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)}, 3852 {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
4400 {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)}, 3853 {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
4401#endif /* CONFIG_IWL5000 */ 3854
3855/* 100 Series WiFi */
3856 {IWL_PCI_DEVICE(0x08AE, 0x1005, iwl100_bgn_cfg)},
3857 {IWL_PCI_DEVICE(0x08AE, 0x1007, iwl100_bg_cfg)},
3858 {IWL_PCI_DEVICE(0x08AF, 0x1015, iwl100_bgn_cfg)},
3859 {IWL_PCI_DEVICE(0x08AF, 0x1017, iwl100_bg_cfg)},
3860 {IWL_PCI_DEVICE(0x08AE, 0x1025, iwl100_bgn_cfg)},
3861 {IWL_PCI_DEVICE(0x08AE, 0x1027, iwl100_bg_cfg)},
3862
3863/* 130 Series WiFi */
3864 {IWL_PCI_DEVICE(0x0896, 0x5005, iwl130_bgn_cfg)},
3865 {IWL_PCI_DEVICE(0x0896, 0x5007, iwl130_bg_cfg)},
3866 {IWL_PCI_DEVICE(0x0897, 0x5015, iwl130_bgn_cfg)},
3867 {IWL_PCI_DEVICE(0x0897, 0x5017, iwl130_bg_cfg)},
3868 {IWL_PCI_DEVICE(0x0896, 0x5025, iwl130_bgn_cfg)},
3869 {IWL_PCI_DEVICE(0x0896, 0x5027, iwl130_bg_cfg)},
3870
3871/* 2x00 Series */
3872 {IWL_PCI_DEVICE(0x0890, 0x4022, iwl2000_2bgn_cfg)},
3873 {IWL_PCI_DEVICE(0x0891, 0x4222, iwl2000_2bgn_cfg)},
3874 {IWL_PCI_DEVICE(0x0890, 0x4422, iwl2000_2bgn_cfg)},
3875 {IWL_PCI_DEVICE(0x0890, 0x4026, iwl2000_2bg_cfg)},
3876 {IWL_PCI_DEVICE(0x0891, 0x4226, iwl2000_2bg_cfg)},
3877 {IWL_PCI_DEVICE(0x0890, 0x4426, iwl2000_2bg_cfg)},
3878
3879/* 2x30 Series */
3880 {IWL_PCI_DEVICE(0x0887, 0x4062, iwl2030_2bgn_cfg)},
3881 {IWL_PCI_DEVICE(0x0888, 0x4262, iwl2030_2bgn_cfg)},
3882 {IWL_PCI_DEVICE(0x0887, 0x4462, iwl2030_2bgn_cfg)},
3883 {IWL_PCI_DEVICE(0x0887, 0x4066, iwl2030_2bg_cfg)},
3884 {IWL_PCI_DEVICE(0x0888, 0x4266, iwl2030_2bg_cfg)},
3885 {IWL_PCI_DEVICE(0x0887, 0x4466, iwl2030_2bg_cfg)},
3886
3887/* 6x35 Series */
3888 {IWL_PCI_DEVICE(0x088E, 0x4060, iwl6035_2agn_cfg)},
3889 {IWL_PCI_DEVICE(0x088F, 0x4260, iwl6035_2agn_cfg)},
3890 {IWL_PCI_DEVICE(0x088E, 0x4460, iwl6035_2agn_cfg)},
3891 {IWL_PCI_DEVICE(0x088E, 0x4064, iwl6035_2abg_cfg)},
3892 {IWL_PCI_DEVICE(0x088F, 0x4264, iwl6035_2abg_cfg)},
3893 {IWL_PCI_DEVICE(0x088E, 0x4464, iwl6035_2abg_cfg)},
3894 {IWL_PCI_DEVICE(0x088E, 0x4066, iwl6035_2bg_cfg)},
3895 {IWL_PCI_DEVICE(0x088F, 0x4266, iwl6035_2bg_cfg)},
3896 {IWL_PCI_DEVICE(0x088E, 0x4466, iwl6035_2bg_cfg)},
3897
3898/* 105 Series */
3899 {IWL_PCI_DEVICE(0x0894, 0x0022, iwl105_bgn_cfg)},
3900 {IWL_PCI_DEVICE(0x0895, 0x0222, iwl105_bgn_cfg)},
3901 {IWL_PCI_DEVICE(0x0894, 0x0422, iwl105_bgn_cfg)},
3902 {IWL_PCI_DEVICE(0x0894, 0x0026, iwl105_bg_cfg)},
3903 {IWL_PCI_DEVICE(0x0895, 0x0226, iwl105_bg_cfg)},
3904 {IWL_PCI_DEVICE(0x0894, 0x0426, iwl105_bg_cfg)},
3905
3906/* 135 Series */
3907 {IWL_PCI_DEVICE(0x0892, 0x0062, iwl135_bgn_cfg)},
3908 {IWL_PCI_DEVICE(0x0893, 0x0262, iwl135_bgn_cfg)},
3909 {IWL_PCI_DEVICE(0x0892, 0x0462, iwl135_bgn_cfg)},
3910 {IWL_PCI_DEVICE(0x0892, 0x0066, iwl135_bg_cfg)},
3911 {IWL_PCI_DEVICE(0x0893, 0x0266, iwl135_bg_cfg)},
3912 {IWL_PCI_DEVICE(0x0892, 0x0466, iwl135_bg_cfg)},
4402 3913
4403 {0} 3914 {0}
4404}; 3915};
@@ -4409,10 +3920,7 @@ static struct pci_driver iwl_driver = {
4409 .id_table = iwl_hw_card_ids, 3920 .id_table = iwl_hw_card_ids,
4410 .probe = iwl_pci_probe, 3921 .probe = iwl_pci_probe,
4411 .remove = __devexit_p(iwl_pci_remove), 3922 .remove = __devexit_p(iwl_pci_remove),
4412#ifdef CONFIG_PM 3923 .driver.pm = IWL_PM_OPS,
4413 .suspend = iwl_pci_suspend,
4414 .resume = iwl_pci_resume,
4415#endif
4416}; 3924};
4417 3925
4418static int __init iwl_init(void) 3926static int __init iwl_init(void)
@@ -4451,44 +3959,37 @@ module_exit(iwl_exit);
4451module_init(iwl_init); 3959module_init(iwl_init);
4452 3960
4453#ifdef CONFIG_IWLWIFI_DEBUG 3961#ifdef CONFIG_IWLWIFI_DEBUG
4454module_param_named(debug50, iwl_debug_level, uint, S_IRUGO);
4455MODULE_PARM_DESC(debug50, "50XX debug output mask (deprecated)");
4456module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR); 3962module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
4457MODULE_PARM_DESC(debug, "debug output mask"); 3963MODULE_PARM_DESC(debug, "debug output mask");
4458#endif 3964#endif
4459 3965
4460module_param_named(swcrypto50, iwlagn_mod_params.sw_crypto, bool, S_IRUGO);
4461MODULE_PARM_DESC(swcrypto50,
4462 "using crypto in software (default 0 [hardware]) (deprecated)");
4463module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO); 3966module_param_named(swcrypto, iwlagn_mod_params.sw_crypto, int, S_IRUGO);
4464MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])"); 3967MODULE_PARM_DESC(swcrypto, "using crypto in software (default 0 [hardware])");
4465module_param_named(queues_num50,
4466 iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4467MODULE_PARM_DESC(queues_num50,
4468 "number of hw queues in 50xx series (deprecated)");
4469module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO); 3968module_param_named(queues_num, iwlagn_mod_params.num_of_queues, int, S_IRUGO);
4470MODULE_PARM_DESC(queues_num, "number of hw queues."); 3969MODULE_PARM_DESC(queues_num, "number of hw queues.");
4471module_param_named(11n_disable50, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4472MODULE_PARM_DESC(11n_disable50, "disable 50XX 11n functionality (deprecated)");
4473module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO); 3970module_param_named(11n_disable, iwlagn_mod_params.disable_11n, int, S_IRUGO);
4474MODULE_PARM_DESC(11n_disable, "disable 11n functionality"); 3971MODULE_PARM_DESC(11n_disable, "disable 11n functionality");
4475module_param_named(amsdu_size_8K50, iwlagn_mod_params.amsdu_size_8K,
4476 int, S_IRUGO);
4477MODULE_PARM_DESC(amsdu_size_8K50,
4478 "enable 8K amsdu size in 50XX series (deprecated)");
4479module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K, 3972module_param_named(amsdu_size_8K, iwlagn_mod_params.amsdu_size_8K,
4480 int, S_IRUGO); 3973 int, S_IRUGO);
4481MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size"); 3974MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
4482module_param_named(fw_restart50, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4483MODULE_PARM_DESC(fw_restart50,
4484 "restart firmware in case of error (deprecated)");
4485module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO); 3975module_param_named(fw_restart, iwlagn_mod_params.restart_fw, int, S_IRUGO);
4486MODULE_PARM_DESC(fw_restart, "restart firmware in case of error"); 3976MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
4487module_param_named(
4488 disable_hw_scan, iwlagn_mod_params.disable_hw_scan, int, S_IRUGO);
4489MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
4490 3977
4491module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int, 3978module_param_named(ucode_alternative, iwlagn_wanted_ucode_alternative, int,
4492 S_IRUGO); 3979 S_IRUGO);
4493MODULE_PARM_DESC(ucode_alternative, 3980MODULE_PARM_DESC(ucode_alternative,
4494 "specify ucode alternative to use from ucode file"); 3981 "specify ucode alternative to use from ucode file");
3982
3983module_param_named(antenna_coupling, iwlagn_ant_coupling, int, S_IRUGO);
3984MODULE_PARM_DESC(antenna_coupling,
3985 "specify antenna coupling in dB (defualt: 0 dB)");
3986
3987module_param_named(bt_ch_inhibition, iwlagn_bt_ch_announce, bool, S_IRUGO);
3988MODULE_PARM_DESC(bt_ch_inhibition,
3989 "Disable BT channel inhibition (default: enable)");
3990
3991module_param_named(plcp_check, iwlagn_mod_params.plcp_check, bool, S_IRUGO);
3992MODULE_PARM_DESC(plcp_check, "Check plcp health (default: 1 [enabled])");
3993
3994module_param_named(ack_check, iwlagn_mod_params.ack_check, bool, S_IRUGO);
3995MODULE_PARM_DESC(ack_check, "Check ack health (default: 0 [disabled])");
generated by cgit v1.2.2 (git 2.25.0) at 2025-12-26 00:44:08 -0500