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path: root/drivers/net/wireless/iwlwifi/iwl-agn-ucode.c
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Diffstat (limited to 'drivers/net/wireless/iwlwifi/iwl-agn-ucode.c')
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-ucode.c20
1 files changed, 10 insertions, 10 deletions
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-ucode.c b/drivers/net/wireless/iwlwifi/iwl-agn-ucode.c
index 033f595a6d55..02b00d177323 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-ucode.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-ucode.c
@@ -85,29 +85,29 @@ static int iwlagn_load_section(struct iwl_priv *priv, const char *name,
85 85
86 priv->ucode_write_complete = 0; 86 priv->ucode_write_complete = 0;
87 87
88 iwl_write_direct32(priv, 88 iwl_write_direct32(bus(priv),
89 FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL), 89 FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
90 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE); 90 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_PAUSE);
91 91
92 iwl_write_direct32(priv, 92 iwl_write_direct32(bus(priv),
93 FH_SRVC_CHNL_SRAM_ADDR_REG(FH_SRVC_CHNL), dst_addr); 93 FH_SRVC_CHNL_SRAM_ADDR_REG(FH_SRVC_CHNL), dst_addr);
94 94
95 iwl_write_direct32(priv, 95 iwl_write_direct32(bus(priv),
96 FH_TFDIB_CTRL0_REG(FH_SRVC_CHNL), 96 FH_TFDIB_CTRL0_REG(FH_SRVC_CHNL),
97 phy_addr & FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK); 97 phy_addr & FH_MEM_TFDIB_DRAM_ADDR_LSB_MSK);
98 98
99 iwl_write_direct32(priv, 99 iwl_write_direct32(bus(priv),
100 FH_TFDIB_CTRL1_REG(FH_SRVC_CHNL), 100 FH_TFDIB_CTRL1_REG(FH_SRVC_CHNL),
101 (iwl_get_dma_hi_addr(phy_addr) 101 (iwl_get_dma_hi_addr(phy_addr)
102 << FH_MEM_TFDIB_REG1_ADDR_BITSHIFT) | byte_cnt); 102 << FH_MEM_TFDIB_REG1_ADDR_BITSHIFT) | byte_cnt);
103 103
104 iwl_write_direct32(priv, 104 iwl_write_direct32(bus(priv),
105 FH_TCSR_CHNL_TX_BUF_STS_REG(FH_SRVC_CHNL), 105 FH_TCSR_CHNL_TX_BUF_STS_REG(FH_SRVC_CHNL),
106 1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_NUM | 106 1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_NUM |
107 1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_IDX | 107 1 << FH_TCSR_CHNL_TX_BUF_STS_REG_POS_TB_IDX |
108 FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID); 108 FH_TCSR_CHNL_TX_BUF_STS_REG_VAL_TFDB_VALID);
109 109
110 iwl_write_direct32(priv, 110 iwl_write_direct32(bus(priv),
111 FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL), 111 FH_TCSR_CHNL_TX_CONFIG_REG(FH_SRVC_CHNL),
112 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE | 112 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
113 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE | 113 FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_DISABLE |
@@ -384,9 +384,9 @@ static int iwl_verify_inst_sparse(struct iwl_priv *priv,
384 /* read data comes through single port, auto-incr addr */ 384 /* read data comes through single port, auto-incr addr */
385 /* NOTE: Use the debugless read so we don't flood kernel log 385 /* NOTE: Use the debugless read so we don't flood kernel log
386 * if IWL_DL_IO is set */ 386 * if IWL_DL_IO is set */
387 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, 387 iwl_write_direct32(bus(priv), HBUS_TARG_MEM_RADDR,
388 i + IWLAGN_RTC_INST_LOWER_BOUND); 388 i + IWLAGN_RTC_INST_LOWER_BOUND);
389 val = iwl_read32(priv, HBUS_TARG_MEM_RDAT); 389 val = iwl_read32(bus(priv), HBUS_TARG_MEM_RDAT);
390 if (val != le32_to_cpu(*image)) 390 if (val != le32_to_cpu(*image))
391 return -EIO; 391 return -EIO;
392 } 392 }
@@ -405,14 +405,14 @@ static void iwl_print_mismatch_inst(struct iwl_priv *priv,
405 405
406 IWL_DEBUG_FW(priv, "ucode inst image size is %u\n", len); 406 IWL_DEBUG_FW(priv, "ucode inst image size is %u\n", len);
407 407
408 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR, 408 iwl_write_direct32(bus(priv), HBUS_TARG_MEM_RADDR,
409 IWLAGN_RTC_INST_LOWER_BOUND); 409 IWLAGN_RTC_INST_LOWER_BOUND);
410 410
411 for (offs = 0; 411 for (offs = 0;
412 offs < len && errors < 20; 412 offs < len && errors < 20;
413 offs += sizeof(u32), image++) { 413 offs += sizeof(u32), image++) {
414 /* read data comes through single port, auto-incr addr */ 414 /* read data comes through single port, auto-incr addr */
415 val = iwl_read32(priv, HBUS_TARG_MEM_RDAT); 415 val = iwl_read32(bus(priv), HBUS_TARG_MEM_RDAT);
416 if (val != le32_to_cpu(*image)) { 416 if (val != le32_to_cpu(*image)) {
417 IWL_ERR(priv, "uCode INST section at " 417 IWL_ERR(priv, "uCode INST section at "
418 "offset 0x%x, is 0x%x, s/b 0x%x\n", 418 "offset 0x%x, is 0x%x, s/b 0x%x\n",