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path: root/drivers/net/wireless/b43/b43.h
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-rw-r--r--drivers/net/wireless/b43/b43.h146
1 files changed, 22 insertions, 124 deletions
diff --git a/drivers/net/wireless/b43/b43.h b/drivers/net/wireless/b43/b43.h
index edcdfa366452..427b8203e3f9 100644
--- a/drivers/net/wireless/b43/b43.h
+++ b/drivers/net/wireless/b43/b43.h
@@ -12,7 +12,7 @@
12#include "leds.h" 12#include "leds.h"
13#include "rfkill.h" 13#include "rfkill.h"
14#include "lo.h" 14#include "lo.h"
15#include "phy.h" 15#include "phy_common.h"
16 16
17 17
18/* The unique identifier of the firmware that's officially supported by 18/* The unique identifier of the firmware that's officially supported by
@@ -173,6 +173,11 @@ enum {
173#define B43_SHM_SH_CHAN 0x00A0 /* Current channel (low 8bit only) */ 173#define B43_SHM_SH_CHAN 0x00A0 /* Current channel (low 8bit only) */
174#define B43_SHM_SH_CHAN_5GHZ 0x0100 /* Bit set, if 5Ghz channel */ 174#define B43_SHM_SH_CHAN_5GHZ 0x0100 /* Bit set, if 5Ghz channel */
175#define B43_SHM_SH_BCMCFIFOID 0x0108 /* Last posted cookie to the bcast/mcast FIFO */ 175#define B43_SHM_SH_BCMCFIFOID 0x0108 /* Last posted cookie to the bcast/mcast FIFO */
176/* TSSI information */
177#define B43_SHM_SH_TSSI_CCK 0x0058 /* TSSI for last 4 CCK frames (32bit) */
178#define B43_SHM_SH_TSSI_OFDM_A 0x0068 /* TSSI for last 4 OFDM frames (32bit) */
179#define B43_SHM_SH_TSSI_OFDM_G 0x0070 /* TSSI for last 4 OFDM frames (32bit) */
180#define B43_TSSI_MAX 0x7F /* Max value for one TSSI value */
176/* SHM_SHARED TX FIFO variables */ 181/* SHM_SHARED TX FIFO variables */
177#define B43_SHM_SH_SIZE01 0x0098 /* TX FIFO size for FIFO 0 (low) and 1 (high) */ 182#define B43_SHM_SH_SIZE01 0x0098 /* TX FIFO size for FIFO 0 (low) and 1 (high) */
178#define B43_SHM_SH_SIZE23 0x009A /* TX FIFO size for FIFO 2 and 3 */ 183#define B43_SHM_SH_SIZE23 0x009A /* TX FIFO size for FIFO 2 and 3 */
@@ -508,122 +513,6 @@ struct b43_iv {
508} __attribute__((__packed__)); 513} __attribute__((__packed__));
509 514
510 515
511struct b43_phy {
512 /* Band support flags. */
513 bool supports_2ghz;
514 bool supports_5ghz;
515
516 /* GMODE bit enabled? */
517 bool gmode;
518
519 /* Analog Type */
520 u8 analog;
521 /* B43_PHYTYPE_ */
522 u8 type;
523 /* PHY revision number. */
524 u8 rev;
525
526 /* Radio versioning */
527 u16 radio_manuf; /* Radio manufacturer */
528 u16 radio_ver; /* Radio version */
529 u8 radio_rev; /* Radio revision */
530
531 bool dyn_tssi_tbl; /* tssi2dbm is kmalloc()ed. */
532
533 /* ACI (adjacent channel interference) flags. */
534 bool aci_enable;
535 bool aci_wlan_automatic;
536 bool aci_hw_rssi;
537
538 /* Radio switched on/off */
539 bool radio_on;
540 struct {
541 /* Values saved when turning the radio off.
542 * They are needed when turning it on again. */
543 bool valid;
544 u16 rfover;
545 u16 rfoverval;
546 } radio_off_context;
547
548 u16 minlowsig[2];
549 u16 minlowsigpos[2];
550
551 /* TSSI to dBm table in use */
552 const s8 *tssi2dbm;
553 /* Target idle TSSI */
554 int tgt_idle_tssi;
555 /* Current idle TSSI */
556 int cur_idle_tssi;
557
558 /* LocalOscillator control values. */
559 struct b43_txpower_lo_control *lo_control;
560 /* Values from b43_calc_loopback_gain() */
561 s16 max_lb_gain; /* Maximum Loopback gain in hdB */
562 s16 trsw_rx_gain; /* TRSW RX gain in hdB */
563 s16 lna_lod_gain; /* LNA lod */
564 s16 lna_gain; /* LNA */
565 s16 pga_gain; /* PGA */
566
567 /* Desired TX power level (in dBm).
568 * This is set by the user and adjusted in b43_phy_xmitpower(). */
569 u8 power_level;
570 /* A-PHY TX Power control value. */
571 u16 txpwr_offset;
572
573 /* Current TX power level attenuation control values */
574 struct b43_bbatt bbatt;
575 struct b43_rfatt rfatt;
576 u8 tx_control; /* B43_TXCTL_XXX */
577
578 /* Hardware Power Control enabled? */
579 bool hardware_power_control;
580
581 /* Current Interference Mitigation mode */
582 int interfmode;
583 /* Stack of saved values from the Interference Mitigation code.
584 * Each value in the stack is layed out as follows:
585 * bit 0-11: offset
586 * bit 12-15: register ID
587 * bit 16-32: value
588 * register ID is: 0x1 PHY, 0x2 Radio, 0x3 ILT
589 */
590#define B43_INTERFSTACK_SIZE 26
591 u32 interfstack[B43_INTERFSTACK_SIZE]; //FIXME: use a data structure
592
593 /* Saved values from the NRSSI Slope calculation */
594 s16 nrssi[2];
595 s32 nrssislope;
596 /* In memory nrssi lookup table. */
597 s8 nrssi_lt[64];
598
599 /* current channel */
600 u8 channel;
601
602 u16 lofcal;
603
604 u16 initval; //FIXME rename?
605
606 /* PHY TX errors counter. */
607 atomic_t txerr_cnt;
608
609 /* The device does address auto increment for the OFDM tables.
610 * We cache the previously used address here and omit the address
611 * write on the next table access, if possible. */
612 u16 ofdmtab_addr; /* The address currently set in hardware. */
613 enum { /* The last data flow direction. */
614 B43_OFDMTAB_DIRECTION_UNKNOWN = 0,
615 B43_OFDMTAB_DIRECTION_READ,
616 B43_OFDMTAB_DIRECTION_WRITE,
617 } ofdmtab_addr_direction;
618
619#if B43_DEBUG
620 /* Manual TX-power control enabled? */
621 bool manual_txpower_control;
622 /* PHY registers locked by b43_phy_lock()? */
623 bool phy_locked;
624#endif /* B43_DEBUG */
625};
626
627/* Data structures for DMA transmission, per 80211 core. */ 516/* Data structures for DMA transmission, per 80211 core. */
628struct b43_dma { 517struct b43_dma {
629 struct b43_dmaring *tx_ring_AC_BK; /* Background */ 518 struct b43_dmaring *tx_ring_AC_BK; /* Background */
@@ -680,7 +569,7 @@ struct b43_key {
680#define B43_QOS_VOICE B43_QOS_PARAMS(3) 569#define B43_QOS_VOICE B43_QOS_PARAMS(3)
681 570
682/* QOS parameter hardware data structure offsets. */ 571/* QOS parameter hardware data structure offsets. */
683#define B43_NR_QOSPARAMS 22 572#define B43_NR_QOSPARAMS 16
684enum { 573enum {
685 B43_QOSPARAM_TXOP = 0, 574 B43_QOSPARAM_TXOP = 0,
686 B43_QOSPARAM_CWMIN, 575 B43_QOSPARAM_CWMIN,
@@ -696,8 +585,6 @@ enum {
696struct b43_qos_params { 585struct b43_qos_params {
697 /* The QOS parameters */ 586 /* The QOS parameters */
698 struct ieee80211_tx_queue_params p; 587 struct ieee80211_tx_queue_params p;
699 /* Does this need to get uploaded to hardware? */
700 bool need_hw_update;
701}; 588};
702 589
703struct b43_wldev; 590struct b43_wldev;
@@ -759,11 +646,13 @@ struct b43_wl {
759 bool beacon_templates_virgin; /* Never wrote the templates? */ 646 bool beacon_templates_virgin; /* Never wrote the templates? */
760 struct work_struct beacon_update_trigger; 647 struct work_struct beacon_update_trigger;
761 648
762 /* The current QOS parameters for the 4 queues. 649 /* The current QOS parameters for the 4 queues. */
763 * This is protected by the irq_lock. */
764 struct b43_qos_params qos_params[4]; 650 struct b43_qos_params qos_params[4];
765 /* Workqueue for updating QOS parameters in hardware. */ 651
766 struct work_struct qos_update_work; 652 /* Work for adjustment of the transmission power.
653 * This is scheduled when we determine that the actual TX output
654 * power doesn't match what we want. */
655 struct work_struct txpower_adjust_work;
767}; 656};
768 657
769/* In-memory representation of a cached microcode file. */ 658/* In-memory representation of a cached microcode file. */
@@ -908,6 +797,15 @@ static inline int b43_is_mode(struct b43_wl *wl, int type)
908 return (wl->operating && wl->if_type == type); 797 return (wl->operating && wl->if_type == type);
909} 798}
910 799
800/**
801 * b43_current_band - Returns the currently used band.
802 * Returns one of IEEE80211_BAND_2GHZ and IEEE80211_BAND_5GHZ.
803 */
804static inline enum ieee80211_band b43_current_band(struct b43_wl *wl)
805{
806 return wl->hw->conf.channel->band;
807}
808
911static inline u16 b43_read16(struct b43_wldev *dev, u16 offset) 809static inline u16 b43_read16(struct b43_wldev *dev, u16 offset)
912{ 810{
913 return ssb_read16(dev->dev, offset); 811 return ssb_read16(dev->dev, offset);