diff options
Diffstat (limited to 'drivers/net/wireless/ath')
-rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9003_calib.c | 72 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9003_phy.c | 69 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9003_phy.h | 3 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/hw-ops.h | 7 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.c | 32 | ||||
-rw-r--r-- | drivers/net/wireless/ath/ath9k/hw.h | 8 |
6 files changed, 186 insertions, 5 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_calib.c b/drivers/net/wireless/ath/ath9k/ar9003_calib.c index e4b1a8300854..026aa5b833d2 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c | |||
@@ -18,7 +18,7 @@ | |||
18 | #include "hw-ops.h" | 18 | #include "hw-ops.h" |
19 | #include "ar9003_phy.h" | 19 | #include "ar9003_phy.h" |
20 | 20 | ||
21 | #define MAX_MEASUREMENT 8 | 21 | #define MAX_MEASUREMENT MAX_IQCAL_MEASUREMENT |
22 | #define MAX_MAG_DELTA 11 | 22 | #define MAX_MAG_DELTA 11 |
23 | #define MAX_PHS_DELTA 10 | 23 | #define MAX_PHS_DELTA 10 |
24 | 24 | ||
@@ -663,6 +663,7 @@ static void ar9003_hw_tx_iqcal_load_avg_2_passes(struct ath_hw *ah, | |||
663 | { | 663 | { |
664 | int i, im, nmeasurement; | 664 | int i, im, nmeasurement; |
665 | u32 tx_corr_coeff[MAX_MEASUREMENT][AR9300_MAX_CHAINS]; | 665 | u32 tx_corr_coeff[MAX_MEASUREMENT][AR9300_MAX_CHAINS]; |
666 | struct ath9k_hw_cal_data *caldata = ah->caldata; | ||
666 | 667 | ||
667 | memset(tx_corr_coeff, 0, sizeof(tx_corr_coeff)); | 668 | memset(tx_corr_coeff, 0, sizeof(tx_corr_coeff)); |
668 | for (i = 0; i < MAX_MEASUREMENT / 2; i++) { | 669 | for (i = 0; i < MAX_MEASUREMENT / 2; i++) { |
@@ -712,13 +713,21 @@ static void ar9003_hw_tx_iqcal_load_avg_2_passes(struct ath_hw *ah, | |||
712 | REG_RMW_FIELD(ah, tx_corr_coeff[im][i], | 713 | REG_RMW_FIELD(ah, tx_corr_coeff[im][i], |
713 | AR_PHY_TX_IQCAL_CORR_COEFF_01_COEFF_TABLE, | 714 | AR_PHY_TX_IQCAL_CORR_COEFF_01_COEFF_TABLE, |
714 | coeff->iqc_coeff[0]); | 715 | coeff->iqc_coeff[0]); |
716 | |||
717 | if (caldata) | ||
718 | caldata->tx_corr_coeff[im][i] = | ||
719 | coeff->iqc_coeff[0]; | ||
715 | } | 720 | } |
721 | if (caldata) | ||
722 | caldata->num_measures[i] = nmeasurement; | ||
716 | } | 723 | } |
717 | 724 | ||
718 | REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_3, | 725 | REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_3, |
719 | AR_PHY_TX_IQCAL_CONTROL_3_IQCORR_EN, 0x1); | 726 | AR_PHY_TX_IQCAL_CONTROL_3_IQCORR_EN, 0x1); |
720 | REG_RMW_FIELD(ah, AR_PHY_RX_IQCAL_CORR_B0, | 727 | REG_RMW_FIELD(ah, AR_PHY_RX_IQCAL_CORR_B0, |
721 | AR_PHY_RX_IQCAL_CORR_B0_LOOPBACK_IQCORR_EN, 0x1); | 728 | AR_PHY_RX_IQCAL_CORR_B0_LOOPBACK_IQCORR_EN, 0x1); |
729 | if (caldata) | ||
730 | caldata->done_txiqcal_once = true; | ||
722 | 731 | ||
723 | return; | 732 | return; |
724 | 733 | ||
@@ -845,10 +854,55 @@ tx_iqcal_fail: | |||
845 | ath_dbg(common, ATH_DBG_CALIBRATE, "Tx IQ Cal failed\n"); | 854 | ath_dbg(common, ATH_DBG_CALIBRATE, "Tx IQ Cal failed\n"); |
846 | return; | 855 | return; |
847 | } | 856 | } |
857 | |||
858 | static void ar9003_hw_tx_iq_cal_reload(struct ath_hw *ah) | ||
859 | { | ||
860 | struct ath9k_hw_cal_data *caldata = ah->caldata; | ||
861 | u32 tx_corr_coeff[MAX_MEASUREMENT][AR9300_MAX_CHAINS]; | ||
862 | int i, im; | ||
863 | |||
864 | memset(tx_corr_coeff, 0, sizeof(tx_corr_coeff)); | ||
865 | for (i = 0; i < MAX_MEASUREMENT / 2; i++) { | ||
866 | tx_corr_coeff[i * 2][0] = tx_corr_coeff[(i * 2) + 1][0] = | ||
867 | AR_PHY_TX_IQCAL_CORR_COEFF_B0(i); | ||
868 | if (!AR_SREV_9485(ah)) { | ||
869 | tx_corr_coeff[i * 2][1] = | ||
870 | tx_corr_coeff[(i * 2) + 1][1] = | ||
871 | AR_PHY_TX_IQCAL_CORR_COEFF_B1(i); | ||
872 | |||
873 | tx_corr_coeff[i * 2][2] = | ||
874 | tx_corr_coeff[(i * 2) + 1][2] = | ||
875 | AR_PHY_TX_IQCAL_CORR_COEFF_B2(i); | ||
876 | } | ||
877 | } | ||
878 | |||
879 | for (i = 0; i < AR9300_MAX_CHAINS; i++) { | ||
880 | if (!(ah->txchainmask & (1 << i))) | ||
881 | continue; | ||
882 | |||
883 | for (im = 0; im < caldata->num_measures[i]; im++) { | ||
884 | if ((im % 2) == 0) | ||
885 | REG_RMW_FIELD(ah, tx_corr_coeff[im][i], | ||
886 | AR_PHY_TX_IQCAL_CORR_COEFF_00_COEFF_TABLE, | ||
887 | caldata->tx_corr_coeff[im][i]); | ||
888 | else | ||
889 | REG_RMW_FIELD(ah, tx_corr_coeff[im][i], | ||
890 | AR_PHY_TX_IQCAL_CORR_COEFF_01_COEFF_TABLE, | ||
891 | caldata->tx_corr_coeff[im][i]); | ||
892 | } | ||
893 | } | ||
894 | |||
895 | REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_3, | ||
896 | AR_PHY_TX_IQCAL_CONTROL_3_IQCORR_EN, 0x1); | ||
897 | REG_RMW_FIELD(ah, AR_PHY_RX_IQCAL_CORR_B0, | ||
898 | AR_PHY_RX_IQCAL_CORR_B0_LOOPBACK_IQCORR_EN, 0x1); | ||
899 | } | ||
900 | |||
848 | static bool ar9003_hw_init_cal(struct ath_hw *ah, | 901 | static bool ar9003_hw_init_cal(struct ath_hw *ah, |
849 | struct ath9k_channel *chan) | 902 | struct ath9k_channel *chan) |
850 | { | 903 | { |
851 | struct ath_common *common = ath9k_hw_common(ah); | 904 | struct ath_common *common = ath9k_hw_common(ah); |
905 | struct ath9k_hw_cal_data *caldata = ah->caldata; | ||
852 | bool txiqcal_done = false; | 906 | bool txiqcal_done = false; |
853 | 907 | ||
854 | /* Do Tx IQ Calibration */ | 908 | /* Do Tx IQ Calibration */ |
@@ -860,9 +914,15 @@ static bool ar9003_hw_init_cal(struct ath_hw *ah, | |||
860 | * For AR9485 or later chips, TxIQ cal runs as part of | 914 | * For AR9485 or later chips, TxIQ cal runs as part of |
861 | * AGC calibration | 915 | * AGC calibration |
862 | */ | 916 | */ |
863 | if (AR_SREV_9485_OR_LATER(ah)) | 917 | if (AR_SREV_9485_OR_LATER(ah) && !AR_SREV_9340(ah)) { |
918 | if (caldata && !caldata->done_txiqcal_once) | ||
919 | REG_SET_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0, | ||
920 | AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL); | ||
921 | else | ||
922 | REG_CLR_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0, | ||
923 | AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL); | ||
864 | txiqcal_done = true; | 924 | txiqcal_done = true; |
865 | else { | 925 | } else { |
866 | txiqcal_done = ar9003_hw_tx_iq_cal_run(ah); | 926 | txiqcal_done = ar9003_hw_tx_iq_cal_run(ah); |
867 | REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS); | 927 | REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS); |
868 | udelay(5); | 928 | udelay(5); |
@@ -884,6 +944,8 @@ static bool ar9003_hw_init_cal(struct ath_hw *ah, | |||
884 | 944 | ||
885 | if (txiqcal_done) | 945 | if (txiqcal_done) |
886 | ar9003_hw_tx_iq_cal_post_proc(ah); | 946 | ar9003_hw_tx_iq_cal_post_proc(ah); |
947 | else if (caldata && caldata->done_txiqcal_once) | ||
948 | ar9003_hw_tx_iq_cal_reload(ah); | ||
887 | 949 | ||
888 | ath9k_hw_loadnf(ah, chan); | 950 | ath9k_hw_loadnf(ah, chan); |
889 | ath9k_hw_start_nfcal(ah, true); | 951 | ath9k_hw_start_nfcal(ah, true); |
@@ -912,8 +974,8 @@ static bool ar9003_hw_init_cal(struct ath_hw *ah, | |||
912 | if (ah->cal_list_curr) | 974 | if (ah->cal_list_curr) |
913 | ath9k_hw_reset_calibration(ah, ah->cal_list_curr); | 975 | ath9k_hw_reset_calibration(ah, ah->cal_list_curr); |
914 | 976 | ||
915 | if (ah->caldata) | 977 | if (caldata) |
916 | ah->caldata->CalValid = 0; | 978 | caldata->CalValid = 0; |
917 | 979 | ||
918 | return true; | 980 | return true; |
919 | } | 981 | } |
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c index 779f407222ed..4e31d655c4ea 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c | |||
@@ -688,6 +688,7 @@ static int ar9003_hw_process_ini(struct ath_hw *ah, | |||
688 | if (AR_SREV_9480(ah)) | 688 | if (AR_SREV_9480(ah)) |
689 | ar9003_hw_prog_ini(ah, &ah->ini_BTCOEX_MAX_TXPWR, 1); | 689 | ar9003_hw_prog_ini(ah, &ah->ini_BTCOEX_MAX_TXPWR, 1); |
690 | 690 | ||
691 | ah->modes_index = modesIndex; | ||
691 | ar9003_hw_override_ini(ah); | 692 | ar9003_hw_override_ini(ah); |
692 | ar9003_hw_set_channel_regs(ah, chan); | 693 | ar9003_hw_set_channel_regs(ah, chan); |
693 | ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask); | 694 | ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask); |
@@ -1247,6 +1248,73 @@ static void ar9003_hw_antdiv_comb_conf_set(struct ath_hw *ah, | |||
1247 | REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval); | 1248 | REG_WRITE(ah, AR_PHY_MC_GAIN_CTRL, regval); |
1248 | } | 1249 | } |
1249 | 1250 | ||
1251 | static int ar9003_hw_fast_chan_change(struct ath_hw *ah, | ||
1252 | struct ath9k_channel *chan, | ||
1253 | u8 *ini_reloaded) | ||
1254 | { | ||
1255 | unsigned int regWrites = 0; | ||
1256 | u32 modesIndex; | ||
1257 | |||
1258 | switch (chan->chanmode) { | ||
1259 | case CHANNEL_A: | ||
1260 | case CHANNEL_A_HT20: | ||
1261 | modesIndex = 1; | ||
1262 | break; | ||
1263 | case CHANNEL_A_HT40PLUS: | ||
1264 | case CHANNEL_A_HT40MINUS: | ||
1265 | modesIndex = 2; | ||
1266 | break; | ||
1267 | case CHANNEL_G: | ||
1268 | case CHANNEL_G_HT20: | ||
1269 | case CHANNEL_B: | ||
1270 | modesIndex = 4; | ||
1271 | break; | ||
1272 | case CHANNEL_G_HT40PLUS: | ||
1273 | case CHANNEL_G_HT40MINUS: | ||
1274 | modesIndex = 3; | ||
1275 | break; | ||
1276 | |||
1277 | default: | ||
1278 | return -EINVAL; | ||
1279 | } | ||
1280 | |||
1281 | if (modesIndex == ah->modes_index) { | ||
1282 | *ini_reloaded = false; | ||
1283 | goto set_rfmode; | ||
1284 | } | ||
1285 | |||
1286 | ar9003_hw_prog_ini(ah, &ah->iniSOC[ATH_INI_POST], modesIndex); | ||
1287 | ar9003_hw_prog_ini(ah, &ah->iniMac[ATH_INI_POST], modesIndex); | ||
1288 | ar9003_hw_prog_ini(ah, &ah->iniBB[ATH_INI_POST], modesIndex); | ||
1289 | ar9003_hw_prog_ini(ah, &ah->iniRadio[ATH_INI_POST], modesIndex); | ||
1290 | if (AR_SREV_9480_20(ah)) | ||
1291 | ar9003_hw_prog_ini(ah, | ||
1292 | &ah->ini_radio_post_sys2ant, | ||
1293 | modesIndex); | ||
1294 | |||
1295 | REG_WRITE_ARRAY(&ah->iniModesTxGain, modesIndex, regWrites); | ||
1296 | |||
1297 | /* | ||
1298 | * For 5GHz channels requiring Fast Clock, apply | ||
1299 | * different modal values. | ||
1300 | */ | ||
1301 | if (IS_CHAN_A_FAST_CLOCK(ah, chan)) | ||
1302 | REG_WRITE_ARRAY(&ah->iniModesAdditional, modesIndex, regWrites); | ||
1303 | |||
1304 | if (AR_SREV_9330(ah)) | ||
1305 | REG_WRITE_ARRAY(&ah->iniModesAdditional, 1, regWrites); | ||
1306 | |||
1307 | if (AR_SREV_9340(ah) && !ah->is_clk_25mhz) | ||
1308 | REG_WRITE_ARRAY(&ah->iniModesAdditional_40M, 1, regWrites); | ||
1309 | |||
1310 | ah->modes_index = modesIndex; | ||
1311 | *ini_reloaded = true; | ||
1312 | |||
1313 | set_rfmode: | ||
1314 | ar9003_hw_set_rfmode(ah, chan); | ||
1315 | return 0; | ||
1316 | } | ||
1317 | |||
1250 | void ar9003_hw_attach_phy_ops(struct ath_hw *ah) | 1318 | void ar9003_hw_attach_phy_ops(struct ath_hw *ah) |
1251 | { | 1319 | { |
1252 | struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah); | 1320 | struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah); |
@@ -1275,6 +1343,7 @@ void ar9003_hw_attach_phy_ops(struct ath_hw *ah) | |||
1275 | priv_ops->do_getnf = ar9003_hw_do_getnf; | 1343 | priv_ops->do_getnf = ar9003_hw_do_getnf; |
1276 | priv_ops->ani_cache_ini_regs = ar9003_hw_ani_cache_ini_regs; | 1344 | priv_ops->ani_cache_ini_regs = ar9003_hw_ani_cache_ini_regs; |
1277 | priv_ops->set_radar_params = ar9003_hw_set_radar_params; | 1345 | priv_ops->set_radar_params = ar9003_hw_set_radar_params; |
1346 | priv_ops->fast_chan_change = ar9003_hw_fast_chan_change; | ||
1278 | 1347 | ||
1279 | ops->antdiv_comb_conf_get = ar9003_hw_antdiv_comb_conf_get; | 1348 | ops->antdiv_comb_conf_get = ar9003_hw_antdiv_comb_conf_get; |
1280 | ops->antdiv_comb_conf_set = ar9003_hw_antdiv_comb_conf_set; | 1349 | ops->antdiv_comb_conf_set = ar9003_hw_antdiv_comb_conf_set; |
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.h b/drivers/net/wireless/ath/ath9k/ar9003_phy.h index 6cea546a1507..c6ed51fb6858 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h | |||
@@ -572,6 +572,8 @@ | |||
572 | 572 | ||
573 | #define AR_PHY_TXGAIN_TABLE (AR_SM_BASE + 0x300) | 573 | #define AR_PHY_TXGAIN_TABLE (AR_SM_BASE + 0x300) |
574 | 574 | ||
575 | #define AR_PHY_TX_IQCAL_CONTROL_0 (AR_SM_BASE + AR_SREV_9485(ah) ? \ | ||
576 | 0x3c4 : 0x444) | ||
575 | #define AR_PHY_TX_IQCAL_CONTROL_1 (AR_SM_BASE + AR_SREV_9485(ah) ? \ | 577 | #define AR_PHY_TX_IQCAL_CONTROL_1 (AR_SM_BASE + AR_SREV_9485(ah) ? \ |
576 | 0x3c8 : 0x448) | 578 | 0x3c8 : 0x448) |
577 | #define AR_PHY_TX_IQCAL_START (AR_SM_BASE + AR_SREV_9485(ah) ? \ | 579 | #define AR_PHY_TX_IQCAL_START (AR_SM_BASE + AR_SREV_9485(ah) ? \ |
@@ -823,6 +825,7 @@ | |||
823 | #define AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT 0x01000000 | 825 | #define AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT 0x01000000 |
824 | #define AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT_S 24 | 826 | #define AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT_S 24 |
825 | #define AR_PHY_CHANNEL_STATUS_RX_CLEAR 0x00000004 | 827 | #define AR_PHY_CHANNEL_STATUS_RX_CLEAR 0x00000004 |
828 | #define AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL 0x80000000 | ||
826 | #define AR_PHY_TX_IQCAL_CONTROL_1_IQCORR_I_Q_COFF_DELPT 0x01fc0000 | 829 | #define AR_PHY_TX_IQCAL_CONTROL_1_IQCORR_I_Q_COFF_DELPT 0x01fc0000 |
827 | #define AR_PHY_TX_IQCAL_CONTROL_1_IQCORR_I_Q_COFF_DELPT_S 18 | 830 | #define AR_PHY_TX_IQCAL_CONTROL_1_IQCORR_I_Q_COFF_DELPT_S 18 |
828 | #define AR_PHY_TX_IQCAL_START_DO_CAL 0x00000001 | 831 | #define AR_PHY_TX_IQCAL_START_DO_CAL 0x00000001 |
diff --git a/drivers/net/wireless/ath/ath9k/hw-ops.h b/drivers/net/wireless/ath/ath9k/hw-ops.h index e9782d164962..e74c233757a2 100644 --- a/drivers/net/wireless/ath/ath9k/hw-ops.h +++ b/drivers/net/wireless/ath/ath9k/hw-ops.h | |||
@@ -205,4 +205,11 @@ static inline void ath9k_hw_setup_calibration(struct ath_hw *ah, | |||
205 | ath9k_hw_private_ops(ah)->setup_calibration(ah, currCal); | 205 | ath9k_hw_private_ops(ah)->setup_calibration(ah, currCal); |
206 | } | 206 | } |
207 | 207 | ||
208 | static inline int ath9k_hw_fast_chan_change(struct ath_hw *ah, | ||
209 | struct ath9k_channel *chan, | ||
210 | u8 *ini_reloaded) | ||
211 | { | ||
212 | return ath9k_hw_private_ops(ah)->fast_chan_change(ah, chan, | ||
213 | ini_reloaded); | ||
214 | } | ||
208 | #endif /* ATH9K_HW_OPS_H */ | 215 | #endif /* ATH9K_HW_OPS_H */ |
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c index 58794a4e40ad..e51d93d33d5f 100644 --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c | |||
@@ -1394,6 +1394,14 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah, | |||
1394 | struct ath_common *common = ath9k_hw_common(ah); | 1394 | struct ath_common *common = ath9k_hw_common(ah); |
1395 | u32 qnum; | 1395 | u32 qnum; |
1396 | int r; | 1396 | int r; |
1397 | bool edma = !!(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA); | ||
1398 | bool band_switch, mode_diff; | ||
1399 | u8 ini_reloaded; | ||
1400 | |||
1401 | band_switch = (chan->channelFlags & (CHANNEL_2GHZ | CHANNEL_5GHZ)) != | ||
1402 | (ah->curchan->channelFlags & (CHANNEL_2GHZ | | ||
1403 | CHANNEL_5GHZ)); | ||
1404 | mode_diff = (chan->chanmode != ah->curchan->chanmode); | ||
1397 | 1405 | ||
1398 | for (qnum = 0; qnum < AR_NUM_QCU; qnum++) { | 1406 | for (qnum = 0; qnum < AR_NUM_QCU; qnum++) { |
1399 | if (ath9k_hw_numtxpending(ah, qnum)) { | 1407 | if (ath9k_hw_numtxpending(ah, qnum)) { |
@@ -1408,6 +1416,18 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah, | |||
1408 | return false; | 1416 | return false; |
1409 | } | 1417 | } |
1410 | 1418 | ||
1419 | if (edma && (band_switch || mode_diff)) { | ||
1420 | ath9k_hw_mark_phy_inactive(ah); | ||
1421 | udelay(5); | ||
1422 | |||
1423 | ath9k_hw_init_pll(ah, NULL); | ||
1424 | |||
1425 | if (ath9k_hw_fast_chan_change(ah, chan, &ini_reloaded)) { | ||
1426 | ath_err(common, "Failed to do fast channel change\n"); | ||
1427 | return false; | ||
1428 | } | ||
1429 | } | ||
1430 | |||
1411 | ath9k_hw_set_channel_regs(ah, chan); | 1431 | ath9k_hw_set_channel_regs(ah, chan); |
1412 | 1432 | ||
1413 | r = ath9k_hw_rf_set_freq(ah, chan); | 1433 | r = ath9k_hw_rf_set_freq(ah, chan); |
@@ -1424,6 +1444,16 @@ static bool ath9k_hw_channel_change(struct ath_hw *ah, | |||
1424 | 1444 | ||
1425 | ath9k_hw_spur_mitigate_freq(ah, chan); | 1445 | ath9k_hw_spur_mitigate_freq(ah, chan); |
1426 | 1446 | ||
1447 | if (edma && (band_switch || mode_diff)) { | ||
1448 | if (band_switch || ini_reloaded) | ||
1449 | ah->eep_ops->set_board_values(ah, chan); | ||
1450 | |||
1451 | ath9k_hw_init_bb(ah, chan); | ||
1452 | |||
1453 | if (band_switch || ini_reloaded) | ||
1454 | ath9k_hw_init_cal(ah, chan); | ||
1455 | } | ||
1456 | |||
1427 | return true; | 1457 | return true; |
1428 | } | 1458 | } |
1429 | 1459 | ||
@@ -1677,6 +1707,8 @@ int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, | |||
1677 | 1707 | ||
1678 | ath9k_hw_init_bb(ah, chan); | 1708 | ath9k_hw_init_bb(ah, chan); |
1679 | 1709 | ||
1710 | if (caldata) | ||
1711 | caldata->done_txiqcal_once = false; | ||
1680 | if (!ath9k_hw_init_cal(ah, chan)) | 1712 | if (!ath9k_hw_init_cal(ah, chan)) |
1681 | return -EIO; | 1713 | return -EIO; |
1682 | 1714 | ||
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h index 684c33c4897c..e5c458d22c82 100644 --- a/drivers/net/wireless/ath/ath9k/hw.h +++ b/drivers/net/wireless/ath/ath9k/hw.h | |||
@@ -337,6 +337,8 @@ enum ath9k_int { | |||
337 | CHANNEL_HT40PLUS | \ | 337 | CHANNEL_HT40PLUS | \ |
338 | CHANNEL_HT40MINUS) | 338 | CHANNEL_HT40MINUS) |
339 | 339 | ||
340 | #define MAX_IQCAL_MEASUREMENT 8 | ||
341 | |||
340 | struct ath9k_hw_cal_data { | 342 | struct ath9k_hw_cal_data { |
341 | u16 channel; | 343 | u16 channel; |
342 | u32 channelFlags; | 344 | u32 channelFlags; |
@@ -346,8 +348,11 @@ struct ath9k_hw_cal_data { | |||
346 | bool paprd_done; | 348 | bool paprd_done; |
347 | bool nfcal_pending; | 349 | bool nfcal_pending; |
348 | bool nfcal_interference; | 350 | bool nfcal_interference; |
351 | bool done_txiqcal_once; | ||
349 | u16 small_signal_gain[AR9300_MAX_CHAINS]; | 352 | u16 small_signal_gain[AR9300_MAX_CHAINS]; |
350 | u32 pa_table[AR9300_MAX_CHAINS][PAPRD_TABLE_SZ]; | 353 | u32 pa_table[AR9300_MAX_CHAINS][PAPRD_TABLE_SZ]; |
354 | u32 num_measures[AR9300_MAX_CHAINS]; | ||
355 | int tx_corr_coeff[MAX_IQCAL_MEASUREMENT][AR9300_MAX_CHAINS]; | ||
351 | struct ath9k_nfcal_hist nfCalHist[NUM_NF_READINGS]; | 356 | struct ath9k_nfcal_hist nfCalHist[NUM_NF_READINGS]; |
352 | }; | 357 | }; |
353 | 358 | ||
@@ -583,6 +588,8 @@ struct ath_hw_private_ops { | |||
583 | void (*do_getnf)(struct ath_hw *ah, int16_t nfarray[NUM_NF_READINGS]); | 588 | void (*do_getnf)(struct ath_hw *ah, int16_t nfarray[NUM_NF_READINGS]); |
584 | void (*set_radar_params)(struct ath_hw *ah, | 589 | void (*set_radar_params)(struct ath_hw *ah, |
585 | struct ath_hw_radar_conf *conf); | 590 | struct ath_hw_radar_conf *conf); |
591 | int (*fast_chan_change)(struct ath_hw *ah, struct ath9k_channel *chan, | ||
592 | u8 *ini_reloaded); | ||
586 | 593 | ||
587 | /* ANI */ | 594 | /* ANI */ |
588 | void (*ani_cache_ini_regs)(struct ath_hw *ah); | 595 | void (*ani_cache_ini_regs)(struct ath_hw *ah); |
@@ -684,6 +691,7 @@ struct ath_hw { | |||
684 | atomic_t intr_ref_cnt; | 691 | atomic_t intr_ref_cnt; |
685 | bool chip_fullsleep; | 692 | bool chip_fullsleep; |
686 | u32 atim_window; | 693 | u32 atim_window; |
694 | u32 modes_index; | ||
687 | 695 | ||
688 | /* Calibration */ | 696 | /* Calibration */ |
689 | u32 supp_cals; | 697 | u32 supp_cals; |