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path: root/drivers/net/wireless/ath9k/xmit.c
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Diffstat (limited to 'drivers/net/wireless/ath9k/xmit.c')
-rw-r--r--drivers/net/wireless/ath9k/xmit.c141
1 files changed, 71 insertions, 70 deletions
diff --git a/drivers/net/wireless/ath9k/xmit.c b/drivers/net/wireless/ath9k/xmit.c
index 9de27c681b86..f9c309ed3a2d 100644
--- a/drivers/net/wireless/ath9k/xmit.c
+++ b/drivers/net/wireless/ath9k/xmit.c
@@ -286,17 +286,17 @@ static struct ath_buf *ath_tx_get_buffer(struct ath_softc *sc)
286{ 286{
287 struct ath_buf *bf = NULL; 287 struct ath_buf *bf = NULL;
288 288
289 spin_lock_bh(&sc->sc_txbuflock); 289 spin_lock_bh(&sc->tx.txbuflock);
290 290
291 if (unlikely(list_empty(&sc->sc_txbuf))) { 291 if (unlikely(list_empty(&sc->tx.txbuf))) {
292 spin_unlock_bh(&sc->sc_txbuflock); 292 spin_unlock_bh(&sc->tx.txbuflock);
293 return NULL; 293 return NULL;
294 } 294 }
295 295
296 bf = list_first_entry(&sc->sc_txbuf, struct ath_buf, list); 296 bf = list_first_entry(&sc->tx.txbuf, struct ath_buf, list);
297 list_del(&bf->list); 297 list_del(&bf->list);
298 298
299 spin_unlock_bh(&sc->sc_txbuflock); 299 spin_unlock_bh(&sc->tx.txbuflock);
300 300
301 return bf; 301 return bf;
302} 302}
@@ -310,6 +310,7 @@ static void ath_tx_complete_buf(struct ath_softc *sc,
310{ 310{
311 struct sk_buff *skb = bf->bf_mpdu; 311 struct sk_buff *skb = bf->bf_mpdu;
312 struct ath_xmit_status tx_status; 312 struct ath_xmit_status tx_status;
313 unsigned long flags;
313 314
314 /* 315 /*
315 * Set retry information. 316 * Set retry information.
@@ -340,9 +341,9 @@ static void ath_tx_complete_buf(struct ath_softc *sc,
340 /* 341 /*
341 * Return the list of ath_buf of this mpdu to free queue 342 * Return the list of ath_buf of this mpdu to free queue
342 */ 343 */
343 spin_lock_bh(&sc->sc_txbuflock); 344 spin_lock_irqsave(&sc->tx.txbuflock, flags);
344 list_splice_tail_init(bf_q, &sc->sc_txbuf); 345 list_splice_tail_init(bf_q, &sc->tx.txbuf);
345 spin_unlock_bh(&sc->sc_txbuflock); 346 spin_unlock_irqrestore(&sc->tx.txbuflock, flags);
346} 347}
347 348
348/* 349/*
@@ -383,7 +384,7 @@ static void ath_tx_queue_tid(struct ath_txq *txq, struct ath_atx_tid *tid)
383 384
384static void ath_tx_pause_tid(struct ath_softc *sc, struct ath_atx_tid *tid) 385static void ath_tx_pause_tid(struct ath_softc *sc, struct ath_atx_tid *tid)
385{ 386{
386 struct ath_txq *txq = &sc->sc_txq[tid->ac->qnum]; 387 struct ath_txq *txq = &sc->tx.txq[tid->ac->qnum];
387 388
388 spin_lock_bh(&txq->axq_lock); 389 spin_lock_bh(&txq->axq_lock);
389 390
@@ -396,7 +397,7 @@ static void ath_tx_pause_tid(struct ath_softc *sc, struct ath_atx_tid *tid)
396 397
397void ath_tx_resume_tid(struct ath_softc *sc, struct ath_atx_tid *tid) 398void ath_tx_resume_tid(struct ath_softc *sc, struct ath_atx_tid *tid)
398{ 399{
399 struct ath_txq *txq = &sc->sc_txq[tid->ac->qnum]; 400 struct ath_txq *txq = &sc->tx.txq[tid->ac->qnum];
400 401
401 ASSERT(tid->paused > 0); 402 ASSERT(tid->paused > 0);
402 spin_lock_bh(&txq->axq_lock); 403 spin_lock_bh(&txq->axq_lock);
@@ -493,7 +494,7 @@ static void ath_tx_update_baw(struct ath_softc *sc, struct ath_atx_tid *tid,
493static u32 ath_pkt_duration(struct ath_softc *sc, u8 rix, struct ath_buf *bf, 494static u32 ath_pkt_duration(struct ath_softc *sc, u8 rix, struct ath_buf *bf,
494 int width, int half_gi, bool shortPreamble) 495 int width, int half_gi, bool shortPreamble)
495{ 496{
496 struct ath_rate_table *rate_table = sc->hw_rate_table[sc->sc_curmode]; 497 struct ath_rate_table *rate_table = sc->cur_rate_table;
497 u32 nbits, nsymbits, duration, nsymbols; 498 u32 nbits, nsymbits, duration, nsymbols;
498 u8 rc; 499 u8 rc;
499 int streams, pktlen; 500 int streams, pktlen;
@@ -557,7 +558,7 @@ static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf)
557 } 558 }
558 559
559 /* get the cix for the lowest valid rix */ 560 /* get the cix for the lowest valid rix */
560 rt = sc->hw_rate_table[sc->sc_curmode]; 561 rt = sc->cur_rate_table;
561 for (i = 3; i >= 0; i--) { 562 for (i = 3; i >= 0; i--) {
562 if (rates[i].count && (rates[i].idx >= 0)) { 563 if (rates[i].count && (rates[i].idx >= 0)) {
563 rix = rates[i].idx; 564 rix = rates[i].idx;
@@ -685,7 +686,7 @@ static int ath_tx_send_normal(struct ath_softc *sc,
685 686
686static void ath_tx_flush_tid(struct ath_softc *sc, struct ath_atx_tid *tid) 687static void ath_tx_flush_tid(struct ath_softc *sc, struct ath_atx_tid *tid)
687{ 688{
688 struct ath_txq *txq = &sc->sc_txq[tid->ac->qnum]; 689 struct ath_txq *txq = &sc->tx.txq[tid->ac->qnum];
689 struct ath_buf *bf; 690 struct ath_buf *bf;
690 struct list_head bf_head; 691 struct list_head bf_head;
691 INIT_LIST_HEAD(&bf_head); 692 INIT_LIST_HEAD(&bf_head);
@@ -860,12 +861,12 @@ static void ath_tx_complete_aggr_rifs(struct ath_softc *sc,
860 struct ath_buf *tbf; 861 struct ath_buf *tbf;
861 862
862 /* allocate new descriptor */ 863 /* allocate new descriptor */
863 spin_lock_bh(&sc->sc_txbuflock); 864 spin_lock_bh(&sc->tx.txbuflock);
864 ASSERT(!list_empty((&sc->sc_txbuf))); 865 ASSERT(!list_empty((&sc->tx.txbuf)));
865 tbf = list_first_entry(&sc->sc_txbuf, 866 tbf = list_first_entry(&sc->tx.txbuf,
866 struct ath_buf, list); 867 struct ath_buf, list);
867 list_del(&tbf->list); 868 list_del(&tbf->list);
868 spin_unlock_bh(&sc->sc_txbuflock); 869 spin_unlock_bh(&sc->tx.txbuflock);
869 870
870 ATH_TXBUF_RESET(tbf); 871 ATH_TXBUF_RESET(tbf);
871 872
@@ -1057,9 +1058,9 @@ static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
1057 1058
1058 if (bf_held) { 1059 if (bf_held) {
1059 list_del(&bf_held->list); 1060 list_del(&bf_held->list);
1060 spin_lock_bh(&sc->sc_txbuflock); 1061 spin_lock_bh(&sc->tx.txbuflock);
1061 list_add_tail(&bf_held->list, &sc->sc_txbuf); 1062 list_add_tail(&bf_held->list, &sc->tx.txbuf);
1062 spin_unlock_bh(&sc->sc_txbuflock); 1063 spin_unlock_bh(&sc->tx.txbuflock);
1063 } 1064 }
1064 1065
1065 if (!bf_isampdu(bf)) { 1066 if (!bf_isampdu(bf)) {
@@ -1128,11 +1129,11 @@ static void ath_drain_txdataq(struct ath_softc *sc, bool retry_tx)
1128 if (!(sc->sc_flags & SC_OP_INVALID)) { 1129 if (!(sc->sc_flags & SC_OP_INVALID)) {
1129 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) { 1130 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1130 if (ATH_TXQ_SETUP(sc, i)) { 1131 if (ATH_TXQ_SETUP(sc, i)) {
1131 ath_tx_stopdma(sc, &sc->sc_txq[i]); 1132 ath_tx_stopdma(sc, &sc->tx.txq[i]);
1132 /* The TxDMA may not really be stopped. 1133 /* The TxDMA may not really be stopped.
1133 * Double check the hal tx pending count */ 1134 * Double check the hal tx pending count */
1134 npend += ath9k_hw_numtxpending(ah, 1135 npend += ath9k_hw_numtxpending(ah,
1135 sc->sc_txq[i].axq_qnum); 1136 sc->tx.txq[i].axq_qnum);
1136 } 1137 }
1137 } 1138 }
1138 } 1139 }
@@ -1157,7 +1158,7 @@ static void ath_drain_txdataq(struct ath_softc *sc, bool retry_tx)
1157 1158
1158 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) { 1159 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1159 if (ATH_TXQ_SETUP(sc, i)) 1160 if (ATH_TXQ_SETUP(sc, i))
1160 ath_tx_draintxq(sc, &sc->sc_txq[i], retry_tx); 1161 ath_tx_draintxq(sc, &sc->tx.txq[i], retry_tx);
1161 } 1162 }
1162} 1163}
1163 1164
@@ -1240,7 +1241,7 @@ static u32 ath_lookup_rate(struct ath_softc *sc,
1240 struct ath_buf *bf, 1241 struct ath_buf *bf,
1241 struct ath_atx_tid *tid) 1242 struct ath_atx_tid *tid)
1242{ 1243{
1243 struct ath_rate_table *rate_table = sc->hw_rate_table[sc->sc_curmode]; 1244 struct ath_rate_table *rate_table = sc->cur_rate_table;
1244 struct sk_buff *skb; 1245 struct sk_buff *skb;
1245 struct ieee80211_tx_info *tx_info; 1246 struct ieee80211_tx_info *tx_info;
1246 struct ieee80211_tx_rate *rates; 1247 struct ieee80211_tx_rate *rates;
@@ -1308,7 +1309,7 @@ static int ath_compute_num_delims(struct ath_softc *sc,
1308 struct ath_buf *bf, 1309 struct ath_buf *bf,
1309 u16 frmlen) 1310 u16 frmlen)
1310{ 1311{
1311 struct ath_rate_table *rt = sc->hw_rate_table[sc->sc_curmode]; 1312 struct ath_rate_table *rt = sc->cur_rate_table;
1312 struct sk_buff *skb = bf->bf_mpdu; 1313 struct sk_buff *skb = bf->bf_mpdu;
1313 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); 1314 struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
1314 u32 nsymbits, nsymbols, mpdudensity; 1315 u32 nsymbits, nsymbols, mpdudensity;
@@ -1819,9 +1820,9 @@ int ath_tx_start(struct ath_softc *sc, struct sk_buff *skb,
1819 } 1820 }
1820 spin_unlock_bh(&txq->axq_lock); 1821 spin_unlock_bh(&txq->axq_lock);
1821 1822
1822 spin_lock_bh(&sc->sc_txbuflock); 1823 spin_lock_bh(&sc->tx.txbuflock);
1823 list_add_tail(&bf->list, &sc->sc_txbuf); 1824 list_add_tail(&bf->list, &sc->tx.txbuf);
1824 spin_unlock_bh(&sc->sc_txbuflock); 1825 spin_unlock_bh(&sc->tx.txbuflock);
1825 1826
1826 return r; 1827 return r;
1827 } 1828 }
@@ -1838,10 +1839,10 @@ int ath_tx_init(struct ath_softc *sc, int nbufs)
1838 int error = 0; 1839 int error = 0;
1839 1840
1840 do { 1841 do {
1841 spin_lock_init(&sc->sc_txbuflock); 1842 spin_lock_init(&sc->tx.txbuflock);
1842 1843
1843 /* Setup tx descriptors */ 1844 /* Setup tx descriptors */
1844 error = ath_descdma_setup(sc, &sc->sc_txdma, &sc->sc_txbuf, 1845 error = ath_descdma_setup(sc, &sc->tx.txdma, &sc->tx.txbuf,
1845 "tx", nbufs, 1); 1846 "tx", nbufs, 1);
1846 if (error != 0) { 1847 if (error != 0) {
1847 DPRINTF(sc, ATH_DBG_FATAL, 1848 DPRINTF(sc, ATH_DBG_FATAL,
@@ -1851,7 +1852,7 @@ int ath_tx_init(struct ath_softc *sc, int nbufs)
1851 } 1852 }
1852 1853
1853 /* XXX allocate beacon state together with vap */ 1854 /* XXX allocate beacon state together with vap */
1854 error = ath_descdma_setup(sc, &sc->sc_bdma, &sc->sc_bbuf, 1855 error = ath_descdma_setup(sc, &sc->beacon.bdma, &sc->beacon.bbuf,
1855 "beacon", ATH_BCBUF, 1); 1856 "beacon", ATH_BCBUF, 1);
1856 if (error != 0) { 1857 if (error != 0) {
1857 DPRINTF(sc, ATH_DBG_FATAL, 1858 DPRINTF(sc, ATH_DBG_FATAL,
@@ -1873,12 +1874,12 @@ int ath_tx_init(struct ath_softc *sc, int nbufs)
1873int ath_tx_cleanup(struct ath_softc *sc) 1874int ath_tx_cleanup(struct ath_softc *sc)
1874{ 1875{
1875 /* cleanup beacon descriptors */ 1876 /* cleanup beacon descriptors */
1876 if (sc->sc_bdma.dd_desc_len != 0) 1877 if (sc->beacon.bdma.dd_desc_len != 0)
1877 ath_descdma_cleanup(sc, &sc->sc_bdma, &sc->sc_bbuf); 1878 ath_descdma_cleanup(sc, &sc->beacon.bdma, &sc->beacon.bbuf);
1878 1879
1879 /* cleanup tx descriptors */ 1880 /* cleanup tx descriptors */
1880 if (sc->sc_txdma.dd_desc_len != 0) 1881 if (sc->tx.txdma.dd_desc_len != 0)
1881 ath_descdma_cleanup(sc, &sc->sc_txdma, &sc->sc_txbuf); 1882 ath_descdma_cleanup(sc, &sc->tx.txdma, &sc->tx.txbuf);
1882 1883
1883 return 0; 1884 return 0;
1884} 1885}
@@ -1926,15 +1927,15 @@ struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype)
1926 */ 1927 */
1927 return NULL; 1928 return NULL;
1928 } 1929 }
1929 if (qnum >= ARRAY_SIZE(sc->sc_txq)) { 1930 if (qnum >= ARRAY_SIZE(sc->tx.txq)) {
1930 DPRINTF(sc, ATH_DBG_FATAL, 1931 DPRINTF(sc, ATH_DBG_FATAL,
1931 "qnum %u out of range, max %u!\n", 1932 "qnum %u out of range, max %u!\n",
1932 qnum, (unsigned int)ARRAY_SIZE(sc->sc_txq)); 1933 qnum, (unsigned int)ARRAY_SIZE(sc->tx.txq));
1933 ath9k_hw_releasetxqueue(ah, qnum); 1934 ath9k_hw_releasetxqueue(ah, qnum);
1934 return NULL; 1935 return NULL;
1935 } 1936 }
1936 if (!ATH_TXQ_SETUP(sc, qnum)) { 1937 if (!ATH_TXQ_SETUP(sc, qnum)) {
1937 struct ath_txq *txq = &sc->sc_txq[qnum]; 1938 struct ath_txq *txq = &sc->tx.txq[qnum];
1938 1939
1939 txq->axq_qnum = qnum; 1940 txq->axq_qnum = qnum;
1940 txq->axq_link = NULL; 1941 txq->axq_link = NULL;
@@ -1945,9 +1946,9 @@ struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype)
1945 txq->axq_aggr_depth = 0; 1946 txq->axq_aggr_depth = 0;
1946 txq->axq_totalqueued = 0; 1947 txq->axq_totalqueued = 0;
1947 txq->axq_linkbuf = NULL; 1948 txq->axq_linkbuf = NULL;
1948 sc->sc_txqsetup |= 1<<qnum; 1949 sc->tx.txqsetup |= 1<<qnum;
1949 } 1950 }
1950 return &sc->sc_txq[qnum]; 1951 return &sc->tx.txq[qnum];
1951} 1952}
1952 1953
1953/* Reclaim resources for a setup queue */ 1954/* Reclaim resources for a setup queue */
@@ -1955,7 +1956,7 @@ struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype)
1955void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq) 1956void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq)
1956{ 1957{
1957 ath9k_hw_releasetxqueue(sc->sc_ah, txq->axq_qnum); 1958 ath9k_hw_releasetxqueue(sc->sc_ah, txq->axq_qnum);
1958 sc->sc_txqsetup &= ~(1<<txq->axq_qnum); 1959 sc->tx.txqsetup &= ~(1<<txq->axq_qnum);
1959} 1960}
1960 1961
1961/* 1962/*
@@ -1972,15 +1973,15 @@ int ath_tx_setup(struct ath_softc *sc, int haltype)
1972{ 1973{
1973 struct ath_txq *txq; 1974 struct ath_txq *txq;
1974 1975
1975 if (haltype >= ARRAY_SIZE(sc->sc_haltype2q)) { 1976 if (haltype >= ARRAY_SIZE(sc->tx.hwq_map)) {
1976 DPRINTF(sc, ATH_DBG_FATAL, 1977 DPRINTF(sc, ATH_DBG_FATAL,
1977 "HAL AC %u out of range, max %zu!\n", 1978 "HAL AC %u out of range, max %zu!\n",
1978 haltype, ARRAY_SIZE(sc->sc_haltype2q)); 1979 haltype, ARRAY_SIZE(sc->tx.hwq_map));
1979 return 0; 1980 return 0;
1980 } 1981 }
1981 txq = ath_txq_setup(sc, ATH9K_TX_QUEUE_DATA, haltype); 1982 txq = ath_txq_setup(sc, ATH9K_TX_QUEUE_DATA, haltype);
1982 if (txq != NULL) { 1983 if (txq != NULL) {
1983 sc->sc_haltype2q[haltype] = txq->axq_qnum; 1984 sc->tx.hwq_map[haltype] = txq->axq_qnum;
1984 return 1; 1985 return 1;
1985 } else 1986 } else
1986 return 0; 1987 return 0;
@@ -1992,19 +1993,19 @@ int ath_tx_get_qnum(struct ath_softc *sc, int qtype, int haltype)
1992 1993
1993 switch (qtype) { 1994 switch (qtype) {
1994 case ATH9K_TX_QUEUE_DATA: 1995 case ATH9K_TX_QUEUE_DATA:
1995 if (haltype >= ARRAY_SIZE(sc->sc_haltype2q)) { 1996 if (haltype >= ARRAY_SIZE(sc->tx.hwq_map)) {
1996 DPRINTF(sc, ATH_DBG_FATAL, 1997 DPRINTF(sc, ATH_DBG_FATAL,
1997 "HAL AC %u out of range, max %zu!\n", 1998 "HAL AC %u out of range, max %zu!\n",
1998 haltype, ARRAY_SIZE(sc->sc_haltype2q)); 1999 haltype, ARRAY_SIZE(sc->tx.hwq_map));
1999 return -1; 2000 return -1;
2000 } 2001 }
2001 qnum = sc->sc_haltype2q[haltype]; 2002 qnum = sc->tx.hwq_map[haltype];
2002 break; 2003 break;
2003 case ATH9K_TX_QUEUE_BEACON: 2004 case ATH9K_TX_QUEUE_BEACON:
2004 qnum = sc->sc_bhalq; 2005 qnum = sc->beacon.beaconq;
2005 break; 2006 break;
2006 case ATH9K_TX_QUEUE_CAB: 2007 case ATH9K_TX_QUEUE_CAB:
2007 qnum = sc->sc_cabq->axq_qnum; 2008 qnum = sc->beacon.cabq->axq_qnum;
2008 break; 2009 break;
2009 default: 2010 default:
2010 qnum = -1; 2011 qnum = -1;
@@ -2020,7 +2021,7 @@ struct ath_txq *ath_test_get_txq(struct ath_softc *sc, struct sk_buff *skb)
2020 int qnum; 2021 int qnum;
2021 2022
2022 qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc); 2023 qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
2023 txq = &sc->sc_txq[qnum]; 2024 txq = &sc->tx.txq[qnum];
2024 2025
2025 spin_lock_bh(&txq->axq_lock); 2026 spin_lock_bh(&txq->axq_lock);
2026 2027
@@ -2049,17 +2050,17 @@ int ath_txq_update(struct ath_softc *sc, int qnum,
2049 int error = 0; 2050 int error = 0;
2050 struct ath9k_tx_queue_info qi; 2051 struct ath9k_tx_queue_info qi;
2051 2052
2052 if (qnum == sc->sc_bhalq) { 2053 if (qnum == sc->beacon.beaconq) {
2053 /* 2054 /*
2054 * XXX: for beacon queue, we just save the parameter. 2055 * XXX: for beacon queue, we just save the parameter.
2055 * It will be picked up by ath_beaconq_config when 2056 * It will be picked up by ath_beaconq_config when
2056 * it's necessary. 2057 * it's necessary.
2057 */ 2058 */
2058 sc->sc_beacon_qi = *qinfo; 2059 sc->beacon.beacon_qi = *qinfo;
2059 return 0; 2060 return 0;
2060 } 2061 }
2061 2062
2062 ASSERT(sc->sc_txq[qnum].axq_qnum == qnum); 2063 ASSERT(sc->tx.txq[qnum].axq_qnum == qnum);
2063 2064
2064 ath9k_hw_get_txq_props(ah, qnum, &qi); 2065 ath9k_hw_get_txq_props(ah, qnum, &qi);
2065 qi.tqi_aifs = qinfo->tqi_aifs; 2066 qi.tqi_aifs = qinfo->tqi_aifs;
@@ -2082,7 +2083,7 @@ int ath_txq_update(struct ath_softc *sc, int qnum,
2082int ath_cabq_update(struct ath_softc *sc) 2083int ath_cabq_update(struct ath_softc *sc)
2083{ 2084{
2084 struct ath9k_tx_queue_info qi; 2085 struct ath9k_tx_queue_info qi;
2085 int qnum = sc->sc_cabq->axq_qnum; 2086 int qnum = sc->beacon.cabq->axq_qnum;
2086 struct ath_beacon_config conf; 2087 struct ath_beacon_config conf;
2087 2088
2088 ath9k_hw_get_txq_props(sc->sc_ah, qnum, &qi); 2089 ath9k_hw_get_txq_props(sc->sc_ah, qnum, &qi);
@@ -2116,7 +2117,7 @@ void ath_tx_tasklet(struct ath_softc *sc)
2116 */ 2117 */
2117 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) { 2118 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2118 if (ATH_TXQ_SETUP(sc, i) && (qcumask & (1 << i))) 2119 if (ATH_TXQ_SETUP(sc, i) && (qcumask & (1 << i)))
2119 ath_tx_processq(sc, &sc->sc_txq[i]); 2120 ath_tx_processq(sc, &sc->tx.txq[i]);
2120 } 2121 }
2121} 2122}
2122 2123
@@ -2148,9 +2149,9 @@ void ath_tx_draintxq(struct ath_softc *sc,
2148 list_del(&bf->list); 2149 list_del(&bf->list);
2149 spin_unlock_bh(&txq->axq_lock); 2150 spin_unlock_bh(&txq->axq_lock);
2150 2151
2151 spin_lock_bh(&sc->sc_txbuflock); 2152 spin_lock_bh(&sc->tx.txbuflock);
2152 list_add_tail(&bf->list, &sc->sc_txbuf); 2153 list_add_tail(&bf->list, &sc->tx.txbuf);
2153 spin_unlock_bh(&sc->sc_txbuflock); 2154 spin_unlock_bh(&sc->tx.txbuflock);
2154 continue; 2155 continue;
2155 } 2156 }
2156 2157
@@ -2188,9 +2189,9 @@ void ath_draintxq(struct ath_softc *sc, bool retry_tx)
2188 /* stop beacon queue. The beacon will be freed when 2189 /* stop beacon queue. The beacon will be freed when
2189 * we go to INIT state */ 2190 * we go to INIT state */
2190 if (!(sc->sc_flags & SC_OP_INVALID)) { 2191 if (!(sc->sc_flags & SC_OP_INVALID)) {
2191 (void) ath9k_hw_stoptxdma(sc->sc_ah, sc->sc_bhalq); 2192 (void) ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
2192 DPRINTF(sc, ATH_DBG_XMIT, "beacon queue %x\n", 2193 DPRINTF(sc, ATH_DBG_XMIT, "beacon queue %x\n",
2193 ath9k_hw_gettxbuf(sc->sc_ah, sc->sc_bhalq)); 2194 ath9k_hw_gettxbuf(sc->sc_ah, sc->beacon.beaconq));
2194 } 2195 }
2195 2196
2196 ath_drain_txdataq(sc, retry_tx); 2197 ath_drain_txdataq(sc, retry_tx);
@@ -2198,12 +2199,12 @@ void ath_draintxq(struct ath_softc *sc, bool retry_tx)
2198 2199
2199u32 ath_txq_depth(struct ath_softc *sc, int qnum) 2200u32 ath_txq_depth(struct ath_softc *sc, int qnum)
2200{ 2201{
2201 return sc->sc_txq[qnum].axq_depth; 2202 return sc->tx.txq[qnum].axq_depth;
2202} 2203}
2203 2204
2204u32 ath_txq_aggr_depth(struct ath_softc *sc, int qnum) 2205u32 ath_txq_aggr_depth(struct ath_softc *sc, int qnum)
2205{ 2206{
2206 return sc->sc_txq[qnum].axq_aggr_depth; 2207 return sc->tx.txq[qnum].axq_aggr_depth;
2207} 2208}
2208 2209
2209bool ath_tx_aggr_check(struct ath_softc *sc, struct ath_node *an, u8 tidno) 2210bool ath_tx_aggr_check(struct ath_softc *sc, struct ath_node *an, u8 tidno)
@@ -2284,7 +2285,7 @@ void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid
2284void ath_tx_aggr_teardown(struct ath_softc *sc, struct ath_node *an, u8 tid) 2285void ath_tx_aggr_teardown(struct ath_softc *sc, struct ath_node *an, u8 tid)
2285{ 2286{
2286 struct ath_atx_tid *txtid = ATH_AN_2_TID(an, tid); 2287 struct ath_atx_tid *txtid = ATH_AN_2_TID(an, tid);
2287 struct ath_txq *txq = &sc->sc_txq[txtid->ac->qnum]; 2288 struct ath_txq *txq = &sc->tx.txq[txtid->ac->qnum];
2288 struct ath_buf *bf; 2289 struct ath_buf *bf;
2289 struct list_head bf_head; 2290 struct list_head bf_head;
2290 INIT_LIST_HEAD(&bf_head); 2291 INIT_LIST_HEAD(&bf_head);
@@ -2405,7 +2406,7 @@ void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an)
2405 /* 2406 /*
2406 * Init per tid tx state 2407 * Init per tid tx state
2407 */ 2408 */
2408 for (tidno = 0, tid = &an->an_aggr.tx.tid[tidno]; 2409 for (tidno = 0, tid = &an->tid[tidno];
2409 tidno < WME_NUM_TID; 2410 tidno < WME_NUM_TID;
2410 tidno++, tid++) { 2411 tidno++, tid++) {
2411 tid->an = an; 2412 tid->an = an;
@@ -2419,7 +2420,7 @@ void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an)
2419 INIT_LIST_HEAD(&tid->buf_q); 2420 INIT_LIST_HEAD(&tid->buf_q);
2420 2421
2421 acno = TID_TO_WME_AC(tidno); 2422 acno = TID_TO_WME_AC(tidno);
2422 tid->ac = &an->an_aggr.tx.ac[acno]; 2423 tid->ac = &an->ac[acno];
2423 2424
2424 /* ADDBA state */ 2425 /* ADDBA state */
2425 tid->state &= ~AGGR_ADDBA_COMPLETE; 2426 tid->state &= ~AGGR_ADDBA_COMPLETE;
@@ -2430,7 +2431,7 @@ void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an)
2430 /* 2431 /*
2431 * Init per ac tx state 2432 * Init per ac tx state
2432 */ 2433 */
2433 for (acno = 0, ac = &an->an_aggr.tx.ac[acno]; 2434 for (acno = 0, ac = &an->ac[acno];
2434 acno < WME_NUM_AC; acno++, ac++) { 2435 acno < WME_NUM_AC; acno++, ac++) {
2435 ac->sched = false; 2436 ac->sched = false;
2436 INIT_LIST_HEAD(&ac->tid_q); 2437 INIT_LIST_HEAD(&ac->tid_q);
@@ -2466,7 +2467,7 @@ void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an)
2466 struct ath_txq *txq; 2467 struct ath_txq *txq;
2467 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) { 2468 for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
2468 if (ATH_TXQ_SETUP(sc, i)) { 2469 if (ATH_TXQ_SETUP(sc, i)) {
2469 txq = &sc->sc_txq[i]; 2470 txq = &sc->tx.txq[i];
2470 2471
2471 spin_lock(&txq->axq_lock); 2472 spin_lock(&txq->axq_lock);
2472 2473
@@ -2511,9 +2512,9 @@ void ath_tx_cabq(struct ath_softc *sc, struct sk_buff *skb)
2511 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { 2512 if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
2512 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data; 2513 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
2513 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) 2514 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
2514 sc->seq_no += 0x10; 2515 sc->tx.seq_no += 0x10;
2515 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); 2516 hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
2516 hdr->seq_ctrl |= cpu_to_le16(sc->seq_no); 2517 hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
2517 } 2518 }
2518 2519
2519 /* Add the padding after the header if this is not already done */ 2520 /* Add the padding after the header if this is not already done */
@@ -2529,7 +2530,7 @@ void ath_tx_cabq(struct ath_softc *sc, struct sk_buff *skb)
2529 memmove(skb->data, skb->data + padsize, hdrlen); 2530 memmove(skb->data, skb->data + padsize, hdrlen);
2530 } 2531 }
2531 2532
2532 txctl.txq = sc->sc_cabq; 2533 txctl.txq = sc->beacon.cabq;
2533 2534
2534 DPRINTF(sc, ATH_DBG_XMIT, "transmitting CABQ packet, skb: %p\n", skb); 2535 DPRINTF(sc, ATH_DBG_XMIT, "transmitting CABQ packet, skb: %p\n", skb);
2535 2536