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path: root/drivers/net/wireless/ath9k/eeprom.c
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Diffstat (limited to 'drivers/net/wireless/ath9k/eeprom.c')
-rw-r--r--drivers/net/wireless/ath9k/eeprom.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/net/wireless/ath9k/eeprom.c b/drivers/net/wireless/ath9k/eeprom.c
index 5a5ab23a2ba2..183c949bcca1 100644
--- a/drivers/net/wireless/ath9k/eeprom.c
+++ b/drivers/net/wireless/ath9k/eeprom.c
@@ -679,7 +679,7 @@ static void ath9k_hw_get_4k_gain_boundaries_pdadcs(struct ath_hw *ah,
679 vpdTableI[i][sizeCurrVpdTable - 2]); 679 vpdTableI[i][sizeCurrVpdTable - 2]);
680 vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep); 680 vpdStep = (int16_t)((vpdStep < 1) ? 1 : vpdStep);
681 681
682 if (tgtIndex > maxIndex) { 682 if (tgtIndex >= maxIndex) {
683 while ((ss <= tgtIndex) && 683 while ((ss <= tgtIndex) &&
684 (k < (AR5416_NUM_PDADC_VALUES - 1))) { 684 (k < (AR5416_NUM_PDADC_VALUES - 1))) {
685 tmpVal = (int16_t) TMP_VAL_VPD_TABLE; 685 tmpVal = (int16_t) TMP_VAL_VPD_TABLE;
@@ -713,11 +713,11 @@ static bool ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah,
713 u8 *pCalBChans = NULL; 713 u8 *pCalBChans = NULL;
714 u16 pdGainOverlap_t2; 714 u16 pdGainOverlap_t2;
715 static u8 pdadcValues[AR5416_NUM_PDADC_VALUES]; 715 static u8 pdadcValues[AR5416_NUM_PDADC_VALUES];
716 u16 gainBoundaries[AR5416_PD_GAINS_IN_MASK]; 716 u16 gainBoundaries[AR5416_EEP4K_PD_GAINS_IN_MASK];
717 u16 numPiers, i, j; 717 u16 numPiers, i, j;
718 int16_t tMinCalPower; 718 int16_t tMinCalPower;
719 u16 numXpdGain, xpdMask; 719 u16 numXpdGain, xpdMask;
720 u16 xpdGainValues[AR5416_NUM_PD_GAINS] = { 0, 0, 0, 0 }; 720 u16 xpdGainValues[AR5416_EEP4K_NUM_PD_GAINS] = { 0, 0 };
721 u32 reg32, regOffset, regChainOffset; 721 u32 reg32, regOffset, regChainOffset;
722 722
723 xpdMask = pEepData->modalHeader.xpdGain; 723 xpdMask = pEepData->modalHeader.xpdGain;
@@ -732,16 +732,16 @@ static bool ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah,
732 } 732 }
733 733
734 pCalBChans = pEepData->calFreqPier2G; 734 pCalBChans = pEepData->calFreqPier2G;
735 numPiers = AR5416_NUM_2G_CAL_PIERS; 735 numPiers = AR5416_EEP4K_NUM_2G_CAL_PIERS;
736 736
737 numXpdGain = 0; 737 numXpdGain = 0;
738 738
739 for (i = 1; i <= AR5416_PD_GAINS_IN_MASK; i++) { 739 for (i = 1; i <= AR5416_EEP4K_PD_GAINS_IN_MASK; i++) {
740 if ((xpdMask >> (AR5416_PD_GAINS_IN_MASK - i)) & 1) { 740 if ((xpdMask >> (AR5416_EEP4K_PD_GAINS_IN_MASK - i)) & 1) {
741 if (numXpdGain >= AR5416_NUM_PD_GAINS) 741 if (numXpdGain >= AR5416_EEP4K_NUM_PD_GAINS)
742 break; 742 break;
743 xpdGainValues[numXpdGain] = 743 xpdGainValues[numXpdGain] =
744 (u16)(AR5416_PD_GAINS_IN_MASK - i); 744 (u16)(AR5416_EEP4K_PD_GAINS_IN_MASK - i);
745 numXpdGain++; 745 numXpdGain++;
746 } 746 }
747 } 747 }
@@ -754,7 +754,7 @@ static bool ath9k_hw_set_4k_power_cal_table(struct ath_hw *ah,
754 xpdGainValues[1]); 754 xpdGainValues[1]);
755 REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_3, 0); 755 REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_3, 0);
756 756
757 for (i = 0; i < AR5416_MAX_CHAINS; i++) { 757 for (i = 0; i < AR5416_EEP4K_MAX_CHAINS; i++) {
758 if (AR_SREV_5416_20_OR_LATER(ah) && 758 if (AR_SREV_5416_20_OR_LATER(ah) &&
759 (ah->rxchainmask == 5 || ah->txchainmask == 5) && 759 (ah->rxchainmask == 5 || ah->txchainmask == 5) &&
760 (i != 0)) { 760 (i != 0)) {