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path: root/drivers/net/wireless/ath5k/base.c
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Diffstat (limited to 'drivers/net/wireless/ath5k/base.c')
-rw-r--r--drivers/net/wireless/ath5k/base.c38
1 files changed, 22 insertions, 16 deletions
diff --git a/drivers/net/wireless/ath5k/base.c b/drivers/net/wireless/ath5k/base.c
index bcec74e839e9..85260c39aa2b 100644
--- a/drivers/net/wireless/ath5k/base.c
+++ b/drivers/net/wireless/ath5k/base.c
@@ -485,6 +485,12 @@ ath5k_pci_probe(struct pci_dev *pdev,
485 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS | 485 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
486 IEEE80211_HW_SIGNAL_DBM | 486 IEEE80211_HW_SIGNAL_DBM |
487 IEEE80211_HW_NOISE_DBM; 487 IEEE80211_HW_NOISE_DBM;
488
489 hw->wiphy->interface_modes =
490 BIT(NL80211_IFTYPE_STATION) |
491 BIT(NL80211_IFTYPE_ADHOC) |
492 BIT(NL80211_IFTYPE_MESH_POINT);
493
488 hw->extra_tx_headroom = 2; 494 hw->extra_tx_headroom = 2;
489 hw->channel_change_time = 5000; 495 hw->channel_change_time = 5000;
490 sc = hw->priv; 496 sc = hw->priv;
@@ -707,7 +713,7 @@ ath5k_attach(struct pci_dev *pdev, struct ieee80211_hw *hw)
707 * return false w/o doing anything. MAC's that do 713 * return false w/o doing anything. MAC's that do
708 * support it will return true w/o doing anything. 714 * support it will return true w/o doing anything.
709 */ 715 */
710 ret = ah->ah_setup_xtx_desc(ah, NULL, 0, 0, 0, 0, 0, 0); 716 ret = ah->ah_setup_mrr_tx_desc(ah, NULL, 0, 0, 0, 0, 0, 0);
711 if (ret < 0) 717 if (ret < 0)
712 goto err; 718 goto err;
713 if (ret > 0) 719 if (ret > 0)
@@ -1137,7 +1143,7 @@ ath5k_rxbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
1137 ds = bf->desc; 1143 ds = bf->desc;
1138 ds->ds_link = bf->daddr; /* link to self */ 1144 ds->ds_link = bf->daddr; /* link to self */
1139 ds->ds_data = bf->skbaddr; 1145 ds->ds_data = bf->skbaddr;
1140 ath5k_hw_setup_rx_desc(ah, ds, 1146 ah->ah_setup_rx_desc(ah, ds,
1141 skb_tailroom(skb), /* buffer size */ 1147 skb_tailroom(skb), /* buffer size */
1142 0); 1148 0);
1143 1149
@@ -1188,12 +1194,12 @@ ath5k_txbuf_setup(struct ath5k_softc *sc, struct ath5k_buf *bf)
1188 list_add_tail(&bf->list, &txq->q); 1194 list_add_tail(&bf->list, &txq->q);
1189 sc->tx_stats[txq->qnum].len++; 1195 sc->tx_stats[txq->qnum].len++;
1190 if (txq->link == NULL) /* is this first packet? */ 1196 if (txq->link == NULL) /* is this first packet? */
1191 ath5k_hw_put_tx_buf(ah, txq->qnum, bf->daddr); 1197 ath5k_hw_set_txdp(ah, txq->qnum, bf->daddr);
1192 else /* no, so only link it */ 1198 else /* no, so only link it */
1193 *txq->link = bf->daddr; 1199 *txq->link = bf->daddr;
1194 1200
1195 txq->link = &ds->ds_link; 1201 txq->link = &ds->ds_link;
1196 ath5k_hw_tx_start(ah, txq->qnum); 1202 ath5k_hw_start_tx_dma(ah, txq->qnum);
1197 mmiowb(); 1203 mmiowb();
1198 spin_unlock_bh(&txq->lock); 1204 spin_unlock_bh(&txq->lock);
1199 1205
@@ -1393,7 +1399,7 @@ ath5k_beaconq_config(struct ath5k_softc *sc)
1393 "beacon queueprops tqi_aifs:%d tqi_cw_min:%d tqi_cw_max:%d\n", 1399 "beacon queueprops tqi_aifs:%d tqi_cw_min:%d tqi_cw_max:%d\n",
1394 qi.tqi_aifs, qi.tqi_cw_min, qi.tqi_cw_max); 1400 qi.tqi_aifs, qi.tqi_cw_min, qi.tqi_cw_max);
1395 1401
1396 ret = ath5k_hw_setup_tx_queueprops(ah, sc->bhalq, &qi); 1402 ret = ath5k_hw_set_tx_queueprops(ah, sc->bhalq, &qi);
1397 if (ret) { 1403 if (ret) {
1398 ATH5K_ERR(sc, "%s: unable to update parameters for beacon " 1404 ATH5K_ERR(sc, "%s: unable to update parameters for beacon "
1399 "hardware queue!\n", __func__); 1405 "hardware queue!\n", __func__);
@@ -1442,14 +1448,14 @@ ath5k_txq_cleanup(struct ath5k_softc *sc)
1442 /* don't touch the hardware if marked invalid */ 1448 /* don't touch the hardware if marked invalid */
1443 ath5k_hw_stop_tx_dma(ah, sc->bhalq); 1449 ath5k_hw_stop_tx_dma(ah, sc->bhalq);
1444 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "beacon queue %x\n", 1450 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "beacon queue %x\n",
1445 ath5k_hw_get_tx_buf(ah, sc->bhalq)); 1451 ath5k_hw_get_txdp(ah, sc->bhalq));
1446 for (i = 0; i < ARRAY_SIZE(sc->txqs); i++) 1452 for (i = 0; i < ARRAY_SIZE(sc->txqs); i++)
1447 if (sc->txqs[i].setup) { 1453 if (sc->txqs[i].setup) {
1448 ath5k_hw_stop_tx_dma(ah, sc->txqs[i].qnum); 1454 ath5k_hw_stop_tx_dma(ah, sc->txqs[i].qnum);
1449 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "txq [%u] %x, " 1455 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "txq [%u] %x, "
1450 "link %p\n", 1456 "link %p\n",
1451 sc->txqs[i].qnum, 1457 sc->txqs[i].qnum,
1452 ath5k_hw_get_tx_buf(ah, 1458 ath5k_hw_get_txdp(ah,
1453 sc->txqs[i].qnum), 1459 sc->txqs[i].qnum),
1454 sc->txqs[i].link); 1460 sc->txqs[i].link);
1455 } 1461 }
@@ -1509,8 +1515,8 @@ ath5k_rx_start(struct ath5k_softc *sc)
1509 bf = list_first_entry(&sc->rxbuf, struct ath5k_buf, list); 1515 bf = list_first_entry(&sc->rxbuf, struct ath5k_buf, list);
1510 spin_unlock_bh(&sc->rxbuflock); 1516 spin_unlock_bh(&sc->rxbuflock);
1511 1517
1512 ath5k_hw_put_rx_buf(ah, bf->daddr); 1518 ath5k_hw_set_rxdp(ah, bf->daddr);
1513 ath5k_hw_start_rx(ah); /* enable recv descriptors */ 1519 ath5k_hw_start_rx_dma(ah); /* enable recv descriptors */
1514 ath5k_mode_setup(sc); /* set filters, etc. */ 1520 ath5k_mode_setup(sc); /* set filters, etc. */
1515 ath5k_hw_start_rx_pcu(ah); /* re-enable PCU/DMA engine */ 1521 ath5k_hw_start_rx_pcu(ah); /* re-enable PCU/DMA engine */
1516 1522
@@ -1527,7 +1533,7 @@ ath5k_rx_stop(struct ath5k_softc *sc)
1527{ 1533{
1528 struct ath5k_hw *ah = sc->ah; 1534 struct ath5k_hw *ah = sc->ah;
1529 1535
1530 ath5k_hw_stop_pcu_recv(ah); /* disable PCU */ 1536 ath5k_hw_stop_rx_pcu(ah); /* disable PCU */
1531 ath5k_hw_set_rx_filter(ah, 0); /* clear recv filter */ 1537 ath5k_hw_set_rx_filter(ah, 0); /* clear recv filter */
1532 ath5k_hw_stop_rx_dma(ah); /* disable DMA engine */ 1538 ath5k_hw_stop_rx_dma(ah); /* disable DMA engine */
1533 1539
@@ -1976,8 +1982,8 @@ ath5k_beacon_send(struct ath5k_softc *sc)
1976 /* NB: hw still stops DMA, so proceed */ 1982 /* NB: hw still stops DMA, so proceed */
1977 } 1983 }
1978 1984
1979 ath5k_hw_put_tx_buf(ah, sc->bhalq, bf->daddr); 1985 ath5k_hw_set_txdp(ah, sc->bhalq, bf->daddr);
1980 ath5k_hw_tx_start(ah, sc->bhalq); 1986 ath5k_hw_start_tx_dma(ah, sc->bhalq);
1981 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, "TXDP[%u] = %llx (%p)\n", 1987 ATH5K_DBG(sc, ATH5K_DEBUG_BEACON, "TXDP[%u] = %llx (%p)\n",
1982 sc->bhalq, (unsigned long long)bf->daddr, bf->desc); 1988 sc->bhalq, (unsigned long long)bf->daddr, bf->desc);
1983 1989
@@ -2106,7 +2112,7 @@ ath5k_beacon_config(struct ath5k_softc *sc)
2106{ 2112{
2107 struct ath5k_hw *ah = sc->ah; 2113 struct ath5k_hw *ah = sc->ah;
2108 2114
2109 ath5k_hw_set_intr(ah, 0); 2115 ath5k_hw_set_imr(ah, 0);
2110 sc->bmisscount = 0; 2116 sc->bmisscount = 0;
2111 sc->imask &= ~(AR5K_INT_BMISS | AR5K_INT_SWBA); 2117 sc->imask &= ~(AR5K_INT_BMISS | AR5K_INT_SWBA);
2112 2118
@@ -2132,7 +2138,7 @@ ath5k_beacon_config(struct ath5k_softc *sc)
2132 } 2138 }
2133 /* TODO else AP */ 2139 /* TODO else AP */
2134 2140
2135 ath5k_hw_set_intr(ah, sc->imask); 2141 ath5k_hw_set_imr(ah, sc->imask);
2136} 2142}
2137 2143
2138 2144
@@ -2211,7 +2217,7 @@ ath5k_stop_locked(struct ath5k_softc *sc)
2211 2217
2212 if (!test_bit(ATH_STAT_INVALID, sc->status)) { 2218 if (!test_bit(ATH_STAT_INVALID, sc->status)) {
2213 ath5k_led_off(sc); 2219 ath5k_led_off(sc);
2214 ath5k_hw_set_intr(ah, 0); 2220 ath5k_hw_set_imr(ah, 0);
2215 synchronize_irq(sc->pdev->irq); 2221 synchronize_irq(sc->pdev->irq);
2216 } 2222 }
2217 ath5k_txq_cleanup(sc); 2223 ath5k_txq_cleanup(sc);
@@ -2604,7 +2610,7 @@ ath5k_reset(struct ath5k_softc *sc, bool stop, bool change_channel)
2604 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "resetting\n"); 2610 ATH5K_DBG(sc, ATH5K_DEBUG_RESET, "resetting\n");
2605 2611
2606 if (stop) { 2612 if (stop) {
2607 ath5k_hw_set_intr(ah, 0); 2613 ath5k_hw_set_imr(ah, 0);
2608 ath5k_txq_cleanup(sc); 2614 ath5k_txq_cleanup(sc);
2609 ath5k_rx_stop(sc); 2615 ath5k_rx_stop(sc);
2610 } 2616 }