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Diffstat (limited to 'drivers/net/wireless/ath5k/ath5k.h')
-rw-r--r--drivers/net/wireless/ath5k/ath5k.h53
1 files changed, 27 insertions, 26 deletions
diff --git a/drivers/net/wireless/ath5k/ath5k.h b/drivers/net/wireless/ath5k/ath5k.h
index 18223d9833f1..b21830771ea5 100644
--- a/drivers/net/wireless/ath5k/ath5k.h
+++ b/drivers/net/wireless/ath5k/ath5k.h
@@ -140,7 +140,8 @@ enum ath5k_radio {
140 AR5K_RF5110 = 0, 140 AR5K_RF5110 = 0,
141 AR5K_RF5111 = 1, 141 AR5K_RF5111 = 1,
142 AR5K_RF5112 = 2, 142 AR5K_RF5112 = 2,
143 AR5K_RF5413 = 3, 143 AR5K_RF2413 = 3,
144 AR5K_RF5413 = 4,
144}; 145};
145 146
146/* 147/*
@@ -168,12 +169,15 @@ struct ath5k_srev_name {
168#define AR5K_SREV_VER_AR5212 0x50 169#define AR5K_SREV_VER_AR5212 0x50
169#define AR5K_SREV_VER_AR5213 0x55 170#define AR5K_SREV_VER_AR5213 0x55
170#define AR5K_SREV_VER_AR5213A 0x59 171#define AR5K_SREV_VER_AR5213A 0x59
171#define AR5K_SREV_VER_AR2424 0xa0 172#define AR5K_SREV_VER_AR2413 0x78
172#define AR5K_SREV_VER_AR5424 0xa3 173#define AR5K_SREV_VER_AR2414 0x79
174#define AR5K_SREV_VER_AR2424 0xa0 /* PCI-E */
175#define AR5K_SREV_VER_AR5424 0xa3 /* PCI-E */
173#define AR5K_SREV_VER_AR5413 0xa4 176#define AR5K_SREV_VER_AR5413 0xa4
174#define AR5K_SREV_VER_AR5414 0xa5 177#define AR5K_SREV_VER_AR5414 0xa5
175#define AR5K_SREV_VER_AR5416 0xc0 /* ? */ 178#define AR5K_SREV_VER_AR5416 0xc0 /* PCI-E */
176#define AR5K_SREV_VER_AR5418 0xca 179#define AR5K_SREV_VER_AR5418 0xca /* PCI-E */
180#define AR5K_SREV_VER_AR2425 0xe2 /* PCI-E */
177 181
178#define AR5K_SREV_RAD_5110 0x00 182#define AR5K_SREV_RAD_5110 0x00
179#define AR5K_SREV_RAD_5111 0x10 183#define AR5K_SREV_RAD_5111 0x10
@@ -183,8 +187,9 @@ struct ath5k_srev_name {
183#define AR5K_SREV_RAD_5112A 0x35 187#define AR5K_SREV_RAD_5112A 0x35
184#define AR5K_SREV_RAD_2112 0x40 188#define AR5K_SREV_RAD_2112 0x40
185#define AR5K_SREV_RAD_2112A 0x45 189#define AR5K_SREV_RAD_2112A 0x45
190#define AR5K_SREV_RAD_SC0 0x56 /* Found on 2413/2414 */
186#define AR5K_SREV_RAD_SC1 0x63 /* Found on 5413/5414 */ 191#define AR5K_SREV_RAD_SC1 0x63 /* Found on 5413/5414 */
187#define AR5K_SREV_RAD_SC2 0xa2 /* Found on 2424/5424 */ 192#define AR5K_SREV_RAD_SC2 0xa2 /* Found on 2424-5/5424 */
188#define AR5K_SREV_RAD_5133 0xc0 /* MIMO found on 5418 */ 193#define AR5K_SREV_RAD_5133 0xc0 /* MIMO found on 5418 */
189 194
190/* IEEE defs */ 195/* IEEE defs */
@@ -268,12 +273,13 @@ enum ath5k_driver_mode {
268#define SHPREAMBLE_FLAG(_ix) \ 273#define SHPREAMBLE_FLAG(_ix) \
269 (HAS_SHPREAMBLE(_ix) ? AR5K_SET_SHORT_PREAMBLE : 0) 274 (HAS_SHPREAMBLE(_ix) ? AR5K_SET_SHORT_PREAMBLE : 0)
270 275
276
271/****************\ 277/****************\
272 TX DEFINITIONS 278 TX DEFINITIONS
273\****************/ 279\****************/
274 280
275/* 281/*
276 * Tx Descriptor 282 * TX Status
277 */ 283 */
278struct ath5k_tx_status { 284struct ath5k_tx_status {
279 u16 ts_seqnum; 285 u16 ts_seqnum;
@@ -421,7 +427,7 @@ enum ath5k_dmasize {
421\****************/ 427\****************/
422 428
423/* 429/*
424 * Rx Descriptor 430 * RX Status
425 */ 431 */
426struct ath5k_rx_status { 432struct ath5k_rx_status {
427 u16 rs_datalen; 433 u16 rs_datalen;
@@ -452,8 +458,6 @@ struct ath5k_mib_stats {
452}; 458};
453 459
454 460
455
456
457/**************************\ 461/**************************\
458 BEACON TIMERS DEFINITIONS 462 BEACON TIMERS DEFINITIONS
459\**************************/ 463\**************************/
@@ -495,29 +499,23 @@ struct ath5k_beacon_state {
495#define TSF_TO_TU(_tsf) (u32)((_tsf) >> 10) 499#define TSF_TO_TU(_tsf) (u32)((_tsf) >> 10)
496 500
497 501
498
499/********************\ 502/********************\
500 COMMON DEFINITIONS 503 COMMON DEFINITIONS
501\********************/ 504\********************/
502 505
503/* 506/*
504 * Atheros descriptor 507 * Atheros hardware descriptor
508 * This is read and written to by the hardware
505 */ 509 */
506struct ath5k_desc { 510struct ath5k_desc {
507 u32 ds_link; 511 u32 ds_link; /* physical address of the next descriptor */
508 u32 ds_data; 512 u32 ds_data; /* physical address of data buffer (skb) */
509 u32 ds_ctl0;
510 u32 ds_ctl1;
511 u32 ds_hw[4];
512 513
513 union { 514 union {
514 struct ath5k_rx_status rx; 515 struct ath5k_hw_5210_tx_desc ds_tx5210;
515 struct ath5k_tx_status tx; 516 struct ath5k_hw_5212_tx_desc ds_tx5212;
516 } ds_us; 517 struct ath5k_hw_all_rx_desc ds_rx;
517 518 } ud;
518#define ds_rxstat ds_us.rx
519#define ds_txstat ds_us.tx
520
521} __packed; 519} __packed;
522 520
523#define AR5K_RXDESC_INTREQ 0x0020 521#define AR5K_RXDESC_INTREQ 0x0020
@@ -961,6 +959,7 @@ struct ath5k_hw {
961 u16 ah_phy_revision; 959 u16 ah_phy_revision;
962 u16 ah_radio_5ghz_revision; 960 u16 ah_radio_5ghz_revision;
963 u16 ah_radio_2ghz_revision; 961 u16 ah_radio_2ghz_revision;
962 u32 ah_phy_spending;
964 963
965 enum ath5k_version ah_version; 964 enum ath5k_version ah_version;
966 enum ath5k_radio ah_radio; 965 enum ath5k_radio ah_radio;
@@ -1036,8 +1035,10 @@ struct ath5k_hw {
1036 int (*ah_setup_xtx_desc)(struct ath5k_hw *, struct ath5k_desc *, 1035 int (*ah_setup_xtx_desc)(struct ath5k_hw *, struct ath5k_desc *,
1037 unsigned int, unsigned int, unsigned int, unsigned int, 1036 unsigned int, unsigned int, unsigned int, unsigned int,
1038 unsigned int, unsigned int); 1037 unsigned int, unsigned int);
1039 int (*ah_proc_tx_desc)(struct ath5k_hw *, struct ath5k_desc *); 1038 int (*ah_proc_tx_desc)(struct ath5k_hw *, struct ath5k_desc *,
1040 int (*ah_proc_rx_desc)(struct ath5k_hw *, struct ath5k_desc *); 1039 struct ath5k_tx_status *);
1040 int (*ah_proc_rx_desc)(struct ath5k_hw *, struct ath5k_desc *,
1041 struct ath5k_rx_status *);
1041}; 1042};
1042 1043
1043/* 1044/*