36 files changed, 1690 insertions, 704 deletions

diff --git a/drivers/net/wireless/ath/ath9k/ahb.c b/drivers/net/wireless/ath/ath9k/ahb.c
index 3a69804f4c16..d1ff3c246a12 100644
--- a/drivers/net/wireless/ath/ath9k/ahb.c
+++ b/drivers/net/wireless/ath/ath9k/ahb.c
@@ -86,29 +86,25 @@ static int ath_ahb_probe(struct platform_device *pdev)
 
         if (!pdev->dev.platform_data) {
                 dev_err(&pdev->dev, "no platform data specified\n");
-                ret = -EINVAL;
-                goto err_out;
+                return -EINVAL;
         }
 
         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
         if (res == NULL) {
                 dev_err(&pdev->dev, "no memory resource found\n");
-                ret = -ENXIO;
-                goto err_out;
+                return -ENXIO;
         }
 
-        mem = ioremap_nocache(res->start, resource_size(res));
+        mem = devm_ioremap_nocache(&pdev->dev, res->start, resource_size(res));
         if (mem == NULL) {
                 dev_err(&pdev->dev, "ioremap failed\n");
-                ret = -ENOMEM;
-                goto err_out;
+                return -ENOMEM;
         }
 
         res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
         if (res == NULL) {
                 dev_err(&pdev->dev, "no IRQ resource found\n");
-                ret = -ENXIO;
-                goto err_iounmap;
+                return -ENXIO;
         }
 
         irq = res->start;
@@ -116,8 +112,7 @@ static int ath_ahb_probe(struct platform_device *pdev)
         hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
         if (hw == NULL) {
                 dev_err(&pdev->dev, "no memory for ieee80211_hw\n");
-                ret = -ENOMEM;
-                goto err_iounmap;
+                return -ENOMEM;
         }
 
         SET_IEEE80211_DEV(hw, &pdev->dev);
@@ -156,9 +151,6 @@ static int ath_ahb_probe(struct platform_device *pdev)
  err_free_hw:
         ieee80211_free_hw(hw);
         platform_set_drvdata(pdev, NULL);
- err_iounmap:
-        iounmap(mem);
- err_out:
         return ret;
 }
 
@@ -168,12 +160,10 @@ static int ath_ahb_remove(struct platform_device *pdev)
 
         if (hw) {
                 struct ath_softc *sc = hw->priv;
-                void __iomem *mem = sc->mem;
 
                 ath9k_deinit_device(sc);
                 free_irq(sc->irq, sc);
                 ieee80211_free_hw(sc->hw);
-                iounmap(mem);
                 platform_set_drvdata(pdev, NULL);
         }
 
diff --git a/drivers/net/wireless/ath/ath9k/ani.c b/drivers/net/wireless/ath/ath9k/ani.c
index e09ec40ce71a..7ecd40f07a74 100644
--- a/drivers/net/wireless/ath/ath9k/ani.c
+++ b/drivers/net/wireless/ath/ath9k/ani.c
@@ -152,7 +152,8 @@ static void ath9k_hw_set_ofdm_nil(struct ath_hw *ah, u8 immunityLevel,
         ath_dbg(common, ANI, "**** ofdmlevel %d=>%d, rssi=%d[lo=%d hi=%d]\n",
                 aniState->ofdmNoiseImmunityLevel,
                 immunityLevel, BEACON_RSSI(ah),
-                aniState->rssiThrLow, aniState->rssiThrHigh);
+                ATH9K_ANI_RSSI_THR_LOW,
+                ATH9K_ANI_RSSI_THR_HIGH);
 
         if (!scan)
                 aniState->ofdmNoiseImmunityLevel = immunityLevel;
@@ -173,7 +174,7 @@ static void ath9k_hw_set_ofdm_nil(struct ath_hw *ah, u8 immunityLevel,
 
         weak_sig = entry_ofdm->ofdm_weak_signal_on;
         if (ah->opmode == NL80211_IFTYPE_STATION &&
-            BEACON_RSSI(ah) <= aniState->rssiThrHigh)
+            BEACON_RSSI(ah) <= ATH9K_ANI_RSSI_THR_HIGH)
                 weak_sig = true;
 
         if (aniState->ofdmWeakSigDetect != weak_sig)
@@ -216,11 +217,11 @@ static void ath9k_hw_set_cck_nil(struct ath_hw *ah, u_int8_t immunityLevel,
 
         ath_dbg(common, ANI, "**** ccklevel %d=>%d, rssi=%d[lo=%d hi=%d]\n",
                 aniState->cckNoiseImmunityLevel, immunityLevel,
-                BEACON_RSSI(ah), aniState->rssiThrLow,
-                aniState->rssiThrHigh);
+                BEACON_RSSI(ah), ATH9K_ANI_RSSI_THR_LOW,
+                ATH9K_ANI_RSSI_THR_HIGH);
 
         if (ah->opmode == NL80211_IFTYPE_STATION &&
-            BEACON_RSSI(ah) <= aniState->rssiThrLow &&
+            BEACON_RSSI(ah) <= ATH9K_ANI_RSSI_THR_LOW &&
             immunityLevel > ATH9K_ANI_CCK_MAX_LEVEL_LOW_RSSI)
                 immunityLevel = ATH9K_ANI_CCK_MAX_LEVEL_LOW_RSSI;
 
@@ -418,9 +419,6 @@ void ath9k_hw_ani_monitor(struct ath_hw *ah, struct ath9k_channel *chan)
                 return;
 
         aniState = &ah->curchan->ani;
-        if (WARN_ON(!aniState))
-                return;
-
         if (!ath9k_hw_ani_read_counters(ah))
                 return;
 
@@ -489,23 +487,6 @@ void ath9k_hw_disable_mib_counters(struct ath_hw *ah)
 }
 EXPORT_SYMBOL(ath9k_hw_disable_mib_counters);
 
-void ath9k_hw_ani_setup(struct ath_hw *ah)
-{
-        int i;
-
-        static const int totalSizeDesired[] = { -55, -55, -55, -55, -62 };
-        static const int coarseHigh[] = { -14, -14, -14, -14, -12 };
-        static const int coarseLow[] = { -64, -64, -64, -64, -70 };
-        static const int firpwr[] = { -78, -78, -78, -78, -80 };
-
-        for (i = 0; i < 5; i++) {
-                ah->totalSizeDesired[i] = totalSizeDesired[i];
-                ah->coarse_high[i] = coarseHigh[i];
-                ah->coarse_low[i] = coarseLow[i];
-                ah->firpwr[i] = firpwr[i];
-        }
-}
-
 void ath9k_hw_ani_init(struct ath_hw *ah)
 {
         struct ath_common *common = ath9k_hw_common(ah);
@@ -531,8 +512,6 @@ void ath9k_hw_ani_init(struct ath_hw *ah)
 
                 ani->ofdmsTurn = true;
 
-                ani->rssiThrHigh = ATH9K_ANI_RSSI_THR_HIGH;
-                ani->rssiThrLow = ATH9K_ANI_RSSI_THR_LOW;
                 ani->ofdmWeakSigDetect = ATH9K_ANI_USE_OFDM_WEAK_SIG;
                 ani->cckNoiseImmunityLevel = ATH9K_ANI_CCK_DEF_LEVEL;
                 ani->ofdmNoiseImmunityLevel = ATH9K_ANI_OFDM_DEF_LEVEL;
diff --git a/drivers/net/wireless/ath/ath9k/ani.h b/drivers/net/wireless/ath/ath9k/ani.h
index 1485bf5e3518..dddb1361039a 100644
--- a/drivers/net/wireless/ath/ath9k/ani.h
+++ b/drivers/net/wireless/ath/ath9k/ani.h
@@ -104,7 +104,6 @@ struct ath9k_ani_default {
 };
 
 struct ar5416AniState {
-        struct ath9k_channel *c;
         u8 noiseImmunityLevel;
         u8 ofdmNoiseImmunityLevel;
         u8 cckNoiseImmunityLevel;
@@ -113,15 +112,9 @@ struct ar5416AniState {
         u8 spurImmunityLevel;
         u8 firstepLevel;
         u8 ofdmWeakSigDetect;
-        u8 cckWeakSigThreshold;
         u32 listenTime;
-        int32_t rssiThrLow;
-        int32_t rssiThrHigh;
         u32 ofdmPhyErrCount;
         u32 cckPhyErrCount;
-        int16_t pktRssi[2];
-        int16_t ofdmErrRssi[2];
-        int16_t cckErrRssi[2];
         struct ath9k_ani_default iniDef;
 };
 
@@ -147,7 +140,6 @@ struct ar5416Stats {
 
 void ath9k_enable_mib_counters(struct ath_hw *ah);
 void ath9k_hw_disable_mib_counters(struct ath_hw *ah);
-void ath9k_hw_ani_setup(struct ath_hw *ah);
 void ath9k_hw_ani_init(struct ath_hw *ah);
 
 #endif /* ANI_H */
diff --git a/drivers/net/wireless/ath/ath9k/ar5008_initvals.h b/drivers/net/wireless/ath/ath9k/ar5008_initvals.h
index f81e7fc60a36..467ccfae2cee 100644
--- a/drivers/net/wireless/ath/ath9k/ar5008_initvals.h
+++ b/drivers/net/wireless/ath/ath9k/ar5008_initvals.h
@@ -466,7 +466,7 @@ static const u32 ar5416Bank0[][2] = {
 };
 
 static const u32 ar5416BB_RfGain[][3] = {
-        /* Addr      5G_HT20     5G_HT40   */
+        /* Addr      5G          2G        */
         {0x00009a00, 0x00000000, 0x00000000},
         {0x00009a04, 0x00000040, 0x00000040},
         {0x00009a08, 0x00000080, 0x00000080},
@@ -546,12 +546,12 @@ static const u32 ar5416Bank2[][2] = {
 };
 
 static const u32 ar5416Bank3[][3] = {
-        /* Addr      5G_HT20     5G_HT40   */
+        /* Addr      5G          2G        */
         {0x000098f0, 0x01400018, 0x01c00018},
 };
 
 static const u32 ar5416Bank6[][3] = {
-        /* Addr      5G_HT20     5G_HT40   */
+        /* Addr      5G          2G        */
         {0x0000989c, 0x00000000, 0x00000000},
         {0x0000989c, 0x00000000, 0x00000000},
         {0x0000989c, 0x00000000, 0x00000000},
@@ -588,7 +588,7 @@ static const u32 ar5416Bank6[][3] = {
 };
 
 static const u32 ar5416Bank6TPC[][3] = {
-        /* Addr      5G_HT20     5G_HT40   */
+        /* Addr      5G          2G        */
         {0x0000989c, 0x00000000, 0x00000000},
         {0x0000989c, 0x00000000, 0x00000000},
         {0x0000989c, 0x00000000, 0x00000000},
diff --git a/drivers/net/wireless/ath/ath9k/ar5008_phy.c b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
index 874186bfda41..fd69376ecc83 100644
--- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
@@ -470,16 +470,15 @@ static void ar5008_hw_spur_mitigate(struct ath_hw *ah,
 static int ar5008_hw_rf_alloc_ext_banks(struct ath_hw *ah)
 {
 #define ATH_ALLOC_BANK(bank, size) do { \
-                bank = kzalloc((sizeof(u32) * size), GFP_KERNEL); \
-                if (!bank) { \
-                        ath_err(common, "Cannot allocate RF banks\n"); \
-                        return -ENOMEM; \
-                } \
+                bank = devm_kzalloc(ah->dev, sizeof(u32) * size, GFP_KERNEL); \
+                if (!bank) \
+                        goto error; \
         } while (0);
 
         struct ath_common *common = ath9k_hw_common(ah);
 
-        BUG_ON(AR_SREV_9280_20_OR_LATER(ah));
+        if (AR_SREV_9280_20_OR_LATER(ah))
+            return 0;
 
         ATH_ALLOC_BANK(ah->analogBank0Data, ah->iniBank0.ia_rows);
         ATH_ALLOC_BANK(ah->analogBank1Data, ah->iniBank1.ia_rows);
@@ -492,35 +491,12 @@ static int ar5008_hw_rf_alloc_ext_banks(struct ath_hw *ah)
 
         return 0;
 #undef ATH_ALLOC_BANK
+error:
+        ath_err(common, "Cannot allocate RF banks\n");
+        return -ENOMEM;
 }
 
 
-/**
- * ar5008_hw_rf_free_ext_banks - Free memory for analog bank scratch buffers
- * @ah: atheros hardware struture
- * For the external AR2133/AR5133 radios banks.
- */
-static void ar5008_hw_rf_free_ext_banks(struct ath_hw *ah)
-{
-#define ATH_FREE_BANK(bank) do { \
-                kfree(bank); \
-                bank = NULL; \
-        } while (0);
-
-        BUG_ON(AR_SREV_9280_20_OR_LATER(ah));
-
-        ATH_FREE_BANK(ah->analogBank0Data);
-        ATH_FREE_BANK(ah->analogBank1Data);
-        ATH_FREE_BANK(ah->analogBank2Data);
-        ATH_FREE_BANK(ah->analogBank3Data);
-        ATH_FREE_BANK(ah->analogBank6Data);
-        ATH_FREE_BANK(ah->analogBank6TPCData);
-        ATH_FREE_BANK(ah->analogBank7Data);
-        ATH_FREE_BANK(ah->bank6Temp);
-
-#undef ATH_FREE_BANK
-}
-
 /* *
  * ar5008_hw_set_rf_regs - programs rf registers based on EEPROM
  * @ah: atheros hardware structure
@@ -1380,7 +1356,7 @@ static void ar5008_hw_set_radar_conf(struct ath_hw *ah)
         conf->radar_inband = 8;
 }
 
-void ar5008_hw_attach_phy_ops(struct ath_hw *ah)
+int ar5008_hw_attach_phy_ops(struct ath_hw *ah)
 {
         struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
         static const u32 ar5416_cca_regs[6] = {
@@ -1391,12 +1367,15 @@ void ar5008_hw_attach_phy_ops(struct ath_hw *ah)
                 AR_PHY_CH1_EXT_CCA,
                 AR_PHY_CH2_EXT_CCA
         };
+        int ret;
+
+        ret = ar5008_hw_rf_alloc_ext_banks(ah);
+        if (ret)
+            return ret;
 
         priv_ops->rf_set_freq = ar5008_hw_set_channel;
         priv_ops->spur_mitigate_freq = ar5008_hw_spur_mitigate;
 
-        priv_ops->rf_alloc_ext_banks = ar5008_hw_rf_alloc_ext_banks;
-        priv_ops->rf_free_ext_banks = ar5008_hw_rf_free_ext_banks;
         priv_ops->set_rf_regs = ar5008_hw_set_rf_regs;
         priv_ops->set_channel_regs = ar5008_hw_set_channel_regs;
         priv_ops->init_bb = ar5008_hw_init_bb;
@@ -1421,4 +1400,5 @@ void ar5008_hw_attach_phy_ops(struct ath_hw *ah)
         ar5008_hw_set_nf_limits(ah);
         ar5008_hw_set_radar_conf(ah);
         memcpy(ah->nf_regs, ar5416_cca_regs, sizeof(ah->nf_regs));
+        return 0;
 }
diff --git a/drivers/net/wireless/ath/ath9k/ar9001_initvals.h b/drivers/net/wireless/ath/ath9k/ar9001_initvals.h
index ea4a230997ac..59524e1d4678 100644
--- a/drivers/net/wireless/ath/ath9k/ar9001_initvals.h
+++ b/drivers/net/wireless/ath/ath9k/ar9001_initvals.h
@@ -460,7 +460,7 @@ static const u32 ar5416Common_9100[][2] = {
 };
 
 static const u32 ar5416Bank6_9100[][3] = {
-        /* Addr      5G_HT20     5G_HT40   */
+        /* Addr      5G          2G        */
         {0x0000989c, 0x00000000, 0x00000000},
         {0x0000989c, 0x00000000, 0x00000000},
         {0x0000989c, 0x00000000, 0x00000000},
@@ -497,7 +497,7 @@ static const u32 ar5416Bank6_9100[][3] = {
 };
 
 static const u32 ar5416Bank6TPC_9100[][3] = {
-        /* Addr      5G_HT20     5G_HT40   */
+        /* Addr      5G          2G        */
         {0x0000989c, 0x00000000, 0x00000000},
         {0x0000989c, 0x00000000, 0x00000000},
         {0x0000989c, 0x00000000, 0x00000000},
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_hw.c b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
index 648da3e885e9..f053d978540e 100644
--- a/drivers/net/wireless/ath/ath9k/ar9002_hw.c
+++ b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
@@ -23,13 +23,13 @@
 
 /* General hardware code for the A5008/AR9001/AR9002 hadware families */
 
-static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
+static int ar9002_hw_init_mode_regs(struct ath_hw *ah)
 {
         if (AR_SREV_9271(ah)) {
                 INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271);
                 INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271);
                 INIT_INI_ARRAY(&ah->iniModes_9271_ANI_reg, ar9271Modes_9271_ANI_reg);
-                return;
+                return 0;
         }
 
         if (ah->config.pcie_clock_req)
@@ -102,9 +102,9 @@ static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
                 u32 size = sizeof(u32) * addac->ia_rows * addac->ia_columns;
                 u32 *data;
 
-                data = kmalloc(size, GFP_KERNEL);
+                data = devm_kzalloc(ah->dev, size, GFP_KERNEL);
                 if (!data)
-                        return;
+                        return -ENOMEM;
 
                 memcpy(data, addac->ia_array, size);
                 addac->ia_array = data;
@@ -120,6 +120,7 @@ static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
                 INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
                        ar9287Common_japan_2484_cck_fir_coeff_9287_1_1);
         }
+        return 0;
 }
 
 static void ar9280_20_hw_init_rxgain_ini(struct ath_hw *ah)
@@ -409,22 +410,30 @@ void ar9002_hw_enable_async_fifo(struct ath_hw *ah)
 }
 
 /* Sets up the AR5008/AR9001/AR9002 hardware familiy callbacks */
-void ar9002_hw_attach_ops(struct ath_hw *ah)
+int ar9002_hw_attach_ops(struct ath_hw *ah)
 {
         struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
         struct ath_hw_ops *ops = ath9k_hw_ops(ah);
+        int ret;
+
+        ret = ar9002_hw_init_mode_regs(ah);
+        if (ret)
+                return ret;
 
-        priv_ops->init_mode_regs = ar9002_hw_init_mode_regs;
         priv_ops->init_mode_gain_regs = ar9002_hw_init_mode_gain_regs;
 
         ops->config_pci_powersave = ar9002_hw_configpcipowersave;
 
-        ar5008_hw_attach_phy_ops(ah);
+        ret = ar5008_hw_attach_phy_ops(ah);
+        if (ret)
+                return ret;
+
         if (AR_SREV_9280_20_OR_LATER(ah))
                 ar9002_hw_attach_phy_ops(ah);
 
         ar9002_hw_attach_calib_ops(ah);
         ar9002_hw_attach_mac_ops(ah);
+        return 0;
 }
 
 void ar9002_hw_load_ani_reg(struct ath_hw *ah, struct ath9k_channel *chan)
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_phy.c b/drivers/net/wireless/ath/ath9k/ar9002_phy.c
index 846dd7974eb8..f4003512d8d5 100644
--- a/drivers/net/wireless/ath/ath9k/ar9002_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar9002_phy.c
@@ -555,14 +555,73 @@ static void ar9002_hw_antdiv_comb_conf_set(struct ath_hw *ah,
         REG_WRITE(ah, AR_PHY_MULTICHAIN_GAIN_CTL, regval);
 }
 
+static void ar9002_hw_spectral_scan_config(struct ath_hw *ah,
+                                    struct ath_spec_scan *param)
+{
+        u8 count;
+
+        if (!param->enabled) {
+                REG_CLR_BIT(ah, AR_PHY_SPECTRAL_SCAN,
+                            AR_PHY_SPECTRAL_SCAN_ENABLE);
+                return;
+        }
+        REG_SET_BIT(ah, AR_PHY_RADAR_0, AR_PHY_RADAR_0_FFT_ENA);
+        REG_SET_BIT(ah, AR_PHY_SPECTRAL_SCAN, AR_PHY_SPECTRAL_SCAN_ENABLE);
+
+        if (param->short_repeat)
+                REG_SET_BIT(ah, AR_PHY_SPECTRAL_SCAN,
+                            AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT);
+        else
+                REG_CLR_BIT(ah, AR_PHY_SPECTRAL_SCAN,
+                            AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT);
+
+        /* on AR92xx, the highest bit of count will make the the chip send
+         * spectral samples endlessly. Check if this really was intended,
+         * and fix otherwise.
+         */
+        count = param->count;
+        if (param->endless)
+                count = 0x80;
+        else if (count & 0x80)
+                count = 0x7f;
+
+        REG_RMW_FIELD(ah, AR_PHY_SPECTRAL_SCAN,
+                      AR_PHY_SPECTRAL_SCAN_COUNT, count);
+        REG_RMW_FIELD(ah, AR_PHY_SPECTRAL_SCAN,
+                      AR_PHY_SPECTRAL_SCAN_PERIOD, param->period);
+        REG_RMW_FIELD(ah, AR_PHY_SPECTRAL_SCAN,
+                      AR_PHY_SPECTRAL_SCAN_FFT_PERIOD, param->fft_period);
+
+        return;
+}
+
+static void ar9002_hw_spectral_scan_trigger(struct ath_hw *ah)
+{
+        REG_SET_BIT(ah, AR_PHY_SPECTRAL_SCAN, AR_PHY_SPECTRAL_SCAN_ENABLE);
+        /* Activate spectral scan */
+        REG_SET_BIT(ah, AR_PHY_SPECTRAL_SCAN,
+                    AR_PHY_SPECTRAL_SCAN_ACTIVE);
+}
+
+static void ar9002_hw_spectral_scan_wait(struct ath_hw *ah)
+{
+        struct ath_common *common = ath9k_hw_common(ah);
+
+        /* Poll for spectral scan complete */
+        if (!ath9k_hw_wait(ah, AR_PHY_SPECTRAL_SCAN,
+                           AR_PHY_SPECTRAL_SCAN_ACTIVE,
+                           0, AH_WAIT_TIMEOUT)) {
+                ath_err(common, "spectral scan wait failed\n");
+                return;
+        }
+}
+
 void ar9002_hw_attach_phy_ops(struct ath_hw *ah)
 {
         struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
         struct ath_hw_ops *ops = ath9k_hw_ops(ah);
 
         priv_ops->set_rf_regs = NULL;
-        priv_ops->rf_alloc_ext_banks = NULL;
-        priv_ops->rf_free_ext_banks = NULL;
         priv_ops->rf_set_freq = ar9002_hw_set_channel;
         priv_ops->spur_mitigate_freq = ar9002_hw_spur_mitigate;
         priv_ops->olc_init = ar9002_olc_init;
@@ -571,6 +630,9 @@ void ar9002_hw_attach_phy_ops(struct ath_hw *ah)
 
         ops->antdiv_comb_conf_get = ar9002_hw_antdiv_comb_conf_get;
         ops->antdiv_comb_conf_set = ar9002_hw_antdiv_comb_conf_set;
+        ops->spectral_scan_config = ar9002_hw_spectral_scan_config;
+        ops->spectral_scan_trigger = ar9002_hw_spectral_scan_trigger;
+        ops->spectral_scan_wait = ar9002_hw_spectral_scan_wait;
 
         ar9002_hw_set_nf_limits(ah);
 }
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h b/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
index 262e1e036fd7..db5ffada2217 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
+++ b/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
@@ -744,6 +744,186 @@ static const u32 ar9300Modes_high_ob_db_tx_gain_table_2p2[][5] = {
         {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
 };
 
+static const u32 ar9300Modes_mixed_ob_db_tx_gain_table_2p2[][5] = {
+        /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
+        {0x0000a2dc, 0x00033800, 0x00033800, 0x03aaa352, 0x03aaa352},
+        {0x0000a2e0, 0x0003c000, 0x0003c000, 0x03ccc584, 0x03ccc584},
+        {0x0000a2e4, 0x03fc0000, 0x03fc0000, 0x03f0f800, 0x03f0f800},
+        {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+        {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
+        {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
+        {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
+        {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
+        {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
+        {0x0000a514, 0x1c000223, 0x1c000223, 0x11000400, 0x11000400},
+        {0x0000a518, 0x21002220, 0x21002220, 0x15000402, 0x15000402},
+        {0x0000a51c, 0x27002223, 0x27002223, 0x19000404, 0x19000404},
+        {0x0000a520, 0x2b022220, 0x2b022220, 0x1b000603, 0x1b000603},
+        {0x0000a524, 0x2f022222, 0x2f022222, 0x1f000a02, 0x1f000a02},
+        {0x0000a528, 0x34022225, 0x34022225, 0x23000a04, 0x23000a04},
+        {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x26000a20, 0x26000a20},
+        {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2a000e20, 0x2a000e20},
+        {0x0000a534, 0x4202242a, 0x4202242a, 0x2e000e22, 0x2e000e22},
+        {0x0000a538, 0x4702244a, 0x4702244a, 0x31000e24, 0x31000e24},
+        {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x34001640, 0x34001640},
+        {0x0000a540, 0x4e02246c, 0x4e02246c, 0x38001660, 0x38001660},
+        {0x0000a544, 0x52022470, 0x52022470, 0x3b001861, 0x3b001861},
+        {0x0000a548, 0x55022490, 0x55022490, 0x3e001a81, 0x3e001a81},
+        {0x0000a54c, 0x59022492, 0x59022492, 0x42001a83, 0x42001a83},
+        {0x0000a550, 0x5d022692, 0x5d022692, 0x44001c84, 0x44001c84},
+        {0x0000a554, 0x61022892, 0x61022892, 0x48001ce3, 0x48001ce3},
+        {0x0000a558, 0x65024890, 0x65024890, 0x4c001ce5, 0x4c001ce5},
+        {0x0000a55c, 0x69024892, 0x69024892, 0x50001ce9, 0x50001ce9},
+        {0x0000a560, 0x6e024c92, 0x6e024c92, 0x54001ceb, 0x54001ceb},
+        {0x0000a564, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
+        {0x0000a568, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
+        {0x0000a56c, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
+        {0x0000a570, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
+        {0x0000a574, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
+        {0x0000a578, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
+        {0x0000a57c, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
+        {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000},
+        {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002},
+        {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004},
+        {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200},
+        {0x0000a590, 0x16800220, 0x16800220, 0x0f800202, 0x0f800202},
+        {0x0000a594, 0x1c800223, 0x1c800223, 0x11800400, 0x11800400},
+        {0x0000a598, 0x21802220, 0x21802220, 0x15800402, 0x15800402},
+        {0x0000a59c, 0x27802223, 0x27802223, 0x19800404, 0x19800404},
+        {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1b800603, 0x1b800603},
+        {0x0000a5a4, 0x2f822222, 0x2f822222, 0x1f800a02, 0x1f800a02},
+        {0x0000a5a8, 0x34822225, 0x34822225, 0x23800a04, 0x23800a04},
+        {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x26800a20, 0x26800a20},
+        {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x2a800e20, 0x2a800e20},
+        {0x0000a5b4, 0x4282242a, 0x4282242a, 0x2e800e22, 0x2e800e22},
+        {0x0000a5b8, 0x4782244a, 0x4782244a, 0x31800e24, 0x31800e24},
+        {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x34801640, 0x34801640},
+        {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x38801660, 0x38801660},
+        {0x0000a5c4, 0x52822470, 0x52822470, 0x3b801861, 0x3b801861},
+        {0x0000a5c8, 0x55822490, 0x55822490, 0x3e801a81, 0x3e801a81},
+        {0x0000a5cc, 0x59822492, 0x59822492, 0x42801a83, 0x42801a83},
+        {0x0000a5d0, 0x5d822692, 0x5d822692, 0x44801c84, 0x44801c84},
+        {0x0000a5d4, 0x61822892, 0x61822892, 0x48801ce3, 0x48801ce3},
+        {0x0000a5d8, 0x65824890, 0x65824890, 0x4c801ce5, 0x4c801ce5},
+        {0x0000a5dc, 0x69824892, 0x69824892, 0x50801ce9, 0x50801ce9},
+        {0x0000a5e0, 0x6e824c92, 0x6e824c92, 0x54801ceb, 0x54801ceb},
+        {0x0000a5e4, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
+        {0x0000a5e8, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
+        {0x0000a5ec, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
+        {0x0000a5f0, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
+        {0x0000a5f4, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
+        {0x0000a5f8, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
+        {0x0000a5fc, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
+        {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000a614, 0x02004000, 0x02004000, 0x01404000, 0x01404000},
+        {0x0000a618, 0x02004801, 0x02004801, 0x01404501, 0x01404501},
+        {0x0000a61c, 0x02808a02, 0x02808a02, 0x02008501, 0x02008501},
+        {0x0000a620, 0x0380ce03, 0x0380ce03, 0x0280ca03, 0x0280ca03},
+        {0x0000a624, 0x04411104, 0x04411104, 0x03010c04, 0x03010c04},
+        {0x0000a628, 0x04411104, 0x04411104, 0x04014c04, 0x04014c04},
+        {0x0000a62c, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
+        {0x0000a630, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
+        {0x0000a634, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
+        {0x0000a638, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
+        {0x0000a63c, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
+        {0x0000b2dc, 0x00033800, 0x00033800, 0x03aaa352, 0x03aaa352},
+        {0x0000b2e0, 0x0003c000, 0x0003c000, 0x03ccc584, 0x03ccc584},
+        {0x0000b2e4, 0x03fc0000, 0x03fc0000, 0x03f0f800, 0x03f0f800},
+        {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+        {0x0000c2dc, 0x00033800, 0x00033800, 0x03aaa352, 0x03aaa352},
+        {0x0000c2e0, 0x0003c000, 0x0003c000, 0x03ccc584, 0x03ccc584},
+        {0x0000c2e4, 0x03fc0000, 0x03fc0000, 0x03f0f800, 0x03f0f800},
+        {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+        {0x00016044, 0x012492d4, 0x012492d4, 0x056db2e4, 0x056db2e4},
+        {0x00016048, 0x66480001, 0x66480001, 0x8e480001, 0x8e480001},
+        {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
+        {0x00016444, 0x012492d4, 0x012492d4, 0x056db2e4, 0x056db2e4},
+        {0x00016448, 0x66480001, 0x66480001, 0x8e480001, 0x8e480001},
+        {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
+        {0x00016844, 0x012492d4, 0x012492d4, 0x056db2e4, 0x056db2e4},
+        {0x00016848, 0x66480001, 0x66480001, 0x8e480001, 0x8e480001},
+        {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
+};
+
+static const u32 ar9300Modes_type5_tx_gain_table_2p2[][5] = {
+        /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
+        {0x0000a2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
+        {0x0000a2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
+        {0x0000a2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
+        {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+        {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
+        {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
+        {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
+        {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
+        {0x0000a510, 0x15000028, 0x15000028, 0x0f000202, 0x0f000202},
+        {0x0000a514, 0x1b00002b, 0x1b00002b, 0x12000400, 0x12000400},
+        {0x0000a518, 0x1f020028, 0x1f020028, 0x16000402, 0x16000402},
+        {0x0000a51c, 0x2502002b, 0x2502002b, 0x19000404, 0x19000404},
+        {0x0000a520, 0x2a04002a, 0x2a04002a, 0x1c000603, 0x1c000603},
+        {0x0000a524, 0x2e06002a, 0x2e06002a, 0x21000a02, 0x21000a02},
+        {0x0000a528, 0x3302202d, 0x3302202d, 0x25000a04, 0x25000a04},
+        {0x0000a52c, 0x3804202c, 0x3804202c, 0x28000a20, 0x28000a20},
+        {0x0000a530, 0x3c06202c, 0x3c06202c, 0x2c000e20, 0x2c000e20},
+        {0x0000a534, 0x4108202d, 0x4108202d, 0x30000e22, 0x30000e22},
+        {0x0000a538, 0x4506402d, 0x4506402d, 0x34000e24, 0x34000e24},
+        {0x0000a53c, 0x4906222d, 0x4906222d, 0x38001640, 0x38001640},
+        {0x0000a540, 0x4d062231, 0x4d062231, 0x3c001660, 0x3c001660},
+        {0x0000a544, 0x50082231, 0x50082231, 0x3f001861, 0x3f001861},
+        {0x0000a548, 0x5608422e, 0x5608422e, 0x43001a81, 0x43001a81},
+        {0x0000a54c, 0x5e08442e, 0x5e08442e, 0x47001a83, 0x47001a83},
+        {0x0000a550, 0x620a4431, 0x620a4431, 0x4a001c84, 0x4a001c84},
+        {0x0000a554, 0x640a4432, 0x640a4432, 0x4e001ce3, 0x4e001ce3},
+        {0x0000a558, 0x680a4434, 0x680a4434, 0x52001ce5, 0x52001ce5},
+        {0x0000a55c, 0x6c0a6434, 0x6c0a6434, 0x56001ce9, 0x56001ce9},
+        {0x0000a560, 0x6f0a6633, 0x6f0a6633, 0x5a001ceb, 0x5a001ceb},
+        {0x0000a564, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
+        {0x0000a568, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
+        {0x0000a56c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
+        {0x0000a570, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
+        {0x0000a574, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
+        {0x0000a578, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
+        {0x0000a57c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
+        {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000a608, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
+        {0x0000a60c, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
+        {0x0000a610, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
+        {0x0000a614, 0x01804601, 0x01804601, 0x01404000, 0x01404000},
+        {0x0000a618, 0x01804601, 0x01804601, 0x01404501, 0x01404501},
+        {0x0000a61c, 0x01804601, 0x01804601, 0x02008501, 0x02008501},
+        {0x0000a620, 0x03408d02, 0x03408d02, 0x0280ca03, 0x0280ca03},
+        {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
+        {0x0000a628, 0x03410d04, 0x03410d04, 0x04014c04, 0x04014c04},
+        {0x0000a62c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
+        {0x0000a630, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
+        {0x0000a634, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
+        {0x0000a638, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
+        {0x0000a63c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
+        {0x0000b2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
+        {0x0000b2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
+        {0x0000b2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
+        {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+        {0x0000c2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
+        {0x0000c2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
+        {0x0000c2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
+        {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+        {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
+        {0x00016048, 0x65240001, 0x65240001, 0x66480001, 0x66480001},
+        {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
+        {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
+        {0x00016448, 0x65240001, 0x65240001, 0x66480001, 0x66480001},
+        {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
+        {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
+        {0x00016848, 0x65240001, 0x65240001, 0x66480001, 0x66480001},
+        {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
+};
+
 static const u32 ar9300Common_rx_gain_table_2p2[][2] = {
         /* Addr      allmodes  */
         {0x0000a000, 0x00010000},
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_calib.c b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
index 8b0d8dcd7625..4cc13940c895 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
@@ -32,7 +32,6 @@ struct coeff {
 
 enum ar9003_cal_types {
         IQ_MISMATCH_CAL = BIT(0),
-        TEMP_COMP_CAL = BIT(1),
 };
 
 static void ar9003_hw_setup_calibration(struct ath_hw *ah,
@@ -49,7 +48,7 @@ static void ar9003_hw_setup_calibration(struct ath_hw *ah,
                  */
                 REG_RMW_FIELD(ah, AR_PHY_TIMING4,
                               AR_PHY_TIMING4_IQCAL_LOG_COUNT_MAX,
-                currCal->calData->calCountMax);
+                              currCal->calData->calCountMax);
                 REG_WRITE(ah, AR_PHY_CALMODE, AR_PHY_CALMODE_IQ);
 
                 ath_dbg(common, CALIBRATE,
@@ -58,14 +57,8 @@ static void ar9003_hw_setup_calibration(struct ath_hw *ah,
                 /* Kick-off cal */
                 REG_SET_BIT(ah, AR_PHY_TIMING4, AR_PHY_TIMING4_DO_CAL);
                 break;
-        case TEMP_COMP_CAL:
-                REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_THERM,
-                              AR_PHY_65NM_CH0_THERM_LOCAL, 1);
-                REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_THERM,
-                              AR_PHY_65NM_CH0_THERM_START, 1);
-
-                ath_dbg(common, CALIBRATE,
-                        "starting Temperature Compensation Calibration\n");
+        default:
+                ath_err(common, "Invalid calibration type\n");
                 break;
         }
 }
@@ -323,6 +316,14 @@ static const struct ath9k_percal_data iq_cal_single_sample = {
 static void ar9003_hw_init_cal_settings(struct ath_hw *ah)
 {
         ah->iq_caldata.calData = &iq_cal_single_sample;
+
+        if (AR_SREV_9300_20_OR_LATER(ah)) {
+                ah->enabled_cals |= TX_IQ_CAL;
+                if (AR_SREV_9485_OR_LATER(ah) && !AR_SREV_9340(ah))
+                        ah->enabled_cals |= TX_IQ_ON_AGC_CAL;
+        }
+
+        ah->supp_cals = IQ_MISMATCH_CAL;
 }
 
 /*
@@ -959,22 +960,70 @@ static void ar9003_hw_manual_peak_cal(struct ath_hw *ah, u8 chain, bool is_2g)
                       AR_PHY_65NM_RXRF_AGC_AGC_CAL_OVR, 0);
 }
 
+static void ar9003_hw_do_manual_peak_cal(struct ath_hw *ah,
+                                         struct ath9k_channel *chan)
+{
+        int i;
+
+        if (!AR_SREV_9462(ah) && !AR_SREV_9565(ah))
+                return;
+
+        for (i = 0; i < AR9300_MAX_CHAINS; i++) {
+                if (!(ah->rxchainmask & (1 << i)))
+                        continue;
+                ar9003_hw_manual_peak_cal(ah, i, IS_CHAN_2GHZ(chan));
+        }
+}
+
+static void ar9003_hw_cl_cal_post_proc(struct ath_hw *ah, bool is_reusable)
+{
+        u32 cl_idx[AR9300_MAX_CHAINS] = { AR_PHY_CL_TAB_0,
+                                          AR_PHY_CL_TAB_1,
+                                          AR_PHY_CL_TAB_2 };
+        struct ath9k_hw_cal_data *caldata = ah->caldata;
+        bool txclcal_done = false;
+        int i, j;
+
+        if (!caldata || !(ah->enabled_cals & TX_CL_CAL))
+                return;
+
+        txclcal_done = !!(REG_READ(ah, AR_PHY_AGC_CONTROL) &
+                          AR_PHY_AGC_CONTROL_CLC_SUCCESS);
+
+        if (caldata->done_txclcal_once) {
+                for (i = 0; i < AR9300_MAX_CHAINS; i++) {
+                        if (!(ah->txchainmask & (1 << i)))
+                                continue;
+                        for (j = 0; j < MAX_CL_TAB_ENTRY; j++)
+                                REG_WRITE(ah, CL_TAB_ENTRY(cl_idx[i]),
+                                          caldata->tx_clcal[i][j]);
+                }
+        } else if (is_reusable && txclcal_done) {
+                for (i = 0; i < AR9300_MAX_CHAINS; i++) {
+                        if (!(ah->txchainmask & (1 << i)))
+                                continue;
+                        for (j = 0; j < MAX_CL_TAB_ENTRY; j++)
+                                caldata->tx_clcal[i][j] =
+                                        REG_READ(ah, CL_TAB_ENTRY(cl_idx[i]));
+                }
+                caldata->done_txclcal_once = true;
+        }
+}
+
 static bool ar9003_hw_init_cal(struct ath_hw *ah,
                                struct ath9k_channel *chan)
 {
         struct ath_common *common = ath9k_hw_common(ah);
         struct ath9k_hw_cal_data *caldata = ah->caldata;
-        bool txiqcal_done = false, txclcal_done = false;
+        bool txiqcal_done = false;
         bool is_reusable = true, status = true;
-        bool run_rtt_cal = false, run_agc_cal;
+        bool run_rtt_cal = false, run_agc_cal, sep_iq_cal = false;
         bool rtt = !!(ah->caps.hw_caps & ATH9K_HW_CAP_RTT);
         u32 agc_ctrl = 0, agc_supp_cals = AR_PHY_AGC_CONTROL_OFFSET_CAL |
                                           AR_PHY_AGC_CONTROL_FLTR_CAL   |
                                           AR_PHY_AGC_CONTROL_PKDET_CAL;
-        int i, j;
-        u32 cl_idx[AR9300_MAX_CHAINS] = { AR_PHY_CL_TAB_0,
-                                          AR_PHY_CL_TAB_1,
-                                          AR_PHY_CL_TAB_2 };
+
+        ar9003_hw_set_chain_masks(ah, ah->caps.rx_chainmask, ah->caps.tx_chainmask);
 
         if (rtt) {
                 if (!ar9003_hw_rtt_restore(ah, chan))
@@ -1012,7 +1061,8 @@ static bool ar9003_hw_init_cal(struct ath_hw *ah,
                 }
         }
 
-        if (!(ah->enabled_cals & TX_IQ_CAL))
+        if ((IS_CHAN_HALF_RATE(chan) || IS_CHAN_QUARTER_RATE(chan)) ||
+            !(ah->enabled_cals & TX_IQ_CAL))
                 goto skip_tx_iqcal;
 
         /* Do Tx IQ Calibration */
@@ -1032,21 +1082,22 @@ static bool ar9003_hw_init_cal(struct ath_hw *ah,
                         REG_CLR_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0,
                                     AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL);
                 txiqcal_done = run_agc_cal = true;
-                goto skip_tx_iqcal;
-        } else if (caldata && !caldata->done_txiqcal_once)
+        } else if (caldata && !caldata->done_txiqcal_once) {
                 run_agc_cal = true;
+                sep_iq_cal = true;
+        }
 
+skip_tx_iqcal:
         if (ath9k_hw_mci_is_enabled(ah) && IS_CHAN_2GHZ(chan) && run_agc_cal)
                 ar9003_mci_init_cal_req(ah, &is_reusable);
 
-        if (!(IS_CHAN_HALF_RATE(chan) || IS_CHAN_QUARTER_RATE(chan))) {
+        if (sep_iq_cal) {
                 txiqcal_done = ar9003_hw_tx_iq_cal_run(ah);
                 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
                 udelay(5);
                 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
         }
 
-skip_tx_iqcal:
         if (run_agc_cal || !(ah->ah_flags & AH_FASTCC)) {
                 /* Calibrate the AGC */
                 REG_WRITE(ah, AR_PHY_AGC_CONTROL,
@@ -1057,14 +1108,8 @@ skip_tx_iqcal:
                 status = ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL,
                                        AR_PHY_AGC_CONTROL_CAL,
                                        0, AH_WAIT_TIMEOUT);
-                if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
-                        for (i = 0; i < AR9300_MAX_CHAINS; i++) {
-                                if (!(ah->rxchainmask & (1 << i)))
-                                        continue;
-                                ar9003_hw_manual_peak_cal(ah, i,
-                                                          IS_CHAN_2GHZ(chan));
-                        }
-                }
+
+                ar9003_hw_do_manual_peak_cal(ah, chan);
         }
 
         if (ath9k_hw_mci_is_enabled(ah) && IS_CHAN_2GHZ(chan) && run_agc_cal)
@@ -1089,31 +1134,7 @@ skip_tx_iqcal:
         else if (caldata && caldata->done_txiqcal_once)
                 ar9003_hw_tx_iq_cal_reload(ah);
 
-#define CL_TAB_ENTRY(reg_base)  (reg_base + (4 * j))
-        if (caldata && (ah->enabled_cals & TX_CL_CAL)) {
-                txclcal_done = !!(REG_READ(ah, AR_PHY_AGC_CONTROL) &
-                                           AR_PHY_AGC_CONTROL_CLC_SUCCESS);
-                if (caldata->done_txclcal_once) {
-                        for (i = 0; i < AR9300_MAX_CHAINS; i++) {
-                                if (!(ah->txchainmask & (1 << i)))
-                                        continue;
-                                for (j = 0; j < MAX_CL_TAB_ENTRY; j++)
-                                        REG_WRITE(ah, CL_TAB_ENTRY(cl_idx[i]),
-                                                  caldata->tx_clcal[i][j]);
-                        }
-                } else if (is_reusable && txclcal_done) {
-                        for (i = 0; i < AR9300_MAX_CHAINS; i++) {
-                                if (!(ah->txchainmask & (1 << i)))
-                                        continue;
-                                for (j = 0; j < MAX_CL_TAB_ENTRY; j++)
-                                        caldata->tx_clcal[i][j] =
-                                                REG_READ(ah,
-                                                  CL_TAB_ENTRY(cl_idx[i]));
-                        }
-                        caldata->done_txclcal_once = true;
-                }
-        }
-#undef CL_TAB_ENTRY
+        ar9003_hw_cl_cal_post_proc(ah, is_reusable);
 
         if (run_rtt_cal && caldata) {
                 if (is_reusable) {
@@ -1131,20 +1152,10 @@ skip_tx_iqcal:
 
         /* Initialize list pointers */
         ah->cal_list = ah->cal_list_last = ah->cal_list_curr = NULL;
-        ah->supp_cals = IQ_MISMATCH_CAL;
-
-        if (ah->supp_cals & IQ_MISMATCH_CAL) {
-                INIT_CAL(&ah->iq_caldata);
-                INSERT_CAL(ah, &ah->iq_caldata);
-                ath_dbg(common, CALIBRATE, "enabling IQ Calibration\n");
-        }
 
-        if (ah->supp_cals & TEMP_COMP_CAL) {
-                INIT_CAL(&ah->tempCompCalData);
-                INSERT_CAL(ah, &ah->tempCompCalData);
-                ath_dbg(common, CALIBRATE,
-                        "enabling Temperature Compensation Calibration\n");
-        }
+        INIT_CAL(&ah->iq_caldata);
+        INSERT_CAL(ah, &ah->iq_caldata);
+        ath_dbg(common, CALIBRATE, "enabling IQ Calibration\n");
 
         /* Initialize current pointer to first element in list */
         ah->cal_list_curr = ah->cal_list;
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
index 562186ca9b52..881e989ea470 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
@@ -4586,14 +4586,14 @@ static int ar9003_hw_cal_pier_get(struct ath_hw *ah,
         return 0;
 }
 
-static int ar9003_hw_power_control_override(struct ath_hw *ah,
-                                            int frequency,
-                                            int *correction,
-                                            int *voltage, int *temperature)
+static void ar9003_hw_power_control_override(struct ath_hw *ah,
+                                             int frequency,
+                                             int *correction,
+                                             int *voltage, int *temperature)
 {
-        int tempSlope = 0;
+        int temp_slope = 0, temp_slope1 = 0, temp_slope2 = 0;
         struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
-        int f[8], t[8], i;
+        int f[8], t[8], t1[3], t2[3], i;
 
         REG_RMW(ah, AR_PHY_TPC_11_B0,
                 (correction[0] << AR_PHY_TPC_OLPC_GAIN_DELTA_S),
@@ -4624,38 +4624,108 @@ static int ar9003_hw_power_control_override(struct ath_hw *ah,
          * enable temperature compensation
          * Need to use register names
          */
-        if (frequency < 4000)
-                tempSlope = eep->modalHeader2G.tempSlope;
-        else if ((eep->baseEepHeader.miscConfiguration & 0x20) != 0) {
-                for (i = 0; i < 8; i++) {
-                        t[i] = eep->base_ext1.tempslopextension[i];
-                        f[i] = FBIN2FREQ(eep->calFreqPier5G[i], 0);
+        if (frequency < 4000) {
+                temp_slope = eep->modalHeader2G.tempSlope;
+        } else {
+                if (AR_SREV_9550(ah)) {
+                        t[0] = eep->base_ext1.tempslopextension[2];
+                        t1[0] = eep->base_ext1.tempslopextension[3];
+                        t2[0] = eep->base_ext1.tempslopextension[4];
+                        f[0] = 5180;
+
+                        t[1] = eep->modalHeader5G.tempSlope;
+                        t1[1] = eep->base_ext1.tempslopextension[0];
+                        t2[1] = eep->base_ext1.tempslopextension[1];
+                        f[1] = 5500;
+
+                        t[2] = eep->base_ext1.tempslopextension[5];
+                        t1[2] = eep->base_ext1.tempslopextension[6];
+                        t2[2] = eep->base_ext1.tempslopextension[7];
+                        f[2] = 5785;
+
+                        temp_slope = ar9003_hw_power_interpolate(frequency,
+                                                                 f, t, 3);
+                        temp_slope1 = ar9003_hw_power_interpolate(frequency,
+                                                                   f, t1, 3);
+                        temp_slope2 = ar9003_hw_power_interpolate(frequency,
+                                                                   f, t2, 3);
+
+                        goto tempslope;
                 }
-                tempSlope = ar9003_hw_power_interpolate((s32) frequency,
-                                                        f, t, 8);
-        } else if (eep->base_ext2.tempSlopeLow != 0) {
-                t[0] = eep->base_ext2.tempSlopeLow;
-                f[0] = 5180;
-                t[1] = eep->modalHeader5G.tempSlope;
-                f[1] = 5500;
-                t[2] = eep->base_ext2.tempSlopeHigh;
-                f[2] = 5785;
-                tempSlope = ar9003_hw_power_interpolate((s32) frequency,
-                                                        f, t, 3);
-        } else
-                tempSlope = eep->modalHeader5G.tempSlope;
 
-        REG_RMW_FIELD(ah, AR_PHY_TPC_19, AR_PHY_TPC_19_ALPHA_THERM, tempSlope);
+                if ((eep->baseEepHeader.miscConfiguration & 0x20) != 0) {
+                        for (i = 0; i < 8; i++) {
+                                t[i] = eep->base_ext1.tempslopextension[i];
+                                f[i] = FBIN2FREQ(eep->calFreqPier5G[i], 0);
+                        }
+                        temp_slope = ar9003_hw_power_interpolate((s32) frequency,
+                                                                 f, t, 8);
+                } else if (eep->base_ext2.tempSlopeLow != 0) {
+                        t[0] = eep->base_ext2.tempSlopeLow;
+                        f[0] = 5180;
+                        t[1] = eep->modalHeader5G.tempSlope;
+                        f[1] = 5500;
+                        t[2] = eep->base_ext2.tempSlopeHigh;
+                        f[2] = 5785;
+                        temp_slope = ar9003_hw_power_interpolate((s32) frequency,
+                                                                 f, t, 3);
+                } else {
+                        temp_slope = eep->modalHeader5G.tempSlope;
+                }
+        }
+
+tempslope:
+        if (AR_SREV_9550(ah)) {
+                /*
+                 * AR955x has tempSlope register for each chain.
+                 * Check whether temp_compensation feature is enabled or not.
+                 */
+                if (eep->baseEepHeader.featureEnable & 0x1) {
+                        if (frequency < 4000) {
+                                REG_RMW_FIELD(ah, AR_PHY_TPC_19,
+                                              AR_PHY_TPC_19_ALPHA_THERM,
+                                              eep->base_ext2.tempSlopeLow);
+                                REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
+                                              AR_PHY_TPC_19_ALPHA_THERM,
+                                              temp_slope);
+                                REG_RMW_FIELD(ah, AR_PHY_TPC_19_B2,
+                                              AR_PHY_TPC_19_ALPHA_THERM,
+                                              eep->base_ext2.tempSlopeHigh);
+                        } else {
+                                REG_RMW_FIELD(ah, AR_PHY_TPC_19,
+                                              AR_PHY_TPC_19_ALPHA_THERM,
+                                              temp_slope);
+                                REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
+                                              AR_PHY_TPC_19_ALPHA_THERM,
+                                              temp_slope1);
+                                REG_RMW_FIELD(ah, AR_PHY_TPC_19_B2,
+                                              AR_PHY_TPC_19_ALPHA_THERM,
+                                              temp_slope2);
+                        }
+                } else {
+                        /*
+                         * If temp compensation is not enabled,
+                         * set all registers to 0.
+                         */
+                        REG_RMW_FIELD(ah, AR_PHY_TPC_19,
+                                      AR_PHY_TPC_19_ALPHA_THERM, 0);
+                        REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
+                                      AR_PHY_TPC_19_ALPHA_THERM, 0);
+                        REG_RMW_FIELD(ah, AR_PHY_TPC_19_B2,
+                                      AR_PHY_TPC_19_ALPHA_THERM, 0);
+                }
+        } else {
+                REG_RMW_FIELD(ah, AR_PHY_TPC_19,
+                              AR_PHY_TPC_19_ALPHA_THERM, temp_slope);
+        }
 
         if (AR_SREV_9462_20(ah))
                 REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
-                              AR_PHY_TPC_19_B1_ALPHA_THERM, tempSlope);
+                              AR_PHY_TPC_19_B1_ALPHA_THERM, temp_slope);
 
 
         REG_RMW_FIELD(ah, AR_PHY_TPC_18, AR_PHY_TPC_18_THERM_CAL_VALUE,
                       temperature[0]);
-
-        return 0;
 }
 
 /* Apply the recorded correction values. */
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_hw.c b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
index 59bf5f31e212..a3523c969a3a 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
@@ -507,28 +507,59 @@ static void ar9003_tx_gain_table_mode4(struct ath_hw *ah)
         else if (AR_SREV_9580(ah))
                 INIT_INI_ARRAY(&ah->iniModesTxGain,
                         ar9580_1p0_mixed_ob_db_tx_gain_table);
+        else
+                INIT_INI_ARRAY(&ah->iniModesTxGain,
+                        ar9300Modes_mixed_ob_db_tx_gain_table_2p2);
+}
+
+static void ar9003_tx_gain_table_mode5(struct ath_hw *ah)
+{
+        if (AR_SREV_9485_11(ah))
+                INIT_INI_ARRAY(&ah->iniModesTxGain,
+                        ar9485Modes_green_ob_db_tx_gain_1_1);
+        else if (AR_SREV_9340(ah))
+                INIT_INI_ARRAY(&ah->iniModesTxGain,
+                        ar9340Modes_ub124_tx_gain_table_1p0);
+        else if (AR_SREV_9580(ah))
+                INIT_INI_ARRAY(&ah->iniModesTxGain,
+                        ar9580_1p0_type5_tx_gain_table);
+        else if (AR_SREV_9300_22(ah))
+                INIT_INI_ARRAY(&ah->iniModesTxGain,
+                        ar9300Modes_type5_tx_gain_table_2p2);
 }
 
+static void ar9003_tx_gain_table_mode6(struct ath_hw *ah)
+{
+        if (AR_SREV_9340(ah))
+                INIT_INI_ARRAY(&ah->iniModesTxGain,
+                        ar9340Modes_low_ob_db_and_spur_tx_gain_table_1p0);
+        else if (AR_SREV_9485_11(ah))
+                INIT_INI_ARRAY(&ah->iniModesTxGain,
+                        ar9485Modes_green_spur_ob_db_tx_gain_1_1);
+        else if (AR_SREV_9580(ah))
+                INIT_INI_ARRAY(&ah->iniModesTxGain,
+                        ar9580_1p0_type6_tx_gain_table);
+}
+
+typedef void (*ath_txgain_tab)(struct ath_hw *ah);
+
 static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
 {
-        switch (ar9003_hw_get_tx_gain_idx(ah)) {
-        case 0:
-        default:
-                ar9003_tx_gain_table_mode0(ah);
-                break;
-        case 1:
-                ar9003_tx_gain_table_mode1(ah);
-                break;
-        case 2:
-                ar9003_tx_gain_table_mode2(ah);
-                break;
-        case 3:
-                ar9003_tx_gain_table_mode3(ah);
-                break;
-        case 4:
-                ar9003_tx_gain_table_mode4(ah);
-                break;
-        }
+        static const ath_txgain_tab modes[] = {
+                ar9003_tx_gain_table_mode0,
+                ar9003_tx_gain_table_mode1,
+                ar9003_tx_gain_table_mode2,
+                ar9003_tx_gain_table_mode3,
+                ar9003_tx_gain_table_mode4,
+                ar9003_tx_gain_table_mode5,
+                ar9003_tx_gain_table_mode6,
+        };
+        int idx = ar9003_hw_get_tx_gain_idx(ah);
+
+        if (idx >= ARRAY_SIZE(modes))
+                idx = 0;
+
+        modes[idx](ah);
 }
 
 static void ar9003_rx_gain_table_mode0(struct ath_hw *ah)
@@ -673,7 +704,7 @@ void ar9003_hw_attach_ops(struct ath_hw *ah)
         struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
         struct ath_hw_ops *ops = ath9k_hw_ops(ah);
 
-        priv_ops->init_mode_regs = ar9003_hw_init_mode_regs;
+        ar9003_hw_init_mode_regs(ah);
         priv_ops->init_mode_gain_regs = ar9003_hw_init_mode_gain_regs;
 
         ops->config_pci_powersave = ar9003_hw_configpcipowersave;
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
index ce19c09fa8e8..2bf6548dd143 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
@@ -68,7 +68,7 @@ static const int m2ThreshExt_off = 127;
 static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
 {
         u16 bMode, fracMode = 0, aModeRefSel = 0;
-        u32 freq, channelSel = 0, reg32 = 0;
+        u32 freq, chan_frac, div, channelSel = 0, reg32 = 0;
         struct chan_centers centers;
         int loadSynthChannel;
 
@@ -77,9 +77,6 @@ static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
 
         if (freq < 4800) {     /* 2 GHz, fractional mode */
                 if (AR_SREV_9330(ah)) {
-                        u32 chan_frac;
-                        u32 div;
-
                         if (ah->is_clk_25mhz)
                                 div = 75;
                         else
@@ -89,34 +86,40 @@ static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
                         chan_frac = (((freq * 4) % div) * 0x20000) / div;
                         channelSel = (channelSel << 17) | chan_frac;
                 } else if (AR_SREV_9485(ah) || AR_SREV_9565(ah)) {
-                        u32 chan_frac;
-
                         /*
-                         * freq_ref = 40 / (refdiva >> amoderefsel); where refdiva=1 and amoderefsel=0
+                         * freq_ref = 40 / (refdiva >> amoderefsel);
+                         * where refdiva=1 and amoderefsel=0
                          * ndiv = ((chan_mhz * 4) / 3) / freq_ref;
                          * chansel = int(ndiv), chanfrac = (ndiv - chansel) * 0x20000
                          */
                         channelSel = (freq * 4) / 120;
                         chan_frac = (((freq * 4) % 120) * 0x20000) / 120;
                         channelSel = (channelSel << 17) | chan_frac;
-                } else if (AR_SREV_9340(ah) || AR_SREV_9550(ah)) {
+                } else if (AR_SREV_9340(ah)) {
                         if (ah->is_clk_25mhz) {
-                                u32 chan_frac;
-
                                 channelSel = (freq * 2) / 75;
                                 chan_frac = (((freq * 2) % 75) * 0x20000) / 75;
                                 channelSel = (channelSel << 17) | chan_frac;
-                        } else
+                        } else {
                                 channelSel = CHANSEL_2G(freq) >> 1;
-                } else
+                        }
+                } else if (AR_SREV_9550(ah)) {
+                        if (ah->is_clk_25mhz)
+                                div = 75;
+                        else
+                                div = 120;
+
+                        channelSel = (freq * 4) / div;
+                        chan_frac = (((freq * 4) % div) * 0x20000) / div;
+                        channelSel = (channelSel << 17) | chan_frac;
+                } else {
                         channelSel = CHANSEL_2G(freq);
+                }
                 /* Set to 2G mode */
                 bMode = 1;
         } else {
                 if ((AR_SREV_9340(ah) || AR_SREV_9550(ah)) &&
                     ah->is_clk_25mhz) {
-                        u32 chan_frac;
-
                         channelSel = freq / 75;
                         chan_frac = ((freq % 75) * 0x20000) / 75;
                         channelSel = (channelSel << 17) | chan_frac;
@@ -586,32 +589,19 @@ static void ar9003_hw_init_bb(struct ath_hw *ah,
         ath9k_hw_synth_delay(ah, chan, synthDelay);
 }
 
-static void ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx)
+void ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx)
 {
-        switch (rx) {
-        case 0x5:
+        if (ah->caps.tx_chainmask == 5 || ah->caps.rx_chainmask == 5)
                 REG_SET_BIT(ah, AR_PHY_ANALOG_SWAP,
                             AR_PHY_SWAP_ALT_CHAIN);
-        case 0x3:
-        case 0x1:
-        case 0x2:
-        case 0x7:
-                REG_WRITE(ah, AR_PHY_RX_CHAINMASK, rx);
-                REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, rx);
-                break;
-        default:
-                break;
-        }
+
+        REG_WRITE(ah, AR_PHY_RX_CHAINMASK, rx);
+        REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, rx);
 
         if ((ah->caps.hw_caps & ATH9K_HW_CAP_APM) && (tx == 0x7))
-                REG_WRITE(ah, AR_SELFGEN_MASK, 0x3);
-        else
-                REG_WRITE(ah, AR_SELFGEN_MASK, tx);
+                tx = 3;
 
-        if (tx == 0x5) {
-                REG_SET_BIT(ah, AR_PHY_ANALOG_SWAP,
-                            AR_PHY_SWAP_ALT_CHAIN);
-        }
+        REG_WRITE(ah, AR_SELFGEN_MASK, tx);
 }
 
 /*
@@ -1450,6 +1440,67 @@ set_rfmode:
         return 0;
 }
 
+static void ar9003_hw_spectral_scan_config(struct ath_hw *ah,
+                                           struct ath_spec_scan *param)
+{
+        u8 count;
+
+        if (!param->enabled) {
+                REG_CLR_BIT(ah, AR_PHY_SPECTRAL_SCAN,
+                            AR_PHY_SPECTRAL_SCAN_ENABLE);
+                return;
+        }
+
+        REG_SET_BIT(ah, AR_PHY_RADAR_0, AR_PHY_RADAR_0_FFT_ENA);
+        REG_SET_BIT(ah, AR_PHY_SPECTRAL_SCAN, AR_PHY_SPECTRAL_SCAN_ENABLE);
+
+        /* on AR93xx and newer, count = 0 will make the the chip send
+         * spectral samples endlessly. Check if this really was intended,
+         * and fix otherwise.
+         */
+        count = param->count;
+        if (param->endless)
+                count = 0;
+        else if (param->count == 0)
+                count = 1;
+
+        if (param->short_repeat)
+                REG_SET_BIT(ah, AR_PHY_SPECTRAL_SCAN,
+                            AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT);
+        else
+                REG_CLR_BIT(ah, AR_PHY_SPECTRAL_SCAN,
+                            AR_PHY_SPECTRAL_SCAN_SHORT_REPEAT);
+
+        REG_RMW_FIELD(ah, AR_PHY_SPECTRAL_SCAN,
+                      AR_PHY_SPECTRAL_SCAN_COUNT, count);
+        REG_RMW_FIELD(ah, AR_PHY_SPECTRAL_SCAN,
+                      AR_PHY_SPECTRAL_SCAN_PERIOD, param->period);
+        REG_RMW_FIELD(ah, AR_PHY_SPECTRAL_SCAN,
+                      AR_PHY_SPECTRAL_SCAN_FFT_PERIOD, param->fft_period);
+
+        return;
+}
+
+static void ar9003_hw_spectral_scan_trigger(struct ath_hw *ah)
+{
+        /* Activate spectral scan */
+        REG_SET_BIT(ah, AR_PHY_SPECTRAL_SCAN,
+                    AR_PHY_SPECTRAL_SCAN_ACTIVE);
+}
+
+static void ar9003_hw_spectral_scan_wait(struct ath_hw *ah)
+{
+        struct ath_common *common = ath9k_hw_common(ah);
+
+        /* Poll for spectral scan complete */
+        if (!ath9k_hw_wait(ah, AR_PHY_SPECTRAL_SCAN,
+                           AR_PHY_SPECTRAL_SCAN_ACTIVE,
+                           0, AH_WAIT_TIMEOUT)) {
+                ath_err(common, "spectral scan wait failed\n");
+                return;
+        }
+}
+
 void ar9003_hw_attach_phy_ops(struct ath_hw *ah)
 {
         struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
@@ -1483,6 +1534,9 @@ void ar9003_hw_attach_phy_ops(struct ath_hw *ah)
         ops->antdiv_comb_conf_get = ar9003_hw_antdiv_comb_conf_get;
         ops->antdiv_comb_conf_set = ar9003_hw_antdiv_comb_conf_set;
         ops->antctrl_shared_chain_lnadiv = ar9003_hw_antctrl_shared_chain_lnadiv;
+        ops->spectral_scan_config = ar9003_hw_spectral_scan_config;
+        ops->spectral_scan_trigger = ar9003_hw_spectral_scan_trigger;
+        ops->spectral_scan_wait = ar9003_hw_spectral_scan_wait;
 
         ar9003_hw_set_nf_limits(ah);
         ar9003_hw_set_radar_conf(ah);
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.h b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
index 107956298488..e71774196c01 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
@@ -1028,7 +1028,7 @@
 #define AR_PHY_TPC_5_B2          (AR_SM2_BASE + 0x208)
 #define AR_PHY_TPC_6_B2          (AR_SM2_BASE + 0x20c)
 #define AR_PHY_TPC_11_B2         (AR_SM2_BASE + 0x220)
-#define AR_PHY_PDADC_TAB_2       (AR_SM2_BASE + 0x240)
+#define AR_PHY_TPC_19_B2         (AR_SM2_BASE + 0x240)
 #define AR_PHY_TX_IQCAL_STATUS_B2   (AR_SM2_BASE + 0x48c)
 #define AR_PHY_TX_IQCAL_CORR_COEFF_B2(_i)    (AR_SM2_BASE + 0x450 + ((_i) << 2))
 
diff --git a/drivers/net/wireless/ath/ath9k/ar9340_initvals.h b/drivers/net/wireless/ath/ath9k/ar9340_initvals.h
index f69d292bdc02..25db9215985a 100644
--- a/drivers/net/wireless/ath/ath9k/ar9340_initvals.h
+++ b/drivers/net/wireless/ath/ath9k/ar9340_initvals.h
@@ -1172,6 +1172,106 @@ static const u32 ar9340Modes_mixed_ob_db_tx_gain_table_1p0[][5] = {
         {0x00016448, 0x24925666, 0x24925666, 0x8e481266, 0x8e481266},
 };
 
+static const u32 ar9340Modes_low_ob_db_and_spur_tx_gain_table_1p0[][5] = {
+        /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
+        {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03eaac5a, 0x03eaac5a},
+        {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03f330ac, 0x03f330ac},
+        {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03fc3f00, 0x03fc3f00},
+        {0x0000a2e8, 0x00000000, 0x00000000, 0x03ffc000, 0x03ffc000},
+        {0x0000a394, 0x00000444, 0x00000444, 0x00000404, 0x00000404},
+        {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
+        {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000a504, 0x06000003, 0x06000003, 0x02000001, 0x02000001},
+        {0x0000a508, 0x0a000020, 0x0a000020, 0x05000003, 0x05000003},
+        {0x0000a50c, 0x10000023, 0x10000023, 0x0a000005, 0x0a000005},
+        {0x0000a510, 0x16000220, 0x16000220, 0x0e000201, 0x0e000201},
+        {0x0000a514, 0x1c000223, 0x1c000223, 0x11000203, 0x11000203},
+        {0x0000a518, 0x21002220, 0x21002220, 0x14000401, 0x14000401},
+        {0x0000a51c, 0x27002223, 0x27002223, 0x18000403, 0x18000403},
+        {0x0000a520, 0x2b022220, 0x2b022220, 0x1b000602, 0x1b000602},
+        {0x0000a524, 0x2f022222, 0x2f022222, 0x1f000802, 0x1f000802},
+        {0x0000a528, 0x34022225, 0x34022225, 0x21000620, 0x21000620},
+        {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x25000820, 0x25000820},
+        {0x0000a530, 0x3e02222c, 0x3e02222c, 0x29000822, 0x29000822},
+        {0x0000a534, 0x4202242a, 0x4202242a, 0x2d000824, 0x2d000824},
+        {0x0000a538, 0x4702244a, 0x4702244a, 0x30000828, 0x30000828},
+        {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x3400082a, 0x3400082a},
+        {0x0000a540, 0x4e02246c, 0x4e02246c, 0x38000849, 0x38000849},
+        {0x0000a544, 0x5302266c, 0x5302266c, 0x3b000a2c, 0x3b000a2c},
+        {0x0000a548, 0x5702286c, 0x5702286c, 0x3e000e2b, 0x3e000e2b},
+        {0x0000a54c, 0x5c02486b, 0x5c02486b, 0x42000e2d, 0x42000e2d},
+        {0x0000a550, 0x61024a6c, 0x61024a6c, 0x4500124a, 0x4500124a},
+        {0x0000a554, 0x66026a6c, 0x66026a6c, 0x4900124c, 0x4900124c},
+        {0x0000a558, 0x6b026e6c, 0x6b026e6c, 0x4c00126c, 0x4c00126c},
+        {0x0000a55c, 0x7002708c, 0x7002708c, 0x4f00128c, 0x4f00128c},
+        {0x0000a560, 0x7302b08a, 0x7302b08a, 0x52001290, 0x52001290},
+        {0x0000a564, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
+        {0x0000a568, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
+        {0x0000a56c, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
+        {0x0000a570, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
+        {0x0000a574, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
+        {0x0000a578, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
+        {0x0000a57c, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
+        {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000},
+        {0x0000a584, 0x06800003, 0x06800003, 0x02800001, 0x02800001},
+        {0x0000a588, 0x0a800020, 0x0a800020, 0x05800003, 0x05800003},
+        {0x0000a58c, 0x10800023, 0x10800023, 0x0a800005, 0x0a800005},
+        {0x0000a590, 0x16800220, 0x16800220, 0x0e800201, 0x0e800201},
+        {0x0000a594, 0x1c800223, 0x1c800223, 0x11800203, 0x11800203},
+        {0x0000a598, 0x21820220, 0x21820220, 0x14800401, 0x14800401},
+        {0x0000a59c, 0x27820223, 0x27820223, 0x18800403, 0x18800403},
+        {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1b800602, 0x1b800602},
+        {0x0000a5a4, 0x2f822222, 0x2f822222, 0x1f800802, 0x1f800802},
+        {0x0000a5a8, 0x34822225, 0x34822225, 0x21800620, 0x21800620},
+        {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x25800820, 0x25800820},
+        {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x29800822, 0x29800822},
+        {0x0000a5b4, 0x4282242a, 0x4282242a, 0x2d800824, 0x2d800824},
+        {0x0000a5b8, 0x4782244a, 0x4782244a, 0x30800828, 0x30800828},
+        {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x3480082a, 0x3480082a},
+        {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x38800849, 0x38800849},
+        {0x0000a5c4, 0x5382266c, 0x5382266c, 0x3b800a2c, 0x3b800a2c},
+        {0x0000a5c8, 0x5782286c, 0x5782286c, 0x3e800e2b, 0x3e800e2b},
+        {0x0000a5cc, 0x5c84286b, 0x5c84286b, 0x42800e2d, 0x42800e2d},
+        {0x0000a5d0, 0x61842a6c, 0x61842a6c, 0x4580124a, 0x4580124a},
+        {0x0000a5d4, 0x66862a6c, 0x66862a6c, 0x4980124c, 0x4980124c},
+        {0x0000a5d8, 0x6b862e6c, 0x6b862e6c, 0x4c80126c, 0x4c80126c},
+        {0x0000a5dc, 0x7086308c, 0x7086308c, 0x4f80128c, 0x4f80128c},
+        {0x0000a5e0, 0x738a308a, 0x738a308a, 0x52801290, 0x52801290},
+        {0x0000a5e4, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
+        {0x0000a5e8, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
+        {0x0000a5ec, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
+        {0x0000a5f0, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
+        {0x0000a5f4, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
+        {0x0000a5f8, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
+        {0x0000a5fc, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
+        {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000a614, 0x01404000, 0x01404000, 0x01404501, 0x01404501},
+        {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501},
+        {0x0000a61c, 0x02008802, 0x02008802, 0x01404501, 0x01404501},
+        {0x0000a620, 0x0300cc03, 0x0300cc03, 0x03c0cf02, 0x03c0cf02},
+        {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03c0cf03, 0x03c0cf03},
+        {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04011004, 0x04011004},
+        {0x0000a62c, 0x03810c03, 0x03810c03, 0x05419405, 0x05419405},
+        {0x0000a630, 0x03810e04, 0x03810e04, 0x05419506, 0x05419506},
+        {0x0000a634, 0x03810e04, 0x03810e04, 0x05419506, 0x05419506},
+        {0x0000a638, 0x03810e04, 0x03810e04, 0x05419506, 0x05419506},
+        {0x0000a63c, 0x03810e04, 0x03810e04, 0x05419506, 0x05419506},
+        {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03eaac5a, 0x03eaac5a},
+        {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03f330ac, 0x03f330ac},
+        {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03fc3f00, 0x03fc3f00},
+        {0x0000b2e8, 0x00000000, 0x00000000, 0x03ffc000, 0x03ffc000},
+        {0x00016044, 0x022492db, 0x022492db, 0x022492db, 0x022492db},
+        {0x00016048, 0x24925666, 0x24925666, 0x24925266, 0x24925266},
+        {0x00016280, 0x01000015, 0x01000015, 0x01001015, 0x01001015},
+        {0x00016288, 0xf0318000, 0xf0318000, 0xf0318000, 0xf0318000},
+        {0x00016444, 0x022492db, 0x022492db, 0x022492db, 0x022492db},
+        {0x00016448, 0x24925666, 0x24925666, 0x24925266, 0x24925266},
+};
+
 static const u32 ar9340_1p0_mac_core[][2] = {
         /* Addr      allmodes  */
         {0x00000008, 0x00000000},
diff --git a/drivers/net/wireless/ath/ath9k/ar9485_initvals.h b/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
index a3710f3bb90c..712f415b8c08 100644
--- a/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
+++ b/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
@@ -260,6 +260,79 @@ static const u32 ar9485Modes_high_power_tx_gain_1_1[][5] = {
         {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
 };
 
+static const u32 ar9485Modes_green_ob_db_tx_gain_1_1[][5] = {
+        /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
+        {0x000098bc, 0x00000003, 0x00000003, 0x00000003, 0x00000003},
+        {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
+        {0x0000a458, 0x80000000, 0x80000000, 0x80000000, 0x80000000},
+        {0x0000a500, 0x00022200, 0x00022200, 0x00000006, 0x00000006},
+        {0x0000a504, 0x05062002, 0x05062002, 0x03000201, 0x03000201},
+        {0x0000a508, 0x0c002e00, 0x0c002e00, 0x06000203, 0x06000203},
+        {0x0000a50c, 0x11062202, 0x11062202, 0x0a000401, 0x0a000401},
+        {0x0000a510, 0x17022e00, 0x17022e00, 0x0e000403, 0x0e000403},
+        {0x0000a514, 0x1d000ec2, 0x1d000ec2, 0x12000405, 0x12000405},
+        {0x0000a518, 0x25020ec0, 0x25020ec0, 0x15000604, 0x15000604},
+        {0x0000a51c, 0x2b020ec3, 0x2b020ec3, 0x18000605, 0x18000605},
+        {0x0000a520, 0x2f001f04, 0x2f001f04, 0x1c000a04, 0x1c000a04},
+        {0x0000a524, 0x35001fc4, 0x35001fc4, 0x21000a06, 0x21000a06},
+        {0x0000a528, 0x3c022f04, 0x3c022f04, 0x29000a24, 0x29000a24},
+        {0x0000a52c, 0x41023e85, 0x41023e85, 0x2f000e21, 0x2f000e21},
+        {0x0000a530, 0x48023ec6, 0x48023ec6, 0x31000e20, 0x31000e20},
+        {0x0000a534, 0x4d023f01, 0x4d023f01, 0x33000e20, 0x33000e20},
+        {0x0000a538, 0x53023f4b, 0x53023f4b, 0x43000e62, 0x43000e62},
+        {0x0000a53c, 0x5a027f09, 0x5a027f09, 0x45000e63, 0x45000e63},
+        {0x0000a540, 0x5f027fc9, 0x5f027fc9, 0x49000e65, 0x49000e65},
+        {0x0000a544, 0x6502feca, 0x6502feca, 0x4b000e66, 0x4b000e66},
+        {0x0000a548, 0x6b02ff4a, 0x6b02ff4a, 0x4d001645, 0x4d001645},
+        {0x0000a54c, 0x7203feca, 0x7203feca, 0x51001865, 0x51001865},
+        {0x0000a550, 0x7703ff0b, 0x7703ff0b, 0x55001a86, 0x55001a86},
+        {0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x57001ce9, 0x57001ce9},
+        {0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x5a001ceb, 0x5a001ceb},
+        {0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a560, 0x900fff0b, 0x900fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a564, 0x960fffcb, 0x960fffcb, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
+        {0x0000b500, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b504, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b508, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b50c, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b510, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b514, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b518, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b51c, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b520, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b524, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b528, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b52c, 0x0000002a, 0x0000002a, 0x0000002a, 0x0000002a},
+        {0x0000b530, 0x0000003a, 0x0000003a, 0x0000003a, 0x0000003a},
+        {0x0000b534, 0x0000004a, 0x0000004a, 0x0000004a, 0x0000004a},
+        {0x0000b538, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b53c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b540, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b544, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b548, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b54c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b550, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b554, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b558, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b55c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b560, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b564, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b568, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b56c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b570, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b574, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b578, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b57c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x00016044, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db},
+        {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
+};
+
 static const u32 ar9485Modes_high_ob_db_tx_gain_1_1[][5] = {
         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
         {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
@@ -450,6 +523,79 @@ static const u32 ar9485Modes_low_ob_db_tx_gain_1_1[][5] = {
 
 #define ar9485_modes_lowest_ob_db_tx_gain_1_1 ar9485Modes_low_ob_db_tx_gain_1_1
 
+static const u32 ar9485Modes_green_spur_ob_db_tx_gain_1_1[][5] = {
+        /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
+        {0x000098bc, 0x00000003, 0x00000003, 0x00000003, 0x00000003},
+        {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
+        {0x0000a458, 0x80000000, 0x80000000, 0x80000000, 0x80000000},
+        {0x0000a500, 0x00022200, 0x00022200, 0x00000006, 0x00000006},
+        {0x0000a504, 0x05062002, 0x05062002, 0x03000201, 0x03000201},
+        {0x0000a508, 0x0c002e00, 0x0c002e00, 0x07000203, 0x07000203},
+        {0x0000a50c, 0x11062202, 0x11062202, 0x0a000401, 0x0a000401},
+        {0x0000a510, 0x17022e00, 0x17022e00, 0x0e000403, 0x0e000403},
+        {0x0000a514, 0x1d000ec2, 0x1d000ec2, 0x12000405, 0x12000405},
+        {0x0000a518, 0x25020ec0, 0x25020ec0, 0x14000406, 0x14000406},
+        {0x0000a51c, 0x2b020ec3, 0x2b020ec3, 0x1800040a, 0x1800040a},
+        {0x0000a520, 0x2f001f04, 0x2f001f04, 0x1c000460, 0x1c000460},
+        {0x0000a524, 0x35001fc4, 0x35001fc4, 0x22000463, 0x22000463},
+        {0x0000a528, 0x3c022f04, 0x3c022f04, 0x26000465, 0x26000465},
+        {0x0000a52c, 0x41023e85, 0x41023e85, 0x2e0006e0, 0x2e0006e0},
+        {0x0000a530, 0x48023ec6, 0x48023ec6, 0x310006e0, 0x310006e0},
+        {0x0000a534, 0x4d023f01, 0x4d023f01, 0x330006e0, 0x330006e0},
+        {0x0000a538, 0x53023f4b, 0x53023f4b, 0x3e0008e3, 0x3e0008e3},
+        {0x0000a53c, 0x5a027f09, 0x5a027f09, 0x410008e5, 0x410008e5},
+        {0x0000a540, 0x5f027fc9, 0x5f027fc9, 0x430008e6, 0x430008e6},
+        {0x0000a544, 0x6502feca, 0x6502feca, 0x4a0008ec, 0x4a0008ec},
+        {0x0000a548, 0x6b02ff4a, 0x6b02ff4a, 0x4e0008f1, 0x4e0008f1},
+        {0x0000a54c, 0x7203feca, 0x7203feca, 0x520008f3, 0x520008f3},
+        {0x0000a550, 0x7703ff0b, 0x7703ff0b, 0x54000eed, 0x54000eed},
+        {0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x58000ef1, 0x58000ef1},
+        {0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x5c000ef3, 0x5c000ef3},
+        {0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x60000ef5, 0x60000ef5},
+        {0x0000a560, 0x900fff0b, 0x900fff0b, 0x62000ef6, 0x62000ef6},
+        {0x0000a564, 0x960fffcb, 0x960fffcb, 0x62000ef6, 0x62000ef6},
+        {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
+        {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
+        {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
+        {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
+        {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
+        {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
+        {0x0000b500, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b504, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b508, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b50c, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b510, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b514, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b518, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b51c, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b520, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b524, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b528, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
+        {0x0000b52c, 0x0000002a, 0x0000002a, 0x0000002a, 0x0000002a},
+        {0x0000b530, 0x0000003a, 0x0000003a, 0x0000003a, 0x0000003a},
+        {0x0000b534, 0x0000004a, 0x0000004a, 0x0000004a, 0x0000004a},
+        {0x0000b538, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b53c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b540, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b544, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b548, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b54c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b550, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b554, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b558, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b55c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b560, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b564, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b568, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b56c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b570, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b574, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b578, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x0000b57c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
+        {0x00016044, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db},
+        {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
+};
+
 static const u32 ar9485_1_1[][2] = {
         /* Addr      allmodes  */
         {0x0000a580, 0x00000000},
diff --git a/drivers/net/wireless/ath/ath9k/ar955x_1p0_initvals.h b/drivers/net/wireless/ath/ath9k/ar955x_1p0_initvals.h
index df97f21c52dc..ccc5b6c99add 100644
--- a/drivers/net/wireless/ath/ath9k/ar955x_1p0_initvals.h
+++ b/drivers/net/wireless/ath/ath9k/ar955x_1p0_initvals.h
@@ -23,16 +23,16 @@
 static const u32 ar955x_1p0_radio_postamble[][5] = {
         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
         {0x00016098, 0xd2dd5554, 0xd2dd5554, 0xd28b3330, 0xd28b3330},
-        {0x0001609c, 0x0a566f3a, 0x0a566f3a, 0x06345f2a, 0x06345f2a},
-        {0x000160ac, 0xa4647c00, 0xa4647c00, 0xa4646800, 0xa4646800},
-        {0x000160b0, 0x01885f52, 0x01885f52, 0x04accf3a, 0x04accf3a},
-        {0x00016104, 0xb7a00001, 0xb7a00001, 0xb7a00001, 0xb7a00001},
+        {0x0001609c, 0x0a566f3a, 0x0a566f3a, 0x0a566f3a, 0x0a566f3a},
+        {0x000160ac, 0xa4647c00, 0xa4647c00, 0x24647c00, 0x24647c00},
+        {0x000160b0, 0x01885f52, 0x01885f52, 0x01885f52, 0x01885f52},
+        {0x00016104, 0xb7a00000, 0xb7a00000, 0xb7a00001, 0xb7a00001},
         {0x0001610c, 0xc0000000, 0xc0000000, 0xc0000000, 0xc0000000},
         {0x00016140, 0x10804008, 0x10804008, 0x10804008, 0x10804008},
-        {0x00016504, 0xb7a00001, 0xb7a00001, 0xb7a00001, 0xb7a00001},
+        {0x00016504, 0xb7a00000, 0xb7a00000, 0xb7a00001, 0xb7a00001},
         {0x0001650c, 0xc0000000, 0xc0000000, 0xc0000000, 0xc0000000},
         {0x00016540, 0x10804008, 0x10804008, 0x10804008, 0x10804008},
-        {0x00016904, 0xb7a00001, 0xb7a00001, 0xb7a00001, 0xb7a00001},
+        {0x00016904, 0xb7a00000, 0xb7a00000, 0xb7a00001, 0xb7a00001},
         {0x0001690c, 0xc0000000, 0xc0000000, 0xc0000000, 0xc0000000},
         {0x00016940, 0x10804008, 0x10804008, 0x10804008, 0x10804008},
 };
@@ -69,15 +69,15 @@ static const u32 ar955x_1p0_baseband_postamble[][5] = {
         {0x0000a204, 0x005c0ec0, 0x005c0ec4, 0x005c0ec4, 0x005c0ec0},
         {0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004},
         {0x0000a22c, 0x07e26a2f, 0x07e26a2f, 0x01026a2f, 0x01026a2f},
-        {0x0000a230, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b},
+        {0x0000a230, 0x0000400a, 0x00004014, 0x00004016, 0x0000400b},
         {0x0000a234, 0x00000fff, 0x10000fff, 0x10000fff, 0x00000fff},
         {0x0000a238, 0xffb01018, 0xffb01018, 0xffb01018, 0xffb01018},
         {0x0000a250, 0x00000000, 0x00000000, 0x00000210, 0x00000108},
         {0x0000a254, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898},
         {0x0000a258, 0x02020002, 0x02020002, 0x02020002, 0x02020002},
-        {0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e},
+        {0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01010e0e, 0x01010e0e},
         {0x0000a260, 0x0a021501, 0x0a021501, 0x3a021501, 0x3a021501},
-        {0x0000a264, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
+        {0x0000a264, 0x00000e0e, 0x00000e0e, 0x01000e0e, 0x01000e0e},
         {0x0000a280, 0x00000007, 0x00000007, 0x0000000b, 0x0000000b},
         {0x0000a284, 0x00000000, 0x00000000, 0x00000010, 0x00000010},
         {0x0000a288, 0x00000110, 0x00000110, 0x00000110, 0x00000110},
@@ -125,7 +125,7 @@ static const u32 ar955x_1p0_radio_core[][2] = {
         {0x00016094, 0x00000000},
         {0x000160a0, 0x0a108ffe},
         {0x000160a4, 0x812fc370},
-        {0x000160a8, 0x423c8000},
+        {0x000160a8, 0x423c8100},
         {0x000160b4, 0x92480080},
         {0x000160c0, 0x006db6d0},
         {0x000160c4, 0x6db6db60},
@@ -134,7 +134,7 @@ static const u32 ar955x_1p0_radio_core[][2] = {
         {0x00016100, 0x11999601},
         {0x00016108, 0x00080010},
         {0x00016144, 0x02084080},
-        {0x00016148, 0x000080c0},
+        {0x00016148, 0x00008040},
         {0x00016280, 0x01800804},
         {0x00016284, 0x00038dc5},
         {0x00016288, 0x00000000},
@@ -178,7 +178,7 @@ static const u32 ar955x_1p0_radio_core[][2] = {
         {0x00016500, 0x11999601},
         {0x00016508, 0x00080010},
         {0x00016544, 0x02084080},
-        {0x00016548, 0x000080c0},
+        {0x00016548, 0x00008040},
         {0x00016780, 0x00000000},
         {0x00016784, 0x00000000},
         {0x00016788, 0x00400705},
@@ -218,7 +218,7 @@ static const u32 ar955x_1p0_radio_core[][2] = {
         {0x00016900, 0x11999601},
         {0x00016908, 0x00080010},
         {0x00016944, 0x02084080},
-        {0x00016948, 0x000080c0},
+        {0x00016948, 0x00008040},
         {0x00016b80, 0x00000000},
         {0x00016b84, 0x00000000},
         {0x00016b88, 0x00400705},
@@ -245,9 +245,9 @@ static const u32 ar955x_1p0_radio_core[][2] = {
 
 static const u32 ar955x_1p0_modes_xpa_tx_gain_table[][9] = {
         /* Addr      5G_HT20_L   5G_HT40_L   5G_HT20_M   5G_HT40_M   5G_HT20_H   5G_HT40_H   2G_HT40     2G_HT20  */
-        {0x0000a2dc, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xfffd5aaa, 0xfffd5aaa},
-        {0x0000a2e0, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xfffe9ccc, 0xfffe9ccc},
-        {0x0000a2e4, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xffffe0f0, 0xffffe0f0},
+        {0x0000a2dc, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xfffd5aaa, 0xfffd5aaa},
+        {0x0000a2e0, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffe9ccc, 0xfffe9ccc},
+        {0x0000a2e4, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffffe0f0, 0xffffe0f0},
         {0x0000a2e8, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xfffcff00, 0xfffcff00},
         {0x0000a410, 0x000050de, 0x000050de, 0x000050de, 0x000050de, 0x000050de, 0x000050de, 0x000050da, 0x000050da},
         {0x0000a500, 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000000, 0x00000000},
@@ -256,63 +256,63 @@ static const u32 ar955x_1p0_modes_xpa_tx_gain_table[][9] = {
         {0x0000a50c, 0x0c00000b, 0x0c00000b, 0x0c00000b, 0x0c00000b, 0x0c00000b, 0x0c00000b, 0x0c000006, 0x0c000006},
         {0x0000a510, 0x1000000d, 0x1000000d, 0x1000000d, 0x1000000d, 0x1000000d, 0x1000000d, 0x0f00000a, 0x0f00000a},
         {0x0000a514, 0x14000011, 0x14000011, 0x14000011, 0x14000011, 0x14000011, 0x14000011, 0x1300000c, 0x1300000c},
-        {0x0000a518, 0x19004008, 0x19004008, 0x19004008, 0x19004008, 0x18004008, 0x18004008, 0x1700000e, 0x1700000e},
-        {0x0000a51c, 0x1d00400a, 0x1d00400a, 0x1d00400a, 0x1d00400a, 0x1c00400a, 0x1c00400a, 0x1b000064, 0x1b000064},
-        {0x0000a520, 0x230020a2, 0x230020a2, 0x210020a2, 0x210020a2, 0x200020a2, 0x200020a2, 0x1f000242, 0x1f000242},
-        {0x0000a524, 0x2500006e, 0x2500006e, 0x2500006e, 0x2500006e, 0x2400006e, 0x2400006e, 0x23000229, 0x23000229},
-        {0x0000a528, 0x29022221, 0x29022221, 0x28022221, 0x28022221, 0x27022221, 0x27022221, 0x270002a2, 0x270002a2},
-        {0x0000a52c, 0x2d00062a, 0x2d00062a, 0x2c00062a, 0x2c00062a, 0x2a00062a, 0x2a00062a, 0x2c001203, 0x2c001203},
-        {0x0000a530, 0x340220a5, 0x340220a5, 0x320220a5, 0x320220a5, 0x2f0220a5, 0x2f0220a5, 0x30001803, 0x30001803},
-        {0x0000a534, 0x380022c5, 0x380022c5, 0x350022c5, 0x350022c5, 0x320022c5, 0x320022c5, 0x33000881, 0x33000881},
-        {0x0000a538, 0x3b002486, 0x3b002486, 0x39002486, 0x39002486, 0x36002486, 0x36002486, 0x38001809, 0x38001809},
-        {0x0000a53c, 0x3f00248a, 0x3f00248a, 0x3d00248a, 0x3d00248a, 0x3a00248a, 0x3a00248a, 0x3a000814, 0x3a000814},
-        {0x0000a540, 0x4202242c, 0x4202242c, 0x4102242c, 0x4102242c, 0x3f02242c, 0x3f02242c, 0x3f001a0c, 0x3f001a0c},
-        {0x0000a544, 0x490044c6, 0x490044c6, 0x460044c6, 0x460044c6, 0x420044c6, 0x420044c6, 0x43001a0e, 0x43001a0e},
-        {0x0000a548, 0x4d024485, 0x4d024485, 0x4a024485, 0x4a024485, 0x46024485, 0x46024485, 0x46001812, 0x46001812},
-        {0x0000a54c, 0x51044483, 0x51044483, 0x4e044483, 0x4e044483, 0x4a044483, 0x4a044483, 0x49001884, 0x49001884},
-        {0x0000a550, 0x5404a40c, 0x5404a40c, 0x5204a40c, 0x5204a40c, 0x4d04a40c, 0x4d04a40c, 0x4d001e84, 0x4d001e84},
-        {0x0000a554, 0x57024632, 0x57024632, 0x55024632, 0x55024632, 0x52024632, 0x52024632, 0x50001e69, 0x50001e69},
-        {0x0000a558, 0x5c00a634, 0x5c00a634, 0x5900a634, 0x5900a634, 0x5600a634, 0x5600a634, 0x550006f4, 0x550006f4},
-        {0x0000a55c, 0x5f026832, 0x5f026832, 0x5d026832, 0x5d026832, 0x5a026832, 0x5a026832, 0x59000ad3, 0x59000ad3},
-        {0x0000a560, 0x6602b012, 0x6602b012, 0x6202b012, 0x6202b012, 0x5d02b012, 0x5d02b012, 0x5e000ad5, 0x5e000ad5},
-        {0x0000a564, 0x6e02d0e1, 0x6e02d0e1, 0x6802d0e1, 0x6802d0e1, 0x6002d0e1, 0x6002d0e1, 0x61001ced, 0x61001ced},
-        {0x0000a568, 0x7202b4c4, 0x7202b4c4, 0x6c02b4c4, 0x6c02b4c4, 0x6502b4c4, 0x6502b4c4, 0x660018d4, 0x660018d4},
-        {0x0000a56c, 0x75007894, 0x75007894, 0x70007894, 0x70007894, 0x6b007894, 0x6b007894, 0x660018d4, 0x660018d4},
-        {0x0000a570, 0x7b025c74, 0x7b025c74, 0x75025c74, 0x75025c74, 0x70025c74, 0x70025c74, 0x660018d4, 0x660018d4},
-        {0x0000a574, 0x8300bcb5, 0x8300bcb5, 0x7a00bcb5, 0x7a00bcb5, 0x7600bcb5, 0x7600bcb5, 0x660018d4, 0x660018d4},
-        {0x0000a578, 0x8a04dc74, 0x8a04dc74, 0x7f04dc74, 0x7f04dc74, 0x7c04dc74, 0x7c04dc74, 0x660018d4, 0x660018d4},
-        {0x0000a57c, 0x8a04dc74, 0x8a04dc74, 0x7f04dc74, 0x7f04dc74, 0x7c04dc74, 0x7c04dc74, 0x660018d4, 0x660018d4},
+        {0x0000a518, 0x1700002b, 0x1700002b, 0x1700002b, 0x1700002b, 0x1600002b, 0x1600002b, 0x1700000e, 0x1700000e},
+        {0x0000a51c, 0x1b00002d, 0x1b00002d, 0x1b00002d, 0x1b00002d, 0x1a00002d, 0x1a00002d, 0x1b000064, 0x1b000064},
+        {0x0000a520, 0x20000031, 0x20000031, 0x1f000031, 0x1f000031, 0x1e000031, 0x1e000031, 0x1f000242, 0x1f000242},
+        {0x0000a524, 0x24000051, 0x24000051, 0x23000051, 0x23000051, 0x23000051, 0x23000051, 0x23000229, 0x23000229},
+        {0x0000a528, 0x27000071, 0x27000071, 0x27000071, 0x27000071, 0x26000071, 0x26000071, 0x270002a2, 0x270002a2},
+        {0x0000a52c, 0x2b000092, 0x2b000092, 0x2b000092, 0x2b000092, 0x2b000092, 0x2b000092, 0x2c001203, 0x2c001203},
+        {0x0000a530, 0x3000028c, 0x3000028c, 0x2f00028c, 0x2f00028c, 0x2e00028c, 0x2e00028c, 0x30001803, 0x30001803},
+        {0x0000a534, 0x34000290, 0x34000290, 0x33000290, 0x33000290, 0x32000290, 0x32000290, 0x33000881, 0x33000881},
+        {0x0000a538, 0x37000292, 0x37000292, 0x36000292, 0x36000292, 0x35000292, 0x35000292, 0x38001809, 0x38001809},
+        {0x0000a53c, 0x3b02028d, 0x3b02028d, 0x3a02028d, 0x3a02028d, 0x3902028d, 0x3902028d, 0x3a000814, 0x3a000814},
+        {0x0000a540, 0x3f020291, 0x3f020291, 0x3e020291, 0x3e020291, 0x3d020291, 0x3d020291, 0x3f001a0c, 0x3f001a0c},
+        {0x0000a544, 0x44020490, 0x44020490, 0x43020490, 0x43020490, 0x42020490, 0x42020490, 0x43001a0e, 0x43001a0e},
+        {0x0000a548, 0x48020492, 0x48020492, 0x47020492, 0x47020492, 0x46020492, 0x46020492, 0x46001812, 0x46001812},
+        {0x0000a54c, 0x4c020692, 0x4c020692, 0x4b020692, 0x4b020692, 0x4a020692, 0x4a020692, 0x49001884, 0x49001884},
+        {0x0000a550, 0x50020892, 0x50020892, 0x4f020892, 0x4f020892, 0x4e020892, 0x4e020892, 0x4d001e84, 0x4d001e84},
+        {0x0000a554, 0x53040891, 0x53040891, 0x53040891, 0x53040891, 0x52040891, 0x52040891, 0x50001e69, 0x50001e69},
+        {0x0000a558, 0x58040893, 0x58040893, 0x57040893, 0x57040893, 0x56040893, 0x56040893, 0x550006f4, 0x550006f4},
+        {0x0000a55c, 0x5c0408b4, 0x5c0408b4, 0x5a0408b4, 0x5a0408b4, 0x5a0408b4, 0x5a0408b4, 0x59000ad3, 0x59000ad3},
+        {0x0000a560, 0x610408b6, 0x610408b6, 0x5e0408b6, 0x5e0408b6, 0x5e0408b6, 0x5e0408b6, 0x5e000ad5, 0x5e000ad5},
+        {0x0000a564, 0x670408f6, 0x670408f6, 0x620408f6, 0x620408f6, 0x620408f6, 0x620408f6, 0x61001ced, 0x61001ced},
+        {0x0000a568, 0x6a040cf6, 0x6a040cf6, 0x66040cf6, 0x66040cf6, 0x66040cf6, 0x66040cf6, 0x660018d4, 0x660018d4},
+        {0x0000a56c, 0x6d040d76, 0x6d040d76, 0x6a040d76, 0x6a040d76, 0x6a040d76, 0x6a040d76, 0x660018d4, 0x660018d4},
+        {0x0000a570, 0x70060db6, 0x70060db6, 0x6e060db6, 0x6e060db6, 0x6e060db6, 0x6e060db6, 0x660018d4, 0x660018d4},
+        {0x0000a574, 0x730a0df6, 0x730a0df6, 0x720a0df6, 0x720a0df6, 0x720a0df6, 0x720a0df6, 0x660018d4, 0x660018d4},
+        {0x0000a578, 0x770a13f6, 0x770a13f6, 0x760a13f6, 0x760a13f6, 0x760a13f6, 0x760a13f6, 0x660018d4, 0x660018d4},
+        {0x0000a57c, 0x770a13f6, 0x770a13f6, 0x760a13f6, 0x760a13f6, 0x760a13f6, 0x760a13f6, 0x660018d4, 0x660018d4},
         {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
         {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
         {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
-        {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x03804000, 0x03804000},
-        {0x0000a610, 0x04c08c01, 0x04c08c01, 0x04808b01, 0x04808b01, 0x04808a01, 0x04808a01, 0x0300ca02, 0x0300ca02},
-        {0x0000a614, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00000e04, 0x00000e04},
-        {0x0000a618, 0x04010c01, 0x04010c01, 0x03c10b01, 0x03c10b01, 0x03810a01, 0x03810a01, 0x03014000, 0x03014000},
-        {0x0000a61c, 0x03814e05, 0x03814e05, 0x03414d05, 0x03414d05, 0x03414d05, 0x03414d05, 0x00000000, 0x00000000},
-        {0x0000a620, 0x04010303, 0x04010303, 0x03c10303, 0x03c10303, 0x03810303, 0x03810303, 0x00000000, 0x00000000},
-        {0x0000a624, 0x03814e05, 0x03814e05, 0x03414d05, 0x03414d05, 0x03414d05, 0x03414d05, 0x03014000, 0x03014000},
-        {0x0000a628, 0x00c0c000, 0x00c0c000, 0x00c0c000, 0x00c0c000, 0x00c0c000, 0x00c0c000, 0x03804c05, 0x03804c05},
-        {0x0000a62c, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x0701de06, 0x0701de06},
-        {0x0000a630, 0x03418000, 0x03418000, 0x03018000, 0x03018000, 0x02c18000, 0x02c18000, 0x07819c07, 0x07819c07},
-        {0x0000a634, 0x03815004, 0x03815004, 0x03414f04, 0x03414f04, 0x03414e04, 0x03414e04, 0x0701dc07, 0x0701dc07},
-        {0x0000a638, 0x03005302, 0x03005302, 0x02c05202, 0x02c05202, 0x02805202, 0x02805202, 0x0701dc07, 0x0701dc07},
-        {0x0000a63c, 0x04c09302, 0x04c09302, 0x04809202, 0x04809202, 0x04809202, 0x04809202, 0x0701dc07, 0x0701dc07},
-        {0x0000b2dc, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xfffd5aaa, 0xfffd5aaa},
-        {0x0000b2e0, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xfffe9ccc, 0xfffe9ccc},
-        {0x0000b2e4, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xffffe0f0, 0xffffe0f0},
+        {0x0000a60c, 0x02c04b01, 0x02c04b01, 0x02c04b01, 0x02c04b01, 0x02c04b01, 0x02c04b01, 0x03804000, 0x03804000},
+        {0x0000a610, 0x04008b01, 0x04008b01, 0x04008b01, 0x04008b01, 0x03c08b01, 0x03c08b01, 0x0300ca02, 0x0300ca02},
+        {0x0000a614, 0x05811403, 0x05811403, 0x05411303, 0x05411303, 0x05411303, 0x05411303, 0x00000e04, 0x00000e04},
+        {0x0000a618, 0x05811604, 0x05811604, 0x05411504, 0x05411504, 0x05411504, 0x05411504, 0x03014000, 0x03014000},
+        {0x0000a61c, 0x05811604, 0x05811604, 0x05411504, 0x05411504, 0x05411504, 0x05411504, 0x00000000, 0x00000000},
+        {0x0000a620, 0x05811604, 0x05811604, 0x05411504, 0x05411504, 0x05411504, 0x05411504, 0x00000000, 0x00000000},
+        {0x0000a624, 0x05811604, 0x05811604, 0x05411504, 0x05411504, 0x05411504, 0x05411504, 0x03014000, 0x03014000},
+        {0x0000a628, 0x05811604, 0x05811604, 0x05411504, 0x05411504, 0x05411504, 0x05411504, 0x03804c05, 0x03804c05},
+        {0x0000a62c, 0x06815604, 0x06815604, 0x06415504, 0x06415504, 0x06015504, 0x06015504, 0x0701de06, 0x0701de06},
+        {0x0000a630, 0x07819a05, 0x07819a05, 0x07419905, 0x07419905, 0x07019805, 0x07019805, 0x07819c07, 0x07819c07},
+        {0x0000a634, 0x07819e06, 0x07819e06, 0x07419d06, 0x07419d06, 0x07019c06, 0x07019c06, 0x0701dc07, 0x0701dc07},
+        {0x0000a638, 0x07819e06, 0x07819e06, 0x07419d06, 0x07419d06, 0x07019c06, 0x07019c06, 0x0701dc07, 0x0701dc07},
+        {0x0000a63c, 0x07819e06, 0x07819e06, 0x07419d06, 0x07419d06, 0x07019c06, 0x07019c06, 0x0701dc07, 0x0701dc07},
+        {0x0000b2dc, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xfffd5aaa, 0xfffd5aaa},
+        {0x0000b2e0, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffe9ccc, 0xfffe9ccc},
+        {0x0000b2e4, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffffe0f0, 0xffffe0f0},
         {0x0000b2e8, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xfffcff00, 0xfffcff00},
-        {0x0000c2dc, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xfffd5aaa, 0xfffd5aaa},
-        {0x0000c2e0, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xfffe9ccc, 0xfffe9ccc},
-        {0x0000c2e4, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xffffe0f0, 0xffffe0f0},
+        {0x0000c2dc, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xfffd5aaa, 0xfffd5aaa},
+        {0x0000c2e0, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffe9ccc, 0xfffe9ccc},
+        {0x0000c2e4, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffffe0f0, 0xffffe0f0},
         {0x0000c2e8, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xfffcff00, 0xfffcff00},
         {0x00016044, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x010002d4, 0x010002d4},
-        {0x00016048, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x66482401, 0x66482401},
+        {0x00016048, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401},
         {0x00016280, 0x01801e84, 0x01801e84, 0x01801e84, 0x01801e84, 0x01801e84, 0x01801e84, 0x01808e84, 0x01808e84},
         {0x00016444, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x010002d4, 0x010002d4},
-        {0x00016448, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x66482401, 0x66482401},
+        {0x00016448, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401},
         {0x00016844, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x010002d4, 0x010002d4},
-        {0x00016848, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x66482401, 0x66482401},
+        {0x00016848, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401},
 };
 
 static const u32 ar955x_1p0_mac_core[][2] = {
@@ -846,7 +846,7 @@ static const u32 ar955x_1p0_baseband_core[][2] = {
         {0x0000a44c, 0x00000001},
         {0x0000a450, 0x00010000},
         {0x0000a458, 0x00000000},
-        {0x0000a644, 0x3fad9d74},
+        {0x0000a644, 0xbfad9d74},
         {0x0000a648, 0x0048060a},
         {0x0000a64c, 0x00003c37},
         {0x0000a670, 0x03020100},
@@ -1277,7 +1277,7 @@ static const u32 ar955x_1p0_modes_fast_clock[][3] = {
         {0x0000801c, 0x148ec02b, 0x148ec057},
         {0x00008318, 0x000044c0, 0x00008980},
         {0x00009e00, 0x0372131c, 0x0372131c},
-        {0x0000a230, 0x0000000b, 0x00000016},
+        {0x0000a230, 0x0000400b, 0x00004016},
         {0x0000a254, 0x00000898, 0x00001130},
 };
 
diff --git a/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h b/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h
index 6e1915aee712..28fd99203f64 100644
--- a/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h
+++ b/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h
@@ -685,6 +685,82 @@ static const u32 ar9580_1p0_mixed_ob_db_tx_gain_table[][5] = {
 
 #define ar9580_1p0_high_ob_db_tx_gain_table ar9300Modes_high_ob_db_tx_gain_table_2p2
 
+#define ar9580_1p0_type5_tx_gain_table ar9300Modes_type5_tx_gain_table_2p2
+
+static const u32 ar9580_1p0_type6_tx_gain_table[][5] = {
+        /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
+        {0x0000a2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
+        {0x0000a2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
+        {0x0000a2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
+        {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+        {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
+        {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
+        {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
+        {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
+        {0x0000a510, 0x15000028, 0x15000028, 0x0f000202, 0x0f000202},
+        {0x0000a514, 0x1b00002b, 0x1b00002b, 0x12000400, 0x12000400},
+        {0x0000a518, 0x1f020028, 0x1f020028, 0x16000402, 0x16000402},
+        {0x0000a51c, 0x2502002b, 0x2502002b, 0x19000404, 0x19000404},
+        {0x0000a520, 0x2a04002a, 0x2a04002a, 0x1c000603, 0x1c000603},
+        {0x0000a524, 0x2e06002a, 0x2e06002a, 0x21000a02, 0x21000a02},
+        {0x0000a528, 0x3302202d, 0x3302202d, 0x25000a04, 0x25000a04},
+        {0x0000a52c, 0x3804202c, 0x3804202c, 0x28000a20, 0x28000a20},
+        {0x0000a530, 0x3c06202c, 0x3c06202c, 0x2c000e20, 0x2c000e20},
+        {0x0000a534, 0x4108202d, 0x4108202d, 0x30000e22, 0x30000e22},
+        {0x0000a538, 0x4506402d, 0x4506402d, 0x34000e24, 0x34000e24},
+        {0x0000a53c, 0x4906222d, 0x4906222d, 0x38001640, 0x38001640},
+        {0x0000a540, 0x4d062231, 0x4d062231, 0x3c001660, 0x3c001660},
+        {0x0000a544, 0x50082231, 0x50082231, 0x3f001861, 0x3f001861},
+        {0x0000a548, 0x5608422e, 0x5608422e, 0x43001a81, 0x43001a81},
+        {0x0000a54c, 0x5e08442e, 0x5e08442e, 0x47001a83, 0x47001a83},
+        {0x0000a550, 0x620a4431, 0x620a4431, 0x4a001c84, 0x4a001c84},
+        {0x0000a554, 0x640a4432, 0x640a4432, 0x4e001ce3, 0x4e001ce3},
+        {0x0000a558, 0x680a4434, 0x680a4434, 0x52001ce5, 0x52001ce5},
+        {0x0000a55c, 0x6c0a6434, 0x6c0a6434, 0x56001ce9, 0x56001ce9},
+        {0x0000a560, 0x6f0a6633, 0x6f0a6633, 0x5a001ceb, 0x5a001ceb},
+        {0x0000a564, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
+        {0x0000a568, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
+        {0x0000a56c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
+        {0x0000a570, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
+        {0x0000a574, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
+        {0x0000a578, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
+        {0x0000a57c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
+        {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+        {0x0000a608, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
+        {0x0000a60c, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
+        {0x0000a610, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
+        {0x0000a614, 0x01804601, 0x01804601, 0x01404000, 0x01404000},
+        {0x0000a618, 0x01804601, 0x01804601, 0x01404501, 0x01404501},
+        {0x0000a61c, 0x01804601, 0x01804601, 0x02008501, 0x02008501},
+        {0x0000a620, 0x03408d02, 0x03408d02, 0x0280ca03, 0x0280ca03},
+        {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
+        {0x0000a628, 0x03410d04, 0x03410d04, 0x04014c04, 0x04014c04},
+        {0x0000a62c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
+        {0x0000a630, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
+        {0x0000a634, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
+        {0x0000a638, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
+        {0x0000a63c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
+        {0x0000b2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
+        {0x0000b2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
+        {0x0000b2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
+        {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+        {0x0000c2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
+        {0x0000c2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
+        {0x0000c2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
+        {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
+        {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
+        {0x00016048, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
+        {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
+        {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
+        {0x00016448, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
+        {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
+        {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
+        {0x00016848, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
+        {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
+};
+
 static const u32 ar9580_1p0_soc_preamble[][2] = {
         /* Addr      allmodes  */
         {0x000040a4, 0x00a0c1c9},
diff --git a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h
index 86e26a19efda..b2d6c18d1678 100644
--- a/drivers/net/wireless/ath/ath9k/ath9k.h
+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
@@ -109,14 +109,11 @@ struct ath_descdma {
         void *dd_desc;
         dma_addr_t dd_desc_paddr;
         u32 dd_desc_len;
-        struct ath_buf *dd_bufptr;
 };
 
 int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
                       struct list_head *head, const char *name,
                       int nbuf, int ndesc, bool is_tx);
-void ath_descdma_cleanup(struct ath_softc *sc, struct ath_descdma *dd,
-                         struct list_head *head);
 
 /***********/
 /* RX / TX */
@@ -317,10 +314,8 @@ struct ath_rx {
         u32 *rxlink;
         u32 num_pkts;
         unsigned int rxfilter;
-        spinlock_t rxbuflock;
         struct list_head rxbuf;
         struct ath_descdma rxdma;
-        struct ath_buf *rx_bufptr;
         struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX];
 
         struct sk_buff *frag;
@@ -328,7 +323,6 @@ struct ath_rx {
 
 int ath_startrecv(struct ath_softc *sc);
 bool ath_stoprecv(struct ath_softc *sc);
-void ath_flushrecv(struct ath_softc *sc);
 u32 ath_calcrxfilter(struct ath_softc *sc);
 int ath_rx_init(struct ath_softc *sc, int nbufs);
 void ath_rx_cleanup(struct ath_softc *sc);
@@ -338,14 +332,12 @@ void ath_txq_lock(struct ath_softc *sc, struct ath_txq *txq);
 void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq);
 void ath_txq_unlock_complete(struct ath_softc *sc, struct ath_txq *txq);
 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
-bool ath_drain_all_txq(struct ath_softc *sc, bool retry_tx);
-void ath_draintxq(struct ath_softc *sc,
-                     struct ath_txq *txq, bool retry_tx);
+bool ath_drain_all_txq(struct ath_softc *sc);
+void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq);
 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
 int ath_tx_init(struct ath_softc *sc, int nbufs);
-void ath_tx_cleanup(struct ath_softc *sc);
 int ath_txq_update(struct ath_softc *sc, int qnum,
                    struct ath9k_tx_queue_info *q);
 void ath_update_max_aggr_framelen(struct ath_softc *sc, int queue, int txop);
@@ -646,7 +638,6 @@ void ath_ant_comb_update(struct ath_softc *sc);
 enum sc_op_flags {
         SC_OP_INVALID,
         SC_OP_BEACONS,
-        SC_OP_RXFLUSH,
         SC_OP_ANI_RUN,
         SC_OP_PRIM_STA_VIF,
         SC_OP_HW_RESET,
@@ -675,6 +666,23 @@ struct ath9k_vif_iter_data {
         int nadhocs;   /* number of adhoc vifs */
 };
 
+/* enum spectral_mode:
+ *
+ * @SPECTRAL_DISABLED: spectral mode is disabled
+ * @SPECTRAL_BACKGROUND: hardware sends samples when it is not busy with
+ *      something else.
+ * @SPECTRAL_MANUAL: spectral scan is enabled, triggering for samples
+ *      is performed manually.
+ * @SPECTRAL_CHANSCAN: Like manual, but also triggered when changing channels
+ *      during a channel scan.
+ */
+enum spectral_mode {
+        SPECTRAL_DISABLED = 0,
+        SPECTRAL_BACKGROUND,
+        SPECTRAL_MANUAL,
+        SPECTRAL_CHANSCAN,
+};
+
 struct ath_softc {
         struct ieee80211_hw *hw;
         struct device *dev;
@@ -743,6 +751,10 @@ struct ath_softc {
         u8 ant_tx, ant_rx;
         struct dfs_pattern_detector *dfs_detector;
         u32 wow_enabled;
+        /* relay(fs) channel for spectral scan */
+        struct rchan *rfs_chan_spec_scan;
+        enum spectral_mode spectral_mode;
+        int scanning;
 
 #ifdef CONFIG_PM_SLEEP
         atomic_t wow_got_bmiss_intr;
@@ -751,6 +763,133 @@ struct ath_softc {
 #endif
 };
 
+#define SPECTRAL_SCAN_BITMASK           0x10
+/* Radar info packet format, used for DFS and spectral formats. */
+struct ath_radar_info {
+        u8 pulse_length_pri;
+        u8 pulse_length_ext;
+        u8 pulse_bw_info;
+} __packed;
+
+/* The HT20 spectral data has 4 bytes of additional information at it's end.
+ *
+ * [7:0]: all bins {max_magnitude[1:0], bitmap_weight[5:0]}
+ * [7:0]: all bins  max_magnitude[9:2]
+ * [7:0]: all bins {max_index[5:0], max_magnitude[11:10]}
+ * [3:0]: max_exp (shift amount to size max bin to 8-bit unsigned)
+ */
+struct ath_ht20_mag_info {
+        u8 all_bins[3];
+        u8 max_exp;
+} __packed;
+
+#define SPECTRAL_HT20_NUM_BINS          56
+
+/* WARNING: don't actually use this struct! MAC may vary the amount of
+ * data by -1/+2. This struct is for reference only.
+ */
+struct ath_ht20_fft_packet {
+        u8 data[SPECTRAL_HT20_NUM_BINS];
+        struct ath_ht20_mag_info mag_info;
+        struct ath_radar_info radar_info;
+} __packed;
+
+#define SPECTRAL_HT20_TOTAL_DATA_LEN    (sizeof(struct ath_ht20_fft_packet))
+
+/* Dynamic 20/40 mode:
+ *
+ * [7:0]: lower bins {max_magnitude[1:0], bitmap_weight[5:0]}
+ * [7:0]: lower bins  max_magnitude[9:2]
+ * [7:0]: lower bins {max_index[5:0], max_magnitude[11:10]}
+ * [7:0]: upper bins {max_magnitude[1:0], bitmap_weight[5:0]}
+ * [7:0]: upper bins  max_magnitude[9:2]
+ * [7:0]: upper bins {max_index[5:0], max_magnitude[11:10]}
+ * [3:0]: max_exp (shift amount to size max bin to 8-bit unsigned)
+ */
+struct ath_ht20_40_mag_info {
+        u8 lower_bins[3];
+        u8 upper_bins[3];
+        u8 max_exp;
+} __packed;
+
+#define SPECTRAL_HT20_40_NUM_BINS               128
+
+/* WARNING: don't actually use this struct! MAC may vary the amount of
+ * data. This struct is for reference only.
+ */
+struct ath_ht20_40_fft_packet {
+        u8 data[SPECTRAL_HT20_40_NUM_BINS];
+        struct ath_ht20_40_mag_info mag_info;
+        struct ath_radar_info radar_info;
+} __packed;
+
+
+#define SPECTRAL_HT20_40_TOTAL_DATA_LEN (sizeof(struct ath_ht20_40_fft_packet))
+
+/* grabs the max magnitude from the all/upper/lower bins */
+static inline u16 spectral_max_magnitude(u8 *bins)
+{
+        return (bins[0] & 0xc0) >> 6 |
+               (bins[1] & 0xff) << 2 |
+               (bins[2] & 0x03) << 10;
+}
+
+/* return the max magnitude from the all/upper/lower bins */
+static inline u8 spectral_max_index(u8 *bins)
+{
+        s8 m = (bins[2] & 0xfc) >> 2;
+
+        /* TODO: this still doesn't always report the right values ... */
+        if (m > 32)
+                m |= 0xe0;
+        else
+                m &= ~0xe0;
+
+        return m + 29;
+}
+
+/* return the bitmap weight from the all/upper/lower bins */
+static inline u8 spectral_bitmap_weight(u8 *bins)
+{
+        return bins[0] & 0x3f;
+}
+
+/* FFT sample format given to userspace via debugfs.
+ *
+ * Please keep the type/length at the front position and change
+ * other fields after adding another sample type
+ *
+ * TODO: this might need rework when switching to nl80211-based
+ * interface.
+ */
+enum ath_fft_sample_type {
+        ATH_FFT_SAMPLE_HT20 = 0,
+};
+
+struct fft_sample_tlv {
+        u8 type;        /* see ath_fft_sample */
+        u16 length;
+        /* type dependent data follows */
+} __packed;
+
+struct fft_sample_ht20 {
+        struct fft_sample_tlv tlv;
+
+        u8 __alignment;
+
+        u16 freq;
+        s8 rssi;
+        s8 noise;
+
+        u16 max_magnitude;
+        u8 max_index;
+        u8 bitmap_weight;
+
+        u64 tsf;
+
+        u16 data[SPECTRAL_HT20_NUM_BINS];
+} __packed;
+
 void ath9k_tasklet(unsigned long data);
 int ath_cabq_update(struct ath_softc *);
 
@@ -773,6 +912,10 @@ void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw);
 void ath9k_reload_chainmask_settings(struct ath_softc *sc);
 
 bool ath9k_uses_beacons(int type);
+void ath9k_spectral_scan_trigger(struct ieee80211_hw *hw);
+int ath9k_spectral_scan_config(struct ieee80211_hw *hw,
+                               enum spectral_mode spectral_mode);
+
 
 #ifdef CONFIG_ATH9K_PCI
 int ath_pci_init(void);
diff --git a/drivers/net/wireless/ath/ath9k/beacon.c b/drivers/net/wireless/ath/ath9k/beacon.c
index 531fffd801a3..dd3771954bd7 100644
--- a/drivers/net/wireless/ath/ath9k/beacon.c
+++ b/drivers/net/wireless/ath/ath9k/beacon.c
@@ -147,6 +147,7 @@ static struct ath_buf *ath9k_beacon_generate(struct ieee80211_hw *hw,
                                  skb->len, DMA_TO_DEVICE);
                 dev_kfree_skb_any(skb);
                 bf->bf_buf_addr = 0;
+                bf->bf_mpdu = NULL;
         }
 
         skb = ieee80211_beacon_get(hw, vif);
@@ -198,7 +199,7 @@ static struct ath_buf *ath9k_beacon_generate(struct ieee80211_hw *hw,
                 if (sc->nvifs > 1) {
                         ath_dbg(common, BEACON,
                                 "Flushing previous cabq traffic\n");
-                        ath_draintxq(sc, cabq, false);
+                        ath_draintxq(sc, cabq);
                 }
         }
 
@@ -359,7 +360,6 @@ void ath9k_beacon_tasklet(unsigned long data)
                 return;
 
         bf = ath9k_beacon_generate(sc->hw, vif);
-        WARN_ON(!bf);
 
         if (sc->beacon.bmisscnt != 0) {
                 ath_dbg(common, BSTUCK, "resume beacon xmit after %u misses\n",
diff --git a/drivers/net/wireless/ath/ath9k/debug.c b/drivers/net/wireless/ath/ath9k/debug.c
index 13ff9edc2401..6c5d313ebcb7 100644
--- a/drivers/net/wireless/ath/ath9k/debug.c
+++ b/drivers/net/wireless/ath/ath9k/debug.c
@@ -17,6 +17,7 @@
 #include <linux/slab.h>
 #include <linux/vmalloc.h>
 #include <linux/export.h>
+#include <linux/relay.h>
 #include <asm/unaligned.h>
 
 #include "ath9k.h"
@@ -861,7 +862,6 @@ static ssize_t read_file_recv(struct file *file, char __user *user_buf,
         RXS_ERR("RX-LENGTH-ERR", rx_len_err);
         RXS_ERR("RX-OOM-ERR", rx_oom_err);
         RXS_ERR("RX-RATE-ERR", rx_rate_err);
-        RXS_ERR("RX-DROP-RXFLUSH", rx_drop_rxflush);
         RXS_ERR("RX-TOO-MANY-FRAGS", rx_too_many_frags_err);
 
         PHY_ERR("UNDERRUN ERR", ATH9K_PHYERR_UNDERRUN);
@@ -966,6 +966,112 @@ static const struct file_operations fops_recv = {
         .llseek = default_llseek,
 };
 
+static ssize_t read_file_spec_scan_ctl(struct file *file, char __user *user_buf,
+                                       size_t count, loff_t *ppos)
+{
+        struct ath_softc *sc = file->private_data;
+        char *mode = "";
+        unsigned int len;
+
+        switch (sc->spectral_mode) {
+        case SPECTRAL_DISABLED:
+                mode = "disable";
+                break;
+        case SPECTRAL_BACKGROUND:
+                mode = "background";
+                break;
+        case SPECTRAL_CHANSCAN:
+                mode = "chanscan";
+                break;
+        case SPECTRAL_MANUAL:
+                mode = "manual";
+                break;
+        }
+        len = strlen(mode);
+        return simple_read_from_buffer(user_buf, count, ppos, mode, len);
+}
+
+static ssize_t write_file_spec_scan_ctl(struct file *file,
+                                        const char __user *user_buf,
+                                        size_t count, loff_t *ppos)
+{
+        struct ath_softc *sc = file->private_data;
+        struct ath_common *common = ath9k_hw_common(sc->sc_ah);
+        char buf[32];
+        ssize_t len;
+
+        len = min(count, sizeof(buf) - 1);
+        if (copy_from_user(buf, user_buf, len))
+                return -EFAULT;
+
+        buf[len] = '\0';
+
+        if (strncmp("trigger", buf, 7) == 0) {
+                ath9k_spectral_scan_trigger(sc->hw);
+        } else if (strncmp("background", buf, 9) == 0) {
+                ath9k_spectral_scan_config(sc->hw, SPECTRAL_BACKGROUND);
+                ath_dbg(common, CONFIG, "spectral scan: background mode enabled\n");
+        } else if (strncmp("chanscan", buf, 8) == 0) {
+                ath9k_spectral_scan_config(sc->hw, SPECTRAL_CHANSCAN);
+                ath_dbg(common, CONFIG, "spectral scan: channel scan mode enabled\n");
+        } else if (strncmp("manual", buf, 6) == 0) {
+                ath9k_spectral_scan_config(sc->hw, SPECTRAL_MANUAL);
+                ath_dbg(common, CONFIG, "spectral scan: manual mode enabled\n");
+        } else if (strncmp("disable", buf, 7) == 0) {
+                ath9k_spectral_scan_config(sc->hw, SPECTRAL_DISABLED);
+                ath_dbg(common, CONFIG, "spectral scan: disabled\n");
+        } else {
+                return -EINVAL;
+        }
+
+        return count;
+}
+
+static const struct file_operations fops_spec_scan_ctl = {
+        .read = read_file_spec_scan_ctl,
+        .write = write_file_spec_scan_ctl,
+        .open = simple_open,
+        .owner = THIS_MODULE,
+        .llseek = default_llseek,
+};
+
+static struct dentry *create_buf_file_handler(const char *filename,
+                                              struct dentry *parent,
+                                              umode_t mode,
+                                              struct rchan_buf *buf,
+                                              int *is_global)
+{
+        struct dentry *buf_file;
+
+        buf_file = debugfs_create_file(filename, mode, parent, buf,
+                                       &relay_file_operations);
+        *is_global = 1;
+        return buf_file;
+}
+
+static int remove_buf_file_handler(struct dentry *dentry)
+{
+        debugfs_remove(dentry);
+
+        return 0;
+}
+
+void ath_debug_send_fft_sample(struct ath_softc *sc,
+                               struct fft_sample_tlv *fft_sample_tlv)
+{
+        if (!sc->rfs_chan_spec_scan)
+                return;
+
+        relay_write(sc->rfs_chan_spec_scan, fft_sample_tlv,
+                    fft_sample_tlv->length + sizeof(*fft_sample_tlv));
+}
+
+static struct rchan_callbacks rfs_spec_scan_cb = {
+        .create_buf_file = create_buf_file_handler,
+        .remove_buf_file = remove_buf_file_handler,
+};
+
+
 static ssize_t read_file_regidx(struct file *file, char __user *user_buf,
                                 size_t count, loff_t *ppos)
 {
@@ -1780,6 +1886,14 @@ int ath9k_init_debug(struct ath_hw *ah)
                             &fops_base_eeprom);
         debugfs_create_file("modal_eeprom", S_IRUSR, sc->debug.debugfs_phy, sc,
                             &fops_modal_eeprom);
+        sc->rfs_chan_spec_scan = relay_open("spectral_scan",
+                                            sc->debug.debugfs_phy,
+                                            262144, 4, &rfs_spec_scan_cb,
+                                            NULL);
+        debugfs_create_file("spectral_scan_ctl", S_IRUSR | S_IWUSR,
+                            sc->debug.debugfs_phy, sc,
+                            &fops_spec_scan_ctl);
+
 #ifdef CONFIG_ATH9K_MAC_DEBUG
         debugfs_create_file("samples", S_IRUSR, sc->debug.debugfs_phy, sc,
                             &fops_samps);
diff --git a/drivers/net/wireless/ath/ath9k/debug.h b/drivers/net/wireless/ath/ath9k/debug.h
index 375c3b46411e..a22c0d780700 100644
--- a/drivers/net/wireless/ath/ath9k/debug.h
+++ b/drivers/net/wireless/ath/ath9k/debug.h
@@ -23,6 +23,7 @@
 
 struct ath_txq;
 struct ath_buf;
+struct fft_sample_tlv;
 
 #ifdef CONFIG_ATH9K_DEBUGFS
 #define TX_STAT_INC(q, c) sc->debug.stats.txstats[q].c++
@@ -216,7 +217,6 @@ struct ath_tx_stats {
  * @rx_oom_err:  No. of frames dropped due to OOM issues.
  * @rx_rate_err:  No. of frames dropped due to rate errors.
  * @rx_too_many_frags_err:  Frames dropped due to too-many-frags received.
- * @rx_drop_rxflush: No. of frames dropped due to RX-FLUSH.
  * @rx_beacons:  No. of beacons received.
  * @rx_frags:  No. of rx-fragements received.
  */
@@ -235,7 +235,6 @@ struct ath_rx_stats {
         u32 rx_oom_err;
         u32 rx_rate_err;
         u32 rx_too_many_frags_err;
-        u32 rx_drop_rxflush;
         u32 rx_beacons;
         u32 rx_frags;
 };
@@ -323,6 +322,10 @@ void ath9k_sta_remove_debugfs(struct ieee80211_hw *hw,
                               struct ieee80211_vif *vif,
                               struct ieee80211_sta *sta,
                               struct dentry *dir);
+
+void ath_debug_send_fft_sample(struct ath_softc *sc,
+                               struct fft_sample_tlv *fft_sample);
+
 #else
 
 #define RX_STAT_INC(c) /* NOP */
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_init.c b/drivers/net/wireless/ath/ath9k/htc_drv_init.c
index b2f85cb5ed30..716058b67557 100644
--- a/drivers/net/wireless/ath/ath9k/htc_drv_init.c
+++ b/drivers/net/wireless/ath/ath9k/htc_drv_init.c
@@ -280,14 +280,14 @@ err:
         return ret;
 }
 
-static int ath9k_reg_notifier(struct wiphy *wiphy,
-                              struct regulatory_request *request)
+static void ath9k_reg_notifier(struct wiphy *wiphy,
+                               struct regulatory_request *request)
 {
         struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
         struct ath9k_htc_priv *priv = hw->priv;
 
-        return ath_reg_notifier_apply(wiphy, request,
-                                      ath9k_hw_regulatory(priv->ah));
+        ath_reg_notifier_apply(wiphy, request,
+                               ath9k_hw_regulatory(priv->ah));
 }
 
 static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset)
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_main.c b/drivers/net/wireless/ath/ath9k/htc_drv_main.c
index 9c07a8fa5134..a8016d70088a 100644
--- a/drivers/net/wireless/ath/ath9k/htc_drv_main.c
+++ b/drivers/net/wireless/ath/ath9k/htc_drv_main.c
@@ -1628,7 +1628,9 @@ static int ath9k_htc_ampdu_action(struct ieee80211_hw *hw,
                 if (!ret)
                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
                 break;
-        case IEEE80211_AMPDU_TX_STOP:
+        case IEEE80211_AMPDU_TX_STOP_CONT:
+        case IEEE80211_AMPDU_TX_STOP_FLUSH:
+        case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
                 ath9k_htc_tx_aggr_oper(priv, vif, sta, action, tid);
                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
                 break;
diff --git a/drivers/net/wireless/ath/ath9k/htc_hst.c b/drivers/net/wireless/ath/ath9k/htc_hst.c
index 4a9570dfba72..aac4a406a513 100644
--- a/drivers/net/wireless/ath/ath9k/htc_hst.c
+++ b/drivers/net/wireless/ath/ath9k/htc_hst.c
@@ -344,6 +344,8 @@ void ath9k_htc_txcompletion_cb(struct htc_target *htc_handle,
                         endpoint->ep_callbacks.tx(endpoint->ep_callbacks.priv,
                                                   skb, htc_hdr->endpoint_id,
                                                   txok);
+                } else {
+                        kfree_skb(skb);
                 }
         }
 
diff --git a/drivers/net/wireless/ath/ath9k/hw-ops.h b/drivers/net/wireless/ath/ath9k/hw-ops.h
index 0f2b97f6b739..14b701140b49 100644
--- a/drivers/net/wireless/ath/ath9k/hw-ops.h
+++ b/drivers/net/wireless/ath/ath9k/hw-ops.h
@@ -101,22 +101,6 @@ static inline void ath9k_hw_spur_mitigate_freq(struct ath_hw *ah,
         ath9k_hw_private_ops(ah)->spur_mitigate_freq(ah, chan);
 }
 
-static inline int ath9k_hw_rf_alloc_ext_banks(struct ath_hw *ah)
-{
-        if (!ath9k_hw_private_ops(ah)->rf_alloc_ext_banks)
-                return 0;
-
-        return ath9k_hw_private_ops(ah)->rf_alloc_ext_banks(ah);
-}
-
-static inline void ath9k_hw_rf_free_ext_banks(struct ath_hw *ah)
-{
-        if (!ath9k_hw_private_ops(ah)->rf_free_ext_banks)
-                return;
-
-        ath9k_hw_private_ops(ah)->rf_free_ext_banks(ah);
-}
-
 static inline bool ath9k_hw_set_rf_regs(struct ath_hw *ah,
                                         struct ath9k_channel *chan,
                                         u16 modesIndex)
diff --git a/drivers/net/wireless/ath/ath9k/hw.c b/drivers/net/wireless/ath/ath9k/hw.c
index 7cb787065913..42cf3c7f1e25 100644
--- a/drivers/net/wireless/ath/ath9k/hw.c
+++ b/drivers/net/wireless/ath/ath9k/hw.c
@@ -54,11 +54,6 @@ static void ath9k_hw_init_cal_settings(struct ath_hw *ah)
         ath9k_hw_private_ops(ah)->init_cal_settings(ah);
 }
 
-static void ath9k_hw_init_mode_regs(struct ath_hw *ah)
-{
-        ath9k_hw_private_ops(ah)->init_mode_regs(ah);
-}
-
 static u32 ath9k_hw_compute_pll_control(struct ath_hw *ah,
                                         struct ath9k_channel *chan)
 {
@@ -208,7 +203,7 @@ void ath9k_hw_synth_delay(struct ath_hw *ah, struct ath9k_channel *chan,
         udelay(hw_delay + BASE_ACTIVATE_DELAY);
 }
 
-void ath9k_hw_write_array(struct ath_hw *ah, struct ar5416IniArray *array,
+void ath9k_hw_write_array(struct ath_hw *ah, const struct ar5416IniArray *array,
                           int column, unsigned int *writecnt)
 {
         int r;
@@ -554,28 +549,19 @@ static int ath9k_hw_post_init(struct ath_hw *ah)
                 ah->eep_ops->get_eeprom_ver(ah),
                 ah->eep_ops->get_eeprom_rev(ah));
 
-        ecode = ath9k_hw_rf_alloc_ext_banks(ah);
-        if (ecode) {
-                ath_err(ath9k_hw_common(ah),
-                        "Failed allocating banks for external radio\n");
-                ath9k_hw_rf_free_ext_banks(ah);
-                return ecode;
-        }
-
-        if (ah->config.enable_ani) {
-                ath9k_hw_ani_setup(ah);
+        if (ah->config.enable_ani)
                 ath9k_hw_ani_init(ah);
-        }
 
         return 0;
 }
 
-static void ath9k_hw_attach_ops(struct ath_hw *ah)
+static int ath9k_hw_attach_ops(struct ath_hw *ah)
 {
-        if (AR_SREV_9300_20_OR_LATER(ah))
-                ar9003_hw_attach_ops(ah);
-        else
-                ar9002_hw_attach_ops(ah);
+        if (!AR_SREV_9300_20_OR_LATER(ah))
+                return ar9002_hw_attach_ops(ah);
+
+        ar9003_hw_attach_ops(ah);
+        return 0;
 }
 
 /* Called for all hardware families */
@@ -611,7 +597,9 @@ static int __ath9k_hw_init(struct ath_hw *ah)
         ath9k_hw_init_defaults(ah);
         ath9k_hw_init_config(ah);
 
-        ath9k_hw_attach_ops(ah);
+        r = ath9k_hw_attach_ops(ah);
+        if (r)
+                return r;
 
         if (!ath9k_hw_setpower(ah, ATH9K_PM_AWAKE)) {
                 ath_err(common, "Couldn't wakeup chip\n");
@@ -675,8 +663,6 @@ static int __ath9k_hw_init(struct ath_hw *ah)
         if (!AR_SREV_9300_20_OR_LATER(ah))
                 ah->ani_function &= ~ATH9K_ANI_MRC_CCK;
 
-        ath9k_hw_init_mode_regs(ah);
-
         if (!ah->is_pciexpress)
                 ath9k_hw_disablepcie(ah);
 
@@ -1153,12 +1139,9 @@ void ath9k_hw_deinit(struct ath_hw *ah)
         struct ath_common *common = ath9k_hw_common(ah);
 
         if (common->state < ATH_HW_INITIALIZED)
-                goto free_hw;
+                return;
 
         ath9k_hw_setpower(ah, ATH9K_PM_FULL_SLEEP);
-
-free_hw:
-        ath9k_hw_rf_free_ext_banks(ah);
 }
 EXPORT_SYMBOL(ath9k_hw_deinit);
 
@@ -2576,12 +2559,6 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
                 rx_chainmask >>= 1;
         }
 
-        if (AR_SREV_9300_20_OR_LATER(ah)) {
-                ah->enabled_cals |= TX_IQ_CAL;
-                if (AR_SREV_9485_OR_LATER(ah))
-                        ah->enabled_cals |= TX_IQ_ON_AGC_CAL;
-        }
-
         if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
                 if (!(ah->ent_mode & AR_ENT_OTP_49GHZ_DISABLE))
                         pCap->hw_caps |= ATH9K_HW_CAP_MCI;
@@ -2590,7 +2567,6 @@ int ath9k_hw_fill_cap_info(struct ath_hw *ah)
                         pCap->hw_caps |= ATH9K_HW_CAP_RTT;
         }
 
-
         if (AR_SREV_9280_20_OR_LATER(ah)) {
                 pCap->hw_caps |= ATH9K_HW_WOW_DEVICE_CAPABLE |
                                  ATH9K_HW_WOW_PATTERN_MATCH_EXACT;
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index 7f1a8e91c908..784e81ccb903 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -397,6 +397,7 @@ enum ath9k_int {
 #define MAX_RTT_TABLE_ENTRY     6
 #define MAX_IQCAL_MEASUREMENT   8
 #define MAX_CL_TAB_ENTRY        16
+#define CL_TAB_ENTRY(reg_base)  (reg_base + (4 * j))
 
 struct ath9k_hw_cal_data {
         u16 channel;
@@ -599,13 +600,10 @@ struct ath_hw_radar_conf {
  * @init_cal_settings: setup types of calibrations supported
  * @init_cal: starts actual calibration
  *
- * @init_mode_regs: Initializes mode registers
  * @init_mode_gain_regs: Initialize TX/RX gain registers
  *
  * @rf_set_freq: change frequency
  * @spur_mitigate_freq: spur mitigation
- * @rf_alloc_ext_banks:
- * @rf_free_ext_banks:
  * @set_rf_regs:
  * @compute_pll_control: compute the PLL control value to use for
  *      AR_RTC_PLL_CONTROL for a given channel
@@ -620,7 +618,6 @@ struct ath_hw_private_ops {
         void (*init_cal_settings)(struct ath_hw *ah);
         bool (*init_cal)(struct ath_hw *ah, struct ath9k_channel *chan);
 
-        void (*init_mode_regs)(struct ath_hw *ah);
         void (*init_mode_gain_regs)(struct ath_hw *ah);
         void (*setup_calibration)(struct ath_hw *ah,
                                   struct ath9k_cal_list *currCal);
@@ -630,8 +627,6 @@ struct ath_hw_private_ops {
                            struct ath9k_channel *chan);
         void (*spur_mitigate_freq)(struct ath_hw *ah,
                                    struct ath9k_channel *chan);
-        int (*rf_alloc_ext_banks)(struct ath_hw *ah);
-        void (*rf_free_ext_banks)(struct ath_hw *ah);
         bool (*set_rf_regs)(struct ath_hw *ah,
                             struct ath9k_channel *chan,
                             u16 modesIndex);
@@ -661,6 +656,37 @@ struct ath_hw_private_ops {
 };
 
 /**
+ * struct ath_spec_scan - parameters for Atheros spectral scan
+ *
+ * @enabled: enable/disable spectral scan
+ * @short_repeat: controls whether the chip is in spectral scan mode
+ *                for 4 usec (enabled) or 204 usec (disabled)
+ * @count: number of scan results requested. There are special meanings
+ *         in some chip revisions:
+ *         AR92xx: highest bit set (>=128) for endless mode
+ *                 (spectral scan won't stopped until explicitly disabled)
+ *         AR9300 and newer: 0 for endless mode
+ * @endless: true if endless mode is intended. Otherwise, count value is
+ *           corrected to the next possible value.
+ * @period: time duration between successive spectral scan entry points
+ *          (period*256*Tclk). Tclk = ath_common->clockrate
+ * @fft_period: PHY passes FFT frames to MAC every (fft_period+1)*4uS
+ *
+ * Note: Tclk = 40MHz or 44MHz depending upon operating mode.
+ *       Typically it's 44MHz in 2/5GHz on later chips, but there's
+ *       a "fast clock" check for this in 5GHz.
+ *
+ */
+struct ath_spec_scan {
+        bool enabled;
+        bool short_repeat;
+        bool endless;
+        u8 count;
+        u8 period;
+        u8 fft_period;
+};
+
+/**
  * struct ath_hw_ops - callbacks used by hardware code and driver code
  *
  * This structure contains callbacks designed to to be used internally by
@@ -668,6 +694,10 @@ struct ath_hw_private_ops {
  *
  * @config_pci_powersave:
  * @calibrate: periodic calibration for NF, ANI, IQ, ADC gain, ADC-DC
+ *
+ * @spectral_scan_config: set parameters for spectral scan and enable/disable it
+ * @spectral_scan_trigger: trigger a spectral scan run
+ * @spectral_scan_wait: wait for a spectral scan run to finish
  */
 struct ath_hw_ops {
         void (*config_pci_powersave)(struct ath_hw *ah,
@@ -688,6 +718,10 @@ struct ath_hw_ops {
         void (*antdiv_comb_conf_set)(struct ath_hw *ah,
                         struct ath_hw_antcomb_conf *antconf);
         void (*antctrl_shared_chain_lnadiv)(struct ath_hw *hw, bool enable);
+        void (*spectral_scan_config)(struct ath_hw *ah,
+                                     struct ath_spec_scan *param);
+        void (*spectral_scan_trigger)(struct ath_hw *ah);
+        void (*spectral_scan_wait)(struct ath_hw *ah);
 };
 
 struct ath_nf_limits {
@@ -710,6 +744,7 @@ enum ath_cal_list {
 struct ath_hw {
         struct ath_ops reg_ops;
 
+        struct device *dev;
         struct ieee80211_hw *hw;
         struct ath_common common;
         struct ath9k_hw_version hw_version;
@@ -771,7 +806,6 @@ struct ath_hw {
         struct ath9k_cal_list iq_caldata;
         struct ath9k_cal_list adcgain_caldata;
         struct ath9k_cal_list adcdc_caldata;
-        struct ath9k_cal_list tempCompCalData;
         struct ath9k_cal_list *cal_list;
         struct ath9k_cal_list *cal_list_last;
         struct ath9k_cal_list *cal_list_curr;
@@ -830,10 +864,6 @@ struct ath_hw {
         /* ANI */
         u32 proc_phyerr;
         u32 aniperiod;
-        int totalSizeDesired[5];
-        int coarse_high[5];
-        int coarse_low[5];
-        int firpwr[5];
         enum ath9k_ani_cmd ani_function;
         u32 ani_skip_count;
 
@@ -979,7 +1009,7 @@ void ath9k_hw_setantenna(struct ath_hw *ah, u32 antenna);
 void ath9k_hw_synth_delay(struct ath_hw *ah, struct ath9k_channel *chan,
                           int hw_delay);
 bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout);
-void ath9k_hw_write_array(struct ath_hw *ah, struct ar5416IniArray *array,
+void ath9k_hw_write_array(struct ath_hw *ah, const struct ar5416IniArray *array,
                           int column, unsigned int *writecnt);
 u32 ath9k_hw_reverse_bits(u32 val, u32 n);
 u16 ath9k_hw_computetxtime(struct ath_hw *ah,
@@ -1066,16 +1096,17 @@ void ar9003_paprd_setup_gain_table(struct ath_hw *ah, int chain);
 int ar9003_paprd_init_table(struct ath_hw *ah);
 bool ar9003_paprd_is_done(struct ath_hw *ah);
 bool ar9003_is_paprd_enabled(struct ath_hw *ah);
+void ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx);
 
 /* Hardware family op attach helpers */
-void ar5008_hw_attach_phy_ops(struct ath_hw *ah);
+int ar5008_hw_attach_phy_ops(struct ath_hw *ah);
 void ar9002_hw_attach_phy_ops(struct ath_hw *ah);
 void ar9003_hw_attach_phy_ops(struct ath_hw *ah);
 
 void ar9002_hw_attach_calib_ops(struct ath_hw *ah);
 void ar9003_hw_attach_calib_ops(struct ath_hw *ah);
 
-void ar9002_hw_attach_ops(struct ath_hw *ah);
+int ar9002_hw_attach_ops(struct ath_hw *ah);
 void ar9003_hw_attach_ops(struct ath_hw *ah);
 
 void ar9002_hw_load_ani_reg(struct ath_hw *ah, struct ath9k_channel *chan);
diff --git a/drivers/net/wireless/ath/ath9k/init.c b/drivers/net/wireless/ath/ath9k/init.c
index f69ef5d48c7b..4b1abc7da98c 100644
--- a/drivers/net/wireless/ath/ath9k/init.c
+++ b/drivers/net/wireless/ath/ath9k/init.c
@@ -20,6 +20,7 @@
 #include <linux/slab.h>
 #include <linux/ath9k_platform.h>
 #include <linux/module.h>
+#include <linux/relay.h>
 
 #include "ath9k.h"
 
@@ -302,16 +303,15 @@ static void setup_ht_cap(struct ath_softc *sc,
         ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED;
 }
 
-static int ath9k_reg_notifier(struct wiphy *wiphy,
-                              struct regulatory_request *request)
+static void ath9k_reg_notifier(struct wiphy *wiphy,
+                               struct regulatory_request *request)
 {
         struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
         struct ath_softc *sc = hw->priv;
         struct ath_hw *ah = sc->sc_ah;
         struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
-        int ret;
 
-        ret = ath_reg_notifier_apply(wiphy, request, reg);
+        ath_reg_notifier_apply(wiphy, request, reg);
 
         /* Set tx power */
         if (ah->curchan) {
@@ -321,8 +321,6 @@ static int ath9k_reg_notifier(struct wiphy *wiphy,
                 sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
                 ath9k_ps_restore(sc);
         }
-
-        return ret;
 }
 
 /*
@@ -337,7 +335,7 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
         u8 *ds;
         struct ath_buf *bf;
-        int i, bsize, error, desc_len;
+        int i, bsize, desc_len;
 
         ath_dbg(common, CONFIG, "%s DMA: %u buffers %u desc/buf\n",
                 name, nbuf, ndesc);
@@ -353,8 +351,7 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
         if ((desc_len % 4) != 0) {
                 ath_err(common, "ath_desc not DWORD aligned\n");
                 BUG_ON((desc_len % 4) != 0);
-                error = -ENOMEM;
-                goto fail;
+                return -ENOMEM;
         }
 
         dd->dd_desc_len = desc_len * nbuf * ndesc;
@@ -378,12 +375,11 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
         }
 
         /* allocate descriptors */
-        dd->dd_desc = dma_alloc_coherent(sc->dev, dd->dd_desc_len,
-                                         &dd->dd_desc_paddr, GFP_KERNEL);
-        if (dd->dd_desc == NULL) {
-                error = -ENOMEM;
-                goto fail;
-        }
+        dd->dd_desc = dmam_alloc_coherent(sc->dev, dd->dd_desc_len,
+                                          &dd->dd_desc_paddr, GFP_KERNEL);
+        if (!dd->dd_desc)
+                return -ENOMEM;
+
         ds = (u8 *) dd->dd_desc;
         ath_dbg(common, CONFIG, "%s DMA map: %p (%u) -> %llx (%u)\n",
                 name, ds, (u32) dd->dd_desc_len,
@@ -391,12 +387,9 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
 
         /* allocate buffers */
         bsize = sizeof(struct ath_buf) * nbuf;
-        bf = kzalloc(bsize, GFP_KERNEL);
-        if (bf == NULL) {
-                error = -ENOMEM;
-                goto fail2;
-        }
-        dd->dd_bufptr = bf;
+        bf = devm_kzalloc(sc->dev, bsize, GFP_KERNEL);
+        if (!bf)
+                return -ENOMEM;
 
         for (i = 0; i < nbuf; i++, bf++, ds += (desc_len * ndesc)) {
                 bf->bf_desc = ds;
@@ -422,12 +415,6 @@ int ath_descdma_setup(struct ath_softc *sc, struct ath_descdma *dd,
                 list_add_tail(&bf->list, head);
         }
         return 0;
-fail2:
-        dma_free_coherent(sc->dev, dd->dd_desc_len, dd->dd_desc,
-                          dd->dd_desc_paddr);
-fail:
-        memset(dd, 0, sizeof(*dd));
-        return error;
 }
 
 static int ath9k_init_queues(struct ath_softc *sc)
@@ -457,11 +444,13 @@ static int ath9k_init_channels_rates(struct ath_softc *sc)
                      ATH9K_NUM_CHANNELS);
 
         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_2GHZ) {
-                channels = kmemdup(ath9k_2ghz_chantable,
+                channels = devm_kzalloc(sc->dev,
                         sizeof(ath9k_2ghz_chantable), GFP_KERNEL);
                 if (!channels)
                     return -ENOMEM;
 
+                memcpy(channels, ath9k_2ghz_chantable,
+                       sizeof(ath9k_2ghz_chantable));
                 sc->sbands[IEEE80211_BAND_2GHZ].channels = channels;
                 sc->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
                 sc->sbands[IEEE80211_BAND_2GHZ].n_channels =
@@ -472,14 +461,13 @@ static int ath9k_init_channels_rates(struct ath_softc *sc)
         }
 
         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_5GHZ) {
-                channels = kmemdup(ath9k_5ghz_chantable,
+                channels = devm_kzalloc(sc->dev,
                         sizeof(ath9k_5ghz_chantable), GFP_KERNEL);
-                if (!channels) {
-                        if (sc->sbands[IEEE80211_BAND_2GHZ].channels)
-                                kfree(sc->sbands[IEEE80211_BAND_2GHZ].channels);
+                if (!channels)
                         return -ENOMEM;
-                }
 
+                memcpy(channels, ath9k_5ghz_chantable,
+                       sizeof(ath9k_5ghz_chantable));
                 sc->sbands[IEEE80211_BAND_5GHZ].channels = channels;
                 sc->sbands[IEEE80211_BAND_5GHZ].band = IEEE80211_BAND_5GHZ;
                 sc->sbands[IEEE80211_BAND_5GHZ].n_channels =
@@ -565,10 +553,11 @@ static int ath9k_init_softc(u16 devid, struct ath_softc *sc,
         int ret = 0, i;
         int csz = 0;
 
-        ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL);
+        ah = devm_kzalloc(sc->dev, sizeof(struct ath_hw), GFP_KERNEL);
         if (!ah)
                 return -ENOMEM;
 
+        ah->dev = sc->dev;
         ah->hw = sc->hw;
         ah->hw_version.devid = devid;
         ah->reg_ops.read = ath9k_ioread32;
@@ -636,7 +625,7 @@ static int ath9k_init_softc(u16 devid, struct ath_softc *sc,
         if (pdata && pdata->eeprom_name) {
                 ret = ath9k_eeprom_request(sc, pdata->eeprom_name);
                 if (ret)
-                        goto err_eeprom;
+                        return ret;
         }
 
         /* Initializes the hardware for all supported chipsets */
@@ -676,10 +665,6 @@ err_queues:
         ath9k_hw_deinit(ah);
 err_hw:
         ath9k_eeprom_release(sc);
-err_eeprom:
-        kfree(ah);
-        sc->sc_ah = NULL;
-
         return ret;
 }
 
@@ -844,8 +829,8 @@ int ath9k_init_device(u16 devid, struct ath_softc *sc,
 
         /* Bring up device */
         error = ath9k_init_softc(devid, sc, bus_ops);
-        if (error != 0)
-                goto error_init;
+        if (error)
+                return error;
 
         ah = sc->sc_ah;
         common = ath9k_hw_common(ah);
@@ -855,19 +840,19 @@ int ath9k_init_device(u16 devid, struct ath_softc *sc,
         error = ath_regd_init(&common->regulatory, sc->hw->wiphy,
                               ath9k_reg_notifier);
         if (error)
-                goto error_regd;
+                goto deinit;
 
         reg = &common->regulatory;
 
         /* Setup TX DMA */
         error = ath_tx_init(sc, ATH_TXBUF);
         if (error != 0)
-                goto error_tx;
+                goto deinit;
 
         /* Setup RX DMA */
         error = ath_rx_init(sc, ATH_RXBUF);
         if (error != 0)
-                goto error_rx;
+                goto deinit;
 
         ath9k_init_txpower_limits(sc);
 
@@ -881,19 +866,19 @@ int ath9k_init_device(u16 devid, struct ath_softc *sc,
         /* Register with mac80211 */
         error = ieee80211_register_hw(hw);
         if (error)
-                goto error_register;
+                goto rx_cleanup;
 
         error = ath9k_init_debug(ah);
         if (error) {
                 ath_err(common, "Unable to create debugfs files\n");
-                goto error_world;
+                goto unregister;
         }
 
         /* Handle world regulatory */
         if (!ath_is_world_regd(reg)) {
                 error = regulatory_hint(hw->wiphy, reg->alpha2);
                 if (error)
-                        goto error_world;
+                        goto unregister;
         }
 
         ath_init_leds(sc);
@@ -901,17 +886,12 @@ int ath9k_init_device(u16 devid, struct ath_softc *sc,
 
         return 0;
 
-error_world:
+unregister:
         ieee80211_unregister_hw(hw);
-error_register:
+rx_cleanup:
         ath_rx_cleanup(sc);
-error_rx:
-        ath_tx_cleanup(sc);
-error_tx:
-        /* Nothing */
-error_regd:
+deinit:
         ath9k_deinit_softc(sc);
-error_init:
         return error;
 }
 
@@ -923,12 +903,6 @@ static void ath9k_deinit_softc(struct ath_softc *sc)
 {
         int i = 0;
 
-        if (sc->sbands[IEEE80211_BAND_2GHZ].channels)
-                kfree(sc->sbands[IEEE80211_BAND_2GHZ].channels);
-
-        if (sc->sbands[IEEE80211_BAND_5GHZ].channels)
-                kfree(sc->sbands[IEEE80211_BAND_5GHZ].channels);
-
         ath9k_deinit_btcoex(sc);
 
         for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++)
@@ -940,8 +914,11 @@ static void ath9k_deinit_softc(struct ath_softc *sc)
                 sc->dfs_detector->exit(sc->dfs_detector);
 
         ath9k_eeprom_release(sc);
-        kfree(sc->sc_ah);
-        sc->sc_ah = NULL;
+
+        if (sc->rfs_chan_spec_scan) {
+                relay_close(sc->rfs_chan_spec_scan);
+                sc->rfs_chan_spec_scan = NULL;
+        }
 }
 
 void ath9k_deinit_device(struct ath_softc *sc)
@@ -957,22 +934,9 @@ void ath9k_deinit_device(struct ath_softc *sc)
 
         ieee80211_unregister_hw(hw);
         ath_rx_cleanup(sc);
-        ath_tx_cleanup(sc);
         ath9k_deinit_softc(sc);
 }
 
-void ath_descdma_cleanup(struct ath_softc *sc,
-                         struct ath_descdma *dd,
-                         struct list_head *head)
-{
-        dma_free_coherent(sc->dev, dd->dd_desc_len, dd->dd_desc,
-                          dd->dd_desc_paddr);
-
-        INIT_LIST_HEAD(head);
-        kfree(dd->dd_bufptr);
-        memset(dd, 0, sizeof(*dd));
-}
-
 /************************/
 /*     Module Hooks     */
 /************************/
diff --git a/drivers/net/wireless/ath/ath9k/mac.h b/drivers/net/wireless/ath/ath9k/mac.h
index 4a745e68dd94..1ff817061ebc 100644
--- a/drivers/net/wireless/ath/ath9k/mac.h
+++ b/drivers/net/wireless/ath/ath9k/mac.h
@@ -226,7 +226,8 @@ enum ath9k_phyerr {
         ATH9K_PHYERR_HT_LENGTH_ILLEGAL    = 35,
         ATH9K_PHYERR_HT_RATE_ILLEGAL      = 36,
 
-        ATH9K_PHYERR_MAX                  = 37,
+        ATH9K_PHYERR_SPECTRAL             = 38,
+        ATH9K_PHYERR_MAX                  = 39,
 };
 
 struct ath_desc {
diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c
index be30a9af1528..4b72b660f180 100644
--- a/drivers/net/wireless/ath/ath9k/main.c
+++ b/drivers/net/wireless/ath/ath9k/main.c
@@ -182,7 +182,7 @@ static void ath_restart_work(struct ath_softc *sc)
         ath_start_ani(sc);
 }
 
-static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
+static bool ath_prepare_reset(struct ath_softc *sc)
 {
         struct ath_hw *ah = sc->sc_ah;
         bool ret = true;
@@ -196,20 +196,12 @@ static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
         ath9k_debug_samp_bb_mac(sc);
         ath9k_hw_disable_interrupts(ah);
 
-        if (!ath_stoprecv(sc))
+        if (!ath_drain_all_txq(sc))
                 ret = false;
 
-        if (!ath_drain_all_txq(sc, retry_tx))
+        if (!ath_stoprecv(sc))
                 ret = false;
 
-        if (!flush) {
-                if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
-                        ath_rx_tasklet(sc, 1, true);
-                ath_rx_tasklet(sc, 1, false);
-        } else {
-                ath_flushrecv(sc);
-        }
-
         return ret;
 }
 
@@ -255,18 +247,17 @@ static bool ath_complete_reset(struct ath_softc *sc, bool start)
         return true;
 }
 
-static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
-                              bool retry_tx)
+static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
 {
         struct ath_hw *ah = sc->sc_ah;
         struct ath_common *common = ath9k_hw_common(ah);
         struct ath9k_hw_cal_data *caldata = NULL;
         bool fastcc = true;
-        bool flush = false;
         int r;
 
         __ath_cancel_work(sc);
 
+        tasklet_disable(&sc->intr_tq);
         spin_lock_bh(&sc->sc_pcu_lock);
 
         if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)) {
@@ -276,11 +267,10 @@ static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
 
         if (!hchan) {
                 fastcc = false;
-                flush = true;
                 hchan = ah->curchan;
         }
 
-        if (!ath_prepare_reset(sc, retry_tx, flush))
+        if (!ath_prepare_reset(sc))
                 fastcc = false;
 
         ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
@@ -302,6 +292,8 @@ static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
 
 out:
         spin_unlock_bh(&sc->sc_pcu_lock);
+        tasklet_enable(&sc->intr_tq);
+
         return r;
 }
 
@@ -319,7 +311,7 @@ static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
         if (test_bit(SC_OP_INVALID, &sc->sc_flags))
                 return -EIO;
 
-        r = ath_reset_internal(sc, hchan, false);
+        r = ath_reset_internal(sc, hchan);
 
         return r;
 }
@@ -549,23 +541,21 @@ chip_reset:
 #undef SCHED_INTR
 }
 
-static int ath_reset(struct ath_softc *sc, bool retry_tx)
+static int ath_reset(struct ath_softc *sc)
 {
-        int r;
+        int i, r;
 
         ath9k_ps_wakeup(sc);
 
-        r = ath_reset_internal(sc, NULL, retry_tx);
+        r = ath_reset_internal(sc, NULL);
 
-        if (retry_tx) {
-                int i;
-                for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
-                        if (ATH_TXQ_SETUP(sc, i)) {
-                                spin_lock_bh(&sc->tx.txq[i].axq_lock);
-                                ath_txq_schedule(sc, &sc->tx.txq[i]);
-                                spin_unlock_bh(&sc->tx.txq[i].axq_lock);
-                        }
-                }
+        for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
+                if (!ATH_TXQ_SETUP(sc, i))
+                        continue;
+
+                spin_lock_bh(&sc->tx.txq[i].axq_lock);
+                ath_txq_schedule(sc, &sc->tx.txq[i]);
+                spin_unlock_bh(&sc->tx.txq[i].axq_lock);
         }
 
         ath9k_ps_restore(sc);
@@ -586,7 +576,7 @@ void ath_reset_work(struct work_struct *work)
 {
         struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
 
-        ath_reset(sc, true);
+        ath_reset(sc);
 }
 
 /**********************/
@@ -804,7 +794,7 @@ static void ath9k_stop(struct ieee80211_hw *hw)
                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
         }
 
-        ath_prepare_reset(sc, false, true);
+        ath_prepare_reset(sc);
 
         if (sc->rx.frag) {
                 dev_kfree_skb_any(sc->rx.frag);
@@ -1075,6 +1065,86 @@ static void ath9k_disable_ps(struct ath_softc *sc)
         ath_dbg(common, PS, "PowerSave disabled\n");
 }
 
+void ath9k_spectral_scan_trigger(struct ieee80211_hw *hw)
+{
+        struct ath_softc *sc = hw->priv;
+        struct ath_hw *ah = sc->sc_ah;
+        struct ath_common *common = ath9k_hw_common(ah);
+        u32 rxfilter;
+
+        if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
+                ath_err(common, "spectrum analyzer not implemented on this hardware\n");
+                return;
+        }
+
+        ath9k_ps_wakeup(sc);
+        rxfilter = ath9k_hw_getrxfilter(ah);
+        ath9k_hw_setrxfilter(ah, rxfilter |
+                                 ATH9K_RX_FILTER_PHYRADAR |
+                                 ATH9K_RX_FILTER_PHYERR);
+
+        /* TODO: usually this should not be neccesary, but for some reason
+         * (or in some mode?) the trigger must be called after the
+         * configuration, otherwise the register will have its values reset
+         * (on my ar9220 to value 0x01002310)
+         */
+        ath9k_spectral_scan_config(hw, sc->spectral_mode);
+        ath9k_hw_ops(ah)->spectral_scan_trigger(ah);
+        ath9k_ps_restore(sc);
+}
+
+int ath9k_spectral_scan_config(struct ieee80211_hw *hw,
+                               enum spectral_mode spectral_mode)
+{
+        struct ath_softc *sc = hw->priv;
+        struct ath_hw *ah = sc->sc_ah;
+        struct ath_common *common = ath9k_hw_common(ah);
+        struct ath_spec_scan param;
+
+        if (!ath9k_hw_ops(ah)->spectral_scan_trigger) {
+                ath_err(common, "spectrum analyzer not implemented on this hardware\n");
+                return -1;
+        }
+
+        /* NOTE: this will generate a few samples ...
+         *
+         * TODO: review default parameters, and/or define an interface to set
+         * them.
+         */
+        param.enabled = 1;
+        param.short_repeat = true;
+        param.count = 8;
+        param.endless = false;
+        param.period = 0xFF;
+        param.fft_period = 0xF;
+
+        switch (spectral_mode) {
+        case SPECTRAL_DISABLED:
+                param.enabled = 0;
+                break;
+        case SPECTRAL_BACKGROUND:
+                /* send endless samples.
+                 * TODO: is this really useful for "background"?
+                 */
+                param.endless = 1;
+                break;
+        case SPECTRAL_CHANSCAN:
+                break;
+        case SPECTRAL_MANUAL:
+                break;
+        default:
+                return -1;
+        }
+
+        ath9k_ps_wakeup(sc);
+        ath9k_hw_ops(ah)->spectral_scan_config(ah, &param);
+        ath9k_ps_restore(sc);
+
+        sc->spectral_mode = spectral_mode;
+
+        return 0;
+}
+
 static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
 {
         struct ath_softc *sc = hw->priv;
@@ -1188,6 +1258,11 @@ static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
                  */
                 if (old_pos >= 0)
                         ath_update_survey_nf(sc, old_pos);
+
+                /* perform spectral scan if requested. */
+                if (sc->scanning && sc->spectral_mode == SPECTRAL_CHANSCAN)
+                        ath9k_spectral_scan_trigger(hw);
+
         }
 
         if (changed & IEEE80211_CONF_CHANGE_POWER) {
@@ -1610,7 +1685,9 @@ static int ath9k_ampdu_action(struct ieee80211_hw *hw,
                         ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
                 ath9k_ps_restore(sc);
                 break;
-        case IEEE80211_AMPDU_TX_STOP:
+        case IEEE80211_AMPDU_TX_STOP_CONT:
+        case IEEE80211_AMPDU_TX_STOP_FLUSH:
+        case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
                 ath9k_ps_wakeup(sc);
                 ath_tx_aggr_stop(sc, sta, tid);
                 ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
@@ -1729,11 +1806,11 @@ static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
         if (drop) {
                 ath9k_ps_wakeup(sc);
                 spin_lock_bh(&sc->sc_pcu_lock);
-                drain_txq = ath_drain_all_txq(sc, false);
+                drain_txq = ath_drain_all_txq(sc);
                 spin_unlock_bh(&sc->sc_pcu_lock);
 
                 if (!drain_txq)
-                        ath_reset(sc, false);
+                        ath_reset(sc);
 
                 ath9k_ps_restore(sc);
                 ieee80211_wake_queues(hw);
@@ -1833,6 +1910,9 @@ static u32 fill_chainmask(u32 cap, u32 new)
 
 static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
 {
+        if (AR_SREV_9300_20_OR_LATER(ah))
+                return true;
+
         switch (val & 0x7) {
         case 0x1:
         case 0x3:
@@ -2238,6 +2318,19 @@ static void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled)
 }
 
 #endif
+static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
+{
+        struct ath_softc *sc = hw->priv;
+
+        sc->scanning = 1;
+}
+
+static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
+{
+        struct ath_softc *sc = hw->priv;
+
+        sc->scanning = 0;
+}
 
 struct ieee80211_ops ath9k_ops = {
         .tx                 = ath9k_tx,
@@ -2284,4 +2377,6 @@ struct ieee80211_ops ath9k_ops = {
         .sta_add_debugfs    = ath9k_sta_add_debugfs,
         .sta_remove_debugfs = ath9k_sta_remove_debugfs,
 #endif
+        .sw_scan_start      = ath9k_sw_scan_start,
+        .sw_scan_complete   = ath9k_sw_scan_complete,
 };
diff --git a/drivers/net/wireless/ath/ath9k/mci.c b/drivers/net/wireless/ath/ath9k/mci.c
index 5c02702f21e7..d2074334ec9b 100644
--- a/drivers/net/wireless/ath/ath9k/mci.c
+++ b/drivers/net/wireless/ath/ath9k/mci.c
@@ -438,7 +438,7 @@ int ath_mci_setup(struct ath_softc *sc)
         struct ath_mci_buf *buf = &mci->sched_buf;
         int ret;
 
-        buf->bf_addr = dma_alloc_coherent(sc->dev,
+        buf->bf_addr = dmam_alloc_coherent(sc->dev,
                                   ATH_MCI_SCHED_BUF_SIZE + ATH_MCI_GPM_BUF_SIZE,
                                   &buf->bf_paddr, GFP_KERNEL);
 
@@ -477,11 +477,6 @@ void ath_mci_cleanup(struct ath_softc *sc)
         struct ath_mci_coex *mci = &sc->mci_coex;
         struct ath_mci_buf *buf = &mci->sched_buf;
 
-        if (buf->bf_addr)
-                dma_free_coherent(sc->dev,
-                                  ATH_MCI_SCHED_BUF_SIZE + ATH_MCI_GPM_BUF_SIZE,
-                                  buf->bf_addr, buf->bf_paddr);
-
         ar9003_mci_cleanup(ah);
 
         ath_dbg(common, MCI, "MCI De-Initialized\n");
diff --git a/drivers/net/wireless/ath/ath9k/pci.c b/drivers/net/wireless/ath/ath9k/pci.c
index 7ae73fbd9136..0e0d39583837 100644
--- a/drivers/net/wireless/ath/ath9k/pci.c
+++ b/drivers/net/wireless/ath/ath9k/pci.c
@@ -147,7 +147,6 @@ static const struct ath_bus_ops ath_pci_bus_ops = {
 
 static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 {
-        void __iomem *mem;
         struct ath_softc *sc;
         struct ieee80211_hw *hw;
         u8 csz;
@@ -155,19 +154,19 @@ static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
         int ret = 0;
         char hw_name[64];
 
-        if (pci_enable_device(pdev))
+        if (pcim_enable_device(pdev))
                 return -EIO;
 
         ret =  pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
         if (ret) {
                 pr_err("32-bit DMA not available\n");
-                goto err_dma;
+                return ret;
         }
 
         ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
         if (ret) {
                 pr_err("32-bit DMA consistent DMA enable failed\n");
-                goto err_dma;
+                return ret;
         }
 
         /*
@@ -203,25 +202,16 @@ static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
         if ((val & 0x0000ff00) != 0)
                 pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
 
-        ret = pci_request_region(pdev, 0, "ath9k");
+        ret = pcim_iomap_regions(pdev, BIT(0), "ath9k");
         if (ret) {
                 dev_err(&pdev->dev, "PCI memory region reserve error\n");
-                ret = -ENODEV;
-                goto err_region;
-        }
-
-        mem = pci_iomap(pdev, 0, 0);
-        if (!mem) {
-                pr_err("PCI memory map error\n") ;
-                ret = -EIO;
-                goto err_iomap;
+                return -ENODEV;
         }
 
         hw = ieee80211_alloc_hw(sizeof(struct ath_softc), &ath9k_ops);
         if (!hw) {
                 dev_err(&pdev->dev, "No memory for ieee80211_hw\n");
-                ret = -ENOMEM;
-                goto err_alloc_hw;
+                return -ENOMEM;
         }
 
         SET_IEEE80211_DEV(hw, &pdev->dev);
@@ -230,7 +220,7 @@ static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
         sc = hw->priv;
         sc->hw = hw;
         sc->dev = &pdev->dev;
-        sc->mem = mem;
+        sc->mem = pcim_iomap_table(pdev)[0];
 
         /* Will be cleared in ath9k_start() */
         set_bit(SC_OP_INVALID, &sc->sc_flags);
@@ -251,7 +241,7 @@ static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
 
         ath9k_hw_name(sc->sc_ah, hw_name, sizeof(hw_name));
         wiphy_info(hw->wiphy, "%s mem=0x%lx, irq=%d\n",
-                   hw_name, (unsigned long)mem, pdev->irq);
+                   hw_name, (unsigned long)sc->mem, pdev->irq);
 
         return 0;
 
@@ -259,14 +249,6 @@ err_init:
         free_irq(sc->irq, sc);
 err_irq:
         ieee80211_free_hw(hw);
-err_alloc_hw:
-        pci_iounmap(pdev, mem);
-err_iomap:
-        pci_release_region(pdev, 0);
-err_region:
-        /* Nothing */
-err_dma:
-        pci_disable_device(pdev);
         return ret;
 }
 
@@ -274,17 +256,12 @@ static void ath_pci_remove(struct pci_dev *pdev)
 {
         struct ieee80211_hw *hw = pci_get_drvdata(pdev);
         struct ath_softc *sc = hw->priv;
-        void __iomem *mem = sc->mem;
 
         if (!is_ath9k_unloaded)
                 sc->sc_ah->ah_flags |= AH_UNPLUGGED;
         ath9k_deinit_device(sc);
         free_irq(sc->irq, sc);
         ieee80211_free_hw(sc->hw);
-
-        pci_iounmap(pdev, mem);
-        pci_disable_device(pdev);
-        pci_release_region(pdev, 0);
 }
 
 #ifdef CONFIG_PM_SLEEP
diff --git a/drivers/net/wireless/ath/ath9k/recv.c b/drivers/net/wireless/ath/ath9k/recv.c
index d4df98a938bf..d7c129bb571b 100644
--- a/drivers/net/wireless/ath/ath9k/recv.c
+++ b/drivers/net/wireless/ath/ath9k/recv.c
@@ -15,6 +15,7 @@
  */
 
 #include <linux/dma-mapping.h>
+#include <linux/relay.h>
 #include "ath9k.h"
 #include "ar9003_mac.h"
 
@@ -180,11 +181,6 @@ static void ath_rx_edma_cleanup(struct ath_softc *sc)
                         bf->bf_mpdu = NULL;
                 }
         }
-
-        INIT_LIST_HEAD(&sc->rx.rxbuf);
-
-        kfree(sc->rx.rx_bufptr);
-        sc->rx.rx_bufptr = NULL;
 }
 
 static void ath_rx_edma_init_queue(struct ath_rx_edma *rx_edma, int size)
@@ -211,12 +207,11 @@ static int ath_rx_edma_init(struct ath_softc *sc, int nbufs)
                                ah->caps.rx_hp_qdepth);
 
         size = sizeof(struct ath_buf) * nbufs;
-        bf = kzalloc(size, GFP_KERNEL);
+        bf = devm_kzalloc(sc->dev, size, GFP_KERNEL);
         if (!bf)
                 return -ENOMEM;
 
         INIT_LIST_HEAD(&sc->rx.rxbuf);
-        sc->rx.rx_bufptr = bf;
 
         for (i = 0; i < nbufs; i++, bf++) {
                 skb = ath_rxbuf_alloc(common, common->rx_bufsize, GFP_KERNEL);
@@ -254,8 +249,6 @@ rx_init_fail:
 
 static void ath_edma_start_recv(struct ath_softc *sc)
 {
-        spin_lock_bh(&sc->rx.rxbuflock);
-
         ath9k_hw_rxena(sc->sc_ah);
 
         ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_HP,
@@ -267,8 +260,6 @@ static void ath_edma_start_recv(struct ath_softc *sc)
         ath_opmode_init(sc);
 
         ath9k_hw_startpcureceive(sc->sc_ah, !!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL));
-
-        spin_unlock_bh(&sc->rx.rxbuflock);
 }
 
 static void ath_edma_stop_recv(struct ath_softc *sc)
@@ -285,8 +276,6 @@ int ath_rx_init(struct ath_softc *sc, int nbufs)
         int error = 0;
 
         spin_lock_init(&sc->sc_pcu_lock);
-        spin_lock_init(&sc->rx.rxbuflock);
-        clear_bit(SC_OP_RXFLUSH, &sc->sc_flags);
 
         common->rx_bufsize = IEEE80211_MAX_MPDU_LEN / 2 +
                              sc->sc_ah->caps.rx_status_len;
@@ -363,9 +352,6 @@ void ath_rx_cleanup(struct ath_softc *sc)
                                 bf->bf_mpdu = NULL;
                         }
                 }
-
-                if (sc->rx.rxdma.dd_desc_len != 0)
-                        ath_descdma_cleanup(sc, &sc->rx.rxdma, &sc->rx.rxbuf);
         }
 }
 
@@ -447,7 +433,6 @@ int ath_startrecv(struct ath_softc *sc)
                 return 0;
         }
 
-        spin_lock_bh(&sc->rx.rxbuflock);
         if (list_empty(&sc->rx.rxbuf))
                 goto start_recv;
 
@@ -468,26 +453,31 @@ start_recv:
         ath_opmode_init(sc);
         ath9k_hw_startpcureceive(ah, !!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL));
 
-        spin_unlock_bh(&sc->rx.rxbuflock);
-
         return 0;
 }
 
+static void ath_flushrecv(struct ath_softc *sc)
+{
+        if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
+                ath_rx_tasklet(sc, 1, true);
+        ath_rx_tasklet(sc, 1, false);
+}
+
 bool ath_stoprecv(struct ath_softc *sc)
 {
         struct ath_hw *ah = sc->sc_ah;
         bool stopped, reset = false;
 
-        spin_lock_bh(&sc->rx.rxbuflock);
         ath9k_hw_abortpcurecv(ah);
         ath9k_hw_setrxfilter(ah, 0);
         stopped = ath9k_hw_stopdmarecv(ah, &reset);
 
+        ath_flushrecv(sc);
+
         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
                 ath_edma_stop_recv(sc);
         else
                 sc->rx.rxlink = NULL;
-        spin_unlock_bh(&sc->rx.rxbuflock);
 
         if (!(ah->ah_flags & AH_UNPLUGGED) &&
             unlikely(!stopped)) {
@@ -499,15 +489,6 @@ bool ath_stoprecv(struct ath_softc *sc)
         return stopped && !reset;
 }
 
-void ath_flushrecv(struct ath_softc *sc)
-{
-        set_bit(SC_OP_RXFLUSH, &sc->sc_flags);
-        if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
-                ath_rx_tasklet(sc, 1, true);
-        ath_rx_tasklet(sc, 1, false);
-        clear_bit(SC_OP_RXFLUSH, &sc->sc_flags);
-}
-
 static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
 {
         /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
@@ -744,6 +725,7 @@ static struct ath_buf *ath_get_next_rx_buf(struct ath_softc *sc,
                         return NULL;
         }
 
+        list_del(&bf->list);
         if (!bf->bf_mpdu)
                 return bf;
 
@@ -1034,6 +1016,108 @@ static void ath9k_rx_skb_postprocess(struct ath_common *common,
                 rxs->flag &= ~RX_FLAG_DECRYPTED;
 }
 
+static s8 fix_rssi_inv_only(u8 rssi_val)
+{
+        if (rssi_val == 128)
+                rssi_val = 0;
+        return (s8) rssi_val;
+}
+
+
+static void ath_process_fft(struct ath_softc *sc, struct ieee80211_hdr *hdr,
+                            struct ath_rx_status *rs, u64 tsf)
+{
+#ifdef CONFIG_ATH_DEBUG
+        struct ath_hw *ah = sc->sc_ah;
+        u8 bins[SPECTRAL_HT20_NUM_BINS];
+        u8 *vdata = (u8 *)hdr;
+        struct fft_sample_ht20 fft_sample;
+        struct ath_radar_info *radar_info;
+        struct ath_ht20_mag_info *mag_info;
+        int len = rs->rs_datalen;
+        int i, dc_pos;
+
+        /* AR9280 and before report via ATH9K_PHYERR_RADAR, AR93xx and newer
+         * via ATH9K_PHYERR_SPECTRAL. Haven't seen ATH9K_PHYERR_FALSE_RADAR_EXT
+         * yet, but this is supposed to be possible as well.
+         */
+        if (rs->rs_phyerr != ATH9K_PHYERR_RADAR &&
+            rs->rs_phyerr != ATH9K_PHYERR_FALSE_RADAR_EXT &&
+            rs->rs_phyerr != ATH9K_PHYERR_SPECTRAL)
+                return;
+
+        /* Variation in the data length is possible and will be fixed later.
+         * Note that we only support HT20 for now.
+         *
+         * TODO: add HT20_40 support as well.
+         */
+        if ((len > SPECTRAL_HT20_TOTAL_DATA_LEN + 2) ||
+            (len < SPECTRAL_HT20_TOTAL_DATA_LEN - 1))
+                return;
+
+        /* check if spectral scan bit is set. This does not have to be checked
+         * if received through a SPECTRAL phy error, but shouldn't hurt.
+         */
+        radar_info = ((struct ath_radar_info *)&vdata[len]) - 1;
+        if (!(radar_info->pulse_bw_info & SPECTRAL_SCAN_BITMASK))
+                return;
+
+        fft_sample.tlv.type = ATH_FFT_SAMPLE_HT20;
+        fft_sample.tlv.length = sizeof(fft_sample) - sizeof(fft_sample.tlv);
+
+        fft_sample.freq = ah->curchan->chan->center_freq;
+        fft_sample.rssi = fix_rssi_inv_only(rs->rs_rssi_ctl0);
+        fft_sample.noise = ah->noise;
+
+        switch (len - SPECTRAL_HT20_TOTAL_DATA_LEN) {
+        case 0:
+                /* length correct, nothing to do. */
+                memcpy(bins, vdata, SPECTRAL_HT20_NUM_BINS);
+                break;
+        case -1:
+                /* first byte missing, duplicate it. */
+                memcpy(&bins[1], vdata, SPECTRAL_HT20_NUM_BINS - 1);
+                bins[0] = vdata[0];
+                break;
+        case 2:
+                /* MAC added 2 extra bytes at bin 30 and 32, remove them. */
+                memcpy(bins, vdata, 30);
+                bins[30] = vdata[31];
+                memcpy(&bins[31], &vdata[33], SPECTRAL_HT20_NUM_BINS - 31);
+                break;
+        case 1:
+                /* MAC added 2 extra bytes AND first byte is missing. */
+                bins[0] = vdata[0];
+                memcpy(&bins[0], vdata, 30);
+                bins[31] = vdata[31];
+                memcpy(&bins[32], &vdata[33], SPECTRAL_HT20_NUM_BINS - 32);
+                break;
+        default:
+                return;
+        }
+
+        /* DC value (value in the middle) is the blind spot of the spectral
+         * sample and invalid, interpolate it.
+         */
+        dc_pos = SPECTRAL_HT20_NUM_BINS / 2;
+        bins[dc_pos] = (bins[dc_pos + 1] + bins[dc_pos - 1]) / 2;
+
+        /* mag data is at the end of the frame, in front of radar_info */
+        mag_info = ((struct ath_ht20_mag_info *)radar_info) - 1;
+
+        /* Apply exponent and grab further auxiliary information. */
+        for (i = 0; i < SPECTRAL_HT20_NUM_BINS; i++)
+                fft_sample.data[i] = bins[i] << mag_info->max_exp;
+
+        fft_sample.max_magnitude = spectral_max_magnitude(mag_info->all_bins);
+        fft_sample.max_index = spectral_max_index(mag_info->all_bins);
+        fft_sample.bitmap_weight = spectral_bitmap_weight(mag_info->all_bins);
+        fft_sample.tsf = tsf;
+
+        ath_debug_send_fft_sample(sc, &fft_sample.tlv);
+#endif
+}
+
 int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
 {
         struct ath_buf *bf;
@@ -1059,16 +1143,12 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
                 dma_type = DMA_FROM_DEVICE;
 
         qtype = hp ? ATH9K_RX_QUEUE_HP : ATH9K_RX_QUEUE_LP;
-        spin_lock_bh(&sc->rx.rxbuflock);
 
         tsf = ath9k_hw_gettsf64(ah);
         tsf_lower = tsf & 0xffffffff;
 
         do {
                 bool decrypt_error = false;
-                /* If handling rx interrupt and flush is in progress => exit */
-                if (test_bit(SC_OP_RXFLUSH, &sc->sc_flags) && (flush == 0))
-                        break;
 
                 memset(&rs, 0, sizeof(rs));
                 if (edma)
@@ -1111,15 +1191,6 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
 
                 ath_debug_stat_rx(sc, &rs);
 
-                /*
-                 * If we're asked to flush receive queue, directly
-                 * chain it back at the queue without processing it.
-                 */
-                if (test_bit(SC_OP_RXFLUSH, &sc->sc_flags)) {
-                        RX_STAT_INC(rx_drop_rxflush);
-                        goto requeue_drop_frag;
-                }
-
                 memset(rxs, 0, sizeof(struct ieee80211_rx_status));
 
                 rxs->mactime = (tsf & ~0xffffffffULL) | rs.rs_tstamp;
@@ -1131,6 +1202,9 @@ int ath_rx_tasklet(struct ath_softc *sc, int flush, bool hp)
                     unlikely(tsf_lower - rs.rs_tstamp > 0x10000000))
                         rxs->mactime += 0x100000000ULL;
 
+                if ((rs.rs_status & ATH9K_RXERR_PHY))
+                        ath_process_fft(sc, hdr, &rs, rxs->mactime);
+
                 retval = ath9k_rx_skb_preprocess(common, hw, hdr, &rs,
                                                  rxs, &decrypt_error);
                 if (retval)
@@ -1254,19 +1328,18 @@ requeue_drop_frag:
                         sc->rx.frag = NULL;
                 }
 requeue:
+                list_add_tail(&bf->list, &sc->rx.rxbuf);
+                if (flush)
+                        continue;
+
                 if (edma) {
-                        list_add_tail(&bf->list, &sc->rx.rxbuf);
                         ath_rx_edma_buf_link(sc, qtype);
                 } else {
-                        list_move_tail(&bf->list, &sc->rx.rxbuf);
                         ath_rx_buf_link(sc, bf);
-                        if (!flush)
-                                ath9k_hw_rxena(ah);
+                        ath9k_hw_rxena(ah);
                 }
         } while (1);
 
-        spin_unlock_bh(&sc->rx.rxbuflock);
-
         if (!(ah->imask & ATH9K_INT_RXEOL)) {
                 ah->imask |= (ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
                 ath9k_hw_set_interrupts(ah);
diff --git a/drivers/net/wireless/ath/ath9k/reg.h b/drivers/net/wireless/ath/ath9k/reg.h
index ad3c82c09177..5929850649f0 100644
--- a/drivers/net/wireless/ath/ath9k/reg.h
+++ b/drivers/net/wireless/ath/ath9k/reg.h
@@ -789,6 +789,7 @@
 #define AR_SREV_REVISION_9271_11        1
 #define AR_SREV_VERSION_9300            0x1c0
 #define AR_SREV_REVISION_9300_20        2 /* 2.0 and 2.1 */
+#define AR_SREV_REVISION_9300_22        3
 #define AR_SREV_VERSION_9330            0x200
 #define AR_SREV_REVISION_9330_10        0
 #define AR_SREV_REVISION_9330_11        1
@@ -869,6 +870,9 @@
         (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9300))
 #define AR_SREV_9300_20_OR_LATER(_ah) \
         ((_ah)->hw_version.macVersion >= AR_SREV_VERSION_9300)
+#define AR_SREV_9300_22(_ah) \
+        (AR_SREV_9300(ah) && \
+         ((_ah)->hw_version.macRev == AR_SREV_REVISION_9300_22))
 
 #define AR_SREV_9330(_ah) \
         (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9330))
@@ -884,9 +888,6 @@
 
 #define AR_SREV_9485(_ah) \
         (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9485))
-#define AR_SREV_9485_10(_ah) \
-        (AR_SREV_9485(_ah) && \
-         ((_ah)->hw_version.macRev == AR_SREV_REVISION_9485_10))
 #define AR_SREV_9485_11(_ah) \
         (AR_SREV_9485(_ah) && \
          ((_ah)->hw_version.macRev == AR_SREV_REVISION_9485_11))
diff --git a/drivers/net/wireless/ath/ath9k/xmit.c b/drivers/net/wireless/ath/ath9k/xmit.c
index 90e48a0fafe5..feacaafee959 100644
--- a/drivers/net/wireless/ath/ath9k/xmit.c
+++ b/drivers/net/wireless/ath/ath9k/xmit.c
@@ -378,7 +378,7 @@ static void ath_tx_count_frames(struct ath_softc *sc, struct ath_buf *bf,
 
 static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
                                  struct ath_buf *bf, struct list_head *bf_q,
-                                 struct ath_tx_status *ts, int txok, bool retry)
+                                 struct ath_tx_status *ts, int txok)
 {
         struct ath_node *an = NULL;
         struct sk_buff *skb;
@@ -490,7 +490,7 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
                 } else if (!isaggr && txok) {
                         /* transmit completion */
                         acked_cnt++;
-                } else if ((tid->state & AGGR_CLEANUP) || !retry) {
+                } else if (tid->state & AGGR_CLEANUP) {
                         /*
                          * cleanup in progress, just fail
                          * the un-acked sub-frames
@@ -604,6 +604,37 @@ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
                 ath9k_queue_reset(sc, RESET_TYPE_TX_ERROR);
 }
 
+static bool bf_is_ampdu_not_probing(struct ath_buf *bf)
+{
+    struct ieee80211_tx_info *info = IEEE80211_SKB_CB(bf->bf_mpdu);
+    return bf_isampdu(bf) && !(info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE);
+}
+
+static void ath_tx_process_buffer(struct ath_softc *sc, struct ath_txq *txq,
+                                  struct ath_tx_status *ts, struct ath_buf *bf,
+                                  struct list_head *bf_head)
+{
+        bool txok, flush;
+
+        txok = !(ts->ts_status & ATH9K_TXERR_MASK);
+        flush = !!(ts->ts_status & ATH9K_TX_FLUSH);
+        txq->axq_tx_inprogress = false;
+
+        txq->axq_depth--;
+        if (bf_is_ampdu_not_probing(bf))
+                txq->axq_ampdu_depth--;
+
+        if (!bf_isampdu(bf)) {
+                if (!flush)
+                        ath_tx_rc_status(sc, bf, ts, 1, txok ? 0 : 1, txok);
+                ath_tx_complete_buf(sc, bf, txq, bf_head, ts, txok);
+        } else
+                ath_tx_complete_aggr(sc, txq, bf, bf_head, ts, txok);
+
+        if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) && !flush)
+                ath_txq_schedule(sc, txq);
+}
+
 static bool ath_lookup_legacy(struct ath_buf *bf)
 {
         struct sk_buff *skb;
@@ -1331,23 +1362,6 @@ void ath_tx_aggr_resume(struct ath_softc *sc, struct ieee80211_sta *sta, u16 tid
 /* Queue Management */
 /********************/
 
-static void ath_txq_drain_pending_buffers(struct ath_softc *sc,
-                                          struct ath_txq *txq)
-{
-        struct ath_atx_ac *ac, *ac_tmp;
-        struct ath_atx_tid *tid, *tid_tmp;
-
-        list_for_each_entry_safe(ac, ac_tmp, &txq->axq_acq, list) {
-                list_del(&ac->list);
-                ac->sched = false;
-                list_for_each_entry_safe(tid, tid_tmp, &ac->tid_q, list) {
-                        list_del(&tid->list);
-                        tid->sched = false;
-                        ath_tid_drain(sc, txq, tid);
-                }
-        }
-}
-
 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype)
 {
         struct ath_hw *ah = sc->sc_ah;
@@ -1470,14 +1484,8 @@ int ath_cabq_update(struct ath_softc *sc)
         return 0;
 }
 
-static bool bf_is_ampdu_not_probing(struct ath_buf *bf)
-{
-    struct ieee80211_tx_info *info = IEEE80211_SKB_CB(bf->bf_mpdu);
-    return bf_isampdu(bf) && !(info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE);
-}
-
 static void ath_drain_txq_list(struct ath_softc *sc, struct ath_txq *txq,
-                               struct list_head *list, bool retry_tx)
+                               struct list_head *list)
 {
         struct ath_buf *bf, *lastbf;
         struct list_head bf_head;
@@ -1499,16 +1507,7 @@ static void ath_drain_txq_list(struct ath_softc *sc, struct ath_txq *txq,
 
                 lastbf = bf->bf_lastbf;
                 list_cut_position(&bf_head, list, &lastbf->list);
-
-                txq->axq_depth--;
-                if (bf_is_ampdu_not_probing(bf))
-                        txq->axq_ampdu_depth--;
-
-                if (bf_isampdu(bf))
-                        ath_tx_complete_aggr(sc, txq, bf, &bf_head, &ts, 0,
-                                             retry_tx);
-                else
-                        ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, 0);
+                ath_tx_process_buffer(sc, txq, &ts, bf, &bf_head);
         }
 }
 
@@ -1518,7 +1517,7 @@ static void ath_drain_txq_list(struct ath_softc *sc, struct ath_txq *txq,
  * This assumes output has been stopped and
  * we do not need to block ath_tx_tasklet.
  */
-void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq, bool retry_tx)
+void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq)
 {
         ath_txq_lock(sc, txq);
 
@@ -1526,8 +1525,7 @@ void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq, bool retry_tx)
                 int idx = txq->txq_tailidx;
 
                 while (!list_empty(&txq->txq_fifo[idx])) {
-                        ath_drain_txq_list(sc, txq, &txq->txq_fifo[idx],
-                                           retry_tx);
+                        ath_drain_txq_list(sc, txq, &txq->txq_fifo[idx]);
 
                         INCR(idx, ATH_TXFIFO_DEPTH);
                 }
@@ -1536,16 +1534,12 @@ void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq, bool retry_tx)
 
         txq->axq_link = NULL;
         txq->axq_tx_inprogress = false;
-        ath_drain_txq_list(sc, txq, &txq->axq_q, retry_tx);
-
-        /* flush any pending frames if aggregation is enabled */
-        if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) && !retry_tx)
-                ath_txq_drain_pending_buffers(sc, txq);
+        ath_drain_txq_list(sc, txq, &txq->axq_q);
 
         ath_txq_unlock_complete(sc, txq);
 }
 
-bool ath_drain_all_txq(struct ath_softc *sc, bool retry_tx)
+bool ath_drain_all_txq(struct ath_softc *sc)
 {
         struct ath_hw *ah = sc->sc_ah;
         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
@@ -1581,7 +1575,7 @@ bool ath_drain_all_txq(struct ath_softc *sc, bool retry_tx)
                  */
                 txq = &sc->tx.txq[i];
                 txq->stopped = false;
-                ath_draintxq(sc, txq, retry_tx);
+                ath_draintxq(sc, txq);
         }
 
         return !npend;
@@ -2175,28 +2169,6 @@ static void ath_tx_rc_status(struct ath_softc *sc, struct ath_buf *bf,
         tx_info->status.rates[tx_rateindex].count = ts->ts_longretry + 1;
 }
 
-static void ath_tx_process_buffer(struct ath_softc *sc, struct ath_txq *txq,
-                                  struct ath_tx_status *ts, struct ath_buf *bf,
-                                  struct list_head *bf_head)
-{
-        int txok;
-
-        txq->axq_depth--;
-        txok = !(ts->ts_status & ATH9K_TXERR_MASK);
-        txq->axq_tx_inprogress = false;
-        if (bf_is_ampdu_not_probing(bf))
-                txq->axq_ampdu_depth--;
-
-        if (!bf_isampdu(bf)) {
-                ath_tx_rc_status(sc, bf, ts, 1, txok ? 0 : 1, txok);
-                ath_tx_complete_buf(sc, bf, txq, bf_head, ts, txok);
-        } else
-                ath_tx_complete_aggr(sc, txq, bf, bf_head, ts, txok, true);
-
-        if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT)
-                ath_txq_schedule(sc, txq);
-}
-
 static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
 {
         struct ath_hw *ah = sc->sc_ah;
@@ -2361,8 +2333,8 @@ static int ath_txstatus_setup(struct ath_softc *sc, int size)
         u8 txs_len = sc->sc_ah->caps.txs_len;
 
         dd->dd_desc_len = size * txs_len;
-        dd->dd_desc = dma_alloc_coherent(sc->dev, dd->dd_desc_len,
-                                         &dd->dd_desc_paddr, GFP_KERNEL);
+        dd->dd_desc = dmam_alloc_coherent(sc->dev, dd->dd_desc_len,
+                                          &dd->dd_desc_paddr, GFP_KERNEL);
         if (!dd->dd_desc)
                 return -ENOMEM;
 
@@ -2382,14 +2354,6 @@ static int ath_tx_edma_init(struct ath_softc *sc)
         return err;
 }
 
-static void ath_tx_edma_cleanup(struct ath_softc *sc)
-{
-        struct ath_descdma *dd = &sc->txsdma;
-
-        dma_free_coherent(sc->dev, dd->dd_desc_len, dd->dd_desc,
-                          dd->dd_desc_paddr);
-}
-
 int ath_tx_init(struct ath_softc *sc, int nbufs)
 {
         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
@@ -2402,7 +2366,7 @@ int ath_tx_init(struct ath_softc *sc, int nbufs)
         if (error != 0) {
                 ath_err(common,
                         "Failed to allocate tx descriptors: %d\n", error);
-                goto err;
+                return error;
         }
 
         error = ath_descdma_setup(sc, &sc->beacon.bdma, &sc->beacon.bbuf,
@@ -2410,36 +2374,17 @@ int ath_tx_init(struct ath_softc *sc, int nbufs)
         if (error != 0) {
                 ath_err(common,
                         "Failed to allocate beacon descriptors: %d\n", error);
-                goto err;
+                return error;
         }
 
         INIT_DELAYED_WORK(&sc->tx_complete_work, ath_tx_complete_poll_work);
 
-        if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
+        if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
                 error = ath_tx_edma_init(sc);
-                if (error)
-                        goto err;
-        }
-
-err:
-        if (error != 0)
-                ath_tx_cleanup(sc);
 
         return error;
 }
 
-void ath_tx_cleanup(struct ath_softc *sc)
-{
-        if (sc->beacon.bdma.dd_desc_len != 0)
-                ath_descdma_cleanup(sc, &sc->beacon.bdma, &sc->beacon.bbuf);
-
-        if (sc->tx.txdma.dd_desc_len != 0)
-                ath_descdma_cleanup(sc, &sc->tx.txdma, &sc->tx.txbuf);
-
-        if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
-                ath_tx_edma_cleanup(sc);
-}
-
 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an)
 {
         struct ath_atx_tid *tid;