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Diffstat (limited to 'drivers/net/wireless/ath/ath9k/hw.h')
-rw-r--r--drivers/net/wireless/ath/ath9k/hw.h82
1 files changed, 26 insertions, 56 deletions
diff --git a/drivers/net/wireless/ath/ath9k/hw.h b/drivers/net/wireless/ath/ath9k/hw.h
index 2babf931b459..81fcbc756122 100644
--- a/drivers/net/wireless/ath/ath9k/hw.h
+++ b/drivers/net/wireless/ath/ath9k/hw.h
@@ -369,36 +369,6 @@ enum ath9k_int {
369 ATH9K_INT_NOCARD = 0xffffffff 369 ATH9K_INT_NOCARD = 0xffffffff
370}; 370};
371 371
372#define CHANNEL_CCK 0x00020
373#define CHANNEL_OFDM 0x00040
374#define CHANNEL_2GHZ 0x00080
375#define CHANNEL_5GHZ 0x00100
376#define CHANNEL_PASSIVE 0x00200
377#define CHANNEL_DYN 0x00400
378#define CHANNEL_HALF 0x04000
379#define CHANNEL_QUARTER 0x08000
380#define CHANNEL_HT20 0x10000
381#define CHANNEL_HT40PLUS 0x20000
382#define CHANNEL_HT40MINUS 0x40000
383
384#define CHANNEL_A (CHANNEL_5GHZ|CHANNEL_OFDM)
385#define CHANNEL_B (CHANNEL_2GHZ|CHANNEL_CCK)
386#define CHANNEL_G (CHANNEL_2GHZ|CHANNEL_OFDM)
387#define CHANNEL_G_HT20 (CHANNEL_2GHZ|CHANNEL_HT20)
388#define CHANNEL_A_HT20 (CHANNEL_5GHZ|CHANNEL_HT20)
389#define CHANNEL_G_HT40PLUS (CHANNEL_2GHZ|CHANNEL_HT40PLUS)
390#define CHANNEL_G_HT40MINUS (CHANNEL_2GHZ|CHANNEL_HT40MINUS)
391#define CHANNEL_A_HT40PLUS (CHANNEL_5GHZ|CHANNEL_HT40PLUS)
392#define CHANNEL_A_HT40MINUS (CHANNEL_5GHZ|CHANNEL_HT40MINUS)
393#define CHANNEL_ALL \
394 (CHANNEL_OFDM| \
395 CHANNEL_CCK| \
396 CHANNEL_2GHZ | \
397 CHANNEL_5GHZ | \
398 CHANNEL_HT20 | \
399 CHANNEL_HT40PLUS | \
400 CHANNEL_HT40MINUS)
401
402#define MAX_RTT_TABLE_ENTRY 6 372#define MAX_RTT_TABLE_ENTRY 6
403#define MAX_IQCAL_MEASUREMENT 8 373#define MAX_IQCAL_MEASUREMENT 8
404#define MAX_CL_TAB_ENTRY 16 374#define MAX_CL_TAB_ENTRY 16
@@ -417,8 +387,7 @@ enum ath9k_cal_flags {
417 387
418struct ath9k_hw_cal_data { 388struct ath9k_hw_cal_data {
419 u16 channel; 389 u16 channel;
420 u32 channelFlags; 390 u16 channelFlags;
421 u32 chanmode;
422 unsigned long cal_flags; 391 unsigned long cal_flags;
423 int32_t CalValid; 392 int32_t CalValid;
424 int8_t iCoff; 393 int8_t iCoff;
@@ -436,33 +405,34 @@ struct ath9k_hw_cal_data {
436struct ath9k_channel { 405struct ath9k_channel {
437 struct ieee80211_channel *chan; 406 struct ieee80211_channel *chan;
438 u16 channel; 407 u16 channel;
439 u32 channelFlags; 408 u16 channelFlags;
440 u32 chanmode;
441 s16 noisefloor; 409 s16 noisefloor;
442}; 410};
443 411
444#define IS_CHAN_G(_c) ((((_c)->channelFlags & (CHANNEL_G)) == CHANNEL_G) || \ 412#define CHANNEL_5GHZ BIT(0)
445 (((_c)->channelFlags & CHANNEL_G_HT20) == CHANNEL_G_HT20) || \ 413#define CHANNEL_HALF BIT(1)
446 (((_c)->channelFlags & CHANNEL_G_HT40PLUS) == CHANNEL_G_HT40PLUS) || \ 414#define CHANNEL_QUARTER BIT(2)
447 (((_c)->channelFlags & CHANNEL_G_HT40MINUS) == CHANNEL_G_HT40MINUS)) 415#define CHANNEL_HT BIT(3)
448#define IS_CHAN_OFDM(_c) (((_c)->channelFlags & CHANNEL_OFDM) != 0) 416#define CHANNEL_HT40PLUS BIT(4)
449#define IS_CHAN_5GHZ(_c) (((_c)->channelFlags & CHANNEL_5GHZ) != 0) 417#define CHANNEL_HT40MINUS BIT(5)
450#define IS_CHAN_2GHZ(_c) (((_c)->channelFlags & CHANNEL_2GHZ) != 0) 418
451#define IS_CHAN_HALF_RATE(_c) (((_c)->channelFlags & CHANNEL_HALF) != 0) 419#define IS_CHAN_5GHZ(_c) (!!((_c)->channelFlags & CHANNEL_5GHZ))
452#define IS_CHAN_QUARTER_RATE(_c) (((_c)->channelFlags & CHANNEL_QUARTER) != 0) 420#define IS_CHAN_2GHZ(_c) (!IS_CHAN_5GHZ(_c))
421
422#define IS_CHAN_HALF_RATE(_c) (!!((_c)->channelFlags & CHANNEL_HALF))
423#define IS_CHAN_QUARTER_RATE(_c) (!!((_c)->channelFlags & CHANNEL_QUARTER))
453#define IS_CHAN_A_FAST_CLOCK(_ah, _c) \ 424#define IS_CHAN_A_FAST_CLOCK(_ah, _c) \
454 ((((_c)->channelFlags & CHANNEL_5GHZ) != 0) && \ 425 (IS_CHAN_5GHZ(_c) && ((_ah)->caps.hw_caps & ATH9K_HW_CAP_FASTCLOCK))
455 ((_ah)->caps.hw_caps & ATH9K_HW_CAP_FASTCLOCK)) 426
456 427#define IS_CHAN_HT(_c) ((_c)->channelFlags & CHANNEL_HT)
457/* These macros check chanmode and not channelFlags */ 428
458#define IS_CHAN_B(_c) ((_c)->chanmode == CHANNEL_B) 429#define IS_CHAN_HT20(_c) (IS_CHAN_HT(_c) && !IS_CHAN_HT40(_c))
459#define IS_CHAN_HT20(_c) (((_c)->chanmode == CHANNEL_A_HT20) || \ 430
460 ((_c)->chanmode == CHANNEL_G_HT20)) 431#define IS_CHAN_HT40(_c) \
461#define IS_CHAN_HT40(_c) (((_c)->chanmode == CHANNEL_A_HT40PLUS) || \ 432 (!!((_c)->channelFlags & (CHANNEL_HT40PLUS | CHANNEL_HT40MINUS)))
462 ((_c)->chanmode == CHANNEL_A_HT40MINUS) || \ 433
463 ((_c)->chanmode == CHANNEL_G_HT40PLUS) || \ 434#define IS_CHAN_HT40PLUS(_c) ((_c)->channelFlags & CHANNEL_HT40PLUS)
464 ((_c)->chanmode == CHANNEL_G_HT40MINUS)) 435#define IS_CHAN_HT40MINUS(_c) ((_c)->channelFlags & CHANNEL_HT40MINUS)
465#define IS_CHAN_HT(_c) (IS_CHAN_HT20((_c)) || IS_CHAN_HT40((_c)))
466 436
467enum ath9k_power_mode { 437enum ath9k_power_mode {
468 ATH9K_PM_AWAKE = 0, 438 ATH9K_PM_AWAKE = 0,
@@ -1033,7 +1003,7 @@ void ath9k_hw_reset_tsf(struct ath_hw *ah);
1033void ath9k_hw_set_tsfadjust(struct ath_hw *ah, bool set); 1003void ath9k_hw_set_tsfadjust(struct ath_hw *ah, bool set);
1034void ath9k_hw_init_global_settings(struct ath_hw *ah); 1004void ath9k_hw_init_global_settings(struct ath_hw *ah);
1035u32 ar9003_get_pll_sqsum_dvc(struct ath_hw *ah); 1005u32 ar9003_get_pll_sqsum_dvc(struct ath_hw *ah);
1036void ath9k_hw_set11nmac2040(struct ath_hw *ah); 1006void ath9k_hw_set11nmac2040(struct ath_hw *ah, struct ath9k_channel *chan);
1037void ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period); 1007void ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period);
1038void ath9k_hw_set_sta_beacon_timers(struct ath_hw *ah, 1008void ath9k_hw_set_sta_beacon_timers(struct ath_hw *ah,
1039 const struct ath9k_beacon_state *bs); 1009 const struct ath9k_beacon_state *bs);