1 files changed, 50 insertions, 0 deletions

diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
index 11f53589a3f3..d39b79f5e841 100644
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
@@ -701,6 +701,54 @@ static int ar9550_hw_get_modes_txgain_index(struct ath_hw *ah,
         return ret;
 }
 
+static void ar9003_doubler_fix(struct ath_hw *ah)
+{
+        if (AR_SREV_9300(ah) || AR_SREV_9580(ah) || AR_SREV_9550(ah)) {
+                REG_RMW(ah, AR_PHY_65NM_CH0_RXTX2,
+                        1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
+                        1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S, 0);
+                REG_RMW(ah, AR_PHY_65NM_CH1_RXTX2,
+                        1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
+                        1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S, 0);
+                REG_RMW(ah, AR_PHY_65NM_CH2_RXTX2,
+                        1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
+                        1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S, 0);
+
+                udelay(200);
+
+                REG_CLR_BIT(ah, AR_PHY_65NM_CH0_RXTX2,
+                            AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK);
+                REG_CLR_BIT(ah, AR_PHY_65NM_CH1_RXTX2,
+                            AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK);
+                REG_CLR_BIT(ah, AR_PHY_65NM_CH2_RXTX2,
+                            AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK);
+
+                udelay(1);
+
+                REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_RXTX2,
+                              AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK, 1);
+                REG_RMW_FIELD(ah, AR_PHY_65NM_CH1_RXTX2,
+                              AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK, 1);
+                REG_RMW_FIELD(ah, AR_PHY_65NM_CH2_RXTX2,
+                              AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK, 1);
+
+                udelay(200);
+
+                REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_SYNTH12,
+                              AR_PHY_65NM_CH0_SYNTH12_VREFMUL3, 0xf);
+
+                REG_RMW(ah, AR_PHY_65NM_CH0_RXTX2, 0,
+                        1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
+                        1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S);
+                REG_RMW(ah, AR_PHY_65NM_CH1_RXTX2, 0,
+                        1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
+                        1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S);
+                REG_RMW(ah, AR_PHY_65NM_CH2_RXTX2, 0,
+                        1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
+                        1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S);
+        }
+}
+
 static int ar9003_hw_process_ini(struct ath_hw *ah,
                                  struct ath9k_channel *chan)
 {
@@ -726,6 +774,8 @@ static int ar9003_hw_process_ini(struct ath_hw *ah,
                                            modesIndex);
         }
 
+        ar9003_doubler_fix(ah);
+
         /*
          * RXGAIN initvals.
          */