diff options
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/ar9003_eeprom.c')
-rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9003_eeprom.c | 76 |
1 files changed, 35 insertions, 41 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c index 4ba6f52943a8..391def99314c 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c | |||
@@ -3043,8 +3043,7 @@ static bool ar9300_read_eeprom(struct ath_hw *ah, int address, u8 *buffer, | |||
3043 | int i; | 3043 | int i; |
3044 | 3044 | ||
3045 | if ((address < 0) || ((address + count) / 2 > AR9300_EEPROM_SIZE - 1)) { | 3045 | if ((address < 0) || ((address + count) / 2 > AR9300_EEPROM_SIZE - 1)) { |
3046 | ath_dbg(common, ATH_DBG_EEPROM, | 3046 | ath_dbg(common, EEPROM, "eeprom address not in range\n"); |
3047 | "eeprom address not in range\n"); | ||
3048 | return false; | 3047 | return false; |
3049 | } | 3048 | } |
3050 | 3049 | ||
@@ -3075,8 +3074,8 @@ static bool ar9300_read_eeprom(struct ath_hw *ah, int address, u8 *buffer, | |||
3075 | return true; | 3074 | return true; |
3076 | 3075 | ||
3077 | error: | 3076 | error: |
3078 | ath_dbg(common, ATH_DBG_EEPROM, | 3077 | ath_dbg(common, EEPROM, "unable to read eeprom region at offset %d\n", |
3079 | "unable to read eeprom region at offset %d\n", address); | 3078 | address); |
3080 | return false; | 3079 | return false; |
3081 | } | 3080 | } |
3082 | 3081 | ||
@@ -3160,13 +3159,13 @@ static bool ar9300_uncompress_block(struct ath_hw *ah, | |||
3160 | length &= 0xff; | 3159 | length &= 0xff; |
3161 | 3160 | ||
3162 | if (length > 0 && spot >= 0 && spot+length <= mdataSize) { | 3161 | if (length > 0 && spot >= 0 && spot+length <= mdataSize) { |
3163 | ath_dbg(common, ATH_DBG_EEPROM, | 3162 | ath_dbg(common, EEPROM, |
3164 | "Restore at %d: spot=%d offset=%d length=%d\n", | 3163 | "Restore at %d: spot=%d offset=%d length=%d\n", |
3165 | it, spot, offset, length); | 3164 | it, spot, offset, length); |
3166 | memcpy(&mptr[spot], &block[it+2], length); | 3165 | memcpy(&mptr[spot], &block[it+2], length); |
3167 | spot += length; | 3166 | spot += length; |
3168 | } else if (length > 0) { | 3167 | } else if (length > 0) { |
3169 | ath_dbg(common, ATH_DBG_EEPROM, | 3168 | ath_dbg(common, EEPROM, |
3170 | "Bad restore at %d: spot=%d offset=%d length=%d\n", | 3169 | "Bad restore at %d: spot=%d offset=%d length=%d\n", |
3171 | it, spot, offset, length); | 3170 | it, spot, offset, length); |
3172 | return false; | 3171 | return false; |
@@ -3188,13 +3187,13 @@ static int ar9300_compress_decision(struct ath_hw *ah, | |||
3188 | switch (code) { | 3187 | switch (code) { |
3189 | case _CompressNone: | 3188 | case _CompressNone: |
3190 | if (length != mdata_size) { | 3189 | if (length != mdata_size) { |
3191 | ath_dbg(common, ATH_DBG_EEPROM, | 3190 | ath_dbg(common, EEPROM, |
3192 | "EEPROM structure size mismatch memory=%d eeprom=%d\n", | 3191 | "EEPROM structure size mismatch memory=%d eeprom=%d\n", |
3193 | mdata_size, length); | 3192 | mdata_size, length); |
3194 | return -1; | 3193 | return -1; |
3195 | } | 3194 | } |
3196 | memcpy(mptr, (u8 *) (word + COMP_HDR_LEN), length); | 3195 | memcpy(mptr, (u8 *) (word + COMP_HDR_LEN), length); |
3197 | ath_dbg(common, ATH_DBG_EEPROM, | 3196 | ath_dbg(common, EEPROM, |
3198 | "restored eeprom %d: uncompressed, length %d\n", | 3197 | "restored eeprom %d: uncompressed, length %d\n", |
3199 | it, length); | 3198 | it, length); |
3200 | break; | 3199 | break; |
@@ -3203,22 +3202,21 @@ static int ar9300_compress_decision(struct ath_hw *ah, | |||
3203 | } else { | 3202 | } else { |
3204 | eep = ar9003_eeprom_struct_find_by_id(reference); | 3203 | eep = ar9003_eeprom_struct_find_by_id(reference); |
3205 | if (eep == NULL) { | 3204 | if (eep == NULL) { |
3206 | ath_dbg(common, ATH_DBG_EEPROM, | 3205 | ath_dbg(common, EEPROM, |
3207 | "can't find reference eeprom struct %d\n", | 3206 | "can't find reference eeprom struct %d\n", |
3208 | reference); | 3207 | reference); |
3209 | return -1; | 3208 | return -1; |
3210 | } | 3209 | } |
3211 | memcpy(mptr, eep, mdata_size); | 3210 | memcpy(mptr, eep, mdata_size); |
3212 | } | 3211 | } |
3213 | ath_dbg(common, ATH_DBG_EEPROM, | 3212 | ath_dbg(common, EEPROM, |
3214 | "restore eeprom %d: block, reference %d, length %d\n", | 3213 | "restore eeprom %d: block, reference %d, length %d\n", |
3215 | it, reference, length); | 3214 | it, reference, length); |
3216 | ar9300_uncompress_block(ah, mptr, mdata_size, | 3215 | ar9300_uncompress_block(ah, mptr, mdata_size, |
3217 | (u8 *) (word + COMP_HDR_LEN), length); | 3216 | (u8 *) (word + COMP_HDR_LEN), length); |
3218 | break; | 3217 | break; |
3219 | default: | 3218 | default: |
3220 | ath_dbg(common, ATH_DBG_EEPROM, | 3219 | ath_dbg(common, EEPROM, "unknown compression code %d\n", code); |
3221 | "unknown compression code %d\n", code); | ||
3222 | return -1; | 3220 | return -1; |
3223 | } | 3221 | } |
3224 | return 0; | 3222 | return 0; |
@@ -3294,34 +3292,32 @@ static int ar9300_eeprom_restore_internal(struct ath_hw *ah, | |||
3294 | cptr = AR9300_BASE_ADDR_512; | 3292 | cptr = AR9300_BASE_ADDR_512; |
3295 | else | 3293 | else |
3296 | cptr = AR9300_BASE_ADDR; | 3294 | cptr = AR9300_BASE_ADDR; |
3297 | ath_dbg(common, ATH_DBG_EEPROM, | 3295 | ath_dbg(common, EEPROM, "Trying EEPROM access at Address 0x%04x\n", |
3298 | "Trying EEPROM access at Address 0x%04x\n", cptr); | 3296 | cptr); |
3299 | if (ar9300_check_eeprom_header(ah, read, cptr)) | 3297 | if (ar9300_check_eeprom_header(ah, read, cptr)) |
3300 | goto found; | 3298 | goto found; |
3301 | 3299 | ||
3302 | cptr = AR9300_BASE_ADDR_512; | 3300 | cptr = AR9300_BASE_ADDR_512; |
3303 | ath_dbg(common, ATH_DBG_EEPROM, | 3301 | ath_dbg(common, EEPROM, "Trying EEPROM access at Address 0x%04x\n", |
3304 | "Trying EEPROM access at Address 0x%04x\n", cptr); | 3302 | cptr); |
3305 | if (ar9300_check_eeprom_header(ah, read, cptr)) | 3303 | if (ar9300_check_eeprom_header(ah, read, cptr)) |
3306 | goto found; | 3304 | goto found; |
3307 | 3305 | ||
3308 | read = ar9300_read_otp; | 3306 | read = ar9300_read_otp; |
3309 | cptr = AR9300_BASE_ADDR; | 3307 | cptr = AR9300_BASE_ADDR; |
3310 | ath_dbg(common, ATH_DBG_EEPROM, | 3308 | ath_dbg(common, EEPROM, "Trying OTP access at Address 0x%04x\n", cptr); |
3311 | "Trying OTP access at Address 0x%04x\n", cptr); | ||
3312 | if (ar9300_check_eeprom_header(ah, read, cptr)) | 3309 | if (ar9300_check_eeprom_header(ah, read, cptr)) |
3313 | goto found; | 3310 | goto found; |
3314 | 3311 | ||
3315 | cptr = AR9300_BASE_ADDR_512; | 3312 | cptr = AR9300_BASE_ADDR_512; |
3316 | ath_dbg(common, ATH_DBG_EEPROM, | 3313 | ath_dbg(common, EEPROM, "Trying OTP access at Address 0x%04x\n", cptr); |
3317 | "Trying OTP access at Address 0x%04x\n", cptr); | ||
3318 | if (ar9300_check_eeprom_header(ah, read, cptr)) | 3314 | if (ar9300_check_eeprom_header(ah, read, cptr)) |
3319 | goto found; | 3315 | goto found; |
3320 | 3316 | ||
3321 | goto fail; | 3317 | goto fail; |
3322 | 3318 | ||
3323 | found: | 3319 | found: |
3324 | ath_dbg(common, ATH_DBG_EEPROM, "Found valid EEPROM data\n"); | 3320 | ath_dbg(common, EEPROM, "Found valid EEPROM data\n"); |
3325 | 3321 | ||
3326 | for (it = 0; it < MSTATE; it++) { | 3322 | for (it = 0; it < MSTATE; it++) { |
3327 | if (!read(ah, cptr, word, COMP_HDR_LEN)) | 3323 | if (!read(ah, cptr, word, COMP_HDR_LEN)) |
@@ -3332,13 +3328,12 @@ found: | |||
3332 | 3328 | ||
3333 | ar9300_comp_hdr_unpack(word, &code, &reference, | 3329 | ar9300_comp_hdr_unpack(word, &code, &reference, |
3334 | &length, &major, &minor); | 3330 | &length, &major, &minor); |
3335 | ath_dbg(common, ATH_DBG_EEPROM, | 3331 | ath_dbg(common, EEPROM, |
3336 | "Found block at %x: code=%d ref=%d length=%d major=%d minor=%d\n", | 3332 | "Found block at %x: code=%d ref=%d length=%d major=%d minor=%d\n", |
3337 | cptr, code, reference, length, major, minor); | 3333 | cptr, code, reference, length, major, minor); |
3338 | if ((!AR_SREV_9485(ah) && length >= 1024) || | 3334 | if ((!AR_SREV_9485(ah) && length >= 1024) || |
3339 | (AR_SREV_9485(ah) && length > EEPROM_DATA_LEN_9485)) { | 3335 | (AR_SREV_9485(ah) && length > EEPROM_DATA_LEN_9485)) { |
3340 | ath_dbg(common, ATH_DBG_EEPROM, | 3336 | ath_dbg(common, EEPROM, "Skipping bad header\n"); |
3341 | "Skipping bad header\n"); | ||
3342 | cptr -= COMP_HDR_LEN; | 3337 | cptr -= COMP_HDR_LEN; |
3343 | continue; | 3338 | continue; |
3344 | } | 3339 | } |
@@ -3347,13 +3342,13 @@ found: | |||
3347 | read(ah, cptr, word, COMP_HDR_LEN + osize + COMP_CKSUM_LEN); | 3342 | read(ah, cptr, word, COMP_HDR_LEN + osize + COMP_CKSUM_LEN); |
3348 | checksum = ar9300_comp_cksum(&word[COMP_HDR_LEN], length); | 3343 | checksum = ar9300_comp_cksum(&word[COMP_HDR_LEN], length); |
3349 | mchecksum = get_unaligned_le16(&word[COMP_HDR_LEN + osize]); | 3344 | mchecksum = get_unaligned_le16(&word[COMP_HDR_LEN + osize]); |
3350 | ath_dbg(common, ATH_DBG_EEPROM, | 3345 | ath_dbg(common, EEPROM, "checksum %x %x\n", |
3351 | "checksum %x %x\n", checksum, mchecksum); | 3346 | checksum, mchecksum); |
3352 | if (checksum == mchecksum) { | 3347 | if (checksum == mchecksum) { |
3353 | ar9300_compress_decision(ah, it, code, reference, mptr, | 3348 | ar9300_compress_decision(ah, it, code, reference, mptr, |
3354 | word, length, mdata_size); | 3349 | word, length, mdata_size); |
3355 | } else { | 3350 | } else { |
3356 | ath_dbg(common, ATH_DBG_EEPROM, | 3351 | ath_dbg(common, EEPROM, |
3357 | "skipping block with bad checksum\n"); | 3352 | "skipping block with bad checksum\n"); |
3358 | } | 3353 | } |
3359 | cptr -= (COMP_HDR_LEN + osize + COMP_CKSUM_LEN); | 3354 | cptr -= (COMP_HDR_LEN + osize + COMP_CKSUM_LEN); |
@@ -4424,8 +4419,8 @@ static void ar9003_hw_set_target_power_eeprom(struct ath_hw *ah, u16 freq, | |||
4424 | is2GHz) + ht40PowerIncForPdadc; | 4419 | is2GHz) + ht40PowerIncForPdadc; |
4425 | 4420 | ||
4426 | for (i = 0; i < ar9300RateSize; i++) { | 4421 | for (i = 0; i < ar9300RateSize; i++) { |
4427 | ath_dbg(common, ATH_DBG_EEPROM, | 4422 | ath_dbg(common, EEPROM, "TPC[%02d] 0x%08x\n", |
4428 | "TPC[%02d] 0x%08x\n", i, targetPowerValT2[i]); | 4423 | i, targetPowerValT2[i]); |
4429 | } | 4424 | } |
4430 | } | 4425 | } |
4431 | 4426 | ||
@@ -4444,7 +4439,7 @@ static int ar9003_hw_cal_pier_get(struct ath_hw *ah, | |||
4444 | struct ath_common *common = ath9k_hw_common(ah); | 4439 | struct ath_common *common = ath9k_hw_common(ah); |
4445 | 4440 | ||
4446 | if (ichain >= AR9300_MAX_CHAINS) { | 4441 | if (ichain >= AR9300_MAX_CHAINS) { |
4447 | ath_dbg(common, ATH_DBG_EEPROM, | 4442 | ath_dbg(common, EEPROM, |
4448 | "Invalid chain index, must be less than %d\n", | 4443 | "Invalid chain index, must be less than %d\n", |
4449 | AR9300_MAX_CHAINS); | 4444 | AR9300_MAX_CHAINS); |
4450 | return -1; | 4445 | return -1; |
@@ -4452,7 +4447,7 @@ static int ar9003_hw_cal_pier_get(struct ath_hw *ah, | |||
4452 | 4447 | ||
4453 | if (mode) { /* 5GHz */ | 4448 | if (mode) { /* 5GHz */ |
4454 | if (ipier >= AR9300_NUM_5G_CAL_PIERS) { | 4449 | if (ipier >= AR9300_NUM_5G_CAL_PIERS) { |
4455 | ath_dbg(common, ATH_DBG_EEPROM, | 4450 | ath_dbg(common, EEPROM, |
4456 | "Invalid 5GHz cal pier index, must be less than %d\n", | 4451 | "Invalid 5GHz cal pier index, must be less than %d\n", |
4457 | AR9300_NUM_5G_CAL_PIERS); | 4452 | AR9300_NUM_5G_CAL_PIERS); |
4458 | return -1; | 4453 | return -1; |
@@ -4462,7 +4457,7 @@ static int ar9003_hw_cal_pier_get(struct ath_hw *ah, | |||
4462 | is2GHz = 0; | 4457 | is2GHz = 0; |
4463 | } else { | 4458 | } else { |
4464 | if (ipier >= AR9300_NUM_2G_CAL_PIERS) { | 4459 | if (ipier >= AR9300_NUM_2G_CAL_PIERS) { |
4465 | ath_dbg(common, ATH_DBG_EEPROM, | 4460 | ath_dbg(common, EEPROM, |
4466 | "Invalid 2GHz cal pier index, must be less than %d\n", | 4461 | "Invalid 2GHz cal pier index, must be less than %d\n", |
4467 | AR9300_NUM_2G_CAL_PIERS); | 4462 | AR9300_NUM_2G_CAL_PIERS); |
4468 | return -1; | 4463 | return -1; |
@@ -4624,8 +4619,7 @@ static int ar9003_hw_calibration_apply(struct ath_hw *ah, int frequency) | |||
4624 | 4619 | ||
4625 | /* interpolate */ | 4620 | /* interpolate */ |
4626 | for (ichain = 0; ichain < AR9300_MAX_CHAINS; ichain++) { | 4621 | for (ichain = 0; ichain < AR9300_MAX_CHAINS; ichain++) { |
4627 | ath_dbg(common, ATH_DBG_EEPROM, | 4622 | ath_dbg(common, EEPROM, "ch=%d f=%d low=%d %d h=%d %d\n", |
4628 | "ch=%d f=%d low=%d %d h=%d %d\n", | ||
4629 | ichain, frequency, lfrequency[ichain], | 4623 | ichain, frequency, lfrequency[ichain], |
4630 | lcorrection[ichain], hfrequency[ichain], | 4624 | lcorrection[ichain], hfrequency[ichain], |
4631 | hcorrection[ichain]); | 4625 | hcorrection[ichain]); |
@@ -4680,7 +4674,7 @@ static int ar9003_hw_calibration_apply(struct ath_hw *ah, int frequency) | |||
4680 | ar9003_hw_power_control_override(ah, frequency, correction, voltage, | 4674 | ar9003_hw_power_control_override(ah, frequency, correction, voltage, |
4681 | temperature); | 4675 | temperature); |
4682 | 4676 | ||
4683 | ath_dbg(common, ATH_DBG_EEPROM, | 4677 | ath_dbg(common, EEPROM, |
4684 | "for frequency=%d, calibration correction = %d %d %d\n", | 4678 | "for frequency=%d, calibration correction = %d %d %d\n", |
4685 | frequency, correction[0], correction[1], correction[2]); | 4679 | frequency, correction[0], correction[1], correction[2]); |
4686 | 4680 | ||
@@ -4866,7 +4860,7 @@ static void ar9003_hw_set_power_per_rate_table(struct ath_hw *ah, | |||
4866 | else | 4860 | else |
4867 | freq = centers.ctl_center; | 4861 | freq = centers.ctl_center; |
4868 | 4862 | ||
4869 | ath_dbg(common, ATH_DBG_REGULATORY, | 4863 | ath_dbg(common, REGULATORY, |
4870 | "LOOP-Mode ctlMode %d < %d, isHt40CtlMode %d, EXT_ADDITIVE %d\n", | 4864 | "LOOP-Mode ctlMode %d < %d, isHt40CtlMode %d, EXT_ADDITIVE %d\n", |
4871 | ctlMode, numCtlModes, isHt40CtlMode, | 4865 | ctlMode, numCtlModes, isHt40CtlMode, |
4872 | (pCtlMode[ctlMode] & EXT_ADDITIVE)); | 4866 | (pCtlMode[ctlMode] & EXT_ADDITIVE)); |
@@ -4882,7 +4876,7 @@ static void ar9003_hw_set_power_per_rate_table(struct ath_hw *ah, | |||
4882 | 4876 | ||
4883 | twiceMaxEdgePower = MAX_RATE_POWER; | 4877 | twiceMaxEdgePower = MAX_RATE_POWER; |
4884 | for (i = 0; (i < ctlNum) && ctlIndex[i]; i++) { | 4878 | for (i = 0; (i < ctlNum) && ctlIndex[i]; i++) { |
4885 | ath_dbg(common, ATH_DBG_REGULATORY, | 4879 | ath_dbg(common, REGULATORY, |
4886 | "LOOP-Ctlidx %d: cfgCtl 0x%2.2x pCtlMode 0x%2.2x ctlIndex 0x%2.2x chan %d\n", | 4880 | "LOOP-Ctlidx %d: cfgCtl 0x%2.2x pCtlMode 0x%2.2x ctlIndex 0x%2.2x chan %d\n", |
4887 | i, cfgCtl, pCtlMode[ctlMode], ctlIndex[i], | 4881 | i, cfgCtl, pCtlMode[ctlMode], ctlIndex[i], |
4888 | chan->channel); | 4882 | chan->channel); |
@@ -4924,7 +4918,7 @@ static void ar9003_hw_set_power_per_rate_table(struct ath_hw *ah, | |||
4924 | 4918 | ||
4925 | minCtlPower = (u8)min(twiceMaxEdgePower, scaledPower); | 4919 | minCtlPower = (u8)min(twiceMaxEdgePower, scaledPower); |
4926 | 4920 | ||
4927 | ath_dbg(common, ATH_DBG_REGULATORY, | 4921 | ath_dbg(common, REGULATORY, |
4928 | "SEL-Min ctlMode %d pCtlMode %d 2xMaxEdge %d sP %d minCtlPwr %d\n", | 4922 | "SEL-Min ctlMode %d pCtlMode %d 2xMaxEdge %d sP %d minCtlPwr %d\n", |
4929 | ctlMode, pCtlMode[ctlMode], twiceMaxEdgePower, | 4923 | ctlMode, pCtlMode[ctlMode], twiceMaxEdgePower, |
4930 | scaledPower, minCtlPower); | 4924 | scaledPower, minCtlPower); |
@@ -5048,7 +5042,7 @@ static void ath9k_hw_ar9300_set_txpower(struct ath_hw *ah, | |||
5048 | target_power_val_t2_eep[i]) > | 5042 | target_power_val_t2_eep[i]) > |
5049 | paprd_scale_factor)) { | 5043 | paprd_scale_factor)) { |
5050 | ah->paprd_ratemask &= ~(1 << i); | 5044 | ah->paprd_ratemask &= ~(1 << i); |
5051 | ath_dbg(common, ATH_DBG_EEPROM, | 5045 | ath_dbg(common, EEPROM, |
5052 | "paprd disabled for mcs %d\n", i); | 5046 | "paprd disabled for mcs %d\n", i); |
5053 | } | 5047 | } |
5054 | } | 5048 | } |
@@ -5066,8 +5060,8 @@ static void ath9k_hw_ar9300_set_txpower(struct ath_hw *ah, | |||
5066 | return; | 5060 | return; |
5067 | 5061 | ||
5068 | for (i = 0; i < ar9300RateSize; i++) { | 5062 | for (i = 0; i < ar9300RateSize; i++) { |
5069 | ath_dbg(common, ATH_DBG_EEPROM, | 5063 | ath_dbg(common, EEPROM, "TPC[%02d] 0x%08x\n", |
5070 | "TPC[%02d] 0x%08x\n", i, targetPowerValT2[i]); | 5064 | i, targetPowerValT2[i]); |
5071 | } | 5065 | } |
5072 | 5066 | ||
5073 | ah->txpower_limit = regulatory->max_power_level; | 5067 | ah->txpower_limit = regulatory->max_power_level; |