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path: root/drivers/net/wireless/ath/ath9k/ar9002_calib.c
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Diffstat (limited to 'drivers/net/wireless/ath/ath9k/ar9002_calib.c')
-rw-r--r--drivers/net/wireless/ath/ath9k/ar9002_calib.c35
1 files changed, 18 insertions, 17 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_calib.c b/drivers/net/wireless/ath/ath9k/ar9002_calib.c
index 42190b67c671..4576b99dd0cc 100644
--- a/drivers/net/wireless/ath/ath9k/ar9002_calib.c
+++ b/drivers/net/wireless/ath/ath9k/ar9002_calib.c
@@ -430,22 +430,22 @@ static void ar9271_hw_pa_cal(struct ath_hw *ah, bool is_reset)
430 u32 regVal; 430 u32 regVal;
431 unsigned int i; 431 unsigned int i;
432 u32 regList[][2] = { 432 u32 regList[][2] = {
433 { 0x786c, 0 }, 433 { AR9285_AN_TOP3, 0 },
434 { 0x7854, 0 }, 434 { AR9285_AN_RXTXBB1, 0 },
435 { 0x7820, 0 }, 435 { AR9285_AN_RF2G1, 0 },
436 { 0x7824, 0 }, 436 { AR9285_AN_RF2G2, 0 },
437 { 0x7868, 0 }, 437 { AR9285_AN_TOP2, 0 },
438 { 0x783c, 0 }, 438 { AR9285_AN_RF2G8, 0 },
439 { 0x7838, 0 } , 439 { AR9285_AN_RF2G7, 0 } ,
440 { 0x7828, 0 } , 440 { AR9285_AN_RF2G3, 0 } ,
441 }; 441 };
442 442
443 for (i = 0; i < ARRAY_SIZE(regList); i++) 443 for (i = 0; i < ARRAY_SIZE(regList); i++)
444 regList[i][1] = REG_READ(ah, regList[i][0]); 444 regList[i][1] = REG_READ(ah, regList[i][0]);
445 445
446 regVal = REG_READ(ah, 0x7834); 446 regVal = REG_READ(ah, AR9285_AN_RF2G6);
447 regVal &= (~(0x1)); 447 regVal &= (~(0x1));
448 REG_WRITE(ah, 0x7834, regVal); 448 REG_WRITE(ah, AR9285_AN_RF2G6, regVal);
449 regVal = REG_READ(ah, 0x9808); 449 regVal = REG_READ(ah, 0x9808);
450 regVal |= (0x1 << 27); 450 regVal |= (0x1 << 27);
451 REG_WRITE(ah, 0x9808, regVal); 451 REG_WRITE(ah, 0x9808, regVal);
@@ -477,7 +477,7 @@ static void ar9271_hw_pa_cal(struct ath_hw *ah, bool is_reset)
477 * does not matter since we turn it off 477 * does not matter since we turn it off
478 */ 478 */
479 REG_RMW_FIELD(ah, AR9285_AN_RF2G7, AR9285_AN_RF2G7_PADRVGN2TAB0, 0); 479 REG_RMW_FIELD(ah, AR9285_AN_RF2G7, AR9285_AN_RF2G7_PADRVGN2TAB0, 0);
480 480 /* 7828, b0-11, ccom=fff */
481 REG_RMW_FIELD(ah, AR9285_AN_RF2G3, AR9271_AN_RF2G3_CCOMP, 0xfff); 481 REG_RMW_FIELD(ah, AR9285_AN_RF2G3, AR9271_AN_RF2G3_CCOMP, 0xfff);
482 482
483 /* Set: 483 /* Set:
@@ -490,15 +490,16 @@ static void ar9271_hw_pa_cal(struct ath_hw *ah, bool is_reset)
490 490
491 /* find off_6_1; */ 491 /* find off_6_1; */
492 for (i = 6; i > 0; i--) { 492 for (i = 6; i > 0; i--) {
493 regVal = REG_READ(ah, 0x7834); 493 regVal = REG_READ(ah, AR9285_AN_RF2G6);
494 regVal |= (1 << (20 + i)); 494 regVal |= (1 << (20 + i));
495 REG_WRITE(ah, 0x7834, regVal); 495 REG_WRITE(ah, AR9285_AN_RF2G6, regVal);
496 udelay(1); 496 udelay(1);
497 /* regVal = REG_READ(ah, 0x7834); */ 497 /* regVal = REG_READ(ah, 0x7834); */
498 regVal &= (~(0x1 << (20 + i))); 498 regVal &= (~(0x1 << (20 + i)));
499 regVal |= (MS(REG_READ(ah, 0x7840), AR9285_AN_RXTXBB1_SPARE9) 499 regVal |= (MS(REG_READ(ah, AR9285_AN_RF2G9),
500 AR9285_AN_RXTXBB1_SPARE9)
500 << (20 + i)); 501 << (20 + i));
501 REG_WRITE(ah, 0x7834, regVal); 502 REG_WRITE(ah, AR9285_AN_RF2G6, regVal);
502 } 503 }
503 504
504 regVal = (regVal >> 20) & 0x7f; 505 regVal = (regVal >> 20) & 0x7f;
@@ -517,9 +518,9 @@ static void ar9271_hw_pa_cal(struct ath_hw *ah, bool is_reset)
517 518
518 ENABLE_REGWRITE_BUFFER(ah); 519 ENABLE_REGWRITE_BUFFER(ah);
519 520
520 regVal = REG_READ(ah, 0x7834); 521 regVal = REG_READ(ah, AR_AN_RF2G1_CH1);
521 regVal |= 0x1; 522 regVal |= 0x1;
522 REG_WRITE(ah, 0x7834, regVal); 523 REG_WRITE(ah, AR_AN_RF2G1_CH1, regVal);
523 regVal = REG_READ(ah, 0x9808); 524 regVal = REG_READ(ah, 0x9808);
524 regVal &= (~(0x1 << 27)); 525 regVal &= (~(0x1 << 27));
525 REG_WRITE(ah, 0x9808, regVal); 526 REG_WRITE(ah, 0x9808, regVal);