diff options
Diffstat (limited to 'drivers/net/wireless/ath/ath9k/ar9002_calib.c')
-rw-r--r-- | drivers/net/wireless/ath/ath9k/ar9002_calib.c | 51 |
1 files changed, 20 insertions, 31 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_calib.c b/drivers/net/wireless/ath/ath9k/ar9002_calib.c index f2da119bbf02..f0525fb62a2c 100644 --- a/drivers/net/wireless/ath/ath9k/ar9002_calib.c +++ b/drivers/net/wireless/ath/ath9k/ar9002_calib.c | |||
@@ -20,6 +20,13 @@ | |||
20 | 20 | ||
21 | #define AR9285_CLCAL_REDO_THRESH 1 | 21 | #define AR9285_CLCAL_REDO_THRESH 1 |
22 | 22 | ||
23 | enum ar9002_cal_types { | ||
24 | ADC_GAIN_CAL = BIT(0), | ||
25 | ADC_DC_CAL = BIT(1), | ||
26 | IQ_MISMATCH_CAL = BIT(2), | ||
27 | }; | ||
28 | |||
29 | |||
23 | static void ar9002_hw_setup_calibration(struct ath_hw *ah, | 30 | static void ar9002_hw_setup_calibration(struct ath_hw *ah, |
24 | struct ath9k_cal_list *currCal) | 31 | struct ath9k_cal_list *currCal) |
25 | { | 32 | { |
@@ -45,8 +52,6 @@ static void ar9002_hw_setup_calibration(struct ath_hw *ah, | |||
45 | ath_print(common, ATH_DBG_CALIBRATE, | 52 | ath_print(common, ATH_DBG_CALIBRATE, |
46 | "starting ADC DC Calibration\n"); | 53 | "starting ADC DC Calibration\n"); |
47 | break; | 54 | break; |
48 | case TEMP_COMP_CAL: | ||
49 | break; /* Not supported */ | ||
50 | } | 55 | } |
51 | 56 | ||
52 | REG_SET_BIT(ah, AR_PHY_TIMING_CTRL4(0), | 57 | REG_SET_BIT(ah, AR_PHY_TIMING_CTRL4(0), |
@@ -91,25 +96,6 @@ static bool ar9002_hw_per_calibration(struct ath_hw *ah, | |||
91 | return iscaldone; | 96 | return iscaldone; |
92 | } | 97 | } |
93 | 98 | ||
94 | /* Assumes you are talking about the currently configured channel */ | ||
95 | static bool ar9002_hw_iscal_supported(struct ath_hw *ah, | ||
96 | enum ath9k_cal_types calType) | ||
97 | { | ||
98 | struct ieee80211_conf *conf = &ath9k_hw_common(ah)->hw->conf; | ||
99 | |||
100 | switch (calType & ah->supp_cals) { | ||
101 | case IQ_MISMATCH_CAL: /* Both 2 GHz and 5 GHz support OFDM */ | ||
102 | return true; | ||
103 | case ADC_GAIN_CAL: | ||
104 | case ADC_DC_CAL: | ||
105 | if (!(conf->channel->band == IEEE80211_BAND_2GHZ && | ||
106 | conf_is_ht20(conf))) | ||
107 | return true; | ||
108 | break; | ||
109 | } | ||
110 | return false; | ||
111 | } | ||
112 | |||
113 | static void ar9002_hw_iqcal_collect(struct ath_hw *ah) | 99 | static void ar9002_hw_iqcal_collect(struct ath_hw *ah) |
114 | { | 100 | { |
115 | int i; | 101 | int i; |
@@ -872,24 +858,28 @@ static bool ar9002_hw_init_cal(struct ath_hw *ah, struct ath9k_channel *chan) | |||
872 | 858 | ||
873 | /* Enable IQ, ADC Gain and ADC DC offset CALs */ | 859 | /* Enable IQ, ADC Gain and ADC DC offset CALs */ |
874 | if (AR_SREV_9100(ah) || AR_SREV_9160_10_OR_LATER(ah)) { | 860 | if (AR_SREV_9100(ah) || AR_SREV_9160_10_OR_LATER(ah)) { |
875 | if (ar9002_hw_iscal_supported(ah, ADC_GAIN_CAL)) { | 861 | ah->supp_cals = IQ_MISMATCH_CAL; |
862 | |||
863 | if (AR_SREV_9160_10_OR_LATER(ah) && | ||
864 | !(IS_CHAN_2GHZ(chan) && IS_CHAN_HT20(chan))) { | ||
865 | ah->supp_cals |= ADC_GAIN_CAL | ADC_DC_CAL; | ||
866 | |||
867 | |||
876 | INIT_CAL(&ah->adcgain_caldata); | 868 | INIT_CAL(&ah->adcgain_caldata); |
877 | INSERT_CAL(ah, &ah->adcgain_caldata); | 869 | INSERT_CAL(ah, &ah->adcgain_caldata); |
878 | ath_print(common, ATH_DBG_CALIBRATE, | 870 | ath_print(common, ATH_DBG_CALIBRATE, |
879 | "enabling ADC Gain Calibration.\n"); | 871 | "enabling ADC Gain Calibration.\n"); |
880 | } | 872 | |
881 | if (ar9002_hw_iscal_supported(ah, ADC_DC_CAL)) { | ||
882 | INIT_CAL(&ah->adcdc_caldata); | 873 | INIT_CAL(&ah->adcdc_caldata); |
883 | INSERT_CAL(ah, &ah->adcdc_caldata); | 874 | INSERT_CAL(ah, &ah->adcdc_caldata); |
884 | ath_print(common, ATH_DBG_CALIBRATE, | 875 | ath_print(common, ATH_DBG_CALIBRATE, |
885 | "enabling ADC DC Calibration.\n"); | 876 | "enabling ADC DC Calibration.\n"); |
886 | } | 877 | } |
887 | if (ar9002_hw_iscal_supported(ah, IQ_MISMATCH_CAL)) { | 878 | |
888 | INIT_CAL(&ah->iq_caldata); | 879 | INIT_CAL(&ah->iq_caldata); |
889 | INSERT_CAL(ah, &ah->iq_caldata); | 880 | INSERT_CAL(ah, &ah->iq_caldata); |
890 | ath_print(common, ATH_DBG_CALIBRATE, | 881 | ath_print(common, ATH_DBG_CALIBRATE, |
891 | "enabling IQ Calibration.\n"); | 882 | "enabling IQ Calibration.\n"); |
892 | } | ||
893 | 883 | ||
894 | ah->cal_list_curr = ah->cal_list; | 884 | ah->cal_list_curr = ah->cal_list; |
895 | 885 | ||
@@ -980,7 +970,6 @@ void ar9002_hw_attach_calib_ops(struct ath_hw *ah) | |||
980 | priv_ops->init_cal_settings = ar9002_hw_init_cal_settings; | 970 | priv_ops->init_cal_settings = ar9002_hw_init_cal_settings; |
981 | priv_ops->init_cal = ar9002_hw_init_cal; | 971 | priv_ops->init_cal = ar9002_hw_init_cal; |
982 | priv_ops->setup_calibration = ar9002_hw_setup_calibration; | 972 | priv_ops->setup_calibration = ar9002_hw_setup_calibration; |
983 | priv_ops->iscal_supported = ar9002_hw_iscal_supported; | ||
984 | 973 | ||
985 | ops->calibrate = ar9002_hw_calibrate; | 974 | ops->calibrate = ar9002_hw_calibrate; |
986 | } | 975 | } |