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Diffstat (limited to 'drivers/net/wireless/ath/ath9k/ar5008_phy.c')
-rw-r--r--drivers/net/wireless/ath/ath9k/ar5008_phy.c50
1 files changed, 15 insertions, 35 deletions
diff --git a/drivers/net/wireless/ath/ath9k/ar5008_phy.c b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
index 874186bfda41..fd69376ecc83 100644
--- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
+++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
@@ -470,16 +470,15 @@ static void ar5008_hw_spur_mitigate(struct ath_hw *ah,
470static int ar5008_hw_rf_alloc_ext_banks(struct ath_hw *ah) 470static int ar5008_hw_rf_alloc_ext_banks(struct ath_hw *ah)
471{ 471{
472#define ATH_ALLOC_BANK(bank, size) do { \ 472#define ATH_ALLOC_BANK(bank, size) do { \
473 bank = kzalloc((sizeof(u32) * size), GFP_KERNEL); \ 473 bank = devm_kzalloc(ah->dev, sizeof(u32) * size, GFP_KERNEL); \
474 if (!bank) { \ 474 if (!bank) \
475 ath_err(common, "Cannot allocate RF banks\n"); \ 475 goto error; \
476 return -ENOMEM; \
477 } \
478 } while (0); 476 } while (0);
479 477
480 struct ath_common *common = ath9k_hw_common(ah); 478 struct ath_common *common = ath9k_hw_common(ah);
481 479
482 BUG_ON(AR_SREV_9280_20_OR_LATER(ah)); 480 if (AR_SREV_9280_20_OR_LATER(ah))
481 return 0;
483 482
484 ATH_ALLOC_BANK(ah->analogBank0Data, ah->iniBank0.ia_rows); 483 ATH_ALLOC_BANK(ah->analogBank0Data, ah->iniBank0.ia_rows);
485 ATH_ALLOC_BANK(ah->analogBank1Data, ah->iniBank1.ia_rows); 484 ATH_ALLOC_BANK(ah->analogBank1Data, ah->iniBank1.ia_rows);
@@ -492,35 +491,12 @@ static int ar5008_hw_rf_alloc_ext_banks(struct ath_hw *ah)
492 491
493 return 0; 492 return 0;
494#undef ATH_ALLOC_BANK 493#undef ATH_ALLOC_BANK
494error:
495 ath_err(common, "Cannot allocate RF banks\n");
496 return -ENOMEM;
495} 497}
496 498
497 499
498/**
499 * ar5008_hw_rf_free_ext_banks - Free memory for analog bank scratch buffers
500 * @ah: atheros hardware struture
501 * For the external AR2133/AR5133 radios banks.
502 */
503static void ar5008_hw_rf_free_ext_banks(struct ath_hw *ah)
504{
505#define ATH_FREE_BANK(bank) do { \
506 kfree(bank); \
507 bank = NULL; \
508 } while (0);
509
510 BUG_ON(AR_SREV_9280_20_OR_LATER(ah));
511
512 ATH_FREE_BANK(ah->analogBank0Data);
513 ATH_FREE_BANK(ah->analogBank1Data);
514 ATH_FREE_BANK(ah->analogBank2Data);
515 ATH_FREE_BANK(ah->analogBank3Data);
516 ATH_FREE_BANK(ah->analogBank6Data);
517 ATH_FREE_BANK(ah->analogBank6TPCData);
518 ATH_FREE_BANK(ah->analogBank7Data);
519 ATH_FREE_BANK(ah->bank6Temp);
520
521#undef ATH_FREE_BANK
522}
523
524/* * 500/* *
525 * ar5008_hw_set_rf_regs - programs rf registers based on EEPROM 501 * ar5008_hw_set_rf_regs - programs rf registers based on EEPROM
526 * @ah: atheros hardware structure 502 * @ah: atheros hardware structure
@@ -1380,7 +1356,7 @@ static void ar5008_hw_set_radar_conf(struct ath_hw *ah)
1380 conf->radar_inband = 8; 1356 conf->radar_inband = 8;
1381} 1357}
1382 1358
1383void ar5008_hw_attach_phy_ops(struct ath_hw *ah) 1359int ar5008_hw_attach_phy_ops(struct ath_hw *ah)
1384{ 1360{
1385 struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah); 1361 struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
1386 static const u32 ar5416_cca_regs[6] = { 1362 static const u32 ar5416_cca_regs[6] = {
@@ -1391,12 +1367,15 @@ void ar5008_hw_attach_phy_ops(struct ath_hw *ah)
1391 AR_PHY_CH1_EXT_CCA, 1367 AR_PHY_CH1_EXT_CCA,
1392 AR_PHY_CH2_EXT_CCA 1368 AR_PHY_CH2_EXT_CCA
1393 }; 1369 };
1370 int ret;
1371
1372 ret = ar5008_hw_rf_alloc_ext_banks(ah);
1373 if (ret)
1374 return ret;
1394 1375
1395 priv_ops->rf_set_freq = ar5008_hw_set_channel; 1376 priv_ops->rf_set_freq = ar5008_hw_set_channel;
1396 priv_ops->spur_mitigate_freq = ar5008_hw_spur_mitigate; 1377 priv_ops->spur_mitigate_freq = ar5008_hw_spur_mitigate;
1397 1378
1398 priv_ops->rf_alloc_ext_banks = ar5008_hw_rf_alloc_ext_banks;
1399 priv_ops->rf_free_ext_banks = ar5008_hw_rf_free_ext_banks;
1400 priv_ops->set_rf_regs = ar5008_hw_set_rf_regs; 1379 priv_ops->set_rf_regs = ar5008_hw_set_rf_regs;
1401 priv_ops->set_channel_regs = ar5008_hw_set_channel_regs; 1380 priv_ops->set_channel_regs = ar5008_hw_set_channel_regs;
1402 priv_ops->init_bb = ar5008_hw_init_bb; 1381 priv_ops->init_bb = ar5008_hw_init_bb;
@@ -1421,4 +1400,5 @@ void ar5008_hw_attach_phy_ops(struct ath_hw *ah)
1421 ar5008_hw_set_nf_limits(ah); 1400 ar5008_hw_set_nf_limits(ah);
1422 ar5008_hw_set_radar_conf(ah); 1401 ar5008_hw_set_radar_conf(ah);
1423 memcpy(ah->nf_regs, ar5416_cca_regs, sizeof(ah->nf_regs)); 1402 memcpy(ah->nf_regs, ar5416_cca_regs, sizeof(ah->nf_regs));
1403 return 0;
1424} 1404}