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path: root/drivers/net/wireless/ath/ath5k/desc.h
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Diffstat (limited to 'drivers/net/wireless/ath/ath5k/desc.h')
-rw-r--r--drivers/net/wireless/ath/ath5k/desc.h18
1 files changed, 9 insertions, 9 deletions
diff --git a/drivers/net/wireless/ath/ath5k/desc.h b/drivers/net/wireless/ath/ath5k/desc.h
index b2adb2a281c2..2509d0bf037d 100644
--- a/drivers/net/wireless/ath/ath5k/desc.h
+++ b/drivers/net/wireless/ath/ath5k/desc.h
@@ -26,7 +26,7 @@
26struct ath5k_hw_rx_ctl { 26struct ath5k_hw_rx_ctl {
27 u32 rx_control_0; /* RX control word 0 */ 27 u32 rx_control_0; /* RX control word 0 */
28 u32 rx_control_1; /* RX control word 1 */ 28 u32 rx_control_1; /* RX control word 1 */
29} __packed; 29} __packed __aligned(4);
30 30
31/* RX control word 1 fields/flags */ 31/* RX control word 1 fields/flags */
32#define AR5K_DESC_RX_CTL1_BUF_LEN 0x00000fff /* data buffer length */ 32#define AR5K_DESC_RX_CTL1_BUF_LEN 0x00000fff /* data buffer length */
@@ -39,7 +39,7 @@ struct ath5k_hw_rx_ctl {
39struct ath5k_hw_rx_status { 39struct ath5k_hw_rx_status {
40 u32 rx_status_0; /* RX status word 0 */ 40 u32 rx_status_0; /* RX status word 0 */
41 u32 rx_status_1; /* RX status word 1 */ 41 u32 rx_status_1; /* RX status word 1 */
42} __packed; 42} __packed __aligned(4);
43 43
44/* 5210/5211 */ 44/* 5210/5211 */
45/* RX status word 0 fields/flags */ 45/* RX status word 0 fields/flags */
@@ -129,7 +129,7 @@ enum ath5k_phy_error_code {
129struct ath5k_hw_2w_tx_ctl { 129struct ath5k_hw_2w_tx_ctl {
130 u32 tx_control_0; /* TX control word 0 */ 130 u32 tx_control_0; /* TX control word 0 */
131 u32 tx_control_1; /* TX control word 1 */ 131 u32 tx_control_1; /* TX control word 1 */
132} __packed; 132} __packed __aligned(4);
133 133
134/* TX control word 0 fields/flags */ 134/* TX control word 0 fields/flags */
135#define AR5K_2W_TX_DESC_CTL0_FRAME_LEN 0x00000fff /* frame length */ 135#define AR5K_2W_TX_DESC_CTL0_FRAME_LEN 0x00000fff /* frame length */
@@ -185,7 +185,7 @@ struct ath5k_hw_4w_tx_ctl {
185 u32 tx_control_1; /* TX control word 1 */ 185 u32 tx_control_1; /* TX control word 1 */
186 u32 tx_control_2; /* TX control word 2 */ 186 u32 tx_control_2; /* TX control word 2 */
187 u32 tx_control_3; /* TX control word 3 */ 187 u32 tx_control_3; /* TX control word 3 */
188} __packed; 188} __packed __aligned(4);
189 189
190/* TX control word 0 fields/flags */ 190/* TX control word 0 fields/flags */
191#define AR5K_4W_TX_DESC_CTL0_FRAME_LEN 0x00000fff /* frame length */ 191#define AR5K_4W_TX_DESC_CTL0_FRAME_LEN 0x00000fff /* frame length */
@@ -244,7 +244,7 @@ struct ath5k_hw_4w_tx_ctl {
244struct ath5k_hw_tx_status { 244struct ath5k_hw_tx_status {
245 u32 tx_status_0; /* TX status word 0 */ 245 u32 tx_status_0; /* TX status word 0 */
246 u32 tx_status_1; /* TX status word 1 */ 246 u32 tx_status_1; /* TX status word 1 */
247} __packed; 247} __packed __aligned(4);
248 248
249/* TX status word 0 fields/flags */ 249/* TX status word 0 fields/flags */
250#define AR5K_DESC_TX_STATUS0_FRAME_XMIT_OK 0x00000001 /* TX success */ 250#define AR5K_DESC_TX_STATUS0_FRAME_XMIT_OK 0x00000001 /* TX success */
@@ -282,7 +282,7 @@ struct ath5k_hw_tx_status {
282struct ath5k_hw_5210_tx_desc { 282struct ath5k_hw_5210_tx_desc {
283 struct ath5k_hw_2w_tx_ctl tx_ctl; 283 struct ath5k_hw_2w_tx_ctl tx_ctl;
284 struct ath5k_hw_tx_status tx_stat; 284 struct ath5k_hw_tx_status tx_stat;
285} __packed; 285} __packed __aligned(4);
286 286
287/* 287/*
288 * 5212 hardware TX descriptor 288 * 5212 hardware TX descriptor
@@ -290,7 +290,7 @@ struct ath5k_hw_5210_tx_desc {
290struct ath5k_hw_5212_tx_desc { 290struct ath5k_hw_5212_tx_desc {
291 struct ath5k_hw_4w_tx_ctl tx_ctl; 291 struct ath5k_hw_4w_tx_ctl tx_ctl;
292 struct ath5k_hw_tx_status tx_stat; 292 struct ath5k_hw_tx_status tx_stat;
293} __packed; 293} __packed __aligned(4);
294 294
295/* 295/*
296 * Common hardware RX descriptor 296 * Common hardware RX descriptor
@@ -298,7 +298,7 @@ struct ath5k_hw_5212_tx_desc {
298struct ath5k_hw_all_rx_desc { 298struct ath5k_hw_all_rx_desc {
299 struct ath5k_hw_rx_ctl rx_ctl; 299 struct ath5k_hw_rx_ctl rx_ctl;
300 struct ath5k_hw_rx_status rx_stat; 300 struct ath5k_hw_rx_status rx_stat;
301} __packed; 301} __packed __aligned(4);
302 302
303/* 303/*
304 * Atheros hardware DMA descriptor 304 * Atheros hardware DMA descriptor
@@ -313,7 +313,7 @@ struct ath5k_desc {
313 struct ath5k_hw_5212_tx_desc ds_tx5212; 313 struct ath5k_hw_5212_tx_desc ds_tx5212;
314 struct ath5k_hw_all_rx_desc ds_rx; 314 struct ath5k_hw_all_rx_desc ds_rx;
315 } ud; 315 } ud;
316} __packed; 316} __packed __aligned(4);
317 317
318#define AR5K_RXDESC_INTREQ 0x0020 318#define AR5K_RXDESC_INTREQ 0x0020
319 319