diff options
Diffstat (limited to 'drivers/net/wan/pc300_drv.c')
-rw-r--r-- | drivers/net/wan/pc300_drv.c | 146 |
1 files changed, 64 insertions, 82 deletions
diff --git a/drivers/net/wan/pc300_drv.c b/drivers/net/wan/pc300_drv.c index 334170527755..d0a8d1e352ac 100644 --- a/drivers/net/wan/pc300_drv.c +++ b/drivers/net/wan/pc300_drv.c | |||
@@ -227,8 +227,6 @@ static char rcsid[] = | |||
227 | #include <linux/netdevice.h> | 227 | #include <linux/netdevice.h> |
228 | #include <linux/spinlock.h> | 228 | #include <linux/spinlock.h> |
229 | #include <linux/if.h> | 229 | #include <linux/if.h> |
230 | |||
231 | #include <net/syncppp.h> | ||
232 | #include <net/arp.h> | 230 | #include <net/arp.h> |
233 | 231 | ||
234 | #include <asm/io.h> | 232 | #include <asm/io.h> |
@@ -285,8 +283,8 @@ static void rx_dma_buf_init(pc300_t *, int); | |||
285 | static void tx_dma_buf_check(pc300_t *, int); | 283 | static void tx_dma_buf_check(pc300_t *, int); |
286 | static void rx_dma_buf_check(pc300_t *, int); | 284 | static void rx_dma_buf_check(pc300_t *, int); |
287 | static irqreturn_t cpc_intr(int, void *); | 285 | static irqreturn_t cpc_intr(int, void *); |
288 | static int clock_rate_calc(uclong, uclong, int *); | 286 | static int clock_rate_calc(u32, u32, int *); |
289 | static uclong detect_ram(pc300_t *); | 287 | static u32 detect_ram(pc300_t *); |
290 | static void plx_init(pc300_t *); | 288 | static void plx_init(pc300_t *); |
291 | static void cpc_trace(struct net_device *, struct sk_buff *, char); | 289 | static void cpc_trace(struct net_device *, struct sk_buff *, char); |
292 | static int cpc_attach(struct net_device *, unsigned short, unsigned short); | 290 | static int cpc_attach(struct net_device *, unsigned short, unsigned short); |
@@ -311,10 +309,10 @@ static void tx_dma_buf_pt_init(pc300_t * card, int ch) | |||
311 | + DMA_TX_BD_BASE + ch_factor * sizeof(pcsca_bd_t)); | 309 | + DMA_TX_BD_BASE + ch_factor * sizeof(pcsca_bd_t)); |
312 | 310 | ||
313 | for (i = 0; i < N_DMA_TX_BUF; i++, ptdescr++) { | 311 | for (i = 0; i < N_DMA_TX_BUF; i++, ptdescr++) { |
314 | cpc_writel(&ptdescr->next, (uclong) (DMA_TX_BD_BASE + | 312 | cpc_writel(&ptdescr->next, (u32)(DMA_TX_BD_BASE + |
315 | (ch_factor + ((i + 1) & (N_DMA_TX_BUF - 1))) * sizeof(pcsca_bd_t))); | 313 | (ch_factor + ((i + 1) & (N_DMA_TX_BUF - 1))) * sizeof(pcsca_bd_t))); |
316 | cpc_writel(&ptdescr->ptbuf, | 314 | cpc_writel(&ptdescr->ptbuf, |
317 | (uclong) (DMA_TX_BASE + (ch_factor + i) * BD_DEF_LEN)); | 315 | (u32)(DMA_TX_BASE + (ch_factor + i) * BD_DEF_LEN)); |
318 | } | 316 | } |
319 | } | 317 | } |
320 | 318 | ||
@@ -341,10 +339,10 @@ static void rx_dma_buf_pt_init(pc300_t * card, int ch) | |||
341 | + DMA_RX_BD_BASE + ch_factor * sizeof(pcsca_bd_t)); | 339 | + DMA_RX_BD_BASE + ch_factor * sizeof(pcsca_bd_t)); |
342 | 340 | ||
343 | for (i = 0; i < N_DMA_RX_BUF; i++, ptdescr++) { | 341 | for (i = 0; i < N_DMA_RX_BUF; i++, ptdescr++) { |
344 | cpc_writel(&ptdescr->next, (uclong) (DMA_RX_BD_BASE + | 342 | cpc_writel(&ptdescr->next, (u32)(DMA_RX_BD_BASE + |
345 | (ch_factor + ((i + 1) & (N_DMA_RX_BUF - 1))) * sizeof(pcsca_bd_t))); | 343 | (ch_factor + ((i + 1) & (N_DMA_RX_BUF - 1))) * sizeof(pcsca_bd_t))); |
346 | cpc_writel(&ptdescr->ptbuf, | 344 | cpc_writel(&ptdescr->ptbuf, |
347 | (uclong) (DMA_RX_BASE + (ch_factor + i) * BD_DEF_LEN)); | 345 | (u32)(DMA_RX_BASE + (ch_factor + i) * BD_DEF_LEN)); |
348 | } | 346 | } |
349 | } | 347 | } |
350 | 348 | ||
@@ -367,8 +365,8 @@ static void tx_dma_buf_check(pc300_t * card, int ch) | |||
367 | { | 365 | { |
368 | volatile pcsca_bd_t __iomem *ptdescr; | 366 | volatile pcsca_bd_t __iomem *ptdescr; |
369 | int i; | 367 | int i; |
370 | ucshort first_bd = card->chan[ch].tx_first_bd; | 368 | u16 first_bd = card->chan[ch].tx_first_bd; |
371 | ucshort next_bd = card->chan[ch].tx_next_bd; | 369 | u16 next_bd = card->chan[ch].tx_next_bd; |
372 | 370 | ||
373 | printk("#CH%d: f_bd = %d(0x%08zx), n_bd = %d(0x%08zx)\n", ch, | 371 | printk("#CH%d: f_bd = %d(0x%08zx), n_bd = %d(0x%08zx)\n", ch, |
374 | first_bd, TX_BD_ADDR(ch, first_bd), | 372 | first_bd, TX_BD_ADDR(ch, first_bd), |
@@ -392,9 +390,9 @@ static void tx1_dma_buf_check(pc300_t * card, int ch) | |||
392 | { | 390 | { |
393 | volatile pcsca_bd_t __iomem *ptdescr; | 391 | volatile pcsca_bd_t __iomem *ptdescr; |
394 | int i; | 392 | int i; |
395 | ucshort first_bd = card->chan[ch].tx_first_bd; | 393 | u16 first_bd = card->chan[ch].tx_first_bd; |
396 | ucshort next_bd = card->chan[ch].tx_next_bd; | 394 | u16 next_bd = card->chan[ch].tx_next_bd; |
397 | uclong scabase = card->hw.scabase; | 395 | u32 scabase = card->hw.scabase; |
398 | 396 | ||
399 | printk ("\nnfree_tx_bd = %d \n", card->chan[ch].nfree_tx_bd); | 397 | printk ("\nnfree_tx_bd = %d \n", card->chan[ch].nfree_tx_bd); |
400 | printk("#CH%d: f_bd = %d(0x%08x), n_bd = %d(0x%08x)\n", ch, | 398 | printk("#CH%d: f_bd = %d(0x%08x), n_bd = %d(0x%08x)\n", ch, |
@@ -413,13 +411,13 @@ static void tx1_dma_buf_check(pc300_t * card, int ch) | |||
413 | printk("\n"); | 411 | printk("\n"); |
414 | } | 412 | } |
415 | #endif | 413 | #endif |
416 | 414 | ||
417 | static void rx_dma_buf_check(pc300_t * card, int ch) | 415 | static void rx_dma_buf_check(pc300_t * card, int ch) |
418 | { | 416 | { |
419 | volatile pcsca_bd_t __iomem *ptdescr; | 417 | volatile pcsca_bd_t __iomem *ptdescr; |
420 | int i; | 418 | int i; |
421 | ucshort first_bd = card->chan[ch].rx_first_bd; | 419 | u16 first_bd = card->chan[ch].rx_first_bd; |
422 | ucshort last_bd = card->chan[ch].rx_last_bd; | 420 | u16 last_bd = card->chan[ch].rx_last_bd; |
423 | int ch_factor; | 421 | int ch_factor; |
424 | 422 | ||
425 | ch_factor = ch * N_DMA_RX_BUF; | 423 | ch_factor = ch * N_DMA_RX_BUF; |
@@ -440,9 +438,9 @@ static void rx_dma_buf_check(pc300_t * card, int ch) | |||
440 | static int dma_get_rx_frame_size(pc300_t * card, int ch) | 438 | static int dma_get_rx_frame_size(pc300_t * card, int ch) |
441 | { | 439 | { |
442 | volatile pcsca_bd_t __iomem *ptdescr; | 440 | volatile pcsca_bd_t __iomem *ptdescr; |
443 | ucshort first_bd = card->chan[ch].rx_first_bd; | 441 | u16 first_bd = card->chan[ch].rx_first_bd; |
444 | int rcvd = 0; | 442 | int rcvd = 0; |
445 | volatile ucchar status; | 443 | volatile u8 status; |
446 | 444 | ||
447 | ptdescr = (card->hw.rambase + RX_BD_ADDR(ch, first_bd)); | 445 | ptdescr = (card->hw.rambase + RX_BD_ADDR(ch, first_bd)); |
448 | while ((status = cpc_readb(&ptdescr->status)) & DST_OSB) { | 446 | while ((status = cpc_readb(&ptdescr->status)) & DST_OSB) { |
@@ -462,12 +460,12 @@ static int dma_get_rx_frame_size(pc300_t * card, int ch) | |||
462 | * dma_buf_write: writes a frame to the Tx DMA buffers | 460 | * dma_buf_write: writes a frame to the Tx DMA buffers |
463 | * NOTE: this function writes one frame at a time. | 461 | * NOTE: this function writes one frame at a time. |
464 | */ | 462 | */ |
465 | static int dma_buf_write(pc300_t * card, int ch, ucchar * ptdata, int len) | 463 | static int dma_buf_write(pc300_t *card, int ch, u8 *ptdata, int len) |
466 | { | 464 | { |
467 | int i, nchar; | 465 | int i, nchar; |
468 | volatile pcsca_bd_t __iomem *ptdescr; | 466 | volatile pcsca_bd_t __iomem *ptdescr; |
469 | int tosend = len; | 467 | int tosend = len; |
470 | ucchar nbuf = ((len - 1) / BD_DEF_LEN) + 1; | 468 | u8 nbuf = ((len - 1) / BD_DEF_LEN) + 1; |
471 | 469 | ||
472 | if (nbuf >= card->chan[ch].nfree_tx_bd) { | 470 | if (nbuf >= card->chan[ch].nfree_tx_bd) { |
473 | return -ENOMEM; | 471 | return -ENOMEM; |
@@ -509,7 +507,7 @@ static int dma_buf_read(pc300_t * card, int ch, struct sk_buff *skb) | |||
509 | pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; | 507 | pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; |
510 | volatile pcsca_bd_t __iomem *ptdescr; | 508 | volatile pcsca_bd_t __iomem *ptdescr; |
511 | int rcvd = 0; | 509 | int rcvd = 0; |
512 | volatile ucchar status; | 510 | volatile u8 status; |
513 | 511 | ||
514 | ptdescr = (card->hw.rambase + | 512 | ptdescr = (card->hw.rambase + |
515 | RX_BD_ADDR(ch, chan->rx_first_bd)); | 513 | RX_BD_ADDR(ch, chan->rx_first_bd)); |
@@ -563,8 +561,8 @@ static int dma_buf_read(pc300_t * card, int ch, struct sk_buff *skb) | |||
563 | static void tx_dma_stop(pc300_t * card, int ch) | 561 | static void tx_dma_stop(pc300_t * card, int ch) |
564 | { | 562 | { |
565 | void __iomem *scabase = card->hw.scabase; | 563 | void __iomem *scabase = card->hw.scabase; |
566 | ucchar drr_ena_bit = 1 << (5 + 2 * ch); | 564 | u8 drr_ena_bit = 1 << (5 + 2 * ch); |
567 | ucchar drr_rst_bit = 1 << (1 + 2 * ch); | 565 | u8 drr_rst_bit = 1 << (1 + 2 * ch); |
568 | 566 | ||
569 | /* Disable DMA */ | 567 | /* Disable DMA */ |
570 | cpc_writeb(scabase + DRR, drr_ena_bit); | 568 | cpc_writeb(scabase + DRR, drr_ena_bit); |
@@ -574,8 +572,8 @@ static void tx_dma_stop(pc300_t * card, int ch) | |||
574 | static void rx_dma_stop(pc300_t * card, int ch) | 572 | static void rx_dma_stop(pc300_t * card, int ch) |
575 | { | 573 | { |
576 | void __iomem *scabase = card->hw.scabase; | 574 | void __iomem *scabase = card->hw.scabase; |
577 | ucchar drr_ena_bit = 1 << (4 + 2 * ch); | 575 | u8 drr_ena_bit = 1 << (4 + 2 * ch); |
578 | ucchar drr_rst_bit = 1 << (2 * ch); | 576 | u8 drr_rst_bit = 1 << (2 * ch); |
579 | 577 | ||
580 | /* Disable DMA */ | 578 | /* Disable DMA */ |
581 | cpc_writeb(scabase + DRR, drr_ena_bit); | 579 | cpc_writeb(scabase + DRR, drr_ena_bit); |
@@ -607,7 +605,7 @@ static void rx_dma_start(pc300_t * card, int ch) | |||
607 | /*************************/ | 605 | /*************************/ |
608 | /*** FALC Routines ***/ | 606 | /*** FALC Routines ***/ |
609 | /*************************/ | 607 | /*************************/ |
610 | static void falc_issue_cmd(pc300_t * card, int ch, ucchar cmd) | 608 | static void falc_issue_cmd(pc300_t *card, int ch, u8 cmd) |
611 | { | 609 | { |
612 | void __iomem *falcbase = card->hw.falcbase; | 610 | void __iomem *falcbase = card->hw.falcbase; |
613 | unsigned long i = 0; | 611 | unsigned long i = 0; |
@@ -675,7 +673,7 @@ static void falc_intr_enable(pc300_t * card, int ch) | |||
675 | static void falc_open_timeslot(pc300_t * card, int ch, int timeslot) | 673 | static void falc_open_timeslot(pc300_t * card, int ch, int timeslot) |
676 | { | 674 | { |
677 | void __iomem *falcbase = card->hw.falcbase; | 675 | void __iomem *falcbase = card->hw.falcbase; |
678 | ucchar tshf = card->chan[ch].falc.offset; | 676 | u8 tshf = card->chan[ch].falc.offset; |
679 | 677 | ||
680 | cpc_writeb(falcbase + F_REG((ICB1 + (timeslot - tshf) / 8), ch), | 678 | cpc_writeb(falcbase + F_REG((ICB1 + (timeslot - tshf) / 8), ch), |
681 | cpc_readb(falcbase + F_REG((ICB1 + (timeslot - tshf) / 8), ch)) & | 679 | cpc_readb(falcbase + F_REG((ICB1 + (timeslot - tshf) / 8), ch)) & |
@@ -691,7 +689,7 @@ static void falc_open_timeslot(pc300_t * card, int ch, int timeslot) | |||
691 | static void falc_close_timeslot(pc300_t * card, int ch, int timeslot) | 689 | static void falc_close_timeslot(pc300_t * card, int ch, int timeslot) |
692 | { | 690 | { |
693 | void __iomem *falcbase = card->hw.falcbase; | 691 | void __iomem *falcbase = card->hw.falcbase; |
694 | ucchar tshf = card->chan[ch].falc.offset; | 692 | u8 tshf = card->chan[ch].falc.offset; |
695 | 693 | ||
696 | cpc_writeb(falcbase + F_REG((ICB1 + (timeslot - tshf) / 8), ch), | 694 | cpc_writeb(falcbase + F_REG((ICB1 + (timeslot - tshf) / 8), ch), |
697 | cpc_readb(falcbase + F_REG((ICB1 + (timeslot - tshf) / 8), ch)) | | 695 | cpc_readb(falcbase + F_REG((ICB1 + (timeslot - tshf) / 8), ch)) | |
@@ -812,7 +810,7 @@ static void falc_init_t1(pc300_t * card, int ch) | |||
812 | pc300chconf_t *conf = (pc300chconf_t *) & chan->conf; | 810 | pc300chconf_t *conf = (pc300chconf_t *) & chan->conf; |
813 | falc_t *pfalc = (falc_t *) & chan->falc; | 811 | falc_t *pfalc = (falc_t *) & chan->falc; |
814 | void __iomem *falcbase = card->hw.falcbase; | 812 | void __iomem *falcbase = card->hw.falcbase; |
815 | ucchar dja = (ch ? (LIM2_DJA2 | LIM2_DJA1) : 0); | 813 | u8 dja = (ch ? (LIM2_DJA2 | LIM2_DJA1) : 0); |
816 | 814 | ||
817 | /* Switch to T1 mode (PCM 24) */ | 815 | /* Switch to T1 mode (PCM 24) */ |
818 | cpc_writeb(falcbase + F_REG(FMR1, ch), FMR1_PMOD); | 816 | cpc_writeb(falcbase + F_REG(FMR1, ch), FMR1_PMOD); |
@@ -981,7 +979,7 @@ static void falc_init_e1(pc300_t * card, int ch) | |||
981 | pc300chconf_t *conf = (pc300chconf_t *) & chan->conf; | 979 | pc300chconf_t *conf = (pc300chconf_t *) & chan->conf; |
982 | falc_t *pfalc = (falc_t *) & chan->falc; | 980 | falc_t *pfalc = (falc_t *) & chan->falc; |
983 | void __iomem *falcbase = card->hw.falcbase; | 981 | void __iomem *falcbase = card->hw.falcbase; |
984 | ucchar dja = (ch ? (LIM2_DJA2 | LIM2_DJA1) : 0); | 982 | u8 dja = (ch ? (LIM2_DJA2 | LIM2_DJA1) : 0); |
985 | 983 | ||
986 | /* Switch to E1 mode (PCM 30) */ | 984 | /* Switch to E1 mode (PCM 30) */ |
987 | cpc_writeb(falcbase + F_REG(FMR1, ch), | 985 | cpc_writeb(falcbase + F_REG(FMR1, ch), |
@@ -1187,7 +1185,7 @@ static void te_config(pc300_t * card, int ch) | |||
1187 | pc300chconf_t *conf = (pc300chconf_t *) & chan->conf; | 1185 | pc300chconf_t *conf = (pc300chconf_t *) & chan->conf; |
1188 | falc_t *pfalc = (falc_t *) & chan->falc; | 1186 | falc_t *pfalc = (falc_t *) & chan->falc; |
1189 | void __iomem *falcbase = card->hw.falcbase; | 1187 | void __iomem *falcbase = card->hw.falcbase; |
1190 | ucchar dummy; | 1188 | u8 dummy; |
1191 | unsigned long flags; | 1189 | unsigned long flags; |
1192 | 1190 | ||
1193 | memset(pfalc, 0, sizeof(falc_t)); | 1191 | memset(pfalc, 0, sizeof(falc_t)); |
@@ -1403,7 +1401,7 @@ static void falc_update_stats(pc300_t * card, int ch) | |||
1403 | pc300chconf_t *conf = (pc300chconf_t *) & chan->conf; | 1401 | pc300chconf_t *conf = (pc300chconf_t *) & chan->conf; |
1404 | falc_t *pfalc = (falc_t *) & chan->falc; | 1402 | falc_t *pfalc = (falc_t *) & chan->falc; |
1405 | void __iomem *falcbase = card->hw.falcbase; | 1403 | void __iomem *falcbase = card->hw.falcbase; |
1406 | ucshort counter; | 1404 | u16 counter; |
1407 | 1405 | ||
1408 | counter = cpc_readb(falcbase + F_REG(FECL, ch)); | 1406 | counter = cpc_readb(falcbase + F_REG(FECL, ch)); |
1409 | counter |= cpc_readb(falcbase + F_REG(FECH, ch)) << 8; | 1407 | counter |= cpc_readb(falcbase + F_REG(FECH, ch)) << 8; |
@@ -1729,7 +1727,7 @@ static void falc_pattern_test(pc300_t * card, int ch, unsigned int activate) | |||
1729 | * Description: This routine returns the bit error counter value | 1727 | * Description: This routine returns the bit error counter value |
1730 | *---------------------------------------------------------------------------- | 1728 | *---------------------------------------------------------------------------- |
1731 | */ | 1729 | */ |
1732 | static ucshort falc_pattern_test_error(pc300_t * card, int ch) | 1730 | static u16 falc_pattern_test_error(pc300_t * card, int ch) |
1733 | { | 1731 | { |
1734 | pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; | 1732 | pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; |
1735 | falc_t *pfalc = (falc_t *) & chan->falc; | 1733 | falc_t *pfalc = (falc_t *) & chan->falc; |
@@ -1776,7 +1774,7 @@ static void cpc_tx_timeout(struct net_device *dev) | |||
1776 | pc300_t *card = (pc300_t *) chan->card; | 1774 | pc300_t *card = (pc300_t *) chan->card; |
1777 | int ch = chan->channel; | 1775 | int ch = chan->channel; |
1778 | unsigned long flags; | 1776 | unsigned long flags; |
1779 | ucchar ilar; | 1777 | u8 ilar; |
1780 | 1778 | ||
1781 | dev->stats.tx_errors++; | 1779 | dev->stats.tx_errors++; |
1782 | dev->stats.tx_aborted_errors++; | 1780 | dev->stats.tx_aborted_errors++; |
@@ -1807,11 +1805,7 @@ static int cpc_queue_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1807 | int i; | 1805 | int i; |
1808 | #endif | 1806 | #endif |
1809 | 1807 | ||
1810 | if (chan->conf.monitor) { | 1808 | if (!netif_carrier_ok(dev)) { |
1811 | /* In monitor mode no Tx is done: ignore packet */ | ||
1812 | dev_kfree_skb(skb); | ||
1813 | return 0; | ||
1814 | } else if (!netif_carrier_ok(dev)) { | ||
1815 | /* DCD must be OFF: drop packet */ | 1809 | /* DCD must be OFF: drop packet */ |
1816 | dev_kfree_skb(skb); | 1810 | dev_kfree_skb(skb); |
1817 | dev->stats.tx_errors++; | 1811 | dev->stats.tx_errors++; |
@@ -1836,7 +1830,7 @@ static int cpc_queue_xmit(struct sk_buff *skb, struct net_device *dev) | |||
1836 | } | 1830 | } |
1837 | 1831 | ||
1838 | /* Write buffer to DMA buffers */ | 1832 | /* Write buffer to DMA buffers */ |
1839 | if (dma_buf_write(card, ch, (ucchar *) skb->data, skb->len) != 0) { | 1833 | if (dma_buf_write(card, ch, (u8 *)skb->data, skb->len) != 0) { |
1840 | // printk("%s: write error. Dropping TX packet.\n", dev->name); | 1834 | // printk("%s: write error. Dropping TX packet.\n", dev->name); |
1841 | netif_stop_queue(dev); | 1835 | netif_stop_queue(dev); |
1842 | dev_kfree_skb(skb); | 1836 | dev_kfree_skb(skb); |
@@ -2001,7 +1995,7 @@ static void sca_tx_intr(pc300dev_t *dev) | |||
2001 | static void sca_intr(pc300_t * card) | 1995 | static void sca_intr(pc300_t * card) |
2002 | { | 1996 | { |
2003 | void __iomem *scabase = card->hw.scabase; | 1997 | void __iomem *scabase = card->hw.scabase; |
2004 | volatile uclong status; | 1998 | volatile u32 status; |
2005 | int ch; | 1999 | int ch; |
2006 | int intr_count = 0; | 2000 | int intr_count = 0; |
2007 | unsigned char dsr_rx; | 2001 | unsigned char dsr_rx; |
@@ -2016,7 +2010,7 @@ static void sca_intr(pc300_t * card) | |||
2016 | 2010 | ||
2017 | /**** Reception ****/ | 2011 | /**** Reception ****/ |
2018 | if (status & IR0_DRX((IR0_DMIA | IR0_DMIB), ch)) { | 2012 | if (status & IR0_DRX((IR0_DMIA | IR0_DMIB), ch)) { |
2019 | ucchar drx_stat = cpc_readb(scabase + DSR_RX(ch)); | 2013 | u8 drx_stat = cpc_readb(scabase + DSR_RX(ch)); |
2020 | 2014 | ||
2021 | /* Clear RX interrupts */ | 2015 | /* Clear RX interrupts */ |
2022 | cpc_writeb(scabase + DSR_RX(ch), drx_stat | DSR_DWE); | 2016 | cpc_writeb(scabase + DSR_RX(ch), drx_stat | DSR_DWE); |
@@ -2090,7 +2084,7 @@ static void sca_intr(pc300_t * card) | |||
2090 | 2084 | ||
2091 | /**** Transmission ****/ | 2085 | /**** Transmission ****/ |
2092 | if (status & IR0_DTX((IR0_EFT | IR0_DMIA | IR0_DMIB), ch)) { | 2086 | if (status & IR0_DTX((IR0_EFT | IR0_DMIA | IR0_DMIB), ch)) { |
2093 | ucchar dtx_stat = cpc_readb(scabase + DSR_TX(ch)); | 2087 | u8 dtx_stat = cpc_readb(scabase + DSR_TX(ch)); |
2094 | 2088 | ||
2095 | /* Clear TX interrupts */ | 2089 | /* Clear TX interrupts */ |
2096 | cpc_writeb(scabase + DSR_TX(ch), dtx_stat | DSR_DWE); | 2090 | cpc_writeb(scabase + DSR_TX(ch), dtx_stat | DSR_DWE); |
@@ -2134,7 +2128,7 @@ static void sca_intr(pc300_t * card) | |||
2134 | 2128 | ||
2135 | /**** MSCI ****/ | 2129 | /**** MSCI ****/ |
2136 | if (status & IR0_M(IR0_RXINTA, ch)) { | 2130 | if (status & IR0_M(IR0_RXINTA, ch)) { |
2137 | ucchar st1 = cpc_readb(scabase + M_REG(ST1, ch)); | 2131 | u8 st1 = cpc_readb(scabase + M_REG(ST1, ch)); |
2138 | 2132 | ||
2139 | /* Clear MSCI interrupts */ | 2133 | /* Clear MSCI interrupts */ |
2140 | cpc_writeb(scabase + M_REG(ST1, ch), st1); | 2134 | cpc_writeb(scabase + M_REG(ST1, ch), st1); |
@@ -2176,7 +2170,7 @@ static void sca_intr(pc300_t * card) | |||
2176 | } | 2170 | } |
2177 | } | 2171 | } |
2178 | 2172 | ||
2179 | static void falc_t1_loop_detection(pc300_t * card, int ch, ucchar frs1) | 2173 | static void falc_t1_loop_detection(pc300_t *card, int ch, u8 frs1) |
2180 | { | 2174 | { |
2181 | pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; | 2175 | pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; |
2182 | falc_t *pfalc = (falc_t *) & chan->falc; | 2176 | falc_t *pfalc = (falc_t *) & chan->falc; |
@@ -2201,7 +2195,7 @@ static void falc_t1_loop_detection(pc300_t * card, int ch, ucchar frs1) | |||
2201 | } | 2195 | } |
2202 | } | 2196 | } |
2203 | 2197 | ||
2204 | static void falc_e1_loop_detection(pc300_t * card, int ch, ucchar rsp) | 2198 | static void falc_e1_loop_detection(pc300_t *card, int ch, u8 rsp) |
2205 | { | 2199 | { |
2206 | pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; | 2200 | pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; |
2207 | falc_t *pfalc = (falc_t *) & chan->falc; | 2201 | falc_t *pfalc = (falc_t *) & chan->falc; |
@@ -2231,8 +2225,8 @@ static void falc_t1_intr(pc300_t * card, int ch) | |||
2231 | pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; | 2225 | pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; |
2232 | falc_t *pfalc = (falc_t *) & chan->falc; | 2226 | falc_t *pfalc = (falc_t *) & chan->falc; |
2233 | void __iomem *falcbase = card->hw.falcbase; | 2227 | void __iomem *falcbase = card->hw.falcbase; |
2234 | ucchar isr0, isr3, gis; | 2228 | u8 isr0, isr3, gis; |
2235 | ucchar dummy; | 2229 | u8 dummy; |
2236 | 2230 | ||
2237 | while ((gis = cpc_readb(falcbase + F_REG(GIS, ch))) != 0) { | 2231 | while ((gis = cpc_readb(falcbase + F_REG(GIS, ch))) != 0) { |
2238 | if (gis & GIS_ISR0) { | 2232 | if (gis & GIS_ISR0) { |
@@ -2278,8 +2272,8 @@ static void falc_e1_intr(pc300_t * card, int ch) | |||
2278 | pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; | 2272 | pc300ch_t *chan = (pc300ch_t *) & card->chan[ch]; |
2279 | falc_t *pfalc = (falc_t *) & chan->falc; | 2273 | falc_t *pfalc = (falc_t *) & chan->falc; |
2280 | void __iomem *falcbase = card->hw.falcbase; | 2274 | void __iomem *falcbase = card->hw.falcbase; |
2281 | ucchar isr1, isr2, isr3, gis, rsp; | 2275 | u8 isr1, isr2, isr3, gis, rsp; |
2282 | ucchar dummy; | 2276 | u8 dummy; |
2283 | 2277 | ||
2284 | while ((gis = cpc_readb(falcbase + F_REG(GIS, ch))) != 0) { | 2278 | while ((gis = cpc_readb(falcbase + F_REG(GIS, ch))) != 0) { |
2285 | rsp = cpc_readb(falcbase + F_REG(RSP, ch)); | 2279 | rsp = cpc_readb(falcbase + F_REG(RSP, ch)); |
@@ -2361,7 +2355,7 @@ static void falc_intr(pc300_t * card) | |||
2361 | static irqreturn_t cpc_intr(int irq, void *dev_id) | 2355 | static irqreturn_t cpc_intr(int irq, void *dev_id) |
2362 | { | 2356 | { |
2363 | pc300_t *card = dev_id; | 2357 | pc300_t *card = dev_id; |
2364 | volatile ucchar plx_status; | 2358 | volatile u8 plx_status; |
2365 | 2359 | ||
2366 | if (!card) { | 2360 | if (!card) { |
2367 | #ifdef PC300_DEBUG_INTR | 2361 | #ifdef PC300_DEBUG_INTR |
@@ -2400,7 +2394,7 @@ static irqreturn_t cpc_intr(int irq, void *dev_id) | |||
2400 | 2394 | ||
2401 | static void cpc_sca_status(pc300_t * card, int ch) | 2395 | static void cpc_sca_status(pc300_t * card, int ch) |
2402 | { | 2396 | { |
2403 | ucchar ilar; | 2397 | u8 ilar; |
2404 | void __iomem *scabase = card->hw.scabase; | 2398 | void __iomem *scabase = card->hw.scabase; |
2405 | unsigned long flags; | 2399 | unsigned long flags; |
2406 | 2400 | ||
@@ -2818,7 +2812,7 @@ static int cpc_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) | |||
2818 | } | 2812 | } |
2819 | } | 2813 | } |
2820 | 2814 | ||
2821 | static int clock_rate_calc(uclong rate, uclong clock, int *br_io) | 2815 | static int clock_rate_calc(u32 rate, u32 clock, int *br_io) |
2822 | { | 2816 | { |
2823 | int br, tc; | 2817 | int br, tc; |
2824 | int br_pwr, error; | 2818 | int br_pwr, error; |
@@ -2855,12 +2849,12 @@ static int ch_config(pc300dev_t * d) | |||
2855 | void __iomem *scabase = card->hw.scabase; | 2849 | void __iomem *scabase = card->hw.scabase; |
2856 | void __iomem *plxbase = card->hw.plxbase; | 2850 | void __iomem *plxbase = card->hw.plxbase; |
2857 | int ch = chan->channel; | 2851 | int ch = chan->channel; |
2858 | uclong clkrate = chan->conf.phys_settings.clock_rate; | 2852 | u32 clkrate = chan->conf.phys_settings.clock_rate; |
2859 | uclong clktype = chan->conf.phys_settings.clock_type; | 2853 | u32 clktype = chan->conf.phys_settings.clock_type; |
2860 | ucshort encoding = chan->conf.proto_settings.encoding; | 2854 | u16 encoding = chan->conf.proto_settings.encoding; |
2861 | ucshort parity = chan->conf.proto_settings.parity; | 2855 | u16 parity = chan->conf.proto_settings.parity; |
2862 | ucchar md0, md2; | 2856 | u8 md0, md2; |
2863 | 2857 | ||
2864 | /* Reset the channel */ | 2858 | /* Reset the channel */ |
2865 | cpc_writeb(scabase + M_REG(CMD, ch), CMD_CH_RST); | 2859 | cpc_writeb(scabase + M_REG(CMD, ch), CMD_CH_RST); |
2866 | 2860 | ||
@@ -3152,19 +3146,10 @@ int cpc_open(struct net_device *dev) | |||
3152 | printk("pc300: cpc_open"); | 3146 | printk("pc300: cpc_open"); |
3153 | #endif | 3147 | #endif |
3154 | 3148 | ||
3155 | #ifdef FIXME | ||
3156 | if (hdlc->proto.id == IF_PROTO_PPP) { | ||
3157 | d->if_ptr = &hdlc->state.ppp.pppdev; | ||
3158 | } | ||
3159 | #endif | ||
3160 | |||
3161 | result = hdlc_open(dev); | 3149 | result = hdlc_open(dev); |
3162 | if (/* FIXME hdlc->proto.id == IF_PROTO_PPP*/ 0) { | 3150 | |
3163 | dev->priv = d; | 3151 | if (result) |
3164 | } | ||
3165 | if (result) { | ||
3166 | return result; | 3152 | return result; |
3167 | } | ||
3168 | 3153 | ||
3169 | sprintf(ifr.ifr_name, "%s", dev->name); | 3154 | sprintf(ifr.ifr_name, "%s", dev->name); |
3170 | result = cpc_opench(d); | 3155 | result = cpc_opench(d); |
@@ -3197,9 +3182,7 @@ static int cpc_close(struct net_device *dev) | |||
3197 | CPC_UNLOCK(card, flags); | 3182 | CPC_UNLOCK(card, flags); |
3198 | 3183 | ||
3199 | hdlc_close(dev); | 3184 | hdlc_close(dev); |
3200 | if (/* FIXME hdlc->proto.id == IF_PROTO_PPP*/ 0) { | 3185 | |
3201 | d->if_ptr = NULL; | ||
3202 | } | ||
3203 | #ifdef CONFIG_PC300_MLPPP | 3186 | #ifdef CONFIG_PC300_MLPPP |
3204 | if (chan->conf.proto == PC300_PROTO_MLPPP) { | 3187 | if (chan->conf.proto == PC300_PROTO_MLPPP) { |
3205 | cpc_tty_unregister_service(d); | 3188 | cpc_tty_unregister_service(d); |
@@ -3210,16 +3193,16 @@ static int cpc_close(struct net_device *dev) | |||
3210 | return 0; | 3193 | return 0; |
3211 | } | 3194 | } |
3212 | 3195 | ||
3213 | static uclong detect_ram(pc300_t * card) | 3196 | static u32 detect_ram(pc300_t * card) |
3214 | { | 3197 | { |
3215 | uclong i; | 3198 | u32 i; |
3216 | ucchar data; | 3199 | u8 data; |
3217 | void __iomem *rambase = card->hw.rambase; | 3200 | void __iomem *rambase = card->hw.rambase; |
3218 | 3201 | ||
3219 | card->hw.ramsize = PC300_RAMSIZE; | 3202 | card->hw.ramsize = PC300_RAMSIZE; |
3220 | /* Let's find out how much RAM is present on this board */ | 3203 | /* Let's find out how much RAM is present on this board */ |
3221 | for (i = 0; i < card->hw.ramsize; i++) { | 3204 | for (i = 0; i < card->hw.ramsize; i++) { |
3222 | data = (ucchar) (i & 0xff); | 3205 | data = (u8)(i & 0xff); |
3223 | cpc_writeb(rambase + i, data); | 3206 | cpc_writeb(rambase + i, data); |
3224 | if (cpc_readb(rambase + i) != data) { | 3207 | if (cpc_readb(rambase + i) != data) { |
3225 | break; | 3208 | break; |
@@ -3296,7 +3279,7 @@ static void cpc_init_card(pc300_t * card) | |||
3296 | cpc_writeb(card->hw.scabase + DMER, 0x80); | 3279 | cpc_writeb(card->hw.scabase + DMER, 0x80); |
3297 | 3280 | ||
3298 | if (card->hw.type == PC300_TE) { | 3281 | if (card->hw.type == PC300_TE) { |
3299 | ucchar reg1; | 3282 | u8 reg1; |
3300 | 3283 | ||
3301 | /* Check CPLD version */ | 3284 | /* Check CPLD version */ |
3302 | reg1 = cpc_readb(card->hw.falcbase + CPLD_REG1); | 3285 | reg1 = cpc_readb(card->hw.falcbase + CPLD_REG1); |
@@ -3360,7 +3343,6 @@ static void cpc_init_card(pc300_t * card) | |||
3360 | chan->nfree_tx_bd = N_DMA_TX_BUF; | 3343 | chan->nfree_tx_bd = N_DMA_TX_BUF; |
3361 | 3344 | ||
3362 | d->chan = chan; | 3345 | d->chan = chan; |
3363 | d->tx_skb = NULL; | ||
3364 | d->trace_on = 0; | 3346 | d->trace_on = 0; |
3365 | d->line_on = 0; | 3347 | d->line_on = 0; |
3366 | d->line_off = 0; | 3348 | d->line_off = 0; |
@@ -3431,7 +3413,7 @@ cpc_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
3431 | { | 3413 | { |
3432 | static int first_time = 1; | 3414 | static int first_time = 1; |
3433 | int err, eeprom_outdated = 0; | 3415 | int err, eeprom_outdated = 0; |
3434 | ucshort device_id; | 3416 | u16 device_id; |
3435 | pc300_t *card; | 3417 | pc300_t *card; |
3436 | 3418 | ||
3437 | if (first_time) { | 3419 | if (first_time) { |