diff options
Diffstat (limited to 'drivers/net/ucc_geth.h')
| -rw-r--r-- | drivers/net/ucc_geth.h | 114 |
1 files changed, 25 insertions, 89 deletions
diff --git a/drivers/net/ucc_geth.h b/drivers/net/ucc_geth.h index d74d2f7cb739..8f699cb773ee 100644 --- a/drivers/net/ucc_geth.h +++ b/drivers/net/ucc_geth.h | |||
| @@ -162,92 +162,27 @@ struct ucc_geth { | |||
| 162 | boundary */ | 162 | boundary */ |
| 163 | 163 | ||
| 164 | /* UCC GETH Event Register */ | 164 | /* UCC GETH Event Register */ |
| 165 | #define UCCE_MPD 0x80000000 /* Magic packet | 165 | #define UCCE_TXB (UCC_GETH_UCCE_TXB7 | UCC_GETH_UCCE_TXB6 | \ |
| 166 | detection */ | 166 | UCC_GETH_UCCE_TXB5 | UCC_GETH_UCCE_TXB4 | \ |
| 167 | #define UCCE_SCAR 0x40000000 | 167 | UCC_GETH_UCCE_TXB3 | UCC_GETH_UCCE_TXB2 | \ |
| 168 | #define UCCE_GRA 0x20000000 /* Tx graceful | 168 | UCC_GETH_UCCE_TXB1 | UCC_GETH_UCCE_TXB0) |
| 169 | stop | 169 | |
| 170 | complete */ | 170 | #define UCCE_RXB (UCC_GETH_UCCE_RXB7 | UCC_GETH_UCCE_RXB6 | \ |
| 171 | #define UCCE_CBPR 0x10000000 | 171 | UCC_GETH_UCCE_RXB5 | UCC_GETH_UCCE_RXB4 | \ |
| 172 | #define UCCE_BSY 0x08000000 | 172 | UCC_GETH_UCCE_RXB3 | UCC_GETH_UCCE_RXB2 | \ |
| 173 | #define UCCE_RXC 0x04000000 | 173 | UCC_GETH_UCCE_RXB1 | UCC_GETH_UCCE_RXB0) |
| 174 | #define UCCE_TXC 0x02000000 | 174 | |
| 175 | #define UCCE_TXE 0x01000000 | 175 | #define UCCE_RXF (UCC_GETH_UCCE_RXF7 | UCC_GETH_UCCE_RXF6 | \ |
| 176 | #define UCCE_TXB7 0x00800000 | 176 | UCC_GETH_UCCE_RXF5 | UCC_GETH_UCCE_RXF4 | \ |
| 177 | #define UCCE_TXB6 0x00400000 | 177 | UCC_GETH_UCCE_RXF3 | UCC_GETH_UCCE_RXF2 | \ |
| 178 | #define UCCE_TXB5 0x00200000 | 178 | UCC_GETH_UCCE_RXF1 | UCC_GETH_UCCE_RXF0) |
| 179 | #define UCCE_TXB4 0x00100000 | 179 | |
| 180 | #define UCCE_TXB3 0x00080000 | 180 | #define UCCE_OTHER (UCC_GETH_UCCE_SCAR | UCC_GETH_UCCE_GRA | \ |
| 181 | #define UCCE_TXB2 0x00040000 | 181 | UCC_GETH_UCCE_CBPR | UCC_GETH_UCCE_BSY | \ |
| 182 | #define UCCE_TXB1 0x00020000 | 182 | UCC_GETH_UCCE_RXC | UCC_GETH_UCCE_TXC | UCC_GETH_UCCE_TXE) |
| 183 | #define UCCE_TXB0 0x00010000 | 183 | |
| 184 | #define UCCE_RXB7 0x00008000 | 184 | #define UCCE_RX_EVENTS (UCCE_RXF | UCC_GETH_UCCE_BSY) |
| 185 | #define UCCE_RXB6 0x00004000 | 185 | #define UCCE_TX_EVENTS (UCCE_TXB | UCC_GETH_UCCE_TXE) |
| 186 | #define UCCE_RXB5 0x00002000 | ||
| 187 | #define UCCE_RXB4 0x00001000 | ||
| 188 | #define UCCE_RXB3 0x00000800 | ||
| 189 | #define UCCE_RXB2 0x00000400 | ||
| 190 | #define UCCE_RXB1 0x00000200 | ||
| 191 | #define UCCE_RXB0 0x00000100 | ||
| 192 | #define UCCE_RXF7 0x00000080 | ||
| 193 | #define UCCE_RXF6 0x00000040 | ||
| 194 | #define UCCE_RXF5 0x00000020 | ||
| 195 | #define UCCE_RXF4 0x00000010 | ||
| 196 | #define UCCE_RXF3 0x00000008 | ||
| 197 | #define UCCE_RXF2 0x00000004 | ||
| 198 | #define UCCE_RXF1 0x00000002 | ||
| 199 | #define UCCE_RXF0 0x00000001 | ||
| 200 | |||
| 201 | #define UCCE_RXBF_SINGLE_MASK (UCCE_RXF0) | ||
| 202 | #define UCCE_TXBF_SINGLE_MASK (UCCE_TXB0) | ||
| 203 | |||
| 204 | #define UCCE_TXB (UCCE_TXB7 | UCCE_TXB6 | UCCE_TXB5 | UCCE_TXB4 |\ | ||
| 205 | UCCE_TXB3 | UCCE_TXB2 | UCCE_TXB1 | UCCE_TXB0) | ||
| 206 | #define UCCE_RXB (UCCE_RXB7 | UCCE_RXB6 | UCCE_RXB5 | UCCE_RXB4 |\ | ||
| 207 | UCCE_RXB3 | UCCE_RXB2 | UCCE_RXB1 | UCCE_RXB0) | ||
| 208 | #define UCCE_RXF (UCCE_RXF7 | UCCE_RXF6 | UCCE_RXF5 | UCCE_RXF4 |\ | ||
| 209 | UCCE_RXF3 | UCCE_RXF2 | UCCE_RXF1 | UCCE_RXF0) | ||
| 210 | #define UCCE_OTHER (UCCE_SCAR | UCCE_GRA | UCCE_CBPR | UCCE_BSY |\ | ||
| 211 | UCCE_RXC | UCCE_TXC | UCCE_TXE) | ||
| 212 | |||
| 213 | #define UCCE_RX_EVENTS (UCCE_RXF | UCCE_BSY) | ||
| 214 | #define UCCE_TX_EVENTS (UCCE_TXB | UCCE_TXE) | ||
| 215 | |||
| 216 | /* UCC GETH UPSMR (Protocol Specific Mode Register) */ | ||
| 217 | #define UPSMR_ECM 0x04000000 /* Enable CAM | ||
| 218 | Miss or | ||
| 219 | Enable | ||
| 220 | Filtering | ||
| 221 | Miss */ | ||
| 222 | #define UPSMR_HSE 0x02000000 /* Hardware | ||
| 223 | Statistics | ||
| 224 | Enable */ | ||
| 225 | #define UPSMR_PRO 0x00400000 /* Promiscuous*/ | ||
| 226 | #define UPSMR_CAP 0x00200000 /* CAM polarity | ||
| 227 | */ | ||
| 228 | #define UPSMR_RSH 0x00100000 /* Receive | ||
| 229 | Short Frames | ||
| 230 | */ | ||
| 231 | #define UPSMR_RPM 0x00080000 /* Reduced Pin | ||
| 232 | Mode | ||
| 233 | interfaces */ | ||
| 234 | #define UPSMR_R10M 0x00040000 /* RGMII/RMII | ||
| 235 | 10 Mode */ | ||
| 236 | #define UPSMR_RLPB 0x00020000 /* RMII | ||
| 237 | Loopback | ||
| 238 | Mode */ | ||
| 239 | #define UPSMR_TBIM 0x00010000 /* Ten-bit | ||
| 240 | Interface | ||
| 241 | Mode */ | ||
| 242 | #define UPSMR_RMM 0x00001000 /* RMII/RGMII | ||
| 243 | Mode */ | ||
| 244 | #define UPSMR_CAM 0x00000400 /* CAM Address | ||
| 245 | Matching */ | ||
| 246 | #define UPSMR_BRO 0x00000200 /* Broadcast | ||
| 247 | Address */ | ||
| 248 | #define UPSMR_RES1 0x00002000 /* Reserved | ||
| 249 | feild - must | ||
| 250 | be 1 */ | ||
| 251 | 186 | ||
| 252 | /* UCC GETH MACCFG1 (MAC Configuration 1 Register) */ | 187 | /* UCC GETH MACCFG1 (MAC Configuration 1 Register) */ |
| 253 | #define MACCFG1_FLOW_RX 0x00000020 /* Flow Control | 188 | #define MACCFG1_FLOW_RX 0x00000020 /* Flow Control |
| @@ -945,9 +880,10 @@ struct ucc_geth_hardware_statistics { | |||
| 945 | #define UCC_GETH_REMODER_INIT 0 /* bits that must be | 880 | #define UCC_GETH_REMODER_INIT 0 /* bits that must be |
| 946 | set */ | 881 | set */ |
| 947 | #define UCC_GETH_TEMODER_INIT 0xC000 /* bits that must */ | 882 | #define UCC_GETH_TEMODER_INIT 0xC000 /* bits that must */ |
| 948 | #define UCC_GETH_UPSMR_INIT (UPSMR_RES1) /* Start value | 883 | |
| 949 | for this | 884 | /* Initial value for UPSMR */ |
| 950 | register */ | 885 | #define UCC_GETH_UPSMR_INIT UCC_GETH_UPSMR_RES1 |
| 886 | |||
| 951 | #define UCC_GETH_MACCFG1_INIT 0 | 887 | #define UCC_GETH_MACCFG1_INIT 0 |
| 952 | #define UCC_GETH_MACCFG2_INIT (MACCFG2_RESERVED_1) | 888 | #define UCC_GETH_MACCFG2_INIT (MACCFG2_RESERVED_1) |
| 953 | 889 | ||