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path: root/drivers/net/sungem.c
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Diffstat (limited to 'drivers/net/sungem.c')
-rw-r--r--drivers/net/sungem.c55
1 files changed, 25 insertions, 30 deletions
diff --git a/drivers/net/sungem.c b/drivers/net/sungem.c
index 55f3b856236e..28ce47a02408 100644
--- a/drivers/net/sungem.c
+++ b/drivers/net/sungem.c
@@ -1653,40 +1653,36 @@ static void gem_init_rings(struct gem *gp)
1653/* Init PHY interface and start link poll state machine */ 1653/* Init PHY interface and start link poll state machine */
1654static void gem_init_phy(struct gem *gp) 1654static void gem_init_phy(struct gem *gp)
1655{ 1655{
1656 u32 mif_cfg; 1656 u32 mifcfg;
1657 1657
1658 /* Revert MIF CFG setting done on stop_phy */ 1658 /* Revert MIF CFG setting done on stop_phy */
1659 mif_cfg = readl(gp->regs + MIF_CFG); 1659 mifcfg = readl(gp->regs + MIF_CFG);
1660 mif_cfg &= ~(MIF_CFG_PSELECT|MIF_CFG_POLL|MIF_CFG_BBMODE|MIF_CFG_MDI1); 1660 mifcfg &= ~MIF_CFG_BBMODE;
1661 mif_cfg |= MIF_CFG_MDI0; 1661 writel(mifcfg, gp->regs + MIF_CFG);
1662 writel(mif_cfg, gp->regs + MIF_CFG);
1663 writel(PCS_DMODE_MGM, gp->regs + PCS_DMODE);
1664 writel(MAC_XIFCFG_OE, gp->regs + MAC_XIFCFG);
1665 1662
1666 if (gp->pdev->vendor == PCI_VENDOR_ID_APPLE) { 1663 if (gp->pdev->vendor == PCI_VENDOR_ID_APPLE) {
1667 int i; 1664 int i;
1668 u16 ctrl;
1669 1665
1666 /* Those delay sucks, the HW seem to love them though, I'll
1667 * serisouly consider breaking some locks here to be able
1668 * to schedule instead
1669 */
1670 for (i = 0; i < 3; i++) {
1670#ifdef CONFIG_PPC_PMAC 1671#ifdef CONFIG_PPC_PMAC
1671 pmac_call_feature(PMAC_FTR_GMAC_PHY_RESET, gp->of_node, 0, 0); 1672 pmac_call_feature(PMAC_FTR_GMAC_PHY_RESET, gp->of_node, 0, 0);
1673 msleep(20);
1672#endif 1674#endif
1673 1675 /* Some PHYs used by apple have problem getting back to us,
1674 /* Some PHYs used by apple have problem getting back 1676 * we do an additional reset here
1675 * to us, we do an additional reset here 1677 */
1676 */ 1678 phy_write(gp, MII_BMCR, BMCR_RESET);
1677 phy_write(gp, MII_BMCR, BMCR_RESET); 1679 msleep(20);
1678 for (i = 0; i < 50; i++) { 1680 if (phy_read(gp, MII_BMCR) != 0xffff)
1679 if ((phy_read(gp, MII_BMCR) & BMCR_RESET) == 0)
1680 break; 1681 break;
1681 msleep(10); 1682 if (i == 2)
1683 printk(KERN_WARNING "%s: GMAC PHY not responding !\n",
1684 gp->dev->name);
1682 } 1685 }
1683 if (i == 50)
1684 printk(KERN_WARNING "%s: GMAC PHY not responding !\n",
1685 gp->dev->name);
1686 /* Make sure isolate is off */
1687 ctrl = phy_read(gp, MII_BMCR);
1688 if (ctrl & BMCR_ISOLATE)
1689 phy_write(gp, MII_BMCR, ctrl & ~BMCR_ISOLATE);
1690 } 1686 }
1691 1687
1692 if (gp->pdev->vendor == PCI_VENDOR_ID_SUN && 1688 if (gp->pdev->vendor == PCI_VENDOR_ID_SUN &&
@@ -2123,7 +2119,7 @@ static void gem_reinit_chip(struct gem *gp)
2123/* Must be invoked with no lock held. */ 2119/* Must be invoked with no lock held. */
2124static void gem_stop_phy(struct gem *gp, int wol) 2120static void gem_stop_phy(struct gem *gp, int wol)
2125{ 2121{
2126 u32 mif_cfg; 2122 u32 mifcfg;
2127 unsigned long flags; 2123 unsigned long flags;
2128 2124
2129 /* Let the chip settle down a bit, it seems that helps 2125 /* Let the chip settle down a bit, it seems that helps
@@ -2134,9 +2130,9 @@ static void gem_stop_phy(struct gem *gp, int wol)
2134 /* Make sure we aren't polling PHY status change. We 2130 /* Make sure we aren't polling PHY status change. We
2135 * don't currently use that feature though 2131 * don't currently use that feature though
2136 */ 2132 */
2137 mif_cfg = readl(gp->regs + MIF_CFG); 2133 mifcfg = readl(gp->regs + MIF_CFG);
2138 mif_cfg &= ~MIF_CFG_POLL; 2134 mifcfg &= ~MIF_CFG_POLL;
2139 writel(mif_cfg, gp->regs + MIF_CFG); 2135 writel(mifcfg, gp->regs + MIF_CFG);
2140 2136
2141 if (wol && gp->has_wol) { 2137 if (wol && gp->has_wol) {
2142 unsigned char *e = &gp->dev->dev_addr[0]; 2138 unsigned char *e = &gp->dev->dev_addr[0];
@@ -2186,8 +2182,7 @@ static void gem_stop_phy(struct gem *gp, int wol)
2186 /* According to Apple, we must set the MDIO pins to this begnign 2182 /* According to Apple, we must set the MDIO pins to this begnign
2187 * state or we may 1) eat more current, 2) damage some PHYs 2183 * state or we may 1) eat more current, 2) damage some PHYs
2188 */ 2184 */
2189 mif_cfg = 0; 2185 writel(mifcfg | MIF_CFG_BBMODE, gp->regs + MIF_CFG);
2190 writel(mif_cfg | MIF_CFG_BBMODE, gp->regs + MIF_CFG);
2191 writel(0, gp->regs + MIF_BBCLK); 2186 writel(0, gp->regs + MIF_BBCLK);
2192 writel(0, gp->regs + MIF_BBDATA); 2187 writel(0, gp->regs + MIF_BBDATA);
2193 writel(0, gp->regs + MIF_BBOENAB); 2188 writel(0, gp->regs + MIF_BBOENAB);