diff options
Diffstat (limited to 'drivers/net/stmmac/dwmac_lib.c')
-rw-r--r-- | drivers/net/stmmac/dwmac_lib.c | 12 |
1 files changed, 0 insertions, 12 deletions
diff --git a/drivers/net/stmmac/dwmac_lib.c b/drivers/net/stmmac/dwmac_lib.c index 0a504adb7eb3..a85415216ef4 100644 --- a/drivers/net/stmmac/dwmac_lib.c +++ b/drivers/net/stmmac/dwmac_lib.c | |||
@@ -52,7 +52,6 @@ void dwmac_dma_start_tx(unsigned long ioaddr) | |||
52 | u32 value = readl(ioaddr + DMA_CONTROL); | 52 | u32 value = readl(ioaddr + DMA_CONTROL); |
53 | value |= DMA_CONTROL_ST; | 53 | value |= DMA_CONTROL_ST; |
54 | writel(value, ioaddr + DMA_CONTROL); | 54 | writel(value, ioaddr + DMA_CONTROL); |
55 | return; | ||
56 | } | 55 | } |
57 | 56 | ||
58 | void dwmac_dma_stop_tx(unsigned long ioaddr) | 57 | void dwmac_dma_stop_tx(unsigned long ioaddr) |
@@ -60,7 +59,6 @@ void dwmac_dma_stop_tx(unsigned long ioaddr) | |||
60 | u32 value = readl(ioaddr + DMA_CONTROL); | 59 | u32 value = readl(ioaddr + DMA_CONTROL); |
61 | value &= ~DMA_CONTROL_ST; | 60 | value &= ~DMA_CONTROL_ST; |
62 | writel(value, ioaddr + DMA_CONTROL); | 61 | writel(value, ioaddr + DMA_CONTROL); |
63 | return; | ||
64 | } | 62 | } |
65 | 63 | ||
66 | void dwmac_dma_start_rx(unsigned long ioaddr) | 64 | void dwmac_dma_start_rx(unsigned long ioaddr) |
@@ -68,8 +66,6 @@ void dwmac_dma_start_rx(unsigned long ioaddr) | |||
68 | u32 value = readl(ioaddr + DMA_CONTROL); | 66 | u32 value = readl(ioaddr + DMA_CONTROL); |
69 | value |= DMA_CONTROL_SR; | 67 | value |= DMA_CONTROL_SR; |
70 | writel(value, ioaddr + DMA_CONTROL); | 68 | writel(value, ioaddr + DMA_CONTROL); |
71 | |||
72 | return; | ||
73 | } | 69 | } |
74 | 70 | ||
75 | void dwmac_dma_stop_rx(unsigned long ioaddr) | 71 | void dwmac_dma_stop_rx(unsigned long ioaddr) |
@@ -77,8 +73,6 @@ void dwmac_dma_stop_rx(unsigned long ioaddr) | |||
77 | u32 value = readl(ioaddr + DMA_CONTROL); | 73 | u32 value = readl(ioaddr + DMA_CONTROL); |
78 | value &= ~DMA_CONTROL_SR; | 74 | value &= ~DMA_CONTROL_SR; |
79 | writel(value, ioaddr + DMA_CONTROL); | 75 | writel(value, ioaddr + DMA_CONTROL); |
80 | |||
81 | return; | ||
82 | } | 76 | } |
83 | 77 | ||
84 | #ifdef DWMAC_DMA_DEBUG | 78 | #ifdef DWMAC_DMA_DEBUG |
@@ -111,7 +105,6 @@ static void show_tx_process_state(unsigned int status) | |||
111 | default: | 105 | default: |
112 | break; | 106 | break; |
113 | } | 107 | } |
114 | return; | ||
115 | } | 108 | } |
116 | 109 | ||
117 | static void show_rx_process_state(unsigned int status) | 110 | static void show_rx_process_state(unsigned int status) |
@@ -149,7 +142,6 @@ static void show_rx_process_state(unsigned int status) | |||
149 | default: | 142 | default: |
150 | break; | 143 | break; |
151 | } | 144 | } |
152 | return; | ||
153 | } | 145 | } |
154 | #endif | 146 | #endif |
155 | 147 | ||
@@ -244,8 +236,6 @@ void stmmac_set_mac_addr(unsigned long ioaddr, u8 addr[6], | |||
244 | writel(data, ioaddr + high); | 236 | writel(data, ioaddr + high); |
245 | data = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0]; | 237 | data = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0]; |
246 | writel(data, ioaddr + low); | 238 | writel(data, ioaddr + low); |
247 | |||
248 | return; | ||
249 | } | 239 | } |
250 | 240 | ||
251 | void stmmac_get_mac_addr(unsigned long ioaddr, unsigned char *addr, | 241 | void stmmac_get_mac_addr(unsigned long ioaddr, unsigned char *addr, |
@@ -264,7 +254,5 @@ void stmmac_get_mac_addr(unsigned long ioaddr, unsigned char *addr, | |||
264 | addr[3] = (lo_addr >> 24) & 0xff; | 254 | addr[3] = (lo_addr >> 24) & 0xff; |
265 | addr[4] = hi_addr & 0xff; | 255 | addr[4] = hi_addr & 0xff; |
266 | addr[5] = (hi_addr >> 8) & 0xff; | 256 | addr[5] = (hi_addr >> 8) & 0xff; |
267 | |||
268 | return; | ||
269 | } | 257 | } |
270 | 258 | ||