diff options
Diffstat (limited to 'drivers/net/sky2.c')
-rw-r--r-- | drivers/net/sky2.c | 886 |
1 files changed, 521 insertions, 365 deletions
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c index 6a10d7ba5877..088c797eb73b 100644 --- a/drivers/net/sky2.c +++ b/drivers/net/sky2.c | |||
@@ -22,6 +22,8 @@ | |||
22 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | 22 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | ||
26 | |||
25 | #include <linux/crc32.h> | 27 | #include <linux/crc32.h> |
26 | #include <linux/kernel.h> | 28 | #include <linux/kernel.h> |
27 | #include <linux/module.h> | 29 | #include <linux/module.h> |
@@ -31,6 +33,7 @@ | |||
31 | #include <linux/ethtool.h> | 33 | #include <linux/ethtool.h> |
32 | #include <linux/pci.h> | 34 | #include <linux/pci.h> |
33 | #include <linux/ip.h> | 35 | #include <linux/ip.h> |
36 | #include <linux/slab.h> | ||
34 | #include <net/ip.h> | 37 | #include <net/ip.h> |
35 | #include <linux/tcp.h> | 38 | #include <linux/tcp.h> |
36 | #include <linux/in.h> | 39 | #include <linux/in.h> |
@@ -50,8 +53,7 @@ | |||
50 | #include "sky2.h" | 53 | #include "sky2.h" |
51 | 54 | ||
52 | #define DRV_NAME "sky2" | 55 | #define DRV_NAME "sky2" |
53 | #define DRV_VERSION "1.25" | 56 | #define DRV_VERSION "1.27" |
54 | #define PFX DRV_NAME " " | ||
55 | 57 | ||
56 | /* | 58 | /* |
57 | * The Yukon II chipset takes 64 bit command blocks (called list elements) | 59 | * The Yukon II chipset takes 64 bit command blocks (called list elements) |
@@ -102,6 +104,7 @@ MODULE_PARM_DESC(disable_msi, "Disable Message Signaled Interrupt (MSI)"); | |||
102 | static DEFINE_PCI_DEVICE_TABLE(sky2_id_table) = { | 104 | static DEFINE_PCI_DEVICE_TABLE(sky2_id_table) = { |
103 | { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, /* SK-9Sxx */ | 105 | { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9000) }, /* SK-9Sxx */ |
104 | { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, /* SK-9Exx */ | 106 | { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E00) }, /* SK-9Exx */ |
107 | { PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, 0x9E01) }, /* SK-9E21M */ | ||
105 | { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4b00) }, /* DGE-560T */ | 108 | { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4b00) }, /* DGE-560T */ |
106 | { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4001) }, /* DGE-550SX */ | 109 | { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4001) }, /* DGE-550SX */ |
107 | { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B02) }, /* DGE-560SX */ | 110 | { PCI_DEVICE(PCI_VENDOR_ID_DLINK, 0x4B02) }, /* DGE-560SX */ |
@@ -139,6 +142,7 @@ static DEFINE_PCI_DEVICE_TABLE(sky2_id_table) = { | |||
139 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436D) }, /* 88E8055 */ | 142 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x436D) }, /* 88E8055 */ |
140 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4370) }, /* 88E8075 */ | 143 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4370) }, /* 88E8075 */ |
141 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4380) }, /* 88E8057 */ | 144 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4380) }, /* 88E8057 */ |
145 | { PCI_DEVICE(PCI_VENDOR_ID_MARVELL, 0x4381) }, /* 88E8059 */ | ||
142 | { 0 } | 146 | { 0 } |
143 | }; | 147 | }; |
144 | 148 | ||
@@ -249,6 +253,8 @@ static void sky2_power_on(struct sky2_hw *hw) | |||
249 | 253 | ||
250 | sky2_pci_write32(hw, PCI_CFG_REG_1, 0); | 254 | sky2_pci_write32(hw, PCI_CFG_REG_1, 0); |
251 | 255 | ||
256 | sky2_write16(hw, B0_CTST, Y2_HW_WOL_ON); | ||
257 | |||
252 | /* Enable workaround for dev 4.107 on Yukon-Ultra & Extreme */ | 258 | /* Enable workaround for dev 4.107 on Yukon-Ultra & Extreme */ |
253 | reg = sky2_read32(hw, B2_GP_IO); | 259 | reg = sky2_read32(hw, B2_GP_IO); |
254 | reg |= GLB_GPIO_STAT_RACE_DIS; | 260 | reg |= GLB_GPIO_STAT_RACE_DIS; |
@@ -372,8 +378,8 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port) | |||
372 | ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO); | 378 | ctrl |= PHY_M_PC_MDI_XMODE(PHY_M_PC_ENA_AUTO); |
373 | 379 | ||
374 | /* downshift on PHY 88E1112 and 88E1149 is changed */ | 380 | /* downshift on PHY 88E1112 and 88E1149 is changed */ |
375 | if ( (sky2->flags & SKY2_FLAG_AUTO_SPEED) | 381 | if ( (sky2->flags & SKY2_FLAG_AUTO_SPEED) && |
376 | && (hw->flags & SKY2_HW_NEWER_PHY)) { | 382 | (hw->flags & SKY2_HW_NEWER_PHY)) { |
377 | /* set downshift counter to 3x and enable downshift */ | 383 | /* set downshift counter to 3x and enable downshift */ |
378 | ctrl &= ~PHY_M_PC_DSC_MSK; | 384 | ctrl &= ~PHY_M_PC_DSC_MSK; |
379 | ctrl |= PHY_M_PC_DSC(2) | PHY_M_PC_DOWN_S_ENA; | 385 | ctrl |= PHY_M_PC_DSC(2) | PHY_M_PC_DOWN_S_ENA; |
@@ -602,13 +608,23 @@ static void sky2_phy_init(struct sky2_hw *hw, unsigned port) | |||
602 | /* apply workaround for integrated resistors calibration */ | 608 | /* apply workaround for integrated resistors calibration */ |
603 | gm_phy_write(hw, port, PHY_MARV_PAGE_ADDR, 17); | 609 | gm_phy_write(hw, port, PHY_MARV_PAGE_ADDR, 17); |
604 | gm_phy_write(hw, port, PHY_MARV_PAGE_DATA, 0x3f60); | 610 | gm_phy_write(hw, port, PHY_MARV_PAGE_DATA, 0x3f60); |
611 | } else if (hw->chip_id == CHIP_ID_YUKON_OPT && hw->chip_rev == 0) { | ||
612 | /* apply fixes in PHY AFE */ | ||
613 | gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0x00ff); | ||
614 | |||
615 | /* apply RDAC termination workaround */ | ||
616 | gm_phy_write(hw, port, 24, 0x2800); | ||
617 | gm_phy_write(hw, port, 23, 0x2001); | ||
618 | |||
619 | /* set page register back to 0 */ | ||
620 | gm_phy_write(hw, port, PHY_MARV_EXT_ADR, 0); | ||
605 | } else if (hw->chip_id != CHIP_ID_YUKON_EX && | 621 | } else if (hw->chip_id != CHIP_ID_YUKON_EX && |
606 | hw->chip_id < CHIP_ID_YUKON_SUPR) { | 622 | hw->chip_id < CHIP_ID_YUKON_SUPR) { |
607 | /* no effect on Yukon-XL */ | 623 | /* no effect on Yukon-XL */ |
608 | gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl); | 624 | gm_phy_write(hw, port, PHY_MARV_LED_CTRL, ledctrl); |
609 | 625 | ||
610 | if ( !(sky2->flags & SKY2_FLAG_AUTO_SPEED) | 626 | if (!(sky2->flags & SKY2_FLAG_AUTO_SPEED) || |
611 | || sky2->speed == SPEED_100) { | 627 | sky2->speed == SPEED_100) { |
612 | /* turn on 100 Mbps LED (LED_LINK100) */ | 628 | /* turn on 100 Mbps LED (LED_LINK100) */ |
613 | ledover |= PHY_M_LED_MO_100(MO_LED_ON); | 629 | ledover |= PHY_M_LED_MO_100(MO_LED_ON); |
614 | } | 630 | } |
@@ -719,7 +735,6 @@ static void sky2_wol_init(struct sky2_port *sky2) | |||
719 | unsigned port = sky2->port; | 735 | unsigned port = sky2->port; |
720 | enum flow_control save_mode; | 736 | enum flow_control save_mode; |
721 | u16 ctrl; | 737 | u16 ctrl; |
722 | u32 reg1; | ||
723 | 738 | ||
724 | /* Bring hardware out of reset */ | 739 | /* Bring hardware out of reset */ |
725 | sky2_write16(hw, B0_CTST, CS_RST_CLR); | 740 | sky2_write16(hw, B0_CTST, CS_RST_CLR); |
@@ -770,14 +785,11 @@ static void sky2_wol_init(struct sky2_port *sky2) | |||
770 | ctrl |= WOL_CTL_DIS_PME_ON_PATTERN|WOL_CTL_DIS_PATTERN_UNIT; | 785 | ctrl |= WOL_CTL_DIS_PME_ON_PATTERN|WOL_CTL_DIS_PATTERN_UNIT; |
771 | sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), ctrl); | 786 | sky2_write16(hw, WOL_REGS(port, WOL_CTRL_STAT), ctrl); |
772 | 787 | ||
773 | /* Turn on legacy PCI-Express PME mode */ | 788 | /* Disable PiG firmware */ |
774 | reg1 = sky2_pci_read32(hw, PCI_DEV_REG1); | 789 | sky2_write16(hw, B0_CTST, Y2_HW_WOL_OFF); |
775 | reg1 |= PCI_Y2_PME_LEGACY; | ||
776 | sky2_pci_write32(hw, PCI_DEV_REG1, reg1); | ||
777 | 790 | ||
778 | /* block receiver */ | 791 | /* block receiver */ |
779 | sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET); | 792 | sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET); |
780 | |||
781 | } | 793 | } |
782 | 794 | ||
783 | static void sky2_set_tx_stfwd(struct sky2_hw *hw, unsigned port) | 795 | static void sky2_set_tx_stfwd(struct sky2_hw *hw, unsigned port) |
@@ -786,32 +798,17 @@ static void sky2_set_tx_stfwd(struct sky2_hw *hw, unsigned port) | |||
786 | 798 | ||
787 | if ( (hw->chip_id == CHIP_ID_YUKON_EX && | 799 | if ( (hw->chip_id == CHIP_ID_YUKON_EX && |
788 | hw->chip_rev != CHIP_REV_YU_EX_A0) || | 800 | hw->chip_rev != CHIP_REV_YU_EX_A0) || |
789 | hw->chip_id == CHIP_ID_YUKON_FE_P || | 801 | hw->chip_id >= CHIP_ID_YUKON_FE_P) { |
790 | hw->chip_id == CHIP_ID_YUKON_SUPR) { | ||
791 | /* Yukon-Extreme B0 and further Extreme devices */ | 802 | /* Yukon-Extreme B0 and further Extreme devices */ |
792 | /* enable Store & Forward mode for TX */ | 803 | sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_ENA); |
793 | 804 | } else if (dev->mtu > ETH_DATA_LEN) { | |
794 | if (dev->mtu <= ETH_DATA_LEN) | 805 | /* set Tx GMAC FIFO Almost Empty Threshold */ |
795 | sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), | 806 | sky2_write32(hw, SK_REG(port, TX_GMF_AE_THR), |
796 | TX_JUMBO_DIS | TX_STFW_ENA); | 807 | (ECU_JUMBO_WM << 16) | ECU_AE_THR); |
797 | 808 | ||
798 | else | 809 | sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_DIS); |
799 | sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), | 810 | } else |
800 | TX_JUMBO_ENA| TX_STFW_ENA); | 811 | sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_ENA); |
801 | } else { | ||
802 | if (dev->mtu <= ETH_DATA_LEN) | ||
803 | sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_ENA); | ||
804 | else { | ||
805 | /* set Tx GMAC FIFO Almost Empty Threshold */ | ||
806 | sky2_write32(hw, SK_REG(port, TX_GMF_AE_THR), | ||
807 | (ECU_JUMBO_WM << 16) | ECU_AE_THR); | ||
808 | |||
809 | sky2_write32(hw, SK_REG(port, TX_GMF_CTRL_T), TX_STFW_DIS); | ||
810 | |||
811 | /* Can't do offload because of lack of store/forward */ | ||
812 | dev->features &= ~(NETIF_F_TSO | NETIF_F_SG | NETIF_F_ALL_CSUM); | ||
813 | } | ||
814 | } | ||
815 | } | 812 | } |
816 | 813 | ||
817 | static void sky2_mac_init(struct sky2_hw *hw, unsigned port) | 814 | static void sky2_mac_init(struct sky2_hw *hw, unsigned port) |
@@ -925,8 +922,14 @@ static void sky2_mac_init(struct sky2_hw *hw, unsigned port) | |||
925 | 922 | ||
926 | /* On chips without ram buffer, pause is controled by MAC level */ | 923 | /* On chips without ram buffer, pause is controled by MAC level */ |
927 | if (!(hw->flags & SKY2_HW_RAM_BUFFER)) { | 924 | if (!(hw->flags & SKY2_HW_RAM_BUFFER)) { |
928 | sky2_write8(hw, SK_REG(port, RX_GMF_LP_THR), 768/8); | 925 | /* Pause threshold is scaled by 8 in bytes */ |
929 | sky2_write8(hw, SK_REG(port, RX_GMF_UP_THR), 1024/8); | 926 | if (hw->chip_id == CHIP_ID_YUKON_FE_P && |
927 | hw->chip_rev == CHIP_REV_YU_FE2_A0) | ||
928 | reg = 1568 / 8; | ||
929 | else | ||
930 | reg = 1024 / 8; | ||
931 | sky2_write16(hw, SK_REG(port, RX_GMF_UP_THR), reg); | ||
932 | sky2_write16(hw, SK_REG(port, RX_GMF_LP_THR), 768 / 8); | ||
930 | 933 | ||
931 | sky2_set_tx_stfwd(hw, port); | 934 | sky2_set_tx_stfwd(hw, port); |
932 | } | 935 | } |
@@ -1008,11 +1011,8 @@ static void sky2_prefetch_init(struct sky2_hw *hw, u32 qaddr, | |||
1008 | static inline struct sky2_tx_le *get_tx_le(struct sky2_port *sky2, u16 *slot) | 1011 | static inline struct sky2_tx_le *get_tx_le(struct sky2_port *sky2, u16 *slot) |
1009 | { | 1012 | { |
1010 | struct sky2_tx_le *le = sky2->tx_le + *slot; | 1013 | struct sky2_tx_le *le = sky2->tx_le + *slot; |
1011 | struct tx_ring_info *re = sky2->tx_ring + *slot; | ||
1012 | 1014 | ||
1013 | *slot = RING_NEXT(*slot, sky2->tx_ring_size); | 1015 | *slot = RING_NEXT(*slot, sky2->tx_ring_size); |
1014 | re->flags = 0; | ||
1015 | re->skb = NULL; | ||
1016 | le->ctrl = 0; | 1016 | le->ctrl = 0; |
1017 | return le; | 1017 | return le; |
1018 | } | 1018 | } |
@@ -1051,6 +1051,40 @@ static inline struct sky2_rx_le *sky2_next_rx(struct sky2_port *sky2) | |||
1051 | return le; | 1051 | return le; |
1052 | } | 1052 | } |
1053 | 1053 | ||
1054 | static unsigned sky2_get_rx_threshold(struct sky2_port* sky2) | ||
1055 | { | ||
1056 | unsigned size; | ||
1057 | |||
1058 | /* Space needed for frame data + headers rounded up */ | ||
1059 | size = roundup(sky2->netdev->mtu + ETH_HLEN + VLAN_HLEN, 8); | ||
1060 | |||
1061 | /* Stopping point for hardware truncation */ | ||
1062 | return (size - 8) / sizeof(u32); | ||
1063 | } | ||
1064 | |||
1065 | static unsigned sky2_get_rx_data_size(struct sky2_port* sky2) | ||
1066 | { | ||
1067 | struct rx_ring_info *re; | ||
1068 | unsigned size; | ||
1069 | |||
1070 | /* Space needed for frame data + headers rounded up */ | ||
1071 | size = roundup(sky2->netdev->mtu + ETH_HLEN + VLAN_HLEN, 8); | ||
1072 | |||
1073 | sky2->rx_nfrags = size >> PAGE_SHIFT; | ||
1074 | BUG_ON(sky2->rx_nfrags > ARRAY_SIZE(re->frag_addr)); | ||
1075 | |||
1076 | /* Compute residue after pages */ | ||
1077 | size -= sky2->rx_nfrags << PAGE_SHIFT; | ||
1078 | |||
1079 | /* Optimize to handle small packets and headers */ | ||
1080 | if (size < copybreak) | ||
1081 | size = copybreak; | ||
1082 | if (size < ETH_HLEN) | ||
1083 | size = ETH_HLEN; | ||
1084 | |||
1085 | return size; | ||
1086 | } | ||
1087 | |||
1054 | /* Build description to hardware for one receive segment */ | 1088 | /* Build description to hardware for one receive segment */ |
1055 | static void sky2_rx_add(struct sky2_port *sky2, u8 op, | 1089 | static void sky2_rx_add(struct sky2_port *sky2, u8 op, |
1056 | dma_addr_t map, unsigned len) | 1090 | dma_addr_t map, unsigned len) |
@@ -1089,18 +1123,39 @@ static int sky2_rx_map_skb(struct pci_dev *pdev, struct rx_ring_info *re, | |||
1089 | int i; | 1123 | int i; |
1090 | 1124 | ||
1091 | re->data_addr = pci_map_single(pdev, skb->data, size, PCI_DMA_FROMDEVICE); | 1125 | re->data_addr = pci_map_single(pdev, skb->data, size, PCI_DMA_FROMDEVICE); |
1092 | if (unlikely(pci_dma_mapping_error(pdev, re->data_addr))) | 1126 | if (pci_dma_mapping_error(pdev, re->data_addr)) |
1093 | return -EIO; | 1127 | goto mapping_error; |
1094 | 1128 | ||
1095 | pci_unmap_len_set(re, data_size, size); | 1129 | pci_unmap_len_set(re, data_size, size); |
1096 | 1130 | ||
1097 | for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) | 1131 | for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { |
1098 | re->frag_addr[i] = pci_map_page(pdev, | 1132 | skb_frag_t *frag = &skb_shinfo(skb)->frags[i]; |
1099 | skb_shinfo(skb)->frags[i].page, | 1133 | |
1100 | skb_shinfo(skb)->frags[i].page_offset, | 1134 | re->frag_addr[i] = pci_map_page(pdev, frag->page, |
1101 | skb_shinfo(skb)->frags[i].size, | 1135 | frag->page_offset, |
1136 | frag->size, | ||
1102 | PCI_DMA_FROMDEVICE); | 1137 | PCI_DMA_FROMDEVICE); |
1138 | |||
1139 | if (pci_dma_mapping_error(pdev, re->frag_addr[i])) | ||
1140 | goto map_page_error; | ||
1141 | } | ||
1103 | return 0; | 1142 | return 0; |
1143 | |||
1144 | map_page_error: | ||
1145 | while (--i >= 0) { | ||
1146 | pci_unmap_page(pdev, re->frag_addr[i], | ||
1147 | skb_shinfo(skb)->frags[i].size, | ||
1148 | PCI_DMA_FROMDEVICE); | ||
1149 | } | ||
1150 | |||
1151 | pci_unmap_single(pdev, re->data_addr, pci_unmap_len(re, data_size), | ||
1152 | PCI_DMA_FROMDEVICE); | ||
1153 | |||
1154 | mapping_error: | ||
1155 | if (net_ratelimit()) | ||
1156 | dev_warn(&pdev->dev, "%s: rx mapping error\n", | ||
1157 | skb->dev->name); | ||
1158 | return -EIO; | ||
1104 | } | 1159 | } |
1105 | 1160 | ||
1106 | static void sky2_rx_unmap_skb(struct pci_dev *pdev, struct rx_ring_info *re) | 1161 | static void sky2_rx_unmap_skb(struct pci_dev *pdev, struct rx_ring_info *re) |
@@ -1159,8 +1214,7 @@ static void sky2_rx_stop(struct sky2_port *sky2) | |||
1159 | == sky2_read8(hw, RB_ADDR(rxq, Q_RL))) | 1214 | == sky2_read8(hw, RB_ADDR(rxq, Q_RL))) |
1160 | goto stopped; | 1215 | goto stopped; |
1161 | 1216 | ||
1162 | printk(KERN_WARNING PFX "%s: receiver stop failed\n", | 1217 | netdev_warn(sky2->netdev, "receiver stop failed\n"); |
1163 | sky2->netdev->name); | ||
1164 | stopped: | 1218 | stopped: |
1165 | sky2_write32(hw, Q_ADDR(rxq, Q_CSR), BMU_RST_SET | BMU_FIFO_RST); | 1219 | sky2_write32(hw, Q_ADDR(rxq, Q_CSR), BMU_RST_SET | BMU_FIFO_RST); |
1166 | 1220 | ||
@@ -1310,8 +1364,32 @@ static inline void sky2_rx_update(struct sky2_port *sky2, unsigned rxq) | |||
1310 | sky2_put_idx(sky2->hw, rxq, sky2->rx_put); | 1364 | sky2_put_idx(sky2->hw, rxq, sky2->rx_put); |
1311 | } | 1365 | } |
1312 | 1366 | ||
1367 | static int sky2_alloc_rx_skbs(struct sky2_port *sky2) | ||
1368 | { | ||
1369 | struct sky2_hw *hw = sky2->hw; | ||
1370 | unsigned i; | ||
1371 | |||
1372 | sky2->rx_data_size = sky2_get_rx_data_size(sky2); | ||
1373 | |||
1374 | /* Fill Rx ring */ | ||
1375 | for (i = 0; i < sky2->rx_pending; i++) { | ||
1376 | struct rx_ring_info *re = sky2->rx_ring + i; | ||
1377 | |||
1378 | re->skb = sky2_rx_alloc(sky2); | ||
1379 | if (!re->skb) | ||
1380 | return -ENOMEM; | ||
1381 | |||
1382 | if (sky2_rx_map_skb(hw->pdev, re, sky2->rx_data_size)) { | ||
1383 | dev_kfree_skb(re->skb); | ||
1384 | re->skb = NULL; | ||
1385 | return -ENOMEM; | ||
1386 | } | ||
1387 | } | ||
1388 | return 0; | ||
1389 | } | ||
1390 | |||
1313 | /* | 1391 | /* |
1314 | * Allocate and setup receiver buffer pool. | 1392 | * Setup receiver buffer pool. |
1315 | * Normal case this ends up creating one list element for skb | 1393 | * Normal case this ends up creating one list element for skb |
1316 | * in the receive ring. Worst case if using large MTU and each | 1394 | * in the receive ring. Worst case if using large MTU and each |
1317 | * allocation falls on a different 64 bit region, that results | 1395 | * allocation falls on a different 64 bit region, that results |
@@ -1319,12 +1397,12 @@ static inline void sky2_rx_update(struct sky2_port *sky2, unsigned rxq) | |||
1319 | * One element is used for checksum enable/disable, and one | 1397 | * One element is used for checksum enable/disable, and one |
1320 | * extra to avoid wrap. | 1398 | * extra to avoid wrap. |
1321 | */ | 1399 | */ |
1322 | static int sky2_rx_start(struct sky2_port *sky2) | 1400 | static void sky2_rx_start(struct sky2_port *sky2) |
1323 | { | 1401 | { |
1324 | struct sky2_hw *hw = sky2->hw; | 1402 | struct sky2_hw *hw = sky2->hw; |
1325 | struct rx_ring_info *re; | 1403 | struct rx_ring_info *re; |
1326 | unsigned rxq = rxqaddr[sky2->port]; | 1404 | unsigned rxq = rxqaddr[sky2->port]; |
1327 | unsigned i, size, thresh; | 1405 | unsigned i, thresh; |
1328 | 1406 | ||
1329 | sky2->rx_put = sky2->rx_next = 0; | 1407 | sky2->rx_put = sky2->rx_next = 0; |
1330 | sky2_qset(hw, rxq); | 1408 | sky2_qset(hw, rxq); |
@@ -1336,8 +1414,8 @@ static int sky2_rx_start(struct sky2_port *sky2) | |||
1336 | /* These chips have no ram buffer? | 1414 | /* These chips have no ram buffer? |
1337 | * MAC Rx RAM Read is controlled by hardware */ | 1415 | * MAC Rx RAM Read is controlled by hardware */ |
1338 | if (hw->chip_id == CHIP_ID_YUKON_EC_U && | 1416 | if (hw->chip_id == CHIP_ID_YUKON_EC_U && |
1339 | (hw->chip_rev == CHIP_REV_YU_EC_U_A1 | 1417 | (hw->chip_rev == CHIP_REV_YU_EC_U_A1 || |
1340 | || hw->chip_rev == CHIP_REV_YU_EC_U_B0)) | 1418 | hw->chip_rev == CHIP_REV_YU_EC_U_B0)) |
1341 | sky2_write32(hw, Q_ADDR(rxq, Q_TEST), F_M_RX_RAM_DIS); | 1419 | sky2_write32(hw, Q_ADDR(rxq, Q_TEST), F_M_RX_RAM_DIS); |
1342 | 1420 | ||
1343 | sky2_prefetch_init(hw, rxq, sky2->rx_le_map, RX_LE_SIZE - 1); | 1421 | sky2_prefetch_init(hw, rxq, sky2->rx_le_map, RX_LE_SIZE - 1); |
@@ -1345,40 +1423,9 @@ static int sky2_rx_start(struct sky2_port *sky2) | |||
1345 | if (!(hw->flags & SKY2_HW_NEW_LE)) | 1423 | if (!(hw->flags & SKY2_HW_NEW_LE)) |
1346 | rx_set_checksum(sky2); | 1424 | rx_set_checksum(sky2); |
1347 | 1425 | ||
1348 | /* Space needed for frame data + headers rounded up */ | 1426 | /* submit Rx ring */ |
1349 | size = roundup(sky2->netdev->mtu + ETH_HLEN + VLAN_HLEN, 8); | ||
1350 | |||
1351 | /* Stopping point for hardware truncation */ | ||
1352 | thresh = (size - 8) / sizeof(u32); | ||
1353 | |||
1354 | sky2->rx_nfrags = size >> PAGE_SHIFT; | ||
1355 | BUG_ON(sky2->rx_nfrags > ARRAY_SIZE(re->frag_addr)); | ||
1356 | |||
1357 | /* Compute residue after pages */ | ||
1358 | size -= sky2->rx_nfrags << PAGE_SHIFT; | ||
1359 | |||
1360 | /* Optimize to handle small packets and headers */ | ||
1361 | if (size < copybreak) | ||
1362 | size = copybreak; | ||
1363 | if (size < ETH_HLEN) | ||
1364 | size = ETH_HLEN; | ||
1365 | |||
1366 | sky2->rx_data_size = size; | ||
1367 | |||
1368 | /* Fill Rx ring */ | ||
1369 | for (i = 0; i < sky2->rx_pending; i++) { | 1427 | for (i = 0; i < sky2->rx_pending; i++) { |
1370 | re = sky2->rx_ring + i; | 1428 | re = sky2->rx_ring + i; |
1371 | |||
1372 | re->skb = sky2_rx_alloc(sky2); | ||
1373 | if (!re->skb) | ||
1374 | goto nomem; | ||
1375 | |||
1376 | if (sky2_rx_map_skb(hw->pdev, re, sky2->rx_data_size)) { | ||
1377 | dev_kfree_skb(re->skb); | ||
1378 | re->skb = NULL; | ||
1379 | goto nomem; | ||
1380 | } | ||
1381 | |||
1382 | sky2_rx_submit(sky2, re); | 1429 | sky2_rx_submit(sky2, re); |
1383 | } | 1430 | } |
1384 | 1431 | ||
@@ -1388,6 +1435,7 @@ static int sky2_rx_start(struct sky2_port *sky2) | |||
1388 | * the register is limited to 9 bits, so if you do frames > 2052 | 1435 | * the register is limited to 9 bits, so if you do frames > 2052 |
1389 | * you better get the MTU right! | 1436 | * you better get the MTU right! |
1390 | */ | 1437 | */ |
1438 | thresh = sky2_get_rx_threshold(sky2); | ||
1391 | if (thresh > 0x1ff) | 1439 | if (thresh > 0x1ff) |
1392 | sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_OFF); | 1440 | sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_TRUNC_OFF); |
1393 | else { | 1441 | else { |
@@ -1397,10 +1445,28 @@ static int sky2_rx_start(struct sky2_port *sky2) | |||
1397 | 1445 | ||
1398 | /* Tell chip about available buffers */ | 1446 | /* Tell chip about available buffers */ |
1399 | sky2_rx_update(sky2, rxq); | 1447 | sky2_rx_update(sky2, rxq); |
1400 | return 0; | 1448 | |
1401 | nomem: | 1449 | if (hw->chip_id == CHIP_ID_YUKON_EX || |
1402 | sky2_rx_clean(sky2); | 1450 | hw->chip_id == CHIP_ID_YUKON_SUPR) { |
1403 | return -ENOMEM; | 1451 | /* |
1452 | * Disable flushing of non ASF packets; | ||
1453 | * must be done after initializing the BMUs; | ||
1454 | * drivers without ASF support should do this too, otherwise | ||
1455 | * it may happen that they cannot run on ASF devices; | ||
1456 | * remember that the MAC FIFO isn't reset during initialization. | ||
1457 | */ | ||
1458 | sky2_write32(hw, SK_REG(sky2->port, RX_GMF_CTRL_T), RX_MACSEC_FLUSH_OFF); | ||
1459 | } | ||
1460 | |||
1461 | if (hw->chip_id >= CHIP_ID_YUKON_SUPR) { | ||
1462 | /* Enable RX Home Address & Routing Header checksum fix */ | ||
1463 | sky2_write16(hw, SK_REG(sky2->port, RX_GMF_FL_CTRL), | ||
1464 | RX_IPV6_SA_MOB_ENA | RX_IPV6_DA_MOB_ENA); | ||
1465 | |||
1466 | /* Enable TX Home Address & Routing Header checksum fix */ | ||
1467 | sky2_write32(hw, Q_ADDR(txqaddr[sky2->port], Q_TEST), | ||
1468 | TBMU_TEST_HOME_ADD_FIX_EN | TBMU_TEST_ROUTING_ADD_FIX_EN); | ||
1469 | } | ||
1404 | } | 1470 | } |
1405 | 1471 | ||
1406 | static int sky2_alloc_buffers(struct sky2_port *sky2) | 1472 | static int sky2_alloc_buffers(struct sky2_port *sky2) |
@@ -1431,7 +1497,7 @@ static int sky2_alloc_buffers(struct sky2_port *sky2) | |||
1431 | if (!sky2->rx_ring) | 1497 | if (!sky2->rx_ring) |
1432 | goto nomem; | 1498 | goto nomem; |
1433 | 1499 | ||
1434 | return 0; | 1500 | return sky2_alloc_rx_skbs(sky2); |
1435 | nomem: | 1501 | nomem: |
1436 | return -ENOMEM; | 1502 | return -ENOMEM; |
1437 | } | 1503 | } |
@@ -1440,6 +1506,8 @@ static void sky2_free_buffers(struct sky2_port *sky2) | |||
1440 | { | 1506 | { |
1441 | struct sky2_hw *hw = sky2->hw; | 1507 | struct sky2_hw *hw = sky2->hw; |
1442 | 1508 | ||
1509 | sky2_rx_clean(sky2); | ||
1510 | |||
1443 | if (sky2->rx_le) { | 1511 | if (sky2->rx_le) { |
1444 | pci_free_consistent(hw->pdev, RX_LE_BYTES, | 1512 | pci_free_consistent(hw->pdev, RX_LE_BYTES, |
1445 | sky2->rx_le, sky2->rx_le_map); | 1513 | sky2->rx_le, sky2->rx_le_map); |
@@ -1458,16 +1526,16 @@ static void sky2_free_buffers(struct sky2_port *sky2) | |||
1458 | sky2->rx_ring = NULL; | 1526 | sky2->rx_ring = NULL; |
1459 | } | 1527 | } |
1460 | 1528 | ||
1461 | /* Bring up network interface. */ | 1529 | static void sky2_hw_up(struct sky2_port *sky2) |
1462 | static int sky2_up(struct net_device *dev) | ||
1463 | { | 1530 | { |
1464 | struct sky2_port *sky2 = netdev_priv(dev); | ||
1465 | struct sky2_hw *hw = sky2->hw; | 1531 | struct sky2_hw *hw = sky2->hw; |
1466 | unsigned port = sky2->port; | 1532 | unsigned port = sky2->port; |
1467 | u32 imask, ramsize; | 1533 | u32 ramsize; |
1468 | int cap, err; | 1534 | int cap; |
1469 | struct net_device *otherdev = hw->dev[sky2->port^1]; | 1535 | struct net_device *otherdev = hw->dev[sky2->port^1]; |
1470 | 1536 | ||
1537 | tx_init(sky2); | ||
1538 | |||
1471 | /* | 1539 | /* |
1472 | * On dual port PCI-X card, there is an problem where status | 1540 | * On dual port PCI-X card, there is an problem where status |
1473 | * can be received out of order due to split transactions | 1541 | * can be received out of order due to split transactions |
@@ -1479,16 +1547,7 @@ static int sky2_up(struct net_device *dev) | |||
1479 | cmd = sky2_pci_read16(hw, cap + PCI_X_CMD); | 1547 | cmd = sky2_pci_read16(hw, cap + PCI_X_CMD); |
1480 | cmd &= ~PCI_X_CMD_MAX_SPLIT; | 1548 | cmd &= ~PCI_X_CMD_MAX_SPLIT; |
1481 | sky2_pci_write16(hw, cap + PCI_X_CMD, cmd); | 1549 | sky2_pci_write16(hw, cap + PCI_X_CMD, cmd); |
1482 | 1550 | } | |
1483 | } | ||
1484 | |||
1485 | netif_carrier_off(dev); | ||
1486 | |||
1487 | err = sky2_alloc_buffers(sky2); | ||
1488 | if (err) | ||
1489 | goto err_out; | ||
1490 | |||
1491 | tx_init(sky2); | ||
1492 | 1551 | ||
1493 | sky2_mac_init(hw, port); | 1552 | sky2_mac_init(hw, port); |
1494 | 1553 | ||
@@ -1497,7 +1556,7 @@ static int sky2_up(struct net_device *dev) | |||
1497 | if (ramsize > 0) { | 1556 | if (ramsize > 0) { |
1498 | u32 rxspace; | 1557 | u32 rxspace; |
1499 | 1558 | ||
1500 | pr_debug(PFX "%s: ram buffer %dK\n", dev->name, ramsize); | 1559 | netdev_dbg(sky2->netdev, "ram buffer %dK\n", ramsize); |
1501 | if (ramsize < 16) | 1560 | if (ramsize < 16) |
1502 | rxspace = ramsize / 2; | 1561 | rxspace = ramsize / 2; |
1503 | else | 1562 | else |
@@ -1518,8 +1577,8 @@ static int sky2_up(struct net_device *dev) | |||
1518 | sky2_write32(hw, Q_ADDR(txqaddr[port], Q_TEST), F_TX_CHK_AUTO_OFF); | 1577 | sky2_write32(hw, Q_ADDR(txqaddr[port], Q_TEST), F_TX_CHK_AUTO_OFF); |
1519 | 1578 | ||
1520 | /* Set almost empty threshold */ | 1579 | /* Set almost empty threshold */ |
1521 | if (hw->chip_id == CHIP_ID_YUKON_EC_U | 1580 | if (hw->chip_id == CHIP_ID_YUKON_EC_U && |
1522 | && hw->chip_rev == CHIP_REV_YU_EC_U_A0) | 1581 | hw->chip_rev == CHIP_REV_YU_EC_U_A0) |
1523 | sky2_write16(hw, Q_ADDR(txqaddr[port], Q_AL), ECU_TXFF_LEV); | 1582 | sky2_write16(hw, Q_ADDR(txqaddr[port], Q_AL), ECU_TXFF_LEV); |
1524 | 1583 | ||
1525 | sky2_prefetch_init(hw, txqaddr[port], sky2->tx_le_map, | 1584 | sky2_prefetch_init(hw, txqaddr[port], sky2->tx_le_map, |
@@ -1529,18 +1588,33 @@ static int sky2_up(struct net_device *dev) | |||
1529 | sky2_set_vlan_mode(hw, port, sky2->vlgrp != NULL); | 1588 | sky2_set_vlan_mode(hw, port, sky2->vlgrp != NULL); |
1530 | #endif | 1589 | #endif |
1531 | 1590 | ||
1532 | err = sky2_rx_start(sky2); | 1591 | sky2_rx_start(sky2); |
1592 | } | ||
1593 | |||
1594 | /* Bring up network interface. */ | ||
1595 | static int sky2_up(struct net_device *dev) | ||
1596 | { | ||
1597 | struct sky2_port *sky2 = netdev_priv(dev); | ||
1598 | struct sky2_hw *hw = sky2->hw; | ||
1599 | unsigned port = sky2->port; | ||
1600 | u32 imask; | ||
1601 | int err; | ||
1602 | |||
1603 | netif_carrier_off(dev); | ||
1604 | |||
1605 | err = sky2_alloc_buffers(sky2); | ||
1533 | if (err) | 1606 | if (err) |
1534 | goto err_out; | 1607 | goto err_out; |
1535 | 1608 | ||
1609 | sky2_hw_up(sky2); | ||
1610 | |||
1536 | /* Enable interrupts from phy/mac for port */ | 1611 | /* Enable interrupts from phy/mac for port */ |
1537 | imask = sky2_read32(hw, B0_IMSK); | 1612 | imask = sky2_read32(hw, B0_IMSK); |
1538 | imask |= portirq_msk[port]; | 1613 | imask |= portirq_msk[port]; |
1539 | sky2_write32(hw, B0_IMSK, imask); | 1614 | sky2_write32(hw, B0_IMSK, imask); |
1540 | sky2_read32(hw, B0_IMSK); | 1615 | sky2_read32(hw, B0_IMSK); |
1541 | 1616 | ||
1542 | if (netif_msg_ifup(sky2)) | 1617 | netif_info(sky2, ifup, dev, "enabling interface\n"); |
1543 | printk(KERN_INFO PFX "%s: enabling interface\n", dev->name); | ||
1544 | 1618 | ||
1545 | return 0; | 1619 | return 0; |
1546 | 1620 | ||
@@ -1580,8 +1654,7 @@ static unsigned tx_le_req(const struct sk_buff *skb) | |||
1580 | return count; | 1654 | return count; |
1581 | } | 1655 | } |
1582 | 1656 | ||
1583 | static void sky2_tx_unmap(struct pci_dev *pdev, | 1657 | static void sky2_tx_unmap(struct pci_dev *pdev, struct tx_ring_info *re) |
1584 | const struct tx_ring_info *re) | ||
1585 | { | 1658 | { |
1586 | if (re->flags & TX_MAP_SINGLE) | 1659 | if (re->flags & TX_MAP_SINGLE) |
1587 | pci_unmap_single(pdev, pci_unmap_addr(re, mapaddr), | 1660 | pci_unmap_single(pdev, pci_unmap_addr(re, mapaddr), |
@@ -1591,6 +1664,7 @@ static void sky2_tx_unmap(struct pci_dev *pdev, | |||
1591 | pci_unmap_page(pdev, pci_unmap_addr(re, mapaddr), | 1664 | pci_unmap_page(pdev, pci_unmap_addr(re, mapaddr), |
1592 | pci_unmap_len(re, maplen), | 1665 | pci_unmap_len(re, maplen), |
1593 | PCI_DMA_TODEVICE); | 1666 | PCI_DMA_TODEVICE); |
1667 | re->flags = 0; | ||
1594 | } | 1668 | } |
1595 | 1669 | ||
1596 | /* | 1670 | /* |
@@ -1623,9 +1697,8 @@ static netdev_tx_t sky2_xmit_frame(struct sk_buff *skb, | |||
1623 | goto mapping_error; | 1697 | goto mapping_error; |
1624 | 1698 | ||
1625 | slot = sky2->tx_prod; | 1699 | slot = sky2->tx_prod; |
1626 | if (unlikely(netif_msg_tx_queued(sky2))) | 1700 | netif_printk(sky2, tx_queued, KERN_DEBUG, dev, |
1627 | printk(KERN_DEBUG "%s: tx queued, slot %u, len %d\n", | 1701 | "tx queued, slot %u, len %d\n", slot, skb->len); |
1628 | dev->name, slot, skb->len); | ||
1629 | 1702 | ||
1630 | /* Send high bits if needed */ | 1703 | /* Send high bits if needed */ |
1631 | upper = upper_32_bits(mapping); | 1704 | upper = upper_32_bits(mapping); |
@@ -1790,13 +1863,13 @@ static void sky2_tx_complete(struct sky2_port *sky2, u16 done) | |||
1790 | sky2_tx_unmap(sky2->hw->pdev, re); | 1863 | sky2_tx_unmap(sky2->hw->pdev, re); |
1791 | 1864 | ||
1792 | if (skb) { | 1865 | if (skb) { |
1793 | if (unlikely(netif_msg_tx_done(sky2))) | 1866 | netif_printk(sky2, tx_done, KERN_DEBUG, dev, |
1794 | printk(KERN_DEBUG "%s: tx done %u\n", | 1867 | "tx done %u\n", idx); |
1795 | dev->name, idx); | ||
1796 | 1868 | ||
1797 | dev->stats.tx_packets++; | 1869 | dev->stats.tx_packets++; |
1798 | dev->stats.tx_bytes += skb->len; | 1870 | dev->stats.tx_bytes += skb->len; |
1799 | 1871 | ||
1872 | re->skb = NULL; | ||
1800 | dev_kfree_skb_any(skb); | 1873 | dev_kfree_skb_any(skb); |
1801 | 1874 | ||
1802 | sky2->tx_next = RING_NEXT(idx, sky2->tx_ring_size); | 1875 | sky2->tx_next = RING_NEXT(idx, sky2->tx_ring_size); |
@@ -1805,9 +1878,6 @@ static void sky2_tx_complete(struct sky2_port *sky2, u16 done) | |||
1805 | 1878 | ||
1806 | sky2->tx_cons = idx; | 1879 | sky2->tx_cons = idx; |
1807 | smp_mb(); | 1880 | smp_mb(); |
1808 | |||
1809 | if (tx_avail(sky2) > MAX_SKB_TX_LE + 4) | ||
1810 | netif_wake_queue(dev); | ||
1811 | } | 1881 | } |
1812 | 1882 | ||
1813 | static void sky2_tx_reset(struct sky2_hw *hw, unsigned port) | 1883 | static void sky2_tx_reset(struct sky2_hw *hw, unsigned port) |
@@ -1832,21 +1902,11 @@ static void sky2_tx_reset(struct sky2_hw *hw, unsigned port) | |||
1832 | sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET); | 1902 | sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_RST_SET); |
1833 | } | 1903 | } |
1834 | 1904 | ||
1835 | /* Network shutdown */ | 1905 | static void sky2_hw_down(struct sky2_port *sky2) |
1836 | static int sky2_down(struct net_device *dev) | ||
1837 | { | 1906 | { |
1838 | struct sky2_port *sky2 = netdev_priv(dev); | ||
1839 | struct sky2_hw *hw = sky2->hw; | 1907 | struct sky2_hw *hw = sky2->hw; |
1840 | unsigned port = sky2->port; | 1908 | unsigned port = sky2->port; |
1841 | u16 ctrl; | 1909 | u16 ctrl; |
1842 | u32 imask; | ||
1843 | |||
1844 | /* Never really got started! */ | ||
1845 | if (!sky2->tx_le) | ||
1846 | return 0; | ||
1847 | |||
1848 | if (netif_msg_ifdown(sky2)) | ||
1849 | printk(KERN_INFO PFX "%s: disabling interface\n", dev->name); | ||
1850 | 1910 | ||
1851 | /* Force flow control off */ | 1911 | /* Force flow control off */ |
1852 | sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF); | 1912 | sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_PAUSE_OFF); |
@@ -1865,8 +1925,8 @@ static int sky2_down(struct net_device *dev) | |||
1865 | sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET); | 1925 | sky2_write8(hw, SK_REG(port, GPHY_CTRL), GPC_RST_SET); |
1866 | 1926 | ||
1867 | /* Workaround shared GMAC reset */ | 1927 | /* Workaround shared GMAC reset */ |
1868 | if (!(hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0 | 1928 | if (!(hw->chip_id == CHIP_ID_YUKON_XL && hw->chip_rev == 0 && |
1869 | && port == 0 && hw->dev[1] && netif_running(hw->dev[1]))) | 1929 | port == 0 && hw->dev[1] && netif_running(hw->dev[1]))) |
1870 | sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET); | 1930 | sky2_write8(hw, SK_REG(port, GMAC_CTRL), GMC_RST_SET); |
1871 | 1931 | ||
1872 | sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET); | 1932 | sky2_write8(hw, SK_REG(port, RX_GMF_CTRL_T), GMF_RST_SET); |
@@ -1879,15 +1939,6 @@ static int sky2_down(struct net_device *dev) | |||
1879 | 1939 | ||
1880 | sky2_rx_stop(sky2); | 1940 | sky2_rx_stop(sky2); |
1881 | 1941 | ||
1882 | /* Disable port IRQ */ | ||
1883 | imask = sky2_read32(hw, B0_IMSK); | ||
1884 | imask &= ~portirq_msk[port]; | ||
1885 | sky2_write32(hw, B0_IMSK, imask); | ||
1886 | sky2_read32(hw, B0_IMSK); | ||
1887 | |||
1888 | synchronize_irq(hw->pdev->irq); | ||
1889 | napi_synchronize(&hw->napi); | ||
1890 | |||
1891 | spin_lock_bh(&sky2->phy_lock); | 1942 | spin_lock_bh(&sky2->phy_lock); |
1892 | sky2_phy_power_down(hw, port); | 1943 | sky2_phy_power_down(hw, port); |
1893 | spin_unlock_bh(&sky2->phy_lock); | 1944 | spin_unlock_bh(&sky2->phy_lock); |
@@ -1896,8 +1947,29 @@ static int sky2_down(struct net_device *dev) | |||
1896 | 1947 | ||
1897 | /* Free any pending frames stuck in HW queue */ | 1948 | /* Free any pending frames stuck in HW queue */ |
1898 | sky2_tx_complete(sky2, sky2->tx_prod); | 1949 | sky2_tx_complete(sky2, sky2->tx_prod); |
1950 | } | ||
1899 | 1951 | ||
1900 | sky2_rx_clean(sky2); | 1952 | /* Network shutdown */ |
1953 | static int sky2_down(struct net_device *dev) | ||
1954 | { | ||
1955 | struct sky2_port *sky2 = netdev_priv(dev); | ||
1956 | struct sky2_hw *hw = sky2->hw; | ||
1957 | |||
1958 | /* Never really got started! */ | ||
1959 | if (!sky2->tx_le) | ||
1960 | return 0; | ||
1961 | |||
1962 | netif_info(sky2, ifdown, dev, "disabling interface\n"); | ||
1963 | |||
1964 | /* Disable port IRQ */ | ||
1965 | sky2_write32(hw, B0_IMSK, | ||
1966 | sky2_read32(hw, B0_IMSK) & ~portirq_msk[sky2->port]); | ||
1967 | sky2_read32(hw, B0_IMSK); | ||
1968 | |||
1969 | synchronize_irq(hw->pdev->irq); | ||
1970 | napi_synchronize(&hw->napi); | ||
1971 | |||
1972 | sky2_hw_down(sky2); | ||
1901 | 1973 | ||
1902 | sky2_free_buffers(sky2); | 1974 | sky2_free_buffers(sky2); |
1903 | 1975 | ||
@@ -1953,12 +2025,11 @@ static void sky2_link_up(struct sky2_port *sky2) | |||
1953 | sky2_write8(hw, SK_REG(port, LNK_LED_REG), | 2025 | sky2_write8(hw, SK_REG(port, LNK_LED_REG), |
1954 | LINKLED_ON | LINKLED_BLINK_OFF | LINKLED_LINKSYNC_OFF); | 2026 | LINKLED_ON | LINKLED_BLINK_OFF | LINKLED_LINKSYNC_OFF); |
1955 | 2027 | ||
1956 | if (netif_msg_link(sky2)) | 2028 | netif_info(sky2, link, sky2->netdev, |
1957 | printk(KERN_INFO PFX | 2029 | "Link is up at %d Mbps, %s duplex, flow control %s\n", |
1958 | "%s: Link is up at %d Mbps, %s duplex, flow control %s\n", | 2030 | sky2->speed, |
1959 | sky2->netdev->name, sky2->speed, | 2031 | sky2->duplex == DUPLEX_FULL ? "full" : "half", |
1960 | sky2->duplex == DUPLEX_FULL ? "full" : "half", | 2032 | fc_name[sky2->flow_status]); |
1961 | fc_name[sky2->flow_status]); | ||
1962 | } | 2033 | } |
1963 | 2034 | ||
1964 | static void sky2_link_down(struct sky2_port *sky2) | 2035 | static void sky2_link_down(struct sky2_port *sky2) |
@@ -1975,11 +2046,10 @@ static void sky2_link_down(struct sky2_port *sky2) | |||
1975 | 2046 | ||
1976 | netif_carrier_off(sky2->netdev); | 2047 | netif_carrier_off(sky2->netdev); |
1977 | 2048 | ||
1978 | /* Turn on link LED */ | 2049 | /* Turn off link LED */ |
1979 | sky2_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_OFF); | 2050 | sky2_write8(hw, SK_REG(port, LNK_LED_REG), LINKLED_OFF); |
1980 | 2051 | ||
1981 | if (netif_msg_link(sky2)) | 2052 | netif_info(sky2, link, sky2->netdev, "Link is down\n"); |
1982 | printk(KERN_INFO PFX "%s: Link is down.\n", sky2->netdev->name); | ||
1983 | 2053 | ||
1984 | sky2_phy_init(hw, port); | 2054 | sky2_phy_init(hw, port); |
1985 | } | 2055 | } |
@@ -2001,13 +2071,12 @@ static int sky2_autoneg_done(struct sky2_port *sky2, u16 aux) | |||
2001 | advert = gm_phy_read(hw, port, PHY_MARV_AUNE_ADV); | 2071 | advert = gm_phy_read(hw, port, PHY_MARV_AUNE_ADV); |
2002 | lpa = gm_phy_read(hw, port, PHY_MARV_AUNE_LP); | 2072 | lpa = gm_phy_read(hw, port, PHY_MARV_AUNE_LP); |
2003 | if (lpa & PHY_M_AN_RF) { | 2073 | if (lpa & PHY_M_AN_RF) { |
2004 | printk(KERN_ERR PFX "%s: remote fault", sky2->netdev->name); | 2074 | netdev_err(sky2->netdev, "remote fault\n"); |
2005 | return -1; | 2075 | return -1; |
2006 | } | 2076 | } |
2007 | 2077 | ||
2008 | if (!(aux & PHY_M_PS_SPDUP_RES)) { | 2078 | if (!(aux & PHY_M_PS_SPDUP_RES)) { |
2009 | printk(KERN_ERR PFX "%s: speed/duplex mismatch", | 2079 | netdev_err(sky2->netdev, "speed/duplex mismatch\n"); |
2010 | sky2->netdev->name); | ||
2011 | return -1; | 2080 | return -1; |
2012 | } | 2081 | } |
2013 | 2082 | ||
@@ -2043,8 +2112,8 @@ static int sky2_autoneg_done(struct sky2_port *sky2, u16 aux) | |||
2043 | sky2->flow_status = FC_TX; | 2112 | sky2->flow_status = FC_TX; |
2044 | } | 2113 | } |
2045 | 2114 | ||
2046 | if (sky2->duplex == DUPLEX_HALF && sky2->speed < SPEED_1000 | 2115 | if (sky2->duplex == DUPLEX_HALF && sky2->speed < SPEED_1000 && |
2047 | && !(hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_EX)) | 2116 | !(hw->chip_id == CHIP_ID_YUKON_EC_U || hw->chip_id == CHIP_ID_YUKON_EX)) |
2048 | sky2->flow_status = FC_NONE; | 2117 | sky2->flow_status = FC_NONE; |
2049 | 2118 | ||
2050 | if (sky2->flow_status & FC_TX) | 2119 | if (sky2->flow_status & FC_TX) |
@@ -2069,9 +2138,8 @@ static void sky2_phy_intr(struct sky2_hw *hw, unsigned port) | |||
2069 | istatus = gm_phy_read(hw, port, PHY_MARV_INT_STAT); | 2138 | istatus = gm_phy_read(hw, port, PHY_MARV_INT_STAT); |
2070 | phystat = gm_phy_read(hw, port, PHY_MARV_PHY_STAT); | 2139 | phystat = gm_phy_read(hw, port, PHY_MARV_PHY_STAT); |
2071 | 2140 | ||
2072 | if (netif_msg_intr(sky2)) | 2141 | netif_info(sky2, intr, sky2->netdev, "phy interrupt status 0x%x 0x%x\n", |
2073 | printk(KERN_INFO PFX "%s: phy interrupt status 0x%x 0x%x\n", | 2142 | istatus, phystat); |
2074 | sky2->netdev->name, istatus, phystat); | ||
2075 | 2143 | ||
2076 | if (istatus & PHY_M_IS_AN_COMPL) { | 2144 | if (istatus & PHY_M_IS_AN_COMPL) { |
2077 | if (sky2_autoneg_done(sky2, phystat) == 0) | 2145 | if (sky2_autoneg_done(sky2, phystat) == 0) |
@@ -2096,6 +2164,27 @@ out: | |||
2096 | spin_unlock(&sky2->phy_lock); | 2164 | spin_unlock(&sky2->phy_lock); |
2097 | } | 2165 | } |
2098 | 2166 | ||
2167 | /* Special quick link interrupt (Yukon-2 Optima only) */ | ||
2168 | static void sky2_qlink_intr(struct sky2_hw *hw) | ||
2169 | { | ||
2170 | struct sky2_port *sky2 = netdev_priv(hw->dev[0]); | ||
2171 | u32 imask; | ||
2172 | u16 phy; | ||
2173 | |||
2174 | /* disable irq */ | ||
2175 | imask = sky2_read32(hw, B0_IMSK); | ||
2176 | imask &= ~Y2_IS_PHY_QLNK; | ||
2177 | sky2_write32(hw, B0_IMSK, imask); | ||
2178 | |||
2179 | /* reset PHY Link Detect */ | ||
2180 | phy = sky2_pci_read16(hw, PSM_CONFIG_REG4); | ||
2181 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); | ||
2182 | sky2_pci_write16(hw, PSM_CONFIG_REG4, phy | 1); | ||
2183 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); | ||
2184 | |||
2185 | sky2_link_up(sky2); | ||
2186 | } | ||
2187 | |||
2099 | /* Transmit timeout is only called if we are running, carrier is up | 2188 | /* Transmit timeout is only called if we are running, carrier is up |
2100 | * and tx queue is full (stopped). | 2189 | * and tx queue is full (stopped). |
2101 | */ | 2190 | */ |
@@ -2104,13 +2193,12 @@ static void sky2_tx_timeout(struct net_device *dev) | |||
2104 | struct sky2_port *sky2 = netdev_priv(dev); | 2193 | struct sky2_port *sky2 = netdev_priv(dev); |
2105 | struct sky2_hw *hw = sky2->hw; | 2194 | struct sky2_hw *hw = sky2->hw; |
2106 | 2195 | ||
2107 | if (netif_msg_timer(sky2)) | 2196 | netif_err(sky2, timer, dev, "tx timeout\n"); |
2108 | printk(KERN_ERR PFX "%s: tx timeout\n", dev->name); | ||
2109 | 2197 | ||
2110 | printk(KERN_DEBUG PFX "%s: transmit ring %u .. %u report=%u done=%u\n", | 2198 | netdev_printk(KERN_DEBUG, dev, "transmit ring %u .. %u report=%u done=%u\n", |
2111 | dev->name, sky2->tx_cons, sky2->tx_prod, | 2199 | sky2->tx_cons, sky2->tx_prod, |
2112 | sky2_read16(hw, sky2->port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX), | 2200 | sky2_read16(hw, sky2->port == 0 ? STAT_TXA1_RIDX : STAT_TXA2_RIDX), |
2113 | sky2_read16(hw, Q_ADDR(txqaddr[sky2->port], Q_DONE))); | 2201 | sky2_read16(hw, Q_ADDR(txqaddr[sky2->port], Q_DONE))); |
2114 | 2202 | ||
2115 | /* can't restart safely under softirq */ | 2203 | /* can't restart safely under softirq */ |
2116 | schedule_work(&hw->restart_work); | 2204 | schedule_work(&hw->restart_work); |
@@ -2125,14 +2213,20 @@ static int sky2_change_mtu(struct net_device *dev, int new_mtu) | |||
2125 | u16 ctl, mode; | 2213 | u16 ctl, mode; |
2126 | u32 imask; | 2214 | u32 imask; |
2127 | 2215 | ||
2216 | /* MTU size outside the spec */ | ||
2128 | if (new_mtu < ETH_ZLEN || new_mtu > ETH_JUMBO_MTU) | 2217 | if (new_mtu < ETH_ZLEN || new_mtu > ETH_JUMBO_MTU) |
2129 | return -EINVAL; | 2218 | return -EINVAL; |
2130 | 2219 | ||
2220 | /* MTU > 1500 on yukon FE and FE+ not allowed */ | ||
2131 | if (new_mtu > ETH_DATA_LEN && | 2221 | if (new_mtu > ETH_DATA_LEN && |
2132 | (hw->chip_id == CHIP_ID_YUKON_FE || | 2222 | (hw->chip_id == CHIP_ID_YUKON_FE || |
2133 | hw->chip_id == CHIP_ID_YUKON_FE_P)) | 2223 | hw->chip_id == CHIP_ID_YUKON_FE_P)) |
2134 | return -EINVAL; | 2224 | return -EINVAL; |
2135 | 2225 | ||
2226 | /* TSO, etc on Yukon Ultra and MTU > 1500 not supported */ | ||
2227 | if (new_mtu > ETH_DATA_LEN && hw->chip_id == CHIP_ID_YUKON_EC_U) | ||
2228 | dev->features &= ~(NETIF_F_TSO|NETIF_F_SG|NETIF_F_ALL_CSUM); | ||
2229 | |||
2136 | if (!netif_running(dev)) { | 2230 | if (!netif_running(dev)) { |
2137 | dev->mtu = new_mtu; | 2231 | dev->mtu = new_mtu; |
2138 | return 0; | 2232 | return 0; |
@@ -2167,7 +2261,11 @@ static int sky2_change_mtu(struct net_device *dev, int new_mtu) | |||
2167 | 2261 | ||
2168 | sky2_write8(hw, RB_ADDR(rxqaddr[port], RB_CTRL), RB_ENA_OP_MD); | 2262 | sky2_write8(hw, RB_ADDR(rxqaddr[port], RB_CTRL), RB_ENA_OP_MD); |
2169 | 2263 | ||
2170 | err = sky2_rx_start(sky2); | 2264 | err = sky2_alloc_rx_skbs(sky2); |
2265 | if (!err) | ||
2266 | sky2_rx_start(sky2); | ||
2267 | else | ||
2268 | sky2_rx_clean(sky2); | ||
2171 | sky2_write32(hw, B0_IMSK, imask); | 2269 | sky2_write32(hw, B0_IMSK, imask); |
2172 | 2270 | ||
2173 | sky2_read32(hw, B0_Y2_SP_LISR); | 2271 | sky2_read32(hw, B0_Y2_SP_LISR); |
@@ -2191,9 +2289,8 @@ static struct sk_buff *receive_copy(struct sky2_port *sky2, | |||
2191 | { | 2289 | { |
2192 | struct sk_buff *skb; | 2290 | struct sk_buff *skb; |
2193 | 2291 | ||
2194 | skb = netdev_alloc_skb(sky2->netdev, length + 2); | 2292 | skb = netdev_alloc_skb_ip_align(sky2->netdev, length); |
2195 | if (likely(skb)) { | 2293 | if (likely(skb)) { |
2196 | skb_reserve(skb, 2); | ||
2197 | pci_dma_sync_single_for_cpu(sky2->hw->pdev, re->data_addr, | 2294 | pci_dma_sync_single_for_cpu(sky2->hw->pdev, re->data_addr, |
2198 | length, PCI_DMA_FROMDEVICE); | 2295 | length, PCI_DMA_FROMDEVICE); |
2199 | skb_copy_from_linear_data(re->skb, skb->data, length); | 2296 | skb_copy_from_linear_data(re->skb, skb->data, length); |
@@ -2245,30 +2342,32 @@ static struct sk_buff *receive_new(struct sky2_port *sky2, | |||
2245 | struct rx_ring_info *re, | 2342 | struct rx_ring_info *re, |
2246 | unsigned int length) | 2343 | unsigned int length) |
2247 | { | 2344 | { |
2248 | struct sk_buff *skb, *nskb; | 2345 | struct sk_buff *skb; |
2346 | struct rx_ring_info nre; | ||
2249 | unsigned hdr_space = sky2->rx_data_size; | 2347 | unsigned hdr_space = sky2->rx_data_size; |
2250 | 2348 | ||
2251 | /* Don't be tricky about reusing pages (yet) */ | 2349 | nre.skb = sky2_rx_alloc(sky2); |
2252 | nskb = sky2_rx_alloc(sky2); | 2350 | if (unlikely(!nre.skb)) |
2253 | if (unlikely(!nskb)) | 2351 | goto nobuf; |
2254 | return NULL; | 2352 | |
2353 | if (sky2_rx_map_skb(sky2->hw->pdev, &nre, hdr_space)) | ||
2354 | goto nomap; | ||
2255 | 2355 | ||
2256 | skb = re->skb; | 2356 | skb = re->skb; |
2257 | sky2_rx_unmap_skb(sky2->hw->pdev, re); | 2357 | sky2_rx_unmap_skb(sky2->hw->pdev, re); |
2258 | |||
2259 | prefetch(skb->data); | 2358 | prefetch(skb->data); |
2260 | re->skb = nskb; | 2359 | *re = nre; |
2261 | if (sky2_rx_map_skb(sky2->hw->pdev, re, hdr_space)) { | ||
2262 | dev_kfree_skb(nskb); | ||
2263 | re->skb = skb; | ||
2264 | return NULL; | ||
2265 | } | ||
2266 | 2360 | ||
2267 | if (skb_shinfo(skb)->nr_frags) | 2361 | if (skb_shinfo(skb)->nr_frags) |
2268 | skb_put_frags(skb, hdr_space, length); | 2362 | skb_put_frags(skb, hdr_space, length); |
2269 | else | 2363 | else |
2270 | skb_put(skb, length); | 2364 | skb_put(skb, length); |
2271 | return skb; | 2365 | return skb; |
2366 | |||
2367 | nomap: | ||
2368 | dev_kfree_skb(nre.skb); | ||
2369 | nobuf: | ||
2370 | return NULL; | ||
2272 | } | 2371 | } |
2273 | 2372 | ||
2274 | /* | 2373 | /* |
@@ -2289,9 +2388,9 @@ static struct sk_buff *sky2_receive(struct net_device *dev, | |||
2289 | count -= VLAN_HLEN; | 2388 | count -= VLAN_HLEN; |
2290 | #endif | 2389 | #endif |
2291 | 2390 | ||
2292 | if (unlikely(netif_msg_rx_status(sky2))) | 2391 | netif_printk(sky2, rx_status, KERN_DEBUG, dev, |
2293 | printk(KERN_DEBUG PFX "%s: rx slot %u status 0x%x len %d\n", | 2392 | "rx slot %u status 0x%x len %d\n", |
2294 | dev->name, sky2->rx_next, status, length); | 2393 | sky2->rx_next, status, length); |
2295 | 2394 | ||
2296 | sky2->rx_next = (sky2->rx_next + 1) % sky2->rx_pending; | 2395 | sky2->rx_next = (sky2->rx_next + 1) % sky2->rx_pending; |
2297 | prefetch(sky2->rx_ring + sky2->rx_next); | 2396 | prefetch(sky2->rx_ring + sky2->rx_next); |
@@ -2320,6 +2419,9 @@ okay: | |||
2320 | skb = receive_copy(sky2, re, length); | 2419 | skb = receive_copy(sky2, re, length); |
2321 | else | 2420 | else |
2322 | skb = receive_new(sky2, re, length); | 2421 | skb = receive_new(sky2, re, length); |
2422 | |||
2423 | dev->stats.rx_dropped += (skb == NULL); | ||
2424 | |||
2323 | resubmit: | 2425 | resubmit: |
2324 | sky2_rx_submit(sky2, re); | 2426 | sky2_rx_submit(sky2, re); |
2325 | 2427 | ||
@@ -2329,9 +2431,10 @@ len_error: | |||
2329 | /* Truncation of overlength packets | 2431 | /* Truncation of overlength packets |
2330 | causes PHY length to not match MAC length */ | 2432 | causes PHY length to not match MAC length */ |
2331 | ++dev->stats.rx_length_errors; | 2433 | ++dev->stats.rx_length_errors; |
2332 | if (netif_msg_rx_err(sky2) && net_ratelimit()) | 2434 | if (net_ratelimit()) |
2333 | pr_info(PFX "%s: rx length error: status %#x length %d\n", | 2435 | netif_info(sky2, rx_err, dev, |
2334 | dev->name, status, length); | 2436 | "rx length error: status %#x length %d\n", |
2437 | status, length); | ||
2335 | goto resubmit; | 2438 | goto resubmit; |
2336 | 2439 | ||
2337 | error: | 2440 | error: |
@@ -2341,9 +2444,9 @@ error: | |||
2341 | goto resubmit; | 2444 | goto resubmit; |
2342 | } | 2445 | } |
2343 | 2446 | ||
2344 | if (netif_msg_rx_err(sky2) && net_ratelimit()) | 2447 | if (net_ratelimit()) |
2345 | printk(KERN_INFO PFX "%s: rx error, status 0x%x length %d\n", | 2448 | netif_info(sky2, rx_err, dev, |
2346 | dev->name, status, length); | 2449 | "rx error, status 0x%x length %d\n", status, length); |
2347 | 2450 | ||
2348 | if (status & (GMR_FS_LONG_ERR | GMR_FS_UN_SIZE)) | 2451 | if (status & (GMR_FS_LONG_ERR | GMR_FS_UN_SIZE)) |
2349 | dev->stats.rx_length_errors++; | 2452 | dev->stats.rx_length_errors++; |
@@ -2360,8 +2463,13 @@ static inline void sky2_tx_done(struct net_device *dev, u16 last) | |||
2360 | { | 2463 | { |
2361 | struct sky2_port *sky2 = netdev_priv(dev); | 2464 | struct sky2_port *sky2 = netdev_priv(dev); |
2362 | 2465 | ||
2363 | if (netif_running(dev)) | 2466 | if (netif_running(dev)) { |
2364 | sky2_tx_complete(sky2, last); | 2467 | sky2_tx_complete(sky2, last); |
2468 | |||
2469 | /* Wake unless it's detached, and called e.g. from sky2_down() */ | ||
2470 | if (tx_avail(sky2) > MAX_SKB_TX_LE + 4) | ||
2471 | netif_wake_queue(dev); | ||
2472 | } | ||
2365 | } | 2473 | } |
2366 | 2474 | ||
2367 | static inline void sky2_skb_rx(const struct sky2_port *sky2, | 2475 | static inline void sky2_skb_rx(const struct sky2_port *sky2, |
@@ -2397,6 +2505,32 @@ static inline void sky2_rx_done(struct sky2_hw *hw, unsigned port, | |||
2397 | } | 2505 | } |
2398 | } | 2506 | } |
2399 | 2507 | ||
2508 | static void sky2_rx_checksum(struct sky2_port *sky2, u32 status) | ||
2509 | { | ||
2510 | /* If this happens then driver assuming wrong format for chip type */ | ||
2511 | BUG_ON(sky2->hw->flags & SKY2_HW_NEW_LE); | ||
2512 | |||
2513 | /* Both checksum counters are programmed to start at | ||
2514 | * the same offset, so unless there is a problem they | ||
2515 | * should match. This failure is an early indication that | ||
2516 | * hardware receive checksumming won't work. | ||
2517 | */ | ||
2518 | if (likely((u16)(status >> 16) == (u16)status)) { | ||
2519 | struct sk_buff *skb = sky2->rx_ring[sky2->rx_next].skb; | ||
2520 | skb->ip_summed = CHECKSUM_COMPLETE; | ||
2521 | skb->csum = le16_to_cpu(status); | ||
2522 | } else { | ||
2523 | dev_notice(&sky2->hw->pdev->dev, | ||
2524 | "%s: receive checksum problem (status = %#x)\n", | ||
2525 | sky2->netdev->name, status); | ||
2526 | |||
2527 | /* Disable checksum offload */ | ||
2528 | sky2->flags &= ~SKY2_FLAG_RX_CHECKSUM; | ||
2529 | sky2_write32(sky2->hw, Q_ADDR(rxqaddr[sky2->port], Q_CSR), | ||
2530 | BMU_DIS_RX_CHKSUM); | ||
2531 | } | ||
2532 | } | ||
2533 | |||
2400 | /* Process status response ring */ | 2534 | /* Process status response ring */ |
2401 | static int sky2_status_intr(struct sky2_hw *hw, int to_do, u16 idx) | 2535 | static int sky2_status_intr(struct sky2_hw *hw, int to_do, u16 idx) |
2402 | { | 2536 | { |
@@ -2431,11 +2565,10 @@ static int sky2_status_intr(struct sky2_hw *hw, int to_do, u16 idx) | |||
2431 | case OP_RXSTAT: | 2565 | case OP_RXSTAT: |
2432 | total_packets[port]++; | 2566 | total_packets[port]++; |
2433 | total_bytes[port] += length; | 2567 | total_bytes[port] += length; |
2568 | |||
2434 | skb = sky2_receive(dev, length, status); | 2569 | skb = sky2_receive(dev, length, status); |
2435 | if (unlikely(!skb)) { | 2570 | if (!skb) |
2436 | dev->stats.rx_dropped++; | ||
2437 | break; | 2571 | break; |
2438 | } | ||
2439 | 2572 | ||
2440 | /* This chip reports checksum status differently */ | 2573 | /* This chip reports checksum status differently */ |
2441 | if (hw->flags & SKY2_HW_NEW_LE) { | 2574 | if (hw->flags & SKY2_HW_NEW_LE) { |
@@ -2466,37 +2599,8 @@ static int sky2_status_intr(struct sky2_hw *hw, int to_do, u16 idx) | |||
2466 | /* fall through */ | 2599 | /* fall through */ |
2467 | #endif | 2600 | #endif |
2468 | case OP_RXCHKS: | 2601 | case OP_RXCHKS: |
2469 | if (!(sky2->flags & SKY2_FLAG_RX_CHECKSUM)) | 2602 | if (likely(sky2->flags & SKY2_FLAG_RX_CHECKSUM)) |
2470 | break; | 2603 | sky2_rx_checksum(sky2, status); |
2471 | |||
2472 | /* If this happens then driver assuming wrong format */ | ||
2473 | if (unlikely(hw->flags & SKY2_HW_NEW_LE)) { | ||
2474 | if (net_ratelimit()) | ||
2475 | printk(KERN_NOTICE "%s: unexpected" | ||
2476 | " checksum status\n", | ||
2477 | dev->name); | ||
2478 | break; | ||
2479 | } | ||
2480 | |||
2481 | /* Both checksum counters are programmed to start at | ||
2482 | * the same offset, so unless there is a problem they | ||
2483 | * should match. This failure is an early indication that | ||
2484 | * hardware receive checksumming won't work. | ||
2485 | */ | ||
2486 | if (likely(status >> 16 == (status & 0xffff))) { | ||
2487 | skb = sky2->rx_ring[sky2->rx_next].skb; | ||
2488 | skb->ip_summed = CHECKSUM_COMPLETE; | ||
2489 | skb->csum = le16_to_cpu(status); | ||
2490 | } else { | ||
2491 | printk(KERN_NOTICE PFX "%s: hardware receive " | ||
2492 | "checksum problem (status = %#x)\n", | ||
2493 | dev->name, status); | ||
2494 | sky2->flags &= ~SKY2_FLAG_RX_CHECKSUM; | ||
2495 | |||
2496 | sky2_write32(sky2->hw, | ||
2497 | Q_ADDR(rxqaddr[port], Q_CSR), | ||
2498 | BMU_DIS_RX_CHKSUM); | ||
2499 | } | ||
2500 | break; | 2604 | break; |
2501 | 2605 | ||
2502 | case OP_TXINDEXLE: | 2606 | case OP_TXINDEXLE: |
@@ -2510,8 +2614,7 @@ static int sky2_status_intr(struct sky2_hw *hw, int to_do, u16 idx) | |||
2510 | 2614 | ||
2511 | default: | 2615 | default: |
2512 | if (net_ratelimit()) | 2616 | if (net_ratelimit()) |
2513 | printk(KERN_WARNING PFX | 2617 | pr_warning("unknown status opcode 0x%x\n", opcode); |
2514 | "unknown status opcode 0x%x\n", opcode); | ||
2515 | } | 2618 | } |
2516 | } while (hw->st_idx != idx); | 2619 | } while (hw->st_idx != idx); |
2517 | 2620 | ||
@@ -2530,41 +2633,37 @@ static void sky2_hw_error(struct sky2_hw *hw, unsigned port, u32 status) | |||
2530 | struct net_device *dev = hw->dev[port]; | 2633 | struct net_device *dev = hw->dev[port]; |
2531 | 2634 | ||
2532 | if (net_ratelimit()) | 2635 | if (net_ratelimit()) |
2533 | printk(KERN_INFO PFX "%s: hw error interrupt status 0x%x\n", | 2636 | netdev_info(dev, "hw error interrupt status 0x%x\n", status); |
2534 | dev->name, status); | ||
2535 | 2637 | ||
2536 | if (status & Y2_IS_PAR_RD1) { | 2638 | if (status & Y2_IS_PAR_RD1) { |
2537 | if (net_ratelimit()) | 2639 | if (net_ratelimit()) |
2538 | printk(KERN_ERR PFX "%s: ram data read parity error\n", | 2640 | netdev_err(dev, "ram data read parity error\n"); |
2539 | dev->name); | ||
2540 | /* Clear IRQ */ | 2641 | /* Clear IRQ */ |
2541 | sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_RD_PERR); | 2642 | sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_RD_PERR); |
2542 | } | 2643 | } |
2543 | 2644 | ||
2544 | if (status & Y2_IS_PAR_WR1) { | 2645 | if (status & Y2_IS_PAR_WR1) { |
2545 | if (net_ratelimit()) | 2646 | if (net_ratelimit()) |
2546 | printk(KERN_ERR PFX "%s: ram data write parity error\n", | 2647 | netdev_err(dev, "ram data write parity error\n"); |
2547 | dev->name); | ||
2548 | 2648 | ||
2549 | sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_WR_PERR); | 2649 | sky2_write16(hw, RAM_BUFFER(port, B3_RI_CTRL), RI_CLR_WR_PERR); |
2550 | } | 2650 | } |
2551 | 2651 | ||
2552 | if (status & Y2_IS_PAR_MAC1) { | 2652 | if (status & Y2_IS_PAR_MAC1) { |
2553 | if (net_ratelimit()) | 2653 | if (net_ratelimit()) |
2554 | printk(KERN_ERR PFX "%s: MAC parity error\n", dev->name); | 2654 | netdev_err(dev, "MAC parity error\n"); |
2555 | sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_PE); | 2655 | sky2_write8(hw, SK_REG(port, TX_GMF_CTRL_T), GMF_CLI_TX_PE); |
2556 | } | 2656 | } |
2557 | 2657 | ||
2558 | if (status & Y2_IS_PAR_RX1) { | 2658 | if (status & Y2_IS_PAR_RX1) { |
2559 | if (net_ratelimit()) | 2659 | if (net_ratelimit()) |
2560 | printk(KERN_ERR PFX "%s: RX parity error\n", dev->name); | 2660 | netdev_err(dev, "RX parity error\n"); |
2561 | sky2_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), BMU_CLR_IRQ_PAR); | 2661 | sky2_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), BMU_CLR_IRQ_PAR); |
2562 | } | 2662 | } |
2563 | 2663 | ||
2564 | if (status & Y2_IS_TCP_TXA1) { | 2664 | if (status & Y2_IS_TCP_TXA1) { |
2565 | if (net_ratelimit()) | 2665 | if (net_ratelimit()) |
2566 | printk(KERN_ERR PFX "%s: TCP segmentation error\n", | 2666 | netdev_err(dev, "TCP segmentation error\n"); |
2567 | dev->name); | ||
2568 | sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_CLR_IRQ_TCP); | 2667 | sky2_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), BMU_CLR_IRQ_TCP); |
2569 | } | 2668 | } |
2570 | } | 2669 | } |
@@ -2622,9 +2721,7 @@ static void sky2_mac_intr(struct sky2_hw *hw, unsigned port) | |||
2622 | struct sky2_port *sky2 = netdev_priv(dev); | 2721 | struct sky2_port *sky2 = netdev_priv(dev); |
2623 | u8 status = sky2_read8(hw, SK_REG(port, GMAC_IRQ_SRC)); | 2722 | u8 status = sky2_read8(hw, SK_REG(port, GMAC_IRQ_SRC)); |
2624 | 2723 | ||
2625 | if (netif_msg_intr(sky2)) | 2724 | netif_info(sky2, intr, dev, "mac interrupt status 0x%x\n", status); |
2626 | printk(KERN_INFO PFX "%s: mac interrupt status 0x%x\n", | ||
2627 | dev->name, status); | ||
2628 | 2725 | ||
2629 | if (status & GM_IS_RX_CO_OV) | 2726 | if (status & GM_IS_RX_CO_OV) |
2630 | gma_read16(hw, port, GM_RX_IRQ_SRC); | 2727 | gma_read16(hw, port, GM_RX_IRQ_SRC); |
@@ -2649,8 +2746,7 @@ static void sky2_le_error(struct sky2_hw *hw, unsigned port, u16 q) | |||
2649 | struct net_device *dev = hw->dev[port]; | 2746 | struct net_device *dev = hw->dev[port]; |
2650 | u16 idx = sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_GET_IDX)); | 2747 | u16 idx = sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_GET_IDX)); |
2651 | 2748 | ||
2652 | dev_err(&hw->pdev->dev, PFX | 2749 | dev_err(&hw->pdev->dev, "%s: descriptor error q=%#x get=%u put=%u\n", |
2653 | "%s: descriptor error q=%#x get=%u put=%u\n", | ||
2654 | dev->name, (unsigned) q, (unsigned) idx, | 2750 | dev->name, (unsigned) q, (unsigned) idx, |
2655 | (unsigned) sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX))); | 2751 | (unsigned) sky2_read16(hw, Y2_QADDR(q, PREF_UNIT_PUT_IDX))); |
2656 | 2752 | ||
@@ -2675,9 +2771,10 @@ static int sky2_rx_hung(struct net_device *dev) | |||
2675 | /* Check if the PCI RX hang */ | 2771 | /* Check if the PCI RX hang */ |
2676 | (fifo_rp == sky2->check.fifo_rp && | 2772 | (fifo_rp == sky2->check.fifo_rp && |
2677 | fifo_lev != 0 && fifo_lev >= sky2->check.fifo_lev))) { | 2773 | fifo_lev != 0 && fifo_lev >= sky2->check.fifo_lev))) { |
2678 | printk(KERN_DEBUG PFX "%s: hung mac %d:%d fifo %d (%d:%d)\n", | 2774 | netdev_printk(KERN_DEBUG, dev, |
2679 | dev->name, mac_lev, mac_rp, fifo_lev, fifo_rp, | 2775 | "hung mac %d:%d fifo %d (%d:%d)\n", |
2680 | sky2_read8(hw, Q_ADDR(rxq, Q_WP))); | 2776 | mac_lev, mac_rp, fifo_lev, |
2777 | fifo_rp, sky2_read8(hw, Q_ADDR(rxq, Q_WP))); | ||
2681 | return 1; | 2778 | return 1; |
2682 | } else { | 2779 | } else { |
2683 | sky2->check.last = dev->last_rx; | 2780 | sky2->check.last = dev->last_rx; |
@@ -2708,8 +2805,7 @@ static void sky2_watchdog(unsigned long arg) | |||
2708 | /* For chips with Rx FIFO, check if stuck */ | 2805 | /* For chips with Rx FIFO, check if stuck */ |
2709 | if ((hw->flags & SKY2_HW_RAM_BUFFER) && | 2806 | if ((hw->flags & SKY2_HW_RAM_BUFFER) && |
2710 | sky2_rx_hung(dev)) { | 2807 | sky2_rx_hung(dev)) { |
2711 | pr_info(PFX "%s: receiver hang detected\n", | 2808 | netdev_info(dev, "receiver hang detected\n"); |
2712 | dev->name); | ||
2713 | schedule_work(&hw->restart_work); | 2809 | schedule_work(&hw->restart_work); |
2714 | return; | 2810 | return; |
2715 | } | 2811 | } |
@@ -2766,6 +2862,9 @@ static int sky2_poll(struct napi_struct *napi, int work_limit) | |||
2766 | if (status & Y2_IS_IRQ_PHY2) | 2862 | if (status & Y2_IS_IRQ_PHY2) |
2767 | sky2_phy_intr(hw, 1); | 2863 | sky2_phy_intr(hw, 1); |
2768 | 2864 | ||
2865 | if (status & Y2_IS_PHY_QLNK) | ||
2866 | sky2_qlink_intr(hw); | ||
2867 | |||
2769 | while ((idx = sky2_read16(hw, STAT_PUT_IDX)) != hw->st_idx) { | 2868 | while ((idx = sky2_read16(hw, STAT_PUT_IDX)) != hw->st_idx) { |
2770 | work_done += sky2_status_intr(hw, work_limit - work_done, idx); | 2869 | work_done += sky2_status_intr(hw, work_limit - work_done, idx); |
2771 | 2870 | ||
@@ -2815,6 +2914,7 @@ static u32 sky2_mhz(const struct sky2_hw *hw) | |||
2815 | case CHIP_ID_YUKON_EX: | 2914 | case CHIP_ID_YUKON_EX: |
2816 | case CHIP_ID_YUKON_SUPR: | 2915 | case CHIP_ID_YUKON_SUPR: |
2817 | case CHIP_ID_YUKON_UL_2: | 2916 | case CHIP_ID_YUKON_UL_2: |
2917 | case CHIP_ID_YUKON_OPT: | ||
2818 | return 125; | 2918 | return 125; |
2819 | 2919 | ||
2820 | case CHIP_ID_YUKON_FE: | 2920 | case CHIP_ID_YUKON_FE: |
@@ -2908,6 +3008,12 @@ static int __devinit sky2_init(struct sky2_hw *hw) | |||
2908 | | SKY2_HW_ADV_POWER_CTL; | 3008 | | SKY2_HW_ADV_POWER_CTL; |
2909 | break; | 3009 | break; |
2910 | 3010 | ||
3011 | case CHIP_ID_YUKON_OPT: | ||
3012 | hw->flags = SKY2_HW_GIGABIT | ||
3013 | | SKY2_HW_NEW_LE | ||
3014 | | SKY2_HW_ADV_POWER_CTL; | ||
3015 | break; | ||
3016 | |||
2911 | default: | 3017 | default: |
2912 | dev_err(&hw->pdev->dev, "unsupported chip type 0x%x\n", | 3018 | dev_err(&hw->pdev->dev, "unsupported chip type 0x%x\n", |
2913 | hw->chip_id); | 3019 | hw->chip_id); |
@@ -2939,11 +3045,20 @@ static void sky2_reset(struct sky2_hw *hw) | |||
2939 | u32 hwe_mask = Y2_HWE_ALL_MASK; | 3045 | u32 hwe_mask = Y2_HWE_ALL_MASK; |
2940 | 3046 | ||
2941 | /* disable ASF */ | 3047 | /* disable ASF */ |
2942 | if (hw->chip_id == CHIP_ID_YUKON_EX) { | 3048 | if (hw->chip_id == CHIP_ID_YUKON_EX |
3049 | || hw->chip_id == CHIP_ID_YUKON_SUPR) { | ||
3050 | sky2_write32(hw, CPU_WDOG, 0); | ||
2943 | status = sky2_read16(hw, HCU_CCSR); | 3051 | status = sky2_read16(hw, HCU_CCSR); |
2944 | status &= ~(HCU_CCSR_AHB_RST | HCU_CCSR_CPU_RST_MODE | | 3052 | status &= ~(HCU_CCSR_AHB_RST | HCU_CCSR_CPU_RST_MODE | |
2945 | HCU_CCSR_UC_STATE_MSK); | 3053 | HCU_CCSR_UC_STATE_MSK); |
3054 | /* | ||
3055 | * CPU clock divider shouldn't be used because | ||
3056 | * - ASF firmware may malfunction | ||
3057 | * - Yukon-Supreme: Parallel FLASH doesn't support divided clocks | ||
3058 | */ | ||
3059 | status &= ~HCU_CCSR_CPU_CLK_DIVIDE_MSK; | ||
2946 | sky2_write16(hw, HCU_CCSR, status); | 3060 | sky2_write16(hw, HCU_CCSR, status); |
3061 | sky2_write32(hw, CPU_WDOG, 0); | ||
2947 | } else | 3062 | } else |
2948 | sky2_write8(hw, B28_Y2_ASF_STAT_CMD, Y2_ASF_RESET); | 3063 | sky2_write8(hw, B28_Y2_ASF_STAT_CMD, Y2_ASF_RESET); |
2949 | sky2_write16(hw, B0_CTST, Y2_ASF_DISABLE); | 3064 | sky2_write16(hw, B0_CTST, Y2_ASF_DISABLE); |
@@ -2986,6 +3101,54 @@ static void sky2_reset(struct sky2_hw *hw) | |||
2986 | sky2_write16(hw, SK_REG(i, GMAC_CTRL), | 3101 | sky2_write16(hw, SK_REG(i, GMAC_CTRL), |
2987 | GMC_BYP_MACSECRX_ON | GMC_BYP_MACSECTX_ON | 3102 | GMC_BYP_MACSECRX_ON | GMC_BYP_MACSECTX_ON |
2988 | | GMC_BYP_RETR_ON); | 3103 | | GMC_BYP_RETR_ON); |
3104 | |||
3105 | } | ||
3106 | |||
3107 | if (hw->chip_id == CHIP_ID_YUKON_SUPR && hw->chip_rev > CHIP_REV_YU_SU_B0) { | ||
3108 | /* enable MACSec clock gating */ | ||
3109 | sky2_pci_write32(hw, PCI_DEV_REG3, P_CLK_MACSEC_DIS); | ||
3110 | } | ||
3111 | |||
3112 | if (hw->chip_id == CHIP_ID_YUKON_OPT) { | ||
3113 | u16 reg; | ||
3114 | u32 msk; | ||
3115 | |||
3116 | if (hw->chip_rev == 0) { | ||
3117 | /* disable PCI-E PHY power down (set PHY reg 0x80, bit 7 */ | ||
3118 | sky2_write32(hw, Y2_PEX_PHY_DATA, (0x80UL << 16) | (1 << 7)); | ||
3119 | |||
3120 | /* set PHY Link Detect Timer to 1.1 second (11x 100ms) */ | ||
3121 | reg = 10; | ||
3122 | } else { | ||
3123 | /* set PHY Link Detect Timer to 0.4 second (4x 100ms) */ | ||
3124 | reg = 3; | ||
3125 | } | ||
3126 | |||
3127 | reg <<= PSM_CONFIG_REG4_TIMER_PHY_LINK_DETECT_BASE; | ||
3128 | |||
3129 | /* reset PHY Link Detect */ | ||
3130 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_ON); | ||
3131 | sky2_pci_write16(hw, PSM_CONFIG_REG4, | ||
3132 | reg | PSM_CONFIG_REG4_RST_PHY_LINK_DETECT); | ||
3133 | sky2_pci_write16(hw, PSM_CONFIG_REG4, reg); | ||
3134 | |||
3135 | |||
3136 | /* enable PHY Quick Link */ | ||
3137 | msk = sky2_read32(hw, B0_IMSK); | ||
3138 | msk |= Y2_IS_PHY_QLNK; | ||
3139 | sky2_write32(hw, B0_IMSK, msk); | ||
3140 | |||
3141 | /* check if PSMv2 was running before */ | ||
3142 | reg = sky2_pci_read16(hw, PSM_CONFIG_REG3); | ||
3143 | if (reg & PCI_EXP_LNKCTL_ASPMC) { | ||
3144 | cap = pci_find_capability(pdev, PCI_CAP_ID_EXP); | ||
3145 | /* restore the PCIe Link Control register */ | ||
3146 | sky2_pci_write16(hw, cap + PCI_EXP_LNKCTL, reg); | ||
3147 | } | ||
3148 | sky2_write8(hw, B2_TST_CTRL1, TST_CFG_WRITE_OFF); | ||
3149 | |||
3150 | /* re-enable PEX PM in PEX PHY debug reg. 8 (clear bit 12) */ | ||
3151 | sky2_write32(hw, Y2_PEX_PHY_DATA, PEX_DB_ACCESS | (0x08UL << 16)); | ||
2989 | } | 3152 | } |
2990 | 3153 | ||
2991 | /* Clear I2C IRQ noise */ | 3154 | /* Clear I2C IRQ noise */ |
@@ -3069,7 +3232,9 @@ static void sky2_reset(struct sky2_hw *hw) | |||
3069 | static void sky2_detach(struct net_device *dev) | 3232 | static void sky2_detach(struct net_device *dev) |
3070 | { | 3233 | { |
3071 | if (netif_running(dev)) { | 3234 | if (netif_running(dev)) { |
3235 | netif_tx_lock(dev); | ||
3072 | netif_device_detach(dev); /* stop txq */ | 3236 | netif_device_detach(dev); /* stop txq */ |
3237 | netif_tx_unlock(dev); | ||
3073 | sky2_down(dev); | 3238 | sky2_down(dev); |
3074 | } | 3239 | } |
3075 | } | 3240 | } |
@@ -3082,8 +3247,7 @@ static int sky2_reattach(struct net_device *dev) | |||
3082 | if (netif_running(dev)) { | 3247 | if (netif_running(dev)) { |
3083 | err = sky2_up(dev); | 3248 | err = sky2_up(dev); |
3084 | if (err) { | 3249 | if (err) { |
3085 | printk(KERN_INFO PFX "%s: could not restart %d\n", | 3250 | netdev_info(dev, "could not restart %d\n", err); |
3086 | dev->name, err); | ||
3087 | dev_close(dev); | 3251 | dev_close(dev); |
3088 | } else { | 3252 | } else { |
3089 | netif_device_attach(dev); | 3253 | netif_device_attach(dev); |
@@ -3097,20 +3261,46 @@ static int sky2_reattach(struct net_device *dev) | |||
3097 | static void sky2_restart(struct work_struct *work) | 3261 | static void sky2_restart(struct work_struct *work) |
3098 | { | 3262 | { |
3099 | struct sky2_hw *hw = container_of(work, struct sky2_hw, restart_work); | 3263 | struct sky2_hw *hw = container_of(work, struct sky2_hw, restart_work); |
3264 | u32 imask; | ||
3100 | int i; | 3265 | int i; |
3101 | 3266 | ||
3102 | rtnl_lock(); | 3267 | rtnl_lock(); |
3103 | for (i = 0; i < hw->ports; i++) | ||
3104 | sky2_detach(hw->dev[i]); | ||
3105 | 3268 | ||
3106 | napi_disable(&hw->napi); | 3269 | napi_disable(&hw->napi); |
3270 | synchronize_irq(hw->pdev->irq); | ||
3271 | imask = sky2_read32(hw, B0_IMSK); | ||
3107 | sky2_write32(hw, B0_IMSK, 0); | 3272 | sky2_write32(hw, B0_IMSK, 0); |
3273 | |||
3274 | for (i = 0; i < hw->ports; i++) { | ||
3275 | struct net_device *dev = hw->dev[i]; | ||
3276 | struct sky2_port *sky2 = netdev_priv(dev); | ||
3277 | |||
3278 | if (!netif_running(dev)) | ||
3279 | continue; | ||
3280 | |||
3281 | netif_carrier_off(dev); | ||
3282 | netif_tx_disable(dev); | ||
3283 | sky2_hw_down(sky2); | ||
3284 | } | ||
3285 | |||
3108 | sky2_reset(hw); | 3286 | sky2_reset(hw); |
3109 | sky2_write32(hw, B0_IMSK, Y2_IS_BASE); | ||
3110 | napi_enable(&hw->napi); | ||
3111 | 3287 | ||
3112 | for (i = 0; i < hw->ports; i++) | 3288 | for (i = 0; i < hw->ports; i++) { |
3113 | sky2_reattach(hw->dev[i]); | 3289 | struct net_device *dev = hw->dev[i]; |
3290 | struct sky2_port *sky2 = netdev_priv(dev); | ||
3291 | |||
3292 | if (!netif_running(dev)) | ||
3293 | continue; | ||
3294 | |||
3295 | sky2_hw_up(sky2); | ||
3296 | netif_wake_queue(dev); | ||
3297 | } | ||
3298 | |||
3299 | sky2_write32(hw, B0_IMSK, imask); | ||
3300 | sky2_read32(hw, B0_IMSK); | ||
3301 | |||
3302 | sky2_read32(hw, B0_Y2_SP_LISR); | ||
3303 | napi_enable(&hw->napi); | ||
3114 | 3304 | ||
3115 | rtnl_unlock(); | 3305 | rtnl_unlock(); |
3116 | } | 3306 | } |
@@ -3133,22 +3323,11 @@ static int sky2_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol) | |||
3133 | struct sky2_port *sky2 = netdev_priv(dev); | 3323 | struct sky2_port *sky2 = netdev_priv(dev); |
3134 | struct sky2_hw *hw = sky2->hw; | 3324 | struct sky2_hw *hw = sky2->hw; |
3135 | 3325 | ||
3136 | if ((wol->wolopts & ~sky2_wol_supported(sky2->hw)) | 3326 | if ((wol->wolopts & ~sky2_wol_supported(sky2->hw)) || |
3137 | || !device_can_wakeup(&hw->pdev->dev)) | 3327 | !device_can_wakeup(&hw->pdev->dev)) |
3138 | return -EOPNOTSUPP; | 3328 | return -EOPNOTSUPP; |
3139 | 3329 | ||
3140 | sky2->wol = wol->wolopts; | 3330 | sky2->wol = wol->wolopts; |
3141 | |||
3142 | if (hw->chip_id == CHIP_ID_YUKON_EC_U || | ||
3143 | hw->chip_id == CHIP_ID_YUKON_EX || | ||
3144 | hw->chip_id == CHIP_ID_YUKON_FE_P) | ||
3145 | sky2_write32(hw, B0_CTST, sky2->wol | ||
3146 | ? Y2_HW_WOL_ON : Y2_HW_WOL_OFF); | ||
3147 | |||
3148 | device_set_wakeup_enable(&hw->pdev->dev, sky2->wol); | ||
3149 | |||
3150 | if (!netif_running(dev)) | ||
3151 | sky2_wol_init(sky2); | ||
3152 | return 0; | 3331 | return 0; |
3153 | } | 3332 | } |
3154 | 3333 | ||
@@ -3443,7 +3622,7 @@ static void sky2_set_multicast(struct net_device *dev) | |||
3443 | struct sky2_port *sky2 = netdev_priv(dev); | 3622 | struct sky2_port *sky2 = netdev_priv(dev); |
3444 | struct sky2_hw *hw = sky2->hw; | 3623 | struct sky2_hw *hw = sky2->hw; |
3445 | unsigned port = sky2->port; | 3624 | unsigned port = sky2->port; |
3446 | struct dev_mc_list *list = dev->mc_list; | 3625 | struct dev_mc_list *list; |
3447 | u16 reg; | 3626 | u16 reg; |
3448 | u8 filter[8]; | 3627 | u8 filter[8]; |
3449 | int rx_pause; | 3628 | int rx_pause; |
@@ -3459,16 +3638,15 @@ static void sky2_set_multicast(struct net_device *dev) | |||
3459 | reg &= ~(GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA); | 3638 | reg &= ~(GM_RXCR_UCF_ENA | GM_RXCR_MCF_ENA); |
3460 | else if (dev->flags & IFF_ALLMULTI) | 3639 | else if (dev->flags & IFF_ALLMULTI) |
3461 | memset(filter, 0xff, sizeof(filter)); | 3640 | memset(filter, 0xff, sizeof(filter)); |
3462 | else if (dev->mc_count == 0 && !rx_pause) | 3641 | else if (netdev_mc_empty(dev) && !rx_pause) |
3463 | reg &= ~GM_RXCR_MCF_ENA; | 3642 | reg &= ~GM_RXCR_MCF_ENA; |
3464 | else { | 3643 | else { |
3465 | int i; | ||
3466 | reg |= GM_RXCR_MCF_ENA; | 3644 | reg |= GM_RXCR_MCF_ENA; |
3467 | 3645 | ||
3468 | if (rx_pause) | 3646 | if (rx_pause) |
3469 | sky2_add_filter(filter, pause_mc_addr); | 3647 | sky2_add_filter(filter, pause_mc_addr); |
3470 | 3648 | ||
3471 | for (i = 0; list && i < dev->mc_count; i++, list = list->next) | 3649 | netdev_for_each_mc_addr(list, dev) |
3472 | sky2_add_filter(filter, list->dmi_addr); | 3650 | sky2_add_filter(filter, list->dmi_addr); |
3473 | } | 3651 | } |
3474 | 3652 | ||
@@ -3730,6 +3908,50 @@ static int sky2_get_regs_len(struct net_device *dev) | |||
3730 | return 0x4000; | 3908 | return 0x4000; |
3731 | } | 3909 | } |
3732 | 3910 | ||
3911 | static int sky2_reg_access_ok(struct sky2_hw *hw, unsigned int b) | ||
3912 | { | ||
3913 | /* This complicated switch statement is to make sure and | ||
3914 | * only access regions that are unreserved. | ||
3915 | * Some blocks are only valid on dual port cards. | ||
3916 | */ | ||
3917 | switch (b) { | ||
3918 | /* second port */ | ||
3919 | case 5: /* Tx Arbiter 2 */ | ||
3920 | case 9: /* RX2 */ | ||
3921 | case 14 ... 15: /* TX2 */ | ||
3922 | case 17: case 19: /* Ram Buffer 2 */ | ||
3923 | case 22 ... 23: /* Tx Ram Buffer 2 */ | ||
3924 | case 25: /* Rx MAC Fifo 1 */ | ||
3925 | case 27: /* Tx MAC Fifo 2 */ | ||
3926 | case 31: /* GPHY 2 */ | ||
3927 | case 40 ... 47: /* Pattern Ram 2 */ | ||
3928 | case 52: case 54: /* TCP Segmentation 2 */ | ||
3929 | case 112 ... 116: /* GMAC 2 */ | ||
3930 | return hw->ports > 1; | ||
3931 | |||
3932 | case 0: /* Control */ | ||
3933 | case 2: /* Mac address */ | ||
3934 | case 4: /* Tx Arbiter 1 */ | ||
3935 | case 7: /* PCI express reg */ | ||
3936 | case 8: /* RX1 */ | ||
3937 | case 12 ... 13: /* TX1 */ | ||
3938 | case 16: case 18:/* Rx Ram Buffer 1 */ | ||
3939 | case 20 ... 21: /* Tx Ram Buffer 1 */ | ||
3940 | case 24: /* Rx MAC Fifo 1 */ | ||
3941 | case 26: /* Tx MAC Fifo 1 */ | ||
3942 | case 28 ... 29: /* Descriptor and status unit */ | ||
3943 | case 30: /* GPHY 1*/ | ||
3944 | case 32 ... 39: /* Pattern Ram 1 */ | ||
3945 | case 48: case 50: /* TCP Segmentation 1 */ | ||
3946 | case 56 ... 60: /* PCI space */ | ||
3947 | case 80 ... 84: /* GMAC 1 */ | ||
3948 | return 1; | ||
3949 | |||
3950 | default: | ||
3951 | return 0; | ||
3952 | } | ||
3953 | } | ||
3954 | |||
3733 | /* | 3955 | /* |
3734 | * Returns copy of control register region | 3956 | * Returns copy of control register region |
3735 | * Note: ethtool_get_regs always provides full size (16k) buffer | 3957 | * Note: ethtool_get_regs always provides full size (16k) buffer |
@@ -3744,55 +3966,13 @@ static void sky2_get_regs(struct net_device *dev, struct ethtool_regs *regs, | |||
3744 | regs->version = 1; | 3966 | regs->version = 1; |
3745 | 3967 | ||
3746 | for (b = 0; b < 128; b++) { | 3968 | for (b = 0; b < 128; b++) { |
3747 | /* This complicated switch statement is to make sure and | 3969 | /* skip poisonous diagnostic ram region in block 3 */ |
3748 | * only access regions that are unreserved. | 3970 | if (b == 3) |
3749 | * Some blocks are only valid on dual port cards. | ||
3750 | * and block 3 has some special diagnostic registers that | ||
3751 | * are poison. | ||
3752 | */ | ||
3753 | switch (b) { | ||
3754 | case 3: | ||
3755 | /* skip diagnostic ram region */ | ||
3756 | memcpy_fromio(p + 0x10, io + 0x10, 128 - 0x10); | 3971 | memcpy_fromio(p + 0x10, io + 0x10, 128 - 0x10); |
3757 | break; | 3972 | else if (sky2_reg_access_ok(sky2->hw, b)) |
3758 | |||
3759 | /* dual port cards only */ | ||
3760 | case 5: /* Tx Arbiter 2 */ | ||
3761 | case 9: /* RX2 */ | ||
3762 | case 14 ... 15: /* TX2 */ | ||
3763 | case 17: case 19: /* Ram Buffer 2 */ | ||
3764 | case 22 ... 23: /* Tx Ram Buffer 2 */ | ||
3765 | case 25: /* Rx MAC Fifo 1 */ | ||
3766 | case 27: /* Tx MAC Fifo 2 */ | ||
3767 | case 31: /* GPHY 2 */ | ||
3768 | case 40 ... 47: /* Pattern Ram 2 */ | ||
3769 | case 52: case 54: /* TCP Segmentation 2 */ | ||
3770 | case 112 ... 116: /* GMAC 2 */ | ||
3771 | if (sky2->hw->ports == 1) | ||
3772 | goto reserved; | ||
3773 | /* fall through */ | ||
3774 | case 0: /* Control */ | ||
3775 | case 2: /* Mac address */ | ||
3776 | case 4: /* Tx Arbiter 1 */ | ||
3777 | case 7: /* PCI express reg */ | ||
3778 | case 8: /* RX1 */ | ||
3779 | case 12 ... 13: /* TX1 */ | ||
3780 | case 16: case 18:/* Rx Ram Buffer 1 */ | ||
3781 | case 20 ... 21: /* Tx Ram Buffer 1 */ | ||
3782 | case 24: /* Rx MAC Fifo 1 */ | ||
3783 | case 26: /* Tx MAC Fifo 1 */ | ||
3784 | case 28 ... 29: /* Descriptor and status unit */ | ||
3785 | case 30: /* GPHY 1*/ | ||
3786 | case 32 ... 39: /* Pattern Ram 1 */ | ||
3787 | case 48: case 50: /* TCP Segmentation 1 */ | ||
3788 | case 56 ... 60: /* PCI space */ | ||
3789 | case 80 ... 84: /* GMAC 1 */ | ||
3790 | memcpy_fromio(p, io, 128); | 3973 | memcpy_fromio(p, io, 128); |
3791 | break; | 3974 | else |
3792 | default: | ||
3793 | reserved: | ||
3794 | memset(p, 0, 128); | 3975 | memset(p, 0, 128); |
3795 | } | ||
3796 | 3976 | ||
3797 | p += 128; | 3977 | p += 128; |
3798 | io += 128; | 3978 | io += 128; |
@@ -3844,7 +4024,7 @@ static int sky2_vpd_wait(const struct sky2_hw *hw, int cap, u16 busy) | |||
3844 | while ( (sky2_pci_read16(hw, cap + PCI_VPD_ADDR) & PCI_VPD_ADDR_F) == busy) { | 4024 | while ( (sky2_pci_read16(hw, cap + PCI_VPD_ADDR) & PCI_VPD_ADDR_F) == busy) { |
3845 | /* Can take up to 10.6 ms for write */ | 4025 | /* Can take up to 10.6 ms for write */ |
3846 | if (time_after(jiffies, start + HZ/4)) { | 4026 | if (time_after(jiffies, start + HZ/4)) { |
3847 | dev_err(&hw->pdev->dev, PFX "VPD cycle timed out"); | 4027 | dev_err(&hw->pdev->dev, "VPD cycle timed out\n"); |
3848 | return -ETIMEDOUT; | 4028 | return -ETIMEDOUT; |
3849 | } | 4029 | } |
3850 | mdelay(1); | 4030 | mdelay(1); |
@@ -4178,8 +4358,7 @@ static int sky2_device_event(struct notifier_block *unused, | |||
4178 | 4358 | ||
4179 | case NETDEV_GOING_DOWN: | 4359 | case NETDEV_GOING_DOWN: |
4180 | if (sky2->debugfs) { | 4360 | if (sky2->debugfs) { |
4181 | printk(KERN_DEBUG PFX "%s: remove debugfs\n", | 4361 | netdev_printk(KERN_DEBUG, dev, "remove debugfs\n"); |
4182 | dev->name); | ||
4183 | debugfs_remove(sky2->debugfs); | 4362 | debugfs_remove(sky2->debugfs); |
4184 | sky2->debugfs = NULL; | 4363 | sky2->debugfs = NULL; |
4185 | } | 4364 | } |
@@ -4332,9 +4511,7 @@ static void __devinit sky2_show_addr(struct net_device *dev) | |||
4332 | { | 4511 | { |
4333 | const struct sky2_port *sky2 = netdev_priv(dev); | 4512 | const struct sky2_port *sky2 = netdev_priv(dev); |
4334 | 4513 | ||
4335 | if (netif_msg_probe(sky2)) | 4514 | netif_info(sky2, probe, dev, "addr %pM\n", dev->dev_addr); |
4336 | printk(KERN_INFO PFX "%s: addr %pM\n", | ||
4337 | dev->name, dev->dev_addr); | ||
4338 | } | 4515 | } |
4339 | 4516 | ||
4340 | /* Handle software interrupt used during MSI test */ | 4517 | /* Handle software interrupt used during MSI test */ |
@@ -4406,9 +4583,11 @@ static const char *sky2_name(u8 chipid, char *buf, int sz) | |||
4406 | "FE+", /* 0xb8 */ | 4583 | "FE+", /* 0xb8 */ |
4407 | "Supreme", /* 0xb9 */ | 4584 | "Supreme", /* 0xb9 */ |
4408 | "UL 2", /* 0xba */ | 4585 | "UL 2", /* 0xba */ |
4586 | "Unknown", /* 0xbb */ | ||
4587 | "Optima", /* 0xbc */ | ||
4409 | }; | 4588 | }; |
4410 | 4589 | ||
4411 | if (chipid >= CHIP_ID_YUKON_XL && chipid < CHIP_ID_YUKON_UL_2) | 4590 | if (chipid >= CHIP_ID_YUKON_XL && chipid <= CHIP_ID_YUKON_OPT) |
4412 | strncpy(buf, name[chipid - CHIP_ID_YUKON_XL], sz); | 4591 | strncpy(buf, name[chipid - CHIP_ID_YUKON_XL], sz); |
4413 | else | 4592 | else |
4414 | snprintf(buf, sz, "(chip %#x)", chipid); | 4593 | snprintf(buf, sz, "(chip %#x)", chipid); |
@@ -4575,6 +4754,7 @@ static int __devinit sky2_probe(struct pci_dev *pdev, | |||
4575 | INIT_WORK(&hw->restart_work, sky2_restart); | 4754 | INIT_WORK(&hw->restart_work, sky2_restart); |
4576 | 4755 | ||
4577 | pci_set_drvdata(pdev, hw); | 4756 | pci_set_drvdata(pdev, hw); |
4757 | pdev->d3_delay = 150; | ||
4578 | 4758 | ||
4579 | return 0; | 4759 | return 0; |
4580 | 4760 | ||
@@ -4637,7 +4817,6 @@ static void __devexit sky2_remove(struct pci_dev *pdev) | |||
4637 | pci_set_drvdata(pdev, NULL); | 4817 | pci_set_drvdata(pdev, NULL); |
4638 | } | 4818 | } |
4639 | 4819 | ||
4640 | #ifdef CONFIG_PM | ||
4641 | static int sky2_suspend(struct pci_dev *pdev, pm_message_t state) | 4820 | static int sky2_suspend(struct pci_dev *pdev, pm_message_t state) |
4642 | { | 4821 | { |
4643 | struct sky2_hw *hw = pci_get_drvdata(pdev); | 4822 | struct sky2_hw *hw = pci_get_drvdata(pdev); |
@@ -4662,6 +4841,8 @@ static int sky2_suspend(struct pci_dev *pdev, pm_message_t state) | |||
4662 | wol |= sky2->wol; | 4841 | wol |= sky2->wol; |
4663 | } | 4842 | } |
4664 | 4843 | ||
4844 | device_set_wakeup_enable(&pdev->dev, wol != 0); | ||
4845 | |||
4665 | sky2_write32(hw, B0_IMSK, 0); | 4846 | sky2_write32(hw, B0_IMSK, 0); |
4666 | napi_disable(&hw->napi); | 4847 | napi_disable(&hw->napi); |
4667 | sky2_power_aux(hw); | 4848 | sky2_power_aux(hw); |
@@ -4674,6 +4855,7 @@ static int sky2_suspend(struct pci_dev *pdev, pm_message_t state) | |||
4674 | return 0; | 4855 | return 0; |
4675 | } | 4856 | } |
4676 | 4857 | ||
4858 | #ifdef CONFIG_PM | ||
4677 | static int sky2_resume(struct pci_dev *pdev) | 4859 | static int sky2_resume(struct pci_dev *pdev) |
4678 | { | 4860 | { |
4679 | struct sky2_hw *hw = pci_get_drvdata(pdev); | 4861 | struct sky2_hw *hw = pci_get_drvdata(pdev); |
@@ -4682,6 +4864,7 @@ static int sky2_resume(struct pci_dev *pdev) | |||
4682 | if (!hw) | 4864 | if (!hw) |
4683 | return 0; | 4865 | return 0; |
4684 | 4866 | ||
4867 | rtnl_lock(); | ||
4685 | err = pci_set_power_state(pdev, PCI_D0); | 4868 | err = pci_set_power_state(pdev, PCI_D0); |
4686 | if (err) | 4869 | if (err) |
4687 | goto out; | 4870 | goto out; |
@@ -4693,16 +4876,16 @@ static int sky2_resume(struct pci_dev *pdev) | |||
4693 | pci_enable_wake(pdev, PCI_D0, 0); | 4876 | pci_enable_wake(pdev, PCI_D0, 0); |
4694 | 4877 | ||
4695 | /* Re-enable all clocks */ | 4878 | /* Re-enable all clocks */ |
4696 | if (hw->chip_id == CHIP_ID_YUKON_EX || | 4879 | err = pci_write_config_dword(pdev, PCI_DEV_REG3, 0); |
4697 | hw->chip_id == CHIP_ID_YUKON_EC_U || | 4880 | if (err) { |
4698 | hw->chip_id == CHIP_ID_YUKON_FE_P) | 4881 | dev_err(&pdev->dev, "PCI write config failed\n"); |
4699 | sky2_pci_write32(hw, PCI_DEV_REG3, 0); | 4882 | goto out; |
4883 | } | ||
4700 | 4884 | ||
4701 | sky2_reset(hw); | 4885 | sky2_reset(hw); |
4702 | sky2_write32(hw, B0_IMSK, Y2_IS_BASE); | 4886 | sky2_write32(hw, B0_IMSK, Y2_IS_BASE); |
4703 | napi_enable(&hw->napi); | 4887 | napi_enable(&hw->napi); |
4704 | 4888 | ||
4705 | rtnl_lock(); | ||
4706 | for (i = 0; i < hw->ports; i++) { | 4889 | for (i = 0; i < hw->ports; i++) { |
4707 | err = sky2_reattach(hw->dev[i]); | 4890 | err = sky2_reattach(hw->dev[i]); |
4708 | if (err) | 4891 | if (err) |
@@ -4722,34 +4905,7 @@ out: | |||
4722 | 4905 | ||
4723 | static void sky2_shutdown(struct pci_dev *pdev) | 4906 | static void sky2_shutdown(struct pci_dev *pdev) |
4724 | { | 4907 | { |
4725 | struct sky2_hw *hw = pci_get_drvdata(pdev); | 4908 | sky2_suspend(pdev, PMSG_SUSPEND); |
4726 | int i, wol = 0; | ||
4727 | |||
4728 | if (!hw) | ||
4729 | return; | ||
4730 | |||
4731 | rtnl_lock(); | ||
4732 | del_timer_sync(&hw->watchdog_timer); | ||
4733 | |||
4734 | for (i = 0; i < hw->ports; i++) { | ||
4735 | struct net_device *dev = hw->dev[i]; | ||
4736 | struct sky2_port *sky2 = netdev_priv(dev); | ||
4737 | |||
4738 | if (sky2->wol) { | ||
4739 | wol = 1; | ||
4740 | sky2_wol_init(sky2); | ||
4741 | } | ||
4742 | } | ||
4743 | |||
4744 | if (wol) | ||
4745 | sky2_power_aux(hw); | ||
4746 | rtnl_unlock(); | ||
4747 | |||
4748 | pci_enable_wake(pdev, PCI_D3hot, wol); | ||
4749 | pci_enable_wake(pdev, PCI_D3cold, wol); | ||
4750 | |||
4751 | pci_disable_device(pdev); | ||
4752 | pci_set_power_state(pdev, PCI_D3hot); | ||
4753 | } | 4909 | } |
4754 | 4910 | ||
4755 | static struct pci_driver sky2_driver = { | 4911 | static struct pci_driver sky2_driver = { |
@@ -4766,7 +4922,7 @@ static struct pci_driver sky2_driver = { | |||
4766 | 4922 | ||
4767 | static int __init sky2_init_module(void) | 4923 | static int __init sky2_init_module(void) |
4768 | { | 4924 | { |
4769 | pr_info(PFX "driver version " DRV_VERSION "\n"); | 4925 | pr_info("driver version " DRV_VERSION "\n"); |
4770 | 4926 | ||
4771 | sky2_debug_init(); | 4927 | sky2_debug_init(); |
4772 | return pci_register_driver(&sky2_driver); | 4928 | return pci_register_driver(&sky2_driver); |