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-rw-r--r--drivers/net/sfc/falcon.c374
1 files changed, 142 insertions, 232 deletions
diff --git a/drivers/net/sfc/falcon.c b/drivers/net/sfc/falcon.c
index 4f9d33f3cca1..60176e873d62 100644
--- a/drivers/net/sfc/falcon.c
+++ b/drivers/net/sfc/falcon.c
@@ -1,7 +1,7 @@
1/**************************************************************************** 1/****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards 2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd. 3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2006-2009 Solarflare Communications Inc. 4 * Copyright 2006-2010 Solarflare Communications Inc.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published 7 * under the terms of the GNU General Public License version 2 as published
@@ -24,7 +24,6 @@
24#include "nic.h" 24#include "nic.h"
25#include "regs.h" 25#include "regs.h"
26#include "io.h" 26#include "io.h"
27#include "mdio_10g.h"
28#include "phy.h" 27#include "phy.h"
29#include "workarounds.h" 28#include "workarounds.h"
30 29
@@ -159,7 +158,6 @@ irqreturn_t falcon_legacy_interrupt_a1(int irq, void *dev_id)
159{ 158{
160 struct efx_nic *efx = dev_id; 159 struct efx_nic *efx = dev_id;
161 efx_oword_t *int_ker = efx->irq_status.addr; 160 efx_oword_t *int_ker = efx->irq_status.addr;
162 struct efx_channel *channel;
163 int syserr; 161 int syserr;
164 int queues; 162 int queues;
165 163
@@ -194,15 +192,10 @@ irqreturn_t falcon_legacy_interrupt_a1(int irq, void *dev_id)
194 wmb(); /* Ensure the vector is cleared before interrupt ack */ 192 wmb(); /* Ensure the vector is cleared before interrupt ack */
195 falcon_irq_ack_a1(efx); 193 falcon_irq_ack_a1(efx);
196 194
197 /* Schedule processing of any interrupting queues */ 195 if (queues & 1)
198 channel = &efx->channel[0]; 196 efx_schedule_channel(efx_get_channel(efx, 0));
199 while (queues) { 197 if (queues & 2)
200 if (queues & 0x01) 198 efx_schedule_channel(efx_get_channel(efx, 1));
201 efx_schedule_channel(channel);
202 channel++;
203 queues >>= 1;
204 }
205
206 return IRQ_HANDLED; 199 return IRQ_HANDLED;
207} 200}
208/************************************************************************** 201/**************************************************************************
@@ -261,7 +254,6 @@ int falcon_spi_cmd(struct efx_nic *efx, const struct efx_spi_device *spi,
261 /* Input validation */ 254 /* Input validation */
262 if (len > FALCON_SPI_MAX_LEN) 255 if (len > FALCON_SPI_MAX_LEN)
263 return -EINVAL; 256 return -EINVAL;
264 BUG_ON(!mutex_is_locked(&efx->spi_lock));
265 257
266 /* Check that previous command is not still running */ 258 /* Check that previous command is not still running */
267 rc = falcon_spi_poll(efx); 259 rc = falcon_spi_poll(efx);
@@ -452,30 +444,19 @@ static void falcon_reset_macs(struct efx_nic *efx)
452 /* It's not safe to use GLB_CTL_REG to reset the 444 /* It's not safe to use GLB_CTL_REG to reset the
453 * macs, so instead use the internal MAC resets 445 * macs, so instead use the internal MAC resets
454 */ 446 */
455 if (!EFX_IS10G(efx)) { 447 EFX_POPULATE_OWORD_1(reg, FRF_AB_XM_CORE_RST, 1);
456 EFX_POPULATE_OWORD_1(reg, FRF_AB_GM_SW_RST, 1); 448 efx_writeo(efx, &reg, FR_AB_XM_GLB_CFG);
457 efx_writeo(efx, &reg, FR_AB_GM_CFG1); 449
458 udelay(1000); 450 for (count = 0; count < 10000; count++) {
459 451 efx_reado(efx, &reg, FR_AB_XM_GLB_CFG);
460 EFX_POPULATE_OWORD_1(reg, FRF_AB_GM_SW_RST, 0); 452 if (EFX_OWORD_FIELD(reg, FRF_AB_XM_CORE_RST) ==
461 efx_writeo(efx, &reg, FR_AB_GM_CFG1); 453 0)
462 udelay(1000); 454 return;
463 return; 455 udelay(10);
464 } else {
465 EFX_POPULATE_OWORD_1(reg, FRF_AB_XM_CORE_RST, 1);
466 efx_writeo(efx, &reg, FR_AB_XM_GLB_CFG);
467
468 for (count = 0; count < 10000; count++) {
469 efx_reado(efx, &reg, FR_AB_XM_GLB_CFG);
470 if (EFX_OWORD_FIELD(reg, FRF_AB_XM_CORE_RST) ==
471 0)
472 return;
473 udelay(10);
474 }
475
476 netif_err(efx, hw, efx->net_dev,
477 "timed out waiting for XMAC core reset\n");
478 } 456 }
457
458 netif_err(efx, hw, efx->net_dev,
459 "timed out waiting for XMAC core reset\n");
479 } 460 }
480 461
481 /* Mac stats will fail whist the TX fifo is draining */ 462 /* Mac stats will fail whist the TX fifo is draining */
@@ -514,7 +495,6 @@ static void falcon_reset_macs(struct efx_nic *efx)
514 * are re-enabled by the caller */ 495 * are re-enabled by the caller */
515 efx_writeo(efx, &mac_ctrl, FR_AB_MAC_CTRL); 496 efx_writeo(efx, &mac_ctrl, FR_AB_MAC_CTRL);
516 497
517 /* This can run even when the GMAC is selected */
518 falcon_setup_xaui(efx); 498 falcon_setup_xaui(efx);
519} 499}
520 500
@@ -652,8 +632,6 @@ static void falcon_stats_timer_func(unsigned long context)
652 spin_unlock(&efx->stats_lock); 632 spin_unlock(&efx->stats_lock);
653} 633}
654 634
655static void falcon_switch_mac(struct efx_nic *efx);
656
657static bool falcon_loopback_link_poll(struct efx_nic *efx) 635static bool falcon_loopback_link_poll(struct efx_nic *efx)
658{ 636{
659 struct efx_link_state old_state = efx->link_state; 637 struct efx_link_state old_state = efx->link_state;
@@ -664,11 +642,7 @@ static bool falcon_loopback_link_poll(struct efx_nic *efx)
664 efx->link_state.fd = true; 642 efx->link_state.fd = true;
665 efx->link_state.fc = efx->wanted_fc; 643 efx->link_state.fc = efx->wanted_fc;
666 efx->link_state.up = true; 644 efx->link_state.up = true;
667 645 efx->link_state.speed = 10000;
668 if (efx->loopback_mode == LOOPBACK_GMAC)
669 efx->link_state.speed = 1000;
670 else
671 efx->link_state.speed = 10000;
672 646
673 return !efx_link_state_equal(&efx->link_state, &old_state); 647 return !efx_link_state_equal(&efx->link_state, &old_state);
674} 648}
@@ -691,7 +665,7 @@ static int falcon_reconfigure_port(struct efx_nic *efx)
691 falcon_stop_nic_stats(efx); 665 falcon_stop_nic_stats(efx);
692 falcon_deconfigure_mac_wrapper(efx); 666 falcon_deconfigure_mac_wrapper(efx);
693 667
694 falcon_switch_mac(efx); 668 falcon_reset_macs(efx);
695 669
696 efx->phy_op->reconfigure(efx); 670 efx->phy_op->reconfigure(efx);
697 rc = efx->mac_op->reconfigure(efx); 671 rc = efx->mac_op->reconfigure(efx);
@@ -718,7 +692,7 @@ static int falcon_gmii_wait(struct efx_nic *efx)
718 efx_oword_t md_stat; 692 efx_oword_t md_stat;
719 int count; 693 int count;
720 694
721 /* wait upto 50ms - taken max from datasheet */ 695 /* wait up to 50ms - taken max from datasheet */
722 for (count = 0; count < 5000; count++) { 696 for (count = 0; count < 5000; count++) {
723 efx_reado(efx, &md_stat, FR_AB_MD_STAT); 697 efx_reado(efx, &md_stat, FR_AB_MD_STAT);
724 if (EFX_OWORD_FIELD(md_stat, FRF_AB_MD_BSY) == 0) { 698 if (EFX_OWORD_FIELD(md_stat, FRF_AB_MD_BSY) == 0) {
@@ -743,6 +717,7 @@ static int falcon_mdio_write(struct net_device *net_dev,
743 int prtad, int devad, u16 addr, u16 value) 717 int prtad, int devad, u16 addr, u16 value)
744{ 718{
745 struct efx_nic *efx = netdev_priv(net_dev); 719 struct efx_nic *efx = netdev_priv(net_dev);
720 struct falcon_nic_data *nic_data = efx->nic_data;
746 efx_oword_t reg; 721 efx_oword_t reg;
747 int rc; 722 int rc;
748 723
@@ -750,7 +725,7 @@ static int falcon_mdio_write(struct net_device *net_dev,
750 "writing MDIO %d register %d.%d with 0x%04x\n", 725 "writing MDIO %d register %d.%d with 0x%04x\n",
751 prtad, devad, addr, value); 726 prtad, devad, addr, value);
752 727
753 mutex_lock(&efx->mdio_lock); 728 mutex_lock(&nic_data->mdio_lock);
754 729
755 /* Check MDIO not currently being accessed */ 730 /* Check MDIO not currently being accessed */
756 rc = falcon_gmii_wait(efx); 731 rc = falcon_gmii_wait(efx);
@@ -786,7 +761,7 @@ static int falcon_mdio_write(struct net_device *net_dev,
786 } 761 }
787 762
788out: 763out:
789 mutex_unlock(&efx->mdio_lock); 764 mutex_unlock(&nic_data->mdio_lock);
790 return rc; 765 return rc;
791} 766}
792 767
@@ -795,10 +770,11 @@ static int falcon_mdio_read(struct net_device *net_dev,
795 int prtad, int devad, u16 addr) 770 int prtad, int devad, u16 addr)
796{ 771{
797 struct efx_nic *efx = netdev_priv(net_dev); 772 struct efx_nic *efx = netdev_priv(net_dev);
773 struct falcon_nic_data *nic_data = efx->nic_data;
798 efx_oword_t reg; 774 efx_oword_t reg;
799 int rc; 775 int rc;
800 776
801 mutex_lock(&efx->mdio_lock); 777 mutex_lock(&nic_data->mdio_lock);
802 778
803 /* Check MDIO not currently being accessed */ 779 /* Check MDIO not currently being accessed */
804 rc = falcon_gmii_wait(efx); 780 rc = falcon_gmii_wait(efx);
@@ -837,77 +813,27 @@ static int falcon_mdio_read(struct net_device *net_dev,
837 } 813 }
838 814
839out: 815out:
840 mutex_unlock(&efx->mdio_lock); 816 mutex_unlock(&nic_data->mdio_lock);
841 return rc; 817 return rc;
842} 818}
843 819
844static void falcon_clock_mac(struct efx_nic *efx)
845{
846 unsigned strap_val;
847 efx_oword_t nic_stat;
848
849 /* Configure the NIC generated MAC clock correctly */
850 efx_reado(efx, &nic_stat, FR_AB_NIC_STAT);
851 strap_val = EFX_IS10G(efx) ? 5 : 3;
852 if (efx_nic_rev(efx) >= EFX_REV_FALCON_B0) {
853 EFX_SET_OWORD_FIELD(nic_stat, FRF_BB_EE_STRAP_EN, 1);
854 EFX_SET_OWORD_FIELD(nic_stat, FRF_BB_EE_STRAP, strap_val);
855 efx_writeo(efx, &nic_stat, FR_AB_NIC_STAT);
856 } else {
857 /* Falcon A1 does not support 1G/10G speed switching
858 * and must not be used with a PHY that does. */
859 BUG_ON(EFX_OWORD_FIELD(nic_stat, FRF_AB_STRAP_PINS) !=
860 strap_val);
861 }
862}
863
864static void falcon_switch_mac(struct efx_nic *efx)
865{
866 struct efx_mac_operations *old_mac_op = efx->mac_op;
867 struct falcon_nic_data *nic_data = efx->nic_data;
868 unsigned int stats_done_offset;
869
870 WARN_ON(!mutex_is_locked(&efx->mac_lock));
871 WARN_ON(nic_data->stats_disable_count == 0);
872
873 efx->mac_op = (EFX_IS10G(efx) ?
874 &falcon_xmac_operations : &falcon_gmac_operations);
875
876 if (EFX_IS10G(efx))
877 stats_done_offset = XgDmaDone_offset;
878 else
879 stats_done_offset = GDmaDone_offset;
880 nic_data->stats_dma_done = efx->stats_buffer.addr + stats_done_offset;
881
882 if (old_mac_op == efx->mac_op)
883 return;
884
885 falcon_clock_mac(efx);
886
887 netif_dbg(efx, hw, efx->net_dev, "selected %cMAC\n",
888 EFX_IS10G(efx) ? 'X' : 'G');
889 /* Not all macs support a mac-level link state */
890 efx->xmac_poll_required = false;
891 falcon_reset_macs(efx);
892}
893
894/* This call is responsible for hooking in the MAC and PHY operations */ 820/* This call is responsible for hooking in the MAC and PHY operations */
895static int falcon_probe_port(struct efx_nic *efx) 821static int falcon_probe_port(struct efx_nic *efx)
896{ 822{
823 struct falcon_nic_data *nic_data = efx->nic_data;
897 int rc; 824 int rc;
898 825
899 switch (efx->phy_type) { 826 switch (efx->phy_type) {
900 case PHY_TYPE_SFX7101: 827 case PHY_TYPE_SFX7101:
901 efx->phy_op = &falcon_sfx7101_phy_ops; 828 efx->phy_op = &falcon_sfx7101_phy_ops;
902 break; 829 break;
903 case PHY_TYPE_SFT9001A:
904 case PHY_TYPE_SFT9001B:
905 efx->phy_op = &falcon_sft9001_phy_ops;
906 break;
907 case PHY_TYPE_QT2022C2: 830 case PHY_TYPE_QT2022C2:
908 case PHY_TYPE_QT2025C: 831 case PHY_TYPE_QT2025C:
909 efx->phy_op = &falcon_qt202x_phy_ops; 832 efx->phy_op = &falcon_qt202x_phy_ops;
910 break; 833 break;
834 case PHY_TYPE_TXC43128:
835 efx->phy_op = &falcon_txc_phy_ops;
836 break;
911 default: 837 default:
912 netif_err(efx, probe, efx->net_dev, "Unknown PHY type %d\n", 838 netif_err(efx, probe, efx->net_dev, "Unknown PHY type %d\n",
913 efx->phy_type); 839 efx->phy_type);
@@ -915,6 +841,7 @@ static int falcon_probe_port(struct efx_nic *efx)
915 } 841 }
916 842
917 /* Fill out MDIO structure and loopback modes */ 843 /* Fill out MDIO structure and loopback modes */
844 mutex_init(&nic_data->mdio_lock);
918 efx->mdio.mdio_read = falcon_mdio_read; 845 efx->mdio.mdio_read = falcon_mdio_read;
919 efx->mdio.mdio_write = falcon_mdio_write; 846 efx->mdio.mdio_write = falcon_mdio_write;
920 rc = efx->phy_op->probe(efx); 847 rc = efx->phy_op->probe(efx);
@@ -943,6 +870,7 @@ static int falcon_probe_port(struct efx_nic *efx)
943 (u64)efx->stats_buffer.dma_addr, 870 (u64)efx->stats_buffer.dma_addr,
944 efx->stats_buffer.addr, 871 efx->stats_buffer.addr,
945 (u64)virt_to_phys(efx->stats_buffer.addr)); 872 (u64)virt_to_phys(efx->stats_buffer.addr));
873 nic_data->stats_dma_done = efx->stats_buffer.addr + XgDmaDone_offset;
946 874
947 return 0; 875 return 0;
948} 876}
@@ -953,6 +881,41 @@ static void falcon_remove_port(struct efx_nic *efx)
953 efx_nic_free_buffer(efx, &efx->stats_buffer); 881 efx_nic_free_buffer(efx, &efx->stats_buffer);
954} 882}
955 883
884/* Global events are basically PHY events */
885static bool
886falcon_handle_global_event(struct efx_channel *channel, efx_qword_t *event)
887{
888 struct efx_nic *efx = channel->efx;
889 struct falcon_nic_data *nic_data = efx->nic_data;
890
891 if (EFX_QWORD_FIELD(*event, FSF_AB_GLB_EV_G_PHY0_INTR) ||
892 EFX_QWORD_FIELD(*event, FSF_AB_GLB_EV_XG_PHY0_INTR) ||
893 EFX_QWORD_FIELD(*event, FSF_AB_GLB_EV_XFP_PHY0_INTR))
894 /* Ignored */
895 return true;
896
897 if ((efx_nic_rev(efx) == EFX_REV_FALCON_B0) &&
898 EFX_QWORD_FIELD(*event, FSF_BB_GLB_EV_XG_MGT_INTR)) {
899 nic_data->xmac_poll_required = true;
900 return true;
901 }
902
903 if (efx_nic_rev(efx) <= EFX_REV_FALCON_A1 ?
904 EFX_QWORD_FIELD(*event, FSF_AA_GLB_EV_RX_RECOVERY) :
905 EFX_QWORD_FIELD(*event, FSF_BB_GLB_EV_RX_RECOVERY)) {
906 netif_err(efx, rx_err, efx->net_dev,
907 "channel %d seen global RX_RESET event. Resetting.\n",
908 channel->channel);
909
910 atomic_inc(&efx->rx_reset);
911 efx_schedule_reset(efx, EFX_WORKAROUND_6555(efx) ?
912 RESET_TYPE_RX_RECOVERY : RESET_TYPE_DISABLE);
913 return true;
914 }
915
916 return false;
917}
918
956/************************************************************************** 919/**************************************************************************
957 * 920 *
958 * Falcon test code 921 * Falcon test code
@@ -962,6 +925,7 @@ static void falcon_remove_port(struct efx_nic *efx)
962static int 925static int
963falcon_read_nvram(struct efx_nic *efx, struct falcon_nvconfig *nvconfig_out) 926falcon_read_nvram(struct efx_nic *efx, struct falcon_nvconfig *nvconfig_out)
964{ 927{
928 struct falcon_nic_data *nic_data = efx->nic_data;
965 struct falcon_nvconfig *nvconfig; 929 struct falcon_nvconfig *nvconfig;
966 struct efx_spi_device *spi; 930 struct efx_spi_device *spi;
967 void *region; 931 void *region;
@@ -969,8 +933,11 @@ falcon_read_nvram(struct efx_nic *efx, struct falcon_nvconfig *nvconfig_out)
969 __le16 *word, *limit; 933 __le16 *word, *limit;
970 u32 csum; 934 u32 csum;
971 935
972 spi = efx->spi_flash ? efx->spi_flash : efx->spi_eeprom; 936 if (efx_spi_present(&nic_data->spi_flash))
973 if (!spi) 937 spi = &nic_data->spi_flash;
938 else if (efx_spi_present(&nic_data->spi_eeprom))
939 spi = &nic_data->spi_eeprom;
940 else
974 return -EINVAL; 941 return -EINVAL;
975 942
976 region = kmalloc(FALCON_NVCONFIG_END, GFP_KERNEL); 943 region = kmalloc(FALCON_NVCONFIG_END, GFP_KERNEL);
@@ -978,12 +945,13 @@ falcon_read_nvram(struct efx_nic *efx, struct falcon_nvconfig *nvconfig_out)
978 return -ENOMEM; 945 return -ENOMEM;
979 nvconfig = region + FALCON_NVCONFIG_OFFSET; 946 nvconfig = region + FALCON_NVCONFIG_OFFSET;
980 947
981 mutex_lock(&efx->spi_lock); 948 mutex_lock(&nic_data->spi_lock);
982 rc = falcon_spi_read(efx, spi, 0, FALCON_NVCONFIG_END, NULL, region); 949 rc = falcon_spi_read(efx, spi, 0, FALCON_NVCONFIG_END, NULL, region);
983 mutex_unlock(&efx->spi_lock); 950 mutex_unlock(&nic_data->spi_lock);
984 if (rc) { 951 if (rc) {
985 netif_err(efx, hw, efx->net_dev, "Failed to read %s\n", 952 netif_err(efx, hw, efx->net_dev, "Failed to read %s\n",
986 efx->spi_flash ? "flash" : "EEPROM"); 953 efx_spi_present(&nic_data->spi_flash) ?
954 "flash" : "EEPROM");
987 rc = -EIO; 955 rc = -EIO;
988 goto out; 956 goto out;
989 } 957 }
@@ -1085,7 +1053,7 @@ static int falcon_b0_test_registers(struct efx_nic *efx)
1085 1053
1086/* Resets NIC to known state. This routine must be called in process 1054/* Resets NIC to known state. This routine must be called in process
1087 * context and is allowed to sleep. */ 1055 * context and is allowed to sleep. */
1088static int falcon_reset_hw(struct efx_nic *efx, enum reset_type method) 1056static int __falcon_reset_hw(struct efx_nic *efx, enum reset_type method)
1089{ 1057{
1090 struct falcon_nic_data *nic_data = efx->nic_data; 1058 struct falcon_nic_data *nic_data = efx->nic_data;
1091 efx_oword_t glb_ctl_reg_ker; 1059 efx_oword_t glb_ctl_reg_ker;
@@ -1139,22 +1107,9 @@ static int falcon_reset_hw(struct efx_nic *efx, enum reset_type method)
1139 1107
1140 /* Restore PCI configuration if needed */ 1108 /* Restore PCI configuration if needed */
1141 if (method == RESET_TYPE_WORLD) { 1109 if (method == RESET_TYPE_WORLD) {
1142 if (efx_nic_is_dual_func(efx)) { 1110 if (efx_nic_is_dual_func(efx))
1143 rc = pci_restore_state(nic_data->pci_dev2); 1111 pci_restore_state(nic_data->pci_dev2);
1144 if (rc) { 1112 pci_restore_state(efx->pci_dev);
1145 netif_err(efx, drv, efx->net_dev,
1146 "failed to restore PCI config for "
1147 "the secondary function\n");
1148 goto fail3;
1149 }
1150 }
1151 rc = pci_restore_state(efx->pci_dev);
1152 if (rc) {
1153 netif_err(efx, drv, efx->net_dev,
1154 "failed to restore PCI config for the "
1155 "primary function\n");
1156 goto fail4;
1157 }
1158 netif_dbg(efx, drv, efx->net_dev, 1113 netif_dbg(efx, drv, efx->net_dev,
1159 "successfully restored PCI config\n"); 1114 "successfully restored PCI config\n");
1160 } 1115 }
@@ -1165,7 +1120,7 @@ static int falcon_reset_hw(struct efx_nic *efx, enum reset_type method)
1165 rc = -ETIMEDOUT; 1120 rc = -ETIMEDOUT;
1166 netif_err(efx, hw, efx->net_dev, 1121 netif_err(efx, hw, efx->net_dev,
1167 "timed out waiting for hardware reset\n"); 1122 "timed out waiting for hardware reset\n");
1168 goto fail5; 1123 goto fail3;
1169 } 1124 }
1170 netif_dbg(efx, hw, efx->net_dev, "hardware reset complete\n"); 1125 netif_dbg(efx, hw, efx->net_dev, "hardware reset complete\n");
1171 1126
@@ -1173,11 +1128,21 @@ static int falcon_reset_hw(struct efx_nic *efx, enum reset_type method)
1173 1128
1174 /* pci_save_state() and pci_restore_state() MUST be called in pairs */ 1129 /* pci_save_state() and pci_restore_state() MUST be called in pairs */
1175fail2: 1130fail2:
1176fail3:
1177 pci_restore_state(efx->pci_dev); 1131 pci_restore_state(efx->pci_dev);
1178fail1: 1132fail1:
1179fail4: 1133fail3:
1180fail5: 1134 return rc;
1135}
1136
1137static int falcon_reset_hw(struct efx_nic *efx, enum reset_type method)
1138{
1139 struct falcon_nic_data *nic_data = efx->nic_data;
1140 int rc;
1141
1142 mutex_lock(&nic_data->spi_lock);
1143 rc = __falcon_reset_hw(efx, method);
1144 mutex_unlock(&nic_data->spi_lock);
1145
1181 return rc; 1146 return rc;
1182} 1147}
1183 1148
@@ -1207,7 +1172,7 @@ static void falcon_monitor(struct efx_nic *efx)
1207 falcon_stop_nic_stats(efx); 1172 falcon_stop_nic_stats(efx);
1208 falcon_deconfigure_mac_wrapper(efx); 1173 falcon_deconfigure_mac_wrapper(efx);
1209 1174
1210 falcon_switch_mac(efx); 1175 falcon_reset_macs(efx);
1211 rc = efx->mac_op->reconfigure(efx); 1176 rc = efx->mac_op->reconfigure(efx);
1212 BUG_ON(rc); 1177 BUG_ON(rc);
1213 1178
@@ -1216,8 +1181,7 @@ static void falcon_monitor(struct efx_nic *efx)
1216 efx_link_status_changed(efx); 1181 efx_link_status_changed(efx);
1217 } 1182 }
1218 1183
1219 if (EFX_IS10G(efx)) 1184 falcon_poll_xmac(efx);
1220 falcon_poll_xmac(efx);
1221} 1185}
1222 1186
1223/* Zeroes out the SRAM contents. This routine must be called in 1187/* Zeroes out the SRAM contents. This routine must be called in
@@ -1257,22 +1221,17 @@ static int falcon_reset_sram(struct efx_nic *efx)
1257 1221
1258 return 0; 1222 return 0;
1259 } 1223 }
1260 } while (++count < 20); /* wait upto 0.4 sec */ 1224 } while (++count < 20); /* wait up to 0.4 sec */
1261 1225
1262 netif_err(efx, hw, efx->net_dev, "timed out waiting for SRAM reset\n"); 1226 netif_err(efx, hw, efx->net_dev, "timed out waiting for SRAM reset\n");
1263 return -ETIMEDOUT; 1227 return -ETIMEDOUT;
1264} 1228}
1265 1229
1266static int falcon_spi_device_init(struct efx_nic *efx, 1230static void falcon_spi_device_init(struct efx_nic *efx,
1267 struct efx_spi_device **spi_device_ret, 1231 struct efx_spi_device *spi_device,
1268 unsigned int device_id, u32 device_type) 1232 unsigned int device_id, u32 device_type)
1269{ 1233{
1270 struct efx_spi_device *spi_device;
1271
1272 if (device_type != 0) { 1234 if (device_type != 0) {
1273 spi_device = kzalloc(sizeof(*spi_device), GFP_KERNEL);
1274 if (!spi_device)
1275 return -ENOMEM;
1276 spi_device->device_id = device_id; 1235 spi_device->device_id = device_id;
1277 spi_device->size = 1236 spi_device->size =
1278 1 << SPI_DEV_TYPE_FIELD(device_type, SPI_DEV_TYPE_SIZE); 1237 1 << SPI_DEV_TYPE_FIELD(device_type, SPI_DEV_TYPE_SIZE);
@@ -1289,27 +1248,15 @@ static int falcon_spi_device_init(struct efx_nic *efx,
1289 1 << SPI_DEV_TYPE_FIELD(device_type, 1248 1 << SPI_DEV_TYPE_FIELD(device_type,
1290 SPI_DEV_TYPE_BLOCK_SIZE); 1249 SPI_DEV_TYPE_BLOCK_SIZE);
1291 } else { 1250 } else {
1292 spi_device = NULL; 1251 spi_device->size = 0;
1293 } 1252 }
1294
1295 kfree(*spi_device_ret);
1296 *spi_device_ret = spi_device;
1297 return 0;
1298}
1299
1300static void falcon_remove_spi_devices(struct efx_nic *efx)
1301{
1302 kfree(efx->spi_eeprom);
1303 efx->spi_eeprom = NULL;
1304 kfree(efx->spi_flash);
1305 efx->spi_flash = NULL;
1306} 1253}
1307 1254
1308/* Extract non-volatile configuration */ 1255/* Extract non-volatile configuration */
1309static int falcon_probe_nvconfig(struct efx_nic *efx) 1256static int falcon_probe_nvconfig(struct efx_nic *efx)
1310{ 1257{
1258 struct falcon_nic_data *nic_data = efx->nic_data;
1311 struct falcon_nvconfig *nvconfig; 1259 struct falcon_nvconfig *nvconfig;
1312 int board_rev;
1313 int rc; 1260 int rc;
1314 1261
1315 nvconfig = kmalloc(sizeof(*nvconfig), GFP_KERNEL); 1262 nvconfig = kmalloc(sizeof(*nvconfig), GFP_KERNEL);
@@ -1317,55 +1264,32 @@ static int falcon_probe_nvconfig(struct efx_nic *efx)
1317 return -ENOMEM; 1264 return -ENOMEM;
1318 1265
1319 rc = falcon_read_nvram(efx, nvconfig); 1266 rc = falcon_read_nvram(efx, nvconfig);
1320 if (rc == -EINVAL) { 1267 if (rc)
1321 netif_err(efx, probe, efx->net_dev, 1268 goto out;
1322 "NVRAM is invalid therefore using defaults\n"); 1269
1323 efx->phy_type = PHY_TYPE_NONE; 1270 efx->phy_type = nvconfig->board_v2.port0_phy_type;
1324 efx->mdio.prtad = MDIO_PRTAD_NONE; 1271 efx->mdio.prtad = nvconfig->board_v2.port0_phy_addr;
1325 board_rev = 0; 1272
1326 rc = 0; 1273 if (le16_to_cpu(nvconfig->board_struct_ver) >= 3) {
1327 } else if (rc) { 1274 falcon_spi_device_init(
1328 goto fail1; 1275 efx, &nic_data->spi_flash, FFE_AB_SPI_DEVICE_FLASH,
1329 } else { 1276 le32_to_cpu(nvconfig->board_v3
1330 struct falcon_nvconfig_board_v2 *v2 = &nvconfig->board_v2; 1277 .spi_device_type[FFE_AB_SPI_DEVICE_FLASH]));
1331 struct falcon_nvconfig_board_v3 *v3 = &nvconfig->board_v3; 1278 falcon_spi_device_init(
1332 1279 efx, &nic_data->spi_eeprom, FFE_AB_SPI_DEVICE_EEPROM,
1333 efx->phy_type = v2->port0_phy_type; 1280 le32_to_cpu(nvconfig->board_v3
1334 efx->mdio.prtad = v2->port0_phy_addr; 1281 .spi_device_type[FFE_AB_SPI_DEVICE_EEPROM]));
1335 board_rev = le16_to_cpu(v2->board_revision);
1336
1337 if (le16_to_cpu(nvconfig->board_struct_ver) >= 3) {
1338 rc = falcon_spi_device_init(
1339 efx, &efx->spi_flash, FFE_AB_SPI_DEVICE_FLASH,
1340 le32_to_cpu(v3->spi_device_type
1341 [FFE_AB_SPI_DEVICE_FLASH]));
1342 if (rc)
1343 goto fail2;
1344 rc = falcon_spi_device_init(
1345 efx, &efx->spi_eeprom, FFE_AB_SPI_DEVICE_EEPROM,
1346 le32_to_cpu(v3->spi_device_type
1347 [FFE_AB_SPI_DEVICE_EEPROM]));
1348 if (rc)
1349 goto fail2;
1350 }
1351 } 1282 }
1352 1283
1353 /* Read the MAC addresses */ 1284 /* Read the MAC addresses */
1354 memcpy(efx->mac_address, nvconfig->mac_address[0], ETH_ALEN); 1285 memcpy(efx->net_dev->perm_addr, nvconfig->mac_address[0], ETH_ALEN);
1355 1286
1356 netif_dbg(efx, probe, efx->net_dev, "PHY is %d phy_id %d\n", 1287 netif_dbg(efx, probe, efx->net_dev, "PHY is %d phy_id %d\n",
1357 efx->phy_type, efx->mdio.prtad); 1288 efx->phy_type, efx->mdio.prtad);
1358 1289
1359 rc = falcon_probe_board(efx, board_rev); 1290 rc = falcon_probe_board(efx,
1360 if (rc) 1291 le16_to_cpu(nvconfig->board_v2.board_revision));
1361 goto fail2; 1292out:
1362
1363 kfree(nvconfig);
1364 return 0;
1365
1366 fail2:
1367 falcon_remove_spi_devices(efx);
1368 fail1:
1369 kfree(nvconfig); 1293 kfree(nvconfig);
1370 return rc; 1294 return rc;
1371} 1295}
@@ -1373,6 +1297,7 @@ static int falcon_probe_nvconfig(struct efx_nic *efx)
1373/* Probe all SPI devices on the NIC */ 1297/* Probe all SPI devices on the NIC */
1374static void falcon_probe_spi_devices(struct efx_nic *efx) 1298static void falcon_probe_spi_devices(struct efx_nic *efx)
1375{ 1299{
1300 struct falcon_nic_data *nic_data = efx->nic_data;
1376 efx_oword_t nic_stat, gpio_ctl, ee_vpd_cfg; 1301 efx_oword_t nic_stat, gpio_ctl, ee_vpd_cfg;
1377 int boot_dev; 1302 int boot_dev;
1378 1303
@@ -1401,12 +1326,14 @@ static void falcon_probe_spi_devices(struct efx_nic *efx)
1401 efx_writeo(efx, &ee_vpd_cfg, FR_AB_EE_VPD_CFG0); 1326 efx_writeo(efx, &ee_vpd_cfg, FR_AB_EE_VPD_CFG0);
1402 } 1327 }
1403 1328
1329 mutex_init(&nic_data->spi_lock);
1330
1404 if (boot_dev == FFE_AB_SPI_DEVICE_FLASH) 1331 if (boot_dev == FFE_AB_SPI_DEVICE_FLASH)
1405 falcon_spi_device_init(efx, &efx->spi_flash, 1332 falcon_spi_device_init(efx, &nic_data->spi_flash,
1406 FFE_AB_SPI_DEVICE_FLASH, 1333 FFE_AB_SPI_DEVICE_FLASH,
1407 default_flash_type); 1334 default_flash_type);
1408 if (boot_dev == FFE_AB_SPI_DEVICE_EEPROM) 1335 if (boot_dev == FFE_AB_SPI_DEVICE_EEPROM)
1409 falcon_spi_device_init(efx, &efx->spi_eeprom, 1336 falcon_spi_device_init(efx, &nic_data->spi_eeprom,
1410 FFE_AB_SPI_DEVICE_EEPROM, 1337 FFE_AB_SPI_DEVICE_EEPROM,
1411 large_eeprom_type); 1338 large_eeprom_type);
1412} 1339}
@@ -1471,7 +1398,7 @@ static int falcon_probe_nic(struct efx_nic *efx)
1471 } 1398 }
1472 1399
1473 /* Now we can reset the NIC */ 1400 /* Now we can reset the NIC */
1474 rc = falcon_reset_hw(efx, RESET_TYPE_ALL); 1401 rc = __falcon_reset_hw(efx, RESET_TYPE_ALL);
1475 if (rc) { 1402 if (rc) {
1476 netif_err(efx, probe, efx->net_dev, "failed to reset NIC\n"); 1403 netif_err(efx, probe, efx->net_dev, "failed to reset NIC\n");
1477 goto fail3; 1404 goto fail3;
@@ -1493,8 +1420,11 @@ static int falcon_probe_nic(struct efx_nic *efx)
1493 1420
1494 /* Read in the non-volatile configuration */ 1421 /* Read in the non-volatile configuration */
1495 rc = falcon_probe_nvconfig(efx); 1422 rc = falcon_probe_nvconfig(efx);
1496 if (rc) 1423 if (rc) {
1424 if (rc == -EINVAL)
1425 netif_err(efx, probe, efx->net_dev, "NVRAM is invalid\n");
1497 goto fail5; 1426 goto fail5;
1427 }
1498 1428
1499 /* Initialise I2C adapter */ 1429 /* Initialise I2C adapter */
1500 board = falcon_board(efx); 1430 board = falcon_board(efx);
@@ -1526,7 +1456,6 @@ static int falcon_probe_nic(struct efx_nic *efx)
1526 BUG_ON(i2c_del_adapter(&board->i2c_adap)); 1456 BUG_ON(i2c_del_adapter(&board->i2c_adap));
1527 memset(&board->i2c_adap, 0, sizeof(board->i2c_adap)); 1457 memset(&board->i2c_adap, 0, sizeof(board->i2c_adap));
1528 fail5: 1458 fail5:
1529 falcon_remove_spi_devices(efx);
1530 efx_nic_free_buffer(efx, &efx->irq_status); 1459 efx_nic_free_buffer(efx, &efx->irq_status);
1531 fail4: 1460 fail4:
1532 fail3: 1461 fail3:
@@ -1549,36 +1478,26 @@ static void falcon_init_rx_cfg(struct efx_nic *efx)
1549 /* RX control FIFO thresholds (32 entries) */ 1478 /* RX control FIFO thresholds (32 entries) */
1550 const unsigned ctrl_xon_thr = 20; 1479 const unsigned ctrl_xon_thr = 20;
1551 const unsigned ctrl_xoff_thr = 25; 1480 const unsigned ctrl_xoff_thr = 25;
1552 /* RX data FIFO thresholds (256-byte units; size varies) */
1553 int data_xon_thr = efx_nic_rx_xon_thresh >> 8;
1554 int data_xoff_thr = efx_nic_rx_xoff_thresh >> 8;
1555 efx_oword_t reg; 1481 efx_oword_t reg;
1556 1482
1557 efx_reado(efx, &reg, FR_AZ_RX_CFG); 1483 efx_reado(efx, &reg, FR_AZ_RX_CFG);
1558 if (efx_nic_rev(efx) <= EFX_REV_FALCON_A1) { 1484 if (efx_nic_rev(efx) <= EFX_REV_FALCON_A1) {
1559 /* Data FIFO size is 5.5K */ 1485 /* Data FIFO size is 5.5K */
1560 if (data_xon_thr < 0)
1561 data_xon_thr = 512 >> 8;
1562 if (data_xoff_thr < 0)
1563 data_xoff_thr = 2048 >> 8;
1564 EFX_SET_OWORD_FIELD(reg, FRF_AA_RX_DESC_PUSH_EN, 0); 1486 EFX_SET_OWORD_FIELD(reg, FRF_AA_RX_DESC_PUSH_EN, 0);
1565 EFX_SET_OWORD_FIELD(reg, FRF_AA_RX_USR_BUF_SIZE, 1487 EFX_SET_OWORD_FIELD(reg, FRF_AA_RX_USR_BUF_SIZE,
1566 huge_buf_size); 1488 huge_buf_size);
1567 EFX_SET_OWORD_FIELD(reg, FRF_AA_RX_XON_MAC_TH, data_xon_thr); 1489 EFX_SET_OWORD_FIELD(reg, FRF_AA_RX_XON_MAC_TH, 512 >> 8);
1568 EFX_SET_OWORD_FIELD(reg, FRF_AA_RX_XOFF_MAC_TH, data_xoff_thr); 1490 EFX_SET_OWORD_FIELD(reg, FRF_AA_RX_XOFF_MAC_TH, 2048 >> 8);
1569 EFX_SET_OWORD_FIELD(reg, FRF_AA_RX_XON_TX_TH, ctrl_xon_thr); 1491 EFX_SET_OWORD_FIELD(reg, FRF_AA_RX_XON_TX_TH, ctrl_xon_thr);
1570 EFX_SET_OWORD_FIELD(reg, FRF_AA_RX_XOFF_TX_TH, ctrl_xoff_thr); 1492 EFX_SET_OWORD_FIELD(reg, FRF_AA_RX_XOFF_TX_TH, ctrl_xoff_thr);
1571 } else { 1493 } else {
1572 /* Data FIFO size is 80K; register fields moved */ 1494 /* Data FIFO size is 80K; register fields moved */
1573 if (data_xon_thr < 0)
1574 data_xon_thr = 27648 >> 8; /* ~3*max MTU */
1575 if (data_xoff_thr < 0)
1576 data_xoff_thr = 54272 >> 8; /* ~80Kb - 3*max MTU */
1577 EFX_SET_OWORD_FIELD(reg, FRF_BZ_RX_DESC_PUSH_EN, 0); 1495 EFX_SET_OWORD_FIELD(reg, FRF_BZ_RX_DESC_PUSH_EN, 0);
1578 EFX_SET_OWORD_FIELD(reg, FRF_BZ_RX_USR_BUF_SIZE, 1496 EFX_SET_OWORD_FIELD(reg, FRF_BZ_RX_USR_BUF_SIZE,
1579 huge_buf_size); 1497 huge_buf_size);
1580 EFX_SET_OWORD_FIELD(reg, FRF_BZ_RX_XON_MAC_TH, data_xon_thr); 1498 /* Send XON and XOFF at ~3 * max MTU away from empty/full */
1581 EFX_SET_OWORD_FIELD(reg, FRF_BZ_RX_XOFF_MAC_TH, data_xoff_thr); 1499 EFX_SET_OWORD_FIELD(reg, FRF_BZ_RX_XON_MAC_TH, 27648 >> 8);
1500 EFX_SET_OWORD_FIELD(reg, FRF_BZ_RX_XOFF_MAC_TH, 54272 >> 8);
1582 EFX_SET_OWORD_FIELD(reg, FRF_BZ_RX_XON_TX_TH, ctrl_xon_thr); 1501 EFX_SET_OWORD_FIELD(reg, FRF_BZ_RX_XON_TX_TH, ctrl_xon_thr);
1583 EFX_SET_OWORD_FIELD(reg, FRF_BZ_RX_XOFF_TX_TH, ctrl_xoff_thr); 1502 EFX_SET_OWORD_FIELD(reg, FRF_BZ_RX_XOFF_TX_TH, ctrl_xoff_thr);
1584 EFX_SET_OWORD_FIELD(reg, FRF_BZ_RX_INGR_EN, 1); 1503 EFX_SET_OWORD_FIELD(reg, FRF_BZ_RX_INGR_EN, 1);
@@ -1610,16 +1529,6 @@ static int falcon_init_nic(struct efx_nic *efx)
1610 EFX_SET_OWORD_FIELD(temp, FRF_AB_ONCHIP_SRAM, 1); 1529 EFX_SET_OWORD_FIELD(temp, FRF_AB_ONCHIP_SRAM, 1);
1611 efx_writeo(efx, &temp, FR_AB_NIC_STAT); 1530 efx_writeo(efx, &temp, FR_AB_NIC_STAT);
1612 1531
1613 /* Set the source of the GMAC clock */
1614 if (efx_nic_rev(efx) == EFX_REV_FALCON_B0) {
1615 efx_reado(efx, &temp, FR_AB_GPIO_CTL);
1616 EFX_SET_OWORD_FIELD(temp, FRF_AB_USE_NIC_CLK, true);
1617 efx_writeo(efx, &temp, FR_AB_GPIO_CTL);
1618 }
1619
1620 /* Select the correct MAC */
1621 falcon_clock_mac(efx);
1622
1623 rc = falcon_reset_sram(efx); 1532 rc = falcon_reset_sram(efx);
1624 if (rc) 1533 if (rc)
1625 return rc; 1534 return rc;
@@ -1690,10 +1599,9 @@ static void falcon_remove_nic(struct efx_nic *efx)
1690 BUG_ON(rc); 1599 BUG_ON(rc);
1691 memset(&board->i2c_adap, 0, sizeof(board->i2c_adap)); 1600 memset(&board->i2c_adap, 0, sizeof(board->i2c_adap));
1692 1601
1693 falcon_remove_spi_devices(efx);
1694 efx_nic_free_buffer(efx, &efx->irq_status); 1602 efx_nic_free_buffer(efx, &efx->irq_status);
1695 1603
1696 falcon_reset_hw(efx, RESET_TYPE_ALL); 1604 __falcon_reset_hw(efx, RESET_TYPE_ALL);
1697 1605
1698 /* Release the second function after the reset */ 1606 /* Release the second function after the reset */
1699 if (nic_data->pci_dev2) { 1607 if (nic_data->pci_dev2) {
@@ -1795,7 +1703,7 @@ static int falcon_set_wol(struct efx_nic *efx, u32 type)
1795 ************************************************************************** 1703 **************************************************************************
1796 */ 1704 */
1797 1705
1798struct efx_nic_type falcon_a1_nic_type = { 1706const struct efx_nic_type falcon_a1_nic_type = {
1799 .probe = falcon_probe_nic, 1707 .probe = falcon_probe_nic,
1800 .remove = falcon_remove_nic, 1708 .remove = falcon_remove_nic,
1801 .init = falcon_init_nic, 1709 .init = falcon_init_nic,
@@ -1804,6 +1712,7 @@ struct efx_nic_type falcon_a1_nic_type = {
1804 .reset = falcon_reset_hw, 1712 .reset = falcon_reset_hw,
1805 .probe_port = falcon_probe_port, 1713 .probe_port = falcon_probe_port,
1806 .remove_port = falcon_remove_port, 1714 .remove_port = falcon_remove_port,
1715 .handle_global_event = falcon_handle_global_event,
1807 .prepare_flush = falcon_prepare_flush, 1716 .prepare_flush = falcon_prepare_flush,
1808 .update_stats = falcon_update_nic_stats, 1717 .update_stats = falcon_update_nic_stats,
1809 .start_stats = falcon_start_nic_stats, 1718 .start_stats = falcon_start_nic_stats,
@@ -1835,7 +1744,7 @@ struct efx_nic_type falcon_a1_nic_type = {
1835 .reset_world_flags = ETH_RESET_IRQ, 1744 .reset_world_flags = ETH_RESET_IRQ,
1836}; 1745};
1837 1746
1838struct efx_nic_type falcon_b0_nic_type = { 1747const struct efx_nic_type falcon_b0_nic_type = {
1839 .probe = falcon_probe_nic, 1748 .probe = falcon_probe_nic,
1840 .remove = falcon_remove_nic, 1749 .remove = falcon_remove_nic,
1841 .init = falcon_init_nic, 1750 .init = falcon_init_nic,
@@ -1844,6 +1753,7 @@ struct efx_nic_type falcon_b0_nic_type = {
1844 .reset = falcon_reset_hw, 1753 .reset = falcon_reset_hw,
1845 .probe_port = falcon_probe_port, 1754 .probe_port = falcon_probe_port,
1846 .remove_port = falcon_remove_port, 1755 .remove_port = falcon_remove_port,
1756 .handle_global_event = falcon_handle_global_event,
1847 .prepare_flush = falcon_prepare_flush, 1757 .prepare_flush = falcon_prepare_flush,
1848 .update_stats = falcon_update_nic_stats, 1758 .update_stats = falcon_update_nic_stats,
1849 .start_stats = falcon_start_nic_stats, 1759 .start_stats = falcon_start_nic_stats,
@@ -1880,7 +1790,7 @@ struct efx_nic_type falcon_b0_nic_type = {
1880 * channels */ 1790 * channels */
1881 .tx_dc_base = 0x130000, 1791 .tx_dc_base = 0x130000,
1882 .rx_dc_base = 0x100000, 1792 .rx_dc_base = 0x100000,
1883 .offload_features = NETIF_F_IP_CSUM | NETIF_F_RXHASH, 1793 .offload_features = NETIF_F_IP_CSUM | NETIF_F_RXHASH | NETIF_F_NTUPLE,
1884 .reset_world_flags = ETH_RESET_IRQ, 1794 .reset_world_flags = ETH_RESET_IRQ,
1885}; 1795};
1886 1796