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path: root/drivers/net/sfc/efx.c
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Diffstat (limited to 'drivers/net/sfc/efx.c')
-rw-r--r--drivers/net/sfc/efx.c24
1 files changed, 20 insertions, 4 deletions
diff --git a/drivers/net/sfc/efx.c b/drivers/net/sfc/efx.c
index b8bd936374f2..a3c2aab53de8 100644
--- a/drivers/net/sfc/efx.c
+++ b/drivers/net/sfc/efx.c
@@ -328,7 +328,8 @@ static int efx_poll(struct napi_struct *napi, int budget)
328 * processing to finish, then directly poll (and ack ) the eventq. 328 * processing to finish, then directly poll (and ack ) the eventq.
329 * Finally reenable NAPI and interrupts. 329 * Finally reenable NAPI and interrupts.
330 * 330 *
331 * Since we are touching interrupts the caller should hold the suspend lock 331 * This is for use only during a loopback self-test. It must not
332 * deliver any packets up the stack as this can result in deadlock.
332 */ 333 */
333void efx_process_channel_now(struct efx_channel *channel) 334void efx_process_channel_now(struct efx_channel *channel)
334{ 335{
@@ -336,6 +337,7 @@ void efx_process_channel_now(struct efx_channel *channel)
336 337
337 BUG_ON(channel->channel >= efx->n_channels); 338 BUG_ON(channel->channel >= efx->n_channels);
338 BUG_ON(!channel->enabled); 339 BUG_ON(!channel->enabled);
340 BUG_ON(!efx->loopback_selftest);
339 341
340 /* Disable interrupts and wait for ISRs to complete */ 342 /* Disable interrupts and wait for ISRs to complete */
341 efx_nic_disable_interrupts(efx); 343 efx_nic_disable_interrupts(efx);
@@ -1054,6 +1056,7 @@ static int efx_init_io(struct efx_nic *efx)
1054{ 1056{
1055 struct pci_dev *pci_dev = efx->pci_dev; 1057 struct pci_dev *pci_dev = efx->pci_dev;
1056 dma_addr_t dma_mask = efx->type->max_dma_mask; 1058 dma_addr_t dma_mask = efx->type->max_dma_mask;
1059 bool use_wc;
1057 int rc; 1060 int rc;
1058 1061
1059 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n"); 1062 netif_dbg(efx, probe, efx->net_dev, "initialising I/O\n");
@@ -1104,8 +1107,21 @@ static int efx_init_io(struct efx_nic *efx)
1104 rc = -EIO; 1107 rc = -EIO;
1105 goto fail3; 1108 goto fail3;
1106 } 1109 }
1107 efx->membase = ioremap_wc(efx->membase_phys, 1110
1108 efx->type->mem_map_size); 1111 /* bug22643: If SR-IOV is enabled then tx push over a write combined
1112 * mapping is unsafe. We need to disable write combining in this case.
1113 * MSI is unsupported when SR-IOV is enabled, and the firmware will
1114 * have removed the MSI capability. So write combining is safe if
1115 * there is an MSI capability.
1116 */
1117 use_wc = (!EFX_WORKAROUND_22643(efx) ||
1118 pci_find_capability(pci_dev, PCI_CAP_ID_MSI));
1119 if (use_wc)
1120 efx->membase = ioremap_wc(efx->membase_phys,
1121 efx->type->mem_map_size);
1122 else
1123 efx->membase = ioremap_nocache(efx->membase_phys,
1124 efx->type->mem_map_size);
1109 if (!efx->membase) { 1125 if (!efx->membase) {
1110 netif_err(efx, probe, efx->net_dev, 1126 netif_err(efx, probe, efx->net_dev,
1111 "could not map memory BAR at %llx+%x\n", 1127 "could not map memory BAR at %llx+%x\n",
@@ -1422,7 +1438,7 @@ static void efx_start_all(struct efx_nic *efx)
1422 * restart the transmit interface early so the watchdog timer stops */ 1438 * restart the transmit interface early so the watchdog timer stops */
1423 efx_start_port(efx); 1439 efx_start_port(efx);
1424 1440
1425 if (efx_dev_registered(efx)) 1441 if (efx_dev_registered(efx) && !efx->port_inhibited)
1426 netif_tx_wake_all_queues(efx->net_dev); 1442 netif_tx_wake_all_queues(efx->net_dev);
1427 1443
1428 efx_for_each_channel(channel, efx) 1444 efx_for_each_channel(channel, efx)